ehci.c revision 1.81
1 /* $NetBSD: ehci.c,v 1.81 2004/10/24 08:52:26 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.81 2004/10/24 08:52:26 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 usbd_status 316 ehci_init(ehci_softc_t *sc) 317 { 318 u_int32_t version, sparams, cparams, hcr; 319 u_int i; 320 usbd_status err; 321 ehci_soft_qh_t *sqh; 322 323 DPRINTF(("ehci_init: start\n")); 324 #ifdef EHCI_DEBUG 325 theehci = sc; 326 #endif 327 328 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 329 330 version = EREAD2(sc, EHCI_HCIVERSION); 331 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 332 version >> 8, version & 0xff); 333 334 sparams = EREAD4(sc, EHCI_HCSPARAMS); 335 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 336 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 337 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 338 aprint_error("%s: wrong number of companions (%d != %d)\n", 339 USBDEVNAME(sc->sc_bus.bdev), 340 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 341 #if NOHCI == 0 || NUHCI == 0 342 aprint_error("%s: ohci or uhci probably not configured\n", 343 USBDEVNAME(sc->sc_bus.bdev)); 344 #endif 345 return (USBD_IOERROR); 346 } 347 if (sc->sc_ncomp > 0) { 348 aprint_normal("%s: companion controller%s, %d port%s each:", 349 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 350 EHCI_HCS_N_PCC(sparams), 351 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 352 for (i = 0; i < sc->sc_ncomp; i++) 353 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 354 aprint_normal("\n"); 355 } 356 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 357 cparams = EREAD4(sc, EHCI_HCCPARAMS); 358 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 359 360 if (EHCI_HCC_64BIT(cparams)) { 361 /* MUST clear segment register if 64 bit capable. */ 362 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 363 } 364 365 sc->sc_bus.usbrev = USBREV_2_0; 366 367 /* Reset the controller */ 368 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 369 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 370 usb_delay_ms(&sc->sc_bus, 1); 371 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 372 for (i = 0; i < 100; i++) { 373 usb_delay_ms(&sc->sc_bus, 1); 374 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 375 if (!hcr) 376 break; 377 } 378 if (hcr) { 379 aprint_error("%s: reset timeout\n", 380 USBDEVNAME(sc->sc_bus.bdev)); 381 return (USBD_IOERROR); 382 } 383 384 /* XXX need proper intr scheduling */ 385 sc->sc_rand = 96; 386 387 /* frame list size at default, read back what we got and use that */ 388 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 389 case 0: sc->sc_flsize = 1024; break; 390 case 1: sc->sc_flsize = 512; break; 391 case 2: sc->sc_flsize = 256; break; 392 case 3: return (USBD_IOERROR); 393 } 394 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 395 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 396 if (err) 397 return (err); 398 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 399 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 400 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 401 402 /* Set up the bus struct. */ 403 sc->sc_bus.methods = &ehci_bus_methods; 404 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 405 406 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 407 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 408 409 sc->sc_eintrs = EHCI_NORMAL_INTRS; 410 411 /* 412 * Allocate the interrupt dummy QHs. These are arranged to give poll 413 * intervals that are powers of 2 times 1ms. 414 */ 415 for (i = 0; i < EHCI_INTRQHS; i++) { 416 sqh = ehci_alloc_sqh(sc); 417 if (sqh == NULL) { 418 err = USBD_NOMEM; 419 goto bad1; 420 } 421 sc->sc_islots[i].sqh = sqh; 422 } 423 for (i = 0; i < EHCI_INTRQHS; i++) { 424 sqh = sc->sc_islots[i].sqh; 425 if (i == 0) { 426 /* The last (1ms) QH terminates. */ 427 sqh->qh.qh_link = EHCI_NULL; 428 sqh->next = NULL; 429 } else { 430 /* Otherwise the next QH has half the poll interval */ 431 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 432 sqh->qh.qh_link = htole32(sqh->next->physaddr | 433 EHCI_LINK_QH); 434 } 435 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 436 sqh->qh.qh_link = EHCI_NULL; 437 sqh->qh.qh_curqtd = EHCI_NULL; 438 sqh->next = NULL; 439 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 440 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 441 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 442 sqh->sqtd = NULL; 443 } 444 /* Point the frame list at the last level (128ms). */ 445 for (i = 0; i < sc->sc_flsize; i++) { 446 sc->sc_flist[i] = htole32(EHCI_LINK_QH | 447 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 448 i)].sqh->physaddr); 449 } 450 451 /* Allocate dummy QH that starts the async list. */ 452 sqh = ehci_alloc_sqh(sc); 453 if (sqh == NULL) { 454 err = USBD_NOMEM; 455 goto bad1; 456 } 457 /* Fill the QH */ 458 sqh->qh.qh_endp = 459 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 460 sqh->qh.qh_link = 461 htole32(sqh->physaddr | EHCI_LINK_QH); 462 sqh->qh.qh_curqtd = EHCI_NULL; 463 sqh->next = NULL; 464 /* Fill the overlay qTD */ 465 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 466 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 467 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 468 sqh->sqtd = NULL; 469 #ifdef EHCI_DEBUG 470 if (ehcidebug) { 471 ehci_dump_sqh(sqh); 472 } 473 #endif 474 475 /* Point to async list */ 476 sc->sc_async_head = sqh; 477 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 478 479 usb_callout_init(sc->sc_tmo_pcd); 480 481 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 482 483 /* Enable interrupts */ 484 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 485 486 /* Turn on controller */ 487 EOWRITE4(sc, EHCI_USBCMD, 488 EHCI_CMD_ITC_8 | /* 8 microframes */ 489 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 490 EHCI_CMD_ASE | 491 EHCI_CMD_PSE | 492 EHCI_CMD_RS); 493 494 /* Take over port ownership */ 495 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 496 497 for (i = 0; i < 100; i++) { 498 usb_delay_ms(&sc->sc_bus, 1); 499 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 500 if (!hcr) 501 break; 502 } 503 if (hcr) { 504 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 505 return (USBD_IOERROR); 506 } 507 508 return (USBD_NORMAL_COMPLETION); 509 510 #if 0 511 bad2: 512 ehci_free_sqh(sc, sc->sc_async_head); 513 #endif 514 bad1: 515 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 516 return (err); 517 } 518 519 int 520 ehci_intr(void *v) 521 { 522 ehci_softc_t *sc = v; 523 524 if (sc == NULL || sc->sc_dying) 525 return (0); 526 527 /* If we get an interrupt while polling, then just ignore it. */ 528 if (sc->sc_bus.use_polling) { 529 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 530 531 if (intrs) 532 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 533 #ifdef DIAGNOSTIC 534 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 535 #endif 536 return (0); 537 } 538 539 return (ehci_intr1(sc)); 540 } 541 542 Static int 543 ehci_intr1(ehci_softc_t *sc) 544 { 545 u_int32_t intrs, eintrs; 546 547 DPRINTFN(20,("ehci_intr1: enter\n")); 548 549 /* In case the interrupt occurs before initialization has completed. */ 550 if (sc == NULL) { 551 #ifdef DIAGNOSTIC 552 printf("ehci_intr1: sc == NULL\n"); 553 #endif 554 return (0); 555 } 556 557 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 558 if (!intrs) 559 return (0); 560 561 eintrs = intrs & sc->sc_eintrs; 562 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 563 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 564 (u_int)eintrs)); 565 if (!eintrs) 566 return (0); 567 568 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 569 sc->sc_bus.intr_context++; 570 sc->sc_bus.no_intrs++; 571 if (eintrs & EHCI_STS_IAA) { 572 DPRINTF(("ehci_intr1: door bell\n")); 573 wakeup(&sc->sc_async_head); 574 eintrs &= ~EHCI_STS_IAA; 575 } 576 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 577 DPRINTFN(5,("ehci_intr1: %s %s\n", 578 eintrs & EHCI_STS_INT ? "INT" : "", 579 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 580 usb_schedsoftintr(&sc->sc_bus); 581 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 582 } 583 if (eintrs & EHCI_STS_HSE) { 584 printf("%s: unrecoverable error, controller halted\n", 585 USBDEVNAME(sc->sc_bus.bdev)); 586 /* XXX what else */ 587 } 588 if (eintrs & EHCI_STS_PCD) { 589 ehci_pcd(sc, sc->sc_intrxfer); 590 /* 591 * Disable PCD interrupt for now, because it will be 592 * on until the port has been reset. 593 */ 594 ehci_pcd_able(sc, 0); 595 /* Do not allow RHSC interrupts > 1 per second */ 596 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 597 eintrs &= ~EHCI_STS_PCD; 598 } 599 600 sc->sc_bus.intr_context--; 601 602 if (eintrs != 0) { 603 /* Block unprocessed interrupts. */ 604 sc->sc_eintrs &= ~eintrs; 605 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 606 printf("%s: blocking intrs 0x%x\n", 607 USBDEVNAME(sc->sc_bus.bdev), eintrs); 608 } 609 610 return (1); 611 } 612 613 void 614 ehci_pcd_able(ehci_softc_t *sc, int on) 615 { 616 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 617 if (on) 618 sc->sc_eintrs |= EHCI_STS_PCD; 619 else 620 sc->sc_eintrs &= ~EHCI_STS_PCD; 621 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 622 } 623 624 void 625 ehci_pcd_enable(void *v_sc) 626 { 627 ehci_softc_t *sc = v_sc; 628 629 ehci_pcd_able(sc, 1); 630 } 631 632 void 633 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 634 { 635 usbd_pipe_handle pipe; 636 u_char *p; 637 int i, m; 638 639 if (xfer == NULL) { 640 /* Just ignore the change. */ 641 return; 642 } 643 644 pipe = xfer->pipe; 645 646 p = KERNADDR(&xfer->dmabuf, 0); 647 m = min(sc->sc_noport, xfer->length * 8 - 1); 648 memset(p, 0, xfer->length); 649 for (i = 1; i <= m; i++) { 650 /* Pick out CHANGE bits from the status reg. */ 651 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 652 p[i/8] |= 1 << (i%8); 653 } 654 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 655 xfer->actlen = xfer->length; 656 xfer->status = USBD_NORMAL_COMPLETION; 657 658 usb_transfer_complete(xfer); 659 } 660 661 void 662 ehci_softintr(void *v) 663 { 664 ehci_softc_t *sc = v; 665 struct ehci_xfer *ex, *nextex; 666 667 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 668 sc->sc_bus.intr_context)); 669 670 sc->sc_bus.intr_context++; 671 672 /* 673 * The only explanation I can think of for why EHCI is as brain dead 674 * as UHCI interrupt-wise is that Intel was involved in both. 675 * An interrupt just tells us that something is done, we have no 676 * clue what, so we need to scan through all active transfers. :-( 677 */ 678 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 679 nextex = LIST_NEXT(ex, inext); 680 ehci_check_intr(sc, ex); 681 } 682 683 #ifdef USB_USE_SOFTINTR 684 if (sc->sc_softwake) { 685 sc->sc_softwake = 0; 686 wakeup(&sc->sc_softwake); 687 } 688 #endif /* USB_USE_SOFTINTR */ 689 690 sc->sc_bus.intr_context--; 691 } 692 693 /* Check for an interrupt. */ 694 void 695 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 696 { 697 ehci_soft_qtd_t *sqtd, *lsqtd; 698 u_int32_t status; 699 700 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 701 702 if (ex->sqtdstart == NULL) { 703 printf("ehci_check_intr: sqtdstart=NULL\n"); 704 return; 705 } 706 lsqtd = ex->sqtdend; 707 #ifdef DIAGNOSTIC 708 if (lsqtd == NULL) { 709 printf("ehci_check_intr: sqtd==0\n"); 710 return; 711 } 712 #endif 713 /* 714 * If the last TD is still active we need to check whether there 715 * is a an error somewhere in the middle, or whether there was a 716 * short packet (SPD and not ACTIVE). 717 */ 718 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 719 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 720 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 721 status = le32toh(sqtd->qtd.qtd_status); 722 /* If there's an active QTD the xfer isn't done. */ 723 if (status & EHCI_QTD_ACTIVE) 724 break; 725 /* Any kind of error makes the xfer done. */ 726 if (status & EHCI_QTD_HALTED) 727 goto done; 728 /* We want short packets, and it is short: it's done */ 729 if (EHCI_QTD_GET_BYTES(status) != 0) 730 goto done; 731 } 732 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 733 ex, ex->sqtdstart)); 734 return; 735 } 736 done: 737 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 738 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 739 ehci_idone(ex); 740 } 741 742 void 743 ehci_idone(struct ehci_xfer *ex) 744 { 745 usbd_xfer_handle xfer = &ex->xfer; 746 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 747 ehci_soft_qtd_t *sqtd; 748 u_int32_t status = 0, nstatus; 749 int actlen; 750 751 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 752 #ifdef DIAGNOSTIC 753 { 754 int s = splhigh(); 755 if (ex->isdone) { 756 splx(s); 757 #ifdef EHCI_DEBUG 758 printf("ehci_idone: ex is done!\n "); 759 ehci_dump_exfer(ex); 760 #else 761 printf("ehci_idone: ex=%p is done!\n", ex); 762 #endif 763 return; 764 } 765 ex->isdone = 1; 766 splx(s); 767 } 768 #endif 769 770 if (xfer->status == USBD_CANCELLED || 771 xfer->status == USBD_TIMEOUT) { 772 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 773 return; 774 } 775 776 #ifdef EHCI_DEBUG 777 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 778 if (ehcidebug > 10) 779 ehci_dump_sqtds(ex->sqtdstart); 780 #endif 781 782 /* The transfer is done, compute actual length and status. */ 783 actlen = 0; 784 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) { 785 nstatus = le32toh(sqtd->qtd.qtd_status); 786 if (nstatus & EHCI_QTD_ACTIVE) 787 break; 788 789 status = nstatus; 790 /* halt is ok if descriptor is last, and complete */ 791 if (sqtd->qtd.qtd_next == EHCI_NULL && 792 EHCI_QTD_GET_BYTES(status) == 0) 793 status &= ~EHCI_QTD_HALTED; 794 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 795 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 796 } 797 798 /* If there are left over TDs we need to update the toggle. */ 799 if (sqtd != NULL) { 800 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 801 #if 0 802 ehci_dump_sqh(epipe->sqh); 803 ehci_dump_sqtds(ex->sqtdstart); 804 #endif 805 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 806 } 807 808 status &= EHCI_QTD_STATERRS; 809 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 810 xfer->length, actlen, status)); 811 xfer->actlen = actlen; 812 if (status != 0) { 813 #ifdef EHCI_DEBUG 814 char sbuf[128]; 815 816 bitmask_snprintf((u_int32_t)status, 817 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 818 "\3MISSED", sbuf, sizeof(sbuf)); 819 820 DPRINTFN((status & EHCI_QTD_HALTED) ? 2 : 0, 821 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 822 "status 0x%s\n", 823 xfer->pipe->device->address, 824 xfer->pipe->endpoint->edesc->bEndpointAddress, 825 sbuf)); 826 if (ehcidebug > 2) { 827 ehci_dump_sqh(epipe->sqh); 828 ehci_dump_sqtds(ex->sqtdstart); 829 } 830 #endif 831 if (status == EHCI_QTD_HALTED) 832 xfer->status = USBD_STALLED; 833 else 834 xfer->status = USBD_IOERROR; /* more info XXX */ 835 } else { 836 xfer->status = USBD_NORMAL_COMPLETION; 837 } 838 839 usb_transfer_complete(xfer); 840 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 841 } 842 843 /* 844 * Wait here until controller claims to have an interrupt. 845 * Then call ehci_intr and return. Use timeout to avoid waiting 846 * too long. 847 */ 848 void 849 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 850 { 851 int timo = xfer->timeout; 852 int usecs; 853 u_int32_t intrs; 854 855 xfer->status = USBD_IN_PROGRESS; 856 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 857 usb_delay_ms(&sc->sc_bus, 1); 858 if (sc->sc_dying) 859 break; 860 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 861 sc->sc_eintrs; 862 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 863 #ifdef EHCI_DEBUG 864 if (ehcidebug > 15) 865 ehci_dump_regs(sc); 866 #endif 867 if (intrs) { 868 ehci_intr1(sc); 869 if (xfer->status != USBD_IN_PROGRESS) 870 return; 871 } 872 } 873 874 /* Timeout */ 875 DPRINTF(("ehci_waitintr: timeout\n")); 876 xfer->status = USBD_TIMEOUT; 877 usb_transfer_complete(xfer); 878 /* XXX should free TD */ 879 } 880 881 void 882 ehci_poll(struct usbd_bus *bus) 883 { 884 ehci_softc_t *sc = (ehci_softc_t *)bus; 885 #ifdef EHCI_DEBUG 886 static int last; 887 int new; 888 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 889 if (new != last) { 890 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 891 last = new; 892 } 893 #endif 894 895 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 896 ehci_intr1(sc); 897 } 898 899 int 900 ehci_detach(struct ehci_softc *sc, int flags) 901 { 902 int rv = 0; 903 904 if (sc->sc_child != NULL) 905 rv = config_detach(sc->sc_child, flags); 906 907 if (rv != 0) 908 return (rv); 909 910 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 911 912 if (sc->sc_powerhook != NULL) 913 powerhook_disestablish(sc->sc_powerhook); 914 if (sc->sc_shutdownhook != NULL) 915 shutdownhook_disestablish(sc->sc_shutdownhook); 916 917 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 918 919 /* XXX free other data structures XXX */ 920 921 return (rv); 922 } 923 924 925 int 926 ehci_activate(device_ptr_t self, enum devact act) 927 { 928 struct ehci_softc *sc = (struct ehci_softc *)self; 929 int rv = 0; 930 931 switch (act) { 932 case DVACT_ACTIVATE: 933 return (EOPNOTSUPP); 934 935 case DVACT_DEACTIVATE: 936 if (sc->sc_child != NULL) 937 rv = config_deactivate(sc->sc_child); 938 sc->sc_dying = 1; 939 break; 940 } 941 return (rv); 942 } 943 944 /* 945 * Handle suspend/resume. 946 * 947 * We need to switch to polling mode here, because this routine is 948 * called from an interrupt context. This is all right since we 949 * are almost suspended anyway. 950 */ 951 void 952 ehci_power(int why, void *v) 953 { 954 ehci_softc_t *sc = v; 955 u_int32_t cmd, hcr; 956 int s, i; 957 958 #ifdef EHCI_DEBUG 959 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 960 if (ehcidebug > 0) 961 ehci_dump_regs(sc); 962 #endif 963 964 s = splhardusb(); 965 switch (why) { 966 case PWR_SUSPEND: 967 case PWR_STANDBY: 968 sc->sc_bus.use_polling++; 969 970 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 971 972 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 973 EOWRITE4(sc, EHCI_USBCMD, cmd); 974 975 for (i = 0; i < 100; i++) { 976 hcr = EOREAD4(sc, EHCI_USBSTS) & 977 (EHCI_STS_ASS | EHCI_STS_PSS); 978 if (hcr == 0) 979 break; 980 981 usb_delay_ms(&sc->sc_bus, 1); 982 } 983 if (hcr != 0) { 984 printf("%s: reset timeout\n", 985 USBDEVNAME(sc->sc_bus.bdev)); 986 } 987 988 cmd &= ~EHCI_CMD_RS; 989 EOWRITE4(sc, EHCI_USBCMD, cmd); 990 991 for (i = 0; i < 100; i++) { 992 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 993 if (hcr == EHCI_STS_HCH) 994 break; 995 996 usb_delay_ms(&sc->sc_bus, 1); 997 } 998 if (hcr != EHCI_STS_HCH) { 999 printf("%s: config timeout\n", 1000 USBDEVNAME(sc->sc_bus.bdev)); 1001 } 1002 1003 sc->sc_bus.use_polling--; 1004 break; 1005 1006 case PWR_RESUME: 1007 sc->sc_bus.use_polling++; 1008 1009 /* restore things in case the bios sucks */ 1010 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1011 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1012 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1013 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1014 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1015 1016 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1017 1018 for (i = 0; i < 100; i++) { 1019 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1020 if (hcr != EHCI_STS_HCH) 1021 break; 1022 1023 usb_delay_ms(&sc->sc_bus, 1); 1024 } 1025 if (hcr == EHCI_STS_HCH) { 1026 printf("%s: config timeout\n", 1027 USBDEVNAME(sc->sc_bus.bdev)); 1028 } 1029 1030 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1031 1032 sc->sc_bus.use_polling--; 1033 break; 1034 case PWR_SOFTSUSPEND: 1035 case PWR_SOFTSTANDBY: 1036 case PWR_SOFTRESUME: 1037 break; 1038 } 1039 splx(s); 1040 1041 #ifdef EHCI_DEBUG 1042 DPRINTF(("ehci_power: sc=%p\n", sc)); 1043 if (ehcidebug > 0) 1044 ehci_dump_regs(sc); 1045 #endif 1046 } 1047 1048 /* 1049 * Shut down the controller when the system is going down. 1050 */ 1051 void 1052 ehci_shutdown(void *v) 1053 { 1054 ehci_softc_t *sc = v; 1055 1056 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1057 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1058 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1059 } 1060 1061 usbd_status 1062 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1063 { 1064 struct ehci_softc *sc = (struct ehci_softc *)bus; 1065 usbd_status err; 1066 1067 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1068 #ifdef EHCI_DEBUG 1069 if (err) 1070 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1071 #endif 1072 return (err); 1073 } 1074 1075 void 1076 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1077 { 1078 struct ehci_softc *sc = (struct ehci_softc *)bus; 1079 1080 usb_freemem(&sc->sc_bus, dma); 1081 } 1082 1083 usbd_xfer_handle 1084 ehci_allocx(struct usbd_bus *bus) 1085 { 1086 struct ehci_softc *sc = (struct ehci_softc *)bus; 1087 usbd_xfer_handle xfer; 1088 1089 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1090 if (xfer != NULL) { 1091 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1092 #ifdef DIAGNOSTIC 1093 if (xfer->busy_free != XFER_FREE) { 1094 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1095 xfer->busy_free); 1096 } 1097 #endif 1098 } else { 1099 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1100 } 1101 if (xfer != NULL) { 1102 memset(xfer, 0, sizeof(struct ehci_xfer)); 1103 #ifdef DIAGNOSTIC 1104 EXFER(xfer)->isdone = 1; 1105 xfer->busy_free = XFER_BUSY; 1106 #endif 1107 } 1108 return (xfer); 1109 } 1110 1111 void 1112 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1113 { 1114 struct ehci_softc *sc = (struct ehci_softc *)bus; 1115 1116 #ifdef DIAGNOSTIC 1117 if (xfer->busy_free != XFER_BUSY) { 1118 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1119 xfer->busy_free); 1120 return; 1121 } 1122 xfer->busy_free = XFER_FREE; 1123 if (!EXFER(xfer)->isdone) { 1124 printf("ehci_freex: !isdone\n"); 1125 return; 1126 } 1127 #endif 1128 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1129 } 1130 1131 Static void 1132 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1133 { 1134 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1135 1136 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1137 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1138 #ifdef USB_DEBUG 1139 if (ehcidebug) 1140 usbd_dump_pipe(pipe); 1141 #endif 1142 epipe->nexttoggle = 0; 1143 } 1144 1145 Static void 1146 ehci_noop(usbd_pipe_handle pipe) 1147 { 1148 } 1149 1150 #ifdef EHCI_DEBUG 1151 void 1152 ehci_dump_regs(ehci_softc_t *sc) 1153 { 1154 int i; 1155 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1156 EOREAD4(sc, EHCI_USBCMD), 1157 EOREAD4(sc, EHCI_USBSTS), 1158 EOREAD4(sc, EHCI_USBINTR)); 1159 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1160 EOREAD4(sc, EHCI_FRINDEX), 1161 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1162 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1163 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1164 for (i = 1; i <= sc->sc_noport; i++) 1165 printf("port %d status=0x%08x\n", i, 1166 EOREAD4(sc, EHCI_PORTSC(i))); 1167 } 1168 1169 /* 1170 * Unused function - this is meant to be called from a kernel 1171 * debugger. 1172 */ 1173 void 1174 ehci_dump() 1175 { 1176 ehci_dump_regs(theehci); 1177 } 1178 1179 void 1180 ehci_dump_link(ehci_link_t link, int type) 1181 { 1182 link = le32toh(link); 1183 printf("0x%08x", link); 1184 if (link & EHCI_LINK_TERMINATE) 1185 printf("<T>"); 1186 else { 1187 printf("<"); 1188 if (type) { 1189 switch (EHCI_LINK_TYPE(link)) { 1190 case EHCI_LINK_ITD: printf("ITD"); break; 1191 case EHCI_LINK_QH: printf("QH"); break; 1192 case EHCI_LINK_SITD: printf("SITD"); break; 1193 case EHCI_LINK_FSTN: printf("FSTN"); break; 1194 } 1195 } 1196 printf(">"); 1197 } 1198 } 1199 1200 void 1201 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1202 { 1203 int i; 1204 u_int32_t stop; 1205 1206 stop = 0; 1207 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1208 ehci_dump_sqtd(sqtd); 1209 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1210 } 1211 if (sqtd) 1212 printf("dump aborted, too many TDs\n"); 1213 } 1214 1215 void 1216 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1217 { 1218 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1219 ehci_dump_qtd(&sqtd->qtd); 1220 } 1221 1222 void 1223 ehci_dump_qtd(ehci_qtd_t *qtd) 1224 { 1225 u_int32_t s; 1226 char sbuf[128]; 1227 1228 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1229 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1230 printf("\n"); 1231 s = le32toh(qtd->qtd_status); 1232 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1233 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1234 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1235 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1236 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1237 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1238 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1239 EHCI_QTD_GET_PID(s), sbuf); 1240 for (s = 0; s < 5; s++) 1241 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1242 } 1243 1244 void 1245 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1246 { 1247 ehci_qh_t *qh = &sqh->qh; 1248 u_int32_t endp, endphub; 1249 1250 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1251 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1252 endp = le32toh(qh->qh_endp); 1253 printf(" endp=0x%08x\n", endp); 1254 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1255 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1256 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1257 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1258 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1259 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1260 EHCI_QH_GET_NRL(endp)); 1261 endphub = le32toh(qh->qh_endphub); 1262 printf(" endphub=0x%08x\n", endphub); 1263 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1264 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1265 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1266 EHCI_QH_GET_MULT(endphub)); 1267 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1268 printf("Overlay qTD:\n"); 1269 ehci_dump_qtd(&qh->qh_qtd); 1270 } 1271 1272 #ifdef DIAGNOSTIC 1273 Static void 1274 ehci_dump_exfer(struct ehci_xfer *ex) 1275 { 1276 printf("ehci_dump_exfer: ex=%p\n", ex); 1277 } 1278 #endif 1279 #endif 1280 1281 usbd_status 1282 ehci_open(usbd_pipe_handle pipe) 1283 { 1284 usbd_device_handle dev = pipe->device; 1285 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1286 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1287 u_int8_t addr = dev->address; 1288 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1289 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1290 ehci_soft_qh_t *sqh; 1291 usbd_status err; 1292 int s; 1293 int ival, speed, naks; 1294 int hshubaddr, hshubport; 1295 1296 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1297 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1298 1299 if (dev->myhsport) { 1300 hshubaddr = dev->myhsport->parent->address; 1301 hshubport = dev->myhsport->portno; 1302 } else { 1303 hshubaddr = 0; 1304 hshubport = 0; 1305 } 1306 1307 if (sc->sc_dying) 1308 return (USBD_IOERROR); 1309 1310 epipe->nexttoggle = 0; 1311 1312 if (addr == sc->sc_addr) { 1313 switch (ed->bEndpointAddress) { 1314 case USB_CONTROL_ENDPOINT: 1315 pipe->methods = &ehci_root_ctrl_methods; 1316 break; 1317 case UE_DIR_IN | EHCI_INTR_ENDPT: 1318 pipe->methods = &ehci_root_intr_methods; 1319 break; 1320 default: 1321 return (USBD_INVAL); 1322 } 1323 return (USBD_NORMAL_COMPLETION); 1324 } 1325 1326 /* XXX All this stuff is only valid for async. */ 1327 switch (dev->speed) { 1328 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1329 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1330 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1331 default: panic("ehci_open: bad device speed %d", dev->speed); 1332 } 1333 if (speed != EHCI_QH_SPEED_HIGH) { 1334 printf("%s: *** WARNING: opening low/full speed device, this " 1335 "does not work yet.\n", 1336 USBDEVNAME(sc->sc_bus.bdev)); 1337 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1338 hshubaddr, hshubport)); 1339 if (xfertype != UE_CONTROL) 1340 return USBD_INVAL; 1341 } 1342 1343 naks = 8; /* XXX */ 1344 sqh = ehci_alloc_sqh(sc); 1345 if (sqh == NULL) 1346 goto bad0; 1347 /* qh_link filled when the QH is added */ 1348 sqh->qh.qh_endp = htole32( 1349 EHCI_QH_SET_ADDR(addr) | 1350 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1351 EHCI_QH_SET_EPS(speed) | 1352 EHCI_QH_DTC | 1353 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1354 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1355 EHCI_QH_CTL : 0) | 1356 EHCI_QH_SET_NRL(naks) 1357 ); 1358 sqh->qh.qh_endphub = htole32( 1359 EHCI_QH_SET_MULT(1) | 1360 EHCI_QH_SET_HUBA(hshubaddr) | 1361 EHCI_QH_SET_PORT(hshubport) | 1362 EHCI_QH_SET_CMASK(0xf0) | /* XXX */ 1363 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0) 1364 ); 1365 sqh->qh.qh_curqtd = EHCI_NULL; 1366 /* Fill the overlay qTD */ 1367 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1368 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1369 sqh->qh.qh_qtd.qtd_status = htole32(0); 1370 1371 epipe->sqh = sqh; 1372 1373 switch (xfertype) { 1374 case UE_CONTROL: 1375 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1376 0, &epipe->u.ctl.reqdma); 1377 #ifdef EHCI_DEBUG 1378 if (err) 1379 printf("ehci_open: usb_allocmem()=%d\n", err); 1380 #endif 1381 if (err) 1382 goto bad1; 1383 pipe->methods = &ehci_device_ctrl_methods; 1384 s = splusb(); 1385 ehci_add_qh(sqh, sc->sc_async_head); 1386 splx(s); 1387 break; 1388 case UE_BULK: 1389 pipe->methods = &ehci_device_bulk_methods; 1390 s = splusb(); 1391 ehci_add_qh(sqh, sc->sc_async_head); 1392 splx(s); 1393 break; 1394 case UE_INTERRUPT: 1395 pipe->methods = &ehci_device_intr_methods; 1396 ival = pipe->interval; 1397 if (ival == USBD_DEFAULT_INTERVAL) 1398 ival = ed->bInterval; 1399 return (ehci_device_setintr(sc, sqh, ival)); 1400 case UE_ISOCHRONOUS: 1401 pipe->methods = &ehci_device_isoc_methods; 1402 return (USBD_INVAL); 1403 default: 1404 return (USBD_INVAL); 1405 } 1406 return (USBD_NORMAL_COMPLETION); 1407 1408 bad1: 1409 ehci_free_sqh(sc, sqh); 1410 bad0: 1411 return (USBD_NOMEM); 1412 } 1413 1414 /* 1415 * Add an ED to the schedule. Called at splusb(). 1416 */ 1417 void 1418 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1419 { 1420 SPLUSBCHECK; 1421 1422 sqh->next = head->next; 1423 sqh->qh.qh_link = head->qh.qh_link; 1424 head->next = sqh; 1425 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1426 1427 #ifdef EHCI_DEBUG 1428 if (ehcidebug > 5) { 1429 printf("ehci_add_qh:\n"); 1430 ehci_dump_sqh(sqh); 1431 } 1432 #endif 1433 } 1434 1435 /* 1436 * Remove an ED from the schedule. Called at splusb(). 1437 */ 1438 void 1439 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1440 { 1441 ehci_soft_qh_t *p; 1442 1443 SPLUSBCHECK; 1444 /* XXX */ 1445 for (p = head; p != NULL && p->next != sqh; p = p->next) 1446 ; 1447 if (p == NULL) 1448 panic("ehci_rem_qh: ED not found"); 1449 p->next = sqh->next; 1450 p->qh.qh_link = sqh->qh.qh_link; 1451 1452 ehci_sync_hc(sc); 1453 } 1454 1455 void 1456 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1457 { 1458 /* Halt while we are messing. */ 1459 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1460 sqh->qh.qh_curqtd = 0; 1461 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1462 sqh->sqtd = sqtd; 1463 /* Clear halt */ 1464 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED); 1465 } 1466 1467 /* 1468 * Ensure that the HC has released all references to the QH. We do this 1469 * by asking for a Async Advance Doorbell interrupt and then we wait for 1470 * the interrupt. 1471 * To make this easier we first obtain exclusive use of the doorbell. 1472 */ 1473 void 1474 ehci_sync_hc(ehci_softc_t *sc) 1475 { 1476 int s, error; 1477 1478 if (sc->sc_dying) { 1479 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1480 return; 1481 } 1482 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1483 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1484 s = splhardusb(); 1485 /* ask for doorbell */ 1486 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1487 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1488 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1489 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1490 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1491 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1492 splx(s); 1493 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1494 #ifdef DIAGNOSTIC 1495 if (error) 1496 printf("ehci_sync_hc: tsleep() = %d\n", error); 1497 #endif 1498 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1499 } 1500 1501 /***********/ 1502 1503 /* 1504 * Data structures and routines to emulate the root hub. 1505 */ 1506 Static usb_device_descriptor_t ehci_devd = { 1507 USB_DEVICE_DESCRIPTOR_SIZE, 1508 UDESC_DEVICE, /* type */ 1509 {0x00, 0x02}, /* USB version */ 1510 UDCLASS_HUB, /* class */ 1511 UDSUBCLASS_HUB, /* subclass */ 1512 UDPROTO_HSHUBSTT, /* protocol */ 1513 64, /* max packet */ 1514 {0},{0},{0x00,0x01}, /* device id */ 1515 1,2,0, /* string indicies */ 1516 1 /* # of configurations */ 1517 }; 1518 1519 Static usb_device_qualifier_t ehci_odevd = { 1520 USB_DEVICE_DESCRIPTOR_SIZE, 1521 UDESC_DEVICE_QUALIFIER, /* type */ 1522 {0x00, 0x02}, /* USB version */ 1523 UDCLASS_HUB, /* class */ 1524 UDSUBCLASS_HUB, /* subclass */ 1525 UDPROTO_FSHUB, /* protocol */ 1526 64, /* max packet */ 1527 1, /* # of configurations */ 1528 0 1529 }; 1530 1531 Static usb_config_descriptor_t ehci_confd = { 1532 USB_CONFIG_DESCRIPTOR_SIZE, 1533 UDESC_CONFIG, 1534 {USB_CONFIG_DESCRIPTOR_SIZE + 1535 USB_INTERFACE_DESCRIPTOR_SIZE + 1536 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1537 1, 1538 1, 1539 0, 1540 UC_SELF_POWERED, 1541 0 /* max power */ 1542 }; 1543 1544 Static usb_interface_descriptor_t ehci_ifcd = { 1545 USB_INTERFACE_DESCRIPTOR_SIZE, 1546 UDESC_INTERFACE, 1547 0, 1548 0, 1549 1, 1550 UICLASS_HUB, 1551 UISUBCLASS_HUB, 1552 UIPROTO_HSHUBSTT, 1553 0 1554 }; 1555 1556 Static usb_endpoint_descriptor_t ehci_endpd = { 1557 USB_ENDPOINT_DESCRIPTOR_SIZE, 1558 UDESC_ENDPOINT, 1559 UE_DIR_IN | EHCI_INTR_ENDPT, 1560 UE_INTERRUPT, 1561 {8, 0}, /* max packet */ 1562 255 1563 }; 1564 1565 Static usb_hub_descriptor_t ehci_hubd = { 1566 USB_HUB_DESCRIPTOR_SIZE, 1567 UDESC_HUB, 1568 0, 1569 {0,0}, 1570 0, 1571 0, 1572 {0}, 1573 }; 1574 1575 Static int 1576 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1577 { 1578 int i; 1579 1580 if (l == 0) 1581 return (0); 1582 p->bLength = 2 * strlen(s) + 2; 1583 if (l == 1) 1584 return (1); 1585 p->bDescriptorType = UDESC_STRING; 1586 l -= 2; 1587 for (i = 0; s[i] && l > 1; i++, l -= 2) 1588 USETW2(p->bString[i], 0, s[i]); 1589 return (2*i+2); 1590 } 1591 1592 /* 1593 * Simulate a hardware hub by handling all the necessary requests. 1594 */ 1595 Static usbd_status 1596 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1597 { 1598 usbd_status err; 1599 1600 /* Insert last in queue. */ 1601 err = usb_insert_transfer(xfer); 1602 if (err) 1603 return (err); 1604 1605 /* Pipe isn't running, start first */ 1606 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1607 } 1608 1609 Static usbd_status 1610 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1611 { 1612 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1613 usb_device_request_t *req; 1614 void *buf = NULL; 1615 int port, i; 1616 int s, len, value, index, l, totlen = 0; 1617 usb_port_status_t ps; 1618 usb_hub_descriptor_t hubd; 1619 usbd_status err; 1620 u_int32_t v; 1621 1622 if (sc->sc_dying) 1623 return (USBD_IOERROR); 1624 1625 #ifdef DIAGNOSTIC 1626 if (!(xfer->rqflags & URQ_REQUEST)) 1627 /* XXX panic */ 1628 return (USBD_INVAL); 1629 #endif 1630 req = &xfer->request; 1631 1632 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1633 req->bmRequestType, req->bRequest)); 1634 1635 len = UGETW(req->wLength); 1636 value = UGETW(req->wValue); 1637 index = UGETW(req->wIndex); 1638 1639 if (len != 0) 1640 buf = KERNADDR(&xfer->dmabuf, 0); 1641 1642 #define C(x,y) ((x) | ((y) << 8)) 1643 switch(C(req->bRequest, req->bmRequestType)) { 1644 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1645 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1646 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1647 /* 1648 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1649 * for the integrated root hub. 1650 */ 1651 break; 1652 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1653 if (len > 0) { 1654 *(u_int8_t *)buf = sc->sc_conf; 1655 totlen = 1; 1656 } 1657 break; 1658 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1659 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1660 switch(value >> 8) { 1661 case UDESC_DEVICE: 1662 if ((value & 0xff) != 0) { 1663 err = USBD_IOERROR; 1664 goto ret; 1665 } 1666 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1667 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1668 memcpy(buf, &ehci_devd, l); 1669 break; 1670 /* 1671 * We can't really operate at another speed, but the spec says 1672 * we need this descriptor. 1673 */ 1674 case UDESC_DEVICE_QUALIFIER: 1675 if ((value & 0xff) != 0) { 1676 err = USBD_IOERROR; 1677 goto ret; 1678 } 1679 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1680 memcpy(buf, &ehci_odevd, l); 1681 break; 1682 /* 1683 * We can't really operate at another speed, but the spec says 1684 * we need this descriptor. 1685 */ 1686 case UDESC_OTHER_SPEED_CONFIGURATION: 1687 case UDESC_CONFIG: 1688 if ((value & 0xff) != 0) { 1689 err = USBD_IOERROR; 1690 goto ret; 1691 } 1692 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1693 memcpy(buf, &ehci_confd, l); 1694 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1695 value >> 8; 1696 buf = (char *)buf + l; 1697 len -= l; 1698 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1699 totlen += l; 1700 memcpy(buf, &ehci_ifcd, l); 1701 buf = (char *)buf + l; 1702 len -= l; 1703 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1704 totlen += l; 1705 memcpy(buf, &ehci_endpd, l); 1706 break; 1707 case UDESC_STRING: 1708 if (len == 0) 1709 break; 1710 *(u_int8_t *)buf = 0; 1711 totlen = 1; 1712 switch (value & 0xff) { 1713 case 1: /* Vendor */ 1714 totlen = ehci_str(buf, len, sc->sc_vendor); 1715 break; 1716 case 2: /* Product */ 1717 totlen = ehci_str(buf, len, "EHCI root hub"); 1718 break; 1719 } 1720 break; 1721 default: 1722 err = USBD_IOERROR; 1723 goto ret; 1724 } 1725 break; 1726 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1727 if (len > 0) { 1728 *(u_int8_t *)buf = 0; 1729 totlen = 1; 1730 } 1731 break; 1732 case C(UR_GET_STATUS, UT_READ_DEVICE): 1733 if (len > 1) { 1734 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1735 totlen = 2; 1736 } 1737 break; 1738 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1739 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1740 if (len > 1) { 1741 USETW(((usb_status_t *)buf)->wStatus, 0); 1742 totlen = 2; 1743 } 1744 break; 1745 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1746 if (value >= USB_MAX_DEVICES) { 1747 err = USBD_IOERROR; 1748 goto ret; 1749 } 1750 sc->sc_addr = value; 1751 break; 1752 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1753 if (value != 0 && value != 1) { 1754 err = USBD_IOERROR; 1755 goto ret; 1756 } 1757 sc->sc_conf = value; 1758 break; 1759 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1760 break; 1761 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1762 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1763 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1764 err = USBD_IOERROR; 1765 goto ret; 1766 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1767 break; 1768 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1769 break; 1770 /* Hub requests */ 1771 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1772 break; 1773 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1774 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1775 "port=%d feature=%d\n", 1776 index, value)); 1777 if (index < 1 || index > sc->sc_noport) { 1778 err = USBD_IOERROR; 1779 goto ret; 1780 } 1781 port = EHCI_PORTSC(index); 1782 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1783 switch(value) { 1784 case UHF_PORT_ENABLE: 1785 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1786 break; 1787 case UHF_PORT_SUSPEND: 1788 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1789 break; 1790 case UHF_PORT_POWER: 1791 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1792 break; 1793 case UHF_PORT_TEST: 1794 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1795 "%d\n", index)); 1796 break; 1797 case UHF_PORT_INDICATOR: 1798 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1799 "%d\n", index)); 1800 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1801 break; 1802 case UHF_C_PORT_CONNECTION: 1803 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1804 break; 1805 case UHF_C_PORT_ENABLE: 1806 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1807 break; 1808 case UHF_C_PORT_SUSPEND: 1809 /* how? */ 1810 break; 1811 case UHF_C_PORT_OVER_CURRENT: 1812 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1813 break; 1814 case UHF_C_PORT_RESET: 1815 sc->sc_isreset = 0; 1816 break; 1817 default: 1818 err = USBD_IOERROR; 1819 goto ret; 1820 } 1821 #if 0 1822 switch(value) { 1823 case UHF_C_PORT_CONNECTION: 1824 case UHF_C_PORT_ENABLE: 1825 case UHF_C_PORT_SUSPEND: 1826 case UHF_C_PORT_OVER_CURRENT: 1827 case UHF_C_PORT_RESET: 1828 /* Enable RHSC interrupt if condition is cleared. */ 1829 if ((OREAD4(sc, port) >> 16) == 0) 1830 ehci_pcd_able(sc, 1); 1831 break; 1832 default: 1833 break; 1834 } 1835 #endif 1836 break; 1837 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1838 if ((value & 0xff) != 0) { 1839 err = USBD_IOERROR; 1840 goto ret; 1841 } 1842 hubd = ehci_hubd; 1843 hubd.bNbrPorts = sc->sc_noport; 1844 v = EOREAD4(sc, EHCI_HCSPARAMS); 1845 USETW(hubd.wHubCharacteristics, 1846 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1847 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1848 ? UHD_PORT_IND : 0); 1849 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1850 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1851 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1852 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1853 l = min(len, hubd.bDescLength); 1854 totlen = l; 1855 memcpy(buf, &hubd, l); 1856 break; 1857 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1858 if (len != 4) { 1859 err = USBD_IOERROR; 1860 goto ret; 1861 } 1862 memset(buf, 0, len); /* ? XXX */ 1863 totlen = len; 1864 break; 1865 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1866 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1867 index)); 1868 if (index < 1 || index > sc->sc_noport) { 1869 err = USBD_IOERROR; 1870 goto ret; 1871 } 1872 if (len != 4) { 1873 err = USBD_IOERROR; 1874 goto ret; 1875 } 1876 v = EOREAD4(sc, EHCI_PORTSC(index)); 1877 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1878 v)); 1879 i = UPS_HIGH_SPEED; 1880 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1881 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1882 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1883 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1884 if (v & EHCI_PS_PR) i |= UPS_RESET; 1885 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1886 USETW(ps.wPortStatus, i); 1887 i = 0; 1888 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1889 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1890 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1891 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1892 USETW(ps.wPortChange, i); 1893 l = min(len, sizeof ps); 1894 memcpy(buf, &ps, l); 1895 totlen = l; 1896 break; 1897 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1898 err = USBD_IOERROR; 1899 goto ret; 1900 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1901 break; 1902 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1903 if (index < 1 || index > sc->sc_noport) { 1904 err = USBD_IOERROR; 1905 goto ret; 1906 } 1907 port = EHCI_PORTSC(index); 1908 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1909 switch(value) { 1910 case UHF_PORT_ENABLE: 1911 EOWRITE4(sc, port, v | EHCI_PS_PE); 1912 break; 1913 case UHF_PORT_SUSPEND: 1914 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1915 break; 1916 case UHF_PORT_RESET: 1917 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1918 index)); 1919 if (EHCI_PS_IS_LOWSPEED(v)) { 1920 /* Low speed device, give up ownership. */ 1921 ehci_disown(sc, index, 1); 1922 break; 1923 } 1924 /* Start reset sequence. */ 1925 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1926 EOWRITE4(sc, port, v | EHCI_PS_PR); 1927 /* Wait for reset to complete. */ 1928 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1929 if (sc->sc_dying) { 1930 err = USBD_IOERROR; 1931 goto ret; 1932 } 1933 /* Terminate reset sequence. */ 1934 EOWRITE4(sc, port, v); 1935 /* Wait for HC to complete reset. */ 1936 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1937 if (sc->sc_dying) { 1938 err = USBD_IOERROR; 1939 goto ret; 1940 } 1941 v = EOREAD4(sc, port); 1942 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1943 if (v & EHCI_PS_PR) { 1944 printf("%s: port reset timeout\n", 1945 USBDEVNAME(sc->sc_bus.bdev)); 1946 return (USBD_TIMEOUT); 1947 } 1948 if (!(v & EHCI_PS_PE)) { 1949 /* Not a high speed device, give up ownership.*/ 1950 ehci_disown(sc, index, 0); 1951 break; 1952 } 1953 sc->sc_isreset = 1; 1954 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1955 index, v)); 1956 break; 1957 case UHF_PORT_POWER: 1958 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 1959 "%d\n", index)); 1960 EOWRITE4(sc, port, v | EHCI_PS_PP); 1961 break; 1962 case UHF_PORT_TEST: 1963 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 1964 "%d\n", index)); 1965 break; 1966 case UHF_PORT_INDICATOR: 1967 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 1968 "%d\n", index)); 1969 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1970 break; 1971 default: 1972 err = USBD_IOERROR; 1973 goto ret; 1974 } 1975 break; 1976 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1977 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1978 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1979 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1980 break; 1981 default: 1982 err = USBD_IOERROR; 1983 goto ret; 1984 } 1985 xfer->actlen = totlen; 1986 err = USBD_NORMAL_COMPLETION; 1987 ret: 1988 xfer->status = err; 1989 s = splusb(); 1990 usb_transfer_complete(xfer); 1991 splx(s); 1992 return (USBD_IN_PROGRESS); 1993 } 1994 1995 void 1996 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 1997 { 1998 int port; 1999 u_int32_t v; 2000 2001 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2002 #ifdef DIAGNOSTIC 2003 if (sc->sc_npcomp != 0) { 2004 int i = (index-1) / sc->sc_npcomp; 2005 if (i >= sc->sc_ncomp) 2006 printf("%s: strange port\n", 2007 USBDEVNAME(sc->sc_bus.bdev)); 2008 else 2009 printf("%s: handing over %s speed device on " 2010 "port %d to %s\n", 2011 USBDEVNAME(sc->sc_bus.bdev), 2012 lowspeed ? "low" : "full", 2013 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2014 } else { 2015 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2016 } 2017 #endif 2018 port = EHCI_PORTSC(index); 2019 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2020 EOWRITE4(sc, port, v | EHCI_PS_PO); 2021 } 2022 2023 /* Abort a root control request. */ 2024 Static void 2025 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2026 { 2027 /* Nothing to do, all transfers are synchronous. */ 2028 } 2029 2030 /* Close the root pipe. */ 2031 Static void 2032 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2033 { 2034 DPRINTF(("ehci_root_ctrl_close\n")); 2035 /* Nothing to do. */ 2036 } 2037 2038 void 2039 ehci_root_intr_done(usbd_xfer_handle xfer) 2040 { 2041 xfer->hcpriv = NULL; 2042 } 2043 2044 Static usbd_status 2045 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2046 { 2047 usbd_status err; 2048 2049 /* Insert last in queue. */ 2050 err = usb_insert_transfer(xfer); 2051 if (err) 2052 return (err); 2053 2054 /* Pipe isn't running, start first */ 2055 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2056 } 2057 2058 Static usbd_status 2059 ehci_root_intr_start(usbd_xfer_handle xfer) 2060 { 2061 usbd_pipe_handle pipe = xfer->pipe; 2062 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2063 2064 if (sc->sc_dying) 2065 return (USBD_IOERROR); 2066 2067 sc->sc_intrxfer = xfer; 2068 2069 return (USBD_IN_PROGRESS); 2070 } 2071 2072 /* Abort a root interrupt request. */ 2073 Static void 2074 ehci_root_intr_abort(usbd_xfer_handle xfer) 2075 { 2076 int s; 2077 2078 if (xfer->pipe->intrxfer == xfer) { 2079 DPRINTF(("ehci_root_intr_abort: remove\n")); 2080 xfer->pipe->intrxfer = NULL; 2081 } 2082 xfer->status = USBD_CANCELLED; 2083 s = splusb(); 2084 usb_transfer_complete(xfer); 2085 splx(s); 2086 } 2087 2088 /* Close the root pipe. */ 2089 Static void 2090 ehci_root_intr_close(usbd_pipe_handle pipe) 2091 { 2092 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2093 2094 DPRINTF(("ehci_root_intr_close\n")); 2095 2096 sc->sc_intrxfer = NULL; 2097 } 2098 2099 void 2100 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2101 { 2102 xfer->hcpriv = NULL; 2103 } 2104 2105 /************************/ 2106 2107 ehci_soft_qh_t * 2108 ehci_alloc_sqh(ehci_softc_t *sc) 2109 { 2110 ehci_soft_qh_t *sqh; 2111 usbd_status err; 2112 int i, offs; 2113 usb_dma_t dma; 2114 2115 if (sc->sc_freeqhs == NULL) { 2116 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2117 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2118 EHCI_PAGE_SIZE, &dma); 2119 #ifdef EHCI_DEBUG 2120 if (err) 2121 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2122 #endif 2123 if (err) 2124 return (NULL); 2125 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2126 offs = i * EHCI_SQH_SIZE; 2127 sqh = KERNADDR(&dma, offs); 2128 sqh->physaddr = DMAADDR(&dma, offs); 2129 sqh->next = sc->sc_freeqhs; 2130 sc->sc_freeqhs = sqh; 2131 } 2132 } 2133 sqh = sc->sc_freeqhs; 2134 sc->sc_freeqhs = sqh->next; 2135 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2136 sqh->next = NULL; 2137 return (sqh); 2138 } 2139 2140 void 2141 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2142 { 2143 sqh->next = sc->sc_freeqhs; 2144 sc->sc_freeqhs = sqh; 2145 } 2146 2147 ehci_soft_qtd_t * 2148 ehci_alloc_sqtd(ehci_softc_t *sc) 2149 { 2150 ehci_soft_qtd_t *sqtd; 2151 usbd_status err; 2152 int i, offs; 2153 usb_dma_t dma; 2154 int s; 2155 2156 if (sc->sc_freeqtds == NULL) { 2157 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2158 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2159 EHCI_PAGE_SIZE, &dma); 2160 #ifdef EHCI_DEBUG 2161 if (err) 2162 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2163 #endif 2164 if (err) 2165 return (NULL); 2166 s = splusb(); 2167 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2168 offs = i * EHCI_SQTD_SIZE; 2169 sqtd = KERNADDR(&dma, offs); 2170 sqtd->physaddr = DMAADDR(&dma, offs); 2171 sqtd->nextqtd = sc->sc_freeqtds; 2172 sc->sc_freeqtds = sqtd; 2173 } 2174 splx(s); 2175 } 2176 2177 s = splusb(); 2178 sqtd = sc->sc_freeqtds; 2179 sc->sc_freeqtds = sqtd->nextqtd; 2180 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2181 sqtd->nextqtd = NULL; 2182 sqtd->xfer = NULL; 2183 splx(s); 2184 2185 return (sqtd); 2186 } 2187 2188 void 2189 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2190 { 2191 int s; 2192 2193 s = splusb(); 2194 sqtd->nextqtd = sc->sc_freeqtds; 2195 sc->sc_freeqtds = sqtd; 2196 splx(s); 2197 } 2198 2199 usbd_status 2200 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2201 int alen, int rd, usbd_xfer_handle xfer, 2202 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2203 { 2204 ehci_soft_qtd_t *next, *cur; 2205 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2206 u_int32_t qtdstatus; 2207 int len, curlen, mps; 2208 int i, tog; 2209 usb_dma_t *dma = &xfer->dmabuf; 2210 2211 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2212 2213 len = alen; 2214 dataphys = DMAADDR(dma, 0); 2215 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2216 #if 0 2217 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2218 epipe->nexttoggle); 2219 #endif 2220 qtdstatus = EHCI_QTD_ACTIVE | 2221 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2222 EHCI_QTD_SET_CERR(3) 2223 /* IOC set below */ 2224 /* BYTES set below */ 2225 ; 2226 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2227 tog = epipe->nexttoggle; 2228 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2229 2230 cur = ehci_alloc_sqtd(sc); 2231 *sp = cur; 2232 if (cur == NULL) 2233 goto nomem; 2234 for (;;) { 2235 dataphyspage = EHCI_PAGE(dataphys); 2236 /* The EHCI hardware can handle at most 5 pages. */ 2237 if (dataphyslastpage - dataphyspage < 2238 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2239 /* we can handle it in this QTD */ 2240 curlen = len; 2241 } else { 2242 /* must use multiple TDs, fill as much as possible. */ 2243 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2244 EHCI_PAGE_OFFSET(dataphys); 2245 #ifdef DIAGNOSTIC 2246 if (curlen > len) { 2247 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2248 "len=0x%x offs=0x%x\n", curlen, len, 2249 EHCI_PAGE_OFFSET(dataphys)); 2250 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2251 dataphyslastpage, dataphyspage, 2252 dataphys); 2253 curlen = len; 2254 } 2255 #endif 2256 /* the length must be a multiple of the max size */ 2257 curlen -= curlen % mps; 2258 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2259 "curlen=%d\n", curlen)); 2260 #ifdef DIAGNOSTIC 2261 if (curlen == 0) 2262 panic("ehci_alloc_std: curlen == 0"); 2263 #endif 2264 } 2265 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2266 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2267 dataphys, dataphyslastpage, 2268 len, curlen)); 2269 len -= curlen; 2270 2271 if (len != 0) { 2272 next = ehci_alloc_sqtd(sc); 2273 if (next == NULL) 2274 goto nomem; 2275 nextphys = htole32(next->physaddr); 2276 } else { 2277 next = NULL; 2278 nextphys = EHCI_NULL; 2279 } 2280 2281 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2282 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2283 if (i != 0) /* use offset only in first buffer */ 2284 a = EHCI_PAGE(a); 2285 cur->qtd.qtd_buffer[i] = htole32(a); 2286 cur->qtd.qtd_buffer_hi[i] = 0; 2287 #ifdef DIAGNOSTIC 2288 if (i >= EHCI_QTD_NBUFFERS) { 2289 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2290 goto nomem; 2291 } 2292 #endif 2293 } 2294 cur->nextqtd = next; 2295 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2296 cur->qtd.qtd_status = 2297 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2298 cur->xfer = xfer; 2299 cur->len = curlen; 2300 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2301 dataphys, dataphys + curlen)); 2302 /* adjust the toggle based on the number of packets in this 2303 qtd */ 2304 if (((curlen + mps - 1) / mps) & 1) { 2305 tog ^= 1; 2306 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2307 } 2308 if (len == 0) 2309 break; 2310 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2311 dataphys += curlen; 2312 cur = next; 2313 } 2314 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2315 *ep = cur; 2316 epipe->nexttoggle = tog; 2317 2318 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2319 *sp, *ep)); 2320 2321 return (USBD_NORMAL_COMPLETION); 2322 2323 nomem: 2324 /* XXX free chain */ 2325 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2326 return (USBD_NOMEM); 2327 } 2328 2329 Static void 2330 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2331 ehci_soft_qtd_t *sqtdend) 2332 { 2333 ehci_soft_qtd_t *p; 2334 int i; 2335 2336 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2337 sqtd, sqtdend)); 2338 2339 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2340 p = sqtd->nextqtd; 2341 ehci_free_sqtd(sc, sqtd); 2342 } 2343 } 2344 2345 /****************/ 2346 2347 /* 2348 * Close a reqular pipe. 2349 * Assumes that there are no pending transactions. 2350 */ 2351 void 2352 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2353 { 2354 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2355 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2356 ehci_soft_qh_t *sqh = epipe->sqh; 2357 int s; 2358 2359 s = splusb(); 2360 ehci_rem_qh(sc, sqh, head); 2361 splx(s); 2362 ehci_free_sqh(sc, epipe->sqh); 2363 } 2364 2365 /* 2366 * Abort a device request. 2367 * If this routine is called at splusb() it guarantees that the request 2368 * will be removed from the hardware scheduling and that the callback 2369 * for it will be called with USBD_CANCELLED status. 2370 * It's impossible to guarantee that the requested transfer will not 2371 * have happened since the hardware runs concurrently. 2372 * If the transaction has already happened we rely on the ordinary 2373 * interrupt processing to process it. 2374 * XXX This is most probably wrong. 2375 */ 2376 void 2377 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2378 { 2379 #define exfer EXFER(xfer) 2380 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2381 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2382 ehci_soft_qh_t *sqh = epipe->sqh; 2383 ehci_soft_qtd_t *sqtd; 2384 ehci_physaddr_t cur; 2385 u_int32_t qhstatus; 2386 int s; 2387 int hit; 2388 2389 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2390 2391 if (sc->sc_dying) { 2392 /* If we're dying, just do the software part. */ 2393 s = splusb(); 2394 xfer->status = status; /* make software ignore it */ 2395 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2396 usb_transfer_complete(xfer); 2397 splx(s); 2398 return; 2399 } 2400 2401 if (xfer->device->bus->intr_context || !curproc) 2402 panic("ehci_abort_xfer: not in process context"); 2403 2404 /* 2405 * Step 1: Make interrupt routine and hardware ignore xfer. 2406 */ 2407 s = splusb(); 2408 xfer->status = status; /* make software ignore it */ 2409 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2410 qhstatus = sqh->qh.qh_qtd.qtd_status; 2411 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2412 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2413 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2414 if (sqtd == exfer->sqtdend) 2415 break; 2416 } 2417 splx(s); 2418 2419 /* 2420 * Step 2: Wait until we know hardware has finished any possible 2421 * use of the xfer. Also make sure the soft interrupt routine 2422 * has run. 2423 */ 2424 ehci_sync_hc(sc); 2425 s = splusb(); 2426 #ifdef USB_USE_SOFTINTR 2427 sc->sc_softwake = 1; 2428 #endif /* USB_USE_SOFTINTR */ 2429 usb_schedsoftintr(&sc->sc_bus); 2430 #ifdef USB_USE_SOFTINTR 2431 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2432 #endif /* USB_USE_SOFTINTR */ 2433 splx(s); 2434 2435 /* 2436 * Step 3: Remove any vestiges of the xfer from the hardware. 2437 * The complication here is that the hardware may have executed 2438 * beyond the xfer we're trying to abort. So as we're scanning 2439 * the TDs of this xfer we check if the hardware points to 2440 * any of them. 2441 */ 2442 s = splusb(); /* XXX why? */ 2443 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2444 hit = 0; 2445 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2446 hit |= cur == sqtd->physaddr; 2447 if (sqtd == exfer->sqtdend) 2448 break; 2449 } 2450 sqtd = sqtd->nextqtd; 2451 /* Zap curqtd register if hardware pointed inside the xfer. */ 2452 if (hit && sqtd != NULL) { 2453 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2454 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2455 sqh->qh.qh_qtd.qtd_status = qhstatus; 2456 } else { 2457 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2458 } 2459 2460 /* 2461 * Step 4: Execute callback. 2462 */ 2463 #ifdef DIAGNOSTIC 2464 exfer->isdone = 1; 2465 #endif 2466 usb_transfer_complete(xfer); 2467 2468 splx(s); 2469 #undef exfer 2470 } 2471 2472 void 2473 ehci_timeout(void *addr) 2474 { 2475 struct ehci_xfer *exfer = addr; 2476 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2477 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2478 2479 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2480 #ifdef USB_DEBUG 2481 if (ehcidebug > 1) 2482 usbd_dump_pipe(exfer->xfer.pipe); 2483 #endif 2484 2485 if (sc->sc_dying) { 2486 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2487 return; 2488 } 2489 2490 /* Execute the abort in a process context. */ 2491 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2492 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2493 } 2494 2495 void 2496 ehci_timeout_task(void *addr) 2497 { 2498 usbd_xfer_handle xfer = addr; 2499 int s; 2500 2501 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2502 2503 s = splusb(); 2504 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2505 splx(s); 2506 } 2507 2508 /************************/ 2509 2510 Static usbd_status 2511 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2512 { 2513 usbd_status err; 2514 2515 /* Insert last in queue. */ 2516 err = usb_insert_transfer(xfer); 2517 if (err) 2518 return (err); 2519 2520 /* Pipe isn't running, start first */ 2521 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2522 } 2523 2524 Static usbd_status 2525 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2526 { 2527 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2528 usbd_status err; 2529 2530 if (sc->sc_dying) 2531 return (USBD_IOERROR); 2532 2533 #ifdef DIAGNOSTIC 2534 if (!(xfer->rqflags & URQ_REQUEST)) { 2535 /* XXX panic */ 2536 printf("ehci_device_ctrl_transfer: not a request\n"); 2537 return (USBD_INVAL); 2538 } 2539 #endif 2540 2541 err = ehci_device_request(xfer); 2542 if (err) 2543 return (err); 2544 2545 if (sc->sc_bus.use_polling) 2546 ehci_waitintr(sc, xfer); 2547 return (USBD_IN_PROGRESS); 2548 } 2549 2550 void 2551 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2552 { 2553 struct ehci_xfer *ex = EXFER(xfer); 2554 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2555 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2556 2557 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2558 2559 #ifdef DIAGNOSTIC 2560 if (!(xfer->rqflags & URQ_REQUEST)) { 2561 panic("ehci_ctrl_done: not a request"); 2562 } 2563 #endif 2564 2565 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2566 ehci_del_intr_list(ex); /* remove from active list */ 2567 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2568 } 2569 2570 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2571 } 2572 2573 /* Abort a device control request. */ 2574 Static void 2575 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2576 { 2577 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2578 ehci_abort_xfer(xfer, USBD_CANCELLED); 2579 } 2580 2581 /* Close a device control pipe. */ 2582 Static void 2583 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2584 { 2585 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2586 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2587 2588 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2589 ehci_close_pipe(pipe, sc->sc_async_head); 2590 } 2591 2592 usbd_status 2593 ehci_device_request(usbd_xfer_handle xfer) 2594 { 2595 #define exfer EXFER(xfer) 2596 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2597 usb_device_request_t *req = &xfer->request; 2598 usbd_device_handle dev = epipe->pipe.device; 2599 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2600 int addr = dev->address; 2601 ehci_soft_qtd_t *setup, *stat, *next; 2602 ehci_soft_qh_t *sqh; 2603 int isread; 2604 int len; 2605 usbd_status err; 2606 int s; 2607 2608 isread = req->bmRequestType & UT_READ; 2609 len = UGETW(req->wLength); 2610 2611 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2612 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2613 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2614 UGETW(req->wIndex), len, addr, 2615 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2616 2617 setup = ehci_alloc_sqtd(sc); 2618 if (setup == NULL) { 2619 err = USBD_NOMEM; 2620 goto bad1; 2621 } 2622 stat = ehci_alloc_sqtd(sc); 2623 if (stat == NULL) { 2624 err = USBD_NOMEM; 2625 goto bad2; 2626 } 2627 2628 sqh = epipe->sqh; 2629 epipe->u.ctl.length = len; 2630 2631 /* Update device address and length since they may have changed 2632 during the setup of the control pipe in usbd_new_device(). */ 2633 /* XXX This only needs to be done once, but it's too early in open. */ 2634 /* XXXX Should not touch ED here! */ 2635 sqh->qh.qh_endp = 2636 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2637 htole32( 2638 EHCI_QH_SET_ADDR(addr) | 2639 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2640 ); 2641 2642 /* Set up data transaction */ 2643 if (len != 0) { 2644 ehci_soft_qtd_t *end; 2645 2646 /* Start toggle at 1. */ 2647 epipe->nexttoggle = 1; 2648 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2649 &next, &end); 2650 if (err) 2651 goto bad3; 2652 end->nextqtd = stat; 2653 end->qtd.qtd_next = 2654 end->qtd.qtd_altnext = htole32(stat->physaddr); 2655 } else { 2656 next = stat; 2657 } 2658 2659 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2660 2661 /* Clear toggle */ 2662 setup->qtd.qtd_status = htole32( 2663 EHCI_QTD_ACTIVE | 2664 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2665 EHCI_QTD_SET_CERR(3) | 2666 EHCI_QTD_SET_TOGGLE(0) | 2667 EHCI_QTD_SET_BYTES(sizeof *req) 2668 ); 2669 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2670 setup->qtd.qtd_buffer_hi[0] = 0; 2671 setup->nextqtd = next; 2672 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2673 setup->xfer = xfer; 2674 setup->len = sizeof *req; 2675 2676 stat->qtd.qtd_status = htole32( 2677 EHCI_QTD_ACTIVE | 2678 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2679 EHCI_QTD_SET_CERR(3) | 2680 EHCI_QTD_SET_TOGGLE(1) | 2681 EHCI_QTD_IOC 2682 ); 2683 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2684 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2685 stat->nextqtd = NULL; 2686 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2687 stat->xfer = xfer; 2688 stat->len = 0; 2689 2690 #ifdef EHCI_DEBUG 2691 if (ehcidebug > 5) { 2692 DPRINTF(("ehci_device_request:\n")); 2693 ehci_dump_sqh(sqh); 2694 ehci_dump_sqtds(setup); 2695 } 2696 #endif 2697 2698 exfer->sqtdstart = setup; 2699 exfer->sqtdend = stat; 2700 #ifdef DIAGNOSTIC 2701 if (!exfer->isdone) { 2702 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2703 } 2704 exfer->isdone = 0; 2705 #endif 2706 2707 /* Insert qTD in QH list. */ 2708 s = splusb(); 2709 ehci_set_qh_qtd(sqh, setup); 2710 if (xfer->timeout && !sc->sc_bus.use_polling) { 2711 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2712 ehci_timeout, xfer); 2713 } 2714 ehci_add_intr_list(sc, exfer); 2715 xfer->status = USBD_IN_PROGRESS; 2716 splx(s); 2717 2718 #ifdef EHCI_DEBUG 2719 if (ehcidebug > 10) { 2720 DPRINTF(("ehci_device_request: status=%x\n", 2721 EOREAD4(sc, EHCI_USBSTS))); 2722 delay(10000); 2723 ehci_dump_regs(sc); 2724 ehci_dump_sqh(sc->sc_async_head); 2725 ehci_dump_sqh(sqh); 2726 ehci_dump_sqtds(setup); 2727 } 2728 #endif 2729 2730 return (USBD_NORMAL_COMPLETION); 2731 2732 bad3: 2733 ehci_free_sqtd(sc, stat); 2734 bad2: 2735 ehci_free_sqtd(sc, setup); 2736 bad1: 2737 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2738 xfer->status = err; 2739 usb_transfer_complete(xfer); 2740 return (err); 2741 #undef exfer 2742 } 2743 2744 /************************/ 2745 2746 Static usbd_status 2747 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2748 { 2749 usbd_status err; 2750 2751 /* Insert last in queue. */ 2752 err = usb_insert_transfer(xfer); 2753 if (err) 2754 return (err); 2755 2756 /* Pipe isn't running, start first */ 2757 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2758 } 2759 2760 usbd_status 2761 ehci_device_bulk_start(usbd_xfer_handle xfer) 2762 { 2763 #define exfer EXFER(xfer) 2764 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2765 usbd_device_handle dev = epipe->pipe.device; 2766 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2767 ehci_soft_qtd_t *data, *dataend; 2768 ehci_soft_qh_t *sqh; 2769 usbd_status err; 2770 int len, isread, endpt; 2771 int s; 2772 2773 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2774 xfer, xfer->length, xfer->flags)); 2775 2776 if (sc->sc_dying) 2777 return (USBD_IOERROR); 2778 2779 #ifdef DIAGNOSTIC 2780 if (xfer->rqflags & URQ_REQUEST) 2781 panic("ehci_device_bulk_start: a request"); 2782 #endif 2783 2784 len = xfer->length; 2785 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2786 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2787 sqh = epipe->sqh; 2788 2789 epipe->u.bulk.length = len; 2790 2791 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2792 &dataend); 2793 if (err) { 2794 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2795 xfer->status = err; 2796 usb_transfer_complete(xfer); 2797 return (err); 2798 } 2799 2800 #ifdef EHCI_DEBUG 2801 if (ehcidebug > 5) { 2802 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2803 ehci_dump_sqh(sqh); 2804 ehci_dump_sqtds(data); 2805 } 2806 #endif 2807 2808 /* Set up interrupt info. */ 2809 exfer->sqtdstart = data; 2810 exfer->sqtdend = dataend; 2811 #ifdef DIAGNOSTIC 2812 if (!exfer->isdone) { 2813 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2814 } 2815 exfer->isdone = 0; 2816 #endif 2817 2818 s = splusb(); 2819 ehci_set_qh_qtd(sqh, data); 2820 if (xfer->timeout && !sc->sc_bus.use_polling) { 2821 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2822 ehci_timeout, xfer); 2823 } 2824 ehci_add_intr_list(sc, exfer); 2825 xfer->status = USBD_IN_PROGRESS; 2826 splx(s); 2827 2828 #ifdef EHCI_DEBUG 2829 if (ehcidebug > 10) { 2830 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2831 delay(10000); 2832 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2833 ehci_dump_regs(sc); 2834 #if 0 2835 printf("async_head:\n"); 2836 ehci_dump_sqh(sc->sc_async_head); 2837 #endif 2838 printf("sqh:\n"); 2839 ehci_dump_sqh(sqh); 2840 ehci_dump_sqtds(data); 2841 } 2842 #endif 2843 2844 if (sc->sc_bus.use_polling) 2845 ehci_waitintr(sc, xfer); 2846 2847 return (USBD_IN_PROGRESS); 2848 #undef exfer 2849 } 2850 2851 Static void 2852 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2853 { 2854 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2855 ehci_abort_xfer(xfer, USBD_CANCELLED); 2856 } 2857 2858 /* 2859 * Close a device bulk pipe. 2860 */ 2861 Static void 2862 ehci_device_bulk_close(usbd_pipe_handle pipe) 2863 { 2864 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2865 2866 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2867 ehci_close_pipe(pipe, sc->sc_async_head); 2868 } 2869 2870 void 2871 ehci_device_bulk_done(usbd_xfer_handle xfer) 2872 { 2873 struct ehci_xfer *ex = EXFER(xfer); 2874 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2875 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2876 2877 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2878 xfer, xfer->actlen)); 2879 2880 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2881 ehci_del_intr_list(ex); /* remove from active list */ 2882 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2883 } 2884 2885 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2886 } 2887 2888 /************************/ 2889 2890 Static usbd_status 2891 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2892 { 2893 struct ehci_soft_islot *isp; 2894 int islot, lev; 2895 2896 /* Find a poll rate that is large enough. */ 2897 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2898 if (EHCI_ILEV_IVAL(lev) <= ival) 2899 break; 2900 2901 /* Pick an interrupt slot at the right level. */ 2902 /* XXX could do better than picking at random */ 2903 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2904 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2905 2906 sqh->islot = islot; 2907 isp = &sc->sc_islots[islot]; 2908 ehci_add_qh(sqh, isp->sqh); 2909 2910 return (USBD_NORMAL_COMPLETION); 2911 } 2912 2913 Static usbd_status 2914 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2915 { 2916 usbd_status err; 2917 2918 /* Insert last in queue. */ 2919 err = usb_insert_transfer(xfer); 2920 if (err) 2921 return (err); 2922 2923 /* 2924 * Pipe isn't running (otherwise err would be USBD_INPROG), 2925 * so start it first. 2926 */ 2927 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2928 } 2929 2930 Static usbd_status 2931 ehci_device_intr_start(usbd_xfer_handle xfer) 2932 { 2933 #define exfer EXFER(xfer) 2934 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2935 usbd_device_handle dev = xfer->pipe->device; 2936 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2937 ehci_soft_qtd_t *data, *dataend; 2938 ehci_soft_qh_t *sqh; 2939 usbd_status err; 2940 int len, isread, endpt; 2941 int s; 2942 2943 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 2944 xfer, xfer->length, xfer->flags)); 2945 2946 if (sc->sc_dying) 2947 return (USBD_IOERROR); 2948 2949 #ifdef DIAGNOSTIC 2950 if (xfer->rqflags & URQ_REQUEST) 2951 panic("ehci_device_intr_start: a request"); 2952 #endif 2953 2954 len = xfer->length; 2955 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2956 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2957 sqh = epipe->sqh; 2958 2959 epipe->u.intr.length = len; 2960 2961 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2962 &dataend); 2963 if (err) { 2964 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 2965 xfer->status = err; 2966 usb_transfer_complete(xfer); 2967 return (err); 2968 } 2969 2970 #ifdef EHCI_DEBUG 2971 if (ehcidebug > 5) { 2972 DPRINTF(("ehci_device_intr_start: data(1)\n")); 2973 ehci_dump_sqh(sqh); 2974 ehci_dump_sqtds(data); 2975 } 2976 #endif 2977 2978 /* Set up interrupt info. */ 2979 exfer->sqtdstart = data; 2980 exfer->sqtdend = dataend; 2981 #ifdef DIAGNOSTIC 2982 if (!exfer->isdone) { 2983 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 2984 } 2985 exfer->isdone = 0; 2986 #endif 2987 2988 s = splusb(); 2989 ehci_set_qh_qtd(sqh, data); 2990 if (xfer->timeout && !sc->sc_bus.use_polling) { 2991 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2992 ehci_timeout, xfer); 2993 } 2994 ehci_add_intr_list(sc, exfer); 2995 xfer->status = USBD_IN_PROGRESS; 2996 splx(s); 2997 2998 #ifdef EHCI_DEBUG 2999 if (ehcidebug > 10) { 3000 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3001 delay(10000); 3002 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3003 ehci_dump_regs(sc); 3004 printf("sqh:\n"); 3005 ehci_dump_sqh(sqh); 3006 ehci_dump_sqtds(data); 3007 } 3008 #endif 3009 3010 if (sc->sc_bus.use_polling) 3011 ehci_waitintr(sc, xfer); 3012 3013 return (USBD_IN_PROGRESS); 3014 #undef exfer 3015 } 3016 3017 Static void 3018 ehci_device_intr_abort(usbd_xfer_handle xfer) 3019 { 3020 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3021 if (xfer->pipe->intrxfer == xfer) { 3022 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3023 xfer->pipe->intrxfer = NULL; 3024 } 3025 ehci_abort_xfer(xfer, USBD_CANCELLED); 3026 } 3027 3028 Static void 3029 ehci_device_intr_close(usbd_pipe_handle pipe) 3030 { 3031 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3032 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3033 struct ehci_soft_islot *isp; 3034 3035 isp = &sc->sc_islots[epipe->sqh->islot]; 3036 ehci_close_pipe(pipe, isp->sqh); 3037 } 3038 3039 Static void 3040 ehci_device_intr_done(usbd_xfer_handle xfer) 3041 { 3042 #define exfer EXFER(xfer) 3043 struct ehci_xfer *ex = EXFER(xfer); 3044 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3045 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3046 ehci_soft_qtd_t *data, *dataend; 3047 ehci_soft_qh_t *sqh; 3048 usbd_status err; 3049 int len, isread, endpt, s; 3050 3051 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3052 xfer, xfer->actlen)); 3053 3054 if (xfer->pipe->repeat) { 3055 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3056 3057 len = epipe->u.intr.length; 3058 xfer->length = len; 3059 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3060 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3061 sqh = epipe->sqh; 3062 3063 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3064 &data, &dataend); 3065 if (err) { 3066 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3067 xfer->status = err; 3068 return; 3069 } 3070 3071 /* Set up interrupt info. */ 3072 exfer->sqtdstart = data; 3073 exfer->sqtdend = dataend; 3074 #ifdef DIAGNOSTIC 3075 if (!exfer->isdone) { 3076 printf("ehci_device_intr_done: not done, ex=%p\n", 3077 exfer); 3078 } 3079 exfer->isdone = 0; 3080 #endif 3081 3082 s = splusb(); 3083 ehci_set_qh_qtd(sqh, data); 3084 if (xfer->timeout && !sc->sc_bus.use_polling) { 3085 usb_callout(xfer->timeout_handle, 3086 mstohz(xfer->timeout), ehci_timeout, xfer); 3087 } 3088 splx(s); 3089 3090 xfer->status = USBD_IN_PROGRESS; 3091 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3092 ehci_del_intr_list(ex); /* remove from active list */ 3093 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3094 } 3095 #undef exfer 3096 } 3097 3098 /************************/ 3099 3100 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3101 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3102 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3103 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3104 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3105
Indexes created Mon Sep 22 13:09:51 GMT 2025