ehci.c revision 1.82
1 /* $NetBSD: ehci.c,v 1.82 2004/10/24 22:07:04 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.82 2004/10/24 22:07:04 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 usbd_status 316 ehci_init(ehci_softc_t *sc) 317 { 318 u_int32_t version, sparams, cparams, hcr; 319 u_int i; 320 usbd_status err; 321 ehci_soft_qh_t *sqh; 322 323 DPRINTF(("ehci_init: start\n")); 324 #ifdef EHCI_DEBUG 325 theehci = sc; 326 #endif 327 328 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 329 330 version = EREAD2(sc, EHCI_HCIVERSION); 331 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 332 version >> 8, version & 0xff); 333 334 sparams = EREAD4(sc, EHCI_HCSPARAMS); 335 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 336 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 337 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 338 aprint_error("%s: wrong number of companions (%d != %d)\n", 339 USBDEVNAME(sc->sc_bus.bdev), 340 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 341 #if NOHCI == 0 || NUHCI == 0 342 aprint_error("%s: ohci or uhci probably not configured\n", 343 USBDEVNAME(sc->sc_bus.bdev)); 344 #endif 345 return (USBD_IOERROR); 346 } 347 if (sc->sc_ncomp > 0) { 348 aprint_normal("%s: companion controller%s, %d port%s each:", 349 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 350 EHCI_HCS_N_PCC(sparams), 351 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 352 for (i = 0; i < sc->sc_ncomp; i++) 353 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 354 aprint_normal("\n"); 355 } 356 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 357 cparams = EREAD4(sc, EHCI_HCCPARAMS); 358 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 359 360 if (EHCI_HCC_64BIT(cparams)) { 361 /* MUST clear segment register if 64 bit capable. */ 362 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 363 } 364 365 sc->sc_bus.usbrev = USBREV_2_0; 366 367 /* Reset the controller */ 368 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 369 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 370 usb_delay_ms(&sc->sc_bus, 1); 371 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 372 for (i = 0; i < 100; i++) { 373 usb_delay_ms(&sc->sc_bus, 1); 374 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 375 if (!hcr) 376 break; 377 } 378 if (hcr) { 379 aprint_error("%s: reset timeout\n", 380 USBDEVNAME(sc->sc_bus.bdev)); 381 return (USBD_IOERROR); 382 } 383 384 /* XXX need proper intr scheduling */ 385 sc->sc_rand = 96; 386 387 /* frame list size at default, read back what we got and use that */ 388 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 389 case 0: sc->sc_flsize = 1024; break; 390 case 1: sc->sc_flsize = 512; break; 391 case 2: sc->sc_flsize = 256; break; 392 case 3: return (USBD_IOERROR); 393 } 394 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 395 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 396 if (err) 397 return (err); 398 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 399 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 400 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 401 402 /* Set up the bus struct. */ 403 sc->sc_bus.methods = &ehci_bus_methods; 404 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 405 406 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 407 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 408 409 sc->sc_eintrs = EHCI_NORMAL_INTRS; 410 411 /* 412 * Allocate the interrupt dummy QHs. These are arranged to give poll 413 * intervals that are powers of 2 times 1ms. 414 */ 415 for (i = 0; i < EHCI_INTRQHS; i++) { 416 sqh = ehci_alloc_sqh(sc); 417 if (sqh == NULL) { 418 err = USBD_NOMEM; 419 goto bad1; 420 } 421 sc->sc_islots[i].sqh = sqh; 422 } 423 for (i = 0; i < EHCI_INTRQHS; i++) { 424 sqh = sc->sc_islots[i].sqh; 425 if (i == 0) { 426 /* The last (1ms) QH terminates. */ 427 sqh->qh.qh_link = EHCI_NULL; 428 sqh->next = NULL; 429 } else { 430 /* Otherwise the next QH has half the poll interval */ 431 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 432 sqh->qh.qh_link = htole32(sqh->next->physaddr | 433 EHCI_LINK_QH); 434 } 435 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 436 sqh->qh.qh_link = EHCI_NULL; 437 sqh->qh.qh_curqtd = EHCI_NULL; 438 sqh->next = NULL; 439 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 440 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 441 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 442 sqh->sqtd = NULL; 443 } 444 /* Point the frame list at the last level (128ms). */ 445 for (i = 0; i < sc->sc_flsize; i++) { 446 sc->sc_flist[i] = htole32(EHCI_LINK_QH | 447 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 448 i)].sqh->physaddr); 449 } 450 451 /* Allocate dummy QH that starts the async list. */ 452 sqh = ehci_alloc_sqh(sc); 453 if (sqh == NULL) { 454 err = USBD_NOMEM; 455 goto bad1; 456 } 457 /* Fill the QH */ 458 sqh->qh.qh_endp = 459 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 460 sqh->qh.qh_link = 461 htole32(sqh->physaddr | EHCI_LINK_QH); 462 sqh->qh.qh_curqtd = EHCI_NULL; 463 sqh->next = NULL; 464 /* Fill the overlay qTD */ 465 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 466 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 467 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 468 sqh->sqtd = NULL; 469 #ifdef EHCI_DEBUG 470 if (ehcidebug) { 471 ehci_dump_sqh(sqh); 472 } 473 #endif 474 475 /* Point to async list */ 476 sc->sc_async_head = sqh; 477 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 478 479 usb_callout_init(sc->sc_tmo_pcd); 480 481 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 482 483 /* Enable interrupts */ 484 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 485 486 /* Turn on controller */ 487 EOWRITE4(sc, EHCI_USBCMD, 488 EHCI_CMD_ITC_8 | /* 8 microframes */ 489 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 490 EHCI_CMD_ASE | 491 EHCI_CMD_PSE | 492 EHCI_CMD_RS); 493 494 /* Take over port ownership */ 495 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 496 497 for (i = 0; i < 100; i++) { 498 usb_delay_ms(&sc->sc_bus, 1); 499 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 500 if (!hcr) 501 break; 502 } 503 if (hcr) { 504 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 505 return (USBD_IOERROR); 506 } 507 508 return (USBD_NORMAL_COMPLETION); 509 510 #if 0 511 bad2: 512 ehci_free_sqh(sc, sc->sc_async_head); 513 #endif 514 bad1: 515 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 516 return (err); 517 } 518 519 int 520 ehci_intr(void *v) 521 { 522 ehci_softc_t *sc = v; 523 524 if (sc == NULL || sc->sc_dying) 525 return (0); 526 527 /* If we get an interrupt while polling, then just ignore it. */ 528 if (sc->sc_bus.use_polling) { 529 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 530 531 if (intrs) 532 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 533 #ifdef DIAGNOSTIC 534 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 535 #endif 536 return (0); 537 } 538 539 return (ehci_intr1(sc)); 540 } 541 542 Static int 543 ehci_intr1(ehci_softc_t *sc) 544 { 545 u_int32_t intrs, eintrs; 546 547 DPRINTFN(20,("ehci_intr1: enter\n")); 548 549 /* In case the interrupt occurs before initialization has completed. */ 550 if (sc == NULL) { 551 #ifdef DIAGNOSTIC 552 printf("ehci_intr1: sc == NULL\n"); 553 #endif 554 return (0); 555 } 556 557 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 558 if (!intrs) 559 return (0); 560 561 eintrs = intrs & sc->sc_eintrs; 562 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 563 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 564 (u_int)eintrs)); 565 if (!eintrs) 566 return (0); 567 568 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 569 sc->sc_bus.intr_context++; 570 sc->sc_bus.no_intrs++; 571 if (eintrs & EHCI_STS_IAA) { 572 DPRINTF(("ehci_intr1: door bell\n")); 573 wakeup(&sc->sc_async_head); 574 eintrs &= ~EHCI_STS_IAA; 575 } 576 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 577 DPRINTFN(5,("ehci_intr1: %s %s\n", 578 eintrs & EHCI_STS_INT ? "INT" : "", 579 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 580 usb_schedsoftintr(&sc->sc_bus); 581 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 582 } 583 if (eintrs & EHCI_STS_HSE) { 584 printf("%s: unrecoverable error, controller halted\n", 585 USBDEVNAME(sc->sc_bus.bdev)); 586 /* XXX what else */ 587 } 588 if (eintrs & EHCI_STS_PCD) { 589 ehci_pcd(sc, sc->sc_intrxfer); 590 /* 591 * Disable PCD interrupt for now, because it will be 592 * on until the port has been reset. 593 */ 594 ehci_pcd_able(sc, 0); 595 /* Do not allow RHSC interrupts > 1 per second */ 596 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 597 eintrs &= ~EHCI_STS_PCD; 598 } 599 600 sc->sc_bus.intr_context--; 601 602 if (eintrs != 0) { 603 /* Block unprocessed interrupts. */ 604 sc->sc_eintrs &= ~eintrs; 605 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 606 printf("%s: blocking intrs 0x%x\n", 607 USBDEVNAME(sc->sc_bus.bdev), eintrs); 608 } 609 610 return (1); 611 } 612 613 void 614 ehci_pcd_able(ehci_softc_t *sc, int on) 615 { 616 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 617 if (on) 618 sc->sc_eintrs |= EHCI_STS_PCD; 619 else 620 sc->sc_eintrs &= ~EHCI_STS_PCD; 621 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 622 } 623 624 void 625 ehci_pcd_enable(void *v_sc) 626 { 627 ehci_softc_t *sc = v_sc; 628 629 ehci_pcd_able(sc, 1); 630 } 631 632 void 633 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 634 { 635 usbd_pipe_handle pipe; 636 u_char *p; 637 int i, m; 638 639 if (xfer == NULL) { 640 /* Just ignore the change. */ 641 return; 642 } 643 644 pipe = xfer->pipe; 645 646 p = KERNADDR(&xfer->dmabuf, 0); 647 m = min(sc->sc_noport, xfer->length * 8 - 1); 648 memset(p, 0, xfer->length); 649 for (i = 1; i <= m; i++) { 650 /* Pick out CHANGE bits from the status reg. */ 651 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 652 p[i/8] |= 1 << (i%8); 653 } 654 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 655 xfer->actlen = xfer->length; 656 xfer->status = USBD_NORMAL_COMPLETION; 657 658 usb_transfer_complete(xfer); 659 } 660 661 void 662 ehci_softintr(void *v) 663 { 664 ehci_softc_t *sc = v; 665 struct ehci_xfer *ex, *nextex; 666 667 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 668 sc->sc_bus.intr_context)); 669 670 sc->sc_bus.intr_context++; 671 672 /* 673 * The only explanation I can think of for why EHCI is as brain dead 674 * as UHCI interrupt-wise is that Intel was involved in both. 675 * An interrupt just tells us that something is done, we have no 676 * clue what, so we need to scan through all active transfers. :-( 677 */ 678 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 679 nextex = LIST_NEXT(ex, inext); 680 ehci_check_intr(sc, ex); 681 } 682 683 #ifdef USB_USE_SOFTINTR 684 if (sc->sc_softwake) { 685 sc->sc_softwake = 0; 686 wakeup(&sc->sc_softwake); 687 } 688 #endif /* USB_USE_SOFTINTR */ 689 690 sc->sc_bus.intr_context--; 691 } 692 693 /* Check for an interrupt. */ 694 void 695 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 696 { 697 ehci_soft_qtd_t *sqtd, *lsqtd; 698 u_int32_t status; 699 700 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 701 702 if (ex->sqtdstart == NULL) { 703 printf("ehci_check_intr: sqtdstart=NULL\n"); 704 return; 705 } 706 lsqtd = ex->sqtdend; 707 #ifdef DIAGNOSTIC 708 if (lsqtd == NULL) { 709 printf("ehci_check_intr: sqtd==0\n"); 710 return; 711 } 712 #endif 713 /* 714 * If the last TD is still active we need to check whether there 715 * is a an error somewhere in the middle, or whether there was a 716 * short packet (SPD and not ACTIVE). 717 */ 718 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 719 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 720 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 721 status = le32toh(sqtd->qtd.qtd_status); 722 /* If there's an active QTD the xfer isn't done. */ 723 if (status & EHCI_QTD_ACTIVE) 724 break; 725 /* Any kind of error makes the xfer done. */ 726 if (status & EHCI_QTD_HALTED) 727 goto done; 728 /* We want short packets, and it is short: it's done */ 729 if (EHCI_QTD_GET_BYTES(status) != 0) 730 goto done; 731 } 732 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 733 ex, ex->sqtdstart)); 734 return; 735 } 736 done: 737 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 738 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 739 ehci_idone(ex); 740 } 741 742 void 743 ehci_idone(struct ehci_xfer *ex) 744 { 745 usbd_xfer_handle xfer = &ex->xfer; 746 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 747 ehci_soft_qtd_t *sqtd, *lsqtd; 748 u_int32_t status = 0, nstatus = 0; 749 int actlen; 750 uint pkts_left; 751 752 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 753 #ifdef DIAGNOSTIC 754 { 755 int s = splhigh(); 756 if (ex->isdone) { 757 splx(s); 758 #ifdef EHCI_DEBUG 759 printf("ehci_idone: ex is done!\n "); 760 ehci_dump_exfer(ex); 761 #else 762 printf("ehci_idone: ex=%p is done!\n", ex); 763 #endif 764 return; 765 } 766 ex->isdone = 1; 767 splx(s); 768 } 769 #endif 770 771 if (xfer->status == USBD_CANCELLED || 772 xfer->status == USBD_TIMEOUT) { 773 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 774 return; 775 } 776 777 #ifdef EHCI_DEBUG 778 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 779 if (ehcidebug > 10) 780 ehci_dump_sqtds(ex->sqtdstart); 781 #endif 782 783 /* The transfer is done, compute actual length and status. */ 784 lsqtd = ex->sqtdend; 785 actlen = 0; 786 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 787 nstatus = le32toh(sqtd->qtd.qtd_status); 788 if (nstatus & EHCI_QTD_ACTIVE) 789 break; 790 791 status = nstatus; 792 /* halt is ok if descriptor is last, and complete */ 793 if (sqtd->qtd.qtd_next == EHCI_NULL && 794 EHCI_QTD_GET_BYTES(status) == 0) 795 status &= ~EHCI_QTD_HALTED; 796 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 797 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 798 } 799 800 /* If there are left over TDs we need to update the toggle. */ 801 if (sqtd != lsqtd->nextqtd && 802 xfer->pipe->device->default_pipe != xfer->pipe) { 803 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 804 #if 0 805 ehci_dump_sqh(epipe->sqh); 806 ehci_dump_sqtds(ex->sqtdstart); 807 #endif 808 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 809 } 810 811 /* 812 * For a short transfer we need to update the toggle for the missing 813 * packets within the qTD. 814 */ 815 pkts_left = EHCI_QTD_GET_BYTES(status) / 816 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 817 epipe->nexttoggle ^= pkts_left % 2; 818 819 status &= EHCI_QTD_STATERRS; 820 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 821 xfer->length, actlen, status)); 822 xfer->actlen = actlen; 823 if (status != 0) { 824 #ifdef EHCI_DEBUG 825 char sbuf[128]; 826 827 bitmask_snprintf((u_int32_t)status, 828 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 829 "\3MISSED", sbuf, sizeof(sbuf)); 830 831 DPRINTFN((status == EHCI_QTD_HALTED) ? 2 : 0, 832 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 833 "status 0x%s\n", 834 xfer->pipe->device->address, 835 xfer->pipe->endpoint->edesc->bEndpointAddress, 836 sbuf)); 837 if (ehcidebug > 2) { 838 ehci_dump_sqh(epipe->sqh); 839 ehci_dump_sqtds(ex->sqtdstart); 840 } 841 #endif 842 if (status == EHCI_QTD_HALTED) 843 xfer->status = USBD_STALLED; 844 else 845 xfer->status = USBD_IOERROR; /* more info XXX */ 846 } else { 847 xfer->status = USBD_NORMAL_COMPLETION; 848 } 849 850 usb_transfer_complete(xfer); 851 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 852 } 853 854 /* 855 * Wait here until controller claims to have an interrupt. 856 * Then call ehci_intr and return. Use timeout to avoid waiting 857 * too long. 858 */ 859 void 860 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 861 { 862 int timo = xfer->timeout; 863 int usecs; 864 u_int32_t intrs; 865 866 xfer->status = USBD_IN_PROGRESS; 867 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 868 usb_delay_ms(&sc->sc_bus, 1); 869 if (sc->sc_dying) 870 break; 871 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 872 sc->sc_eintrs; 873 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 874 #ifdef EHCI_DEBUG 875 if (ehcidebug > 15) 876 ehci_dump_regs(sc); 877 #endif 878 if (intrs) { 879 ehci_intr1(sc); 880 if (xfer->status != USBD_IN_PROGRESS) 881 return; 882 } 883 } 884 885 /* Timeout */ 886 DPRINTF(("ehci_waitintr: timeout\n")); 887 xfer->status = USBD_TIMEOUT; 888 usb_transfer_complete(xfer); 889 /* XXX should free TD */ 890 } 891 892 void 893 ehci_poll(struct usbd_bus *bus) 894 { 895 ehci_softc_t *sc = (ehci_softc_t *)bus; 896 #ifdef EHCI_DEBUG 897 static int last; 898 int new; 899 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 900 if (new != last) { 901 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 902 last = new; 903 } 904 #endif 905 906 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 907 ehci_intr1(sc); 908 } 909 910 int 911 ehci_detach(struct ehci_softc *sc, int flags) 912 { 913 int rv = 0; 914 915 if (sc->sc_child != NULL) 916 rv = config_detach(sc->sc_child, flags); 917 918 if (rv != 0) 919 return (rv); 920 921 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 922 923 if (sc->sc_powerhook != NULL) 924 powerhook_disestablish(sc->sc_powerhook); 925 if (sc->sc_shutdownhook != NULL) 926 shutdownhook_disestablish(sc->sc_shutdownhook); 927 928 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 929 930 /* XXX free other data structures XXX */ 931 932 return (rv); 933 } 934 935 936 int 937 ehci_activate(device_ptr_t self, enum devact act) 938 { 939 struct ehci_softc *sc = (struct ehci_softc *)self; 940 int rv = 0; 941 942 switch (act) { 943 case DVACT_ACTIVATE: 944 return (EOPNOTSUPP); 945 946 case DVACT_DEACTIVATE: 947 if (sc->sc_child != NULL) 948 rv = config_deactivate(sc->sc_child); 949 sc->sc_dying = 1; 950 break; 951 } 952 return (rv); 953 } 954 955 /* 956 * Handle suspend/resume. 957 * 958 * We need to switch to polling mode here, because this routine is 959 * called from an interrupt context. This is all right since we 960 * are almost suspended anyway. 961 */ 962 void 963 ehci_power(int why, void *v) 964 { 965 ehci_softc_t *sc = v; 966 u_int32_t cmd, hcr; 967 int s, i; 968 969 #ifdef EHCI_DEBUG 970 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 971 if (ehcidebug > 0) 972 ehci_dump_regs(sc); 973 #endif 974 975 s = splhardusb(); 976 switch (why) { 977 case PWR_SUSPEND: 978 case PWR_STANDBY: 979 sc->sc_bus.use_polling++; 980 981 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 982 983 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 984 EOWRITE4(sc, EHCI_USBCMD, cmd); 985 986 for (i = 0; i < 100; i++) { 987 hcr = EOREAD4(sc, EHCI_USBSTS) & 988 (EHCI_STS_ASS | EHCI_STS_PSS); 989 if (hcr == 0) 990 break; 991 992 usb_delay_ms(&sc->sc_bus, 1); 993 } 994 if (hcr != 0) { 995 printf("%s: reset timeout\n", 996 USBDEVNAME(sc->sc_bus.bdev)); 997 } 998 999 cmd &= ~EHCI_CMD_RS; 1000 EOWRITE4(sc, EHCI_USBCMD, cmd); 1001 1002 for (i = 0; i < 100; i++) { 1003 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1004 if (hcr == EHCI_STS_HCH) 1005 break; 1006 1007 usb_delay_ms(&sc->sc_bus, 1); 1008 } 1009 if (hcr != EHCI_STS_HCH) { 1010 printf("%s: config timeout\n", 1011 USBDEVNAME(sc->sc_bus.bdev)); 1012 } 1013 1014 sc->sc_bus.use_polling--; 1015 break; 1016 1017 case PWR_RESUME: 1018 sc->sc_bus.use_polling++; 1019 1020 /* restore things in case the bios sucks */ 1021 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1022 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1023 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1024 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1025 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1026 1027 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1028 1029 for (i = 0; i < 100; i++) { 1030 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1031 if (hcr != EHCI_STS_HCH) 1032 break; 1033 1034 usb_delay_ms(&sc->sc_bus, 1); 1035 } 1036 if (hcr == EHCI_STS_HCH) { 1037 printf("%s: config timeout\n", 1038 USBDEVNAME(sc->sc_bus.bdev)); 1039 } 1040 1041 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1042 1043 sc->sc_bus.use_polling--; 1044 break; 1045 case PWR_SOFTSUSPEND: 1046 case PWR_SOFTSTANDBY: 1047 case PWR_SOFTRESUME: 1048 break; 1049 } 1050 splx(s); 1051 1052 #ifdef EHCI_DEBUG 1053 DPRINTF(("ehci_power: sc=%p\n", sc)); 1054 if (ehcidebug > 0) 1055 ehci_dump_regs(sc); 1056 #endif 1057 } 1058 1059 /* 1060 * Shut down the controller when the system is going down. 1061 */ 1062 void 1063 ehci_shutdown(void *v) 1064 { 1065 ehci_softc_t *sc = v; 1066 1067 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1068 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1069 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1070 } 1071 1072 usbd_status 1073 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1074 { 1075 struct ehci_softc *sc = (struct ehci_softc *)bus; 1076 usbd_status err; 1077 1078 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1079 #ifdef EHCI_DEBUG 1080 if (err) 1081 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1082 #endif 1083 return (err); 1084 } 1085 1086 void 1087 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1088 { 1089 struct ehci_softc *sc = (struct ehci_softc *)bus; 1090 1091 usb_freemem(&sc->sc_bus, dma); 1092 } 1093 1094 usbd_xfer_handle 1095 ehci_allocx(struct usbd_bus *bus) 1096 { 1097 struct ehci_softc *sc = (struct ehci_softc *)bus; 1098 usbd_xfer_handle xfer; 1099 1100 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1101 if (xfer != NULL) { 1102 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1103 #ifdef DIAGNOSTIC 1104 if (xfer->busy_free != XFER_FREE) { 1105 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1106 xfer->busy_free); 1107 } 1108 #endif 1109 } else { 1110 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1111 } 1112 if (xfer != NULL) { 1113 memset(xfer, 0, sizeof(struct ehci_xfer)); 1114 #ifdef DIAGNOSTIC 1115 EXFER(xfer)->isdone = 1; 1116 xfer->busy_free = XFER_BUSY; 1117 #endif 1118 } 1119 return (xfer); 1120 } 1121 1122 void 1123 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1124 { 1125 struct ehci_softc *sc = (struct ehci_softc *)bus; 1126 1127 #ifdef DIAGNOSTIC 1128 if (xfer->busy_free != XFER_BUSY) { 1129 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1130 xfer->busy_free); 1131 return; 1132 } 1133 xfer->busy_free = XFER_FREE; 1134 if (!EXFER(xfer)->isdone) { 1135 printf("ehci_freex: !isdone\n"); 1136 return; 1137 } 1138 #endif 1139 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1140 } 1141 1142 Static void 1143 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1144 { 1145 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1146 1147 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1148 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1149 #ifdef USB_DEBUG 1150 if (ehcidebug) 1151 usbd_dump_pipe(pipe); 1152 #endif 1153 epipe->nexttoggle = 0; 1154 } 1155 1156 Static void 1157 ehci_noop(usbd_pipe_handle pipe) 1158 { 1159 } 1160 1161 #ifdef EHCI_DEBUG 1162 void 1163 ehci_dump_regs(ehci_softc_t *sc) 1164 { 1165 int i; 1166 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1167 EOREAD4(sc, EHCI_USBCMD), 1168 EOREAD4(sc, EHCI_USBSTS), 1169 EOREAD4(sc, EHCI_USBINTR)); 1170 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1171 EOREAD4(sc, EHCI_FRINDEX), 1172 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1173 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1174 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1175 for (i = 1; i <= sc->sc_noport; i++) 1176 printf("port %d status=0x%08x\n", i, 1177 EOREAD4(sc, EHCI_PORTSC(i))); 1178 } 1179 1180 /* 1181 * Unused function - this is meant to be called from a kernel 1182 * debugger. 1183 */ 1184 void 1185 ehci_dump() 1186 { 1187 ehci_dump_regs(theehci); 1188 } 1189 1190 void 1191 ehci_dump_link(ehci_link_t link, int type) 1192 { 1193 link = le32toh(link); 1194 printf("0x%08x", link); 1195 if (link & EHCI_LINK_TERMINATE) 1196 printf("<T>"); 1197 else { 1198 printf("<"); 1199 if (type) { 1200 switch (EHCI_LINK_TYPE(link)) { 1201 case EHCI_LINK_ITD: printf("ITD"); break; 1202 case EHCI_LINK_QH: printf("QH"); break; 1203 case EHCI_LINK_SITD: printf("SITD"); break; 1204 case EHCI_LINK_FSTN: printf("FSTN"); break; 1205 } 1206 } 1207 printf(">"); 1208 } 1209 } 1210 1211 void 1212 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1213 { 1214 int i; 1215 u_int32_t stop; 1216 1217 stop = 0; 1218 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1219 ehci_dump_sqtd(sqtd); 1220 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1221 } 1222 if (sqtd) 1223 printf("dump aborted, too many TDs\n"); 1224 } 1225 1226 void 1227 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1228 { 1229 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1230 ehci_dump_qtd(&sqtd->qtd); 1231 } 1232 1233 void 1234 ehci_dump_qtd(ehci_qtd_t *qtd) 1235 { 1236 u_int32_t s; 1237 char sbuf[128]; 1238 1239 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1240 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1241 printf("\n"); 1242 s = le32toh(qtd->qtd_status); 1243 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1244 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1245 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1246 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1247 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1248 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1249 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1250 EHCI_QTD_GET_PID(s), sbuf); 1251 for (s = 0; s < 5; s++) 1252 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1253 } 1254 1255 void 1256 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1257 { 1258 ehci_qh_t *qh = &sqh->qh; 1259 u_int32_t endp, endphub; 1260 1261 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1262 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1263 endp = le32toh(qh->qh_endp); 1264 printf(" endp=0x%08x\n", endp); 1265 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1266 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1267 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1268 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1269 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1270 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1271 EHCI_QH_GET_NRL(endp)); 1272 endphub = le32toh(qh->qh_endphub); 1273 printf(" endphub=0x%08x\n", endphub); 1274 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1275 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1276 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1277 EHCI_QH_GET_MULT(endphub)); 1278 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1279 printf("Overlay qTD:\n"); 1280 ehci_dump_qtd(&qh->qh_qtd); 1281 } 1282 1283 #ifdef DIAGNOSTIC 1284 Static void 1285 ehci_dump_exfer(struct ehci_xfer *ex) 1286 { 1287 printf("ehci_dump_exfer: ex=%p\n", ex); 1288 } 1289 #endif 1290 #endif 1291 1292 usbd_status 1293 ehci_open(usbd_pipe_handle pipe) 1294 { 1295 usbd_device_handle dev = pipe->device; 1296 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1297 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1298 u_int8_t addr = dev->address; 1299 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1300 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1301 ehci_soft_qh_t *sqh; 1302 usbd_status err; 1303 int s; 1304 int ival, speed, naks; 1305 int hshubaddr, hshubport; 1306 1307 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1308 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1309 1310 if (dev->myhsport) { 1311 hshubaddr = dev->myhsport->parent->address; 1312 hshubport = dev->myhsport->portno; 1313 } else { 1314 hshubaddr = 0; 1315 hshubport = 0; 1316 } 1317 1318 if (sc->sc_dying) 1319 return (USBD_IOERROR); 1320 1321 epipe->nexttoggle = 0; 1322 1323 if (addr == sc->sc_addr) { 1324 switch (ed->bEndpointAddress) { 1325 case USB_CONTROL_ENDPOINT: 1326 pipe->methods = &ehci_root_ctrl_methods; 1327 break; 1328 case UE_DIR_IN | EHCI_INTR_ENDPT: 1329 pipe->methods = &ehci_root_intr_methods; 1330 break; 1331 default: 1332 return (USBD_INVAL); 1333 } 1334 return (USBD_NORMAL_COMPLETION); 1335 } 1336 1337 /* XXX All this stuff is only valid for async. */ 1338 switch (dev->speed) { 1339 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1340 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1341 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1342 default: panic("ehci_open: bad device speed %d", dev->speed); 1343 } 1344 if (speed != EHCI_QH_SPEED_HIGH) { 1345 printf("%s: *** WARNING: opening low/full speed device, this " 1346 "does not work yet.\n", 1347 USBDEVNAME(sc->sc_bus.bdev)); 1348 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1349 hshubaddr, hshubport)); 1350 if (xfertype != UE_CONTROL) 1351 return USBD_INVAL; 1352 } 1353 1354 naks = 8; /* XXX */ 1355 sqh = ehci_alloc_sqh(sc); 1356 if (sqh == NULL) 1357 goto bad0; 1358 /* qh_link filled when the QH is added */ 1359 sqh->qh.qh_endp = htole32( 1360 EHCI_QH_SET_ADDR(addr) | 1361 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1362 EHCI_QH_SET_EPS(speed) | 1363 EHCI_QH_DTC | 1364 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1365 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1366 EHCI_QH_CTL : 0) | 1367 EHCI_QH_SET_NRL(naks) 1368 ); 1369 sqh->qh.qh_endphub = htole32( 1370 EHCI_QH_SET_MULT(1) | 1371 EHCI_QH_SET_HUBA(hshubaddr) | 1372 EHCI_QH_SET_PORT(hshubport) | 1373 EHCI_QH_SET_CMASK(0xf0) | /* XXX */ 1374 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0) 1375 ); 1376 sqh->qh.qh_curqtd = EHCI_NULL; 1377 /* Fill the overlay qTD */ 1378 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1379 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1380 sqh->qh.qh_qtd.qtd_status = htole32(0); 1381 1382 epipe->sqh = sqh; 1383 1384 switch (xfertype) { 1385 case UE_CONTROL: 1386 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1387 0, &epipe->u.ctl.reqdma); 1388 #ifdef EHCI_DEBUG 1389 if (err) 1390 printf("ehci_open: usb_allocmem()=%d\n", err); 1391 #endif 1392 if (err) 1393 goto bad1; 1394 pipe->methods = &ehci_device_ctrl_methods; 1395 s = splusb(); 1396 ehci_add_qh(sqh, sc->sc_async_head); 1397 splx(s); 1398 break; 1399 case UE_BULK: 1400 pipe->methods = &ehci_device_bulk_methods; 1401 s = splusb(); 1402 ehci_add_qh(sqh, sc->sc_async_head); 1403 splx(s); 1404 break; 1405 case UE_INTERRUPT: 1406 pipe->methods = &ehci_device_intr_methods; 1407 ival = pipe->interval; 1408 if (ival == USBD_DEFAULT_INTERVAL) 1409 ival = ed->bInterval; 1410 return (ehci_device_setintr(sc, sqh, ival)); 1411 case UE_ISOCHRONOUS: 1412 pipe->methods = &ehci_device_isoc_methods; 1413 return (USBD_INVAL); 1414 default: 1415 return (USBD_INVAL); 1416 } 1417 return (USBD_NORMAL_COMPLETION); 1418 1419 bad1: 1420 ehci_free_sqh(sc, sqh); 1421 bad0: 1422 return (USBD_NOMEM); 1423 } 1424 1425 /* 1426 * Add an ED to the schedule. Called at splusb(). 1427 */ 1428 void 1429 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1430 { 1431 SPLUSBCHECK; 1432 1433 sqh->next = head->next; 1434 sqh->qh.qh_link = head->qh.qh_link; 1435 head->next = sqh; 1436 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1437 1438 #ifdef EHCI_DEBUG 1439 if (ehcidebug > 5) { 1440 printf("ehci_add_qh:\n"); 1441 ehci_dump_sqh(sqh); 1442 } 1443 #endif 1444 } 1445 1446 /* 1447 * Remove an ED from the schedule. Called at splusb(). 1448 */ 1449 void 1450 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1451 { 1452 ehci_soft_qh_t *p; 1453 1454 SPLUSBCHECK; 1455 /* XXX */ 1456 for (p = head; p != NULL && p->next != sqh; p = p->next) 1457 ; 1458 if (p == NULL) 1459 panic("ehci_rem_qh: ED not found"); 1460 p->next = sqh->next; 1461 p->qh.qh_link = sqh->qh.qh_link; 1462 1463 ehci_sync_hc(sc); 1464 } 1465 1466 void 1467 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1468 { 1469 /* Halt while we are messing. */ 1470 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 1471 sqh->qh.qh_curqtd = 0; 1472 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1473 sqh->sqtd = sqtd; 1474 /* Clear halt */ 1475 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_HALTED); 1476 } 1477 1478 /* 1479 * Ensure that the HC has released all references to the QH. We do this 1480 * by asking for a Async Advance Doorbell interrupt and then we wait for 1481 * the interrupt. 1482 * To make this easier we first obtain exclusive use of the doorbell. 1483 */ 1484 void 1485 ehci_sync_hc(ehci_softc_t *sc) 1486 { 1487 int s, error; 1488 1489 if (sc->sc_dying) { 1490 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1491 return; 1492 } 1493 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1494 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1495 s = splhardusb(); 1496 /* ask for doorbell */ 1497 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1498 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1499 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1500 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1501 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1502 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1503 splx(s); 1504 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1505 #ifdef DIAGNOSTIC 1506 if (error) 1507 printf("ehci_sync_hc: tsleep() = %d\n", error); 1508 #endif 1509 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1510 } 1511 1512 /***********/ 1513 1514 /* 1515 * Data structures and routines to emulate the root hub. 1516 */ 1517 Static usb_device_descriptor_t ehci_devd = { 1518 USB_DEVICE_DESCRIPTOR_SIZE, 1519 UDESC_DEVICE, /* type */ 1520 {0x00, 0x02}, /* USB version */ 1521 UDCLASS_HUB, /* class */ 1522 UDSUBCLASS_HUB, /* subclass */ 1523 UDPROTO_HSHUBSTT, /* protocol */ 1524 64, /* max packet */ 1525 {0},{0},{0x00,0x01}, /* device id */ 1526 1,2,0, /* string indicies */ 1527 1 /* # of configurations */ 1528 }; 1529 1530 Static usb_device_qualifier_t ehci_odevd = { 1531 USB_DEVICE_DESCRIPTOR_SIZE, 1532 UDESC_DEVICE_QUALIFIER, /* type */ 1533 {0x00, 0x02}, /* USB version */ 1534 UDCLASS_HUB, /* class */ 1535 UDSUBCLASS_HUB, /* subclass */ 1536 UDPROTO_FSHUB, /* protocol */ 1537 64, /* max packet */ 1538 1, /* # of configurations */ 1539 0 1540 }; 1541 1542 Static usb_config_descriptor_t ehci_confd = { 1543 USB_CONFIG_DESCRIPTOR_SIZE, 1544 UDESC_CONFIG, 1545 {USB_CONFIG_DESCRIPTOR_SIZE + 1546 USB_INTERFACE_DESCRIPTOR_SIZE + 1547 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1548 1, 1549 1, 1550 0, 1551 UC_SELF_POWERED, 1552 0 /* max power */ 1553 }; 1554 1555 Static usb_interface_descriptor_t ehci_ifcd = { 1556 USB_INTERFACE_DESCRIPTOR_SIZE, 1557 UDESC_INTERFACE, 1558 0, 1559 0, 1560 1, 1561 UICLASS_HUB, 1562 UISUBCLASS_HUB, 1563 UIPROTO_HSHUBSTT, 1564 0 1565 }; 1566 1567 Static usb_endpoint_descriptor_t ehci_endpd = { 1568 USB_ENDPOINT_DESCRIPTOR_SIZE, 1569 UDESC_ENDPOINT, 1570 UE_DIR_IN | EHCI_INTR_ENDPT, 1571 UE_INTERRUPT, 1572 {8, 0}, /* max packet */ 1573 255 1574 }; 1575 1576 Static usb_hub_descriptor_t ehci_hubd = { 1577 USB_HUB_DESCRIPTOR_SIZE, 1578 UDESC_HUB, 1579 0, 1580 {0,0}, 1581 0, 1582 0, 1583 {0}, 1584 }; 1585 1586 Static int 1587 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1588 { 1589 int i; 1590 1591 if (l == 0) 1592 return (0); 1593 p->bLength = 2 * strlen(s) + 2; 1594 if (l == 1) 1595 return (1); 1596 p->bDescriptorType = UDESC_STRING; 1597 l -= 2; 1598 for (i = 0; s[i] && l > 1; i++, l -= 2) 1599 USETW2(p->bString[i], 0, s[i]); 1600 return (2*i+2); 1601 } 1602 1603 /* 1604 * Simulate a hardware hub by handling all the necessary requests. 1605 */ 1606 Static usbd_status 1607 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1608 { 1609 usbd_status err; 1610 1611 /* Insert last in queue. */ 1612 err = usb_insert_transfer(xfer); 1613 if (err) 1614 return (err); 1615 1616 /* Pipe isn't running, start first */ 1617 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1618 } 1619 1620 Static usbd_status 1621 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1622 { 1623 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1624 usb_device_request_t *req; 1625 void *buf = NULL; 1626 int port, i; 1627 int s, len, value, index, l, totlen = 0; 1628 usb_port_status_t ps; 1629 usb_hub_descriptor_t hubd; 1630 usbd_status err; 1631 u_int32_t v; 1632 1633 if (sc->sc_dying) 1634 return (USBD_IOERROR); 1635 1636 #ifdef DIAGNOSTIC 1637 if (!(xfer->rqflags & URQ_REQUEST)) 1638 /* XXX panic */ 1639 return (USBD_INVAL); 1640 #endif 1641 req = &xfer->request; 1642 1643 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1644 req->bmRequestType, req->bRequest)); 1645 1646 len = UGETW(req->wLength); 1647 value = UGETW(req->wValue); 1648 index = UGETW(req->wIndex); 1649 1650 if (len != 0) 1651 buf = KERNADDR(&xfer->dmabuf, 0); 1652 1653 #define C(x,y) ((x) | ((y) << 8)) 1654 switch(C(req->bRequest, req->bmRequestType)) { 1655 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1656 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1657 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1658 /* 1659 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1660 * for the integrated root hub. 1661 */ 1662 break; 1663 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1664 if (len > 0) { 1665 *(u_int8_t *)buf = sc->sc_conf; 1666 totlen = 1; 1667 } 1668 break; 1669 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1670 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1671 switch(value >> 8) { 1672 case UDESC_DEVICE: 1673 if ((value & 0xff) != 0) { 1674 err = USBD_IOERROR; 1675 goto ret; 1676 } 1677 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1678 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1679 memcpy(buf, &ehci_devd, l); 1680 break; 1681 /* 1682 * We can't really operate at another speed, but the spec says 1683 * we need this descriptor. 1684 */ 1685 case UDESC_DEVICE_QUALIFIER: 1686 if ((value & 0xff) != 0) { 1687 err = USBD_IOERROR; 1688 goto ret; 1689 } 1690 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1691 memcpy(buf, &ehci_odevd, l); 1692 break; 1693 /* 1694 * We can't really operate at another speed, but the spec says 1695 * we need this descriptor. 1696 */ 1697 case UDESC_OTHER_SPEED_CONFIGURATION: 1698 case UDESC_CONFIG: 1699 if ((value & 0xff) != 0) { 1700 err = USBD_IOERROR; 1701 goto ret; 1702 } 1703 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1704 memcpy(buf, &ehci_confd, l); 1705 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1706 value >> 8; 1707 buf = (char *)buf + l; 1708 len -= l; 1709 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1710 totlen += l; 1711 memcpy(buf, &ehci_ifcd, l); 1712 buf = (char *)buf + l; 1713 len -= l; 1714 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1715 totlen += l; 1716 memcpy(buf, &ehci_endpd, l); 1717 break; 1718 case UDESC_STRING: 1719 if (len == 0) 1720 break; 1721 *(u_int8_t *)buf = 0; 1722 totlen = 1; 1723 switch (value & 0xff) { 1724 case 1: /* Vendor */ 1725 totlen = ehci_str(buf, len, sc->sc_vendor); 1726 break; 1727 case 2: /* Product */ 1728 totlen = ehci_str(buf, len, "EHCI root hub"); 1729 break; 1730 } 1731 break; 1732 default: 1733 err = USBD_IOERROR; 1734 goto ret; 1735 } 1736 break; 1737 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1738 if (len > 0) { 1739 *(u_int8_t *)buf = 0; 1740 totlen = 1; 1741 } 1742 break; 1743 case C(UR_GET_STATUS, UT_READ_DEVICE): 1744 if (len > 1) { 1745 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1746 totlen = 2; 1747 } 1748 break; 1749 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1750 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1751 if (len > 1) { 1752 USETW(((usb_status_t *)buf)->wStatus, 0); 1753 totlen = 2; 1754 } 1755 break; 1756 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1757 if (value >= USB_MAX_DEVICES) { 1758 err = USBD_IOERROR; 1759 goto ret; 1760 } 1761 sc->sc_addr = value; 1762 break; 1763 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1764 if (value != 0 && value != 1) { 1765 err = USBD_IOERROR; 1766 goto ret; 1767 } 1768 sc->sc_conf = value; 1769 break; 1770 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1771 break; 1772 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1773 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1774 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1775 err = USBD_IOERROR; 1776 goto ret; 1777 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1778 break; 1779 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1780 break; 1781 /* Hub requests */ 1782 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1783 break; 1784 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1785 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1786 "port=%d feature=%d\n", 1787 index, value)); 1788 if (index < 1 || index > sc->sc_noport) { 1789 err = USBD_IOERROR; 1790 goto ret; 1791 } 1792 port = EHCI_PORTSC(index); 1793 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1794 switch(value) { 1795 case UHF_PORT_ENABLE: 1796 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1797 break; 1798 case UHF_PORT_SUSPEND: 1799 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1800 break; 1801 case UHF_PORT_POWER: 1802 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1803 break; 1804 case UHF_PORT_TEST: 1805 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1806 "%d\n", index)); 1807 break; 1808 case UHF_PORT_INDICATOR: 1809 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1810 "%d\n", index)); 1811 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1812 break; 1813 case UHF_C_PORT_CONNECTION: 1814 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1815 break; 1816 case UHF_C_PORT_ENABLE: 1817 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1818 break; 1819 case UHF_C_PORT_SUSPEND: 1820 /* how? */ 1821 break; 1822 case UHF_C_PORT_OVER_CURRENT: 1823 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1824 break; 1825 case UHF_C_PORT_RESET: 1826 sc->sc_isreset = 0; 1827 break; 1828 default: 1829 err = USBD_IOERROR; 1830 goto ret; 1831 } 1832 #if 0 1833 switch(value) { 1834 case UHF_C_PORT_CONNECTION: 1835 case UHF_C_PORT_ENABLE: 1836 case UHF_C_PORT_SUSPEND: 1837 case UHF_C_PORT_OVER_CURRENT: 1838 case UHF_C_PORT_RESET: 1839 /* Enable RHSC interrupt if condition is cleared. */ 1840 if ((OREAD4(sc, port) >> 16) == 0) 1841 ehci_pcd_able(sc, 1); 1842 break; 1843 default: 1844 break; 1845 } 1846 #endif 1847 break; 1848 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1849 if ((value & 0xff) != 0) { 1850 err = USBD_IOERROR; 1851 goto ret; 1852 } 1853 hubd = ehci_hubd; 1854 hubd.bNbrPorts = sc->sc_noport; 1855 v = EOREAD4(sc, EHCI_HCSPARAMS); 1856 USETW(hubd.wHubCharacteristics, 1857 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1858 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1859 ? UHD_PORT_IND : 0); 1860 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1861 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1862 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1863 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1864 l = min(len, hubd.bDescLength); 1865 totlen = l; 1866 memcpy(buf, &hubd, l); 1867 break; 1868 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1869 if (len != 4) { 1870 err = USBD_IOERROR; 1871 goto ret; 1872 } 1873 memset(buf, 0, len); /* ? XXX */ 1874 totlen = len; 1875 break; 1876 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1877 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1878 index)); 1879 if (index < 1 || index > sc->sc_noport) { 1880 err = USBD_IOERROR; 1881 goto ret; 1882 } 1883 if (len != 4) { 1884 err = USBD_IOERROR; 1885 goto ret; 1886 } 1887 v = EOREAD4(sc, EHCI_PORTSC(index)); 1888 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1889 v)); 1890 i = UPS_HIGH_SPEED; 1891 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1892 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1893 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1894 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1895 if (v & EHCI_PS_PR) i |= UPS_RESET; 1896 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1897 USETW(ps.wPortStatus, i); 1898 i = 0; 1899 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1900 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1901 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1902 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1903 USETW(ps.wPortChange, i); 1904 l = min(len, sizeof ps); 1905 memcpy(buf, &ps, l); 1906 totlen = l; 1907 break; 1908 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1909 err = USBD_IOERROR; 1910 goto ret; 1911 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1912 break; 1913 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1914 if (index < 1 || index > sc->sc_noport) { 1915 err = USBD_IOERROR; 1916 goto ret; 1917 } 1918 port = EHCI_PORTSC(index); 1919 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1920 switch(value) { 1921 case UHF_PORT_ENABLE: 1922 EOWRITE4(sc, port, v | EHCI_PS_PE); 1923 break; 1924 case UHF_PORT_SUSPEND: 1925 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1926 break; 1927 case UHF_PORT_RESET: 1928 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1929 index)); 1930 if (EHCI_PS_IS_LOWSPEED(v)) { 1931 /* Low speed device, give up ownership. */ 1932 ehci_disown(sc, index, 1); 1933 break; 1934 } 1935 /* Start reset sequence. */ 1936 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1937 EOWRITE4(sc, port, v | EHCI_PS_PR); 1938 /* Wait for reset to complete. */ 1939 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1940 if (sc->sc_dying) { 1941 err = USBD_IOERROR; 1942 goto ret; 1943 } 1944 /* Terminate reset sequence. */ 1945 EOWRITE4(sc, port, v); 1946 /* Wait for HC to complete reset. */ 1947 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1948 if (sc->sc_dying) { 1949 err = USBD_IOERROR; 1950 goto ret; 1951 } 1952 v = EOREAD4(sc, port); 1953 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1954 if (v & EHCI_PS_PR) { 1955 printf("%s: port reset timeout\n", 1956 USBDEVNAME(sc->sc_bus.bdev)); 1957 return (USBD_TIMEOUT); 1958 } 1959 if (!(v & EHCI_PS_PE)) { 1960 /* Not a high speed device, give up ownership.*/ 1961 ehci_disown(sc, index, 0); 1962 break; 1963 } 1964 sc->sc_isreset = 1; 1965 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1966 index, v)); 1967 break; 1968 case UHF_PORT_POWER: 1969 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 1970 "%d\n", index)); 1971 EOWRITE4(sc, port, v | EHCI_PS_PP); 1972 break; 1973 case UHF_PORT_TEST: 1974 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 1975 "%d\n", index)); 1976 break; 1977 case UHF_PORT_INDICATOR: 1978 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 1979 "%d\n", index)); 1980 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1981 break; 1982 default: 1983 err = USBD_IOERROR; 1984 goto ret; 1985 } 1986 break; 1987 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 1988 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 1989 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 1990 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 1991 break; 1992 default: 1993 err = USBD_IOERROR; 1994 goto ret; 1995 } 1996 xfer->actlen = totlen; 1997 err = USBD_NORMAL_COMPLETION; 1998 ret: 1999 xfer->status = err; 2000 s = splusb(); 2001 usb_transfer_complete(xfer); 2002 splx(s); 2003 return (USBD_IN_PROGRESS); 2004 } 2005 2006 void 2007 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2008 { 2009 int port; 2010 u_int32_t v; 2011 2012 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2013 #ifdef DIAGNOSTIC 2014 if (sc->sc_npcomp != 0) { 2015 int i = (index-1) / sc->sc_npcomp; 2016 if (i >= sc->sc_ncomp) 2017 printf("%s: strange port\n", 2018 USBDEVNAME(sc->sc_bus.bdev)); 2019 else 2020 printf("%s: handing over %s speed device on " 2021 "port %d to %s\n", 2022 USBDEVNAME(sc->sc_bus.bdev), 2023 lowspeed ? "low" : "full", 2024 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2025 } else { 2026 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2027 } 2028 #endif 2029 port = EHCI_PORTSC(index); 2030 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2031 EOWRITE4(sc, port, v | EHCI_PS_PO); 2032 } 2033 2034 /* Abort a root control request. */ 2035 Static void 2036 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2037 { 2038 /* Nothing to do, all transfers are synchronous. */ 2039 } 2040 2041 /* Close the root pipe. */ 2042 Static void 2043 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2044 { 2045 DPRINTF(("ehci_root_ctrl_close\n")); 2046 /* Nothing to do. */ 2047 } 2048 2049 void 2050 ehci_root_intr_done(usbd_xfer_handle xfer) 2051 { 2052 xfer->hcpriv = NULL; 2053 } 2054 2055 Static usbd_status 2056 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2057 { 2058 usbd_status err; 2059 2060 /* Insert last in queue. */ 2061 err = usb_insert_transfer(xfer); 2062 if (err) 2063 return (err); 2064 2065 /* Pipe isn't running, start first */ 2066 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2067 } 2068 2069 Static usbd_status 2070 ehci_root_intr_start(usbd_xfer_handle xfer) 2071 { 2072 usbd_pipe_handle pipe = xfer->pipe; 2073 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2074 2075 if (sc->sc_dying) 2076 return (USBD_IOERROR); 2077 2078 sc->sc_intrxfer = xfer; 2079 2080 return (USBD_IN_PROGRESS); 2081 } 2082 2083 /* Abort a root interrupt request. */ 2084 Static void 2085 ehci_root_intr_abort(usbd_xfer_handle xfer) 2086 { 2087 int s; 2088 2089 if (xfer->pipe->intrxfer == xfer) { 2090 DPRINTF(("ehci_root_intr_abort: remove\n")); 2091 xfer->pipe->intrxfer = NULL; 2092 } 2093 xfer->status = USBD_CANCELLED; 2094 s = splusb(); 2095 usb_transfer_complete(xfer); 2096 splx(s); 2097 } 2098 2099 /* Close the root pipe. */ 2100 Static void 2101 ehci_root_intr_close(usbd_pipe_handle pipe) 2102 { 2103 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2104 2105 DPRINTF(("ehci_root_intr_close\n")); 2106 2107 sc->sc_intrxfer = NULL; 2108 } 2109 2110 void 2111 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2112 { 2113 xfer->hcpriv = NULL; 2114 } 2115 2116 /************************/ 2117 2118 ehci_soft_qh_t * 2119 ehci_alloc_sqh(ehci_softc_t *sc) 2120 { 2121 ehci_soft_qh_t *sqh; 2122 usbd_status err; 2123 int i, offs; 2124 usb_dma_t dma; 2125 2126 if (sc->sc_freeqhs == NULL) { 2127 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2128 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2129 EHCI_PAGE_SIZE, &dma); 2130 #ifdef EHCI_DEBUG 2131 if (err) 2132 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2133 #endif 2134 if (err) 2135 return (NULL); 2136 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2137 offs = i * EHCI_SQH_SIZE; 2138 sqh = KERNADDR(&dma, offs); 2139 sqh->physaddr = DMAADDR(&dma, offs); 2140 sqh->next = sc->sc_freeqhs; 2141 sc->sc_freeqhs = sqh; 2142 } 2143 } 2144 sqh = sc->sc_freeqhs; 2145 sc->sc_freeqhs = sqh->next; 2146 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2147 sqh->next = NULL; 2148 return (sqh); 2149 } 2150 2151 void 2152 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2153 { 2154 sqh->next = sc->sc_freeqhs; 2155 sc->sc_freeqhs = sqh; 2156 } 2157 2158 ehci_soft_qtd_t * 2159 ehci_alloc_sqtd(ehci_softc_t *sc) 2160 { 2161 ehci_soft_qtd_t *sqtd; 2162 usbd_status err; 2163 int i, offs; 2164 usb_dma_t dma; 2165 int s; 2166 2167 if (sc->sc_freeqtds == NULL) { 2168 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2169 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2170 EHCI_PAGE_SIZE, &dma); 2171 #ifdef EHCI_DEBUG 2172 if (err) 2173 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2174 #endif 2175 if (err) 2176 return (NULL); 2177 s = splusb(); 2178 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2179 offs = i * EHCI_SQTD_SIZE; 2180 sqtd = KERNADDR(&dma, offs); 2181 sqtd->physaddr = DMAADDR(&dma, offs); 2182 sqtd->nextqtd = sc->sc_freeqtds; 2183 sc->sc_freeqtds = sqtd; 2184 } 2185 splx(s); 2186 } 2187 2188 s = splusb(); 2189 sqtd = sc->sc_freeqtds; 2190 sc->sc_freeqtds = sqtd->nextqtd; 2191 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2192 sqtd->nextqtd = NULL; 2193 sqtd->xfer = NULL; 2194 splx(s); 2195 2196 return (sqtd); 2197 } 2198 2199 void 2200 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2201 { 2202 int s; 2203 2204 s = splusb(); 2205 sqtd->nextqtd = sc->sc_freeqtds; 2206 sc->sc_freeqtds = sqtd; 2207 splx(s); 2208 } 2209 2210 usbd_status 2211 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2212 int alen, int rd, usbd_xfer_handle xfer, 2213 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2214 { 2215 ehci_soft_qtd_t *next, *cur; 2216 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2217 u_int32_t qtdstatus; 2218 int len, curlen, mps; 2219 int i, tog; 2220 usb_dma_t *dma = &xfer->dmabuf; 2221 2222 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2223 2224 len = alen; 2225 dataphys = DMAADDR(dma, 0); 2226 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2227 #if 0 2228 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2229 epipe->nexttoggle); 2230 #endif 2231 qtdstatus = EHCI_QTD_ACTIVE | 2232 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2233 EHCI_QTD_SET_CERR(3) 2234 /* IOC set below */ 2235 /* BYTES set below */ 2236 ; 2237 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2238 tog = epipe->nexttoggle; 2239 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2240 2241 cur = ehci_alloc_sqtd(sc); 2242 *sp = cur; 2243 if (cur == NULL) 2244 goto nomem; 2245 for (;;) { 2246 dataphyspage = EHCI_PAGE(dataphys); 2247 /* The EHCI hardware can handle at most 5 pages. */ 2248 if (dataphyslastpage - dataphyspage < 2249 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2250 /* we can handle it in this QTD */ 2251 curlen = len; 2252 } else { 2253 /* must use multiple TDs, fill as much as possible. */ 2254 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2255 EHCI_PAGE_OFFSET(dataphys); 2256 #ifdef DIAGNOSTIC 2257 if (curlen > len) { 2258 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2259 "len=0x%x offs=0x%x\n", curlen, len, 2260 EHCI_PAGE_OFFSET(dataphys)); 2261 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2262 dataphyslastpage, dataphyspage, 2263 dataphys); 2264 curlen = len; 2265 } 2266 #endif 2267 /* the length must be a multiple of the max size */ 2268 curlen -= curlen % mps; 2269 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2270 "curlen=%d\n", curlen)); 2271 #ifdef DIAGNOSTIC 2272 if (curlen == 0) 2273 panic("ehci_alloc_std: curlen == 0"); 2274 #endif 2275 } 2276 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2277 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2278 dataphys, dataphyslastpage, 2279 len, curlen)); 2280 len -= curlen; 2281 2282 if (len != 0) { 2283 next = ehci_alloc_sqtd(sc); 2284 if (next == NULL) 2285 goto nomem; 2286 nextphys = htole32(next->physaddr); 2287 } else { 2288 next = NULL; 2289 nextphys = EHCI_NULL; 2290 } 2291 2292 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2293 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2294 if (i != 0) /* use offset only in first buffer */ 2295 a = EHCI_PAGE(a); 2296 cur->qtd.qtd_buffer[i] = htole32(a); 2297 cur->qtd.qtd_buffer_hi[i] = 0; 2298 #ifdef DIAGNOSTIC 2299 if (i >= EHCI_QTD_NBUFFERS) { 2300 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2301 goto nomem; 2302 } 2303 #endif 2304 } 2305 cur->nextqtd = next; 2306 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2307 cur->qtd.qtd_status = 2308 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2309 cur->xfer = xfer; 2310 cur->len = curlen; 2311 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2312 dataphys, dataphys + curlen)); 2313 /* adjust the toggle based on the number of packets in this 2314 qtd */ 2315 if (((curlen + mps - 1) / mps) & 1) { 2316 tog ^= 1; 2317 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2318 } 2319 if (len == 0) 2320 break; 2321 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2322 dataphys += curlen; 2323 cur = next; 2324 } 2325 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2326 *ep = cur; 2327 epipe->nexttoggle = tog; 2328 2329 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2330 *sp, *ep)); 2331 2332 return (USBD_NORMAL_COMPLETION); 2333 2334 nomem: 2335 /* XXX free chain */ 2336 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2337 return (USBD_NOMEM); 2338 } 2339 2340 Static void 2341 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2342 ehci_soft_qtd_t *sqtdend) 2343 { 2344 ehci_soft_qtd_t *p; 2345 int i; 2346 2347 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2348 sqtd, sqtdend)); 2349 2350 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2351 p = sqtd->nextqtd; 2352 ehci_free_sqtd(sc, sqtd); 2353 } 2354 } 2355 2356 /****************/ 2357 2358 /* 2359 * Close a reqular pipe. 2360 * Assumes that there are no pending transactions. 2361 */ 2362 void 2363 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2364 { 2365 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2366 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2367 ehci_soft_qh_t *sqh = epipe->sqh; 2368 int s; 2369 2370 s = splusb(); 2371 ehci_rem_qh(sc, sqh, head); 2372 splx(s); 2373 ehci_free_sqh(sc, epipe->sqh); 2374 } 2375 2376 /* 2377 * Abort a device request. 2378 * If this routine is called at splusb() it guarantees that the request 2379 * will be removed from the hardware scheduling and that the callback 2380 * for it will be called with USBD_CANCELLED status. 2381 * It's impossible to guarantee that the requested transfer will not 2382 * have happened since the hardware runs concurrently. 2383 * If the transaction has already happened we rely on the ordinary 2384 * interrupt processing to process it. 2385 * XXX This is most probably wrong. 2386 */ 2387 void 2388 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2389 { 2390 #define exfer EXFER(xfer) 2391 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2392 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2393 ehci_soft_qh_t *sqh = epipe->sqh; 2394 ehci_soft_qtd_t *sqtd; 2395 ehci_physaddr_t cur; 2396 u_int32_t qhstatus; 2397 int s; 2398 int hit; 2399 2400 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2401 2402 if (sc->sc_dying) { 2403 /* If we're dying, just do the software part. */ 2404 s = splusb(); 2405 xfer->status = status; /* make software ignore it */ 2406 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2407 usb_transfer_complete(xfer); 2408 splx(s); 2409 return; 2410 } 2411 2412 if (xfer->device->bus->intr_context || !curproc) 2413 panic("ehci_abort_xfer: not in process context"); 2414 2415 /* 2416 * Step 1: Make interrupt routine and hardware ignore xfer. 2417 */ 2418 s = splusb(); 2419 xfer->status = status; /* make software ignore it */ 2420 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2421 qhstatus = sqh->qh.qh_qtd.qtd_status; 2422 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2423 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2424 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2425 if (sqtd == exfer->sqtdend) 2426 break; 2427 } 2428 splx(s); 2429 2430 /* 2431 * Step 2: Wait until we know hardware has finished any possible 2432 * use of the xfer. Also make sure the soft interrupt routine 2433 * has run. 2434 */ 2435 ehci_sync_hc(sc); 2436 s = splusb(); 2437 #ifdef USB_USE_SOFTINTR 2438 sc->sc_softwake = 1; 2439 #endif /* USB_USE_SOFTINTR */ 2440 usb_schedsoftintr(&sc->sc_bus); 2441 #ifdef USB_USE_SOFTINTR 2442 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2443 #endif /* USB_USE_SOFTINTR */ 2444 splx(s); 2445 2446 /* 2447 * Step 3: Remove any vestiges of the xfer from the hardware. 2448 * The complication here is that the hardware may have executed 2449 * beyond the xfer we're trying to abort. So as we're scanning 2450 * the TDs of this xfer we check if the hardware points to 2451 * any of them. 2452 */ 2453 s = splusb(); /* XXX why? */ 2454 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2455 hit = 0; 2456 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2457 hit |= cur == sqtd->physaddr; 2458 if (sqtd == exfer->sqtdend) 2459 break; 2460 } 2461 sqtd = sqtd->nextqtd; 2462 /* Zap curqtd register if hardware pointed inside the xfer. */ 2463 if (hit && sqtd != NULL) { 2464 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2465 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2466 sqh->qh.qh_qtd.qtd_status = qhstatus; 2467 } else { 2468 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2469 } 2470 2471 /* 2472 * Step 4: Execute callback. 2473 */ 2474 #ifdef DIAGNOSTIC 2475 exfer->isdone = 1; 2476 #endif 2477 usb_transfer_complete(xfer); 2478 2479 splx(s); 2480 #undef exfer 2481 } 2482 2483 void 2484 ehci_timeout(void *addr) 2485 { 2486 struct ehci_xfer *exfer = addr; 2487 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2488 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2489 2490 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2491 #ifdef USB_DEBUG 2492 if (ehcidebug > 1) 2493 usbd_dump_pipe(exfer->xfer.pipe); 2494 #endif 2495 2496 if (sc->sc_dying) { 2497 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2498 return; 2499 } 2500 2501 /* Execute the abort in a process context. */ 2502 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2503 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2504 } 2505 2506 void 2507 ehci_timeout_task(void *addr) 2508 { 2509 usbd_xfer_handle xfer = addr; 2510 int s; 2511 2512 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2513 2514 s = splusb(); 2515 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2516 splx(s); 2517 } 2518 2519 /************************/ 2520 2521 Static usbd_status 2522 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2523 { 2524 usbd_status err; 2525 2526 /* Insert last in queue. */ 2527 err = usb_insert_transfer(xfer); 2528 if (err) 2529 return (err); 2530 2531 /* Pipe isn't running, start first */ 2532 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2533 } 2534 2535 Static usbd_status 2536 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2537 { 2538 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2539 usbd_status err; 2540 2541 if (sc->sc_dying) 2542 return (USBD_IOERROR); 2543 2544 #ifdef DIAGNOSTIC 2545 if (!(xfer->rqflags & URQ_REQUEST)) { 2546 /* XXX panic */ 2547 printf("ehci_device_ctrl_transfer: not a request\n"); 2548 return (USBD_INVAL); 2549 } 2550 #endif 2551 2552 err = ehci_device_request(xfer); 2553 if (err) 2554 return (err); 2555 2556 if (sc->sc_bus.use_polling) 2557 ehci_waitintr(sc, xfer); 2558 return (USBD_IN_PROGRESS); 2559 } 2560 2561 void 2562 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2563 { 2564 struct ehci_xfer *ex = EXFER(xfer); 2565 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2566 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2567 2568 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2569 2570 #ifdef DIAGNOSTIC 2571 if (!(xfer->rqflags & URQ_REQUEST)) { 2572 panic("ehci_ctrl_done: not a request"); 2573 } 2574 #endif 2575 2576 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2577 ehci_del_intr_list(ex); /* remove from active list */ 2578 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2579 } 2580 2581 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2582 } 2583 2584 /* Abort a device control request. */ 2585 Static void 2586 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2587 { 2588 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2589 ehci_abort_xfer(xfer, USBD_CANCELLED); 2590 } 2591 2592 /* Close a device control pipe. */ 2593 Static void 2594 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2595 { 2596 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2597 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2598 2599 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2600 ehci_close_pipe(pipe, sc->sc_async_head); 2601 } 2602 2603 usbd_status 2604 ehci_device_request(usbd_xfer_handle xfer) 2605 { 2606 #define exfer EXFER(xfer) 2607 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2608 usb_device_request_t *req = &xfer->request; 2609 usbd_device_handle dev = epipe->pipe.device; 2610 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2611 int addr = dev->address; 2612 ehci_soft_qtd_t *setup, *stat, *next; 2613 ehci_soft_qh_t *sqh; 2614 int isread; 2615 int len; 2616 usbd_status err; 2617 int s; 2618 2619 isread = req->bmRequestType & UT_READ; 2620 len = UGETW(req->wLength); 2621 2622 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2623 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2624 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2625 UGETW(req->wIndex), len, addr, 2626 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2627 2628 setup = ehci_alloc_sqtd(sc); 2629 if (setup == NULL) { 2630 err = USBD_NOMEM; 2631 goto bad1; 2632 } 2633 stat = ehci_alloc_sqtd(sc); 2634 if (stat == NULL) { 2635 err = USBD_NOMEM; 2636 goto bad2; 2637 } 2638 2639 sqh = epipe->sqh; 2640 epipe->u.ctl.length = len; 2641 2642 /* Update device address and length since they may have changed 2643 during the setup of the control pipe in usbd_new_device(). */ 2644 /* XXX This only needs to be done once, but it's too early in open. */ 2645 /* XXXX Should not touch ED here! */ 2646 sqh->qh.qh_endp = 2647 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2648 htole32( 2649 EHCI_QH_SET_ADDR(addr) | 2650 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2651 ); 2652 2653 /* Set up data transaction */ 2654 if (len != 0) { 2655 ehci_soft_qtd_t *end; 2656 2657 /* Start toggle at 1. */ 2658 epipe->nexttoggle = 1; 2659 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2660 &next, &end); 2661 if (err) 2662 goto bad3; 2663 end->nextqtd = stat; 2664 end->qtd.qtd_next = 2665 end->qtd.qtd_altnext = htole32(stat->physaddr); 2666 } else { 2667 next = stat; 2668 } 2669 2670 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2671 2672 /* Clear toggle */ 2673 setup->qtd.qtd_status = htole32( 2674 EHCI_QTD_ACTIVE | 2675 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2676 EHCI_QTD_SET_CERR(3) | 2677 EHCI_QTD_SET_TOGGLE(0) | 2678 EHCI_QTD_SET_BYTES(sizeof *req) 2679 ); 2680 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2681 setup->qtd.qtd_buffer_hi[0] = 0; 2682 setup->nextqtd = next; 2683 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2684 setup->xfer = xfer; 2685 setup->len = sizeof *req; 2686 2687 stat->qtd.qtd_status = htole32( 2688 EHCI_QTD_ACTIVE | 2689 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2690 EHCI_QTD_SET_CERR(3) | 2691 EHCI_QTD_SET_TOGGLE(1) | 2692 EHCI_QTD_IOC 2693 ); 2694 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2695 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2696 stat->nextqtd = NULL; 2697 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2698 stat->xfer = xfer; 2699 stat->len = 0; 2700 2701 #ifdef EHCI_DEBUG 2702 if (ehcidebug > 5) { 2703 DPRINTF(("ehci_device_request:\n")); 2704 ehci_dump_sqh(sqh); 2705 ehci_dump_sqtds(setup); 2706 } 2707 #endif 2708 2709 exfer->sqtdstart = setup; 2710 exfer->sqtdend = stat; 2711 #ifdef DIAGNOSTIC 2712 if (!exfer->isdone) { 2713 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2714 } 2715 exfer->isdone = 0; 2716 #endif 2717 2718 /* Insert qTD in QH list. */ 2719 s = splusb(); 2720 ehci_set_qh_qtd(sqh, setup); 2721 if (xfer->timeout && !sc->sc_bus.use_polling) { 2722 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2723 ehci_timeout, xfer); 2724 } 2725 ehci_add_intr_list(sc, exfer); 2726 xfer->status = USBD_IN_PROGRESS; 2727 splx(s); 2728 2729 #ifdef EHCI_DEBUG 2730 if (ehcidebug > 10) { 2731 DPRINTF(("ehci_device_request: status=%x\n", 2732 EOREAD4(sc, EHCI_USBSTS))); 2733 delay(10000); 2734 ehci_dump_regs(sc); 2735 ehci_dump_sqh(sc->sc_async_head); 2736 ehci_dump_sqh(sqh); 2737 ehci_dump_sqtds(setup); 2738 } 2739 #endif 2740 2741 return (USBD_NORMAL_COMPLETION); 2742 2743 bad3: 2744 ehci_free_sqtd(sc, stat); 2745 bad2: 2746 ehci_free_sqtd(sc, setup); 2747 bad1: 2748 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2749 xfer->status = err; 2750 usb_transfer_complete(xfer); 2751 return (err); 2752 #undef exfer 2753 } 2754 2755 /************************/ 2756 2757 Static usbd_status 2758 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2759 { 2760 usbd_status err; 2761 2762 /* Insert last in queue. */ 2763 err = usb_insert_transfer(xfer); 2764 if (err) 2765 return (err); 2766 2767 /* Pipe isn't running, start first */ 2768 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2769 } 2770 2771 usbd_status 2772 ehci_device_bulk_start(usbd_xfer_handle xfer) 2773 { 2774 #define exfer EXFER(xfer) 2775 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2776 usbd_device_handle dev = epipe->pipe.device; 2777 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2778 ehci_soft_qtd_t *data, *dataend; 2779 ehci_soft_qh_t *sqh; 2780 usbd_status err; 2781 int len, isread, endpt; 2782 int s; 2783 2784 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2785 xfer, xfer->length, xfer->flags)); 2786 2787 if (sc->sc_dying) 2788 return (USBD_IOERROR); 2789 2790 #ifdef DIAGNOSTIC 2791 if (xfer->rqflags & URQ_REQUEST) 2792 panic("ehci_device_bulk_start: a request"); 2793 #endif 2794 2795 len = xfer->length; 2796 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2797 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2798 sqh = epipe->sqh; 2799 2800 epipe->u.bulk.length = len; 2801 2802 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2803 &dataend); 2804 if (err) { 2805 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2806 xfer->status = err; 2807 usb_transfer_complete(xfer); 2808 return (err); 2809 } 2810 2811 #ifdef EHCI_DEBUG 2812 if (ehcidebug > 5) { 2813 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2814 ehci_dump_sqh(sqh); 2815 ehci_dump_sqtds(data); 2816 } 2817 #endif 2818 2819 /* Set up interrupt info. */ 2820 exfer->sqtdstart = data; 2821 exfer->sqtdend = dataend; 2822 #ifdef DIAGNOSTIC 2823 if (!exfer->isdone) { 2824 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2825 } 2826 exfer->isdone = 0; 2827 #endif 2828 2829 s = splusb(); 2830 ehci_set_qh_qtd(sqh, data); 2831 if (xfer->timeout && !sc->sc_bus.use_polling) { 2832 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2833 ehci_timeout, xfer); 2834 } 2835 ehci_add_intr_list(sc, exfer); 2836 xfer->status = USBD_IN_PROGRESS; 2837 splx(s); 2838 2839 #ifdef EHCI_DEBUG 2840 if (ehcidebug > 10) { 2841 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2842 delay(10000); 2843 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2844 ehci_dump_regs(sc); 2845 #if 0 2846 printf("async_head:\n"); 2847 ehci_dump_sqh(sc->sc_async_head); 2848 #endif 2849 printf("sqh:\n"); 2850 ehci_dump_sqh(sqh); 2851 ehci_dump_sqtds(data); 2852 } 2853 #endif 2854 2855 if (sc->sc_bus.use_polling) 2856 ehci_waitintr(sc, xfer); 2857 2858 return (USBD_IN_PROGRESS); 2859 #undef exfer 2860 } 2861 2862 Static void 2863 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2864 { 2865 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2866 ehci_abort_xfer(xfer, USBD_CANCELLED); 2867 } 2868 2869 /* 2870 * Close a device bulk pipe. 2871 */ 2872 Static void 2873 ehci_device_bulk_close(usbd_pipe_handle pipe) 2874 { 2875 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2876 2877 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2878 ehci_close_pipe(pipe, sc->sc_async_head); 2879 } 2880 2881 void 2882 ehci_device_bulk_done(usbd_xfer_handle xfer) 2883 { 2884 struct ehci_xfer *ex = EXFER(xfer); 2885 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2886 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2887 2888 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2889 xfer, xfer->actlen)); 2890 2891 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2892 ehci_del_intr_list(ex); /* remove from active list */ 2893 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2894 } 2895 2896 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2897 } 2898 2899 /************************/ 2900 2901 Static usbd_status 2902 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2903 { 2904 struct ehci_soft_islot *isp; 2905 int islot, lev; 2906 2907 /* Find a poll rate that is large enough. */ 2908 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2909 if (EHCI_ILEV_IVAL(lev) <= ival) 2910 break; 2911 2912 /* Pick an interrupt slot at the right level. */ 2913 /* XXX could do better than picking at random */ 2914 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2915 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2916 2917 sqh->islot = islot; 2918 isp = &sc->sc_islots[islot]; 2919 ehci_add_qh(sqh, isp->sqh); 2920 2921 return (USBD_NORMAL_COMPLETION); 2922 } 2923 2924 Static usbd_status 2925 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2926 { 2927 usbd_status err; 2928 2929 /* Insert last in queue. */ 2930 err = usb_insert_transfer(xfer); 2931 if (err) 2932 return (err); 2933 2934 /* 2935 * Pipe isn't running (otherwise err would be USBD_INPROG), 2936 * so start it first. 2937 */ 2938 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2939 } 2940 2941 Static usbd_status 2942 ehci_device_intr_start(usbd_xfer_handle xfer) 2943 { 2944 #define exfer EXFER(xfer) 2945 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2946 usbd_device_handle dev = xfer->pipe->device; 2947 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2948 ehci_soft_qtd_t *data, *dataend; 2949 ehci_soft_qh_t *sqh; 2950 usbd_status err; 2951 int len, isread, endpt; 2952 int s; 2953 2954 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 2955 xfer, xfer->length, xfer->flags)); 2956 2957 if (sc->sc_dying) 2958 return (USBD_IOERROR); 2959 2960 #ifdef DIAGNOSTIC 2961 if (xfer->rqflags & URQ_REQUEST) 2962 panic("ehci_device_intr_start: a request"); 2963 #endif 2964 2965 len = xfer->length; 2966 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2967 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2968 sqh = epipe->sqh; 2969 2970 epipe->u.intr.length = len; 2971 2972 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2973 &dataend); 2974 if (err) { 2975 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 2976 xfer->status = err; 2977 usb_transfer_complete(xfer); 2978 return (err); 2979 } 2980 2981 #ifdef EHCI_DEBUG 2982 if (ehcidebug > 5) { 2983 DPRINTF(("ehci_device_intr_start: data(1)\n")); 2984 ehci_dump_sqh(sqh); 2985 ehci_dump_sqtds(data); 2986 } 2987 #endif 2988 2989 /* Set up interrupt info. */ 2990 exfer->sqtdstart = data; 2991 exfer->sqtdend = dataend; 2992 #ifdef DIAGNOSTIC 2993 if (!exfer->isdone) { 2994 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 2995 } 2996 exfer->isdone = 0; 2997 #endif 2998 2999 s = splusb(); 3000 ehci_set_qh_qtd(sqh, data); 3001 if (xfer->timeout && !sc->sc_bus.use_polling) { 3002 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3003 ehci_timeout, xfer); 3004 } 3005 ehci_add_intr_list(sc, exfer); 3006 xfer->status = USBD_IN_PROGRESS; 3007 splx(s); 3008 3009 #ifdef EHCI_DEBUG 3010 if (ehcidebug > 10) { 3011 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3012 delay(10000); 3013 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3014 ehci_dump_regs(sc); 3015 printf("sqh:\n"); 3016 ehci_dump_sqh(sqh); 3017 ehci_dump_sqtds(data); 3018 } 3019 #endif 3020 3021 if (sc->sc_bus.use_polling) 3022 ehci_waitintr(sc, xfer); 3023 3024 return (USBD_IN_PROGRESS); 3025 #undef exfer 3026 } 3027 3028 Static void 3029 ehci_device_intr_abort(usbd_xfer_handle xfer) 3030 { 3031 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3032 if (xfer->pipe->intrxfer == xfer) { 3033 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3034 xfer->pipe->intrxfer = NULL; 3035 } 3036 ehci_abort_xfer(xfer, USBD_CANCELLED); 3037 } 3038 3039 Static void 3040 ehci_device_intr_close(usbd_pipe_handle pipe) 3041 { 3042 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3043 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3044 struct ehci_soft_islot *isp; 3045 3046 isp = &sc->sc_islots[epipe->sqh->islot]; 3047 ehci_close_pipe(pipe, isp->sqh); 3048 } 3049 3050 Static void 3051 ehci_device_intr_done(usbd_xfer_handle xfer) 3052 { 3053 #define exfer EXFER(xfer) 3054 struct ehci_xfer *ex = EXFER(xfer); 3055 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3056 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3057 ehci_soft_qtd_t *data, *dataend; 3058 ehci_soft_qh_t *sqh; 3059 usbd_status err; 3060 int len, isread, endpt, s; 3061 3062 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3063 xfer, xfer->actlen)); 3064 3065 if (xfer->pipe->repeat) { 3066 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3067 3068 len = epipe->u.intr.length; 3069 xfer->length = len; 3070 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3071 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3072 sqh = epipe->sqh; 3073 3074 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3075 &data, &dataend); 3076 if (err) { 3077 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3078 xfer->status = err; 3079 return; 3080 } 3081 3082 /* Set up interrupt info. */ 3083 exfer->sqtdstart = data; 3084 exfer->sqtdend = dataend; 3085 #ifdef DIAGNOSTIC 3086 if (!exfer->isdone) { 3087 printf("ehci_device_intr_done: not done, ex=%p\n", 3088 exfer); 3089 } 3090 exfer->isdone = 0; 3091 #endif 3092 3093 s = splusb(); 3094 ehci_set_qh_qtd(sqh, data); 3095 if (xfer->timeout && !sc->sc_bus.use_polling) { 3096 usb_callout(xfer->timeout_handle, 3097 mstohz(xfer->timeout), ehci_timeout, xfer); 3098 } 3099 splx(s); 3100 3101 xfer->status = USBD_IN_PROGRESS; 3102 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3103 ehci_del_intr_list(ex); /* remove from active list */ 3104 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3105 } 3106 #undef exfer 3107 } 3108 3109 /************************/ 3110 3111 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3112 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3113 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3114 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3115 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3116
Indexes created Mon Sep 22 13:09:51 GMT 2025