ehci.c revision 1.88
1 /* $NetBSD: ehci.c,v 1.88 2004/10/26 20:46:16 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.88 2004/10/26 20:46:16 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 usbd_status 316 ehci_init(ehci_softc_t *sc) 317 { 318 u_int32_t version, sparams, cparams, hcr; 319 u_int i; 320 usbd_status err; 321 ehci_soft_qh_t *sqh; 322 323 DPRINTF(("ehci_init: start\n")); 324 #ifdef EHCI_DEBUG 325 theehci = sc; 326 #endif 327 328 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 329 330 version = EREAD2(sc, EHCI_HCIVERSION); 331 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 332 version >> 8, version & 0xff); 333 334 sparams = EREAD4(sc, EHCI_HCSPARAMS); 335 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 336 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 337 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) { 338 aprint_error("%s: wrong number of companions (%d != %d)\n", 339 USBDEVNAME(sc->sc_bus.bdev), 340 EHCI_HCS_N_CC(sparams), sc->sc_ncomp); 341 #if NOHCI == 0 || NUHCI == 0 342 aprint_error("%s: ohci or uhci probably not configured\n", 343 USBDEVNAME(sc->sc_bus.bdev)); 344 #endif 345 return (USBD_IOERROR); 346 } 347 if (sc->sc_ncomp > 0) { 348 aprint_normal("%s: companion controller%s, %d port%s each:", 349 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 350 EHCI_HCS_N_PCC(sparams), 351 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 352 for (i = 0; i < sc->sc_ncomp; i++) 353 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 354 aprint_normal("\n"); 355 } 356 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 357 cparams = EREAD4(sc, EHCI_HCCPARAMS); 358 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 359 360 if (EHCI_HCC_64BIT(cparams)) { 361 /* MUST clear segment register if 64 bit capable. */ 362 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 363 } 364 365 sc->sc_bus.usbrev = USBREV_2_0; 366 367 /* Reset the controller */ 368 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 369 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 370 usb_delay_ms(&sc->sc_bus, 1); 371 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 372 for (i = 0; i < 100; i++) { 373 usb_delay_ms(&sc->sc_bus, 1); 374 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 375 if (!hcr) 376 break; 377 } 378 if (hcr) { 379 aprint_error("%s: reset timeout\n", 380 USBDEVNAME(sc->sc_bus.bdev)); 381 return (USBD_IOERROR); 382 } 383 384 /* XXX need proper intr scheduling */ 385 sc->sc_rand = 96; 386 387 /* frame list size at default, read back what we got and use that */ 388 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 389 case 0: sc->sc_flsize = 1024; break; 390 case 1: sc->sc_flsize = 512; break; 391 case 2: sc->sc_flsize = 256; break; 392 case 3: return (USBD_IOERROR); 393 } 394 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 395 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 396 if (err) 397 return (err); 398 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 399 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 400 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 401 402 /* Set up the bus struct. */ 403 sc->sc_bus.methods = &ehci_bus_methods; 404 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 405 406 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 407 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 408 409 sc->sc_eintrs = EHCI_NORMAL_INTRS; 410 411 /* 412 * Allocate the interrupt dummy QHs. These are arranged to give poll 413 * intervals that are powers of 2 times 1ms. 414 */ 415 for (i = 0; i < EHCI_INTRQHS; i++) { 416 sqh = ehci_alloc_sqh(sc); 417 if (sqh == NULL) { 418 err = USBD_NOMEM; 419 goto bad1; 420 } 421 sc->sc_islots[i].sqh = sqh; 422 } 423 for (i = 0; i < EHCI_INTRQHS; i++) { 424 sqh = sc->sc_islots[i].sqh; 425 if (i == 0) { 426 /* The last (1ms) QH terminates. */ 427 sqh->qh.qh_link = EHCI_NULL; 428 sqh->next = NULL; 429 } else { 430 /* Otherwise the next QH has half the poll interval */ 431 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 432 sqh->qh.qh_link = htole32(sqh->next->physaddr | 433 EHCI_LINK_QH); 434 } 435 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 436 sqh->qh.qh_link = EHCI_NULL; 437 sqh->qh.qh_curqtd = EHCI_NULL; 438 sqh->next = NULL; 439 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 440 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 441 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 442 sqh->sqtd = NULL; 443 } 444 /* Point the frame list at the last level (128ms). */ 445 for (i = 0; i < sc->sc_flsize; i++) { 446 sc->sc_flist[i] = htole32(EHCI_LINK_QH | 447 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 448 i)].sqh->physaddr); 449 } 450 451 /* Allocate dummy QH that starts the async list. */ 452 sqh = ehci_alloc_sqh(sc); 453 if (sqh == NULL) { 454 err = USBD_NOMEM; 455 goto bad1; 456 } 457 /* Fill the QH */ 458 sqh->qh.qh_endp = 459 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 460 sqh->qh.qh_link = 461 htole32(sqh->physaddr | EHCI_LINK_QH); 462 sqh->qh.qh_curqtd = EHCI_NULL; 463 sqh->next = NULL; 464 /* Fill the overlay qTD */ 465 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 466 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 467 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 468 sqh->sqtd = NULL; 469 #ifdef EHCI_DEBUG 470 if (ehcidebug) { 471 ehci_dump_sqh(sqh); 472 } 473 #endif 474 475 /* Point to async list */ 476 sc->sc_async_head = sqh; 477 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 478 479 usb_callout_init(sc->sc_tmo_pcd); 480 481 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 482 483 /* Enable interrupts */ 484 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 485 486 /* Turn on controller */ 487 EOWRITE4(sc, EHCI_USBCMD, 488 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 489 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 490 EHCI_CMD_ASE | 491 EHCI_CMD_PSE | 492 EHCI_CMD_RS); 493 494 /* Take over port ownership */ 495 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 496 497 for (i = 0; i < 100; i++) { 498 usb_delay_ms(&sc->sc_bus, 1); 499 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 500 if (!hcr) 501 break; 502 } 503 if (hcr) { 504 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 505 return (USBD_IOERROR); 506 } 507 508 return (USBD_NORMAL_COMPLETION); 509 510 #if 0 511 bad2: 512 ehci_free_sqh(sc, sc->sc_async_head); 513 #endif 514 bad1: 515 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 516 return (err); 517 } 518 519 int 520 ehci_intr(void *v) 521 { 522 ehci_softc_t *sc = v; 523 524 if (sc == NULL || sc->sc_dying) 525 return (0); 526 527 /* If we get an interrupt while polling, then just ignore it. */ 528 if (sc->sc_bus.use_polling) { 529 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 530 531 if (intrs) 532 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 533 #ifdef DIAGNOSTIC 534 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 535 #endif 536 return (0); 537 } 538 539 return (ehci_intr1(sc)); 540 } 541 542 Static int 543 ehci_intr1(ehci_softc_t *sc) 544 { 545 u_int32_t intrs, eintrs; 546 547 DPRINTFN(20,("ehci_intr1: enter\n")); 548 549 /* In case the interrupt occurs before initialization has completed. */ 550 if (sc == NULL) { 551 #ifdef DIAGNOSTIC 552 printf("ehci_intr1: sc == NULL\n"); 553 #endif 554 return (0); 555 } 556 557 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 558 if (!intrs) 559 return (0); 560 561 eintrs = intrs & sc->sc_eintrs; 562 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 563 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 564 (u_int)eintrs)); 565 if (!eintrs) 566 return (0); 567 568 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 569 sc->sc_bus.intr_context++; 570 sc->sc_bus.no_intrs++; 571 if (eintrs & EHCI_STS_IAA) { 572 DPRINTF(("ehci_intr1: door bell\n")); 573 wakeup(&sc->sc_async_head); 574 eintrs &= ~EHCI_STS_IAA; 575 } 576 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 577 DPRINTFN(5,("ehci_intr1: %s %s\n", 578 eintrs & EHCI_STS_INT ? "INT" : "", 579 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 580 usb_schedsoftintr(&sc->sc_bus); 581 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 582 } 583 if (eintrs & EHCI_STS_HSE) { 584 printf("%s: unrecoverable error, controller halted\n", 585 USBDEVNAME(sc->sc_bus.bdev)); 586 /* XXX what else */ 587 } 588 if (eintrs & EHCI_STS_PCD) { 589 ehci_pcd(sc, sc->sc_intrxfer); 590 /* 591 * Disable PCD interrupt for now, because it will be 592 * on until the port has been reset. 593 */ 594 ehci_pcd_able(sc, 0); 595 /* Do not allow RHSC interrupts > 1 per second */ 596 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 597 eintrs &= ~EHCI_STS_PCD; 598 } 599 600 sc->sc_bus.intr_context--; 601 602 if (eintrs != 0) { 603 /* Block unprocessed interrupts. */ 604 sc->sc_eintrs &= ~eintrs; 605 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 606 printf("%s: blocking intrs 0x%x\n", 607 USBDEVNAME(sc->sc_bus.bdev), eintrs); 608 } 609 610 return (1); 611 } 612 613 void 614 ehci_pcd_able(ehci_softc_t *sc, int on) 615 { 616 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 617 if (on) 618 sc->sc_eintrs |= EHCI_STS_PCD; 619 else 620 sc->sc_eintrs &= ~EHCI_STS_PCD; 621 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 622 } 623 624 void 625 ehci_pcd_enable(void *v_sc) 626 { 627 ehci_softc_t *sc = v_sc; 628 629 ehci_pcd_able(sc, 1); 630 } 631 632 void 633 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 634 { 635 usbd_pipe_handle pipe; 636 u_char *p; 637 int i, m; 638 639 if (xfer == NULL) { 640 /* Just ignore the change. */ 641 return; 642 } 643 644 pipe = xfer->pipe; 645 646 p = KERNADDR(&xfer->dmabuf, 0); 647 m = min(sc->sc_noport, xfer->length * 8 - 1); 648 memset(p, 0, xfer->length); 649 for (i = 1; i <= m; i++) { 650 /* Pick out CHANGE bits from the status reg. */ 651 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 652 p[i/8] |= 1 << (i%8); 653 } 654 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 655 xfer->actlen = xfer->length; 656 xfer->status = USBD_NORMAL_COMPLETION; 657 658 usb_transfer_complete(xfer); 659 } 660 661 void 662 ehci_softintr(void *v) 663 { 664 ehci_softc_t *sc = v; 665 struct ehci_xfer *ex, *nextex; 666 667 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 668 sc->sc_bus.intr_context)); 669 670 sc->sc_bus.intr_context++; 671 672 /* 673 * The only explanation I can think of for why EHCI is as brain dead 674 * as UHCI interrupt-wise is that Intel was involved in both. 675 * An interrupt just tells us that something is done, we have no 676 * clue what, so we need to scan through all active transfers. :-( 677 */ 678 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 679 nextex = LIST_NEXT(ex, inext); 680 ehci_check_intr(sc, ex); 681 } 682 683 #ifdef USB_USE_SOFTINTR 684 if (sc->sc_softwake) { 685 sc->sc_softwake = 0; 686 wakeup(&sc->sc_softwake); 687 } 688 #endif /* USB_USE_SOFTINTR */ 689 690 sc->sc_bus.intr_context--; 691 } 692 693 /* Check for an interrupt. */ 694 void 695 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 696 { 697 ehci_soft_qtd_t *sqtd, *lsqtd; 698 u_int32_t status; 699 700 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 701 702 if (ex->sqtdstart == NULL) { 703 printf("ehci_check_intr: sqtdstart=NULL\n"); 704 return; 705 } 706 lsqtd = ex->sqtdend; 707 #ifdef DIAGNOSTIC 708 if (lsqtd == NULL) { 709 printf("ehci_check_intr: lsqtd==0\n"); 710 return; 711 } 712 #endif 713 /* 714 * If the last TD is still active we need to check whether there 715 * is a an error somewhere in the middle, or whether there was a 716 * short packet (SPD and not ACTIVE). 717 */ 718 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 719 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 720 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 721 status = le32toh(sqtd->qtd.qtd_status); 722 /* If there's an active QTD the xfer isn't done. */ 723 if (status & EHCI_QTD_ACTIVE) 724 break; 725 /* Any kind of error makes the xfer done. */ 726 if (status & EHCI_QTD_HALTED) 727 goto done; 728 /* We want short packets, and it is short: it's done */ 729 if (EHCI_QTD_GET_BYTES(status) != 0) 730 goto done; 731 } 732 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 733 ex, ex->sqtdstart)); 734 return; 735 } 736 done: 737 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 738 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 739 ehci_idone(ex); 740 } 741 742 void 743 ehci_idone(struct ehci_xfer *ex) 744 { 745 usbd_xfer_handle xfer = &ex->xfer; 746 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 747 ehci_soft_qtd_t *sqtd, *lsqtd; 748 u_int32_t status = 0, nstatus = 0; 749 int actlen; 750 uint pkts_left; 751 752 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 753 #ifdef DIAGNOSTIC 754 { 755 int s = splhigh(); 756 if (ex->isdone) { 757 splx(s); 758 #ifdef EHCI_DEBUG 759 printf("ehci_idone: ex is done!\n "); 760 ehci_dump_exfer(ex); 761 #else 762 printf("ehci_idone: ex=%p is done!\n", ex); 763 #endif 764 return; 765 } 766 ex->isdone = 1; 767 splx(s); 768 } 769 #endif 770 771 if (xfer->status == USBD_CANCELLED || 772 xfer->status == USBD_TIMEOUT) { 773 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 774 return; 775 } 776 777 #ifdef EHCI_DEBUG 778 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 779 if (ehcidebug > 10) 780 ehci_dump_sqtds(ex->sqtdstart); 781 #endif 782 783 /* The transfer is done, compute actual length and status. */ 784 lsqtd = ex->sqtdend; 785 actlen = 0; 786 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 787 nstatus = le32toh(sqtd->qtd.qtd_status); 788 if (nstatus & EHCI_QTD_ACTIVE) 789 break; 790 791 status = nstatus; 792 /* halt is ok if descriptor is last, and complete */ 793 if (sqtd->qtd.qtd_next == EHCI_NULL && 794 EHCI_QTD_GET_BYTES(status) == 0) 795 status &= ~EHCI_QTD_HALTED; 796 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 797 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 798 } 799 800 /* 801 * If there are left over TDs we need to update the toggle. 802 * The default pipe doesn't need it since control transfers 803 * start the toggle at 0 every time. 804 */ 805 if (sqtd != lsqtd->nextqtd && 806 xfer->pipe->device->default_pipe != xfer->pipe) { 807 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 808 #if 0 809 ehci_dump_sqh(epipe->sqh); 810 ehci_dump_sqtds(ex->sqtdstart); 811 #endif 812 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 813 } 814 815 /* 816 * For a short transfer we need to update the toggle for the missing 817 * packets within the qTD. 818 */ 819 pkts_left = EHCI_QTD_GET_BYTES(status) / 820 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 821 epipe->nexttoggle ^= pkts_left % 2; 822 823 status &= EHCI_QTD_STATERRS; 824 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 825 xfer->length, actlen, status)); 826 xfer->actlen = actlen; 827 if (status != 0) { 828 #ifdef EHCI_DEBUG 829 char sbuf[128]; 830 831 bitmask_snprintf((u_int32_t)status, 832 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 833 "\3MISSED", sbuf, sizeof(sbuf)); 834 835 DPRINTFN((status == EHCI_QTD_HALTED) ? 2 : 0, 836 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 837 "status 0x%s\n", 838 xfer->pipe->device->address, 839 xfer->pipe->endpoint->edesc->bEndpointAddress, 840 sbuf)); 841 if (ehcidebug > 2) { 842 ehci_dump_sqh(epipe->sqh); 843 ehci_dump_sqtds(ex->sqtdstart); 844 } 845 #endif 846 if (status == EHCI_QTD_HALTED) 847 xfer->status = USBD_STALLED; 848 else 849 xfer->status = USBD_IOERROR; /* more info XXX */ 850 } else { 851 xfer->status = USBD_NORMAL_COMPLETION; 852 } 853 854 usb_transfer_complete(xfer); 855 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 856 } 857 858 /* 859 * Wait here until controller claims to have an interrupt. 860 * Then call ehci_intr and return. Use timeout to avoid waiting 861 * too long. 862 */ 863 void 864 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 865 { 866 int timo = xfer->timeout; 867 int usecs; 868 u_int32_t intrs; 869 870 xfer->status = USBD_IN_PROGRESS; 871 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 872 usb_delay_ms(&sc->sc_bus, 1); 873 if (sc->sc_dying) 874 break; 875 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 876 sc->sc_eintrs; 877 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 878 #ifdef EHCI_DEBUG 879 if (ehcidebug > 15) 880 ehci_dump_regs(sc); 881 #endif 882 if (intrs) { 883 ehci_intr1(sc); 884 if (xfer->status != USBD_IN_PROGRESS) 885 return; 886 } 887 } 888 889 /* Timeout */ 890 DPRINTF(("ehci_waitintr: timeout\n")); 891 xfer->status = USBD_TIMEOUT; 892 usb_transfer_complete(xfer); 893 /* XXX should free TD */ 894 } 895 896 void 897 ehci_poll(struct usbd_bus *bus) 898 { 899 ehci_softc_t *sc = (ehci_softc_t *)bus; 900 #ifdef EHCI_DEBUG 901 static int last; 902 int new; 903 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 904 if (new != last) { 905 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 906 last = new; 907 } 908 #endif 909 910 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 911 ehci_intr1(sc); 912 } 913 914 int 915 ehci_detach(struct ehci_softc *sc, int flags) 916 { 917 int rv = 0; 918 919 if (sc->sc_child != NULL) 920 rv = config_detach(sc->sc_child, flags); 921 922 if (rv != 0) 923 return (rv); 924 925 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 926 927 if (sc->sc_powerhook != NULL) 928 powerhook_disestablish(sc->sc_powerhook); 929 if (sc->sc_shutdownhook != NULL) 930 shutdownhook_disestablish(sc->sc_shutdownhook); 931 932 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 933 934 /* XXX free other data structures XXX */ 935 936 return (rv); 937 } 938 939 940 int 941 ehci_activate(device_ptr_t self, enum devact act) 942 { 943 struct ehci_softc *sc = (struct ehci_softc *)self; 944 int rv = 0; 945 946 switch (act) { 947 case DVACT_ACTIVATE: 948 return (EOPNOTSUPP); 949 950 case DVACT_DEACTIVATE: 951 if (sc->sc_child != NULL) 952 rv = config_deactivate(sc->sc_child); 953 sc->sc_dying = 1; 954 break; 955 } 956 return (rv); 957 } 958 959 /* 960 * Handle suspend/resume. 961 * 962 * We need to switch to polling mode here, because this routine is 963 * called from an interrupt context. This is all right since we 964 * are almost suspended anyway. 965 */ 966 void 967 ehci_power(int why, void *v) 968 { 969 ehci_softc_t *sc = v; 970 u_int32_t cmd, hcr; 971 int s, i; 972 973 #ifdef EHCI_DEBUG 974 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 975 if (ehcidebug > 0) 976 ehci_dump_regs(sc); 977 #endif 978 979 s = splhardusb(); 980 switch (why) { 981 case PWR_SUSPEND: 982 case PWR_STANDBY: 983 sc->sc_bus.use_polling++; 984 985 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 986 987 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 988 EOWRITE4(sc, EHCI_USBCMD, cmd); 989 990 for (i = 0; i < 100; i++) { 991 hcr = EOREAD4(sc, EHCI_USBSTS) & 992 (EHCI_STS_ASS | EHCI_STS_PSS); 993 if (hcr == 0) 994 break; 995 996 usb_delay_ms(&sc->sc_bus, 1); 997 } 998 if (hcr != 0) { 999 printf("%s: reset timeout\n", 1000 USBDEVNAME(sc->sc_bus.bdev)); 1001 } 1002 1003 cmd &= ~EHCI_CMD_RS; 1004 EOWRITE4(sc, EHCI_USBCMD, cmd); 1005 1006 for (i = 0; i < 100; i++) { 1007 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1008 if (hcr == EHCI_STS_HCH) 1009 break; 1010 1011 usb_delay_ms(&sc->sc_bus, 1); 1012 } 1013 if (hcr != EHCI_STS_HCH) { 1014 printf("%s: config timeout\n", 1015 USBDEVNAME(sc->sc_bus.bdev)); 1016 } 1017 1018 sc->sc_bus.use_polling--; 1019 break; 1020 1021 case PWR_RESUME: 1022 sc->sc_bus.use_polling++; 1023 1024 /* restore things in case the bios sucks */ 1025 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1026 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1027 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1028 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1029 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1030 1031 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1032 1033 for (i = 0; i < 100; i++) { 1034 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1035 if (hcr != EHCI_STS_HCH) 1036 break; 1037 1038 usb_delay_ms(&sc->sc_bus, 1); 1039 } 1040 if (hcr == EHCI_STS_HCH) { 1041 printf("%s: config timeout\n", 1042 USBDEVNAME(sc->sc_bus.bdev)); 1043 } 1044 1045 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1046 1047 sc->sc_bus.use_polling--; 1048 break; 1049 case PWR_SOFTSUSPEND: 1050 case PWR_SOFTSTANDBY: 1051 case PWR_SOFTRESUME: 1052 break; 1053 } 1054 splx(s); 1055 1056 #ifdef EHCI_DEBUG 1057 DPRINTF(("ehci_power: sc=%p\n", sc)); 1058 if (ehcidebug > 0) 1059 ehci_dump_regs(sc); 1060 #endif 1061 } 1062 1063 /* 1064 * Shut down the controller when the system is going down. 1065 */ 1066 void 1067 ehci_shutdown(void *v) 1068 { 1069 ehci_softc_t *sc = v; 1070 1071 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1072 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1073 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1074 } 1075 1076 usbd_status 1077 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1078 { 1079 struct ehci_softc *sc = (struct ehci_softc *)bus; 1080 usbd_status err; 1081 1082 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1083 #ifdef EHCI_DEBUG 1084 if (err) 1085 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1086 #endif 1087 return (err); 1088 } 1089 1090 void 1091 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1092 { 1093 struct ehci_softc *sc = (struct ehci_softc *)bus; 1094 1095 usb_freemem(&sc->sc_bus, dma); 1096 } 1097 1098 usbd_xfer_handle 1099 ehci_allocx(struct usbd_bus *bus) 1100 { 1101 struct ehci_softc *sc = (struct ehci_softc *)bus; 1102 usbd_xfer_handle xfer; 1103 1104 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1105 if (xfer != NULL) { 1106 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1107 #ifdef DIAGNOSTIC 1108 if (xfer->busy_free != XFER_FREE) { 1109 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1110 xfer->busy_free); 1111 } 1112 #endif 1113 } else { 1114 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1115 } 1116 if (xfer != NULL) { 1117 memset(xfer, 0, sizeof(struct ehci_xfer)); 1118 #ifdef DIAGNOSTIC 1119 EXFER(xfer)->isdone = 1; 1120 xfer->busy_free = XFER_BUSY; 1121 #endif 1122 } 1123 return (xfer); 1124 } 1125 1126 void 1127 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1128 { 1129 struct ehci_softc *sc = (struct ehci_softc *)bus; 1130 1131 #ifdef DIAGNOSTIC 1132 if (xfer->busy_free != XFER_BUSY) { 1133 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1134 xfer->busy_free); 1135 return; 1136 } 1137 xfer->busy_free = XFER_FREE; 1138 if (!EXFER(xfer)->isdone) { 1139 printf("ehci_freex: !isdone\n"); 1140 return; 1141 } 1142 #endif 1143 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1144 } 1145 1146 Static void 1147 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1148 { 1149 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1150 1151 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1152 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1153 #ifdef USB_DEBUG 1154 if (ehcidebug) 1155 usbd_dump_pipe(pipe); 1156 #endif 1157 epipe->nexttoggle = 0; 1158 } 1159 1160 Static void 1161 ehci_noop(usbd_pipe_handle pipe) 1162 { 1163 } 1164 1165 #ifdef EHCI_DEBUG 1166 void 1167 ehci_dump_regs(ehci_softc_t *sc) 1168 { 1169 int i; 1170 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1171 EOREAD4(sc, EHCI_USBCMD), 1172 EOREAD4(sc, EHCI_USBSTS), 1173 EOREAD4(sc, EHCI_USBINTR)); 1174 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1175 EOREAD4(sc, EHCI_FRINDEX), 1176 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1177 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1178 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1179 for (i = 1; i <= sc->sc_noport; i++) 1180 printf("port %d status=0x%08x\n", i, 1181 EOREAD4(sc, EHCI_PORTSC(i))); 1182 } 1183 1184 /* 1185 * Unused function - this is meant to be called from a kernel 1186 * debugger. 1187 */ 1188 void 1189 ehci_dump() 1190 { 1191 ehci_dump_regs(theehci); 1192 } 1193 1194 void 1195 ehci_dump_link(ehci_link_t link, int type) 1196 { 1197 link = le32toh(link); 1198 printf("0x%08x", link); 1199 if (link & EHCI_LINK_TERMINATE) 1200 printf("<T>"); 1201 else { 1202 printf("<"); 1203 if (type) { 1204 switch (EHCI_LINK_TYPE(link)) { 1205 case EHCI_LINK_ITD: printf("ITD"); break; 1206 case EHCI_LINK_QH: printf("QH"); break; 1207 case EHCI_LINK_SITD: printf("SITD"); break; 1208 case EHCI_LINK_FSTN: printf("FSTN"); break; 1209 } 1210 } 1211 printf(">"); 1212 } 1213 } 1214 1215 void 1216 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1217 { 1218 int i; 1219 u_int32_t stop; 1220 1221 stop = 0; 1222 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1223 ehci_dump_sqtd(sqtd); 1224 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1225 } 1226 if (sqtd) 1227 printf("dump aborted, too many TDs\n"); 1228 } 1229 1230 void 1231 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1232 { 1233 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1234 ehci_dump_qtd(&sqtd->qtd); 1235 } 1236 1237 void 1238 ehci_dump_qtd(ehci_qtd_t *qtd) 1239 { 1240 u_int32_t s; 1241 char sbuf[128]; 1242 1243 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1244 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1245 printf("\n"); 1246 s = le32toh(qtd->qtd_status); 1247 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1248 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1249 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1250 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1251 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1252 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1253 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1254 EHCI_QTD_GET_PID(s), sbuf); 1255 for (s = 0; s < 5; s++) 1256 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1257 } 1258 1259 void 1260 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1261 { 1262 ehci_qh_t *qh = &sqh->qh; 1263 u_int32_t endp, endphub; 1264 1265 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1266 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1267 endp = le32toh(qh->qh_endp); 1268 printf(" endp=0x%08x\n", endp); 1269 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1270 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1271 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1272 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1273 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1274 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1275 EHCI_QH_GET_NRL(endp)); 1276 endphub = le32toh(qh->qh_endphub); 1277 printf(" endphub=0x%08x\n", endphub); 1278 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1279 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1280 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1281 EHCI_QH_GET_MULT(endphub)); 1282 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1283 printf("Overlay qTD:\n"); 1284 ehci_dump_qtd(&qh->qh_qtd); 1285 } 1286 1287 #ifdef DIAGNOSTIC 1288 Static void 1289 ehci_dump_exfer(struct ehci_xfer *ex) 1290 { 1291 printf("ehci_dump_exfer: ex=%p\n", ex); 1292 } 1293 #endif 1294 #endif 1295 1296 usbd_status 1297 ehci_open(usbd_pipe_handle pipe) 1298 { 1299 usbd_device_handle dev = pipe->device; 1300 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1301 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1302 u_int8_t addr = dev->address; 1303 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1304 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1305 ehci_soft_qh_t *sqh; 1306 usbd_status err; 1307 int s; 1308 int ival, speed, naks; 1309 int hshubaddr, hshubport; 1310 1311 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1312 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1313 1314 if (dev->myhsport) { 1315 hshubaddr = dev->myhsport->parent->address; 1316 hshubport = dev->myhsport->portno; 1317 } else { 1318 hshubaddr = 0; 1319 hshubport = 0; 1320 } 1321 1322 if (sc->sc_dying) 1323 return (USBD_IOERROR); 1324 1325 epipe->nexttoggle = 0; 1326 1327 if (addr == sc->sc_addr) { 1328 switch (ed->bEndpointAddress) { 1329 case USB_CONTROL_ENDPOINT: 1330 pipe->methods = &ehci_root_ctrl_methods; 1331 break; 1332 case UE_DIR_IN | EHCI_INTR_ENDPT: 1333 pipe->methods = &ehci_root_intr_methods; 1334 break; 1335 default: 1336 return (USBD_INVAL); 1337 } 1338 return (USBD_NORMAL_COMPLETION); 1339 } 1340 1341 /* XXX All this stuff is only valid for async. */ 1342 switch (dev->speed) { 1343 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1344 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1345 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1346 default: panic("ehci_open: bad device speed %d", dev->speed); 1347 } 1348 if (speed != EHCI_QH_SPEED_HIGH) { 1349 printf("%s: *** WARNING: opening low/full speed device, this " 1350 "does not work yet.\n", 1351 USBDEVNAME(sc->sc_bus.bdev)); 1352 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1353 hshubaddr, hshubport)); 1354 if (xfertype != UE_CONTROL) 1355 return USBD_INVAL; 1356 } 1357 1358 naks = 8; /* XXX */ 1359 sqh = ehci_alloc_sqh(sc); 1360 if (sqh == NULL) 1361 goto bad0; 1362 /* qh_link filled when the QH is added */ 1363 sqh->qh.qh_endp = htole32( 1364 EHCI_QH_SET_ADDR(addr) | 1365 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1366 EHCI_QH_SET_EPS(speed) | 1367 EHCI_QH_DTC | 1368 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1369 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1370 EHCI_QH_CTL : 0) | 1371 EHCI_QH_SET_NRL(naks) 1372 ); 1373 sqh->qh.qh_endphub = htole32( 1374 EHCI_QH_SET_MULT(1) | 1375 EHCI_QH_SET_HUBA(hshubaddr) | 1376 EHCI_QH_SET_PORT(hshubport) | 1377 EHCI_QH_SET_CMASK(0xf0) | /* XXX */ 1378 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0) 1379 ); 1380 sqh->qh.qh_curqtd = EHCI_NULL; 1381 /* Fill the overlay qTD */ 1382 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1383 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1384 sqh->qh.qh_qtd.qtd_status = htole32(0); 1385 1386 epipe->sqh = sqh; 1387 1388 switch (xfertype) { 1389 case UE_CONTROL: 1390 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1391 0, &epipe->u.ctl.reqdma); 1392 #ifdef EHCI_DEBUG 1393 if (err) 1394 printf("ehci_open: usb_allocmem()=%d\n", err); 1395 #endif 1396 if (err) 1397 goto bad1; 1398 pipe->methods = &ehci_device_ctrl_methods; 1399 s = splusb(); 1400 ehci_add_qh(sqh, sc->sc_async_head); 1401 splx(s); 1402 break; 1403 case UE_BULK: 1404 pipe->methods = &ehci_device_bulk_methods; 1405 s = splusb(); 1406 ehci_add_qh(sqh, sc->sc_async_head); 1407 splx(s); 1408 break; 1409 case UE_INTERRUPT: 1410 pipe->methods = &ehci_device_intr_methods; 1411 ival = pipe->interval; 1412 if (ival == USBD_DEFAULT_INTERVAL) 1413 ival = ed->bInterval; 1414 return (ehci_device_setintr(sc, sqh, ival)); 1415 case UE_ISOCHRONOUS: 1416 pipe->methods = &ehci_device_isoc_methods; 1417 return (USBD_INVAL); 1418 default: 1419 return (USBD_INVAL); 1420 } 1421 return (USBD_NORMAL_COMPLETION); 1422 1423 bad1: 1424 ehci_free_sqh(sc, sqh); 1425 bad0: 1426 return (USBD_NOMEM); 1427 } 1428 1429 /* 1430 * Add an ED to the schedule. Called at splusb(). 1431 */ 1432 void 1433 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1434 { 1435 SPLUSBCHECK; 1436 1437 sqh->next = head->next; 1438 sqh->qh.qh_link = head->qh.qh_link; 1439 head->next = sqh; 1440 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1441 1442 #ifdef EHCI_DEBUG 1443 if (ehcidebug > 5) { 1444 printf("ehci_add_qh:\n"); 1445 ehci_dump_sqh(sqh); 1446 } 1447 #endif 1448 } 1449 1450 /* 1451 * Remove an ED from the schedule. Called at splusb(). 1452 */ 1453 void 1454 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1455 { 1456 ehci_soft_qh_t *p; 1457 1458 SPLUSBCHECK; 1459 /* XXX */ 1460 for (p = head; p != NULL && p->next != sqh; p = p->next) 1461 ; 1462 if (p == NULL) 1463 panic("ehci_rem_qh: ED not found"); 1464 p->next = sqh->next; 1465 p->qh.qh_link = sqh->qh.qh_link; 1466 1467 ehci_sync_hc(sc); 1468 } 1469 1470 void 1471 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1472 { 1473 int i; 1474 u_int32_t status; 1475 1476 /* Save toggle bit and ping status. */ 1477 status = sqh->qh.qh_qtd.qtd_status & 1478 htole32(EHCI_QTD_TOGGLE_MASK | 1479 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1480 /* Set HALTED to make hw leave it alone. */ 1481 sqh->qh.qh_qtd.qtd_status = 1482 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1483 sqh->qh.qh_curqtd = 0; 1484 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1485 sqh->qh.qh_qtd.qtd_altnext = 0; 1486 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1487 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1488 sqh->sqtd = sqtd; 1489 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1490 sqh->qh.qh_qtd.qtd_status = status; 1491 } 1492 1493 /* 1494 * Ensure that the HC has released all references to the QH. We do this 1495 * by asking for a Async Advance Doorbell interrupt and then we wait for 1496 * the interrupt. 1497 * To make this easier we first obtain exclusive use of the doorbell. 1498 */ 1499 void 1500 ehci_sync_hc(ehci_softc_t *sc) 1501 { 1502 int s, error; 1503 1504 if (sc->sc_dying) { 1505 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1506 return; 1507 } 1508 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1509 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1510 s = splhardusb(); 1511 /* ask for doorbell */ 1512 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1513 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1514 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1515 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1516 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1517 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1518 splx(s); 1519 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1520 #ifdef DIAGNOSTIC 1521 if (error) 1522 printf("ehci_sync_hc: tsleep() = %d\n", error); 1523 #endif 1524 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1525 } 1526 1527 /***********/ 1528 1529 /* 1530 * Data structures and routines to emulate the root hub. 1531 */ 1532 Static usb_device_descriptor_t ehci_devd = { 1533 USB_DEVICE_DESCRIPTOR_SIZE, 1534 UDESC_DEVICE, /* type */ 1535 {0x00, 0x02}, /* USB version */ 1536 UDCLASS_HUB, /* class */ 1537 UDSUBCLASS_HUB, /* subclass */ 1538 UDPROTO_HSHUBSTT, /* protocol */ 1539 64, /* max packet */ 1540 {0},{0},{0x00,0x01}, /* device id */ 1541 1,2,0, /* string indicies */ 1542 1 /* # of configurations */ 1543 }; 1544 1545 Static usb_device_qualifier_t ehci_odevd = { 1546 USB_DEVICE_DESCRIPTOR_SIZE, 1547 UDESC_DEVICE_QUALIFIER, /* type */ 1548 {0x00, 0x02}, /* USB version */ 1549 UDCLASS_HUB, /* class */ 1550 UDSUBCLASS_HUB, /* subclass */ 1551 UDPROTO_FSHUB, /* protocol */ 1552 64, /* max packet */ 1553 1, /* # of configurations */ 1554 0 1555 }; 1556 1557 Static usb_config_descriptor_t ehci_confd = { 1558 USB_CONFIG_DESCRIPTOR_SIZE, 1559 UDESC_CONFIG, 1560 {USB_CONFIG_DESCRIPTOR_SIZE + 1561 USB_INTERFACE_DESCRIPTOR_SIZE + 1562 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1563 1, 1564 1, 1565 0, 1566 UC_SELF_POWERED, 1567 0 /* max power */ 1568 }; 1569 1570 Static usb_interface_descriptor_t ehci_ifcd = { 1571 USB_INTERFACE_DESCRIPTOR_SIZE, 1572 UDESC_INTERFACE, 1573 0, 1574 0, 1575 1, 1576 UICLASS_HUB, 1577 UISUBCLASS_HUB, 1578 UIPROTO_HSHUBSTT, 1579 0 1580 }; 1581 1582 Static usb_endpoint_descriptor_t ehci_endpd = { 1583 USB_ENDPOINT_DESCRIPTOR_SIZE, 1584 UDESC_ENDPOINT, 1585 UE_DIR_IN | EHCI_INTR_ENDPT, 1586 UE_INTERRUPT, 1587 {8, 0}, /* max packet */ 1588 255 1589 }; 1590 1591 Static usb_hub_descriptor_t ehci_hubd = { 1592 USB_HUB_DESCRIPTOR_SIZE, 1593 UDESC_HUB, 1594 0, 1595 {0,0}, 1596 0, 1597 0, 1598 {0}, 1599 }; 1600 1601 Static int 1602 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1603 { 1604 int i; 1605 1606 if (l == 0) 1607 return (0); 1608 p->bLength = 2 * strlen(s) + 2; 1609 if (l == 1) 1610 return (1); 1611 p->bDescriptorType = UDESC_STRING; 1612 l -= 2; 1613 for (i = 0; s[i] && l > 1; i++, l -= 2) 1614 USETW2(p->bString[i], 0, s[i]); 1615 return (2*i+2); 1616 } 1617 1618 /* 1619 * Simulate a hardware hub by handling all the necessary requests. 1620 */ 1621 Static usbd_status 1622 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1623 { 1624 usbd_status err; 1625 1626 /* Insert last in queue. */ 1627 err = usb_insert_transfer(xfer); 1628 if (err) 1629 return (err); 1630 1631 /* Pipe isn't running, start first */ 1632 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1633 } 1634 1635 Static usbd_status 1636 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1637 { 1638 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1639 usb_device_request_t *req; 1640 void *buf = NULL; 1641 int port, i; 1642 int s, len, value, index, l, totlen = 0; 1643 usb_port_status_t ps; 1644 usb_hub_descriptor_t hubd; 1645 usbd_status err; 1646 u_int32_t v; 1647 1648 if (sc->sc_dying) 1649 return (USBD_IOERROR); 1650 1651 #ifdef DIAGNOSTIC 1652 if (!(xfer->rqflags & URQ_REQUEST)) 1653 /* XXX panic */ 1654 return (USBD_INVAL); 1655 #endif 1656 req = &xfer->request; 1657 1658 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1659 req->bmRequestType, req->bRequest)); 1660 1661 len = UGETW(req->wLength); 1662 value = UGETW(req->wValue); 1663 index = UGETW(req->wIndex); 1664 1665 if (len != 0) 1666 buf = KERNADDR(&xfer->dmabuf, 0); 1667 1668 #define C(x,y) ((x) | ((y) << 8)) 1669 switch(C(req->bRequest, req->bmRequestType)) { 1670 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1671 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1672 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1673 /* 1674 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1675 * for the integrated root hub. 1676 */ 1677 break; 1678 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1679 if (len > 0) { 1680 *(u_int8_t *)buf = sc->sc_conf; 1681 totlen = 1; 1682 } 1683 break; 1684 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1685 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1686 switch(value >> 8) { 1687 case UDESC_DEVICE: 1688 if ((value & 0xff) != 0) { 1689 err = USBD_IOERROR; 1690 goto ret; 1691 } 1692 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1693 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1694 memcpy(buf, &ehci_devd, l); 1695 break; 1696 /* 1697 * We can't really operate at another speed, but the spec says 1698 * we need this descriptor. 1699 */ 1700 case UDESC_DEVICE_QUALIFIER: 1701 if ((value & 0xff) != 0) { 1702 err = USBD_IOERROR; 1703 goto ret; 1704 } 1705 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1706 memcpy(buf, &ehci_odevd, l); 1707 break; 1708 /* 1709 * We can't really operate at another speed, but the spec says 1710 * we need this descriptor. 1711 */ 1712 case UDESC_OTHER_SPEED_CONFIGURATION: 1713 case UDESC_CONFIG: 1714 if ((value & 0xff) != 0) { 1715 err = USBD_IOERROR; 1716 goto ret; 1717 } 1718 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1719 memcpy(buf, &ehci_confd, l); 1720 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1721 value >> 8; 1722 buf = (char *)buf + l; 1723 len -= l; 1724 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1725 totlen += l; 1726 memcpy(buf, &ehci_ifcd, l); 1727 buf = (char *)buf + l; 1728 len -= l; 1729 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1730 totlen += l; 1731 memcpy(buf, &ehci_endpd, l); 1732 break; 1733 case UDESC_STRING: 1734 if (len == 0) 1735 break; 1736 *(u_int8_t *)buf = 0; 1737 totlen = 1; 1738 switch (value & 0xff) { 1739 case 0: /* Language table */ 1740 totlen = ehci_str(buf, len, "\001"); 1741 break; 1742 case 1: /* Vendor */ 1743 totlen = ehci_str(buf, len, sc->sc_vendor); 1744 break; 1745 case 2: /* Product */ 1746 totlen = ehci_str(buf, len, "EHCI root hub"); 1747 break; 1748 } 1749 break; 1750 default: 1751 err = USBD_IOERROR; 1752 goto ret; 1753 } 1754 break; 1755 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1756 if (len > 0) { 1757 *(u_int8_t *)buf = 0; 1758 totlen = 1; 1759 } 1760 break; 1761 case C(UR_GET_STATUS, UT_READ_DEVICE): 1762 if (len > 1) { 1763 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1764 totlen = 2; 1765 } 1766 break; 1767 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1768 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1769 if (len > 1) { 1770 USETW(((usb_status_t *)buf)->wStatus, 0); 1771 totlen = 2; 1772 } 1773 break; 1774 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1775 if (value >= USB_MAX_DEVICES) { 1776 err = USBD_IOERROR; 1777 goto ret; 1778 } 1779 sc->sc_addr = value; 1780 break; 1781 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1782 if (value != 0 && value != 1) { 1783 err = USBD_IOERROR; 1784 goto ret; 1785 } 1786 sc->sc_conf = value; 1787 break; 1788 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1789 break; 1790 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1791 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1792 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1793 err = USBD_IOERROR; 1794 goto ret; 1795 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1796 break; 1797 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1798 break; 1799 /* Hub requests */ 1800 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1801 break; 1802 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1803 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1804 "port=%d feature=%d\n", 1805 index, value)); 1806 if (index < 1 || index > sc->sc_noport) { 1807 err = USBD_IOERROR; 1808 goto ret; 1809 } 1810 port = EHCI_PORTSC(index); 1811 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1812 switch(value) { 1813 case UHF_PORT_ENABLE: 1814 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1815 break; 1816 case UHF_PORT_SUSPEND: 1817 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1818 break; 1819 case UHF_PORT_POWER: 1820 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1821 break; 1822 case UHF_PORT_TEST: 1823 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1824 "%d\n", index)); 1825 break; 1826 case UHF_PORT_INDICATOR: 1827 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1828 "%d\n", index)); 1829 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1830 break; 1831 case UHF_C_PORT_CONNECTION: 1832 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1833 break; 1834 case UHF_C_PORT_ENABLE: 1835 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1836 break; 1837 case UHF_C_PORT_SUSPEND: 1838 /* how? */ 1839 break; 1840 case UHF_C_PORT_OVER_CURRENT: 1841 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1842 break; 1843 case UHF_C_PORT_RESET: 1844 sc->sc_isreset = 0; 1845 break; 1846 default: 1847 err = USBD_IOERROR; 1848 goto ret; 1849 } 1850 #if 0 1851 switch(value) { 1852 case UHF_C_PORT_CONNECTION: 1853 case UHF_C_PORT_ENABLE: 1854 case UHF_C_PORT_SUSPEND: 1855 case UHF_C_PORT_OVER_CURRENT: 1856 case UHF_C_PORT_RESET: 1857 /* Enable RHSC interrupt if condition is cleared. */ 1858 if ((OREAD4(sc, port) >> 16) == 0) 1859 ehci_pcd_able(sc, 1); 1860 break; 1861 default: 1862 break; 1863 } 1864 #endif 1865 break; 1866 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1867 if ((value & 0xff) != 0) { 1868 err = USBD_IOERROR; 1869 goto ret; 1870 } 1871 hubd = ehci_hubd; 1872 hubd.bNbrPorts = sc->sc_noport; 1873 v = EOREAD4(sc, EHCI_HCSPARAMS); 1874 USETW(hubd.wHubCharacteristics, 1875 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1876 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1877 ? UHD_PORT_IND : 0); 1878 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1879 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1880 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1881 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1882 l = min(len, hubd.bDescLength); 1883 totlen = l; 1884 memcpy(buf, &hubd, l); 1885 break; 1886 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1887 if (len != 4) { 1888 err = USBD_IOERROR; 1889 goto ret; 1890 } 1891 memset(buf, 0, len); /* ? XXX */ 1892 totlen = len; 1893 break; 1894 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1895 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1896 index)); 1897 if (index < 1 || index > sc->sc_noport) { 1898 err = USBD_IOERROR; 1899 goto ret; 1900 } 1901 if (len != 4) { 1902 err = USBD_IOERROR; 1903 goto ret; 1904 } 1905 v = EOREAD4(sc, EHCI_PORTSC(index)); 1906 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1907 v)); 1908 i = UPS_HIGH_SPEED; 1909 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1910 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1911 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1912 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1913 if (v & EHCI_PS_PR) i |= UPS_RESET; 1914 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1915 USETW(ps.wPortStatus, i); 1916 i = 0; 1917 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1918 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1919 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1920 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1921 USETW(ps.wPortChange, i); 1922 l = min(len, sizeof ps); 1923 memcpy(buf, &ps, l); 1924 totlen = l; 1925 break; 1926 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1927 err = USBD_IOERROR; 1928 goto ret; 1929 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1930 break; 1931 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1932 if (index < 1 || index > sc->sc_noport) { 1933 err = USBD_IOERROR; 1934 goto ret; 1935 } 1936 port = EHCI_PORTSC(index); 1937 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1938 switch(value) { 1939 case UHF_PORT_ENABLE: 1940 EOWRITE4(sc, port, v | EHCI_PS_PE); 1941 break; 1942 case UHF_PORT_SUSPEND: 1943 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1944 break; 1945 case UHF_PORT_RESET: 1946 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1947 index)); 1948 if (EHCI_PS_IS_LOWSPEED(v)) { 1949 /* Low speed device, give up ownership. */ 1950 ehci_disown(sc, index, 1); 1951 break; 1952 } 1953 /* Start reset sequence. */ 1954 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1955 EOWRITE4(sc, port, v | EHCI_PS_PR); 1956 /* Wait for reset to complete. */ 1957 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1958 if (sc->sc_dying) { 1959 err = USBD_IOERROR; 1960 goto ret; 1961 } 1962 /* Terminate reset sequence. */ 1963 EOWRITE4(sc, port, v); 1964 /* Wait for HC to complete reset. */ 1965 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1966 if (sc->sc_dying) { 1967 err = USBD_IOERROR; 1968 goto ret; 1969 } 1970 v = EOREAD4(sc, port); 1971 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1972 if (v & EHCI_PS_PR) { 1973 printf("%s: port reset timeout\n", 1974 USBDEVNAME(sc->sc_bus.bdev)); 1975 return (USBD_TIMEOUT); 1976 } 1977 if (!(v & EHCI_PS_PE)) { 1978 /* Not a high speed device, give up ownership.*/ 1979 ehci_disown(sc, index, 0); 1980 break; 1981 } 1982 sc->sc_isreset = 1; 1983 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1984 index, v)); 1985 break; 1986 case UHF_PORT_POWER: 1987 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 1988 "%d\n", index)); 1989 EOWRITE4(sc, port, v | EHCI_PS_PP); 1990 break; 1991 case UHF_PORT_TEST: 1992 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 1993 "%d\n", index)); 1994 break; 1995 case UHF_PORT_INDICATOR: 1996 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 1997 "%d\n", index)); 1998 EOWRITE4(sc, port, v | EHCI_PS_PIC); 1999 break; 2000 default: 2001 err = USBD_IOERROR; 2002 goto ret; 2003 } 2004 break; 2005 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2006 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2007 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2008 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2009 break; 2010 default: 2011 err = USBD_IOERROR; 2012 goto ret; 2013 } 2014 xfer->actlen = totlen; 2015 err = USBD_NORMAL_COMPLETION; 2016 ret: 2017 xfer->status = err; 2018 s = splusb(); 2019 usb_transfer_complete(xfer); 2020 splx(s); 2021 return (USBD_IN_PROGRESS); 2022 } 2023 2024 void 2025 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2026 { 2027 int port; 2028 u_int32_t v; 2029 2030 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2031 #ifdef DIAGNOSTIC 2032 if (sc->sc_npcomp != 0) { 2033 int i = (index-1) / sc->sc_npcomp; 2034 if (i >= sc->sc_ncomp) 2035 printf("%s: strange port\n", 2036 USBDEVNAME(sc->sc_bus.bdev)); 2037 else 2038 printf("%s: handing over %s speed device on " 2039 "port %d to %s\n", 2040 USBDEVNAME(sc->sc_bus.bdev), 2041 lowspeed ? "low" : "full", 2042 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2043 } else { 2044 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2045 } 2046 #endif 2047 port = EHCI_PORTSC(index); 2048 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2049 EOWRITE4(sc, port, v | EHCI_PS_PO); 2050 } 2051 2052 /* Abort a root control request. */ 2053 Static void 2054 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2055 { 2056 /* Nothing to do, all transfers are synchronous. */ 2057 } 2058 2059 /* Close the root pipe. */ 2060 Static void 2061 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2062 { 2063 DPRINTF(("ehci_root_ctrl_close\n")); 2064 /* Nothing to do. */ 2065 } 2066 2067 void 2068 ehci_root_intr_done(usbd_xfer_handle xfer) 2069 { 2070 xfer->hcpriv = NULL; 2071 } 2072 2073 Static usbd_status 2074 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2075 { 2076 usbd_status err; 2077 2078 /* Insert last in queue. */ 2079 err = usb_insert_transfer(xfer); 2080 if (err) 2081 return (err); 2082 2083 /* Pipe isn't running, start first */ 2084 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2085 } 2086 2087 Static usbd_status 2088 ehci_root_intr_start(usbd_xfer_handle xfer) 2089 { 2090 usbd_pipe_handle pipe = xfer->pipe; 2091 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2092 2093 if (sc->sc_dying) 2094 return (USBD_IOERROR); 2095 2096 sc->sc_intrxfer = xfer; 2097 2098 return (USBD_IN_PROGRESS); 2099 } 2100 2101 /* Abort a root interrupt request. */ 2102 Static void 2103 ehci_root_intr_abort(usbd_xfer_handle xfer) 2104 { 2105 int s; 2106 2107 if (xfer->pipe->intrxfer == xfer) { 2108 DPRINTF(("ehci_root_intr_abort: remove\n")); 2109 xfer->pipe->intrxfer = NULL; 2110 } 2111 xfer->status = USBD_CANCELLED; 2112 s = splusb(); 2113 usb_transfer_complete(xfer); 2114 splx(s); 2115 } 2116 2117 /* Close the root pipe. */ 2118 Static void 2119 ehci_root_intr_close(usbd_pipe_handle pipe) 2120 { 2121 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2122 2123 DPRINTF(("ehci_root_intr_close\n")); 2124 2125 sc->sc_intrxfer = NULL; 2126 } 2127 2128 void 2129 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2130 { 2131 xfer->hcpriv = NULL; 2132 } 2133 2134 /************************/ 2135 2136 ehci_soft_qh_t * 2137 ehci_alloc_sqh(ehci_softc_t *sc) 2138 { 2139 ehci_soft_qh_t *sqh; 2140 usbd_status err; 2141 int i, offs; 2142 usb_dma_t dma; 2143 2144 if (sc->sc_freeqhs == NULL) { 2145 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2146 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2147 EHCI_PAGE_SIZE, &dma); 2148 #ifdef EHCI_DEBUG 2149 if (err) 2150 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2151 #endif 2152 if (err) 2153 return (NULL); 2154 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2155 offs = i * EHCI_SQH_SIZE; 2156 sqh = KERNADDR(&dma, offs); 2157 sqh->physaddr = DMAADDR(&dma, offs); 2158 sqh->next = sc->sc_freeqhs; 2159 sc->sc_freeqhs = sqh; 2160 } 2161 } 2162 sqh = sc->sc_freeqhs; 2163 sc->sc_freeqhs = sqh->next; 2164 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2165 sqh->next = NULL; 2166 return (sqh); 2167 } 2168 2169 void 2170 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2171 { 2172 sqh->next = sc->sc_freeqhs; 2173 sc->sc_freeqhs = sqh; 2174 } 2175 2176 ehci_soft_qtd_t * 2177 ehci_alloc_sqtd(ehci_softc_t *sc) 2178 { 2179 ehci_soft_qtd_t *sqtd; 2180 usbd_status err; 2181 int i, offs; 2182 usb_dma_t dma; 2183 int s; 2184 2185 if (sc->sc_freeqtds == NULL) { 2186 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2187 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2188 EHCI_PAGE_SIZE, &dma); 2189 #ifdef EHCI_DEBUG 2190 if (err) 2191 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2192 #endif 2193 if (err) 2194 return (NULL); 2195 s = splusb(); 2196 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2197 offs = i * EHCI_SQTD_SIZE; 2198 sqtd = KERNADDR(&dma, offs); 2199 sqtd->physaddr = DMAADDR(&dma, offs); 2200 sqtd->nextqtd = sc->sc_freeqtds; 2201 sc->sc_freeqtds = sqtd; 2202 } 2203 splx(s); 2204 } 2205 2206 s = splusb(); 2207 sqtd = sc->sc_freeqtds; 2208 sc->sc_freeqtds = sqtd->nextqtd; 2209 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2210 sqtd->nextqtd = NULL; 2211 sqtd->xfer = NULL; 2212 splx(s); 2213 2214 return (sqtd); 2215 } 2216 2217 void 2218 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2219 { 2220 int s; 2221 2222 s = splusb(); 2223 sqtd->nextqtd = sc->sc_freeqtds; 2224 sc->sc_freeqtds = sqtd; 2225 splx(s); 2226 } 2227 2228 usbd_status 2229 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2230 int alen, int rd, usbd_xfer_handle xfer, 2231 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2232 { 2233 ehci_soft_qtd_t *next, *cur; 2234 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2235 u_int32_t qtdstatus; 2236 int len, curlen, mps; 2237 int i, tog; 2238 usb_dma_t *dma = &xfer->dmabuf; 2239 2240 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2241 2242 len = alen; 2243 dataphys = DMAADDR(dma, 0); 2244 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2245 #if 0 2246 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2247 epipe->nexttoggle); 2248 #endif 2249 qtdstatus = EHCI_QTD_ACTIVE | 2250 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2251 EHCI_QTD_SET_CERR(3) 2252 /* IOC set below */ 2253 /* BYTES set below */ 2254 ; 2255 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2256 tog = epipe->nexttoggle; 2257 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2258 2259 cur = ehci_alloc_sqtd(sc); 2260 *sp = cur; 2261 if (cur == NULL) 2262 goto nomem; 2263 for (;;) { 2264 dataphyspage = EHCI_PAGE(dataphys); 2265 /* The EHCI hardware can handle at most 5 pages. */ 2266 if (dataphyslastpage - dataphyspage < 2267 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2268 /* we can handle it in this QTD */ 2269 curlen = len; 2270 } else { 2271 /* must use multiple TDs, fill as much as possible. */ 2272 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2273 EHCI_PAGE_OFFSET(dataphys); 2274 #ifdef DIAGNOSTIC 2275 if (curlen > len) { 2276 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2277 "len=0x%x offs=0x%x\n", curlen, len, 2278 EHCI_PAGE_OFFSET(dataphys)); 2279 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2280 dataphyslastpage, dataphyspage, 2281 dataphys); 2282 curlen = len; 2283 } 2284 #endif 2285 /* the length must be a multiple of the max size */ 2286 curlen -= curlen % mps; 2287 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2288 "curlen=%d\n", curlen)); 2289 #ifdef DIAGNOSTIC 2290 if (curlen == 0) 2291 panic("ehci_alloc_std: curlen == 0"); 2292 #endif 2293 } 2294 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2295 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2296 dataphys, dataphyslastpage, 2297 len, curlen)); 2298 len -= curlen; 2299 2300 if (len != 0) { 2301 next = ehci_alloc_sqtd(sc); 2302 if (next == NULL) 2303 goto nomem; 2304 nextphys = htole32(next->physaddr); 2305 } else { 2306 next = NULL; 2307 nextphys = EHCI_NULL; 2308 } 2309 2310 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2311 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2312 if (i != 0) /* use offset only in first buffer */ 2313 a = EHCI_PAGE(a); 2314 cur->qtd.qtd_buffer[i] = htole32(a); 2315 cur->qtd.qtd_buffer_hi[i] = 0; 2316 #ifdef DIAGNOSTIC 2317 if (i >= EHCI_QTD_NBUFFERS) { 2318 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2319 goto nomem; 2320 } 2321 #endif 2322 } 2323 cur->nextqtd = next; 2324 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2325 cur->qtd.qtd_status = 2326 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2327 cur->xfer = xfer; 2328 cur->len = curlen; 2329 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2330 dataphys, dataphys + curlen)); 2331 /* adjust the toggle based on the number of packets in this 2332 qtd */ 2333 if (((curlen + mps - 1) / mps) & 1) { 2334 tog ^= 1; 2335 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2336 } 2337 if (len == 0) 2338 break; 2339 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2340 dataphys += curlen; 2341 cur = next; 2342 } 2343 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2344 *ep = cur; 2345 epipe->nexttoggle = tog; 2346 2347 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2348 *sp, *ep)); 2349 2350 return (USBD_NORMAL_COMPLETION); 2351 2352 nomem: 2353 /* XXX free chain */ 2354 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2355 return (USBD_NOMEM); 2356 } 2357 2358 Static void 2359 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2360 ehci_soft_qtd_t *sqtdend) 2361 { 2362 ehci_soft_qtd_t *p; 2363 int i; 2364 2365 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2366 sqtd, sqtdend)); 2367 2368 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2369 p = sqtd->nextqtd; 2370 ehci_free_sqtd(sc, sqtd); 2371 } 2372 } 2373 2374 /****************/ 2375 2376 /* 2377 * Close a reqular pipe. 2378 * Assumes that there are no pending transactions. 2379 */ 2380 void 2381 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2382 { 2383 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2384 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2385 ehci_soft_qh_t *sqh = epipe->sqh; 2386 int s; 2387 2388 s = splusb(); 2389 ehci_rem_qh(sc, sqh, head); 2390 splx(s); 2391 ehci_free_sqh(sc, epipe->sqh); 2392 } 2393 2394 /* 2395 * Abort a device request. 2396 * If this routine is called at splusb() it guarantees that the request 2397 * will be removed from the hardware scheduling and that the callback 2398 * for it will be called with USBD_CANCELLED status. 2399 * It's impossible to guarantee that the requested transfer will not 2400 * have happened since the hardware runs concurrently. 2401 * If the transaction has already happened we rely on the ordinary 2402 * interrupt processing to process it. 2403 * XXX This is most probably wrong. 2404 */ 2405 void 2406 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2407 { 2408 #define exfer EXFER(xfer) 2409 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2410 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2411 ehci_soft_qh_t *sqh = epipe->sqh; 2412 ehci_soft_qtd_t *sqtd; 2413 ehci_physaddr_t cur; 2414 u_int32_t qhstatus; 2415 int s; 2416 int hit; 2417 2418 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2419 2420 if (sc->sc_dying) { 2421 /* If we're dying, just do the software part. */ 2422 s = splusb(); 2423 xfer->status = status; /* make software ignore it */ 2424 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2425 usb_transfer_complete(xfer); 2426 splx(s); 2427 return; 2428 } 2429 2430 if (xfer->device->bus->intr_context || !curproc) 2431 panic("ehci_abort_xfer: not in process context"); 2432 2433 /* 2434 * Step 1: Make interrupt routine and hardware ignore xfer. 2435 */ 2436 s = splusb(); 2437 xfer->status = status; /* make software ignore it */ 2438 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2439 qhstatus = sqh->qh.qh_qtd.qtd_status; 2440 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2441 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2442 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2443 if (sqtd == exfer->sqtdend) 2444 break; 2445 } 2446 splx(s); 2447 2448 /* 2449 * Step 2: Wait until we know hardware has finished any possible 2450 * use of the xfer. Also make sure the soft interrupt routine 2451 * has run. 2452 */ 2453 ehci_sync_hc(sc); 2454 s = splusb(); 2455 #ifdef USB_USE_SOFTINTR 2456 sc->sc_softwake = 1; 2457 #endif /* USB_USE_SOFTINTR */ 2458 usb_schedsoftintr(&sc->sc_bus); 2459 #ifdef USB_USE_SOFTINTR 2460 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2461 #endif /* USB_USE_SOFTINTR */ 2462 splx(s); 2463 2464 /* 2465 * Step 3: Remove any vestiges of the xfer from the hardware. 2466 * The complication here is that the hardware may have executed 2467 * beyond the xfer we're trying to abort. So as we're scanning 2468 * the TDs of this xfer we check if the hardware points to 2469 * any of them. 2470 */ 2471 s = splusb(); /* XXX why? */ 2472 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2473 hit = 0; 2474 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2475 hit |= cur == sqtd->physaddr; 2476 if (sqtd == exfer->sqtdend) 2477 break; 2478 } 2479 sqtd = sqtd->nextqtd; 2480 /* Zap curqtd register if hardware pointed inside the xfer. */ 2481 if (hit && sqtd != NULL) { 2482 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2483 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2484 sqh->qh.qh_qtd.qtd_status = qhstatus; 2485 } else { 2486 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2487 } 2488 2489 /* 2490 * Step 4: Execute callback. 2491 */ 2492 #ifdef DIAGNOSTIC 2493 exfer->isdone = 1; 2494 #endif 2495 usb_transfer_complete(xfer); 2496 2497 splx(s); 2498 #undef exfer 2499 } 2500 2501 void 2502 ehci_timeout(void *addr) 2503 { 2504 struct ehci_xfer *exfer = addr; 2505 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2506 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2507 2508 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2509 #ifdef USB_DEBUG 2510 if (ehcidebug > 1) 2511 usbd_dump_pipe(exfer->xfer.pipe); 2512 #endif 2513 2514 if (sc->sc_dying) { 2515 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2516 return; 2517 } 2518 2519 /* Execute the abort in a process context. */ 2520 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2521 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2522 } 2523 2524 void 2525 ehci_timeout_task(void *addr) 2526 { 2527 usbd_xfer_handle xfer = addr; 2528 int s; 2529 2530 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2531 2532 s = splusb(); 2533 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2534 splx(s); 2535 } 2536 2537 /************************/ 2538 2539 Static usbd_status 2540 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2541 { 2542 usbd_status err; 2543 2544 /* Insert last in queue. */ 2545 err = usb_insert_transfer(xfer); 2546 if (err) 2547 return (err); 2548 2549 /* Pipe isn't running, start first */ 2550 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2551 } 2552 2553 Static usbd_status 2554 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2555 { 2556 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2557 usbd_status err; 2558 2559 if (sc->sc_dying) 2560 return (USBD_IOERROR); 2561 2562 #ifdef DIAGNOSTIC 2563 if (!(xfer->rqflags & URQ_REQUEST)) { 2564 /* XXX panic */ 2565 printf("ehci_device_ctrl_transfer: not a request\n"); 2566 return (USBD_INVAL); 2567 } 2568 #endif 2569 2570 err = ehci_device_request(xfer); 2571 if (err) 2572 return (err); 2573 2574 if (sc->sc_bus.use_polling) 2575 ehci_waitintr(sc, xfer); 2576 return (USBD_IN_PROGRESS); 2577 } 2578 2579 void 2580 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2581 { 2582 struct ehci_xfer *ex = EXFER(xfer); 2583 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2584 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2585 2586 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2587 2588 #ifdef DIAGNOSTIC 2589 if (!(xfer->rqflags & URQ_REQUEST)) { 2590 panic("ehci_ctrl_done: not a request"); 2591 } 2592 #endif 2593 2594 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2595 ehci_del_intr_list(ex); /* remove from active list */ 2596 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2597 } 2598 2599 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2600 } 2601 2602 /* Abort a device control request. */ 2603 Static void 2604 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2605 { 2606 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2607 ehci_abort_xfer(xfer, USBD_CANCELLED); 2608 } 2609 2610 /* Close a device control pipe. */ 2611 Static void 2612 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2613 { 2614 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2615 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2616 2617 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2618 ehci_close_pipe(pipe, sc->sc_async_head); 2619 } 2620 2621 usbd_status 2622 ehci_device_request(usbd_xfer_handle xfer) 2623 { 2624 #define exfer EXFER(xfer) 2625 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2626 usb_device_request_t *req = &xfer->request; 2627 usbd_device_handle dev = epipe->pipe.device; 2628 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2629 int addr = dev->address; 2630 ehci_soft_qtd_t *setup, *stat, *next; 2631 ehci_soft_qh_t *sqh; 2632 int isread; 2633 int len; 2634 usbd_status err; 2635 int s; 2636 2637 isread = req->bmRequestType & UT_READ; 2638 len = UGETW(req->wLength); 2639 2640 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2641 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2642 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2643 UGETW(req->wIndex), len, addr, 2644 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2645 2646 setup = ehci_alloc_sqtd(sc); 2647 if (setup == NULL) { 2648 err = USBD_NOMEM; 2649 goto bad1; 2650 } 2651 stat = ehci_alloc_sqtd(sc); 2652 if (stat == NULL) { 2653 err = USBD_NOMEM; 2654 goto bad2; 2655 } 2656 2657 sqh = epipe->sqh; 2658 epipe->u.ctl.length = len; 2659 2660 /* Update device address and length since they may have changed 2661 during the setup of the control pipe in usbd_new_device(). */ 2662 /* XXX This only needs to be done once, but it's too early in open. */ 2663 /* XXXX Should not touch ED here! */ 2664 sqh->qh.qh_endp = 2665 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2666 htole32( 2667 EHCI_QH_SET_ADDR(addr) | 2668 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2669 ); 2670 2671 /* Set up data transaction */ 2672 if (len != 0) { 2673 ehci_soft_qtd_t *end; 2674 2675 /* Start toggle at 1. */ 2676 epipe->nexttoggle = 1; 2677 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2678 &next, &end); 2679 if (err) 2680 goto bad3; 2681 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2682 end->nextqtd = stat; 2683 end->qtd.qtd_next = 2684 end->qtd.qtd_altnext = htole32(stat->physaddr); 2685 } else { 2686 next = stat; 2687 } 2688 2689 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2690 2691 /* Clear toggle */ 2692 setup->qtd.qtd_status = htole32( 2693 EHCI_QTD_ACTIVE | 2694 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2695 EHCI_QTD_SET_CERR(3) | 2696 EHCI_QTD_SET_TOGGLE(0) | 2697 EHCI_QTD_SET_BYTES(sizeof *req) 2698 ); 2699 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2700 setup->qtd.qtd_buffer_hi[0] = 0; 2701 setup->nextqtd = next; 2702 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2703 setup->xfer = xfer; 2704 setup->len = sizeof *req; 2705 2706 stat->qtd.qtd_status = htole32( 2707 EHCI_QTD_ACTIVE | 2708 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2709 EHCI_QTD_SET_CERR(3) | 2710 EHCI_QTD_SET_TOGGLE(1) | 2711 EHCI_QTD_IOC 2712 ); 2713 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2714 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2715 stat->nextqtd = NULL; 2716 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2717 stat->xfer = xfer; 2718 stat->len = 0; 2719 2720 #ifdef EHCI_DEBUG 2721 if (ehcidebug > 5) { 2722 DPRINTF(("ehci_device_request:\n")); 2723 ehci_dump_sqh(sqh); 2724 ehci_dump_sqtds(setup); 2725 } 2726 #endif 2727 2728 exfer->sqtdstart = setup; 2729 exfer->sqtdend = stat; 2730 #ifdef DIAGNOSTIC 2731 if (!exfer->isdone) { 2732 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2733 } 2734 exfer->isdone = 0; 2735 #endif 2736 2737 /* Insert qTD in QH list. */ 2738 s = splusb(); 2739 ehci_set_qh_qtd(sqh, setup); 2740 if (xfer->timeout && !sc->sc_bus.use_polling) { 2741 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2742 ehci_timeout, xfer); 2743 } 2744 ehci_add_intr_list(sc, exfer); 2745 xfer->status = USBD_IN_PROGRESS; 2746 splx(s); 2747 2748 #ifdef EHCI_DEBUG 2749 if (ehcidebug > 10) { 2750 DPRINTF(("ehci_device_request: status=%x\n", 2751 EOREAD4(sc, EHCI_USBSTS))); 2752 delay(10000); 2753 ehci_dump_regs(sc); 2754 ehci_dump_sqh(sc->sc_async_head); 2755 ehci_dump_sqh(sqh); 2756 ehci_dump_sqtds(setup); 2757 } 2758 #endif 2759 2760 return (USBD_NORMAL_COMPLETION); 2761 2762 bad3: 2763 ehci_free_sqtd(sc, stat); 2764 bad2: 2765 ehci_free_sqtd(sc, setup); 2766 bad1: 2767 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2768 xfer->status = err; 2769 usb_transfer_complete(xfer); 2770 return (err); 2771 #undef exfer 2772 } 2773 2774 /************************/ 2775 2776 Static usbd_status 2777 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2778 { 2779 usbd_status err; 2780 2781 /* Insert last in queue. */ 2782 err = usb_insert_transfer(xfer); 2783 if (err) 2784 return (err); 2785 2786 /* Pipe isn't running, start first */ 2787 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2788 } 2789 2790 usbd_status 2791 ehci_device_bulk_start(usbd_xfer_handle xfer) 2792 { 2793 #define exfer EXFER(xfer) 2794 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2795 usbd_device_handle dev = epipe->pipe.device; 2796 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2797 ehci_soft_qtd_t *data, *dataend; 2798 ehci_soft_qh_t *sqh; 2799 usbd_status err; 2800 int len, isread, endpt; 2801 int s; 2802 2803 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2804 xfer, xfer->length, xfer->flags)); 2805 2806 if (sc->sc_dying) 2807 return (USBD_IOERROR); 2808 2809 #ifdef DIAGNOSTIC 2810 if (xfer->rqflags & URQ_REQUEST) 2811 panic("ehci_device_bulk_start: a request"); 2812 #endif 2813 2814 len = xfer->length; 2815 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2816 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2817 sqh = epipe->sqh; 2818 2819 epipe->u.bulk.length = len; 2820 2821 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2822 &dataend); 2823 if (err) { 2824 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2825 xfer->status = err; 2826 usb_transfer_complete(xfer); 2827 return (err); 2828 } 2829 2830 #ifdef EHCI_DEBUG 2831 if (ehcidebug > 5) { 2832 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2833 ehci_dump_sqh(sqh); 2834 ehci_dump_sqtds(data); 2835 } 2836 #endif 2837 2838 /* Set up interrupt info. */ 2839 exfer->sqtdstart = data; 2840 exfer->sqtdend = dataend; 2841 #ifdef DIAGNOSTIC 2842 if (!exfer->isdone) { 2843 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2844 } 2845 exfer->isdone = 0; 2846 #endif 2847 2848 s = splusb(); 2849 ehci_set_qh_qtd(sqh, data); 2850 if (xfer->timeout && !sc->sc_bus.use_polling) { 2851 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2852 ehci_timeout, xfer); 2853 } 2854 ehci_add_intr_list(sc, exfer); 2855 xfer->status = USBD_IN_PROGRESS; 2856 splx(s); 2857 2858 #ifdef EHCI_DEBUG 2859 if (ehcidebug > 10) { 2860 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2861 delay(10000); 2862 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2863 ehci_dump_regs(sc); 2864 #if 0 2865 printf("async_head:\n"); 2866 ehci_dump_sqh(sc->sc_async_head); 2867 #endif 2868 printf("sqh:\n"); 2869 ehci_dump_sqh(sqh); 2870 ehci_dump_sqtds(data); 2871 } 2872 #endif 2873 2874 if (sc->sc_bus.use_polling) 2875 ehci_waitintr(sc, xfer); 2876 2877 return (USBD_IN_PROGRESS); 2878 #undef exfer 2879 } 2880 2881 Static void 2882 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2883 { 2884 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2885 ehci_abort_xfer(xfer, USBD_CANCELLED); 2886 } 2887 2888 /* 2889 * Close a device bulk pipe. 2890 */ 2891 Static void 2892 ehci_device_bulk_close(usbd_pipe_handle pipe) 2893 { 2894 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2895 2896 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2897 ehci_close_pipe(pipe, sc->sc_async_head); 2898 } 2899 2900 void 2901 ehci_device_bulk_done(usbd_xfer_handle xfer) 2902 { 2903 struct ehci_xfer *ex = EXFER(xfer); 2904 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2905 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2906 2907 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2908 xfer, xfer->actlen)); 2909 2910 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2911 ehci_del_intr_list(ex); /* remove from active list */ 2912 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2913 } 2914 2915 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2916 } 2917 2918 /************************/ 2919 2920 Static usbd_status 2921 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2922 { 2923 struct ehci_soft_islot *isp; 2924 int islot, lev; 2925 2926 /* Find a poll rate that is large enough. */ 2927 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2928 if (EHCI_ILEV_IVAL(lev) <= ival) 2929 break; 2930 2931 /* Pick an interrupt slot at the right level. */ 2932 /* XXX could do better than picking at random */ 2933 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2934 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2935 2936 sqh->islot = islot; 2937 isp = &sc->sc_islots[islot]; 2938 ehci_add_qh(sqh, isp->sqh); 2939 2940 return (USBD_NORMAL_COMPLETION); 2941 } 2942 2943 Static usbd_status 2944 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2945 { 2946 usbd_status err; 2947 2948 /* Insert last in queue. */ 2949 err = usb_insert_transfer(xfer); 2950 if (err) 2951 return (err); 2952 2953 /* 2954 * Pipe isn't running (otherwise err would be USBD_INPROG), 2955 * so start it first. 2956 */ 2957 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2958 } 2959 2960 Static usbd_status 2961 ehci_device_intr_start(usbd_xfer_handle xfer) 2962 { 2963 #define exfer EXFER(xfer) 2964 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2965 usbd_device_handle dev = xfer->pipe->device; 2966 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2967 ehci_soft_qtd_t *data, *dataend; 2968 ehci_soft_qh_t *sqh; 2969 usbd_status err; 2970 int len, isread, endpt; 2971 int s; 2972 2973 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 2974 xfer, xfer->length, xfer->flags)); 2975 2976 if (sc->sc_dying) 2977 return (USBD_IOERROR); 2978 2979 #ifdef DIAGNOSTIC 2980 if (xfer->rqflags & URQ_REQUEST) 2981 panic("ehci_device_intr_start: a request"); 2982 #endif 2983 2984 len = xfer->length; 2985 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2986 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2987 sqh = epipe->sqh; 2988 2989 epipe->u.intr.length = len; 2990 2991 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2992 &dataend); 2993 if (err) { 2994 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 2995 xfer->status = err; 2996 usb_transfer_complete(xfer); 2997 return (err); 2998 } 2999 3000 #ifdef EHCI_DEBUG 3001 if (ehcidebug > 5) { 3002 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3003 ehci_dump_sqh(sqh); 3004 ehci_dump_sqtds(data); 3005 } 3006 #endif 3007 3008 /* Set up interrupt info. */ 3009 exfer->sqtdstart = data; 3010 exfer->sqtdend = dataend; 3011 #ifdef DIAGNOSTIC 3012 if (!exfer->isdone) { 3013 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3014 } 3015 exfer->isdone = 0; 3016 #endif 3017 3018 s = splusb(); 3019 ehci_set_qh_qtd(sqh, data); 3020 if (xfer->timeout && !sc->sc_bus.use_polling) { 3021 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3022 ehci_timeout, xfer); 3023 } 3024 ehci_add_intr_list(sc, exfer); 3025 xfer->status = USBD_IN_PROGRESS; 3026 splx(s); 3027 3028 #ifdef EHCI_DEBUG 3029 if (ehcidebug > 10) { 3030 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3031 delay(10000); 3032 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3033 ehci_dump_regs(sc); 3034 printf("sqh:\n"); 3035 ehci_dump_sqh(sqh); 3036 ehci_dump_sqtds(data); 3037 } 3038 #endif 3039 3040 if (sc->sc_bus.use_polling) 3041 ehci_waitintr(sc, xfer); 3042 3043 return (USBD_IN_PROGRESS); 3044 #undef exfer 3045 } 3046 3047 Static void 3048 ehci_device_intr_abort(usbd_xfer_handle xfer) 3049 { 3050 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3051 if (xfer->pipe->intrxfer == xfer) { 3052 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3053 xfer->pipe->intrxfer = NULL; 3054 } 3055 ehci_abort_xfer(xfer, USBD_CANCELLED); 3056 } 3057 3058 Static void 3059 ehci_device_intr_close(usbd_pipe_handle pipe) 3060 { 3061 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3062 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3063 struct ehci_soft_islot *isp; 3064 3065 isp = &sc->sc_islots[epipe->sqh->islot]; 3066 ehci_close_pipe(pipe, isp->sqh); 3067 } 3068 3069 Static void 3070 ehci_device_intr_done(usbd_xfer_handle xfer) 3071 { 3072 #define exfer EXFER(xfer) 3073 struct ehci_xfer *ex = EXFER(xfer); 3074 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3075 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3076 ehci_soft_qtd_t *data, *dataend; 3077 ehci_soft_qh_t *sqh; 3078 usbd_status err; 3079 int len, isread, endpt, s; 3080 3081 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3082 xfer, xfer->actlen)); 3083 3084 if (xfer->pipe->repeat) { 3085 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3086 3087 len = epipe->u.intr.length; 3088 xfer->length = len; 3089 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3090 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3091 sqh = epipe->sqh; 3092 3093 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3094 &data, &dataend); 3095 if (err) { 3096 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3097 xfer->status = err; 3098 return; 3099 } 3100 3101 /* Set up interrupt info. */ 3102 exfer->sqtdstart = data; 3103 exfer->sqtdend = dataend; 3104 #ifdef DIAGNOSTIC 3105 if (!exfer->isdone) { 3106 printf("ehci_device_intr_done: not done, ex=%p\n", 3107 exfer); 3108 } 3109 exfer->isdone = 0; 3110 #endif 3111 3112 s = splusb(); 3113 ehci_set_qh_qtd(sqh, data); 3114 if (xfer->timeout && !sc->sc_bus.use_polling) { 3115 usb_callout(xfer->timeout_handle, 3116 mstohz(xfer->timeout), ehci_timeout, xfer); 3117 } 3118 splx(s); 3119 3120 xfer->status = USBD_IN_PROGRESS; 3121 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3122 ehci_del_intr_list(ex); /* remove from active list */ 3123 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3124 } 3125 #undef exfer 3126 } 3127 3128 /************************/ 3129 3130 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3131 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3132 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3133 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3134 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3135
Indexes created Mon Sep 22 21:09:42 GMT 2025