ehci.c revision 1.9 1 /* $NetBSD: ehci.c,v 1.9 2001/11/18 00:39:46 augustss Exp $ */
2
3 /*
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart (at) augustsson.net).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
41 *
42 * The EHCI 0.96 spec can be found at
43 * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
44 * and the USB 2.0 spec at
45 * http://www.usb.org/developers/data/usb_20.zip
46 *
47 */
48
49 #include <sys/cdefs.h>
50 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.9 2001/11/18 00:39:46 augustss Exp $");
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/kernel.h>
55 #include <sys/malloc.h>
56 #include <sys/device.h>
57 #include <sys/select.h>
58 #include <sys/proc.h>
59 #include <sys/queue.h>
60
61 #include <machine/bus.h>
62 #include <machine/endian.h>
63
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
66 #include <dev/usb/usbdivar.h>
67 #include <dev/usb/usb_mem.h>
68 #include <dev/usb/usb_quirks.h>
69
70 #include <dev/usb/ehcireg.h>
71 #include <dev/usb/ehcivar.h>
72
73 #ifdef EHCI_DEBUG
74 #define DPRINTF(x) if (ehcidebug) printf x
75 #define DPRINTFN(n,x) if (ehcidebug>(n)) printf x
76 int ehcidebug = 0;
77 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
78 #else
79 #define DPRINTF(x)
80 #define DPRINTFN(n,x)
81 #endif
82
83 struct ehci_pipe {
84 struct usbd_pipe pipe;
85 };
86
87 Static void ehci_shutdown(void *);
88 Static void ehci_power(int, void *);
89
90 Static usbd_status ehci_open(usbd_pipe_handle);
91 Static void ehci_poll(struct usbd_bus *);
92 Static void ehci_softintr(void *);
93
94 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
95 Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
96
97 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
98 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
99
100 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
101 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
102 Static void ehci_root_ctrl_abort(usbd_xfer_handle);
103 Static void ehci_root_ctrl_close(usbd_pipe_handle);
104 Static void ehci_root_ctrl_done(usbd_xfer_handle);
105
106 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
107 Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
108 Static void ehci_root_intr_abort(usbd_xfer_handle);
109 Static void ehci_root_intr_close(usbd_pipe_handle);
110 Static void ehci_root_intr_done(usbd_xfer_handle);
111
112 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
113 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
114 Static void ehci_device_ctrl_abort(usbd_xfer_handle);
115 Static void ehci_device_ctrl_close(usbd_pipe_handle);
116 Static void ehci_device_ctrl_done(usbd_xfer_handle);
117
118 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
119 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
120 Static void ehci_device_bulk_abort(usbd_xfer_handle);
121 Static void ehci_device_bulk_close(usbd_pipe_handle);
122 Static void ehci_device_bulk_done(usbd_xfer_handle);
123
124 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
125 Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
126 Static void ehci_device_intr_abort(usbd_xfer_handle);
127 Static void ehci_device_intr_close(usbd_pipe_handle);
128 Static void ehci_device_intr_done(usbd_xfer_handle);
129
130 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
131 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
132 Static void ehci_device_isoc_abort(usbd_xfer_handle);
133 Static void ehci_device_isoc_close(usbd_pipe_handle);
134 Static void ehci_device_isoc_done(usbd_xfer_handle);
135
136 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
137 Static void ehci_noop(usbd_pipe_handle pipe);
138
139 Static int ehci_str(usb_string_descriptor_t *, int, char *);
140 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
141 Static void ehci_pcd_able(ehci_softc_t *, int);
142 Static void ehci_pcd_enable(void *);
143 Static void ehci_disown(ehci_softc_t *, int, int);
144
145 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
146 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
147
148 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
149 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
150
151 Static void ehci_hash_add_qtd(ehci_softc_t *, ehci_soft_qtd_t *);
152 Static void ehci_hash_rem_qtd(ehci_softc_t *, ehci_soft_qtd_t *);
153 Static ehci_soft_qtd_t *ehci_hash_find_qtd(ehci_softc_t *, ehci_physaddr_t);
154
155 #ifdef EHCI_DEBUG
156 Static void ehci_dumpregs(ehci_softc_t *);
157 Static void ehci_dump(void);
158 Static ehci_softc_t *theehci;
159 Static void ehci_dump_link(ehci_link_t);
160 Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
161 Static void ehci_dump_qtd(ehci_qtd_t *);
162 Static void ehci_dump_sqh(ehci_soft_qh_t *);
163 #endif
164
165 #define EHCI_INTR_ENDPT 1
166
167 Static struct usbd_bus_methods ehci_bus_methods = {
168 ehci_open,
169 ehci_softintr,
170 ehci_poll,
171 ehci_allocm,
172 ehci_freem,
173 ehci_allocx,
174 ehci_freex,
175 };
176
177 Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
178 ehci_root_ctrl_transfer,
179 ehci_root_ctrl_start,
180 ehci_root_ctrl_abort,
181 ehci_root_ctrl_close,
182 ehci_noop,
183 ehci_root_ctrl_done,
184 };
185
186 Static struct usbd_pipe_methods ehci_root_intr_methods = {
187 ehci_root_intr_transfer,
188 ehci_root_intr_start,
189 ehci_root_intr_abort,
190 ehci_root_intr_close,
191 ehci_noop,
192 ehci_root_intr_done,
193 };
194
195 Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
196 ehci_device_ctrl_transfer,
197 ehci_device_ctrl_start,
198 ehci_device_ctrl_abort,
199 ehci_device_ctrl_close,
200 ehci_noop,
201 ehci_device_ctrl_done,
202 };
203
204 Static struct usbd_pipe_methods ehci_device_intr_methods = {
205 ehci_device_intr_transfer,
206 ehci_device_intr_start,
207 ehci_device_intr_abort,
208 ehci_device_intr_close,
209 ehci_device_clear_toggle,
210 ehci_device_intr_done,
211 };
212
213 Static struct usbd_pipe_methods ehci_device_bulk_methods = {
214 ehci_device_bulk_transfer,
215 ehci_device_bulk_start,
216 ehci_device_bulk_abort,
217 ehci_device_bulk_close,
218 ehci_device_clear_toggle,
219 ehci_device_bulk_done,
220 };
221
222 Static struct usbd_pipe_methods ehci_device_isoc_methods = {
223 ehci_device_isoc_transfer,
224 ehci_device_isoc_start,
225 ehci_device_isoc_abort,
226 ehci_device_isoc_close,
227 ehci_noop,
228 ehci_device_isoc_done,
229 };
230
231 usbd_status
232 ehci_init(ehci_softc_t *sc)
233 {
234 u_int32_t version, sparams, cparams, hcr;
235 u_int i;
236 usbd_status err;
237
238 DPRINTF(("ehci_init: start\n"));
239 #ifdef EHCI_DEBUG
240 theehci = sc;
241 #endif
242
243 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
244
245 version = EREAD2(sc, EHCI_HCIVERSION);
246 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
247 version >> 8, version & 0xff);
248
249 sparams = EREAD4(sc, EHCI_HCSPARAMS);
250 DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
251 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
252 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
253 printf("%s: wrong number of companions (%d != %d)\n",
254 USBDEVNAME(sc->sc_bus.bdev),
255 EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
256 return (USBD_IOERROR);
257 }
258 if (sc->sc_ncomp > 0) {
259 printf("%s: companion controller%s, %d port%s each:",
260 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
261 EHCI_HCS_N_PCC(sparams),
262 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
263 for (i = 0; i < sc->sc_ncomp; i++)
264 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
265 printf("\n");
266 }
267 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
268 cparams = EREAD4(sc, EHCI_HCCPARAMS);
269 DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
270
271 sc->sc_bus.usbrev = USBREV_2_0;
272
273 for (i = 0; i < EHCI_HASH_SIZE; i++)
274 LIST_INIT(&sc->sc_hash_qtds[i]);
275
276 /* Reset the controller */
277 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
278 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
279 usb_delay_ms(&sc->sc_bus, 1);
280 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
281 for (i = 0; i < 100; i++) {
282 delay(10);
283 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
284 if (!hcr)
285 break;
286 }
287 if (hcr) {
288 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
289 return (USBD_IOERROR);
290 }
291
292 /* frame list size at default, read back what we got and use that */
293 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
294 case 0: sc->sc_flsize = 1024*4; break;
295 case 1: sc->sc_flsize = 512*4; break;
296 case 2: sc->sc_flsize = 256*4; break;
297 case 3: return (USBD_IOERROR);
298 }
299 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
300 EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
301 if (err)
302 return (err);
303 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
304
305 /* Set up the bus struct. */
306 sc->sc_bus.methods = &ehci_bus_methods;
307 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
308
309 sc->sc_powerhook = powerhook_establish(ehci_power, sc);
310 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
311
312 sc->sc_eintrs = EHCI_NORMAL_INTRS;
313
314 /* Allocate dummy QH that starts the bulk list. */
315 sc->sc_bulk_head = ehci_alloc_sqh(sc);
316 if (sc->sc_bulk_head == NULL) {
317 err = USBD_NOMEM;
318 goto bad1;
319 }
320 memset(&sc->sc_bulk_head->qh, 0, sizeof(ehci_qtd_t));
321 sc->sc_bulk_head->qh.qh_qtd.qtd_status =
322 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
323 sc->sc_bulk_head->qh.qh_link =
324 htole32(EHCI_LINK_TERMINATE); /* XXX no bw reclaimation */
325 sc->sc_bulk_head->next = NULL;
326 #ifdef EHCI_DEBUG
327 if (ehcidebug) {
328 ehci_dump_sqh(sc->sc_bulk_head);
329 }
330 #endif
331
332 /* Allocate dummy QH that starts the control list. */
333 sc->sc_ctrl_head = ehci_alloc_sqh(sc);
334 if (sc->sc_ctrl_head == NULL) {
335 err = USBD_NOMEM;
336 goto bad2;
337 }
338 memset(&sc->sc_ctrl_head->qh, 0, sizeof(ehci_qtd_t));
339 sc->sc_ctrl_head->qh.qh_qtd.qtd_status =
340 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
341 sc->sc_ctrl_head->qh.qh_endp = htole32(EHCI_QH_HRECL);
342 sc->sc_ctrl_head->qh.qh_link =
343 htole32(sc->sc_bulk_head->physaddr | EHCI_LINK_QH);
344 sc->sc_ctrl_head = sc->sc_bulk_head;
345 #ifdef EHCI_DEBUG
346 if (ehcidebug) {
347 ehci_dump_sqh(sc->sc_ctrl_head);
348 }
349 #endif
350
351 /* Point to async list */
352 EOWRITE4(sc, EHCI_ASYNCLISTADDR,
353 sc->sc_ctrl_head->physaddr | EHCI_LINK_QH);
354
355 usb_callout_init(sc->sc_tmo_pcd);
356
357 /* Enable interrupts */
358 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
359
360 /* Turn on controller */
361 EOWRITE4(sc, EHCI_USBCMD,
362 EHCI_CMD_ITC_8 | /* 8 microframes */
363 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
364 /* EHCI_CMD_ASE | */
365 /* EHCI_CMD_PSE | */
366 EHCI_CMD_RS);
367
368 /* Take over port ownership */
369 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
370
371 for (i = 0; i < 100; i++) {
372 delay(10);
373 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
374 if (!hcr)
375 break;
376 }
377 if (hcr) {
378 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
379 return (USBD_IOERROR);
380 }
381
382 return (USBD_NORMAL_COMPLETION);
383
384 #if 0
385 bad3:
386 ehci_free_sqh(sc, sc->sc_bulk_head);
387 #endif
388 bad2:
389 ehci_free_sqh(sc, sc->sc_ctrl_head);
390 bad1:
391 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
392 return (err);
393 }
394
395 Static int ehci_intr1(ehci_softc_t *);
396
397 int
398 ehci_intr(void *v)
399 {
400 ehci_softc_t *sc = v;
401
402 /* If we get an interrupt while polling, then just ignore it. */
403 if (sc->sc_bus.use_polling) {
404 #ifdef DIAGNOSTIC
405 printf("ehci_intr: ignored interrupt while polling\n");
406 #endif
407 return (0);
408 }
409
410 return (ehci_intr1(sc));
411 }
412
413 Static int
414 ehci_intr1(ehci_softc_t *sc)
415 {
416 u_int32_t intrs, eintrs;
417
418 DPRINTFN(20,("ehci_intr1: enter\n"));
419
420 /* In case the interrupt occurs before initialization has completed. */
421 if (sc == NULL) {
422 #ifdef DIAGNOSTIC
423 printf("ehci_intr: sc == NULL\n");
424 #endif
425 return (0);
426 }
427
428 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
429
430 if (!intrs)
431 return (0);
432
433 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
434 eintrs = intrs & sc->sc_eintrs;
435 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
436 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
437 (u_int)eintrs));
438 if (!eintrs)
439 return (0);
440
441 sc->sc_bus.intr_context++;
442 sc->sc_bus.no_intrs++;
443 if (eintrs & EHCI_STS_INT) {
444 DPRINTF(("ehci_intr1: something is done\n"));
445 eintrs &= ~EHCI_STS_INT;
446 }
447 if (eintrs & EHCI_STS_ERRINT) {
448 DPRINTF(("ehci_intr1: some error\n"));
449 eintrs &= ~EHCI_STS_HSE;
450 }
451 if (eintrs & EHCI_STS_HSE) {
452 printf("%s: unrecoverable error, controller halted\n",
453 USBDEVNAME(sc->sc_bus.bdev));
454 /* XXX what else */
455 }
456 if (eintrs & EHCI_STS_PCD) {
457 ehci_pcd(sc, sc->sc_intrxfer);
458 /*
459 * Disable PCD interrupt for now, because it will be
460 * on until the port has been reset.
461 */
462 ehci_pcd_able(sc, 0);
463 /* Do not allow RHSC interrupts > 1 per second */
464 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
465 eintrs &= ~EHCI_STS_PCD;
466 }
467
468 sc->sc_bus.intr_context--;
469
470 if (eintrs != 0) {
471 /* Block unprocessed interrupts. */
472 sc->sc_eintrs &= ~eintrs;
473 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
474 printf("%s: blocking intrs 0x%x\n",
475 USBDEVNAME(sc->sc_bus.bdev), eintrs);
476 }
477
478 return (1);
479 }
480
481 void
482 ehci_pcd_able(ehci_softc_t *sc, int on)
483 {
484 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
485 if (on)
486 sc->sc_eintrs |= EHCI_STS_PCD;
487 else
488 sc->sc_eintrs &= ~EHCI_STS_PCD;
489 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
490 }
491
492 void
493 ehci_pcd_enable(void *v_sc)
494 {
495 ehci_softc_t *sc = v_sc;
496
497 ehci_pcd_able(sc, 1);
498 }
499
500 void
501 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
502 {
503 usbd_pipe_handle pipe;
504 struct ehci_pipe *opipe;
505 u_char *p;
506 int i, m;
507
508 if (xfer == NULL) {
509 /* Just ignore the change. */
510 return;
511 }
512
513 pipe = xfer->pipe;
514 opipe = (struct ehci_pipe *)pipe;
515
516 p = KERNADDR(&xfer->dmabuf);
517 m = min(sc->sc_noport, xfer->length * 8 - 1);
518 memset(p, 0, xfer->length);
519 for (i = 1; i <= m; i++) {
520 /* Pick out CHANGE bits from the status reg. */
521 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
522 p[i/8] |= 1 << (i%8);
523 }
524 DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
525 xfer->actlen = xfer->length;
526 xfer->status = USBD_NORMAL_COMPLETION;
527
528 usb_transfer_complete(xfer);
529 }
530
531 void
532 ehci_softintr(void *v)
533 {
534 //ehci_softc_t *sc = v;
535 }
536
537 void
538 ehci_poll(struct usbd_bus *bus)
539 {
540 ehci_softc_t *sc = (ehci_softc_t *)bus;
541 #ifdef EHCI_DEBUG
542 static int last;
543 int new;
544 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
545 if (new != last) {
546 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
547 last = new;
548 }
549 #endif
550
551 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
552 ehci_intr1(sc);
553 }
554
555 int
556 ehci_detach(struct ehci_softc *sc, int flags)
557 {
558 int rv = 0;
559
560 if (sc->sc_child != NULL)
561 rv = config_detach(sc->sc_child, flags);
562
563 if (rv != 0)
564 return (rv);
565
566 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
567
568 if (sc->sc_powerhook != NULL)
569 powerhook_disestablish(sc->sc_powerhook);
570 if (sc->sc_shutdownhook != NULL)
571 shutdownhook_disestablish(sc->sc_shutdownhook);
572
573 /* XXX free other data structures XXX */
574
575 return (rv);
576 }
577
578
579 int
580 ehci_activate(device_ptr_t self, enum devact act)
581 {
582 struct ehci_softc *sc = (struct ehci_softc *)self;
583 int rv = 0;
584
585 switch (act) {
586 case DVACT_ACTIVATE:
587 return (EOPNOTSUPP);
588 break;
589
590 case DVACT_DEACTIVATE:
591 if (sc->sc_child != NULL)
592 rv = config_deactivate(sc->sc_child);
593 sc->sc_dying = 1;
594 break;
595 }
596 return (rv);
597 }
598
599 /*
600 * Handle suspend/resume.
601 *
602 * We need to switch to polling mode here, because this routine is
603 * called from an intterupt context. This is all right since we
604 * are almost suspended anyway.
605 */
606 void
607 ehci_power(int why, void *v)
608 {
609 ehci_softc_t *sc = v;
610 //u_int32_t ctl;
611 int s;
612
613 #ifdef EHCI_DEBUG
614 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
615 ehci_dumpregs(sc);
616 #endif
617
618 s = splhardusb();
619 switch (why) {
620 case PWR_SUSPEND:
621 case PWR_STANDBY:
622 sc->sc_bus.use_polling++;
623 #if 0
624 OOO
625 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
626 if (sc->sc_control == 0) {
627 /*
628 * Preserve register values, in case that APM BIOS
629 * does not recover them.
630 */
631 sc->sc_control = ctl;
632 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
633 }
634 ctl |= EHCI_HCFS_SUSPEND;
635 OWRITE4(sc, EHCI_CONTROL, ctl);
636 #endif
637 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
638 sc->sc_bus.use_polling--;
639 break;
640 case PWR_RESUME:
641 sc->sc_bus.use_polling++;
642 #if 0
643 OOO
644 /* Some broken BIOSes do not recover these values */
645 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma));
646 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
647 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
648 if (sc->sc_intre)
649 OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
650 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
651 if (sc->sc_control)
652 ctl = sc->sc_control;
653 else
654 ctl = OREAD4(sc, EHCI_CONTROL);
655 ctl |= EHCI_HCFS_RESUME;
656 OWRITE4(sc, EHCI_CONTROL, ctl);
657 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
658 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
659 OWRITE4(sc, EHCI_CONTROL, ctl);
660 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
661 sc->sc_control = sc->sc_intre = 0;
662 #endif
663 sc->sc_bus.use_polling--;
664 break;
665 case PWR_SOFTSUSPEND:
666 case PWR_SOFTSTANDBY:
667 case PWR_SOFTRESUME:
668 break;
669 }
670 splx(s);
671 }
672
673 /*
674 * Shut down the controller when the system is going down.
675 */
676 void
677 ehci_shutdown(void *v)
678 {
679 ehci_softc_t *sc = v;
680
681 DPRINTF(("ehci_shutdown: stopping the HC\n"));
682 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
683 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
684 }
685
686 usbd_status
687 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
688 {
689 struct ehci_softc *sc = (struct ehci_softc *)bus;
690
691 return (usb_allocmem(&sc->sc_bus, size, 0, dma));
692 }
693
694 void
695 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
696 {
697 struct ehci_softc *sc = (struct ehci_softc *)bus;
698
699 usb_freemem(&sc->sc_bus, dma);
700 }
701
702 usbd_xfer_handle
703 ehci_allocx(struct usbd_bus *bus)
704 {
705 struct ehci_softc *sc = (struct ehci_softc *)bus;
706 usbd_xfer_handle xfer;
707
708 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
709 if (xfer != NULL)
710 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
711 else
712 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT);
713 if (xfer != NULL)
714 memset(xfer, 0, sizeof *xfer);
715 return (xfer);
716 }
717
718 void
719 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
720 {
721 struct ehci_softc *sc = (struct ehci_softc *)bus;
722
723 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
724 }
725
726 Static void
727 ehci_device_clear_toggle(usbd_pipe_handle pipe)
728 {
729 #if 0
730 OOO
731 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
732
733 epipe->sed->ed.ed_headp &= htole32(~EHCI_TOGGLECARRY);
734 #endif
735 }
736
737 Static void
738 ehci_noop(usbd_pipe_handle pipe)
739 {
740 }
741
742 #ifdef EHCI_DEBUG
743 void
744 ehci_dumpregs(ehci_softc_t *sc)
745 {
746 int i;
747 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
748 EOREAD4(sc, EHCI_USBCMD),
749 EOREAD4(sc, EHCI_USBSTS),
750 EOREAD4(sc, EHCI_USBINTR));
751 for (i = 1; i <= sc->sc_noport; i++)
752 printf("port %d status=0x%08x\n", i,
753 EOREAD4(sc, EHCI_PORTSC(i)));
754 }
755
756 void
757 ehci_dump()
758 {
759 ehci_dumpregs(theehci);
760 }
761
762 void
763 ehci_dump_link(ehci_link_t link)
764 {
765 printf("0x%08x<", link);
766 switch (EHCI_LINK_TYPE(link)) {
767 case EHCI_LINK_ITD: printf("ITD"); break;
768 case EHCI_LINK_QH: printf("QH"); break;
769 case EHCI_LINK_SITD: printf("SITD"); break;
770 case EHCI_LINK_FSTN: printf("FSTN"); break;
771 }
772 if (link & EHCI_LINK_TERMINATE)
773 printf(",T>");
774 else
775 printf(">");
776 }
777
778 void
779 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
780 {
781 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
782 ehci_dump_qtd(&sqtd->qtd);
783 }
784
785 void
786 ehci_dump_qtd(ehci_qtd_t *qtd)
787 {
788 u_int32_t s;
789
790 printf(" next="); ehci_dump_link(qtd->qtd_next);
791 printf("altnext="); ehci_dump_link(qtd->qtd_altnext);
792 printf("\n");
793 s = qtd->qtd_status;
794 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
795 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
796 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
797 printf(" cerr=%d pid=%d stat=0x%02x\n", EHCI_QTD_GET_CERR(s),
798 EHCI_QTD_GET_PID(s), EHCI_QTD_GET_STATUS(s));
799 for (s = 0; s < 5; s++)
800 printf(" buffer[%d]=0x%08x\n", s, qtd->qtd_buffer[s]);
801 }
802
803 void
804 ehci_dump_sqh(ehci_soft_qh_t *sqh)
805 {
806 ehci_qh_t *qh = &sqh->qh;
807
808 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
809 printf(" link="); ehci_dump_link(qh->qh_link); printf("\n");
810 printf(" endp=0x%08x endphub=0x%08x\n", qh->qh_endp, qh->qh_endphub);
811 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd); printf("\n ");
812 ehci_dump_qtd(&qh->qh_qtd);
813 }
814
815 #endif
816
817 usbd_status
818 ehci_open(usbd_pipe_handle pipe)
819 {
820 usbd_device_handle dev = pipe->device;
821 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
822 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
823 u_int8_t addr = dev->address;
824 #if 0
825 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
826 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
827 ehci_soft_ed_t *sqh;
828 ehci_soft_qtd_t *sqtd;
829 ehci_soft_itd_t *sitd;
830 ehci_physaddr_t tdphys;
831 u_int32_t fmt;
832 usbd_status err;
833 int s;
834 int ival;
835 #endif
836
837 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
838 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
839
840 if (addr == sc->sc_addr) {
841 switch (ed->bEndpointAddress) {
842 case USB_CONTROL_ENDPOINT:
843 pipe->methods = &ehci_root_ctrl_methods;
844 break;
845 case UE_DIR_IN | EHCI_INTR_ENDPT:
846 pipe->methods = &ehci_root_intr_methods;
847 break;
848 default:
849 return (USBD_INVAL);
850 }
851 } else {
852 #if 0
853 sqtd = NULL;
854 sqh = NULL;
855
856 sqh = ehci_alloc_sqh(sc);
857 if (sqh == NULL)
858 goto bad0;
859 epipe->sqh = sqh;
860 if (xfertype == UE_ISOCHRONOUS || xfertype == UE_INTERRUPT) {
861 return (USBD_IOERROR);
862 } else {
863 sqtd = ehci_alloc_sqtd(sc);
864 if (sqtd == NULL) {
865 ehci_free_sqtd(sc, sqtd);
866 goto bad1;
867 }
868 epipe->tail.qtd = sqtd;
869 tdphys = sqtd->physaddr;
870 fmt = EHCI_ED_FORMAT_GEN | EHCI_ED_DIR_TD;
871 }
872 sqh->ed.ed_flags = htole32(
873 EHCI_ED_SET_FA(addr) |
874 EHCI_ED_SET_EN(ed->bEndpointAddress) |
875 (dev->lowspeed ? EHCI_ED_SPEED : 0) | fmt |
876 EHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
877 sqh->ed.ed_headp = sqh->ed.ed_tailp = htole32(tdphys);
878
879 switch (xfertype) {
880 case UE_CONTROL:
881 pipe->methods = &ehci_device_ctrl_methods;
882 err = usb_allocmem(&sc->sc_bus,
883 sizeof(usb_device_request_t),
884 0, &epipe->u.ctl.reqdma);
885 if (err)
886 goto bad;
887 s = splusb();
888 ehci_add_ed(sqh, sc->sc_ctrl_head);
889 splx(s);
890 break;
891 case UE_INTERRUPT:
892 pipe->methods = &ehci_device_intr_methods;
893 ival = pipe->interval;
894 if (ival == USBD_DEFAULT_INTERVAL)
895 ival = ed->bInterval;
896 return (ehci_device_setintr(sc, epipe, ival));
897 case UE_ISOCHRONOUS:
898 pipe->methods = &ehci_device_isoc_methods;
899 return (ehci_setup_isoc(pipe));
900 case UE_BULK:
901 pipe->methods = &ehci_device_bulk_methods;
902 s = splusb();
903 ehci_add_ed(sqh, sc->sc_bulk_head);
904 splx(s);
905 break;
906 }
907 #else
908 return (USBD_IOERROR);
909 #endif
910 }
911 return (USBD_NORMAL_COMPLETION);
912
913 #if 0
914 bad:
915 if (sqtd != NULL)
916 ehci_free_sqtd(sc, sqtd);
917 bad1:
918 if (sqh != NULL)
919 ehci_free_sqh(sc, sqh);
920 bad0:
921 return (USBD_NOMEM);
922 #endif
923 }
924
925 /***********/
926
927 /*
928 * Data structures and routines to emulate the root hub.
929 */
930 Static usb_device_descriptor_t ehci_devd = {
931 USB_DEVICE_DESCRIPTOR_SIZE,
932 UDESC_DEVICE, /* type */
933 {0x00, 0x02}, /* USB version */
934 UDCLASS_HUB, /* class */
935 UDSUBCLASS_HUB, /* subclass */
936 0, /* protocol */
937 64, /* max packet */
938 {0},{0},{0x00,0x01}, /* device id */
939 1,2,0, /* string indicies */
940 1 /* # of configurations */
941 };
942
943 Static usb_config_descriptor_t ehci_confd = {
944 USB_CONFIG_DESCRIPTOR_SIZE,
945 UDESC_CONFIG,
946 {USB_CONFIG_DESCRIPTOR_SIZE +
947 USB_INTERFACE_DESCRIPTOR_SIZE +
948 USB_ENDPOINT_DESCRIPTOR_SIZE},
949 1,
950 1,
951 0,
952 UC_SELF_POWERED,
953 0 /* max power */
954 };
955
956 Static usb_interface_descriptor_t ehci_ifcd = {
957 USB_INTERFACE_DESCRIPTOR_SIZE,
958 UDESC_INTERFACE,
959 0,
960 0,
961 1,
962 UICLASS_HUB,
963 UISUBCLASS_HUB,
964 0,
965 0
966 };
967
968 Static usb_endpoint_descriptor_t ehci_endpd = {
969 USB_ENDPOINT_DESCRIPTOR_SIZE,
970 UDESC_ENDPOINT,
971 UE_DIR_IN | EHCI_INTR_ENDPT,
972 UE_INTERRUPT,
973 {8, 0}, /* max packet */
974 255
975 };
976
977 Static usb_hub_descriptor_t ehci_hubd = {
978 USB_HUB_DESCRIPTOR_SIZE,
979 UDESC_HUB,
980 0,
981 {0,0},
982 0,
983 0,
984 {0},
985 };
986
987 Static int
988 ehci_str(p, l, s)
989 usb_string_descriptor_t *p;
990 int l;
991 char *s;
992 {
993 int i;
994
995 if (l == 0)
996 return (0);
997 p->bLength = 2 * strlen(s) + 2;
998 if (l == 1)
999 return (1);
1000 p->bDescriptorType = UDESC_STRING;
1001 l -= 2;
1002 for (i = 0; s[i] && l > 1; i++, l -= 2)
1003 USETW2(p->bString[i], 0, s[i]);
1004 return (2*i+2);
1005 }
1006
1007 /*
1008 * Simulate a hardware hub by handling all the necessary requests.
1009 */
1010 Static usbd_status
1011 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1012 {
1013 usbd_status err;
1014
1015 /* Insert last in queue. */
1016 err = usb_insert_transfer(xfer);
1017 if (err)
1018 return (err);
1019
1020 /* Pipe isn't running, start first */
1021 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1022 }
1023
1024 Static usbd_status
1025 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1026 {
1027 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1028 usb_device_request_t *req;
1029 void *buf = NULL;
1030 int port, i;
1031 int s, len, value, index, l, totlen = 0;
1032 usb_port_status_t ps;
1033 usb_hub_descriptor_t hubd;
1034 usbd_status err;
1035 u_int32_t v;
1036
1037 if (sc->sc_dying)
1038 return (USBD_IOERROR);
1039
1040 #ifdef DIAGNOSTIC
1041 if (!(xfer->rqflags & URQ_REQUEST))
1042 /* XXX panic */
1043 return (USBD_INVAL);
1044 #endif
1045 req = &xfer->request;
1046
1047 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1048 req->bmRequestType, req->bRequest));
1049
1050 len = UGETW(req->wLength);
1051 value = UGETW(req->wValue);
1052 index = UGETW(req->wIndex);
1053
1054 if (len != 0)
1055 buf = KERNADDR(&xfer->dmabuf);
1056
1057 #define C(x,y) ((x) | ((y) << 8))
1058 switch(C(req->bRequest, req->bmRequestType)) {
1059 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1060 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1061 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1062 /*
1063 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1064 * for the integrated root hub.
1065 */
1066 break;
1067 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1068 if (len > 0) {
1069 *(u_int8_t *)buf = sc->sc_conf;
1070 totlen = 1;
1071 }
1072 break;
1073 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1074 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1075 switch(value >> 8) {
1076 case UDESC_DEVICE:
1077 if ((value & 0xff) != 0) {
1078 err = USBD_IOERROR;
1079 goto ret;
1080 }
1081 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1082 USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1083 memcpy(buf, &ehci_devd, l);
1084 break;
1085 case UDESC_CONFIG:
1086 if ((value & 0xff) != 0) {
1087 err = USBD_IOERROR;
1088 goto ret;
1089 }
1090 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1091 memcpy(buf, &ehci_confd, l);
1092 buf = (char *)buf + l;
1093 len -= l;
1094 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1095 totlen += l;
1096 memcpy(buf, &ehci_ifcd, l);
1097 buf = (char *)buf + l;
1098 len -= l;
1099 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1100 totlen += l;
1101 memcpy(buf, &ehci_endpd, l);
1102 break;
1103 case UDESC_STRING:
1104 if (len == 0)
1105 break;
1106 *(u_int8_t *)buf = 0;
1107 totlen = 1;
1108 switch (value & 0xff) {
1109 case 1: /* Vendor */
1110 totlen = ehci_str(buf, len, sc->sc_vendor);
1111 break;
1112 case 2: /* Product */
1113 totlen = ehci_str(buf, len, "EHCI root hub");
1114 break;
1115 }
1116 break;
1117 default:
1118 err = USBD_IOERROR;
1119 goto ret;
1120 }
1121 break;
1122 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1123 if (len > 0) {
1124 *(u_int8_t *)buf = 0;
1125 totlen = 1;
1126 }
1127 break;
1128 case C(UR_GET_STATUS, UT_READ_DEVICE):
1129 if (len > 1) {
1130 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1131 totlen = 2;
1132 }
1133 break;
1134 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1135 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1136 if (len > 1) {
1137 USETW(((usb_status_t *)buf)->wStatus, 0);
1138 totlen = 2;
1139 }
1140 break;
1141 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1142 if (value >= USB_MAX_DEVICES) {
1143 err = USBD_IOERROR;
1144 goto ret;
1145 }
1146 sc->sc_addr = value;
1147 break;
1148 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1149 if (value != 0 && value != 1) {
1150 err = USBD_IOERROR;
1151 goto ret;
1152 }
1153 sc->sc_conf = value;
1154 break;
1155 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1156 break;
1157 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1158 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1159 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1160 err = USBD_IOERROR;
1161 goto ret;
1162 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1163 break;
1164 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1165 break;
1166 /* Hub requests */
1167 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1168 break;
1169 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1170 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1171 "port=%d feature=%d\n",
1172 index, value));
1173 if (index < 1 || index > sc->sc_noport) {
1174 err = USBD_IOERROR;
1175 goto ret;
1176 }
1177 port = EHCI_PORTSC(index);
1178 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1179 switch(value) {
1180 case UHF_PORT_ENABLE:
1181 EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1182 break;
1183 case UHF_PORT_SUSPEND:
1184 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1185 break;
1186 case UHF_PORT_POWER:
1187 EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1188 break;
1189 case UHF_C_PORT_CONNECTION:
1190 EOWRITE4(sc, port, v | EHCI_PS_CSC);
1191 break;
1192 case UHF_C_PORT_ENABLE:
1193 EOWRITE4(sc, port, v | EHCI_PS_PEC);
1194 break;
1195 case UHF_C_PORT_SUSPEND:
1196 /* how? */
1197 break;
1198 case UHF_C_PORT_OVER_CURRENT:
1199 EOWRITE4(sc, port, v | EHCI_PS_OCC);
1200 break;
1201 case UHF_C_PORT_RESET:
1202 sc->sc_isreset = 0;
1203 break;
1204 default:
1205 err = USBD_IOERROR;
1206 goto ret;
1207 }
1208 #if 0
1209 switch(value) {
1210 case UHF_C_PORT_CONNECTION:
1211 case UHF_C_PORT_ENABLE:
1212 case UHF_C_PORT_SUSPEND:
1213 case UHF_C_PORT_OVER_CURRENT:
1214 case UHF_C_PORT_RESET:
1215 /* Enable RHSC interrupt if condition is cleared. */
1216 if ((OREAD4(sc, port) >> 16) == 0)
1217 ehci_pcd_able(sc, 1);
1218 break;
1219 default:
1220 break;
1221 }
1222 #endif
1223 break;
1224 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1225 if (value != 0) {
1226 err = USBD_IOERROR;
1227 goto ret;
1228 }
1229 hubd = ehci_hubd;
1230 hubd.bNbrPorts = sc->sc_noport;
1231 v = EOREAD4(sc, EHCI_HCSPARAMS);
1232 USETW(hubd.wHubCharacteristics,
1233 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH);
1234 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1235 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1236 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1237 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1238 l = min(len, hubd.bDescLength);
1239 totlen = l;
1240 memcpy(buf, &hubd, l);
1241 break;
1242 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1243 if (len != 4) {
1244 err = USBD_IOERROR;
1245 goto ret;
1246 }
1247 memset(buf, 0, len); /* ? XXX */
1248 totlen = len;
1249 break;
1250 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1251 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1252 index));
1253 if (index < 1 || index > sc->sc_noport) {
1254 err = USBD_IOERROR;
1255 goto ret;
1256 }
1257 if (len != 4) {
1258 err = USBD_IOERROR;
1259 goto ret;
1260 }
1261 v = EOREAD4(sc, EHCI_PORTSC(index));
1262 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1263 v));
1264 i = 0;
1265 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1266 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1267 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1268 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1269 if (v & EHCI_PS_PR) i |= UPS_RESET;
1270 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1271 USETW(ps.wPortStatus, i);
1272 i = 0;
1273 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1274 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1275 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1276 if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1277 USETW(ps.wPortChange, i);
1278 l = min(len, sizeof ps);
1279 memcpy(buf, &ps, l);
1280 totlen = l;
1281 break;
1282 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1283 err = USBD_IOERROR;
1284 goto ret;
1285 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1286 break;
1287 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1288 if (index < 1 || index > sc->sc_noport) {
1289 err = USBD_IOERROR;
1290 goto ret;
1291 }
1292 port = EHCI_PORTSC(index);
1293 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1294 switch(value) {
1295 case UHF_PORT_ENABLE:
1296 EOWRITE4(sc, port, v | EHCI_PS_PE);
1297 break;
1298 case UHF_PORT_SUSPEND:
1299 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1300 break;
1301 case UHF_PORT_RESET:
1302 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1303 index));
1304 if (EHCI_PS_IS_LOWSPEED(v)) {
1305 /* Low speed device, give up ownership. */
1306 ehci_disown(sc, index, 1);
1307 break;
1308 }
1309 /* Start reset sequence. */
1310 v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1311 EOWRITE4(sc, port, v | EHCI_PS_PR);
1312 /* Wait for reset to complete. */
1313 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY * 2);
1314 /* Terminate reset sequence. */
1315 EOWRITE4(sc, port, v);
1316 /* Wait for HC to complete reset. */
1317 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE * 2);
1318 v = EOREAD4(sc, port);
1319 DPRINTF(("ehci after reset, status=0x%08x\n", v));
1320 if (v & EHCI_PS_PR) {
1321 printf("%s: port reset timeout\n",
1322 USBDEVNAME(sc->sc_bus.bdev));
1323 return (USBD_TIMEOUT);
1324 }
1325 if (!(v & EHCI_PS_PE)) {
1326 /* Not a high speed device, give up ownership.*/
1327 ehci_disown(sc, index, 0);
1328 break;
1329 }
1330 sc->sc_isreset = 1;
1331 DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1332 index, v));
1333 break;
1334 case UHF_PORT_POWER:
1335 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1336 "%d\n", index));
1337 EOWRITE4(sc, port, v | EHCI_PS_PP);
1338 break;
1339 default:
1340 err = USBD_IOERROR;
1341 goto ret;
1342 }
1343 break;
1344 default:
1345 err = USBD_IOERROR;
1346 goto ret;
1347 }
1348 xfer->actlen = totlen;
1349 err = USBD_NORMAL_COMPLETION;
1350 ret:
1351 xfer->status = err;
1352 s = splusb();
1353 usb_transfer_complete(xfer);
1354 splx(s);
1355 return (USBD_IN_PROGRESS);
1356 }
1357
1358 void
1359 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1360 {
1361 int i, port;
1362 u_int32_t v;
1363
1364 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1365 #ifdef DIAGNOSTIC
1366 if (sc->sc_npcomp != 0) {
1367 i = (index-1) / sc->sc_npcomp;
1368 if (i >= sc->sc_ncomp)
1369 printf("%s: strange port\n",
1370 USBDEVNAME(sc->sc_bus.bdev));
1371 else
1372 printf("%s: handing over %s speed device on "
1373 "port %d to %s\n",
1374 USBDEVNAME(sc->sc_bus.bdev),
1375 lowspeed ? "low" : "full",
1376 index, USBDEVNAME(sc->sc_comps[i]->bdev));
1377 } else {
1378 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1379 }
1380 #endif
1381 port = EHCI_PORTSC(index);
1382 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1383 EOWRITE4(sc, port, v | EHCI_PS_PO);
1384 }
1385
1386 /* Abort a root control request. */
1387 Static void
1388 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1389 {
1390 /* Nothing to do, all transfers are synchronous. */
1391 }
1392
1393 /* Close the root pipe. */
1394 Static void
1395 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1396 {
1397 DPRINTF(("ehci_root_ctrl_close\n"));
1398 /* Nothing to do. */
1399 }
1400
1401 void
1402 ehci_root_intr_done(usbd_xfer_handle xfer)
1403 {
1404 xfer->hcpriv = NULL;
1405 }
1406
1407 Static usbd_status
1408 ehci_root_intr_transfer(usbd_xfer_handle xfer)
1409 {
1410 usbd_status err;
1411
1412 /* Insert last in queue. */
1413 err = usb_insert_transfer(xfer);
1414 if (err)
1415 return (err);
1416
1417 /* Pipe isn't running, start first */
1418 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1419 }
1420
1421 Static usbd_status
1422 ehci_root_intr_start(usbd_xfer_handle xfer)
1423 {
1424 usbd_pipe_handle pipe = xfer->pipe;
1425 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1426
1427 if (sc->sc_dying)
1428 return (USBD_IOERROR);
1429
1430 sc->sc_intrxfer = xfer;
1431
1432 return (USBD_IN_PROGRESS);
1433 }
1434
1435 /* Abort a root interrupt request. */
1436 Static void
1437 ehci_root_intr_abort(usbd_xfer_handle xfer)
1438 {
1439 int s;
1440
1441 if (xfer->pipe->intrxfer == xfer) {
1442 DPRINTF(("ehci_root_intr_abort: remove\n"));
1443 xfer->pipe->intrxfer = NULL;
1444 }
1445 xfer->status = USBD_CANCELLED;
1446 s = splusb();
1447 usb_transfer_complete(xfer);
1448 splx(s);
1449 }
1450
1451 /* Close the root pipe. */
1452 Static void
1453 ehci_root_intr_close(usbd_pipe_handle pipe)
1454 {
1455 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1456
1457 DPRINTF(("ehci_root_intr_close\n"));
1458
1459 sc->sc_intrxfer = NULL;
1460 }
1461
1462 void
1463 ehci_root_ctrl_done(usbd_xfer_handle xfer)
1464 {
1465 xfer->hcpriv = NULL;
1466 }
1467
1468 /************************/
1469
1470 ehci_soft_qh_t *
1471 ehci_alloc_sqh(ehci_softc_t *sc)
1472 {
1473 ehci_soft_qh_t *sqh;
1474 usbd_status err;
1475 int i, offs;
1476 usb_dma_t dma;
1477
1478 if (sc->sc_freeqhs == NULL) {
1479 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
1480 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
1481 EHCI_PAGE_SIZE, &dma);
1482 if (err)
1483 return (0);
1484 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
1485 offs = i * EHCI_SQH_SIZE;
1486 sqh = (ehci_soft_qh_t *)((char *)KERNADDR(&dma) +offs);
1487 sqh->physaddr = DMAADDR(&dma) + offs;
1488 sqh->next = sc->sc_freeqhs;
1489 sc->sc_freeqhs = sqh;
1490 }
1491 }
1492 sqh = sc->sc_freeqhs;
1493 sc->sc_freeqhs = sqh->next;
1494 memset(&sqh->qh, 0, sizeof(ehci_qh_t));
1495 sqh->next = 0;
1496 return (sqh);
1497 }
1498
1499 void
1500 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
1501 {
1502 sqh->next = sc->sc_freeqhs;
1503 sc->sc_freeqhs = sqh;
1504 }
1505
1506 ehci_soft_qtd_t *
1507 ehci_alloc_sqtd(ehci_softc_t *sc)
1508 {
1509 ehci_soft_qtd_t *sqtd;
1510 usbd_status err;
1511 int i, offs;
1512 usb_dma_t dma;
1513 int s;
1514
1515 if (sc->sc_freeqtds == NULL) {
1516 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
1517 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
1518 EHCI_PAGE_SIZE, &dma);
1519 if (err)
1520 return (NULL);
1521 s = splusb();
1522 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
1523 offs = i * EHCI_SQTD_SIZE;
1524 sqtd = (ehci_soft_qtd_t *)((char *)KERNADDR(&dma)+offs);
1525 sqtd->physaddr = DMAADDR(&dma) + offs;
1526 sqtd->nextqtd = sc->sc_freeqtds;
1527 sc->sc_freeqtds = sqtd;
1528 }
1529 splx(s);
1530 }
1531
1532 s = splusb();
1533 sqtd = sc->sc_freeqtds;
1534 sc->sc_freeqtds = sqtd->nextqtd;
1535 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
1536 sqtd->nextqtd = NULL;
1537 sqtd->xfer = NULL;
1538 ehci_hash_add_qtd(sc, sqtd);
1539 splx(s);
1540
1541 return (sqtd);
1542 }
1543
1544 void
1545 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1546 {
1547 int s;
1548
1549 s = splusb();
1550 ehci_hash_rem_qtd(sc, sqtd);
1551 sqtd->nextqtd = sc->sc_freeqtds;
1552 sc->sc_freeqtds = sqtd;
1553 splx(s);
1554 }
1555
1556 /*
1557 * When a transfer is completed the TD is added to the done queue by
1558 * the host controller. This queue is the processed by software.
1559 * Unfortunately the queue contains the physical address of the TD
1560 * and we have no simple way to translate this back to a kernel address.
1561 * To make the translation possible (and fast) we use a hash table of
1562 * TDs currently in the schedule. The physical address is used as the
1563 * hash value.
1564 */
1565
1566 #define HASH(a) (((a) >> 4) % EHCI_HASH_SIZE)
1567 /* Called at splusb() */
1568 void
1569 ehci_hash_add_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1570 {
1571 int h = HASH(sqtd->physaddr);
1572
1573 SPLUSBCHECK;
1574
1575 LIST_INSERT_HEAD(&sc->sc_hash_qtds[h], sqtd, hnext);
1576 }
1577
1578 /* Called at splusb() */
1579 void
1580 ehci_hash_rem_qtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
1581 {
1582 SPLUSBCHECK;
1583
1584 LIST_REMOVE(sqtd, hnext);
1585 }
1586
1587 ehci_soft_qtd_t *
1588 ehci_hash_find_qtd(ehci_softc_t *sc, ehci_physaddr_t a)
1589 {
1590 int h = HASH(a);
1591 ehci_soft_qtd_t *sqtd;
1592
1593 for (sqtd = LIST_FIRST(&sc->sc_hash_qtds[h]);
1594 sqtd != NULL;
1595 sqtd = LIST_NEXT(sqtd, hnext))
1596 if (sqtd->physaddr == a)
1597 return (sqtd);
1598 return (NULL);
1599 }
1600
1601 /************************/
1602
1603 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1604 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1605 Static void ehci_device_ctrl_abort(usbd_xfer_handle xfer) { }
1606 Static void ehci_device_ctrl_close(usbd_pipe_handle pipe) { }
1607 Static void ehci_device_ctrl_done(usbd_xfer_handle xfer) { }
1608
1609 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1610 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1611 Static void ehci_device_bulk_abort(usbd_xfer_handle xfer) { }
1612 Static void ehci_device_bulk_close(usbd_pipe_handle pipe) { }
1613 Static void ehci_device_bulk_done(usbd_xfer_handle xfer) { }
1614
1615 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1616 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1617 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
1618 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
1619 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
1620
1621 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1622 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
1623 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
1624 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
1625 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }
1626