ehci.c revision 1.90
1 /* $NetBSD: ehci.c,v 1.90 2004/12/21 16:41:24 fvdl Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.90 2004/12/21 16:41:24 fvdl Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 usbd_status 316 ehci_init(ehci_softc_t *sc) 317 { 318 u_int32_t version, sparams, cparams, hcr; 319 u_int i; 320 usbd_status err; 321 ehci_soft_qh_t *sqh; 322 u_int ncomp; 323 324 DPRINTF(("ehci_init: start\n")); 325 #ifdef EHCI_DEBUG 326 theehci = sc; 327 #endif 328 329 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 330 331 version = EREAD2(sc, EHCI_HCIVERSION); 332 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 333 version >> 8, version & 0xff); 334 335 sparams = EREAD4(sc, EHCI_HCSPARAMS); 336 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 337 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 338 ncomp = EHCI_HCS_N_CC(sparams); 339 if (ncomp != sc->sc_ncomp) { 340 aprint_error("%s: wrong number of companions (%d != %d)\n", 341 USBDEVNAME(sc->sc_bus.bdev), 342 ncomp, sc->sc_ncomp); 343 #if NOHCI == 0 || NUHCI == 0 344 aprint_error("%s: ohci or uhci probably not configured\n", 345 USBDEVNAME(sc->sc_bus.bdev)); 346 #endif 347 if (ncomp < sc->sc_ncomp) 348 sc->sc_ncomp = ncomp; 349 } 350 if (sc->sc_ncomp > 0) { 351 aprint_normal("%s: companion controller%s, %d port%s each:", 352 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 353 EHCI_HCS_N_PCC(sparams), 354 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 355 for (i = 0; i < sc->sc_ncomp; i++) 356 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 357 aprint_normal("\n"); 358 } 359 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 360 cparams = EREAD4(sc, EHCI_HCCPARAMS); 361 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 362 363 if (EHCI_HCC_64BIT(cparams)) { 364 /* MUST clear segment register if 64 bit capable. */ 365 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 366 } 367 368 sc->sc_bus.usbrev = USBREV_2_0; 369 370 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 371 USB_MEM_RESERVE); 372 373 /* Reset the controller */ 374 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 375 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 376 usb_delay_ms(&sc->sc_bus, 1); 377 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 378 for (i = 0; i < 100; i++) { 379 usb_delay_ms(&sc->sc_bus, 1); 380 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 381 if (!hcr) 382 break; 383 } 384 if (hcr) { 385 aprint_error("%s: reset timeout\n", 386 USBDEVNAME(sc->sc_bus.bdev)); 387 return (USBD_IOERROR); 388 } 389 390 /* XXX need proper intr scheduling */ 391 sc->sc_rand = 96; 392 393 /* frame list size at default, read back what we got and use that */ 394 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 395 case 0: sc->sc_flsize = 1024; break; 396 case 1: sc->sc_flsize = 512; break; 397 case 2: sc->sc_flsize = 256; break; 398 case 3: return (USBD_IOERROR); 399 } 400 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 401 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 402 if (err) 403 return (err); 404 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 405 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 406 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 407 408 /* Set up the bus struct. */ 409 sc->sc_bus.methods = &ehci_bus_methods; 410 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 411 412 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 413 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 414 415 sc->sc_eintrs = EHCI_NORMAL_INTRS; 416 417 /* 418 * Allocate the interrupt dummy QHs. These are arranged to give poll 419 * intervals that are powers of 2 times 1ms. 420 */ 421 for (i = 0; i < EHCI_INTRQHS; i++) { 422 sqh = ehci_alloc_sqh(sc); 423 if (sqh == NULL) { 424 err = USBD_NOMEM; 425 goto bad1; 426 } 427 sc->sc_islots[i].sqh = sqh; 428 } 429 for (i = 0; i < EHCI_INTRQHS; i++) { 430 sqh = sc->sc_islots[i].sqh; 431 if (i == 0) { 432 /* The last (1ms) QH terminates. */ 433 sqh->qh.qh_link = EHCI_NULL; 434 sqh->next = NULL; 435 } else { 436 /* Otherwise the next QH has half the poll interval */ 437 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 438 sqh->qh.qh_link = htole32(sqh->next->physaddr | 439 EHCI_LINK_QH); 440 } 441 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 442 sqh->qh.qh_link = EHCI_NULL; 443 sqh->qh.qh_curqtd = EHCI_NULL; 444 sqh->next = NULL; 445 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 446 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 447 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 448 sqh->sqtd = NULL; 449 } 450 /* Point the frame list at the last level (128ms). */ 451 for (i = 0; i < sc->sc_flsize; i++) { 452 sc->sc_flist[i] = htole32(EHCI_LINK_QH | 453 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 454 i)].sqh->physaddr); 455 } 456 457 /* Allocate dummy QH that starts the async list. */ 458 sqh = ehci_alloc_sqh(sc); 459 if (sqh == NULL) { 460 err = USBD_NOMEM; 461 goto bad1; 462 } 463 /* Fill the QH */ 464 sqh->qh.qh_endp = 465 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 466 sqh->qh.qh_link = 467 htole32(sqh->physaddr | EHCI_LINK_QH); 468 sqh->qh.qh_curqtd = EHCI_NULL; 469 sqh->next = NULL; 470 /* Fill the overlay qTD */ 471 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 472 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 473 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 474 sqh->sqtd = NULL; 475 #ifdef EHCI_DEBUG 476 if (ehcidebug) { 477 ehci_dump_sqh(sqh); 478 } 479 #endif 480 481 /* Point to async list */ 482 sc->sc_async_head = sqh; 483 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 484 485 usb_callout_init(sc->sc_tmo_pcd); 486 487 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 488 489 /* Enable interrupts */ 490 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 491 492 /* Turn on controller */ 493 EOWRITE4(sc, EHCI_USBCMD, 494 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 495 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 496 EHCI_CMD_ASE | 497 EHCI_CMD_PSE | 498 EHCI_CMD_RS); 499 500 /* Take over port ownership */ 501 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 502 503 for (i = 0; i < 100; i++) { 504 usb_delay_ms(&sc->sc_bus, 1); 505 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 506 if (!hcr) 507 break; 508 } 509 if (hcr) { 510 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 511 return (USBD_IOERROR); 512 } 513 514 return (USBD_NORMAL_COMPLETION); 515 516 #if 0 517 bad2: 518 ehci_free_sqh(sc, sc->sc_async_head); 519 #endif 520 bad1: 521 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 522 return (err); 523 } 524 525 int 526 ehci_intr(void *v) 527 { 528 ehci_softc_t *sc = v; 529 530 if (sc == NULL || sc->sc_dying) 531 return (0); 532 533 /* If we get an interrupt while polling, then just ignore it. */ 534 if (sc->sc_bus.use_polling) { 535 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 536 537 if (intrs) 538 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 539 #ifdef DIAGNOSTIC 540 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 541 #endif 542 return (0); 543 } 544 545 return (ehci_intr1(sc)); 546 } 547 548 Static int 549 ehci_intr1(ehci_softc_t *sc) 550 { 551 u_int32_t intrs, eintrs; 552 553 DPRINTFN(20,("ehci_intr1: enter\n")); 554 555 /* In case the interrupt occurs before initialization has completed. */ 556 if (sc == NULL) { 557 #ifdef DIAGNOSTIC 558 printf("ehci_intr1: sc == NULL\n"); 559 #endif 560 return (0); 561 } 562 563 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 564 if (!intrs) 565 return (0); 566 567 eintrs = intrs & sc->sc_eintrs; 568 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 569 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 570 (u_int)eintrs)); 571 if (!eintrs) 572 return (0); 573 574 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 575 sc->sc_bus.intr_context++; 576 sc->sc_bus.no_intrs++; 577 if (eintrs & EHCI_STS_IAA) { 578 DPRINTF(("ehci_intr1: door bell\n")); 579 wakeup(&sc->sc_async_head); 580 eintrs &= ~EHCI_STS_IAA; 581 } 582 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 583 DPRINTFN(5,("ehci_intr1: %s %s\n", 584 eintrs & EHCI_STS_INT ? "INT" : "", 585 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 586 usb_schedsoftintr(&sc->sc_bus); 587 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 588 } 589 if (eintrs & EHCI_STS_HSE) { 590 printf("%s: unrecoverable error, controller halted\n", 591 USBDEVNAME(sc->sc_bus.bdev)); 592 /* XXX what else */ 593 } 594 if (eintrs & EHCI_STS_PCD) { 595 ehci_pcd(sc, sc->sc_intrxfer); 596 /* 597 * Disable PCD interrupt for now, because it will be 598 * on until the port has been reset. 599 */ 600 ehci_pcd_able(sc, 0); 601 /* Do not allow RHSC interrupts > 1 per second */ 602 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 603 eintrs &= ~EHCI_STS_PCD; 604 } 605 606 sc->sc_bus.intr_context--; 607 608 if (eintrs != 0) { 609 /* Block unprocessed interrupts. */ 610 sc->sc_eintrs &= ~eintrs; 611 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 612 printf("%s: blocking intrs 0x%x\n", 613 USBDEVNAME(sc->sc_bus.bdev), eintrs); 614 } 615 616 return (1); 617 } 618 619 void 620 ehci_pcd_able(ehci_softc_t *sc, int on) 621 { 622 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 623 if (on) 624 sc->sc_eintrs |= EHCI_STS_PCD; 625 else 626 sc->sc_eintrs &= ~EHCI_STS_PCD; 627 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 628 } 629 630 void 631 ehci_pcd_enable(void *v_sc) 632 { 633 ehci_softc_t *sc = v_sc; 634 635 ehci_pcd_able(sc, 1); 636 } 637 638 void 639 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 640 { 641 usbd_pipe_handle pipe; 642 u_char *p; 643 int i, m; 644 645 if (xfer == NULL) { 646 /* Just ignore the change. */ 647 return; 648 } 649 650 pipe = xfer->pipe; 651 652 p = KERNADDR(&xfer->dmabuf, 0); 653 m = min(sc->sc_noport, xfer->length * 8 - 1); 654 memset(p, 0, xfer->length); 655 for (i = 1; i <= m; i++) { 656 /* Pick out CHANGE bits from the status reg. */ 657 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 658 p[i/8] |= 1 << (i%8); 659 } 660 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 661 xfer->actlen = xfer->length; 662 xfer->status = USBD_NORMAL_COMPLETION; 663 664 usb_transfer_complete(xfer); 665 } 666 667 void 668 ehci_softintr(void *v) 669 { 670 ehci_softc_t *sc = v; 671 struct ehci_xfer *ex, *nextex; 672 673 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 674 sc->sc_bus.intr_context)); 675 676 sc->sc_bus.intr_context++; 677 678 /* 679 * The only explanation I can think of for why EHCI is as brain dead 680 * as UHCI interrupt-wise is that Intel was involved in both. 681 * An interrupt just tells us that something is done, we have no 682 * clue what, so we need to scan through all active transfers. :-( 683 */ 684 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 685 nextex = LIST_NEXT(ex, inext); 686 ehci_check_intr(sc, ex); 687 } 688 689 #ifdef USB_USE_SOFTINTR 690 if (sc->sc_softwake) { 691 sc->sc_softwake = 0; 692 wakeup(&sc->sc_softwake); 693 } 694 #endif /* USB_USE_SOFTINTR */ 695 696 sc->sc_bus.intr_context--; 697 } 698 699 /* Check for an interrupt. */ 700 void 701 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 702 { 703 ehci_soft_qtd_t *sqtd, *lsqtd; 704 u_int32_t status; 705 706 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 707 708 if (ex->sqtdstart == NULL) { 709 printf("ehci_check_intr: sqtdstart=NULL\n"); 710 return; 711 } 712 lsqtd = ex->sqtdend; 713 #ifdef DIAGNOSTIC 714 if (lsqtd == NULL) { 715 printf("ehci_check_intr: lsqtd==0\n"); 716 return; 717 } 718 #endif 719 /* 720 * If the last TD is still active we need to check whether there 721 * is a an error somewhere in the middle, or whether there was a 722 * short packet (SPD and not ACTIVE). 723 */ 724 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 725 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 726 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 727 status = le32toh(sqtd->qtd.qtd_status); 728 /* If there's an active QTD the xfer isn't done. */ 729 if (status & EHCI_QTD_ACTIVE) 730 break; 731 /* Any kind of error makes the xfer done. */ 732 if (status & EHCI_QTD_HALTED) 733 goto done; 734 /* We want short packets, and it is short: it's done */ 735 if (EHCI_QTD_GET_BYTES(status) != 0) 736 goto done; 737 } 738 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 739 ex, ex->sqtdstart)); 740 return; 741 } 742 done: 743 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 744 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 745 ehci_idone(ex); 746 } 747 748 void 749 ehci_idone(struct ehci_xfer *ex) 750 { 751 usbd_xfer_handle xfer = &ex->xfer; 752 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 753 ehci_soft_qtd_t *sqtd, *lsqtd; 754 u_int32_t status = 0, nstatus = 0; 755 int actlen; 756 uint pkts_left; 757 758 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 759 #ifdef DIAGNOSTIC 760 { 761 int s = splhigh(); 762 if (ex->isdone) { 763 splx(s); 764 #ifdef EHCI_DEBUG 765 printf("ehci_idone: ex is done!\n "); 766 ehci_dump_exfer(ex); 767 #else 768 printf("ehci_idone: ex=%p is done!\n", ex); 769 #endif 770 return; 771 } 772 ex->isdone = 1; 773 splx(s); 774 } 775 #endif 776 777 if (xfer->status == USBD_CANCELLED || 778 xfer->status == USBD_TIMEOUT) { 779 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 780 return; 781 } 782 783 #ifdef EHCI_DEBUG 784 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 785 if (ehcidebug > 10) 786 ehci_dump_sqtds(ex->sqtdstart); 787 #endif 788 789 /* The transfer is done, compute actual length and status. */ 790 lsqtd = ex->sqtdend; 791 actlen = 0; 792 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 793 nstatus = le32toh(sqtd->qtd.qtd_status); 794 if (nstatus & EHCI_QTD_ACTIVE) 795 break; 796 797 status = nstatus; 798 /* halt is ok if descriptor is last, and complete */ 799 if (sqtd->qtd.qtd_next == EHCI_NULL && 800 EHCI_QTD_GET_BYTES(status) == 0) 801 status &= ~EHCI_QTD_HALTED; 802 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 803 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 804 } 805 806 /* 807 * If there are left over TDs we need to update the toggle. 808 * The default pipe doesn't need it since control transfers 809 * start the toggle at 0 every time. 810 */ 811 if (sqtd != lsqtd->nextqtd && 812 xfer->pipe->device->default_pipe != xfer->pipe) { 813 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 814 #if 0 815 ehci_dump_sqh(epipe->sqh); 816 ehci_dump_sqtds(ex->sqtdstart); 817 #endif 818 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 819 } 820 821 /* 822 * For a short transfer we need to update the toggle for the missing 823 * packets within the qTD. 824 */ 825 pkts_left = EHCI_QTD_GET_BYTES(status) / 826 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 827 epipe->nexttoggle ^= pkts_left % 2; 828 829 status &= EHCI_QTD_STATERRS; 830 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 831 xfer->length, actlen, status)); 832 xfer->actlen = actlen; 833 if (status != 0) { 834 #ifdef EHCI_DEBUG 835 char sbuf[128]; 836 837 bitmask_snprintf((u_int32_t)status, 838 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 839 "\3MISSED", sbuf, sizeof(sbuf)); 840 841 DPRINTFN((status == EHCI_QTD_HALTED) ? 2 : 0, 842 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 843 "status 0x%s\n", 844 xfer->pipe->device->address, 845 xfer->pipe->endpoint->edesc->bEndpointAddress, 846 sbuf)); 847 if (ehcidebug > 2) { 848 ehci_dump_sqh(epipe->sqh); 849 ehci_dump_sqtds(ex->sqtdstart); 850 } 851 #endif 852 if (status == EHCI_QTD_HALTED) 853 xfer->status = USBD_STALLED; 854 else 855 xfer->status = USBD_IOERROR; /* more info XXX */ 856 } else { 857 xfer->status = USBD_NORMAL_COMPLETION; 858 } 859 860 usb_transfer_complete(xfer); 861 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 862 } 863 864 /* 865 * Wait here until controller claims to have an interrupt. 866 * Then call ehci_intr and return. Use timeout to avoid waiting 867 * too long. 868 */ 869 void 870 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 871 { 872 int timo = xfer->timeout; 873 int usecs; 874 u_int32_t intrs; 875 876 xfer->status = USBD_IN_PROGRESS; 877 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 878 usb_delay_ms(&sc->sc_bus, 1); 879 if (sc->sc_dying) 880 break; 881 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 882 sc->sc_eintrs; 883 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 884 #ifdef EHCI_DEBUG 885 if (ehcidebug > 15) 886 ehci_dump_regs(sc); 887 #endif 888 if (intrs) { 889 ehci_intr1(sc); 890 if (xfer->status != USBD_IN_PROGRESS) 891 return; 892 } 893 } 894 895 /* Timeout */ 896 DPRINTF(("ehci_waitintr: timeout\n")); 897 xfer->status = USBD_TIMEOUT; 898 usb_transfer_complete(xfer); 899 /* XXX should free TD */ 900 } 901 902 void 903 ehci_poll(struct usbd_bus *bus) 904 { 905 ehci_softc_t *sc = (ehci_softc_t *)bus; 906 #ifdef EHCI_DEBUG 907 static int last; 908 int new; 909 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 910 if (new != last) { 911 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 912 last = new; 913 } 914 #endif 915 916 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 917 ehci_intr1(sc); 918 } 919 920 int 921 ehci_detach(struct ehci_softc *sc, int flags) 922 { 923 int rv = 0; 924 925 if (sc->sc_child != NULL) 926 rv = config_detach(sc->sc_child, flags); 927 928 if (rv != 0) 929 return (rv); 930 931 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 932 933 if (sc->sc_powerhook != NULL) 934 powerhook_disestablish(sc->sc_powerhook); 935 if (sc->sc_shutdownhook != NULL) 936 shutdownhook_disestablish(sc->sc_shutdownhook); 937 938 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 939 940 /* XXX free other data structures XXX */ 941 942 return (rv); 943 } 944 945 946 int 947 ehci_activate(device_ptr_t self, enum devact act) 948 { 949 struct ehci_softc *sc = (struct ehci_softc *)self; 950 int rv = 0; 951 952 switch (act) { 953 case DVACT_ACTIVATE: 954 return (EOPNOTSUPP); 955 956 case DVACT_DEACTIVATE: 957 if (sc->sc_child != NULL) 958 rv = config_deactivate(sc->sc_child); 959 sc->sc_dying = 1; 960 break; 961 } 962 return (rv); 963 } 964 965 /* 966 * Handle suspend/resume. 967 * 968 * We need to switch to polling mode here, because this routine is 969 * called from an interrupt context. This is all right since we 970 * are almost suspended anyway. 971 */ 972 void 973 ehci_power(int why, void *v) 974 { 975 ehci_softc_t *sc = v; 976 u_int32_t cmd, hcr; 977 int s, i; 978 979 #ifdef EHCI_DEBUG 980 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 981 if (ehcidebug > 0) 982 ehci_dump_regs(sc); 983 #endif 984 985 s = splhardusb(); 986 switch (why) { 987 case PWR_SUSPEND: 988 case PWR_STANDBY: 989 sc->sc_bus.use_polling++; 990 991 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 992 993 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 994 EOWRITE4(sc, EHCI_USBCMD, cmd); 995 996 for (i = 0; i < 100; i++) { 997 hcr = EOREAD4(sc, EHCI_USBSTS) & 998 (EHCI_STS_ASS | EHCI_STS_PSS); 999 if (hcr == 0) 1000 break; 1001 1002 usb_delay_ms(&sc->sc_bus, 1); 1003 } 1004 if (hcr != 0) { 1005 printf("%s: reset timeout\n", 1006 USBDEVNAME(sc->sc_bus.bdev)); 1007 } 1008 1009 cmd &= ~EHCI_CMD_RS; 1010 EOWRITE4(sc, EHCI_USBCMD, cmd); 1011 1012 for (i = 0; i < 100; i++) { 1013 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1014 if (hcr == EHCI_STS_HCH) 1015 break; 1016 1017 usb_delay_ms(&sc->sc_bus, 1); 1018 } 1019 if (hcr != EHCI_STS_HCH) { 1020 printf("%s: config timeout\n", 1021 USBDEVNAME(sc->sc_bus.bdev)); 1022 } 1023 1024 sc->sc_bus.use_polling--; 1025 break; 1026 1027 case PWR_RESUME: 1028 sc->sc_bus.use_polling++; 1029 1030 /* restore things in case the bios sucks */ 1031 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1032 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1033 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1034 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1035 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1036 1037 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1038 1039 for (i = 0; i < 100; i++) { 1040 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1041 if (hcr != EHCI_STS_HCH) 1042 break; 1043 1044 usb_delay_ms(&sc->sc_bus, 1); 1045 } 1046 if (hcr == EHCI_STS_HCH) { 1047 printf("%s: config timeout\n", 1048 USBDEVNAME(sc->sc_bus.bdev)); 1049 } 1050 1051 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1052 1053 sc->sc_bus.use_polling--; 1054 break; 1055 case PWR_SOFTSUSPEND: 1056 case PWR_SOFTSTANDBY: 1057 case PWR_SOFTRESUME: 1058 break; 1059 } 1060 splx(s); 1061 1062 #ifdef EHCI_DEBUG 1063 DPRINTF(("ehci_power: sc=%p\n", sc)); 1064 if (ehcidebug > 0) 1065 ehci_dump_regs(sc); 1066 #endif 1067 } 1068 1069 /* 1070 * Shut down the controller when the system is going down. 1071 */ 1072 void 1073 ehci_shutdown(void *v) 1074 { 1075 ehci_softc_t *sc = v; 1076 1077 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1078 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1079 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1080 } 1081 1082 usbd_status 1083 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1084 { 1085 struct ehci_softc *sc = (struct ehci_softc *)bus; 1086 usbd_status err; 1087 1088 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1089 if (err == USBD_NOMEM) 1090 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1091 #ifdef EHCI_DEBUG 1092 if (err) 1093 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1094 #endif 1095 return (err); 1096 } 1097 1098 void 1099 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1100 { 1101 struct ehci_softc *sc = (struct ehci_softc *)bus; 1102 1103 if (dma->block->flags & USB_DMA_RESERVE) { 1104 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1105 dma); 1106 return; 1107 } 1108 usb_freemem(&sc->sc_bus, dma); 1109 } 1110 1111 usbd_xfer_handle 1112 ehci_allocx(struct usbd_bus *bus) 1113 { 1114 struct ehci_softc *sc = (struct ehci_softc *)bus; 1115 usbd_xfer_handle xfer; 1116 1117 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1118 if (xfer != NULL) { 1119 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1120 #ifdef DIAGNOSTIC 1121 if (xfer->busy_free != XFER_FREE) { 1122 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1123 xfer->busy_free); 1124 } 1125 #endif 1126 } else { 1127 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1128 } 1129 if (xfer != NULL) { 1130 memset(xfer, 0, sizeof(struct ehci_xfer)); 1131 #ifdef DIAGNOSTIC 1132 EXFER(xfer)->isdone = 1; 1133 xfer->busy_free = XFER_BUSY; 1134 #endif 1135 } 1136 return (xfer); 1137 } 1138 1139 void 1140 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1141 { 1142 struct ehci_softc *sc = (struct ehci_softc *)bus; 1143 1144 #ifdef DIAGNOSTIC 1145 if (xfer->busy_free != XFER_BUSY) { 1146 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1147 xfer->busy_free); 1148 return; 1149 } 1150 xfer->busy_free = XFER_FREE; 1151 if (!EXFER(xfer)->isdone) { 1152 printf("ehci_freex: !isdone\n"); 1153 return; 1154 } 1155 #endif 1156 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1157 } 1158 1159 Static void 1160 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1161 { 1162 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1163 1164 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1165 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1166 #ifdef USB_DEBUG 1167 if (ehcidebug) 1168 usbd_dump_pipe(pipe); 1169 #endif 1170 epipe->nexttoggle = 0; 1171 } 1172 1173 Static void 1174 ehci_noop(usbd_pipe_handle pipe) 1175 { 1176 } 1177 1178 #ifdef EHCI_DEBUG 1179 void 1180 ehci_dump_regs(ehci_softc_t *sc) 1181 { 1182 int i; 1183 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1184 EOREAD4(sc, EHCI_USBCMD), 1185 EOREAD4(sc, EHCI_USBSTS), 1186 EOREAD4(sc, EHCI_USBINTR)); 1187 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1188 EOREAD4(sc, EHCI_FRINDEX), 1189 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1190 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1191 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1192 for (i = 1; i <= sc->sc_noport; i++) 1193 printf("port %d status=0x%08x\n", i, 1194 EOREAD4(sc, EHCI_PORTSC(i))); 1195 } 1196 1197 /* 1198 * Unused function - this is meant to be called from a kernel 1199 * debugger. 1200 */ 1201 void 1202 ehci_dump() 1203 { 1204 ehci_dump_regs(theehci); 1205 } 1206 1207 void 1208 ehci_dump_link(ehci_link_t link, int type) 1209 { 1210 link = le32toh(link); 1211 printf("0x%08x", link); 1212 if (link & EHCI_LINK_TERMINATE) 1213 printf("<T>"); 1214 else { 1215 printf("<"); 1216 if (type) { 1217 switch (EHCI_LINK_TYPE(link)) { 1218 case EHCI_LINK_ITD: printf("ITD"); break; 1219 case EHCI_LINK_QH: printf("QH"); break; 1220 case EHCI_LINK_SITD: printf("SITD"); break; 1221 case EHCI_LINK_FSTN: printf("FSTN"); break; 1222 } 1223 } 1224 printf(">"); 1225 } 1226 } 1227 1228 void 1229 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1230 { 1231 int i; 1232 u_int32_t stop; 1233 1234 stop = 0; 1235 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1236 ehci_dump_sqtd(sqtd); 1237 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1238 } 1239 if (sqtd) 1240 printf("dump aborted, too many TDs\n"); 1241 } 1242 1243 void 1244 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1245 { 1246 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1247 ehci_dump_qtd(&sqtd->qtd); 1248 } 1249 1250 void 1251 ehci_dump_qtd(ehci_qtd_t *qtd) 1252 { 1253 u_int32_t s; 1254 char sbuf[128]; 1255 1256 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1257 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1258 printf("\n"); 1259 s = le32toh(qtd->qtd_status); 1260 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1261 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1262 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1263 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1264 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1265 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1266 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1267 EHCI_QTD_GET_PID(s), sbuf); 1268 for (s = 0; s < 5; s++) 1269 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1270 } 1271 1272 void 1273 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1274 { 1275 ehci_qh_t *qh = &sqh->qh; 1276 u_int32_t endp, endphub; 1277 1278 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1279 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1280 endp = le32toh(qh->qh_endp); 1281 printf(" endp=0x%08x\n", endp); 1282 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1283 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1284 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1285 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1286 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1287 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1288 EHCI_QH_GET_NRL(endp)); 1289 endphub = le32toh(qh->qh_endphub); 1290 printf(" endphub=0x%08x\n", endphub); 1291 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1292 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1293 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1294 EHCI_QH_GET_MULT(endphub)); 1295 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1296 printf("Overlay qTD:\n"); 1297 ehci_dump_qtd(&qh->qh_qtd); 1298 } 1299 1300 #ifdef DIAGNOSTIC 1301 Static void 1302 ehci_dump_exfer(struct ehci_xfer *ex) 1303 { 1304 printf("ehci_dump_exfer: ex=%p\n", ex); 1305 } 1306 #endif 1307 #endif 1308 1309 usbd_status 1310 ehci_open(usbd_pipe_handle pipe) 1311 { 1312 usbd_device_handle dev = pipe->device; 1313 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1314 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1315 u_int8_t addr = dev->address; 1316 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1317 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1318 ehci_soft_qh_t *sqh; 1319 usbd_status err; 1320 int s; 1321 int ival, speed, naks; 1322 int hshubaddr, hshubport; 1323 1324 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1325 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1326 1327 if (dev->myhsport) { 1328 hshubaddr = dev->myhsport->parent->address; 1329 hshubport = dev->myhsport->portno; 1330 } else { 1331 hshubaddr = 0; 1332 hshubport = 0; 1333 } 1334 1335 if (sc->sc_dying) 1336 return (USBD_IOERROR); 1337 1338 epipe->nexttoggle = 0; 1339 1340 if (addr == sc->sc_addr) { 1341 switch (ed->bEndpointAddress) { 1342 case USB_CONTROL_ENDPOINT: 1343 pipe->methods = &ehci_root_ctrl_methods; 1344 break; 1345 case UE_DIR_IN | EHCI_INTR_ENDPT: 1346 pipe->methods = &ehci_root_intr_methods; 1347 break; 1348 default: 1349 return (USBD_INVAL); 1350 } 1351 return (USBD_NORMAL_COMPLETION); 1352 } 1353 1354 /* XXX All this stuff is only valid for async. */ 1355 switch (dev->speed) { 1356 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1357 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1358 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1359 default: panic("ehci_open: bad device speed %d", dev->speed); 1360 } 1361 if (speed != EHCI_QH_SPEED_HIGH) { 1362 printf("%s: *** WARNING: opening low/full speed device, this " 1363 "does not work yet.\n", 1364 USBDEVNAME(sc->sc_bus.bdev)); 1365 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1366 hshubaddr, hshubport)); 1367 if (xfertype != UE_CONTROL) 1368 return USBD_INVAL; 1369 } 1370 1371 naks = 8; /* XXX */ 1372 sqh = ehci_alloc_sqh(sc); 1373 if (sqh == NULL) 1374 goto bad0; 1375 /* qh_link filled when the QH is added */ 1376 sqh->qh.qh_endp = htole32( 1377 EHCI_QH_SET_ADDR(addr) | 1378 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1379 EHCI_QH_SET_EPS(speed) | 1380 EHCI_QH_DTC | 1381 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1382 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1383 EHCI_QH_CTL : 0) | 1384 EHCI_QH_SET_NRL(naks) 1385 ); 1386 sqh->qh.qh_endphub = htole32( 1387 EHCI_QH_SET_MULT(1) | 1388 EHCI_QH_SET_HUBA(hshubaddr) | 1389 EHCI_QH_SET_PORT(hshubport) | 1390 EHCI_QH_SET_CMASK(0xf0) | /* XXX */ 1391 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0) 1392 ); 1393 sqh->qh.qh_curqtd = EHCI_NULL; 1394 /* Fill the overlay qTD */ 1395 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1396 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1397 sqh->qh.qh_qtd.qtd_status = htole32(0); 1398 1399 epipe->sqh = sqh; 1400 1401 switch (xfertype) { 1402 case UE_CONTROL: 1403 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1404 0, &epipe->u.ctl.reqdma); 1405 #ifdef EHCI_DEBUG 1406 if (err) 1407 printf("ehci_open: usb_allocmem()=%d\n", err); 1408 #endif 1409 if (err) 1410 goto bad1; 1411 pipe->methods = &ehci_device_ctrl_methods; 1412 s = splusb(); 1413 ehci_add_qh(sqh, sc->sc_async_head); 1414 splx(s); 1415 break; 1416 case UE_BULK: 1417 pipe->methods = &ehci_device_bulk_methods; 1418 s = splusb(); 1419 ehci_add_qh(sqh, sc->sc_async_head); 1420 splx(s); 1421 break; 1422 case UE_INTERRUPT: 1423 pipe->methods = &ehci_device_intr_methods; 1424 ival = pipe->interval; 1425 if (ival == USBD_DEFAULT_INTERVAL) 1426 ival = ed->bInterval; 1427 return (ehci_device_setintr(sc, sqh, ival)); 1428 case UE_ISOCHRONOUS: 1429 pipe->methods = &ehci_device_isoc_methods; 1430 return (USBD_INVAL); 1431 default: 1432 return (USBD_INVAL); 1433 } 1434 return (USBD_NORMAL_COMPLETION); 1435 1436 bad1: 1437 ehci_free_sqh(sc, sqh); 1438 bad0: 1439 return (USBD_NOMEM); 1440 } 1441 1442 /* 1443 * Add an ED to the schedule. Called at splusb(). 1444 */ 1445 void 1446 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1447 { 1448 SPLUSBCHECK; 1449 1450 sqh->next = head->next; 1451 sqh->qh.qh_link = head->qh.qh_link; 1452 head->next = sqh; 1453 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1454 1455 #ifdef EHCI_DEBUG 1456 if (ehcidebug > 5) { 1457 printf("ehci_add_qh:\n"); 1458 ehci_dump_sqh(sqh); 1459 } 1460 #endif 1461 } 1462 1463 /* 1464 * Remove an ED from the schedule. Called at splusb(). 1465 */ 1466 void 1467 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1468 { 1469 ehci_soft_qh_t *p; 1470 1471 SPLUSBCHECK; 1472 /* XXX */ 1473 for (p = head; p != NULL && p->next != sqh; p = p->next) 1474 ; 1475 if (p == NULL) 1476 panic("ehci_rem_qh: ED not found"); 1477 p->next = sqh->next; 1478 p->qh.qh_link = sqh->qh.qh_link; 1479 1480 ehci_sync_hc(sc); 1481 } 1482 1483 void 1484 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1485 { 1486 int i; 1487 u_int32_t status; 1488 1489 /* Save toggle bit and ping status. */ 1490 status = sqh->qh.qh_qtd.qtd_status & 1491 htole32(EHCI_QTD_TOGGLE_MASK | 1492 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1493 /* Set HALTED to make hw leave it alone. */ 1494 sqh->qh.qh_qtd.qtd_status = 1495 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1496 sqh->qh.qh_curqtd = 0; 1497 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1498 sqh->qh.qh_qtd.qtd_altnext = 0; 1499 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1500 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1501 sqh->sqtd = sqtd; 1502 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1503 sqh->qh.qh_qtd.qtd_status = status; 1504 } 1505 1506 /* 1507 * Ensure that the HC has released all references to the QH. We do this 1508 * by asking for a Async Advance Doorbell interrupt and then we wait for 1509 * the interrupt. 1510 * To make this easier we first obtain exclusive use of the doorbell. 1511 */ 1512 void 1513 ehci_sync_hc(ehci_softc_t *sc) 1514 { 1515 int s, error; 1516 1517 if (sc->sc_dying) { 1518 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1519 return; 1520 } 1521 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1522 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1523 s = splhardusb(); 1524 /* ask for doorbell */ 1525 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1526 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1527 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1528 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1529 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1530 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1531 splx(s); 1532 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1533 #ifdef DIAGNOSTIC 1534 if (error) 1535 printf("ehci_sync_hc: tsleep() = %d\n", error); 1536 #endif 1537 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1538 } 1539 1540 /***********/ 1541 1542 /* 1543 * Data structures and routines to emulate the root hub. 1544 */ 1545 Static usb_device_descriptor_t ehci_devd = { 1546 USB_DEVICE_DESCRIPTOR_SIZE, 1547 UDESC_DEVICE, /* type */ 1548 {0x00, 0x02}, /* USB version */ 1549 UDCLASS_HUB, /* class */ 1550 UDSUBCLASS_HUB, /* subclass */ 1551 UDPROTO_HSHUBSTT, /* protocol */ 1552 64, /* max packet */ 1553 {0},{0},{0x00,0x01}, /* device id */ 1554 1,2,0, /* string indicies */ 1555 1 /* # of configurations */ 1556 }; 1557 1558 Static usb_device_qualifier_t ehci_odevd = { 1559 USB_DEVICE_DESCRIPTOR_SIZE, 1560 UDESC_DEVICE_QUALIFIER, /* type */ 1561 {0x00, 0x02}, /* USB version */ 1562 UDCLASS_HUB, /* class */ 1563 UDSUBCLASS_HUB, /* subclass */ 1564 UDPROTO_FSHUB, /* protocol */ 1565 64, /* max packet */ 1566 1, /* # of configurations */ 1567 0 1568 }; 1569 1570 Static usb_config_descriptor_t ehci_confd = { 1571 USB_CONFIG_DESCRIPTOR_SIZE, 1572 UDESC_CONFIG, 1573 {USB_CONFIG_DESCRIPTOR_SIZE + 1574 USB_INTERFACE_DESCRIPTOR_SIZE + 1575 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1576 1, 1577 1, 1578 0, 1579 UC_SELF_POWERED, 1580 0 /* max power */ 1581 }; 1582 1583 Static usb_interface_descriptor_t ehci_ifcd = { 1584 USB_INTERFACE_DESCRIPTOR_SIZE, 1585 UDESC_INTERFACE, 1586 0, 1587 0, 1588 1, 1589 UICLASS_HUB, 1590 UISUBCLASS_HUB, 1591 UIPROTO_HSHUBSTT, 1592 0 1593 }; 1594 1595 Static usb_endpoint_descriptor_t ehci_endpd = { 1596 USB_ENDPOINT_DESCRIPTOR_SIZE, 1597 UDESC_ENDPOINT, 1598 UE_DIR_IN | EHCI_INTR_ENDPT, 1599 UE_INTERRUPT, 1600 {8, 0}, /* max packet */ 1601 255 1602 }; 1603 1604 Static usb_hub_descriptor_t ehci_hubd = { 1605 USB_HUB_DESCRIPTOR_SIZE, 1606 UDESC_HUB, 1607 0, 1608 {0,0}, 1609 0, 1610 0, 1611 {0}, 1612 }; 1613 1614 Static int 1615 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1616 { 1617 int i; 1618 1619 if (l == 0) 1620 return (0); 1621 p->bLength = 2 * strlen(s) + 2; 1622 if (l == 1) 1623 return (1); 1624 p->bDescriptorType = UDESC_STRING; 1625 l -= 2; 1626 for (i = 0; s[i] && l > 1; i++, l -= 2) 1627 USETW2(p->bString[i], 0, s[i]); 1628 return (2*i+2); 1629 } 1630 1631 /* 1632 * Simulate a hardware hub by handling all the necessary requests. 1633 */ 1634 Static usbd_status 1635 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1636 { 1637 usbd_status err; 1638 1639 /* Insert last in queue. */ 1640 err = usb_insert_transfer(xfer); 1641 if (err) 1642 return (err); 1643 1644 /* Pipe isn't running, start first */ 1645 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1646 } 1647 1648 Static usbd_status 1649 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1650 { 1651 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1652 usb_device_request_t *req; 1653 void *buf = NULL; 1654 int port, i; 1655 int s, len, value, index, l, totlen = 0; 1656 usb_port_status_t ps; 1657 usb_hub_descriptor_t hubd; 1658 usbd_status err; 1659 u_int32_t v; 1660 1661 if (sc->sc_dying) 1662 return (USBD_IOERROR); 1663 1664 #ifdef DIAGNOSTIC 1665 if (!(xfer->rqflags & URQ_REQUEST)) 1666 /* XXX panic */ 1667 return (USBD_INVAL); 1668 #endif 1669 req = &xfer->request; 1670 1671 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1672 req->bmRequestType, req->bRequest)); 1673 1674 len = UGETW(req->wLength); 1675 value = UGETW(req->wValue); 1676 index = UGETW(req->wIndex); 1677 1678 if (len != 0) 1679 buf = KERNADDR(&xfer->dmabuf, 0); 1680 1681 #define C(x,y) ((x) | ((y) << 8)) 1682 switch(C(req->bRequest, req->bmRequestType)) { 1683 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1684 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1685 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1686 /* 1687 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1688 * for the integrated root hub. 1689 */ 1690 break; 1691 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1692 if (len > 0) { 1693 *(u_int8_t *)buf = sc->sc_conf; 1694 totlen = 1; 1695 } 1696 break; 1697 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1698 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1699 switch(value >> 8) { 1700 case UDESC_DEVICE: 1701 if ((value & 0xff) != 0) { 1702 err = USBD_IOERROR; 1703 goto ret; 1704 } 1705 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1706 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1707 memcpy(buf, &ehci_devd, l); 1708 break; 1709 /* 1710 * We can't really operate at another speed, but the spec says 1711 * we need this descriptor. 1712 */ 1713 case UDESC_DEVICE_QUALIFIER: 1714 if ((value & 0xff) != 0) { 1715 err = USBD_IOERROR; 1716 goto ret; 1717 } 1718 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1719 memcpy(buf, &ehci_odevd, l); 1720 break; 1721 /* 1722 * We can't really operate at another speed, but the spec says 1723 * we need this descriptor. 1724 */ 1725 case UDESC_OTHER_SPEED_CONFIGURATION: 1726 case UDESC_CONFIG: 1727 if ((value & 0xff) != 0) { 1728 err = USBD_IOERROR; 1729 goto ret; 1730 } 1731 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1732 memcpy(buf, &ehci_confd, l); 1733 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1734 value >> 8; 1735 buf = (char *)buf + l; 1736 len -= l; 1737 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1738 totlen += l; 1739 memcpy(buf, &ehci_ifcd, l); 1740 buf = (char *)buf + l; 1741 len -= l; 1742 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1743 totlen += l; 1744 memcpy(buf, &ehci_endpd, l); 1745 break; 1746 case UDESC_STRING: 1747 if (len == 0) 1748 break; 1749 *(u_int8_t *)buf = 0; 1750 totlen = 1; 1751 switch (value & 0xff) { 1752 case 0: /* Language table */ 1753 totlen = ehci_str(buf, len, "\001"); 1754 break; 1755 case 1: /* Vendor */ 1756 totlen = ehci_str(buf, len, sc->sc_vendor); 1757 break; 1758 case 2: /* Product */ 1759 totlen = ehci_str(buf, len, "EHCI root hub"); 1760 break; 1761 } 1762 break; 1763 default: 1764 err = USBD_IOERROR; 1765 goto ret; 1766 } 1767 break; 1768 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1769 if (len > 0) { 1770 *(u_int8_t *)buf = 0; 1771 totlen = 1; 1772 } 1773 break; 1774 case C(UR_GET_STATUS, UT_READ_DEVICE): 1775 if (len > 1) { 1776 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1777 totlen = 2; 1778 } 1779 break; 1780 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1781 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1782 if (len > 1) { 1783 USETW(((usb_status_t *)buf)->wStatus, 0); 1784 totlen = 2; 1785 } 1786 break; 1787 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1788 if (value >= USB_MAX_DEVICES) { 1789 err = USBD_IOERROR; 1790 goto ret; 1791 } 1792 sc->sc_addr = value; 1793 break; 1794 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1795 if (value != 0 && value != 1) { 1796 err = USBD_IOERROR; 1797 goto ret; 1798 } 1799 sc->sc_conf = value; 1800 break; 1801 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1802 break; 1803 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1804 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1805 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1806 err = USBD_IOERROR; 1807 goto ret; 1808 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1809 break; 1810 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1811 break; 1812 /* Hub requests */ 1813 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1814 break; 1815 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1816 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1817 "port=%d feature=%d\n", 1818 index, value)); 1819 if (index < 1 || index > sc->sc_noport) { 1820 err = USBD_IOERROR; 1821 goto ret; 1822 } 1823 port = EHCI_PORTSC(index); 1824 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1825 switch(value) { 1826 case UHF_PORT_ENABLE: 1827 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1828 break; 1829 case UHF_PORT_SUSPEND: 1830 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1831 break; 1832 case UHF_PORT_POWER: 1833 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1834 break; 1835 case UHF_PORT_TEST: 1836 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1837 "%d\n", index)); 1838 break; 1839 case UHF_PORT_INDICATOR: 1840 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1841 "%d\n", index)); 1842 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1843 break; 1844 case UHF_C_PORT_CONNECTION: 1845 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1846 break; 1847 case UHF_C_PORT_ENABLE: 1848 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1849 break; 1850 case UHF_C_PORT_SUSPEND: 1851 /* how? */ 1852 break; 1853 case UHF_C_PORT_OVER_CURRENT: 1854 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1855 break; 1856 case UHF_C_PORT_RESET: 1857 sc->sc_isreset = 0; 1858 break; 1859 default: 1860 err = USBD_IOERROR; 1861 goto ret; 1862 } 1863 #if 0 1864 switch(value) { 1865 case UHF_C_PORT_CONNECTION: 1866 case UHF_C_PORT_ENABLE: 1867 case UHF_C_PORT_SUSPEND: 1868 case UHF_C_PORT_OVER_CURRENT: 1869 case UHF_C_PORT_RESET: 1870 /* Enable RHSC interrupt if condition is cleared. */ 1871 if ((OREAD4(sc, port) >> 16) == 0) 1872 ehci_pcd_able(sc, 1); 1873 break; 1874 default: 1875 break; 1876 } 1877 #endif 1878 break; 1879 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1880 if ((value & 0xff) != 0) { 1881 err = USBD_IOERROR; 1882 goto ret; 1883 } 1884 hubd = ehci_hubd; 1885 hubd.bNbrPorts = sc->sc_noport; 1886 v = EOREAD4(sc, EHCI_HCSPARAMS); 1887 USETW(hubd.wHubCharacteristics, 1888 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1889 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1890 ? UHD_PORT_IND : 0); 1891 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1892 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1893 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1894 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1895 l = min(len, hubd.bDescLength); 1896 totlen = l; 1897 memcpy(buf, &hubd, l); 1898 break; 1899 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1900 if (len != 4) { 1901 err = USBD_IOERROR; 1902 goto ret; 1903 } 1904 memset(buf, 0, len); /* ? XXX */ 1905 totlen = len; 1906 break; 1907 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1908 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1909 index)); 1910 if (index < 1 || index > sc->sc_noport) { 1911 err = USBD_IOERROR; 1912 goto ret; 1913 } 1914 if (len != 4) { 1915 err = USBD_IOERROR; 1916 goto ret; 1917 } 1918 v = EOREAD4(sc, EHCI_PORTSC(index)); 1919 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1920 v)); 1921 i = UPS_HIGH_SPEED; 1922 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1923 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1924 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1925 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1926 if (v & EHCI_PS_PR) i |= UPS_RESET; 1927 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1928 USETW(ps.wPortStatus, i); 1929 i = 0; 1930 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1931 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1932 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1933 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1934 USETW(ps.wPortChange, i); 1935 l = min(len, sizeof ps); 1936 memcpy(buf, &ps, l); 1937 totlen = l; 1938 break; 1939 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1940 err = USBD_IOERROR; 1941 goto ret; 1942 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1943 break; 1944 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1945 if (index < 1 || index > sc->sc_noport) { 1946 err = USBD_IOERROR; 1947 goto ret; 1948 } 1949 port = EHCI_PORTSC(index); 1950 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1951 switch(value) { 1952 case UHF_PORT_ENABLE: 1953 EOWRITE4(sc, port, v | EHCI_PS_PE); 1954 break; 1955 case UHF_PORT_SUSPEND: 1956 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1957 break; 1958 case UHF_PORT_RESET: 1959 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1960 index)); 1961 if (EHCI_PS_IS_LOWSPEED(v)) { 1962 /* Low speed device, give up ownership. */ 1963 ehci_disown(sc, index, 1); 1964 break; 1965 } 1966 /* Start reset sequence. */ 1967 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1968 EOWRITE4(sc, port, v | EHCI_PS_PR); 1969 /* Wait for reset to complete. */ 1970 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1971 if (sc->sc_dying) { 1972 err = USBD_IOERROR; 1973 goto ret; 1974 } 1975 /* Terminate reset sequence. */ 1976 EOWRITE4(sc, port, v); 1977 /* Wait for HC to complete reset. */ 1978 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1979 if (sc->sc_dying) { 1980 err = USBD_IOERROR; 1981 goto ret; 1982 } 1983 v = EOREAD4(sc, port); 1984 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1985 if (v & EHCI_PS_PR) { 1986 printf("%s: port reset timeout\n", 1987 USBDEVNAME(sc->sc_bus.bdev)); 1988 return (USBD_TIMEOUT); 1989 } 1990 if (!(v & EHCI_PS_PE)) { 1991 /* Not a high speed device, give up ownership.*/ 1992 ehci_disown(sc, index, 0); 1993 break; 1994 } 1995 sc->sc_isreset = 1; 1996 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1997 index, v)); 1998 break; 1999 case UHF_PORT_POWER: 2000 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2001 "%d\n", index)); 2002 EOWRITE4(sc, port, v | EHCI_PS_PP); 2003 break; 2004 case UHF_PORT_TEST: 2005 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2006 "%d\n", index)); 2007 break; 2008 case UHF_PORT_INDICATOR: 2009 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2010 "%d\n", index)); 2011 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2012 break; 2013 default: 2014 err = USBD_IOERROR; 2015 goto ret; 2016 } 2017 break; 2018 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2019 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2020 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2021 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2022 break; 2023 default: 2024 err = USBD_IOERROR; 2025 goto ret; 2026 } 2027 xfer->actlen = totlen; 2028 err = USBD_NORMAL_COMPLETION; 2029 ret: 2030 xfer->status = err; 2031 s = splusb(); 2032 usb_transfer_complete(xfer); 2033 splx(s); 2034 return (USBD_IN_PROGRESS); 2035 } 2036 2037 void 2038 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2039 { 2040 int port; 2041 u_int32_t v; 2042 2043 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2044 #ifdef DIAGNOSTIC 2045 if (sc->sc_npcomp != 0) { 2046 int i = (index-1) / sc->sc_npcomp; 2047 if (i >= sc->sc_ncomp) 2048 printf("%s: strange port\n", 2049 USBDEVNAME(sc->sc_bus.bdev)); 2050 else 2051 printf("%s: handing over %s speed device on " 2052 "port %d to %s\n", 2053 USBDEVNAME(sc->sc_bus.bdev), 2054 lowspeed ? "low" : "full", 2055 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2056 } else { 2057 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2058 } 2059 #endif 2060 port = EHCI_PORTSC(index); 2061 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2062 EOWRITE4(sc, port, v | EHCI_PS_PO); 2063 } 2064 2065 /* Abort a root control request. */ 2066 Static void 2067 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2068 { 2069 /* Nothing to do, all transfers are synchronous. */ 2070 } 2071 2072 /* Close the root pipe. */ 2073 Static void 2074 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2075 { 2076 DPRINTF(("ehci_root_ctrl_close\n")); 2077 /* Nothing to do. */ 2078 } 2079 2080 void 2081 ehci_root_intr_done(usbd_xfer_handle xfer) 2082 { 2083 xfer->hcpriv = NULL; 2084 } 2085 2086 Static usbd_status 2087 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2088 { 2089 usbd_status err; 2090 2091 /* Insert last in queue. */ 2092 err = usb_insert_transfer(xfer); 2093 if (err) 2094 return (err); 2095 2096 /* Pipe isn't running, start first */ 2097 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2098 } 2099 2100 Static usbd_status 2101 ehci_root_intr_start(usbd_xfer_handle xfer) 2102 { 2103 usbd_pipe_handle pipe = xfer->pipe; 2104 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2105 2106 if (sc->sc_dying) 2107 return (USBD_IOERROR); 2108 2109 sc->sc_intrxfer = xfer; 2110 2111 return (USBD_IN_PROGRESS); 2112 } 2113 2114 /* Abort a root interrupt request. */ 2115 Static void 2116 ehci_root_intr_abort(usbd_xfer_handle xfer) 2117 { 2118 int s; 2119 2120 if (xfer->pipe->intrxfer == xfer) { 2121 DPRINTF(("ehci_root_intr_abort: remove\n")); 2122 xfer->pipe->intrxfer = NULL; 2123 } 2124 xfer->status = USBD_CANCELLED; 2125 s = splusb(); 2126 usb_transfer_complete(xfer); 2127 splx(s); 2128 } 2129 2130 /* Close the root pipe. */ 2131 Static void 2132 ehci_root_intr_close(usbd_pipe_handle pipe) 2133 { 2134 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2135 2136 DPRINTF(("ehci_root_intr_close\n")); 2137 2138 sc->sc_intrxfer = NULL; 2139 } 2140 2141 void 2142 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2143 { 2144 xfer->hcpriv = NULL; 2145 } 2146 2147 /************************/ 2148 2149 ehci_soft_qh_t * 2150 ehci_alloc_sqh(ehci_softc_t *sc) 2151 { 2152 ehci_soft_qh_t *sqh; 2153 usbd_status err; 2154 int i, offs; 2155 usb_dma_t dma; 2156 2157 if (sc->sc_freeqhs == NULL) { 2158 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2159 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2160 EHCI_PAGE_SIZE, &dma); 2161 #ifdef EHCI_DEBUG 2162 if (err) 2163 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2164 #endif 2165 if (err) 2166 return (NULL); 2167 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2168 offs = i * EHCI_SQH_SIZE; 2169 sqh = KERNADDR(&dma, offs); 2170 sqh->physaddr = DMAADDR(&dma, offs); 2171 sqh->next = sc->sc_freeqhs; 2172 sc->sc_freeqhs = sqh; 2173 } 2174 } 2175 sqh = sc->sc_freeqhs; 2176 sc->sc_freeqhs = sqh->next; 2177 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2178 sqh->next = NULL; 2179 return (sqh); 2180 } 2181 2182 void 2183 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2184 { 2185 sqh->next = sc->sc_freeqhs; 2186 sc->sc_freeqhs = sqh; 2187 } 2188 2189 ehci_soft_qtd_t * 2190 ehci_alloc_sqtd(ehci_softc_t *sc) 2191 { 2192 ehci_soft_qtd_t *sqtd; 2193 usbd_status err; 2194 int i, offs; 2195 usb_dma_t dma; 2196 int s; 2197 2198 if (sc->sc_freeqtds == NULL) { 2199 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2200 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2201 EHCI_PAGE_SIZE, &dma); 2202 #ifdef EHCI_DEBUG 2203 if (err) 2204 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2205 #endif 2206 if (err) 2207 return (NULL); 2208 s = splusb(); 2209 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2210 offs = i * EHCI_SQTD_SIZE; 2211 sqtd = KERNADDR(&dma, offs); 2212 sqtd->physaddr = DMAADDR(&dma, offs); 2213 sqtd->nextqtd = sc->sc_freeqtds; 2214 sc->sc_freeqtds = sqtd; 2215 } 2216 splx(s); 2217 } 2218 2219 s = splusb(); 2220 sqtd = sc->sc_freeqtds; 2221 sc->sc_freeqtds = sqtd->nextqtd; 2222 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2223 sqtd->nextqtd = NULL; 2224 sqtd->xfer = NULL; 2225 splx(s); 2226 2227 return (sqtd); 2228 } 2229 2230 void 2231 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2232 { 2233 int s; 2234 2235 s = splusb(); 2236 sqtd->nextqtd = sc->sc_freeqtds; 2237 sc->sc_freeqtds = sqtd; 2238 splx(s); 2239 } 2240 2241 usbd_status 2242 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2243 int alen, int rd, usbd_xfer_handle xfer, 2244 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2245 { 2246 ehci_soft_qtd_t *next, *cur; 2247 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2248 u_int32_t qtdstatus; 2249 int len, curlen, mps; 2250 int i, tog; 2251 usb_dma_t *dma = &xfer->dmabuf; 2252 2253 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2254 2255 len = alen; 2256 dataphys = DMAADDR(dma, 0); 2257 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2258 #if 0 2259 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2260 epipe->nexttoggle); 2261 #endif 2262 qtdstatus = EHCI_QTD_ACTIVE | 2263 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2264 EHCI_QTD_SET_CERR(3) 2265 /* IOC set below */ 2266 /* BYTES set below */ 2267 ; 2268 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2269 tog = epipe->nexttoggle; 2270 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2271 2272 cur = ehci_alloc_sqtd(sc); 2273 *sp = cur; 2274 if (cur == NULL) 2275 goto nomem; 2276 for (;;) { 2277 dataphyspage = EHCI_PAGE(dataphys); 2278 /* The EHCI hardware can handle at most 5 pages. */ 2279 if (dataphyslastpage - dataphyspage < 2280 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2281 /* we can handle it in this QTD */ 2282 curlen = len; 2283 } else { 2284 /* must use multiple TDs, fill as much as possible. */ 2285 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2286 EHCI_PAGE_OFFSET(dataphys); 2287 #ifdef DIAGNOSTIC 2288 if (curlen > len) { 2289 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2290 "len=0x%x offs=0x%x\n", curlen, len, 2291 EHCI_PAGE_OFFSET(dataphys)); 2292 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2293 dataphyslastpage, dataphyspage, 2294 dataphys); 2295 curlen = len; 2296 } 2297 #endif 2298 /* the length must be a multiple of the max size */ 2299 curlen -= curlen % mps; 2300 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2301 "curlen=%d\n", curlen)); 2302 #ifdef DIAGNOSTIC 2303 if (curlen == 0) 2304 panic("ehci_alloc_std: curlen == 0"); 2305 #endif 2306 } 2307 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2308 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2309 dataphys, dataphyslastpage, 2310 len, curlen)); 2311 len -= curlen; 2312 2313 if (len != 0) { 2314 next = ehci_alloc_sqtd(sc); 2315 if (next == NULL) 2316 goto nomem; 2317 nextphys = htole32(next->physaddr); 2318 } else { 2319 next = NULL; 2320 nextphys = EHCI_NULL; 2321 } 2322 2323 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2324 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2325 if (i != 0) /* use offset only in first buffer */ 2326 a = EHCI_PAGE(a); 2327 cur->qtd.qtd_buffer[i] = htole32(a); 2328 cur->qtd.qtd_buffer_hi[i] = 0; 2329 #ifdef DIAGNOSTIC 2330 if (i >= EHCI_QTD_NBUFFERS) { 2331 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2332 goto nomem; 2333 } 2334 #endif 2335 } 2336 cur->nextqtd = next; 2337 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2338 cur->qtd.qtd_status = 2339 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2340 cur->xfer = xfer; 2341 cur->len = curlen; 2342 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2343 dataphys, dataphys + curlen)); 2344 /* adjust the toggle based on the number of packets in this 2345 qtd */ 2346 if (((curlen + mps - 1) / mps) & 1) { 2347 tog ^= 1; 2348 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2349 } 2350 if (len == 0) 2351 break; 2352 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2353 dataphys += curlen; 2354 cur = next; 2355 } 2356 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2357 *ep = cur; 2358 epipe->nexttoggle = tog; 2359 2360 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2361 *sp, *ep)); 2362 2363 return (USBD_NORMAL_COMPLETION); 2364 2365 nomem: 2366 /* XXX free chain */ 2367 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2368 return (USBD_NOMEM); 2369 } 2370 2371 Static void 2372 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2373 ehci_soft_qtd_t *sqtdend) 2374 { 2375 ehci_soft_qtd_t *p; 2376 int i; 2377 2378 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2379 sqtd, sqtdend)); 2380 2381 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2382 p = sqtd->nextqtd; 2383 ehci_free_sqtd(sc, sqtd); 2384 } 2385 } 2386 2387 /****************/ 2388 2389 /* 2390 * Close a reqular pipe. 2391 * Assumes that there are no pending transactions. 2392 */ 2393 void 2394 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2395 { 2396 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2397 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2398 ehci_soft_qh_t *sqh = epipe->sqh; 2399 int s; 2400 2401 s = splusb(); 2402 ehci_rem_qh(sc, sqh, head); 2403 splx(s); 2404 ehci_free_sqh(sc, epipe->sqh); 2405 } 2406 2407 /* 2408 * Abort a device request. 2409 * If this routine is called at splusb() it guarantees that the request 2410 * will be removed from the hardware scheduling and that the callback 2411 * for it will be called with USBD_CANCELLED status. 2412 * It's impossible to guarantee that the requested transfer will not 2413 * have happened since the hardware runs concurrently. 2414 * If the transaction has already happened we rely on the ordinary 2415 * interrupt processing to process it. 2416 * XXX This is most probably wrong. 2417 */ 2418 void 2419 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2420 { 2421 #define exfer EXFER(xfer) 2422 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2423 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2424 ehci_soft_qh_t *sqh = epipe->sqh; 2425 ehci_soft_qtd_t *sqtd; 2426 ehci_physaddr_t cur; 2427 u_int32_t qhstatus; 2428 int s; 2429 int hit; 2430 2431 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2432 2433 if (sc->sc_dying) { 2434 /* If we're dying, just do the software part. */ 2435 s = splusb(); 2436 xfer->status = status; /* make software ignore it */ 2437 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2438 usb_transfer_complete(xfer); 2439 splx(s); 2440 return; 2441 } 2442 2443 if (xfer->device->bus->intr_context || !curproc) 2444 panic("ehci_abort_xfer: not in process context"); 2445 2446 /* 2447 * Step 1: Make interrupt routine and hardware ignore xfer. 2448 */ 2449 s = splusb(); 2450 xfer->status = status; /* make software ignore it */ 2451 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2452 qhstatus = sqh->qh.qh_qtd.qtd_status; 2453 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2454 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2455 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2456 if (sqtd == exfer->sqtdend) 2457 break; 2458 } 2459 splx(s); 2460 2461 /* 2462 * Step 2: Wait until we know hardware has finished any possible 2463 * use of the xfer. Also make sure the soft interrupt routine 2464 * has run. 2465 */ 2466 ehci_sync_hc(sc); 2467 s = splusb(); 2468 #ifdef USB_USE_SOFTINTR 2469 sc->sc_softwake = 1; 2470 #endif /* USB_USE_SOFTINTR */ 2471 usb_schedsoftintr(&sc->sc_bus); 2472 #ifdef USB_USE_SOFTINTR 2473 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2474 #endif /* USB_USE_SOFTINTR */ 2475 splx(s); 2476 2477 /* 2478 * Step 3: Remove any vestiges of the xfer from the hardware. 2479 * The complication here is that the hardware may have executed 2480 * beyond the xfer we're trying to abort. So as we're scanning 2481 * the TDs of this xfer we check if the hardware points to 2482 * any of them. 2483 */ 2484 s = splusb(); /* XXX why? */ 2485 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2486 hit = 0; 2487 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2488 hit |= cur == sqtd->physaddr; 2489 if (sqtd == exfer->sqtdend) 2490 break; 2491 } 2492 sqtd = sqtd->nextqtd; 2493 /* Zap curqtd register if hardware pointed inside the xfer. */ 2494 if (hit && sqtd != NULL) { 2495 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2496 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2497 sqh->qh.qh_qtd.qtd_status = qhstatus; 2498 } else { 2499 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2500 } 2501 2502 /* 2503 * Step 4: Execute callback. 2504 */ 2505 #ifdef DIAGNOSTIC 2506 exfer->isdone = 1; 2507 #endif 2508 usb_transfer_complete(xfer); 2509 2510 splx(s); 2511 #undef exfer 2512 } 2513 2514 void 2515 ehci_timeout(void *addr) 2516 { 2517 struct ehci_xfer *exfer = addr; 2518 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2519 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2520 2521 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2522 #ifdef USB_DEBUG 2523 if (ehcidebug > 1) 2524 usbd_dump_pipe(exfer->xfer.pipe); 2525 #endif 2526 2527 if (sc->sc_dying) { 2528 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2529 return; 2530 } 2531 2532 /* Execute the abort in a process context. */ 2533 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2534 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2535 } 2536 2537 void 2538 ehci_timeout_task(void *addr) 2539 { 2540 usbd_xfer_handle xfer = addr; 2541 int s; 2542 2543 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2544 2545 s = splusb(); 2546 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2547 splx(s); 2548 } 2549 2550 /************************/ 2551 2552 Static usbd_status 2553 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2554 { 2555 usbd_status err; 2556 2557 /* Insert last in queue. */ 2558 err = usb_insert_transfer(xfer); 2559 if (err) 2560 return (err); 2561 2562 /* Pipe isn't running, start first */ 2563 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2564 } 2565 2566 Static usbd_status 2567 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2568 { 2569 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2570 usbd_status err; 2571 2572 if (sc->sc_dying) 2573 return (USBD_IOERROR); 2574 2575 #ifdef DIAGNOSTIC 2576 if (!(xfer->rqflags & URQ_REQUEST)) { 2577 /* XXX panic */ 2578 printf("ehci_device_ctrl_transfer: not a request\n"); 2579 return (USBD_INVAL); 2580 } 2581 #endif 2582 2583 err = ehci_device_request(xfer); 2584 if (err) 2585 return (err); 2586 2587 if (sc->sc_bus.use_polling) 2588 ehci_waitintr(sc, xfer); 2589 return (USBD_IN_PROGRESS); 2590 } 2591 2592 void 2593 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2594 { 2595 struct ehci_xfer *ex = EXFER(xfer); 2596 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2597 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2598 2599 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2600 2601 #ifdef DIAGNOSTIC 2602 if (!(xfer->rqflags & URQ_REQUEST)) { 2603 panic("ehci_ctrl_done: not a request"); 2604 } 2605 #endif 2606 2607 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2608 ehci_del_intr_list(ex); /* remove from active list */ 2609 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2610 } 2611 2612 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2613 } 2614 2615 /* Abort a device control request. */ 2616 Static void 2617 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2618 { 2619 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2620 ehci_abort_xfer(xfer, USBD_CANCELLED); 2621 } 2622 2623 /* Close a device control pipe. */ 2624 Static void 2625 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2626 { 2627 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2628 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2629 2630 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2631 ehci_close_pipe(pipe, sc->sc_async_head); 2632 } 2633 2634 usbd_status 2635 ehci_device_request(usbd_xfer_handle xfer) 2636 { 2637 #define exfer EXFER(xfer) 2638 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2639 usb_device_request_t *req = &xfer->request; 2640 usbd_device_handle dev = epipe->pipe.device; 2641 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2642 int addr = dev->address; 2643 ehci_soft_qtd_t *setup, *stat, *next; 2644 ehci_soft_qh_t *sqh; 2645 int isread; 2646 int len; 2647 usbd_status err; 2648 int s; 2649 2650 isread = req->bmRequestType & UT_READ; 2651 len = UGETW(req->wLength); 2652 2653 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2654 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2655 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2656 UGETW(req->wIndex), len, addr, 2657 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2658 2659 setup = ehci_alloc_sqtd(sc); 2660 if (setup == NULL) { 2661 err = USBD_NOMEM; 2662 goto bad1; 2663 } 2664 stat = ehci_alloc_sqtd(sc); 2665 if (stat == NULL) { 2666 err = USBD_NOMEM; 2667 goto bad2; 2668 } 2669 2670 sqh = epipe->sqh; 2671 epipe->u.ctl.length = len; 2672 2673 /* Update device address and length since they may have changed 2674 during the setup of the control pipe in usbd_new_device(). */ 2675 /* XXX This only needs to be done once, but it's too early in open. */ 2676 /* XXXX Should not touch ED here! */ 2677 sqh->qh.qh_endp = 2678 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2679 htole32( 2680 EHCI_QH_SET_ADDR(addr) | 2681 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2682 ); 2683 2684 /* Set up data transaction */ 2685 if (len != 0) { 2686 ehci_soft_qtd_t *end; 2687 2688 /* Start toggle at 1. */ 2689 epipe->nexttoggle = 1; 2690 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2691 &next, &end); 2692 if (err) 2693 goto bad3; 2694 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2695 end->nextqtd = stat; 2696 end->qtd.qtd_next = 2697 end->qtd.qtd_altnext = htole32(stat->physaddr); 2698 } else { 2699 next = stat; 2700 } 2701 2702 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2703 2704 /* Clear toggle */ 2705 setup->qtd.qtd_status = htole32( 2706 EHCI_QTD_ACTIVE | 2707 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2708 EHCI_QTD_SET_CERR(3) | 2709 EHCI_QTD_SET_TOGGLE(0) | 2710 EHCI_QTD_SET_BYTES(sizeof *req) 2711 ); 2712 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2713 setup->qtd.qtd_buffer_hi[0] = 0; 2714 setup->nextqtd = next; 2715 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2716 setup->xfer = xfer; 2717 setup->len = sizeof *req; 2718 2719 stat->qtd.qtd_status = htole32( 2720 EHCI_QTD_ACTIVE | 2721 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2722 EHCI_QTD_SET_CERR(3) | 2723 EHCI_QTD_SET_TOGGLE(1) | 2724 EHCI_QTD_IOC 2725 ); 2726 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2727 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2728 stat->nextqtd = NULL; 2729 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2730 stat->xfer = xfer; 2731 stat->len = 0; 2732 2733 #ifdef EHCI_DEBUG 2734 if (ehcidebug > 5) { 2735 DPRINTF(("ehci_device_request:\n")); 2736 ehci_dump_sqh(sqh); 2737 ehci_dump_sqtds(setup); 2738 } 2739 #endif 2740 2741 exfer->sqtdstart = setup; 2742 exfer->sqtdend = stat; 2743 #ifdef DIAGNOSTIC 2744 if (!exfer->isdone) { 2745 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2746 } 2747 exfer->isdone = 0; 2748 #endif 2749 2750 /* Insert qTD in QH list. */ 2751 s = splusb(); 2752 ehci_set_qh_qtd(sqh, setup); 2753 if (xfer->timeout && !sc->sc_bus.use_polling) { 2754 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2755 ehci_timeout, xfer); 2756 } 2757 ehci_add_intr_list(sc, exfer); 2758 xfer->status = USBD_IN_PROGRESS; 2759 splx(s); 2760 2761 #ifdef EHCI_DEBUG 2762 if (ehcidebug > 10) { 2763 DPRINTF(("ehci_device_request: status=%x\n", 2764 EOREAD4(sc, EHCI_USBSTS))); 2765 delay(10000); 2766 ehci_dump_regs(sc); 2767 ehci_dump_sqh(sc->sc_async_head); 2768 ehci_dump_sqh(sqh); 2769 ehci_dump_sqtds(setup); 2770 } 2771 #endif 2772 2773 return (USBD_NORMAL_COMPLETION); 2774 2775 bad3: 2776 ehci_free_sqtd(sc, stat); 2777 bad2: 2778 ehci_free_sqtd(sc, setup); 2779 bad1: 2780 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2781 xfer->status = err; 2782 usb_transfer_complete(xfer); 2783 return (err); 2784 #undef exfer 2785 } 2786 2787 /************************/ 2788 2789 Static usbd_status 2790 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2791 { 2792 usbd_status err; 2793 2794 /* Insert last in queue. */ 2795 err = usb_insert_transfer(xfer); 2796 if (err) 2797 return (err); 2798 2799 /* Pipe isn't running, start first */ 2800 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2801 } 2802 2803 usbd_status 2804 ehci_device_bulk_start(usbd_xfer_handle xfer) 2805 { 2806 #define exfer EXFER(xfer) 2807 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2808 usbd_device_handle dev = epipe->pipe.device; 2809 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2810 ehci_soft_qtd_t *data, *dataend; 2811 ehci_soft_qh_t *sqh; 2812 usbd_status err; 2813 int len, isread, endpt; 2814 int s; 2815 2816 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2817 xfer, xfer->length, xfer->flags)); 2818 2819 if (sc->sc_dying) 2820 return (USBD_IOERROR); 2821 2822 #ifdef DIAGNOSTIC 2823 if (xfer->rqflags & URQ_REQUEST) 2824 panic("ehci_device_bulk_start: a request"); 2825 #endif 2826 2827 len = xfer->length; 2828 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2829 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2830 sqh = epipe->sqh; 2831 2832 epipe->u.bulk.length = len; 2833 2834 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2835 &dataend); 2836 if (err) { 2837 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2838 xfer->status = err; 2839 usb_transfer_complete(xfer); 2840 return (err); 2841 } 2842 2843 #ifdef EHCI_DEBUG 2844 if (ehcidebug > 5) { 2845 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2846 ehci_dump_sqh(sqh); 2847 ehci_dump_sqtds(data); 2848 } 2849 #endif 2850 2851 /* Set up interrupt info. */ 2852 exfer->sqtdstart = data; 2853 exfer->sqtdend = dataend; 2854 #ifdef DIAGNOSTIC 2855 if (!exfer->isdone) { 2856 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2857 } 2858 exfer->isdone = 0; 2859 #endif 2860 2861 s = splusb(); 2862 ehci_set_qh_qtd(sqh, data); 2863 if (xfer->timeout && !sc->sc_bus.use_polling) { 2864 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2865 ehci_timeout, xfer); 2866 } 2867 ehci_add_intr_list(sc, exfer); 2868 xfer->status = USBD_IN_PROGRESS; 2869 splx(s); 2870 2871 #ifdef EHCI_DEBUG 2872 if (ehcidebug > 10) { 2873 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2874 delay(10000); 2875 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2876 ehci_dump_regs(sc); 2877 #if 0 2878 printf("async_head:\n"); 2879 ehci_dump_sqh(sc->sc_async_head); 2880 #endif 2881 printf("sqh:\n"); 2882 ehci_dump_sqh(sqh); 2883 ehci_dump_sqtds(data); 2884 } 2885 #endif 2886 2887 if (sc->sc_bus.use_polling) 2888 ehci_waitintr(sc, xfer); 2889 2890 return (USBD_IN_PROGRESS); 2891 #undef exfer 2892 } 2893 2894 Static void 2895 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2896 { 2897 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2898 ehci_abort_xfer(xfer, USBD_CANCELLED); 2899 } 2900 2901 /* 2902 * Close a device bulk pipe. 2903 */ 2904 Static void 2905 ehci_device_bulk_close(usbd_pipe_handle pipe) 2906 { 2907 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2908 2909 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2910 ehci_close_pipe(pipe, sc->sc_async_head); 2911 } 2912 2913 void 2914 ehci_device_bulk_done(usbd_xfer_handle xfer) 2915 { 2916 struct ehci_xfer *ex = EXFER(xfer); 2917 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2918 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2919 2920 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2921 xfer, xfer->actlen)); 2922 2923 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2924 ehci_del_intr_list(ex); /* remove from active list */ 2925 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2926 } 2927 2928 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2929 } 2930 2931 /************************/ 2932 2933 Static usbd_status 2934 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2935 { 2936 struct ehci_soft_islot *isp; 2937 int islot, lev; 2938 2939 /* Find a poll rate that is large enough. */ 2940 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2941 if (EHCI_ILEV_IVAL(lev) <= ival) 2942 break; 2943 2944 /* Pick an interrupt slot at the right level. */ 2945 /* XXX could do better than picking at random */ 2946 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2947 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2948 2949 sqh->islot = islot; 2950 isp = &sc->sc_islots[islot]; 2951 ehci_add_qh(sqh, isp->sqh); 2952 2953 return (USBD_NORMAL_COMPLETION); 2954 } 2955 2956 Static usbd_status 2957 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2958 { 2959 usbd_status err; 2960 2961 /* Insert last in queue. */ 2962 err = usb_insert_transfer(xfer); 2963 if (err) 2964 return (err); 2965 2966 /* 2967 * Pipe isn't running (otherwise err would be USBD_INPROG), 2968 * so start it first. 2969 */ 2970 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2971 } 2972 2973 Static usbd_status 2974 ehci_device_intr_start(usbd_xfer_handle xfer) 2975 { 2976 #define exfer EXFER(xfer) 2977 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2978 usbd_device_handle dev = xfer->pipe->device; 2979 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2980 ehci_soft_qtd_t *data, *dataend; 2981 ehci_soft_qh_t *sqh; 2982 usbd_status err; 2983 int len, isread, endpt; 2984 int s; 2985 2986 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 2987 xfer, xfer->length, xfer->flags)); 2988 2989 if (sc->sc_dying) 2990 return (USBD_IOERROR); 2991 2992 #ifdef DIAGNOSTIC 2993 if (xfer->rqflags & URQ_REQUEST) 2994 panic("ehci_device_intr_start: a request"); 2995 #endif 2996 2997 len = xfer->length; 2998 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2999 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3000 sqh = epipe->sqh; 3001 3002 epipe->u.intr.length = len; 3003 3004 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3005 &dataend); 3006 if (err) { 3007 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3008 xfer->status = err; 3009 usb_transfer_complete(xfer); 3010 return (err); 3011 } 3012 3013 #ifdef EHCI_DEBUG 3014 if (ehcidebug > 5) { 3015 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3016 ehci_dump_sqh(sqh); 3017 ehci_dump_sqtds(data); 3018 } 3019 #endif 3020 3021 /* Set up interrupt info. */ 3022 exfer->sqtdstart = data; 3023 exfer->sqtdend = dataend; 3024 #ifdef DIAGNOSTIC 3025 if (!exfer->isdone) { 3026 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3027 } 3028 exfer->isdone = 0; 3029 #endif 3030 3031 s = splusb(); 3032 ehci_set_qh_qtd(sqh, data); 3033 if (xfer->timeout && !sc->sc_bus.use_polling) { 3034 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3035 ehci_timeout, xfer); 3036 } 3037 ehci_add_intr_list(sc, exfer); 3038 xfer->status = USBD_IN_PROGRESS; 3039 splx(s); 3040 3041 #ifdef EHCI_DEBUG 3042 if (ehcidebug > 10) { 3043 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3044 delay(10000); 3045 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3046 ehci_dump_regs(sc); 3047 printf("sqh:\n"); 3048 ehci_dump_sqh(sqh); 3049 ehci_dump_sqtds(data); 3050 } 3051 #endif 3052 3053 if (sc->sc_bus.use_polling) 3054 ehci_waitintr(sc, xfer); 3055 3056 return (USBD_IN_PROGRESS); 3057 #undef exfer 3058 } 3059 3060 Static void 3061 ehci_device_intr_abort(usbd_xfer_handle xfer) 3062 { 3063 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3064 if (xfer->pipe->intrxfer == xfer) { 3065 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3066 xfer->pipe->intrxfer = NULL; 3067 } 3068 ehci_abort_xfer(xfer, USBD_CANCELLED); 3069 } 3070 3071 Static void 3072 ehci_device_intr_close(usbd_pipe_handle pipe) 3073 { 3074 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3075 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3076 struct ehci_soft_islot *isp; 3077 3078 isp = &sc->sc_islots[epipe->sqh->islot]; 3079 ehci_close_pipe(pipe, isp->sqh); 3080 } 3081 3082 Static void 3083 ehci_device_intr_done(usbd_xfer_handle xfer) 3084 { 3085 #define exfer EXFER(xfer) 3086 struct ehci_xfer *ex = EXFER(xfer); 3087 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3088 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3089 ehci_soft_qtd_t *data, *dataend; 3090 ehci_soft_qh_t *sqh; 3091 usbd_status err; 3092 int len, isread, endpt, s; 3093 3094 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3095 xfer, xfer->actlen)); 3096 3097 if (xfer->pipe->repeat) { 3098 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3099 3100 len = epipe->u.intr.length; 3101 xfer->length = len; 3102 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3103 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3104 sqh = epipe->sqh; 3105 3106 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3107 &data, &dataend); 3108 if (err) { 3109 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3110 xfer->status = err; 3111 return; 3112 } 3113 3114 /* Set up interrupt info. */ 3115 exfer->sqtdstart = data; 3116 exfer->sqtdend = dataend; 3117 #ifdef DIAGNOSTIC 3118 if (!exfer->isdone) { 3119 printf("ehci_device_intr_done: not done, ex=%p\n", 3120 exfer); 3121 } 3122 exfer->isdone = 0; 3123 #endif 3124 3125 s = splusb(); 3126 ehci_set_qh_qtd(sqh, data); 3127 if (xfer->timeout && !sc->sc_bus.use_polling) { 3128 usb_callout(xfer->timeout_handle, 3129 mstohz(xfer->timeout), ehci_timeout, xfer); 3130 } 3131 splx(s); 3132 3133 xfer->status = USBD_IN_PROGRESS; 3134 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3135 ehci_del_intr_list(ex); /* remove from active list */ 3136 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3137 } 3138 #undef exfer 3139 } 3140 3141 /************************/ 3142 3143 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3144 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3145 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3146 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3147 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3148
Indexes created Mon Sep 22 10:09:38 GMT 2025