ehci.c revision 1.91.2.6
1 /* $NetBSD: ehci.c,v 1.91.2.6 2005/05/07 11:41:27 tron Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.91.2.6 2005/05/07 11:41:27 tron Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 316 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 317 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 318 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 319 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 320 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 321 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 322 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 323 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 324 }; 325 326 usbd_status 327 ehci_init(ehci_softc_t *sc) 328 { 329 u_int32_t version, sparams, cparams, hcr; 330 u_int i; 331 usbd_status err; 332 ehci_soft_qh_t *sqh; 333 u_int ncomp; 334 335 DPRINTF(("ehci_init: start\n")); 336 #ifdef EHCI_DEBUG 337 theehci = sc; 338 #endif 339 340 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 341 342 version = EREAD2(sc, EHCI_HCIVERSION); 343 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 344 version >> 8, version & 0xff); 345 346 sparams = EREAD4(sc, EHCI_HCSPARAMS); 347 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 348 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 349 ncomp = EHCI_HCS_N_CC(sparams); 350 if (ncomp != sc->sc_ncomp) { 351 aprint_error("%s: wrong number of companions (%d != %d)\n", 352 USBDEVNAME(sc->sc_bus.bdev), 353 ncomp, sc->sc_ncomp); 354 #if NOHCI == 0 || NUHCI == 0 355 aprint_error("%s: ohci or uhci probably not configured\n", 356 USBDEVNAME(sc->sc_bus.bdev)); 357 #endif 358 if (ncomp < sc->sc_ncomp) 359 sc->sc_ncomp = ncomp; 360 } 361 if (sc->sc_ncomp > 0) { 362 aprint_normal("%s: companion controller%s, %d port%s each:", 363 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 364 EHCI_HCS_N_PCC(sparams), 365 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 366 for (i = 0; i < sc->sc_ncomp; i++) 367 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 368 aprint_normal("\n"); 369 } 370 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 371 cparams = EREAD4(sc, EHCI_HCCPARAMS); 372 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 373 374 if (EHCI_HCC_64BIT(cparams)) { 375 /* MUST clear segment register if 64 bit capable. */ 376 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 377 } 378 379 sc->sc_bus.usbrev = USBREV_2_0; 380 381 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 382 USB_MEM_RESERVE); 383 384 /* Reset the controller */ 385 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 386 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 387 usb_delay_ms(&sc->sc_bus, 1); 388 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 389 for (i = 0; i < 100; i++) { 390 usb_delay_ms(&sc->sc_bus, 1); 391 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 392 if (!hcr) 393 break; 394 } 395 if (hcr) { 396 aprint_error("%s: reset timeout\n", 397 USBDEVNAME(sc->sc_bus.bdev)); 398 return (USBD_IOERROR); 399 } 400 401 /* XXX need proper intr scheduling */ 402 sc->sc_rand = 96; 403 404 /* frame list size at default, read back what we got and use that */ 405 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 406 case 0: sc->sc_flsize = 1024; break; 407 case 1: sc->sc_flsize = 512; break; 408 case 2: sc->sc_flsize = 256; break; 409 case 3: return (USBD_IOERROR); 410 } 411 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 412 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 413 if (err) 414 return (err); 415 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 416 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 417 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 418 419 /* Set up the bus struct. */ 420 sc->sc_bus.methods = &ehci_bus_methods; 421 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 422 423 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 424 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 425 426 sc->sc_eintrs = EHCI_NORMAL_INTRS; 427 428 /* 429 * Allocate the interrupt dummy QHs. These are arranged to give poll 430 * intervals that are powers of 2 times 1ms. 431 */ 432 for (i = 0; i < EHCI_INTRQHS; i++) { 433 sqh = ehci_alloc_sqh(sc); 434 if (sqh == NULL) { 435 err = USBD_NOMEM; 436 goto bad1; 437 } 438 sc->sc_islots[i].sqh = sqh; 439 } 440 for (i = 0; i < EHCI_INTRQHS; i++) { 441 sqh = sc->sc_islots[i].sqh; 442 if (i == 0) { 443 /* The last (1ms) QH terminates. */ 444 sqh->qh.qh_link = EHCI_NULL; 445 sqh->next = NULL; 446 } else { 447 /* Otherwise the next QH has half the poll interval */ 448 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 449 sqh->qh.qh_link = htole32(sqh->next->physaddr | 450 EHCI_LINK_QH); 451 } 452 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 453 sqh->qh.qh_curqtd = EHCI_NULL; 454 sqh->next = NULL; 455 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 456 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 457 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 458 sqh->sqtd = NULL; 459 } 460 /* Point the frame list at the last level (128ms). */ 461 for (i = 0; i < sc->sc_flsize; i++) { 462 int j; 463 464 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 465 revbits[i & (EHCI_MAX_POLLRATE-1)]; 466 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 467 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 468 i)].sqh->physaddr); 469 } 470 471 /* Allocate dummy QH that starts the async list. */ 472 sqh = ehci_alloc_sqh(sc); 473 if (sqh == NULL) { 474 err = USBD_NOMEM; 475 goto bad1; 476 } 477 /* Fill the QH */ 478 sqh->qh.qh_endp = 479 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 480 sqh->qh.qh_link = 481 htole32(sqh->physaddr | EHCI_LINK_QH); 482 sqh->qh.qh_curqtd = EHCI_NULL; 483 sqh->next = NULL; 484 /* Fill the overlay qTD */ 485 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 486 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 487 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 488 sqh->sqtd = NULL; 489 #ifdef EHCI_DEBUG 490 if (ehcidebug) { 491 ehci_dump_sqh(sqh); 492 } 493 #endif 494 495 /* Point to async list */ 496 sc->sc_async_head = sqh; 497 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 498 499 usb_callout_init(sc->sc_tmo_pcd); 500 501 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 502 503 /* Enable interrupts */ 504 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 505 506 /* Turn on controller */ 507 EOWRITE4(sc, EHCI_USBCMD, 508 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 509 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 510 EHCI_CMD_ASE | 511 EHCI_CMD_PSE | 512 EHCI_CMD_RS); 513 514 /* Take over port ownership */ 515 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 516 517 for (i = 0; i < 100; i++) { 518 usb_delay_ms(&sc->sc_bus, 1); 519 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 520 if (!hcr) 521 break; 522 } 523 if (hcr) { 524 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 525 return (USBD_IOERROR); 526 } 527 528 return (USBD_NORMAL_COMPLETION); 529 530 #if 0 531 bad2: 532 ehci_free_sqh(sc, sc->sc_async_head); 533 #endif 534 bad1: 535 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 536 return (err); 537 } 538 539 int 540 ehci_intr(void *v) 541 { 542 ehci_softc_t *sc = v; 543 544 if (sc == NULL || sc->sc_dying) 545 return (0); 546 547 /* If we get an interrupt while polling, then just ignore it. */ 548 if (sc->sc_bus.use_polling) { 549 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 550 551 if (intrs) 552 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 553 #ifdef DIAGNOSTIC 554 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 555 #endif 556 return (0); 557 } 558 559 return (ehci_intr1(sc)); 560 } 561 562 Static int 563 ehci_intr1(ehci_softc_t *sc) 564 { 565 u_int32_t intrs, eintrs; 566 567 DPRINTFN(20,("ehci_intr1: enter\n")); 568 569 /* In case the interrupt occurs before initialization has completed. */ 570 if (sc == NULL) { 571 #ifdef DIAGNOSTIC 572 printf("ehci_intr1: sc == NULL\n"); 573 #endif 574 return (0); 575 } 576 577 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 578 if (!intrs) 579 return (0); 580 581 eintrs = intrs & sc->sc_eintrs; 582 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 583 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 584 (u_int)eintrs)); 585 if (!eintrs) 586 return (0); 587 588 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 589 sc->sc_bus.intr_context++; 590 sc->sc_bus.no_intrs++; 591 if (eintrs & EHCI_STS_IAA) { 592 DPRINTF(("ehci_intr1: door bell\n")); 593 wakeup(&sc->sc_async_head); 594 eintrs &= ~EHCI_STS_IAA; 595 } 596 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 597 DPRINTFN(5,("ehci_intr1: %s %s\n", 598 eintrs & EHCI_STS_INT ? "INT" : "", 599 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 600 usb_schedsoftintr(&sc->sc_bus); 601 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 602 } 603 if (eintrs & EHCI_STS_HSE) { 604 printf("%s: unrecoverable error, controller halted\n", 605 USBDEVNAME(sc->sc_bus.bdev)); 606 /* XXX what else */ 607 } 608 if (eintrs & EHCI_STS_PCD) { 609 ehci_pcd(sc, sc->sc_intrxfer); 610 /* 611 * Disable PCD interrupt for now, because it will be 612 * on until the port has been reset. 613 */ 614 ehci_pcd_able(sc, 0); 615 /* Do not allow RHSC interrupts > 1 per second */ 616 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 617 eintrs &= ~EHCI_STS_PCD; 618 } 619 620 sc->sc_bus.intr_context--; 621 622 if (eintrs != 0) { 623 /* Block unprocessed interrupts. */ 624 sc->sc_eintrs &= ~eintrs; 625 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 626 printf("%s: blocking intrs 0x%x\n", 627 USBDEVNAME(sc->sc_bus.bdev), eintrs); 628 } 629 630 return (1); 631 } 632 633 void 634 ehci_pcd_able(ehci_softc_t *sc, int on) 635 { 636 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 637 if (on) 638 sc->sc_eintrs |= EHCI_STS_PCD; 639 else 640 sc->sc_eintrs &= ~EHCI_STS_PCD; 641 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 642 } 643 644 void 645 ehci_pcd_enable(void *v_sc) 646 { 647 ehci_softc_t *sc = v_sc; 648 649 ehci_pcd_able(sc, 1); 650 } 651 652 void 653 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 654 { 655 usbd_pipe_handle pipe; 656 u_char *p; 657 int i, m; 658 659 if (xfer == NULL) { 660 /* Just ignore the change. */ 661 return; 662 } 663 664 pipe = xfer->pipe; 665 666 p = KERNADDR(&xfer->dmabuf, 0); 667 m = min(sc->sc_noport, xfer->length * 8 - 1); 668 memset(p, 0, xfer->length); 669 for (i = 1; i <= m; i++) { 670 /* Pick out CHANGE bits from the status reg. */ 671 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 672 p[i/8] |= 1 << (i%8); 673 } 674 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 675 xfer->actlen = xfer->length; 676 xfer->status = USBD_NORMAL_COMPLETION; 677 678 usb_transfer_complete(xfer); 679 } 680 681 void 682 ehci_softintr(void *v) 683 { 684 ehci_softc_t *sc = v; 685 struct ehci_xfer *ex, *nextex; 686 687 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 688 sc->sc_bus.intr_context)); 689 690 sc->sc_bus.intr_context++; 691 692 /* 693 * The only explanation I can think of for why EHCI is as brain dead 694 * as UHCI interrupt-wise is that Intel was involved in both. 695 * An interrupt just tells us that something is done, we have no 696 * clue what, so we need to scan through all active transfers. :-( 697 */ 698 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 699 nextex = LIST_NEXT(ex, inext); 700 ehci_check_intr(sc, ex); 701 } 702 703 #ifdef USB_USE_SOFTINTR 704 if (sc->sc_softwake) { 705 sc->sc_softwake = 0; 706 wakeup(&sc->sc_softwake); 707 } 708 #endif /* USB_USE_SOFTINTR */ 709 710 sc->sc_bus.intr_context--; 711 } 712 713 /* Check for an interrupt. */ 714 void 715 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 716 { 717 ehci_soft_qtd_t *sqtd, *lsqtd; 718 u_int32_t status; 719 720 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 721 722 if (ex->sqtdstart == NULL) { 723 printf("ehci_check_intr: sqtdstart=NULL\n"); 724 return; 725 } 726 lsqtd = ex->sqtdend; 727 #ifdef DIAGNOSTIC 728 if (lsqtd == NULL) { 729 printf("ehci_check_intr: lsqtd==0\n"); 730 return; 731 } 732 #endif 733 /* 734 * If the last TD is still active we need to check whether there 735 * is a an error somewhere in the middle, or whether there was a 736 * short packet (SPD and not ACTIVE). 737 */ 738 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 739 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 740 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 741 status = le32toh(sqtd->qtd.qtd_status); 742 /* If there's an active QTD the xfer isn't done. */ 743 if (status & EHCI_QTD_ACTIVE) 744 break; 745 /* Any kind of error makes the xfer done. */ 746 if (status & EHCI_QTD_HALTED) 747 goto done; 748 /* We want short packets, and it is short: it's done */ 749 if (EHCI_QTD_GET_BYTES(status) != 0) 750 goto done; 751 } 752 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 753 ex, ex->sqtdstart)); 754 return; 755 } 756 done: 757 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 758 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 759 ehci_idone(ex); 760 } 761 762 void 763 ehci_idone(struct ehci_xfer *ex) 764 { 765 usbd_xfer_handle xfer = &ex->xfer; 766 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 767 ehci_soft_qtd_t *sqtd, *lsqtd; 768 u_int32_t status = 0, nstatus = 0; 769 int actlen; 770 uint pkts_left; 771 772 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 773 #ifdef DIAGNOSTIC 774 { 775 int s = splhigh(); 776 if (ex->isdone) { 777 splx(s); 778 #ifdef EHCI_DEBUG 779 printf("ehci_idone: ex is done!\n "); 780 ehci_dump_exfer(ex); 781 #else 782 printf("ehci_idone: ex=%p is done!\n", ex); 783 #endif 784 return; 785 } 786 ex->isdone = 1; 787 splx(s); 788 } 789 #endif 790 791 if (xfer->status == USBD_CANCELLED || 792 xfer->status == USBD_TIMEOUT) { 793 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 794 return; 795 } 796 797 #ifdef EHCI_DEBUG 798 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 799 if (ehcidebug > 10) 800 ehci_dump_sqtds(ex->sqtdstart); 801 #endif 802 803 /* The transfer is done, compute actual length and status. */ 804 lsqtd = ex->sqtdend; 805 actlen = 0; 806 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 807 nstatus = le32toh(sqtd->qtd.qtd_status); 808 if (nstatus & EHCI_QTD_ACTIVE) 809 break; 810 811 status = nstatus; 812 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 813 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 814 } 815 816 /* 817 * If there are left over TDs we need to update the toggle. 818 * The default pipe doesn't need it since control transfers 819 * start the toggle at 0 every time. 820 */ 821 if (sqtd != lsqtd->nextqtd && 822 xfer->pipe->device->default_pipe != xfer->pipe) { 823 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 824 #if 0 825 ehci_dump_sqh(epipe->sqh); 826 ehci_dump_sqtds(ex->sqtdstart); 827 #endif 828 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 829 } 830 831 /* 832 * For a short transfer we need to update the toggle for the missing 833 * packets within the qTD. 834 */ 835 pkts_left = EHCI_QTD_GET_BYTES(status) / 836 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 837 epipe->nexttoggle ^= pkts_left % 2; 838 839 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 840 xfer->length, actlen, status)); 841 xfer->actlen = actlen; 842 if (status & EHCI_QTD_HALTED) { 843 #ifdef EHCI_DEBUG 844 char sbuf[128]; 845 846 bitmask_snprintf((u_int32_t)status, 847 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 848 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 849 850 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 851 "status 0x%s\n", 852 xfer->pipe->device->address, 853 xfer->pipe->endpoint->edesc->bEndpointAddress, 854 sbuf)); 855 if (ehcidebug > 2) { 856 ehci_dump_sqh(epipe->sqh); 857 ehci_dump_sqtds(ex->sqtdstart); 858 } 859 #endif 860 /* low&full speed has an extra error flag */ 861 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 862 EHCI_QH_SPEED_HIGH) 863 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 864 else 865 status &= EHCI_QTD_STATERRS; 866 if (status == 0) /* no other errors means a stall */ 867 xfer->status = USBD_STALLED; 868 else 869 xfer->status = USBD_IOERROR; /* more info XXX */ 870 /* XXX need to reset TT on missed microframe */ 871 if (status & EHCI_QTD_MISSEDMICRO) { 872 ehci_softc_t *sc = (ehci_softc_t *) 873 xfer->pipe->device->bus; 874 875 printf("%s: missed microframe, TT reset not " 876 "implemented, hub might be inoperational\n", 877 USBDEVNAME(sc->sc_bus.bdev)); 878 } 879 } else { 880 xfer->status = USBD_NORMAL_COMPLETION; 881 } 882 883 usb_transfer_complete(xfer); 884 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 885 } 886 887 /* 888 * Wait here until controller claims to have an interrupt. 889 * Then call ehci_intr and return. Use timeout to avoid waiting 890 * too long. 891 */ 892 void 893 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 894 { 895 int timo = xfer->timeout; 896 int usecs; 897 u_int32_t intrs; 898 899 xfer->status = USBD_IN_PROGRESS; 900 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 901 usb_delay_ms(&sc->sc_bus, 1); 902 if (sc->sc_dying) 903 break; 904 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 905 sc->sc_eintrs; 906 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 907 #ifdef EHCI_DEBUG 908 if (ehcidebug > 15) 909 ehci_dump_regs(sc); 910 #endif 911 if (intrs) { 912 ehci_intr1(sc); 913 if (xfer->status != USBD_IN_PROGRESS) 914 return; 915 } 916 } 917 918 /* Timeout */ 919 DPRINTF(("ehci_waitintr: timeout\n")); 920 xfer->status = USBD_TIMEOUT; 921 usb_transfer_complete(xfer); 922 /* XXX should free TD */ 923 } 924 925 void 926 ehci_poll(struct usbd_bus *bus) 927 { 928 ehci_softc_t *sc = (ehci_softc_t *)bus; 929 #ifdef EHCI_DEBUG 930 static int last; 931 int new; 932 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 933 if (new != last) { 934 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 935 last = new; 936 } 937 #endif 938 939 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 940 ehci_intr1(sc); 941 } 942 943 int 944 ehci_detach(struct ehci_softc *sc, int flags) 945 { 946 int rv = 0; 947 948 if (sc->sc_child != NULL) 949 rv = config_detach(sc->sc_child, flags); 950 951 if (rv != 0) 952 return (rv); 953 954 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 955 956 if (sc->sc_powerhook != NULL) 957 powerhook_disestablish(sc->sc_powerhook); 958 if (sc->sc_shutdownhook != NULL) 959 shutdownhook_disestablish(sc->sc_shutdownhook); 960 961 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 962 963 /* XXX free other data structures XXX */ 964 965 return (rv); 966 } 967 968 969 int 970 ehci_activate(device_ptr_t self, enum devact act) 971 { 972 struct ehci_softc *sc = (struct ehci_softc *)self; 973 int rv = 0; 974 975 switch (act) { 976 case DVACT_ACTIVATE: 977 return (EOPNOTSUPP); 978 979 case DVACT_DEACTIVATE: 980 if (sc->sc_child != NULL) 981 rv = config_deactivate(sc->sc_child); 982 sc->sc_dying = 1; 983 break; 984 } 985 return (rv); 986 } 987 988 /* 989 * Handle suspend/resume. 990 * 991 * We need to switch to polling mode here, because this routine is 992 * called from an interrupt context. This is all right since we 993 * are almost suspended anyway. 994 */ 995 void 996 ehci_power(int why, void *v) 997 { 998 ehci_softc_t *sc = v; 999 u_int32_t cmd, hcr; 1000 int s, i; 1001 1002 #ifdef EHCI_DEBUG 1003 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 1004 if (ehcidebug > 0) 1005 ehci_dump_regs(sc); 1006 #endif 1007 1008 s = splhardusb(); 1009 switch (why) { 1010 case PWR_SUSPEND: 1011 case PWR_STANDBY: 1012 sc->sc_bus.use_polling++; 1013 1014 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1015 1016 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1017 EOWRITE4(sc, EHCI_USBCMD, cmd); 1018 1019 for (i = 0; i < 100; i++) { 1020 hcr = EOREAD4(sc, EHCI_USBSTS) & 1021 (EHCI_STS_ASS | EHCI_STS_PSS); 1022 if (hcr == 0) 1023 break; 1024 1025 usb_delay_ms(&sc->sc_bus, 1); 1026 } 1027 if (hcr != 0) { 1028 printf("%s: reset timeout\n", 1029 USBDEVNAME(sc->sc_bus.bdev)); 1030 } 1031 1032 cmd &= ~EHCI_CMD_RS; 1033 EOWRITE4(sc, EHCI_USBCMD, cmd); 1034 1035 for (i = 0; i < 100; i++) { 1036 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1037 if (hcr == EHCI_STS_HCH) 1038 break; 1039 1040 usb_delay_ms(&sc->sc_bus, 1); 1041 } 1042 if (hcr != EHCI_STS_HCH) { 1043 printf("%s: config timeout\n", 1044 USBDEVNAME(sc->sc_bus.bdev)); 1045 } 1046 1047 sc->sc_bus.use_polling--; 1048 break; 1049 1050 case PWR_RESUME: 1051 sc->sc_bus.use_polling++; 1052 1053 /* restore things in case the bios sucks */ 1054 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1055 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1056 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1057 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1058 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1059 1060 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1061 1062 for (i = 0; i < 100; i++) { 1063 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1064 if (hcr != EHCI_STS_HCH) 1065 break; 1066 1067 usb_delay_ms(&sc->sc_bus, 1); 1068 } 1069 if (hcr == EHCI_STS_HCH) { 1070 printf("%s: config timeout\n", 1071 USBDEVNAME(sc->sc_bus.bdev)); 1072 } 1073 1074 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1075 1076 sc->sc_bus.use_polling--; 1077 break; 1078 case PWR_SOFTSUSPEND: 1079 case PWR_SOFTSTANDBY: 1080 case PWR_SOFTRESUME: 1081 break; 1082 } 1083 splx(s); 1084 1085 #ifdef EHCI_DEBUG 1086 DPRINTF(("ehci_power: sc=%p\n", sc)); 1087 if (ehcidebug > 0) 1088 ehci_dump_regs(sc); 1089 #endif 1090 } 1091 1092 /* 1093 * Shut down the controller when the system is going down. 1094 */ 1095 void 1096 ehci_shutdown(void *v) 1097 { 1098 ehci_softc_t *sc = v; 1099 1100 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1101 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1102 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1103 } 1104 1105 usbd_status 1106 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1107 { 1108 struct ehci_softc *sc = (struct ehci_softc *)bus; 1109 usbd_status err; 1110 1111 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1112 if (err == USBD_NOMEM) 1113 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1114 #ifdef EHCI_DEBUG 1115 if (err) 1116 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1117 #endif 1118 return (err); 1119 } 1120 1121 void 1122 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1123 { 1124 struct ehci_softc *sc = (struct ehci_softc *)bus; 1125 1126 if (dma->block->flags & USB_DMA_RESERVE) { 1127 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1128 dma); 1129 return; 1130 } 1131 usb_freemem(&sc->sc_bus, dma); 1132 } 1133 1134 usbd_xfer_handle 1135 ehci_allocx(struct usbd_bus *bus) 1136 { 1137 struct ehci_softc *sc = (struct ehci_softc *)bus; 1138 usbd_xfer_handle xfer; 1139 1140 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1141 if (xfer != NULL) { 1142 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1143 #ifdef DIAGNOSTIC 1144 if (xfer->busy_free != XFER_FREE) { 1145 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1146 xfer->busy_free); 1147 } 1148 #endif 1149 } else { 1150 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1151 } 1152 if (xfer != NULL) { 1153 memset(xfer, 0, sizeof(struct ehci_xfer)); 1154 #ifdef DIAGNOSTIC 1155 EXFER(xfer)->isdone = 1; 1156 xfer->busy_free = XFER_BUSY; 1157 #endif 1158 } 1159 return (xfer); 1160 } 1161 1162 void 1163 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1164 { 1165 struct ehci_softc *sc = (struct ehci_softc *)bus; 1166 1167 #ifdef DIAGNOSTIC 1168 if (xfer->busy_free != XFER_BUSY) { 1169 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1170 xfer->busy_free); 1171 return; 1172 } 1173 xfer->busy_free = XFER_FREE; 1174 if (!EXFER(xfer)->isdone) { 1175 printf("ehci_freex: !isdone\n"); 1176 return; 1177 } 1178 #endif 1179 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1180 } 1181 1182 Static void 1183 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1184 { 1185 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1186 1187 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1188 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1189 #ifdef USB_DEBUG 1190 if (ehcidebug) 1191 usbd_dump_pipe(pipe); 1192 #endif 1193 epipe->nexttoggle = 0; 1194 } 1195 1196 Static void 1197 ehci_noop(usbd_pipe_handle pipe) 1198 { 1199 } 1200 1201 #ifdef EHCI_DEBUG 1202 void 1203 ehci_dump_regs(ehci_softc_t *sc) 1204 { 1205 int i; 1206 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1207 EOREAD4(sc, EHCI_USBCMD), 1208 EOREAD4(sc, EHCI_USBSTS), 1209 EOREAD4(sc, EHCI_USBINTR)); 1210 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1211 EOREAD4(sc, EHCI_FRINDEX), 1212 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1213 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1214 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1215 for (i = 1; i <= sc->sc_noport; i++) 1216 printf("port %d status=0x%08x\n", i, 1217 EOREAD4(sc, EHCI_PORTSC(i))); 1218 } 1219 1220 /* 1221 * Unused function - this is meant to be called from a kernel 1222 * debugger. 1223 */ 1224 void 1225 ehci_dump() 1226 { 1227 ehci_dump_regs(theehci); 1228 } 1229 1230 void 1231 ehci_dump_link(ehci_link_t link, int type) 1232 { 1233 link = le32toh(link); 1234 printf("0x%08x", link); 1235 if (link & EHCI_LINK_TERMINATE) 1236 printf("<T>"); 1237 else { 1238 printf("<"); 1239 if (type) { 1240 switch (EHCI_LINK_TYPE(link)) { 1241 case EHCI_LINK_ITD: printf("ITD"); break; 1242 case EHCI_LINK_QH: printf("QH"); break; 1243 case EHCI_LINK_SITD: printf("SITD"); break; 1244 case EHCI_LINK_FSTN: printf("FSTN"); break; 1245 } 1246 } 1247 printf(">"); 1248 } 1249 } 1250 1251 void 1252 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1253 { 1254 int i; 1255 u_int32_t stop; 1256 1257 stop = 0; 1258 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1259 ehci_dump_sqtd(sqtd); 1260 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1261 } 1262 if (sqtd) 1263 printf("dump aborted, too many TDs\n"); 1264 } 1265 1266 void 1267 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1268 { 1269 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1270 ehci_dump_qtd(&sqtd->qtd); 1271 } 1272 1273 void 1274 ehci_dump_qtd(ehci_qtd_t *qtd) 1275 { 1276 u_int32_t s; 1277 char sbuf[128]; 1278 1279 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1280 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1281 printf("\n"); 1282 s = le32toh(qtd->qtd_status); 1283 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1284 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1285 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1286 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1287 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1288 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1289 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1290 EHCI_QTD_GET_PID(s), sbuf); 1291 for (s = 0; s < 5; s++) 1292 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1293 } 1294 1295 void 1296 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1297 { 1298 ehci_qh_t *qh = &sqh->qh; 1299 u_int32_t endp, endphub; 1300 1301 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1302 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1303 endp = le32toh(qh->qh_endp); 1304 printf(" endp=0x%08x\n", endp); 1305 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1306 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1307 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1308 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1309 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1310 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1311 EHCI_QH_GET_NRL(endp)); 1312 endphub = le32toh(qh->qh_endphub); 1313 printf(" endphub=0x%08x\n", endphub); 1314 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1315 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1316 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1317 EHCI_QH_GET_MULT(endphub)); 1318 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1319 printf("Overlay qTD:\n"); 1320 ehci_dump_qtd(&qh->qh_qtd); 1321 } 1322 1323 #ifdef DIAGNOSTIC 1324 Static void 1325 ehci_dump_exfer(struct ehci_xfer *ex) 1326 { 1327 printf("ehci_dump_exfer: ex=%p\n", ex); 1328 } 1329 #endif 1330 #endif 1331 1332 usbd_status 1333 ehci_open(usbd_pipe_handle pipe) 1334 { 1335 usbd_device_handle dev = pipe->device; 1336 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1337 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1338 u_int8_t addr = dev->address; 1339 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1340 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1341 ehci_soft_qh_t *sqh; 1342 usbd_status err; 1343 int s; 1344 int ival, speed, naks; 1345 int hshubaddr, hshubport; 1346 1347 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1348 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1349 1350 if (dev->myhsport) { 1351 hshubaddr = dev->myhsport->parent->address; 1352 hshubport = dev->myhsport->portno; 1353 } else { 1354 hshubaddr = 0; 1355 hshubport = 0; 1356 } 1357 1358 if (sc->sc_dying) 1359 return (USBD_IOERROR); 1360 1361 epipe->nexttoggle = 0; 1362 1363 if (addr == sc->sc_addr) { 1364 switch (ed->bEndpointAddress) { 1365 case USB_CONTROL_ENDPOINT: 1366 pipe->methods = &ehci_root_ctrl_methods; 1367 break; 1368 case UE_DIR_IN | EHCI_INTR_ENDPT: 1369 pipe->methods = &ehci_root_intr_methods; 1370 break; 1371 default: 1372 return (USBD_INVAL); 1373 } 1374 return (USBD_NORMAL_COMPLETION); 1375 } 1376 1377 /* XXX All this stuff is only valid for async. */ 1378 switch (dev->speed) { 1379 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1380 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1381 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1382 default: panic("ehci_open: bad device speed %d", dev->speed); 1383 } 1384 if (speed != EHCI_QH_SPEED_HIGH) { 1385 printf("%s: *** WARNING: opening low/full speed device, this " 1386 "may not work yet.\n", 1387 USBDEVNAME(sc->sc_bus.bdev)); 1388 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1389 hshubaddr, hshubport)); 1390 #if 0 1391 if (xfertype != UE_CONTROL) 1392 return USBD_INVAL; 1393 #endif 1394 } 1395 1396 naks = 8; /* XXX */ 1397 sqh = ehci_alloc_sqh(sc); 1398 if (sqh == NULL) 1399 goto bad0; 1400 /* qh_link filled when the QH is added */ 1401 sqh->qh.qh_endp = htole32( 1402 EHCI_QH_SET_ADDR(addr) | 1403 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1404 EHCI_QH_SET_EPS(speed) | 1405 EHCI_QH_DTC | 1406 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1407 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1408 EHCI_QH_CTL : 0) | 1409 EHCI_QH_SET_NRL(naks) 1410 ); 1411 sqh->qh.qh_endphub = htole32( 1412 EHCI_QH_SET_MULT(1) | 1413 EHCI_QH_SET_HUBA(hshubaddr) | 1414 EHCI_QH_SET_PORT(hshubport) | 1415 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1416 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1417 ); 1418 sqh->qh.qh_curqtd = EHCI_NULL; 1419 /* Fill the overlay qTD */ 1420 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1421 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1422 sqh->qh.qh_qtd.qtd_status = htole32(0); 1423 1424 epipe->sqh = sqh; 1425 1426 switch (xfertype) { 1427 case UE_CONTROL: 1428 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1429 0, &epipe->u.ctl.reqdma); 1430 #ifdef EHCI_DEBUG 1431 if (err) 1432 printf("ehci_open: usb_allocmem()=%d\n", err); 1433 #endif 1434 if (err) 1435 goto bad1; 1436 pipe->methods = &ehci_device_ctrl_methods; 1437 s = splusb(); 1438 ehci_add_qh(sqh, sc->sc_async_head); 1439 splx(s); 1440 break; 1441 case UE_BULK: 1442 pipe->methods = &ehci_device_bulk_methods; 1443 s = splusb(); 1444 ehci_add_qh(sqh, sc->sc_async_head); 1445 splx(s); 1446 break; 1447 case UE_INTERRUPT: 1448 pipe->methods = &ehci_device_intr_methods; 1449 ival = pipe->interval; 1450 if (ival == USBD_DEFAULT_INTERVAL) 1451 ival = ed->bInterval; 1452 return (ehci_device_setintr(sc, sqh, ival)); 1453 case UE_ISOCHRONOUS: 1454 pipe->methods = &ehci_device_isoc_methods; 1455 return (USBD_INVAL); 1456 default: 1457 return (USBD_INVAL); 1458 } 1459 return (USBD_NORMAL_COMPLETION); 1460 1461 bad1: 1462 ehci_free_sqh(sc, sqh); 1463 bad0: 1464 return (USBD_NOMEM); 1465 } 1466 1467 /* 1468 * Add an ED to the schedule. Called at splusb(). 1469 */ 1470 void 1471 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1472 { 1473 SPLUSBCHECK; 1474 1475 sqh->next = head->next; 1476 sqh->qh.qh_link = head->qh.qh_link; 1477 head->next = sqh; 1478 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1479 1480 #ifdef EHCI_DEBUG 1481 if (ehcidebug > 5) { 1482 printf("ehci_add_qh:\n"); 1483 ehci_dump_sqh(sqh); 1484 } 1485 #endif 1486 } 1487 1488 /* 1489 * Remove an ED from the schedule. Called at splusb(). 1490 */ 1491 void 1492 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1493 { 1494 ehci_soft_qh_t *p; 1495 1496 SPLUSBCHECK; 1497 /* XXX */ 1498 for (p = head; p != NULL && p->next != sqh; p = p->next) 1499 ; 1500 if (p == NULL) 1501 panic("ehci_rem_qh: ED not found"); 1502 p->next = sqh->next; 1503 p->qh.qh_link = sqh->qh.qh_link; 1504 1505 ehci_sync_hc(sc); 1506 } 1507 1508 void 1509 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1510 { 1511 int i; 1512 u_int32_t status; 1513 1514 /* Save toggle bit and ping status. */ 1515 status = sqh->qh.qh_qtd.qtd_status & 1516 htole32(EHCI_QTD_TOGGLE_MASK | 1517 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1518 /* Set HALTED to make hw leave it alone. */ 1519 sqh->qh.qh_qtd.qtd_status = 1520 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1521 sqh->qh.qh_curqtd = 0; 1522 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1523 sqh->qh.qh_qtd.qtd_altnext = 0; 1524 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1525 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1526 sqh->sqtd = sqtd; 1527 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1528 sqh->qh.qh_qtd.qtd_status = status; 1529 } 1530 1531 /* 1532 * Ensure that the HC has released all references to the QH. We do this 1533 * by asking for a Async Advance Doorbell interrupt and then we wait for 1534 * the interrupt. 1535 * To make this easier we first obtain exclusive use of the doorbell. 1536 */ 1537 void 1538 ehci_sync_hc(ehci_softc_t *sc) 1539 { 1540 int s, error; 1541 1542 if (sc->sc_dying) { 1543 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1544 return; 1545 } 1546 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1547 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1548 s = splhardusb(); 1549 /* ask for doorbell */ 1550 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1551 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1552 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1553 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1554 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1555 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1556 splx(s); 1557 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1558 #ifdef DIAGNOSTIC 1559 if (error) 1560 printf("ehci_sync_hc: tsleep() = %d\n", error); 1561 #endif 1562 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1563 } 1564 1565 /***********/ 1566 1567 /* 1568 * Data structures and routines to emulate the root hub. 1569 */ 1570 Static usb_device_descriptor_t ehci_devd = { 1571 USB_DEVICE_DESCRIPTOR_SIZE, 1572 UDESC_DEVICE, /* type */ 1573 {0x00, 0x02}, /* USB version */ 1574 UDCLASS_HUB, /* class */ 1575 UDSUBCLASS_HUB, /* subclass */ 1576 UDPROTO_HSHUBSTT, /* protocol */ 1577 64, /* max packet */ 1578 {0},{0},{0x00,0x01}, /* device id */ 1579 1,2,0, /* string indicies */ 1580 1 /* # of configurations */ 1581 }; 1582 1583 Static usb_device_qualifier_t ehci_odevd = { 1584 USB_DEVICE_DESCRIPTOR_SIZE, 1585 UDESC_DEVICE_QUALIFIER, /* type */ 1586 {0x00, 0x02}, /* USB version */ 1587 UDCLASS_HUB, /* class */ 1588 UDSUBCLASS_HUB, /* subclass */ 1589 UDPROTO_FSHUB, /* protocol */ 1590 64, /* max packet */ 1591 1, /* # of configurations */ 1592 0 1593 }; 1594 1595 Static usb_config_descriptor_t ehci_confd = { 1596 USB_CONFIG_DESCRIPTOR_SIZE, 1597 UDESC_CONFIG, 1598 {USB_CONFIG_DESCRIPTOR_SIZE + 1599 USB_INTERFACE_DESCRIPTOR_SIZE + 1600 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1601 1, 1602 1, 1603 0, 1604 UC_SELF_POWERED, 1605 0 /* max power */ 1606 }; 1607 1608 Static usb_interface_descriptor_t ehci_ifcd = { 1609 USB_INTERFACE_DESCRIPTOR_SIZE, 1610 UDESC_INTERFACE, 1611 0, 1612 0, 1613 1, 1614 UICLASS_HUB, 1615 UISUBCLASS_HUB, 1616 UIPROTO_HSHUBSTT, 1617 0 1618 }; 1619 1620 Static usb_endpoint_descriptor_t ehci_endpd = { 1621 USB_ENDPOINT_DESCRIPTOR_SIZE, 1622 UDESC_ENDPOINT, 1623 UE_DIR_IN | EHCI_INTR_ENDPT, 1624 UE_INTERRUPT, 1625 {8, 0}, /* max packet */ 1626 255 1627 }; 1628 1629 Static usb_hub_descriptor_t ehci_hubd = { 1630 USB_HUB_DESCRIPTOR_SIZE, 1631 UDESC_HUB, 1632 0, 1633 {0,0}, 1634 0, 1635 0, 1636 {0}, 1637 }; 1638 1639 Static int 1640 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1641 { 1642 int i; 1643 1644 if (l == 0) 1645 return (0); 1646 p->bLength = 2 * strlen(s) + 2; 1647 if (l == 1) 1648 return (1); 1649 p->bDescriptorType = UDESC_STRING; 1650 l -= 2; 1651 for (i = 0; s[i] && l > 1; i++, l -= 2) 1652 USETW2(p->bString[i], 0, s[i]); 1653 return (2*i+2); 1654 } 1655 1656 /* 1657 * Simulate a hardware hub by handling all the necessary requests. 1658 */ 1659 Static usbd_status 1660 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1661 { 1662 usbd_status err; 1663 1664 /* Insert last in queue. */ 1665 err = usb_insert_transfer(xfer); 1666 if (err) 1667 return (err); 1668 1669 /* Pipe isn't running, start first */ 1670 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1671 } 1672 1673 Static usbd_status 1674 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1675 { 1676 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1677 usb_device_request_t *req; 1678 void *buf = NULL; 1679 int port, i; 1680 int s, len, value, index, l, totlen = 0; 1681 usb_port_status_t ps; 1682 usb_hub_descriptor_t hubd; 1683 usbd_status err; 1684 u_int32_t v; 1685 1686 if (sc->sc_dying) 1687 return (USBD_IOERROR); 1688 1689 #ifdef DIAGNOSTIC 1690 if (!(xfer->rqflags & URQ_REQUEST)) 1691 /* XXX panic */ 1692 return (USBD_INVAL); 1693 #endif 1694 req = &xfer->request; 1695 1696 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1697 req->bmRequestType, req->bRequest)); 1698 1699 len = UGETW(req->wLength); 1700 value = UGETW(req->wValue); 1701 index = UGETW(req->wIndex); 1702 1703 if (len != 0) 1704 buf = KERNADDR(&xfer->dmabuf, 0); 1705 1706 #define C(x,y) ((x) | ((y) << 8)) 1707 switch(C(req->bRequest, req->bmRequestType)) { 1708 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1709 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1710 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1711 /* 1712 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1713 * for the integrated root hub. 1714 */ 1715 break; 1716 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1717 if (len > 0) { 1718 *(u_int8_t *)buf = sc->sc_conf; 1719 totlen = 1; 1720 } 1721 break; 1722 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1723 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1724 switch(value >> 8) { 1725 case UDESC_DEVICE: 1726 if ((value & 0xff) != 0) { 1727 err = USBD_IOERROR; 1728 goto ret; 1729 } 1730 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1731 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1732 memcpy(buf, &ehci_devd, l); 1733 break; 1734 /* 1735 * We can't really operate at another speed, but the spec says 1736 * we need this descriptor. 1737 */ 1738 case UDESC_DEVICE_QUALIFIER: 1739 if ((value & 0xff) != 0) { 1740 err = USBD_IOERROR; 1741 goto ret; 1742 } 1743 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1744 memcpy(buf, &ehci_odevd, l); 1745 break; 1746 /* 1747 * We can't really operate at another speed, but the spec says 1748 * we need this descriptor. 1749 */ 1750 case UDESC_OTHER_SPEED_CONFIGURATION: 1751 case UDESC_CONFIG: 1752 if ((value & 0xff) != 0) { 1753 err = USBD_IOERROR; 1754 goto ret; 1755 } 1756 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1757 memcpy(buf, &ehci_confd, l); 1758 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1759 value >> 8; 1760 buf = (char *)buf + l; 1761 len -= l; 1762 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1763 totlen += l; 1764 memcpy(buf, &ehci_ifcd, l); 1765 buf = (char *)buf + l; 1766 len -= l; 1767 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1768 totlen += l; 1769 memcpy(buf, &ehci_endpd, l); 1770 break; 1771 case UDESC_STRING: 1772 if (len == 0) 1773 break; 1774 *(u_int8_t *)buf = 0; 1775 totlen = 1; 1776 switch (value & 0xff) { 1777 case 0: /* Language table */ 1778 totlen = ehci_str(buf, len, "\001"); 1779 break; 1780 case 1: /* Vendor */ 1781 totlen = ehci_str(buf, len, sc->sc_vendor); 1782 break; 1783 case 2: /* Product */ 1784 totlen = ehci_str(buf, len, "EHCI root hub"); 1785 break; 1786 } 1787 break; 1788 default: 1789 err = USBD_IOERROR; 1790 goto ret; 1791 } 1792 break; 1793 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1794 if (len > 0) { 1795 *(u_int8_t *)buf = 0; 1796 totlen = 1; 1797 } 1798 break; 1799 case C(UR_GET_STATUS, UT_READ_DEVICE): 1800 if (len > 1) { 1801 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1802 totlen = 2; 1803 } 1804 break; 1805 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1806 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1807 if (len > 1) { 1808 USETW(((usb_status_t *)buf)->wStatus, 0); 1809 totlen = 2; 1810 } 1811 break; 1812 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1813 if (value >= USB_MAX_DEVICES) { 1814 err = USBD_IOERROR; 1815 goto ret; 1816 } 1817 sc->sc_addr = value; 1818 break; 1819 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1820 if (value != 0 && value != 1) { 1821 err = USBD_IOERROR; 1822 goto ret; 1823 } 1824 sc->sc_conf = value; 1825 break; 1826 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1827 break; 1828 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1829 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1830 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1831 err = USBD_IOERROR; 1832 goto ret; 1833 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1834 break; 1835 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1836 break; 1837 /* Hub requests */ 1838 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1839 break; 1840 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1841 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1842 "port=%d feature=%d\n", 1843 index, value)); 1844 if (index < 1 || index > sc->sc_noport) { 1845 err = USBD_IOERROR; 1846 goto ret; 1847 } 1848 port = EHCI_PORTSC(index); 1849 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1850 switch(value) { 1851 case UHF_PORT_ENABLE: 1852 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1853 break; 1854 case UHF_PORT_SUSPEND: 1855 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1856 break; 1857 case UHF_PORT_POWER: 1858 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1859 break; 1860 case UHF_PORT_TEST: 1861 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1862 "%d\n", index)); 1863 break; 1864 case UHF_PORT_INDICATOR: 1865 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1866 "%d\n", index)); 1867 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1868 break; 1869 case UHF_C_PORT_CONNECTION: 1870 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1871 break; 1872 case UHF_C_PORT_ENABLE: 1873 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1874 break; 1875 case UHF_C_PORT_SUSPEND: 1876 /* how? */ 1877 break; 1878 case UHF_C_PORT_OVER_CURRENT: 1879 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1880 break; 1881 case UHF_C_PORT_RESET: 1882 sc->sc_isreset = 0; 1883 break; 1884 default: 1885 err = USBD_IOERROR; 1886 goto ret; 1887 } 1888 #if 0 1889 switch(value) { 1890 case UHF_C_PORT_CONNECTION: 1891 case UHF_C_PORT_ENABLE: 1892 case UHF_C_PORT_SUSPEND: 1893 case UHF_C_PORT_OVER_CURRENT: 1894 case UHF_C_PORT_RESET: 1895 /* Enable RHSC interrupt if condition is cleared. */ 1896 if ((OREAD4(sc, port) >> 16) == 0) 1897 ehci_pcd_able(sc, 1); 1898 break; 1899 default: 1900 break; 1901 } 1902 #endif 1903 break; 1904 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1905 if ((value & 0xff) != 0) { 1906 err = USBD_IOERROR; 1907 goto ret; 1908 } 1909 hubd = ehci_hubd; 1910 hubd.bNbrPorts = sc->sc_noport; 1911 v = EOREAD4(sc, EHCI_HCSPARAMS); 1912 USETW(hubd.wHubCharacteristics, 1913 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1914 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1915 ? UHD_PORT_IND : 0); 1916 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1917 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1918 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1919 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1920 l = min(len, hubd.bDescLength); 1921 totlen = l; 1922 memcpy(buf, &hubd, l); 1923 break; 1924 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1925 if (len != 4) { 1926 err = USBD_IOERROR; 1927 goto ret; 1928 } 1929 memset(buf, 0, len); /* ? XXX */ 1930 totlen = len; 1931 break; 1932 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1933 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1934 index)); 1935 if (index < 1 || index > sc->sc_noport) { 1936 err = USBD_IOERROR; 1937 goto ret; 1938 } 1939 if (len != 4) { 1940 err = USBD_IOERROR; 1941 goto ret; 1942 } 1943 v = EOREAD4(sc, EHCI_PORTSC(index)); 1944 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1945 v)); 1946 i = UPS_HIGH_SPEED; 1947 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1948 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1949 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1950 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1951 if (v & EHCI_PS_PR) i |= UPS_RESET; 1952 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1953 USETW(ps.wPortStatus, i); 1954 i = 0; 1955 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1956 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1957 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1958 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1959 USETW(ps.wPortChange, i); 1960 l = min(len, sizeof ps); 1961 memcpy(buf, &ps, l); 1962 totlen = l; 1963 break; 1964 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1965 err = USBD_IOERROR; 1966 goto ret; 1967 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1968 break; 1969 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1970 if (index < 1 || index > sc->sc_noport) { 1971 err = USBD_IOERROR; 1972 goto ret; 1973 } 1974 port = EHCI_PORTSC(index); 1975 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1976 switch(value) { 1977 case UHF_PORT_ENABLE: 1978 EOWRITE4(sc, port, v | EHCI_PS_PE); 1979 break; 1980 case UHF_PORT_SUSPEND: 1981 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1982 break; 1983 case UHF_PORT_RESET: 1984 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1985 index)); 1986 if (EHCI_PS_IS_LOWSPEED(v)) { 1987 /* Low speed device, give up ownership. */ 1988 ehci_disown(sc, index, 1); 1989 break; 1990 } 1991 /* Start reset sequence. */ 1992 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1993 EOWRITE4(sc, port, v | EHCI_PS_PR); 1994 /* Wait for reset to complete. */ 1995 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1996 if (sc->sc_dying) { 1997 err = USBD_IOERROR; 1998 goto ret; 1999 } 2000 /* Terminate reset sequence. */ 2001 EOWRITE4(sc, port, v); 2002 /* Wait for HC to complete reset. */ 2003 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2004 if (sc->sc_dying) { 2005 err = USBD_IOERROR; 2006 goto ret; 2007 } 2008 v = EOREAD4(sc, port); 2009 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2010 if (v & EHCI_PS_PR) { 2011 printf("%s: port reset timeout\n", 2012 USBDEVNAME(sc->sc_bus.bdev)); 2013 return (USBD_TIMEOUT); 2014 } 2015 if (!(v & EHCI_PS_PE)) { 2016 /* Not a high speed device, give up ownership.*/ 2017 ehci_disown(sc, index, 0); 2018 break; 2019 } 2020 sc->sc_isreset = 1; 2021 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2022 index, v)); 2023 break; 2024 case UHF_PORT_POWER: 2025 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2026 "%d\n", index)); 2027 EOWRITE4(sc, port, v | EHCI_PS_PP); 2028 break; 2029 case UHF_PORT_TEST: 2030 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2031 "%d\n", index)); 2032 break; 2033 case UHF_PORT_INDICATOR: 2034 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2035 "%d\n", index)); 2036 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2037 break; 2038 default: 2039 err = USBD_IOERROR; 2040 goto ret; 2041 } 2042 break; 2043 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2044 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2045 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2046 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2047 break; 2048 default: 2049 err = USBD_IOERROR; 2050 goto ret; 2051 } 2052 xfer->actlen = totlen; 2053 err = USBD_NORMAL_COMPLETION; 2054 ret: 2055 xfer->status = err; 2056 s = splusb(); 2057 usb_transfer_complete(xfer); 2058 splx(s); 2059 return (USBD_IN_PROGRESS); 2060 } 2061 2062 void 2063 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2064 { 2065 int port; 2066 u_int32_t v; 2067 2068 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2069 #ifdef DIAGNOSTIC 2070 if (sc->sc_npcomp != 0) { 2071 int i = (index-1) / sc->sc_npcomp; 2072 if (i >= sc->sc_ncomp) 2073 printf("%s: strange port\n", 2074 USBDEVNAME(sc->sc_bus.bdev)); 2075 else 2076 printf("%s: handing over %s speed device on " 2077 "port %d to %s\n", 2078 USBDEVNAME(sc->sc_bus.bdev), 2079 lowspeed ? "low" : "full", 2080 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2081 } else { 2082 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2083 } 2084 #endif 2085 port = EHCI_PORTSC(index); 2086 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2087 EOWRITE4(sc, port, v | EHCI_PS_PO); 2088 } 2089 2090 /* Abort a root control request. */ 2091 Static void 2092 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2093 { 2094 /* Nothing to do, all transfers are synchronous. */ 2095 } 2096 2097 /* Close the root pipe. */ 2098 Static void 2099 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2100 { 2101 DPRINTF(("ehci_root_ctrl_close\n")); 2102 /* Nothing to do. */ 2103 } 2104 2105 void 2106 ehci_root_intr_done(usbd_xfer_handle xfer) 2107 { 2108 xfer->hcpriv = NULL; 2109 } 2110 2111 Static usbd_status 2112 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2113 { 2114 usbd_status err; 2115 2116 /* Insert last in queue. */ 2117 err = usb_insert_transfer(xfer); 2118 if (err) 2119 return (err); 2120 2121 /* Pipe isn't running, start first */ 2122 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2123 } 2124 2125 Static usbd_status 2126 ehci_root_intr_start(usbd_xfer_handle xfer) 2127 { 2128 usbd_pipe_handle pipe = xfer->pipe; 2129 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2130 2131 if (sc->sc_dying) 2132 return (USBD_IOERROR); 2133 2134 sc->sc_intrxfer = xfer; 2135 2136 return (USBD_IN_PROGRESS); 2137 } 2138 2139 /* Abort a root interrupt request. */ 2140 Static void 2141 ehci_root_intr_abort(usbd_xfer_handle xfer) 2142 { 2143 int s; 2144 2145 if (xfer->pipe->intrxfer == xfer) { 2146 DPRINTF(("ehci_root_intr_abort: remove\n")); 2147 xfer->pipe->intrxfer = NULL; 2148 } 2149 xfer->status = USBD_CANCELLED; 2150 s = splusb(); 2151 usb_transfer_complete(xfer); 2152 splx(s); 2153 } 2154 2155 /* Close the root pipe. */ 2156 Static void 2157 ehci_root_intr_close(usbd_pipe_handle pipe) 2158 { 2159 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2160 2161 DPRINTF(("ehci_root_intr_close\n")); 2162 2163 sc->sc_intrxfer = NULL; 2164 } 2165 2166 void 2167 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2168 { 2169 xfer->hcpriv = NULL; 2170 } 2171 2172 /************************/ 2173 2174 ehci_soft_qh_t * 2175 ehci_alloc_sqh(ehci_softc_t *sc) 2176 { 2177 ehci_soft_qh_t *sqh; 2178 usbd_status err; 2179 int i, offs; 2180 usb_dma_t dma; 2181 2182 if (sc->sc_freeqhs == NULL) { 2183 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2184 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2185 EHCI_PAGE_SIZE, &dma); 2186 #ifdef EHCI_DEBUG 2187 if (err) 2188 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2189 #endif 2190 if (err) 2191 return (NULL); 2192 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2193 offs = i * EHCI_SQH_SIZE; 2194 sqh = KERNADDR(&dma, offs); 2195 sqh->physaddr = DMAADDR(&dma, offs); 2196 sqh->next = sc->sc_freeqhs; 2197 sc->sc_freeqhs = sqh; 2198 } 2199 } 2200 sqh = sc->sc_freeqhs; 2201 sc->sc_freeqhs = sqh->next; 2202 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2203 sqh->next = NULL; 2204 return (sqh); 2205 } 2206 2207 void 2208 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2209 { 2210 sqh->next = sc->sc_freeqhs; 2211 sc->sc_freeqhs = sqh; 2212 } 2213 2214 ehci_soft_qtd_t * 2215 ehci_alloc_sqtd(ehci_softc_t *sc) 2216 { 2217 ehci_soft_qtd_t *sqtd; 2218 usbd_status err; 2219 int i, offs; 2220 usb_dma_t dma; 2221 int s; 2222 2223 if (sc->sc_freeqtds == NULL) { 2224 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2225 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2226 EHCI_PAGE_SIZE, &dma); 2227 #ifdef EHCI_DEBUG 2228 if (err) 2229 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2230 #endif 2231 if (err) 2232 return (NULL); 2233 s = splusb(); 2234 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2235 offs = i * EHCI_SQTD_SIZE; 2236 sqtd = KERNADDR(&dma, offs); 2237 sqtd->physaddr = DMAADDR(&dma, offs); 2238 sqtd->nextqtd = sc->sc_freeqtds; 2239 sc->sc_freeqtds = sqtd; 2240 } 2241 splx(s); 2242 } 2243 2244 s = splusb(); 2245 sqtd = sc->sc_freeqtds; 2246 sc->sc_freeqtds = sqtd->nextqtd; 2247 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2248 sqtd->nextqtd = NULL; 2249 sqtd->xfer = NULL; 2250 splx(s); 2251 2252 return (sqtd); 2253 } 2254 2255 void 2256 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2257 { 2258 int s; 2259 2260 s = splusb(); 2261 sqtd->nextqtd = sc->sc_freeqtds; 2262 sc->sc_freeqtds = sqtd; 2263 splx(s); 2264 } 2265 2266 usbd_status 2267 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2268 int alen, int rd, usbd_xfer_handle xfer, 2269 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2270 { 2271 ehci_soft_qtd_t *next, *cur; 2272 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2273 u_int32_t qtdstatus; 2274 int len, curlen, mps; 2275 int i, tog; 2276 usb_dma_t *dma = &xfer->dmabuf; 2277 u_int16_t flags = xfer->flags; 2278 2279 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2280 2281 len = alen; 2282 dataphys = DMAADDR(dma, 0); 2283 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2284 #if 0 2285 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2286 epipe->nexttoggle); 2287 #endif 2288 qtdstatus = EHCI_QTD_ACTIVE | 2289 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2290 EHCI_QTD_SET_CERR(3) 2291 /* IOC set below */ 2292 /* BYTES set below */ 2293 ; 2294 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2295 tog = epipe->nexttoggle; 2296 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2297 2298 cur = ehci_alloc_sqtd(sc); 2299 *sp = cur; 2300 if (cur == NULL) 2301 goto nomem; 2302 for (;;) { 2303 dataphyspage = EHCI_PAGE(dataphys); 2304 /* The EHCI hardware can handle at most 5 pages. */ 2305 if (dataphyslastpage - dataphyspage < 2306 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2307 /* we can handle it in this QTD */ 2308 curlen = len; 2309 } else { 2310 /* must use multiple TDs, fill as much as possible. */ 2311 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2312 EHCI_PAGE_OFFSET(dataphys); 2313 #ifdef DIAGNOSTIC 2314 if (curlen > len) { 2315 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2316 "len=0x%x offs=0x%x\n", curlen, len, 2317 EHCI_PAGE_OFFSET(dataphys)); 2318 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2319 dataphyslastpage, dataphyspage, 2320 dataphys); 2321 curlen = len; 2322 } 2323 #endif 2324 /* the length must be a multiple of the max size */ 2325 curlen -= curlen % mps; 2326 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2327 "curlen=%d\n", curlen)); 2328 #ifdef DIAGNOSTIC 2329 if (curlen == 0) 2330 panic("ehci_alloc_std: curlen == 0"); 2331 #endif 2332 } 2333 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2334 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2335 dataphys, dataphyslastpage, 2336 len, curlen)); 2337 len -= curlen; 2338 2339 /* 2340 * Allocate another transfer if there's more data left, 2341 * or if force last short transfer flag is set and we're 2342 * allocating a multiple of the max packet size. 2343 */ 2344 if (len != 0 || 2345 ((curlen % mps) == 0 && !rd && curlen != 0 && 2346 (flags & USBD_FORCE_SHORT_XFER))) { 2347 next = ehci_alloc_sqtd(sc); 2348 if (next == NULL) 2349 goto nomem; 2350 nextphys = htole32(next->physaddr); 2351 } else { 2352 next = NULL; 2353 nextphys = EHCI_NULL; 2354 } 2355 2356 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2357 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2358 if (i != 0) /* use offset only in first buffer */ 2359 a = EHCI_PAGE(a); 2360 cur->qtd.qtd_buffer[i] = htole32(a); 2361 cur->qtd.qtd_buffer_hi[i] = 0; 2362 #ifdef DIAGNOSTIC 2363 if (i >= EHCI_QTD_NBUFFERS) { 2364 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2365 goto nomem; 2366 } 2367 #endif 2368 } 2369 cur->nextqtd = next; 2370 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2371 cur->qtd.qtd_status = 2372 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2373 cur->xfer = xfer; 2374 cur->len = curlen; 2375 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2376 dataphys, dataphys + curlen)); 2377 /* adjust the toggle based on the number of packets in this 2378 qtd */ 2379 if (((curlen + mps - 1) / mps) & 1) { 2380 tog ^= 1; 2381 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2382 } 2383 if (next == NULL) 2384 break; 2385 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2386 dataphys += curlen; 2387 cur = next; 2388 } 2389 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2390 *ep = cur; 2391 epipe->nexttoggle = tog; 2392 2393 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2394 *sp, *ep)); 2395 2396 return (USBD_NORMAL_COMPLETION); 2397 2398 nomem: 2399 /* XXX free chain */ 2400 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2401 return (USBD_NOMEM); 2402 } 2403 2404 Static void 2405 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2406 ehci_soft_qtd_t *sqtdend) 2407 { 2408 ehci_soft_qtd_t *p; 2409 int i; 2410 2411 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2412 sqtd, sqtdend)); 2413 2414 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2415 p = sqtd->nextqtd; 2416 ehci_free_sqtd(sc, sqtd); 2417 } 2418 } 2419 2420 /****************/ 2421 2422 /* 2423 * Close a reqular pipe. 2424 * Assumes that there are no pending transactions. 2425 */ 2426 void 2427 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2428 { 2429 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2430 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2431 ehci_soft_qh_t *sqh = epipe->sqh; 2432 int s; 2433 2434 s = splusb(); 2435 ehci_rem_qh(sc, sqh, head); 2436 splx(s); 2437 ehci_free_sqh(sc, epipe->sqh); 2438 } 2439 2440 /* 2441 * Abort a device request. 2442 * If this routine is called at splusb() it guarantees that the request 2443 * will be removed from the hardware scheduling and that the callback 2444 * for it will be called with USBD_CANCELLED status. 2445 * It's impossible to guarantee that the requested transfer will not 2446 * have happened since the hardware runs concurrently. 2447 * If the transaction has already happened we rely on the ordinary 2448 * interrupt processing to process it. 2449 * XXX This is most probably wrong. 2450 */ 2451 void 2452 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2453 { 2454 #define exfer EXFER(xfer) 2455 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2456 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2457 ehci_soft_qh_t *sqh = epipe->sqh; 2458 ehci_soft_qtd_t *sqtd; 2459 ehci_physaddr_t cur; 2460 u_int32_t qhstatus; 2461 int s; 2462 int hit; 2463 2464 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2465 2466 if (sc->sc_dying) { 2467 /* If we're dying, just do the software part. */ 2468 s = splusb(); 2469 xfer->status = status; /* make software ignore it */ 2470 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2471 usb_transfer_complete(xfer); 2472 splx(s); 2473 return; 2474 } 2475 2476 if (xfer->device->bus->intr_context || !curproc) 2477 panic("ehci_abort_xfer: not in process context"); 2478 2479 /* 2480 * Step 1: Make interrupt routine and hardware ignore xfer. 2481 */ 2482 s = splusb(); 2483 xfer->status = status; /* make software ignore it */ 2484 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2485 qhstatus = sqh->qh.qh_qtd.qtd_status; 2486 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2487 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2488 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2489 if (sqtd == exfer->sqtdend) 2490 break; 2491 } 2492 splx(s); 2493 2494 /* 2495 * Step 2: Wait until we know hardware has finished any possible 2496 * use of the xfer. Also make sure the soft interrupt routine 2497 * has run. 2498 */ 2499 ehci_sync_hc(sc); 2500 s = splusb(); 2501 #ifdef USB_USE_SOFTINTR 2502 sc->sc_softwake = 1; 2503 #endif /* USB_USE_SOFTINTR */ 2504 usb_schedsoftintr(&sc->sc_bus); 2505 #ifdef USB_USE_SOFTINTR 2506 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2507 #endif /* USB_USE_SOFTINTR */ 2508 splx(s); 2509 2510 /* 2511 * Step 3: Remove any vestiges of the xfer from the hardware. 2512 * The complication here is that the hardware may have executed 2513 * beyond the xfer we're trying to abort. So as we're scanning 2514 * the TDs of this xfer we check if the hardware points to 2515 * any of them. 2516 */ 2517 s = splusb(); /* XXX why? */ 2518 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2519 hit = 0; 2520 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2521 hit |= cur == sqtd->physaddr; 2522 if (sqtd == exfer->sqtdend) 2523 break; 2524 } 2525 sqtd = sqtd->nextqtd; 2526 /* Zap curqtd register if hardware pointed inside the xfer. */ 2527 if (hit && sqtd != NULL) { 2528 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2529 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2530 sqh->qh.qh_qtd.qtd_status = qhstatus; 2531 } else { 2532 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2533 } 2534 2535 /* 2536 * Step 4: Execute callback. 2537 */ 2538 #ifdef DIAGNOSTIC 2539 exfer->isdone = 1; 2540 #endif 2541 usb_transfer_complete(xfer); 2542 2543 splx(s); 2544 #undef exfer 2545 } 2546 2547 void 2548 ehci_timeout(void *addr) 2549 { 2550 struct ehci_xfer *exfer = addr; 2551 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2552 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2553 2554 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2555 #ifdef USB_DEBUG 2556 if (ehcidebug > 1) 2557 usbd_dump_pipe(exfer->xfer.pipe); 2558 #endif 2559 2560 if (sc->sc_dying) { 2561 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2562 return; 2563 } 2564 2565 /* Execute the abort in a process context. */ 2566 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2567 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2568 } 2569 2570 void 2571 ehci_timeout_task(void *addr) 2572 { 2573 usbd_xfer_handle xfer = addr; 2574 int s; 2575 2576 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2577 2578 s = splusb(); 2579 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2580 splx(s); 2581 } 2582 2583 /************************/ 2584 2585 Static usbd_status 2586 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2587 { 2588 usbd_status err; 2589 2590 /* Insert last in queue. */ 2591 err = usb_insert_transfer(xfer); 2592 if (err) 2593 return (err); 2594 2595 /* Pipe isn't running, start first */ 2596 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2597 } 2598 2599 Static usbd_status 2600 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2601 { 2602 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2603 usbd_status err; 2604 2605 if (sc->sc_dying) 2606 return (USBD_IOERROR); 2607 2608 #ifdef DIAGNOSTIC 2609 if (!(xfer->rqflags & URQ_REQUEST)) { 2610 /* XXX panic */ 2611 printf("ehci_device_ctrl_transfer: not a request\n"); 2612 return (USBD_INVAL); 2613 } 2614 #endif 2615 2616 err = ehci_device_request(xfer); 2617 if (err) 2618 return (err); 2619 2620 if (sc->sc_bus.use_polling) 2621 ehci_waitintr(sc, xfer); 2622 return (USBD_IN_PROGRESS); 2623 } 2624 2625 void 2626 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2627 { 2628 struct ehci_xfer *ex = EXFER(xfer); 2629 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2630 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2631 2632 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2633 2634 #ifdef DIAGNOSTIC 2635 if (!(xfer->rqflags & URQ_REQUEST)) { 2636 panic("ehci_ctrl_done: not a request"); 2637 } 2638 #endif 2639 2640 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2641 ehci_del_intr_list(ex); /* remove from active list */ 2642 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2643 } 2644 2645 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2646 } 2647 2648 /* Abort a device control request. */ 2649 Static void 2650 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2651 { 2652 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2653 ehci_abort_xfer(xfer, USBD_CANCELLED); 2654 } 2655 2656 /* Close a device control pipe. */ 2657 Static void 2658 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2659 { 2660 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2661 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2662 2663 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2664 ehci_close_pipe(pipe, sc->sc_async_head); 2665 } 2666 2667 usbd_status 2668 ehci_device_request(usbd_xfer_handle xfer) 2669 { 2670 #define exfer EXFER(xfer) 2671 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2672 usb_device_request_t *req = &xfer->request; 2673 usbd_device_handle dev = epipe->pipe.device; 2674 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2675 int addr = dev->address; 2676 ehci_soft_qtd_t *setup, *stat, *next; 2677 ehci_soft_qh_t *sqh; 2678 int isread; 2679 int len; 2680 usbd_status err; 2681 int s; 2682 2683 isread = req->bmRequestType & UT_READ; 2684 len = UGETW(req->wLength); 2685 2686 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2687 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2688 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2689 UGETW(req->wIndex), len, addr, 2690 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2691 2692 setup = ehci_alloc_sqtd(sc); 2693 if (setup == NULL) { 2694 err = USBD_NOMEM; 2695 goto bad1; 2696 } 2697 stat = ehci_alloc_sqtd(sc); 2698 if (stat == NULL) { 2699 err = USBD_NOMEM; 2700 goto bad2; 2701 } 2702 2703 sqh = epipe->sqh; 2704 epipe->u.ctl.length = len; 2705 2706 /* Update device address and length since they may have changed 2707 during the setup of the control pipe in usbd_new_device(). */ 2708 /* XXX This only needs to be done once, but it's too early in open. */ 2709 /* XXXX Should not touch ED here! */ 2710 sqh->qh.qh_endp = 2711 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2712 htole32( 2713 EHCI_QH_SET_ADDR(addr) | 2714 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2715 ); 2716 2717 /* Set up data transaction */ 2718 if (len != 0) { 2719 ehci_soft_qtd_t *end; 2720 2721 /* Start toggle at 1. */ 2722 epipe->nexttoggle = 1; 2723 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2724 &next, &end); 2725 if (err) 2726 goto bad3; 2727 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2728 end->nextqtd = stat; 2729 end->qtd.qtd_next = 2730 end->qtd.qtd_altnext = htole32(stat->physaddr); 2731 } else { 2732 next = stat; 2733 } 2734 2735 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2736 2737 /* Clear toggle */ 2738 setup->qtd.qtd_status = htole32( 2739 EHCI_QTD_ACTIVE | 2740 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2741 EHCI_QTD_SET_CERR(3) | 2742 EHCI_QTD_SET_TOGGLE(0) | 2743 EHCI_QTD_SET_BYTES(sizeof *req) 2744 ); 2745 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2746 setup->qtd.qtd_buffer_hi[0] = 0; 2747 setup->nextqtd = next; 2748 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2749 setup->xfer = xfer; 2750 setup->len = sizeof *req; 2751 2752 stat->qtd.qtd_status = htole32( 2753 EHCI_QTD_ACTIVE | 2754 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2755 EHCI_QTD_SET_CERR(3) | 2756 EHCI_QTD_SET_TOGGLE(1) | 2757 EHCI_QTD_IOC 2758 ); 2759 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2760 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2761 stat->nextqtd = NULL; 2762 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2763 stat->xfer = xfer; 2764 stat->len = 0; 2765 2766 #ifdef EHCI_DEBUG 2767 if (ehcidebug > 5) { 2768 DPRINTF(("ehci_device_request:\n")); 2769 ehci_dump_sqh(sqh); 2770 ehci_dump_sqtds(setup); 2771 } 2772 #endif 2773 2774 exfer->sqtdstart = setup; 2775 exfer->sqtdend = stat; 2776 #ifdef DIAGNOSTIC 2777 if (!exfer->isdone) { 2778 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2779 } 2780 exfer->isdone = 0; 2781 #endif 2782 2783 /* Insert qTD in QH list. */ 2784 s = splusb(); 2785 ehci_set_qh_qtd(sqh, setup); 2786 if (xfer->timeout && !sc->sc_bus.use_polling) { 2787 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2788 ehci_timeout, xfer); 2789 } 2790 ehci_add_intr_list(sc, exfer); 2791 xfer->status = USBD_IN_PROGRESS; 2792 splx(s); 2793 2794 #ifdef EHCI_DEBUG 2795 if (ehcidebug > 10) { 2796 DPRINTF(("ehci_device_request: status=%x\n", 2797 EOREAD4(sc, EHCI_USBSTS))); 2798 delay(10000); 2799 ehci_dump_regs(sc); 2800 ehci_dump_sqh(sc->sc_async_head); 2801 ehci_dump_sqh(sqh); 2802 ehci_dump_sqtds(setup); 2803 } 2804 #endif 2805 2806 return (USBD_NORMAL_COMPLETION); 2807 2808 bad3: 2809 ehci_free_sqtd(sc, stat); 2810 bad2: 2811 ehci_free_sqtd(sc, setup); 2812 bad1: 2813 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2814 xfer->status = err; 2815 usb_transfer_complete(xfer); 2816 return (err); 2817 #undef exfer 2818 } 2819 2820 /************************/ 2821 2822 Static usbd_status 2823 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2824 { 2825 usbd_status err; 2826 2827 /* Insert last in queue. */ 2828 err = usb_insert_transfer(xfer); 2829 if (err) 2830 return (err); 2831 2832 /* Pipe isn't running, start first */ 2833 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2834 } 2835 2836 usbd_status 2837 ehci_device_bulk_start(usbd_xfer_handle xfer) 2838 { 2839 #define exfer EXFER(xfer) 2840 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2841 usbd_device_handle dev = epipe->pipe.device; 2842 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2843 ehci_soft_qtd_t *data, *dataend; 2844 ehci_soft_qh_t *sqh; 2845 usbd_status err; 2846 int len, isread, endpt; 2847 int s; 2848 2849 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2850 xfer, xfer->length, xfer->flags)); 2851 2852 if (sc->sc_dying) 2853 return (USBD_IOERROR); 2854 2855 #ifdef DIAGNOSTIC 2856 if (xfer->rqflags & URQ_REQUEST) 2857 panic("ehci_device_bulk_start: a request"); 2858 #endif 2859 2860 len = xfer->length; 2861 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2862 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2863 sqh = epipe->sqh; 2864 2865 epipe->u.bulk.length = len; 2866 2867 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2868 &dataend); 2869 if (err) { 2870 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2871 xfer->status = err; 2872 usb_transfer_complete(xfer); 2873 return (err); 2874 } 2875 2876 #ifdef EHCI_DEBUG 2877 if (ehcidebug > 5) { 2878 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2879 ehci_dump_sqh(sqh); 2880 ehci_dump_sqtds(data); 2881 } 2882 #endif 2883 2884 /* Set up interrupt info. */ 2885 exfer->sqtdstart = data; 2886 exfer->sqtdend = dataend; 2887 #ifdef DIAGNOSTIC 2888 if (!exfer->isdone) { 2889 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2890 } 2891 exfer->isdone = 0; 2892 #endif 2893 2894 s = splusb(); 2895 ehci_set_qh_qtd(sqh, data); 2896 if (xfer->timeout && !sc->sc_bus.use_polling) { 2897 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2898 ehci_timeout, xfer); 2899 } 2900 ehci_add_intr_list(sc, exfer); 2901 xfer->status = USBD_IN_PROGRESS; 2902 splx(s); 2903 2904 #ifdef EHCI_DEBUG 2905 if (ehcidebug > 10) { 2906 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2907 delay(10000); 2908 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2909 ehci_dump_regs(sc); 2910 #if 0 2911 printf("async_head:\n"); 2912 ehci_dump_sqh(sc->sc_async_head); 2913 #endif 2914 printf("sqh:\n"); 2915 ehci_dump_sqh(sqh); 2916 ehci_dump_sqtds(data); 2917 } 2918 #endif 2919 2920 if (sc->sc_bus.use_polling) 2921 ehci_waitintr(sc, xfer); 2922 2923 return (USBD_IN_PROGRESS); 2924 #undef exfer 2925 } 2926 2927 Static void 2928 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2929 { 2930 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2931 ehci_abort_xfer(xfer, USBD_CANCELLED); 2932 } 2933 2934 /* 2935 * Close a device bulk pipe. 2936 */ 2937 Static void 2938 ehci_device_bulk_close(usbd_pipe_handle pipe) 2939 { 2940 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2941 2942 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2943 ehci_close_pipe(pipe, sc->sc_async_head); 2944 } 2945 2946 void 2947 ehci_device_bulk_done(usbd_xfer_handle xfer) 2948 { 2949 struct ehci_xfer *ex = EXFER(xfer); 2950 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2951 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2952 2953 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2954 xfer, xfer->actlen)); 2955 2956 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2957 ehci_del_intr_list(ex); /* remove from active list */ 2958 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2959 } 2960 2961 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2962 } 2963 2964 /************************/ 2965 2966 Static usbd_status 2967 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2968 { 2969 struct ehci_soft_islot *isp; 2970 int islot, lev; 2971 2972 /* Find a poll rate that is large enough. */ 2973 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2974 if (EHCI_ILEV_IVAL(lev) <= ival) 2975 break; 2976 2977 /* Pick an interrupt slot at the right level. */ 2978 /* XXX could do better than picking at random */ 2979 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2980 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2981 2982 sqh->islot = islot; 2983 isp = &sc->sc_islots[islot]; 2984 ehci_add_qh(sqh, isp->sqh); 2985 2986 return (USBD_NORMAL_COMPLETION); 2987 } 2988 2989 Static usbd_status 2990 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2991 { 2992 usbd_status err; 2993 2994 /* Insert last in queue. */ 2995 err = usb_insert_transfer(xfer); 2996 if (err) 2997 return (err); 2998 2999 /* 3000 * Pipe isn't running (otherwise err would be USBD_INPROG), 3001 * so start it first. 3002 */ 3003 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3004 } 3005 3006 Static usbd_status 3007 ehci_device_intr_start(usbd_xfer_handle xfer) 3008 { 3009 #define exfer EXFER(xfer) 3010 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3011 usbd_device_handle dev = xfer->pipe->device; 3012 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3013 ehci_soft_qtd_t *data, *dataend; 3014 ehci_soft_qh_t *sqh; 3015 usbd_status err; 3016 int len, isread, endpt; 3017 int s; 3018 3019 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3020 xfer, xfer->length, xfer->flags)); 3021 3022 if (sc->sc_dying) 3023 return (USBD_IOERROR); 3024 3025 #ifdef DIAGNOSTIC 3026 if (xfer->rqflags & URQ_REQUEST) 3027 panic("ehci_device_intr_start: a request"); 3028 #endif 3029 3030 len = xfer->length; 3031 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3032 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3033 sqh = epipe->sqh; 3034 3035 epipe->u.intr.length = len; 3036 3037 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3038 &dataend); 3039 if (err) { 3040 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3041 xfer->status = err; 3042 usb_transfer_complete(xfer); 3043 return (err); 3044 } 3045 3046 #ifdef EHCI_DEBUG 3047 if (ehcidebug > 5) { 3048 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3049 ehci_dump_sqh(sqh); 3050 ehci_dump_sqtds(data); 3051 } 3052 #endif 3053 3054 /* Set up interrupt info. */ 3055 exfer->sqtdstart = data; 3056 exfer->sqtdend = dataend; 3057 #ifdef DIAGNOSTIC 3058 if (!exfer->isdone) { 3059 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3060 } 3061 exfer->isdone = 0; 3062 #endif 3063 3064 s = splusb(); 3065 ehci_set_qh_qtd(sqh, data); 3066 if (xfer->timeout && !sc->sc_bus.use_polling) { 3067 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3068 ehci_timeout, xfer); 3069 } 3070 ehci_add_intr_list(sc, exfer); 3071 xfer->status = USBD_IN_PROGRESS; 3072 splx(s); 3073 3074 #ifdef EHCI_DEBUG 3075 if (ehcidebug > 10) { 3076 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3077 delay(10000); 3078 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3079 ehci_dump_regs(sc); 3080 printf("sqh:\n"); 3081 ehci_dump_sqh(sqh); 3082 ehci_dump_sqtds(data); 3083 } 3084 #endif 3085 3086 if (sc->sc_bus.use_polling) 3087 ehci_waitintr(sc, xfer); 3088 3089 return (USBD_IN_PROGRESS); 3090 #undef exfer 3091 } 3092 3093 Static void 3094 ehci_device_intr_abort(usbd_xfer_handle xfer) 3095 { 3096 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3097 if (xfer->pipe->intrxfer == xfer) { 3098 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3099 xfer->pipe->intrxfer = NULL; 3100 } 3101 ehci_abort_xfer(xfer, USBD_CANCELLED); 3102 } 3103 3104 Static void 3105 ehci_device_intr_close(usbd_pipe_handle pipe) 3106 { 3107 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3108 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3109 struct ehci_soft_islot *isp; 3110 3111 isp = &sc->sc_islots[epipe->sqh->islot]; 3112 ehci_close_pipe(pipe, isp->sqh); 3113 } 3114 3115 Static void 3116 ehci_device_intr_done(usbd_xfer_handle xfer) 3117 { 3118 #define exfer EXFER(xfer) 3119 struct ehci_xfer *ex = EXFER(xfer); 3120 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3121 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3122 ehci_soft_qtd_t *data, *dataend; 3123 ehci_soft_qh_t *sqh; 3124 usbd_status err; 3125 int len, isread, endpt, s; 3126 3127 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3128 xfer, xfer->actlen)); 3129 3130 if (xfer->pipe->repeat) { 3131 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3132 3133 len = epipe->u.intr.length; 3134 xfer->length = len; 3135 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3136 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3137 sqh = epipe->sqh; 3138 3139 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3140 &data, &dataend); 3141 if (err) { 3142 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3143 xfer->status = err; 3144 return; 3145 } 3146 3147 /* Set up interrupt info. */ 3148 exfer->sqtdstart = data; 3149 exfer->sqtdend = dataend; 3150 #ifdef DIAGNOSTIC 3151 if (!exfer->isdone) { 3152 printf("ehci_device_intr_done: not done, ex=%p\n", 3153 exfer); 3154 } 3155 exfer->isdone = 0; 3156 #endif 3157 3158 s = splusb(); 3159 ehci_set_qh_qtd(sqh, data); 3160 if (xfer->timeout && !sc->sc_bus.use_polling) { 3161 usb_callout(xfer->timeout_handle, 3162 mstohz(xfer->timeout), ehci_timeout, xfer); 3163 } 3164 splx(s); 3165 3166 xfer->status = USBD_IN_PROGRESS; 3167 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3168 ehci_del_intr_list(ex); /* remove from active list */ 3169 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3170 } 3171 #undef exfer 3172 } 3173 3174 /************************/ 3175 3176 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3177 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3178 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3179 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3180 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3181
Indexes created Thu Oct 02 01:09:59 GMT 2025