ehci.c revision 1.92
1 /* $NetBSD: ehci.c,v 1.92 2005/04/27 02:12:20 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.92 2005/04/27 02:12:20 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 usbd_status 316 ehci_init(ehci_softc_t *sc) 317 { 318 u_int32_t version, sparams, cparams, hcr; 319 u_int i; 320 usbd_status err; 321 ehci_soft_qh_t *sqh; 322 u_int ncomp; 323 324 DPRINTF(("ehci_init: start\n")); 325 #ifdef EHCI_DEBUG 326 theehci = sc; 327 #endif 328 329 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 330 331 version = EREAD2(sc, EHCI_HCIVERSION); 332 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 333 version >> 8, version & 0xff); 334 335 sparams = EREAD4(sc, EHCI_HCSPARAMS); 336 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 337 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 338 ncomp = EHCI_HCS_N_CC(sparams); 339 if (ncomp != sc->sc_ncomp) { 340 aprint_error("%s: wrong number of companions (%d != %d)\n", 341 USBDEVNAME(sc->sc_bus.bdev), 342 ncomp, sc->sc_ncomp); 343 #if NOHCI == 0 || NUHCI == 0 344 aprint_error("%s: ohci or uhci probably not configured\n", 345 USBDEVNAME(sc->sc_bus.bdev)); 346 #endif 347 if (ncomp < sc->sc_ncomp) 348 sc->sc_ncomp = ncomp; 349 } 350 if (sc->sc_ncomp > 0) { 351 aprint_normal("%s: companion controller%s, %d port%s each:", 352 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 353 EHCI_HCS_N_PCC(sparams), 354 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 355 for (i = 0; i < sc->sc_ncomp; i++) 356 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 357 aprint_normal("\n"); 358 } 359 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 360 cparams = EREAD4(sc, EHCI_HCCPARAMS); 361 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 362 363 if (EHCI_HCC_64BIT(cparams)) { 364 /* MUST clear segment register if 64 bit capable. */ 365 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 366 } 367 368 sc->sc_bus.usbrev = USBREV_2_0; 369 370 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 371 USB_MEM_RESERVE); 372 373 /* Reset the controller */ 374 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 375 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 376 usb_delay_ms(&sc->sc_bus, 1); 377 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 378 for (i = 0; i < 100; i++) { 379 usb_delay_ms(&sc->sc_bus, 1); 380 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 381 if (!hcr) 382 break; 383 } 384 if (hcr) { 385 aprint_error("%s: reset timeout\n", 386 USBDEVNAME(sc->sc_bus.bdev)); 387 return (USBD_IOERROR); 388 } 389 390 /* XXX need proper intr scheduling */ 391 sc->sc_rand = 96; 392 393 /* frame list size at default, read back what we got and use that */ 394 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 395 case 0: sc->sc_flsize = 1024; break; 396 case 1: sc->sc_flsize = 512; break; 397 case 2: sc->sc_flsize = 256; break; 398 case 3: return (USBD_IOERROR); 399 } 400 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 401 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 402 if (err) 403 return (err); 404 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 405 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 406 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 407 408 /* Set up the bus struct. */ 409 sc->sc_bus.methods = &ehci_bus_methods; 410 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 411 412 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 413 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 414 415 sc->sc_eintrs = EHCI_NORMAL_INTRS; 416 417 /* 418 * Allocate the interrupt dummy QHs. These are arranged to give poll 419 * intervals that are powers of 2 times 1ms. 420 */ 421 for (i = 0; i < EHCI_INTRQHS; i++) { 422 sqh = ehci_alloc_sqh(sc); 423 if (sqh == NULL) { 424 err = USBD_NOMEM; 425 goto bad1; 426 } 427 sc->sc_islots[i].sqh = sqh; 428 } 429 for (i = 0; i < EHCI_INTRQHS; i++) { 430 sqh = sc->sc_islots[i].sqh; 431 if (i == 0) { 432 /* The last (1ms) QH terminates. */ 433 sqh->qh.qh_link = EHCI_NULL; 434 sqh->next = NULL; 435 } else { 436 /* Otherwise the next QH has half the poll interval */ 437 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 438 sqh->qh.qh_link = htole32(sqh->next->physaddr | 439 EHCI_LINK_QH); 440 } 441 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 442 sqh->qh.qh_curqtd = EHCI_NULL; 443 sqh->next = NULL; 444 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 445 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 446 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 447 sqh->sqtd = NULL; 448 } 449 /* Point the frame list at the last level (128ms). */ 450 for (i = 0; i < sc->sc_flsize; i++) { 451 sc->sc_flist[i] = htole32(EHCI_LINK_QH | 452 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 453 i)].sqh->physaddr); 454 } 455 456 /* Allocate dummy QH that starts the async list. */ 457 sqh = ehci_alloc_sqh(sc); 458 if (sqh == NULL) { 459 err = USBD_NOMEM; 460 goto bad1; 461 } 462 /* Fill the QH */ 463 sqh->qh.qh_endp = 464 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 465 sqh->qh.qh_link = 466 htole32(sqh->physaddr | EHCI_LINK_QH); 467 sqh->qh.qh_curqtd = EHCI_NULL; 468 sqh->next = NULL; 469 /* Fill the overlay qTD */ 470 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 471 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 472 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 473 sqh->sqtd = NULL; 474 #ifdef EHCI_DEBUG 475 if (ehcidebug) { 476 ehci_dump_sqh(sqh); 477 } 478 #endif 479 480 /* Point to async list */ 481 sc->sc_async_head = sqh; 482 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 483 484 usb_callout_init(sc->sc_tmo_pcd); 485 486 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 487 488 /* Enable interrupts */ 489 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 490 491 /* Turn on controller */ 492 EOWRITE4(sc, EHCI_USBCMD, 493 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 494 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 495 EHCI_CMD_ASE | 496 EHCI_CMD_PSE | 497 EHCI_CMD_RS); 498 499 /* Take over port ownership */ 500 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 501 502 for (i = 0; i < 100; i++) { 503 usb_delay_ms(&sc->sc_bus, 1); 504 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 505 if (!hcr) 506 break; 507 } 508 if (hcr) { 509 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 510 return (USBD_IOERROR); 511 } 512 513 return (USBD_NORMAL_COMPLETION); 514 515 #if 0 516 bad2: 517 ehci_free_sqh(sc, sc->sc_async_head); 518 #endif 519 bad1: 520 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 521 return (err); 522 } 523 524 int 525 ehci_intr(void *v) 526 { 527 ehci_softc_t *sc = v; 528 529 if (sc == NULL || sc->sc_dying) 530 return (0); 531 532 /* If we get an interrupt while polling, then just ignore it. */ 533 if (sc->sc_bus.use_polling) { 534 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 535 536 if (intrs) 537 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 538 #ifdef DIAGNOSTIC 539 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 540 #endif 541 return (0); 542 } 543 544 return (ehci_intr1(sc)); 545 } 546 547 Static int 548 ehci_intr1(ehci_softc_t *sc) 549 { 550 u_int32_t intrs, eintrs; 551 552 DPRINTFN(20,("ehci_intr1: enter\n")); 553 554 /* In case the interrupt occurs before initialization has completed. */ 555 if (sc == NULL) { 556 #ifdef DIAGNOSTIC 557 printf("ehci_intr1: sc == NULL\n"); 558 #endif 559 return (0); 560 } 561 562 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 563 if (!intrs) 564 return (0); 565 566 eintrs = intrs & sc->sc_eintrs; 567 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 568 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 569 (u_int)eintrs)); 570 if (!eintrs) 571 return (0); 572 573 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 574 sc->sc_bus.intr_context++; 575 sc->sc_bus.no_intrs++; 576 if (eintrs & EHCI_STS_IAA) { 577 DPRINTF(("ehci_intr1: door bell\n")); 578 wakeup(&sc->sc_async_head); 579 eintrs &= ~EHCI_STS_IAA; 580 } 581 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 582 DPRINTFN(5,("ehci_intr1: %s %s\n", 583 eintrs & EHCI_STS_INT ? "INT" : "", 584 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 585 usb_schedsoftintr(&sc->sc_bus); 586 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 587 } 588 if (eintrs & EHCI_STS_HSE) { 589 printf("%s: unrecoverable error, controller halted\n", 590 USBDEVNAME(sc->sc_bus.bdev)); 591 /* XXX what else */ 592 } 593 if (eintrs & EHCI_STS_PCD) { 594 ehci_pcd(sc, sc->sc_intrxfer); 595 /* 596 * Disable PCD interrupt for now, because it will be 597 * on until the port has been reset. 598 */ 599 ehci_pcd_able(sc, 0); 600 /* Do not allow RHSC interrupts > 1 per second */ 601 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 602 eintrs &= ~EHCI_STS_PCD; 603 } 604 605 sc->sc_bus.intr_context--; 606 607 if (eintrs != 0) { 608 /* Block unprocessed interrupts. */ 609 sc->sc_eintrs &= ~eintrs; 610 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 611 printf("%s: blocking intrs 0x%x\n", 612 USBDEVNAME(sc->sc_bus.bdev), eintrs); 613 } 614 615 return (1); 616 } 617 618 void 619 ehci_pcd_able(ehci_softc_t *sc, int on) 620 { 621 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 622 if (on) 623 sc->sc_eintrs |= EHCI_STS_PCD; 624 else 625 sc->sc_eintrs &= ~EHCI_STS_PCD; 626 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 627 } 628 629 void 630 ehci_pcd_enable(void *v_sc) 631 { 632 ehci_softc_t *sc = v_sc; 633 634 ehci_pcd_able(sc, 1); 635 } 636 637 void 638 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 639 { 640 usbd_pipe_handle pipe; 641 u_char *p; 642 int i, m; 643 644 if (xfer == NULL) { 645 /* Just ignore the change. */ 646 return; 647 } 648 649 pipe = xfer->pipe; 650 651 p = KERNADDR(&xfer->dmabuf, 0); 652 m = min(sc->sc_noport, xfer->length * 8 - 1); 653 memset(p, 0, xfer->length); 654 for (i = 1; i <= m; i++) { 655 /* Pick out CHANGE bits from the status reg. */ 656 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 657 p[i/8] |= 1 << (i%8); 658 } 659 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 660 xfer->actlen = xfer->length; 661 xfer->status = USBD_NORMAL_COMPLETION; 662 663 usb_transfer_complete(xfer); 664 } 665 666 void 667 ehci_softintr(void *v) 668 { 669 ehci_softc_t *sc = v; 670 struct ehci_xfer *ex, *nextex; 671 672 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 673 sc->sc_bus.intr_context)); 674 675 sc->sc_bus.intr_context++; 676 677 /* 678 * The only explanation I can think of for why EHCI is as brain dead 679 * as UHCI interrupt-wise is that Intel was involved in both. 680 * An interrupt just tells us that something is done, we have no 681 * clue what, so we need to scan through all active transfers. :-( 682 */ 683 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 684 nextex = LIST_NEXT(ex, inext); 685 ehci_check_intr(sc, ex); 686 } 687 688 #ifdef USB_USE_SOFTINTR 689 if (sc->sc_softwake) { 690 sc->sc_softwake = 0; 691 wakeup(&sc->sc_softwake); 692 } 693 #endif /* USB_USE_SOFTINTR */ 694 695 sc->sc_bus.intr_context--; 696 } 697 698 /* Check for an interrupt. */ 699 void 700 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 701 { 702 ehci_soft_qtd_t *sqtd, *lsqtd; 703 u_int32_t status; 704 705 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 706 707 if (ex->sqtdstart == NULL) { 708 printf("ehci_check_intr: sqtdstart=NULL\n"); 709 return; 710 } 711 lsqtd = ex->sqtdend; 712 #ifdef DIAGNOSTIC 713 if (lsqtd == NULL) { 714 printf("ehci_check_intr: lsqtd==0\n"); 715 return; 716 } 717 #endif 718 /* 719 * If the last TD is still active we need to check whether there 720 * is a an error somewhere in the middle, or whether there was a 721 * short packet (SPD and not ACTIVE). 722 */ 723 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 724 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 725 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 726 status = le32toh(sqtd->qtd.qtd_status); 727 /* If there's an active QTD the xfer isn't done. */ 728 if (status & EHCI_QTD_ACTIVE) 729 break; 730 /* Any kind of error makes the xfer done. */ 731 if (status & EHCI_QTD_HALTED) 732 goto done; 733 /* We want short packets, and it is short: it's done */ 734 if (EHCI_QTD_GET_BYTES(status) != 0) 735 goto done; 736 } 737 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 738 ex, ex->sqtdstart)); 739 return; 740 } 741 done: 742 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 743 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 744 ehci_idone(ex); 745 } 746 747 void 748 ehci_idone(struct ehci_xfer *ex) 749 { 750 usbd_xfer_handle xfer = &ex->xfer; 751 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 752 ehci_soft_qtd_t *sqtd, *lsqtd; 753 u_int32_t status = 0, nstatus = 0; 754 int actlen; 755 uint pkts_left; 756 757 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 758 #ifdef DIAGNOSTIC 759 { 760 int s = splhigh(); 761 if (ex->isdone) { 762 splx(s); 763 #ifdef EHCI_DEBUG 764 printf("ehci_idone: ex is done!\n "); 765 ehci_dump_exfer(ex); 766 #else 767 printf("ehci_idone: ex=%p is done!\n", ex); 768 #endif 769 return; 770 } 771 ex->isdone = 1; 772 splx(s); 773 } 774 #endif 775 776 if (xfer->status == USBD_CANCELLED || 777 xfer->status == USBD_TIMEOUT) { 778 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 779 return; 780 } 781 782 #ifdef EHCI_DEBUG 783 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 784 if (ehcidebug > 10) 785 ehci_dump_sqtds(ex->sqtdstart); 786 #endif 787 788 /* The transfer is done, compute actual length and status. */ 789 lsqtd = ex->sqtdend; 790 actlen = 0; 791 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 792 nstatus = le32toh(sqtd->qtd.qtd_status); 793 if (nstatus & EHCI_QTD_ACTIVE) 794 break; 795 796 status = nstatus; 797 /* halt is ok if descriptor is last, and complete */ 798 if (sqtd->qtd.qtd_next == EHCI_NULL && 799 EHCI_QTD_GET_BYTES(status) == 0) 800 status &= ~EHCI_QTD_HALTED; 801 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 802 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 803 } 804 805 /* 806 * If there are left over TDs we need to update the toggle. 807 * The default pipe doesn't need it since control transfers 808 * start the toggle at 0 every time. 809 */ 810 if (sqtd != lsqtd->nextqtd && 811 xfer->pipe->device->default_pipe != xfer->pipe) { 812 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 813 #if 0 814 ehci_dump_sqh(epipe->sqh); 815 ehci_dump_sqtds(ex->sqtdstart); 816 #endif 817 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 818 } 819 820 /* 821 * For a short transfer we need to update the toggle for the missing 822 * packets within the qTD. 823 */ 824 pkts_left = EHCI_QTD_GET_BYTES(status) / 825 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 826 epipe->nexttoggle ^= pkts_left % 2; 827 828 status &= EHCI_QTD_STATERRS; 829 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 830 xfer->length, actlen, status)); 831 xfer->actlen = actlen; 832 if (status != 0) { 833 #ifdef EHCI_DEBUG 834 char sbuf[128]; 835 836 bitmask_snprintf((u_int32_t)status, 837 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 838 "\3MISSED", sbuf, sizeof(sbuf)); 839 840 DPRINTFN((status == EHCI_QTD_HALTED) ? 2 : 0, 841 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 842 "status 0x%s\n", 843 xfer->pipe->device->address, 844 xfer->pipe->endpoint->edesc->bEndpointAddress, 845 sbuf)); 846 if (ehcidebug > 2) { 847 ehci_dump_sqh(epipe->sqh); 848 ehci_dump_sqtds(ex->sqtdstart); 849 } 850 #endif 851 if (status == EHCI_QTD_HALTED) 852 xfer->status = USBD_STALLED; 853 else 854 xfer->status = USBD_IOERROR; /* more info XXX */ 855 } else { 856 xfer->status = USBD_NORMAL_COMPLETION; 857 } 858 859 usb_transfer_complete(xfer); 860 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 861 } 862 863 /* 864 * Wait here until controller claims to have an interrupt. 865 * Then call ehci_intr and return. Use timeout to avoid waiting 866 * too long. 867 */ 868 void 869 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 870 { 871 int timo = xfer->timeout; 872 int usecs; 873 u_int32_t intrs; 874 875 xfer->status = USBD_IN_PROGRESS; 876 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 877 usb_delay_ms(&sc->sc_bus, 1); 878 if (sc->sc_dying) 879 break; 880 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 881 sc->sc_eintrs; 882 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 883 #ifdef EHCI_DEBUG 884 if (ehcidebug > 15) 885 ehci_dump_regs(sc); 886 #endif 887 if (intrs) { 888 ehci_intr1(sc); 889 if (xfer->status != USBD_IN_PROGRESS) 890 return; 891 } 892 } 893 894 /* Timeout */ 895 DPRINTF(("ehci_waitintr: timeout\n")); 896 xfer->status = USBD_TIMEOUT; 897 usb_transfer_complete(xfer); 898 /* XXX should free TD */ 899 } 900 901 void 902 ehci_poll(struct usbd_bus *bus) 903 { 904 ehci_softc_t *sc = (ehci_softc_t *)bus; 905 #ifdef EHCI_DEBUG 906 static int last; 907 int new; 908 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 909 if (new != last) { 910 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 911 last = new; 912 } 913 #endif 914 915 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 916 ehci_intr1(sc); 917 } 918 919 int 920 ehci_detach(struct ehci_softc *sc, int flags) 921 { 922 int rv = 0; 923 924 if (sc->sc_child != NULL) 925 rv = config_detach(sc->sc_child, flags); 926 927 if (rv != 0) 928 return (rv); 929 930 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 931 932 if (sc->sc_powerhook != NULL) 933 powerhook_disestablish(sc->sc_powerhook); 934 if (sc->sc_shutdownhook != NULL) 935 shutdownhook_disestablish(sc->sc_shutdownhook); 936 937 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 938 939 /* XXX free other data structures XXX */ 940 941 return (rv); 942 } 943 944 945 int 946 ehci_activate(device_ptr_t self, enum devact act) 947 { 948 struct ehci_softc *sc = (struct ehci_softc *)self; 949 int rv = 0; 950 951 switch (act) { 952 case DVACT_ACTIVATE: 953 return (EOPNOTSUPP); 954 955 case DVACT_DEACTIVATE: 956 if (sc->sc_child != NULL) 957 rv = config_deactivate(sc->sc_child); 958 sc->sc_dying = 1; 959 break; 960 } 961 return (rv); 962 } 963 964 /* 965 * Handle suspend/resume. 966 * 967 * We need to switch to polling mode here, because this routine is 968 * called from an interrupt context. This is all right since we 969 * are almost suspended anyway. 970 */ 971 void 972 ehci_power(int why, void *v) 973 { 974 ehci_softc_t *sc = v; 975 u_int32_t cmd, hcr; 976 int s, i; 977 978 #ifdef EHCI_DEBUG 979 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 980 if (ehcidebug > 0) 981 ehci_dump_regs(sc); 982 #endif 983 984 s = splhardusb(); 985 switch (why) { 986 case PWR_SUSPEND: 987 case PWR_STANDBY: 988 sc->sc_bus.use_polling++; 989 990 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 991 992 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 993 EOWRITE4(sc, EHCI_USBCMD, cmd); 994 995 for (i = 0; i < 100; i++) { 996 hcr = EOREAD4(sc, EHCI_USBSTS) & 997 (EHCI_STS_ASS | EHCI_STS_PSS); 998 if (hcr == 0) 999 break; 1000 1001 usb_delay_ms(&sc->sc_bus, 1); 1002 } 1003 if (hcr != 0) { 1004 printf("%s: reset timeout\n", 1005 USBDEVNAME(sc->sc_bus.bdev)); 1006 } 1007 1008 cmd &= ~EHCI_CMD_RS; 1009 EOWRITE4(sc, EHCI_USBCMD, cmd); 1010 1011 for (i = 0; i < 100; i++) { 1012 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1013 if (hcr == EHCI_STS_HCH) 1014 break; 1015 1016 usb_delay_ms(&sc->sc_bus, 1); 1017 } 1018 if (hcr != EHCI_STS_HCH) { 1019 printf("%s: config timeout\n", 1020 USBDEVNAME(sc->sc_bus.bdev)); 1021 } 1022 1023 sc->sc_bus.use_polling--; 1024 break; 1025 1026 case PWR_RESUME: 1027 sc->sc_bus.use_polling++; 1028 1029 /* restore things in case the bios sucks */ 1030 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1031 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1032 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1033 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1034 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1035 1036 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1037 1038 for (i = 0; i < 100; i++) { 1039 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1040 if (hcr != EHCI_STS_HCH) 1041 break; 1042 1043 usb_delay_ms(&sc->sc_bus, 1); 1044 } 1045 if (hcr == EHCI_STS_HCH) { 1046 printf("%s: config timeout\n", 1047 USBDEVNAME(sc->sc_bus.bdev)); 1048 } 1049 1050 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1051 1052 sc->sc_bus.use_polling--; 1053 break; 1054 case PWR_SOFTSUSPEND: 1055 case PWR_SOFTSTANDBY: 1056 case PWR_SOFTRESUME: 1057 break; 1058 } 1059 splx(s); 1060 1061 #ifdef EHCI_DEBUG 1062 DPRINTF(("ehci_power: sc=%p\n", sc)); 1063 if (ehcidebug > 0) 1064 ehci_dump_regs(sc); 1065 #endif 1066 } 1067 1068 /* 1069 * Shut down the controller when the system is going down. 1070 */ 1071 void 1072 ehci_shutdown(void *v) 1073 { 1074 ehci_softc_t *sc = v; 1075 1076 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1077 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1078 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1079 } 1080 1081 usbd_status 1082 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1083 { 1084 struct ehci_softc *sc = (struct ehci_softc *)bus; 1085 usbd_status err; 1086 1087 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1088 if (err == USBD_NOMEM) 1089 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1090 #ifdef EHCI_DEBUG 1091 if (err) 1092 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1093 #endif 1094 return (err); 1095 } 1096 1097 void 1098 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1099 { 1100 struct ehci_softc *sc = (struct ehci_softc *)bus; 1101 1102 if (dma->block->flags & USB_DMA_RESERVE) { 1103 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1104 dma); 1105 return; 1106 } 1107 usb_freemem(&sc->sc_bus, dma); 1108 } 1109 1110 usbd_xfer_handle 1111 ehci_allocx(struct usbd_bus *bus) 1112 { 1113 struct ehci_softc *sc = (struct ehci_softc *)bus; 1114 usbd_xfer_handle xfer; 1115 1116 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1117 if (xfer != NULL) { 1118 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1119 #ifdef DIAGNOSTIC 1120 if (xfer->busy_free != XFER_FREE) { 1121 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1122 xfer->busy_free); 1123 } 1124 #endif 1125 } else { 1126 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1127 } 1128 if (xfer != NULL) { 1129 memset(xfer, 0, sizeof(struct ehci_xfer)); 1130 #ifdef DIAGNOSTIC 1131 EXFER(xfer)->isdone = 1; 1132 xfer->busy_free = XFER_BUSY; 1133 #endif 1134 } 1135 return (xfer); 1136 } 1137 1138 void 1139 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1140 { 1141 struct ehci_softc *sc = (struct ehci_softc *)bus; 1142 1143 #ifdef DIAGNOSTIC 1144 if (xfer->busy_free != XFER_BUSY) { 1145 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1146 xfer->busy_free); 1147 return; 1148 } 1149 xfer->busy_free = XFER_FREE; 1150 if (!EXFER(xfer)->isdone) { 1151 printf("ehci_freex: !isdone\n"); 1152 return; 1153 } 1154 #endif 1155 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1156 } 1157 1158 Static void 1159 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1160 { 1161 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1162 1163 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1164 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1165 #ifdef USB_DEBUG 1166 if (ehcidebug) 1167 usbd_dump_pipe(pipe); 1168 #endif 1169 epipe->nexttoggle = 0; 1170 } 1171 1172 Static void 1173 ehci_noop(usbd_pipe_handle pipe) 1174 { 1175 } 1176 1177 #ifdef EHCI_DEBUG 1178 void 1179 ehci_dump_regs(ehci_softc_t *sc) 1180 { 1181 int i; 1182 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1183 EOREAD4(sc, EHCI_USBCMD), 1184 EOREAD4(sc, EHCI_USBSTS), 1185 EOREAD4(sc, EHCI_USBINTR)); 1186 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1187 EOREAD4(sc, EHCI_FRINDEX), 1188 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1189 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1190 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1191 for (i = 1; i <= sc->sc_noport; i++) 1192 printf("port %d status=0x%08x\n", i, 1193 EOREAD4(sc, EHCI_PORTSC(i))); 1194 } 1195 1196 /* 1197 * Unused function - this is meant to be called from a kernel 1198 * debugger. 1199 */ 1200 void 1201 ehci_dump() 1202 { 1203 ehci_dump_regs(theehci); 1204 } 1205 1206 void 1207 ehci_dump_link(ehci_link_t link, int type) 1208 { 1209 link = le32toh(link); 1210 printf("0x%08x", link); 1211 if (link & EHCI_LINK_TERMINATE) 1212 printf("<T>"); 1213 else { 1214 printf("<"); 1215 if (type) { 1216 switch (EHCI_LINK_TYPE(link)) { 1217 case EHCI_LINK_ITD: printf("ITD"); break; 1218 case EHCI_LINK_QH: printf("QH"); break; 1219 case EHCI_LINK_SITD: printf("SITD"); break; 1220 case EHCI_LINK_FSTN: printf("FSTN"); break; 1221 } 1222 } 1223 printf(">"); 1224 } 1225 } 1226 1227 void 1228 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1229 { 1230 int i; 1231 u_int32_t stop; 1232 1233 stop = 0; 1234 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1235 ehci_dump_sqtd(sqtd); 1236 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1237 } 1238 if (sqtd) 1239 printf("dump aborted, too many TDs\n"); 1240 } 1241 1242 void 1243 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1244 { 1245 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1246 ehci_dump_qtd(&sqtd->qtd); 1247 } 1248 1249 void 1250 ehci_dump_qtd(ehci_qtd_t *qtd) 1251 { 1252 u_int32_t s; 1253 char sbuf[128]; 1254 1255 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1256 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1257 printf("\n"); 1258 s = le32toh(qtd->qtd_status); 1259 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1260 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1261 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1262 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1263 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1264 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1265 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1266 EHCI_QTD_GET_PID(s), sbuf); 1267 for (s = 0; s < 5; s++) 1268 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1269 } 1270 1271 void 1272 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1273 { 1274 ehci_qh_t *qh = &sqh->qh; 1275 u_int32_t endp, endphub; 1276 1277 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1278 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1279 endp = le32toh(qh->qh_endp); 1280 printf(" endp=0x%08x\n", endp); 1281 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1282 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1283 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1284 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1285 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1286 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1287 EHCI_QH_GET_NRL(endp)); 1288 endphub = le32toh(qh->qh_endphub); 1289 printf(" endphub=0x%08x\n", endphub); 1290 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1291 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1292 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1293 EHCI_QH_GET_MULT(endphub)); 1294 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1295 printf("Overlay qTD:\n"); 1296 ehci_dump_qtd(&qh->qh_qtd); 1297 } 1298 1299 #ifdef DIAGNOSTIC 1300 Static void 1301 ehci_dump_exfer(struct ehci_xfer *ex) 1302 { 1303 printf("ehci_dump_exfer: ex=%p\n", ex); 1304 } 1305 #endif 1306 #endif 1307 1308 usbd_status 1309 ehci_open(usbd_pipe_handle pipe) 1310 { 1311 usbd_device_handle dev = pipe->device; 1312 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1313 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1314 u_int8_t addr = dev->address; 1315 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1316 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1317 ehci_soft_qh_t *sqh; 1318 usbd_status err; 1319 int s; 1320 int ival, speed, naks; 1321 int hshubaddr, hshubport; 1322 1323 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1324 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1325 1326 if (dev->myhsport) { 1327 hshubaddr = dev->myhsport->parent->address; 1328 hshubport = dev->myhsport->portno; 1329 } else { 1330 hshubaddr = 0; 1331 hshubport = 0; 1332 } 1333 1334 if (sc->sc_dying) 1335 return (USBD_IOERROR); 1336 1337 epipe->nexttoggle = 0; 1338 1339 if (addr == sc->sc_addr) { 1340 switch (ed->bEndpointAddress) { 1341 case USB_CONTROL_ENDPOINT: 1342 pipe->methods = &ehci_root_ctrl_methods; 1343 break; 1344 case UE_DIR_IN | EHCI_INTR_ENDPT: 1345 pipe->methods = &ehci_root_intr_methods; 1346 break; 1347 default: 1348 return (USBD_INVAL); 1349 } 1350 return (USBD_NORMAL_COMPLETION); 1351 } 1352 1353 /* XXX All this stuff is only valid for async. */ 1354 switch (dev->speed) { 1355 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1356 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1357 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1358 default: panic("ehci_open: bad device speed %d", dev->speed); 1359 } 1360 if (speed != EHCI_QH_SPEED_HIGH) { 1361 printf("%s: *** WARNING: opening low/full speed device, this " 1362 "does not work yet.\n", 1363 USBDEVNAME(sc->sc_bus.bdev)); 1364 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1365 hshubaddr, hshubport)); 1366 if (xfertype != UE_CONTROL) 1367 return USBD_INVAL; 1368 } 1369 1370 naks = 8; /* XXX */ 1371 sqh = ehci_alloc_sqh(sc); 1372 if (sqh == NULL) 1373 goto bad0; 1374 /* qh_link filled when the QH is added */ 1375 sqh->qh.qh_endp = htole32( 1376 EHCI_QH_SET_ADDR(addr) | 1377 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1378 EHCI_QH_SET_EPS(speed) | 1379 EHCI_QH_DTC | 1380 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1381 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1382 EHCI_QH_CTL : 0) | 1383 EHCI_QH_SET_NRL(naks) 1384 ); 1385 sqh->qh.qh_endphub = htole32( 1386 EHCI_QH_SET_MULT(1) | 1387 EHCI_QH_SET_HUBA(hshubaddr) | 1388 EHCI_QH_SET_PORT(hshubport) | 1389 EHCI_QH_SET_CMASK(0xf0) | /* XXX */ 1390 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0) 1391 ); 1392 sqh->qh.qh_curqtd = EHCI_NULL; 1393 /* Fill the overlay qTD */ 1394 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1395 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1396 sqh->qh.qh_qtd.qtd_status = htole32(0); 1397 1398 epipe->sqh = sqh; 1399 1400 switch (xfertype) { 1401 case UE_CONTROL: 1402 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1403 0, &epipe->u.ctl.reqdma); 1404 #ifdef EHCI_DEBUG 1405 if (err) 1406 printf("ehci_open: usb_allocmem()=%d\n", err); 1407 #endif 1408 if (err) 1409 goto bad1; 1410 pipe->methods = &ehci_device_ctrl_methods; 1411 s = splusb(); 1412 ehci_add_qh(sqh, sc->sc_async_head); 1413 splx(s); 1414 break; 1415 case UE_BULK: 1416 pipe->methods = &ehci_device_bulk_methods; 1417 s = splusb(); 1418 ehci_add_qh(sqh, sc->sc_async_head); 1419 splx(s); 1420 break; 1421 case UE_INTERRUPT: 1422 pipe->methods = &ehci_device_intr_methods; 1423 ival = pipe->interval; 1424 if (ival == USBD_DEFAULT_INTERVAL) 1425 ival = ed->bInterval; 1426 return (ehci_device_setintr(sc, sqh, ival)); 1427 case UE_ISOCHRONOUS: 1428 pipe->methods = &ehci_device_isoc_methods; 1429 return (USBD_INVAL); 1430 default: 1431 return (USBD_INVAL); 1432 } 1433 return (USBD_NORMAL_COMPLETION); 1434 1435 bad1: 1436 ehci_free_sqh(sc, sqh); 1437 bad0: 1438 return (USBD_NOMEM); 1439 } 1440 1441 /* 1442 * Add an ED to the schedule. Called at splusb(). 1443 */ 1444 void 1445 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1446 { 1447 SPLUSBCHECK; 1448 1449 sqh->next = head->next; 1450 sqh->qh.qh_link = head->qh.qh_link; 1451 head->next = sqh; 1452 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1453 1454 #ifdef EHCI_DEBUG 1455 if (ehcidebug > 5) { 1456 printf("ehci_add_qh:\n"); 1457 ehci_dump_sqh(sqh); 1458 } 1459 #endif 1460 } 1461 1462 /* 1463 * Remove an ED from the schedule. Called at splusb(). 1464 */ 1465 void 1466 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1467 { 1468 ehci_soft_qh_t *p; 1469 1470 SPLUSBCHECK; 1471 /* XXX */ 1472 for (p = head; p != NULL && p->next != sqh; p = p->next) 1473 ; 1474 if (p == NULL) 1475 panic("ehci_rem_qh: ED not found"); 1476 p->next = sqh->next; 1477 p->qh.qh_link = sqh->qh.qh_link; 1478 1479 ehci_sync_hc(sc); 1480 } 1481 1482 void 1483 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1484 { 1485 int i; 1486 u_int32_t status; 1487 1488 /* Save toggle bit and ping status. */ 1489 status = sqh->qh.qh_qtd.qtd_status & 1490 htole32(EHCI_QTD_TOGGLE_MASK | 1491 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1492 /* Set HALTED to make hw leave it alone. */ 1493 sqh->qh.qh_qtd.qtd_status = 1494 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1495 sqh->qh.qh_curqtd = 0; 1496 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1497 sqh->qh.qh_qtd.qtd_altnext = 0; 1498 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1499 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1500 sqh->sqtd = sqtd; 1501 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1502 sqh->qh.qh_qtd.qtd_status = status; 1503 } 1504 1505 /* 1506 * Ensure that the HC has released all references to the QH. We do this 1507 * by asking for a Async Advance Doorbell interrupt and then we wait for 1508 * the interrupt. 1509 * To make this easier we first obtain exclusive use of the doorbell. 1510 */ 1511 void 1512 ehci_sync_hc(ehci_softc_t *sc) 1513 { 1514 int s, error; 1515 1516 if (sc->sc_dying) { 1517 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1518 return; 1519 } 1520 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1521 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1522 s = splhardusb(); 1523 /* ask for doorbell */ 1524 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1525 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1526 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1527 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1528 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1529 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1530 splx(s); 1531 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1532 #ifdef DIAGNOSTIC 1533 if (error) 1534 printf("ehci_sync_hc: tsleep() = %d\n", error); 1535 #endif 1536 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1537 } 1538 1539 /***********/ 1540 1541 /* 1542 * Data structures and routines to emulate the root hub. 1543 */ 1544 Static usb_device_descriptor_t ehci_devd = { 1545 USB_DEVICE_DESCRIPTOR_SIZE, 1546 UDESC_DEVICE, /* type */ 1547 {0x00, 0x02}, /* USB version */ 1548 UDCLASS_HUB, /* class */ 1549 UDSUBCLASS_HUB, /* subclass */ 1550 UDPROTO_HSHUBSTT, /* protocol */ 1551 64, /* max packet */ 1552 {0},{0},{0x00,0x01}, /* device id */ 1553 1,2,0, /* string indicies */ 1554 1 /* # of configurations */ 1555 }; 1556 1557 Static usb_device_qualifier_t ehci_odevd = { 1558 USB_DEVICE_DESCRIPTOR_SIZE, 1559 UDESC_DEVICE_QUALIFIER, /* type */ 1560 {0x00, 0x02}, /* USB version */ 1561 UDCLASS_HUB, /* class */ 1562 UDSUBCLASS_HUB, /* subclass */ 1563 UDPROTO_FSHUB, /* protocol */ 1564 64, /* max packet */ 1565 1, /* # of configurations */ 1566 0 1567 }; 1568 1569 Static usb_config_descriptor_t ehci_confd = { 1570 USB_CONFIG_DESCRIPTOR_SIZE, 1571 UDESC_CONFIG, 1572 {USB_CONFIG_DESCRIPTOR_SIZE + 1573 USB_INTERFACE_DESCRIPTOR_SIZE + 1574 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1575 1, 1576 1, 1577 0, 1578 UC_SELF_POWERED, 1579 0 /* max power */ 1580 }; 1581 1582 Static usb_interface_descriptor_t ehci_ifcd = { 1583 USB_INTERFACE_DESCRIPTOR_SIZE, 1584 UDESC_INTERFACE, 1585 0, 1586 0, 1587 1, 1588 UICLASS_HUB, 1589 UISUBCLASS_HUB, 1590 UIPROTO_HSHUBSTT, 1591 0 1592 }; 1593 1594 Static usb_endpoint_descriptor_t ehci_endpd = { 1595 USB_ENDPOINT_DESCRIPTOR_SIZE, 1596 UDESC_ENDPOINT, 1597 UE_DIR_IN | EHCI_INTR_ENDPT, 1598 UE_INTERRUPT, 1599 {8, 0}, /* max packet */ 1600 255 1601 }; 1602 1603 Static usb_hub_descriptor_t ehci_hubd = { 1604 USB_HUB_DESCRIPTOR_SIZE, 1605 UDESC_HUB, 1606 0, 1607 {0,0}, 1608 0, 1609 0, 1610 {0}, 1611 }; 1612 1613 Static int 1614 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1615 { 1616 int i; 1617 1618 if (l == 0) 1619 return (0); 1620 p->bLength = 2 * strlen(s) + 2; 1621 if (l == 1) 1622 return (1); 1623 p->bDescriptorType = UDESC_STRING; 1624 l -= 2; 1625 for (i = 0; s[i] && l > 1; i++, l -= 2) 1626 USETW2(p->bString[i], 0, s[i]); 1627 return (2*i+2); 1628 } 1629 1630 /* 1631 * Simulate a hardware hub by handling all the necessary requests. 1632 */ 1633 Static usbd_status 1634 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1635 { 1636 usbd_status err; 1637 1638 /* Insert last in queue. */ 1639 err = usb_insert_transfer(xfer); 1640 if (err) 1641 return (err); 1642 1643 /* Pipe isn't running, start first */ 1644 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1645 } 1646 1647 Static usbd_status 1648 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1649 { 1650 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1651 usb_device_request_t *req; 1652 void *buf = NULL; 1653 int port, i; 1654 int s, len, value, index, l, totlen = 0; 1655 usb_port_status_t ps; 1656 usb_hub_descriptor_t hubd; 1657 usbd_status err; 1658 u_int32_t v; 1659 1660 if (sc->sc_dying) 1661 return (USBD_IOERROR); 1662 1663 #ifdef DIAGNOSTIC 1664 if (!(xfer->rqflags & URQ_REQUEST)) 1665 /* XXX panic */ 1666 return (USBD_INVAL); 1667 #endif 1668 req = &xfer->request; 1669 1670 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1671 req->bmRequestType, req->bRequest)); 1672 1673 len = UGETW(req->wLength); 1674 value = UGETW(req->wValue); 1675 index = UGETW(req->wIndex); 1676 1677 if (len != 0) 1678 buf = KERNADDR(&xfer->dmabuf, 0); 1679 1680 #define C(x,y) ((x) | ((y) << 8)) 1681 switch(C(req->bRequest, req->bmRequestType)) { 1682 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1683 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1684 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1685 /* 1686 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1687 * for the integrated root hub. 1688 */ 1689 break; 1690 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1691 if (len > 0) { 1692 *(u_int8_t *)buf = sc->sc_conf; 1693 totlen = 1; 1694 } 1695 break; 1696 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1697 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1698 switch(value >> 8) { 1699 case UDESC_DEVICE: 1700 if ((value & 0xff) != 0) { 1701 err = USBD_IOERROR; 1702 goto ret; 1703 } 1704 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1705 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1706 memcpy(buf, &ehci_devd, l); 1707 break; 1708 /* 1709 * We can't really operate at another speed, but the spec says 1710 * we need this descriptor. 1711 */ 1712 case UDESC_DEVICE_QUALIFIER: 1713 if ((value & 0xff) != 0) { 1714 err = USBD_IOERROR; 1715 goto ret; 1716 } 1717 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1718 memcpy(buf, &ehci_odevd, l); 1719 break; 1720 /* 1721 * We can't really operate at another speed, but the spec says 1722 * we need this descriptor. 1723 */ 1724 case UDESC_OTHER_SPEED_CONFIGURATION: 1725 case UDESC_CONFIG: 1726 if ((value & 0xff) != 0) { 1727 err = USBD_IOERROR; 1728 goto ret; 1729 } 1730 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1731 memcpy(buf, &ehci_confd, l); 1732 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1733 value >> 8; 1734 buf = (char *)buf + l; 1735 len -= l; 1736 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1737 totlen += l; 1738 memcpy(buf, &ehci_ifcd, l); 1739 buf = (char *)buf + l; 1740 len -= l; 1741 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1742 totlen += l; 1743 memcpy(buf, &ehci_endpd, l); 1744 break; 1745 case UDESC_STRING: 1746 if (len == 0) 1747 break; 1748 *(u_int8_t *)buf = 0; 1749 totlen = 1; 1750 switch (value & 0xff) { 1751 case 0: /* Language table */ 1752 totlen = ehci_str(buf, len, "\001"); 1753 break; 1754 case 1: /* Vendor */ 1755 totlen = ehci_str(buf, len, sc->sc_vendor); 1756 break; 1757 case 2: /* Product */ 1758 totlen = ehci_str(buf, len, "EHCI root hub"); 1759 break; 1760 } 1761 break; 1762 default: 1763 err = USBD_IOERROR; 1764 goto ret; 1765 } 1766 break; 1767 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1768 if (len > 0) { 1769 *(u_int8_t *)buf = 0; 1770 totlen = 1; 1771 } 1772 break; 1773 case C(UR_GET_STATUS, UT_READ_DEVICE): 1774 if (len > 1) { 1775 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1776 totlen = 2; 1777 } 1778 break; 1779 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1780 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1781 if (len > 1) { 1782 USETW(((usb_status_t *)buf)->wStatus, 0); 1783 totlen = 2; 1784 } 1785 break; 1786 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1787 if (value >= USB_MAX_DEVICES) { 1788 err = USBD_IOERROR; 1789 goto ret; 1790 } 1791 sc->sc_addr = value; 1792 break; 1793 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1794 if (value != 0 && value != 1) { 1795 err = USBD_IOERROR; 1796 goto ret; 1797 } 1798 sc->sc_conf = value; 1799 break; 1800 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1801 break; 1802 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1803 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1804 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1805 err = USBD_IOERROR; 1806 goto ret; 1807 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1808 break; 1809 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1810 break; 1811 /* Hub requests */ 1812 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1813 break; 1814 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1815 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1816 "port=%d feature=%d\n", 1817 index, value)); 1818 if (index < 1 || index > sc->sc_noport) { 1819 err = USBD_IOERROR; 1820 goto ret; 1821 } 1822 port = EHCI_PORTSC(index); 1823 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1824 switch(value) { 1825 case UHF_PORT_ENABLE: 1826 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1827 break; 1828 case UHF_PORT_SUSPEND: 1829 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1830 break; 1831 case UHF_PORT_POWER: 1832 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1833 break; 1834 case UHF_PORT_TEST: 1835 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1836 "%d\n", index)); 1837 break; 1838 case UHF_PORT_INDICATOR: 1839 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1840 "%d\n", index)); 1841 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1842 break; 1843 case UHF_C_PORT_CONNECTION: 1844 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1845 break; 1846 case UHF_C_PORT_ENABLE: 1847 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1848 break; 1849 case UHF_C_PORT_SUSPEND: 1850 /* how? */ 1851 break; 1852 case UHF_C_PORT_OVER_CURRENT: 1853 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1854 break; 1855 case UHF_C_PORT_RESET: 1856 sc->sc_isreset = 0; 1857 break; 1858 default: 1859 err = USBD_IOERROR; 1860 goto ret; 1861 } 1862 #if 0 1863 switch(value) { 1864 case UHF_C_PORT_CONNECTION: 1865 case UHF_C_PORT_ENABLE: 1866 case UHF_C_PORT_SUSPEND: 1867 case UHF_C_PORT_OVER_CURRENT: 1868 case UHF_C_PORT_RESET: 1869 /* Enable RHSC interrupt if condition is cleared. */ 1870 if ((OREAD4(sc, port) >> 16) == 0) 1871 ehci_pcd_able(sc, 1); 1872 break; 1873 default: 1874 break; 1875 } 1876 #endif 1877 break; 1878 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1879 if ((value & 0xff) != 0) { 1880 err = USBD_IOERROR; 1881 goto ret; 1882 } 1883 hubd = ehci_hubd; 1884 hubd.bNbrPorts = sc->sc_noport; 1885 v = EOREAD4(sc, EHCI_HCSPARAMS); 1886 USETW(hubd.wHubCharacteristics, 1887 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1888 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1889 ? UHD_PORT_IND : 0); 1890 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1891 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1892 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1893 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1894 l = min(len, hubd.bDescLength); 1895 totlen = l; 1896 memcpy(buf, &hubd, l); 1897 break; 1898 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1899 if (len != 4) { 1900 err = USBD_IOERROR; 1901 goto ret; 1902 } 1903 memset(buf, 0, len); /* ? XXX */ 1904 totlen = len; 1905 break; 1906 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1907 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1908 index)); 1909 if (index < 1 || index > sc->sc_noport) { 1910 err = USBD_IOERROR; 1911 goto ret; 1912 } 1913 if (len != 4) { 1914 err = USBD_IOERROR; 1915 goto ret; 1916 } 1917 v = EOREAD4(sc, EHCI_PORTSC(index)); 1918 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1919 v)); 1920 i = UPS_HIGH_SPEED; 1921 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1922 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1923 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1924 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1925 if (v & EHCI_PS_PR) i |= UPS_RESET; 1926 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1927 USETW(ps.wPortStatus, i); 1928 i = 0; 1929 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1930 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1931 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1932 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1933 USETW(ps.wPortChange, i); 1934 l = min(len, sizeof ps); 1935 memcpy(buf, &ps, l); 1936 totlen = l; 1937 break; 1938 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1939 err = USBD_IOERROR; 1940 goto ret; 1941 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1942 break; 1943 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1944 if (index < 1 || index > sc->sc_noport) { 1945 err = USBD_IOERROR; 1946 goto ret; 1947 } 1948 port = EHCI_PORTSC(index); 1949 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1950 switch(value) { 1951 case UHF_PORT_ENABLE: 1952 EOWRITE4(sc, port, v | EHCI_PS_PE); 1953 break; 1954 case UHF_PORT_SUSPEND: 1955 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1956 break; 1957 case UHF_PORT_RESET: 1958 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1959 index)); 1960 if (EHCI_PS_IS_LOWSPEED(v)) { 1961 /* Low speed device, give up ownership. */ 1962 ehci_disown(sc, index, 1); 1963 break; 1964 } 1965 /* Start reset sequence. */ 1966 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1967 EOWRITE4(sc, port, v | EHCI_PS_PR); 1968 /* Wait for reset to complete. */ 1969 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1970 if (sc->sc_dying) { 1971 err = USBD_IOERROR; 1972 goto ret; 1973 } 1974 /* Terminate reset sequence. */ 1975 EOWRITE4(sc, port, v); 1976 /* Wait for HC to complete reset. */ 1977 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1978 if (sc->sc_dying) { 1979 err = USBD_IOERROR; 1980 goto ret; 1981 } 1982 v = EOREAD4(sc, port); 1983 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1984 if (v & EHCI_PS_PR) { 1985 printf("%s: port reset timeout\n", 1986 USBDEVNAME(sc->sc_bus.bdev)); 1987 return (USBD_TIMEOUT); 1988 } 1989 if (!(v & EHCI_PS_PE)) { 1990 /* Not a high speed device, give up ownership.*/ 1991 ehci_disown(sc, index, 0); 1992 break; 1993 } 1994 sc->sc_isreset = 1; 1995 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1996 index, v)); 1997 break; 1998 case UHF_PORT_POWER: 1999 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2000 "%d\n", index)); 2001 EOWRITE4(sc, port, v | EHCI_PS_PP); 2002 break; 2003 case UHF_PORT_TEST: 2004 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2005 "%d\n", index)); 2006 break; 2007 case UHF_PORT_INDICATOR: 2008 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2009 "%d\n", index)); 2010 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2011 break; 2012 default: 2013 err = USBD_IOERROR; 2014 goto ret; 2015 } 2016 break; 2017 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2018 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2019 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2020 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2021 break; 2022 default: 2023 err = USBD_IOERROR; 2024 goto ret; 2025 } 2026 xfer->actlen = totlen; 2027 err = USBD_NORMAL_COMPLETION; 2028 ret: 2029 xfer->status = err; 2030 s = splusb(); 2031 usb_transfer_complete(xfer); 2032 splx(s); 2033 return (USBD_IN_PROGRESS); 2034 } 2035 2036 void 2037 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2038 { 2039 int port; 2040 u_int32_t v; 2041 2042 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2043 #ifdef DIAGNOSTIC 2044 if (sc->sc_npcomp != 0) { 2045 int i = (index-1) / sc->sc_npcomp; 2046 if (i >= sc->sc_ncomp) 2047 printf("%s: strange port\n", 2048 USBDEVNAME(sc->sc_bus.bdev)); 2049 else 2050 printf("%s: handing over %s speed device on " 2051 "port %d to %s\n", 2052 USBDEVNAME(sc->sc_bus.bdev), 2053 lowspeed ? "low" : "full", 2054 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2055 } else { 2056 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2057 } 2058 #endif 2059 port = EHCI_PORTSC(index); 2060 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2061 EOWRITE4(sc, port, v | EHCI_PS_PO); 2062 } 2063 2064 /* Abort a root control request. */ 2065 Static void 2066 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2067 { 2068 /* Nothing to do, all transfers are synchronous. */ 2069 } 2070 2071 /* Close the root pipe. */ 2072 Static void 2073 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2074 { 2075 DPRINTF(("ehci_root_ctrl_close\n")); 2076 /* Nothing to do. */ 2077 } 2078 2079 void 2080 ehci_root_intr_done(usbd_xfer_handle xfer) 2081 { 2082 xfer->hcpriv = NULL; 2083 } 2084 2085 Static usbd_status 2086 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2087 { 2088 usbd_status err; 2089 2090 /* Insert last in queue. */ 2091 err = usb_insert_transfer(xfer); 2092 if (err) 2093 return (err); 2094 2095 /* Pipe isn't running, start first */ 2096 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2097 } 2098 2099 Static usbd_status 2100 ehci_root_intr_start(usbd_xfer_handle xfer) 2101 { 2102 usbd_pipe_handle pipe = xfer->pipe; 2103 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2104 2105 if (sc->sc_dying) 2106 return (USBD_IOERROR); 2107 2108 sc->sc_intrxfer = xfer; 2109 2110 return (USBD_IN_PROGRESS); 2111 } 2112 2113 /* Abort a root interrupt request. */ 2114 Static void 2115 ehci_root_intr_abort(usbd_xfer_handle xfer) 2116 { 2117 int s; 2118 2119 if (xfer->pipe->intrxfer == xfer) { 2120 DPRINTF(("ehci_root_intr_abort: remove\n")); 2121 xfer->pipe->intrxfer = NULL; 2122 } 2123 xfer->status = USBD_CANCELLED; 2124 s = splusb(); 2125 usb_transfer_complete(xfer); 2126 splx(s); 2127 } 2128 2129 /* Close the root pipe. */ 2130 Static void 2131 ehci_root_intr_close(usbd_pipe_handle pipe) 2132 { 2133 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2134 2135 DPRINTF(("ehci_root_intr_close\n")); 2136 2137 sc->sc_intrxfer = NULL; 2138 } 2139 2140 void 2141 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2142 { 2143 xfer->hcpriv = NULL; 2144 } 2145 2146 /************************/ 2147 2148 ehci_soft_qh_t * 2149 ehci_alloc_sqh(ehci_softc_t *sc) 2150 { 2151 ehci_soft_qh_t *sqh; 2152 usbd_status err; 2153 int i, offs; 2154 usb_dma_t dma; 2155 2156 if (sc->sc_freeqhs == NULL) { 2157 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2158 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2159 EHCI_PAGE_SIZE, &dma); 2160 #ifdef EHCI_DEBUG 2161 if (err) 2162 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2163 #endif 2164 if (err) 2165 return (NULL); 2166 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2167 offs = i * EHCI_SQH_SIZE; 2168 sqh = KERNADDR(&dma, offs); 2169 sqh->physaddr = DMAADDR(&dma, offs); 2170 sqh->next = sc->sc_freeqhs; 2171 sc->sc_freeqhs = sqh; 2172 } 2173 } 2174 sqh = sc->sc_freeqhs; 2175 sc->sc_freeqhs = sqh->next; 2176 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2177 sqh->next = NULL; 2178 return (sqh); 2179 } 2180 2181 void 2182 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2183 { 2184 sqh->next = sc->sc_freeqhs; 2185 sc->sc_freeqhs = sqh; 2186 } 2187 2188 ehci_soft_qtd_t * 2189 ehci_alloc_sqtd(ehci_softc_t *sc) 2190 { 2191 ehci_soft_qtd_t *sqtd; 2192 usbd_status err; 2193 int i, offs; 2194 usb_dma_t dma; 2195 int s; 2196 2197 if (sc->sc_freeqtds == NULL) { 2198 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2199 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2200 EHCI_PAGE_SIZE, &dma); 2201 #ifdef EHCI_DEBUG 2202 if (err) 2203 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2204 #endif 2205 if (err) 2206 return (NULL); 2207 s = splusb(); 2208 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2209 offs = i * EHCI_SQTD_SIZE; 2210 sqtd = KERNADDR(&dma, offs); 2211 sqtd->physaddr = DMAADDR(&dma, offs); 2212 sqtd->nextqtd = sc->sc_freeqtds; 2213 sc->sc_freeqtds = sqtd; 2214 } 2215 splx(s); 2216 } 2217 2218 s = splusb(); 2219 sqtd = sc->sc_freeqtds; 2220 sc->sc_freeqtds = sqtd->nextqtd; 2221 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2222 sqtd->nextqtd = NULL; 2223 sqtd->xfer = NULL; 2224 splx(s); 2225 2226 return (sqtd); 2227 } 2228 2229 void 2230 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2231 { 2232 int s; 2233 2234 s = splusb(); 2235 sqtd->nextqtd = sc->sc_freeqtds; 2236 sc->sc_freeqtds = sqtd; 2237 splx(s); 2238 } 2239 2240 usbd_status 2241 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2242 int alen, int rd, usbd_xfer_handle xfer, 2243 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2244 { 2245 ehci_soft_qtd_t *next, *cur; 2246 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2247 u_int32_t qtdstatus; 2248 int len, curlen, mps; 2249 int i, tog; 2250 usb_dma_t *dma = &xfer->dmabuf; 2251 2252 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2253 2254 len = alen; 2255 dataphys = DMAADDR(dma, 0); 2256 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2257 #if 0 2258 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2259 epipe->nexttoggle); 2260 #endif 2261 qtdstatus = EHCI_QTD_ACTIVE | 2262 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2263 EHCI_QTD_SET_CERR(3) 2264 /* IOC set below */ 2265 /* BYTES set below */ 2266 ; 2267 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2268 tog = epipe->nexttoggle; 2269 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2270 2271 cur = ehci_alloc_sqtd(sc); 2272 *sp = cur; 2273 if (cur == NULL) 2274 goto nomem; 2275 for (;;) { 2276 dataphyspage = EHCI_PAGE(dataphys); 2277 /* The EHCI hardware can handle at most 5 pages. */ 2278 if (dataphyslastpage - dataphyspage < 2279 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2280 /* we can handle it in this QTD */ 2281 curlen = len; 2282 } else { 2283 /* must use multiple TDs, fill as much as possible. */ 2284 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2285 EHCI_PAGE_OFFSET(dataphys); 2286 #ifdef DIAGNOSTIC 2287 if (curlen > len) { 2288 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2289 "len=0x%x offs=0x%x\n", curlen, len, 2290 EHCI_PAGE_OFFSET(dataphys)); 2291 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2292 dataphyslastpage, dataphyspage, 2293 dataphys); 2294 curlen = len; 2295 } 2296 #endif 2297 /* the length must be a multiple of the max size */ 2298 curlen -= curlen % mps; 2299 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2300 "curlen=%d\n", curlen)); 2301 #ifdef DIAGNOSTIC 2302 if (curlen == 0) 2303 panic("ehci_alloc_std: curlen == 0"); 2304 #endif 2305 } 2306 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2307 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2308 dataphys, dataphyslastpage, 2309 len, curlen)); 2310 len -= curlen; 2311 2312 if (len != 0) { 2313 next = ehci_alloc_sqtd(sc); 2314 if (next == NULL) 2315 goto nomem; 2316 nextphys = htole32(next->physaddr); 2317 } else { 2318 next = NULL; 2319 nextphys = EHCI_NULL; 2320 } 2321 2322 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2323 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2324 if (i != 0) /* use offset only in first buffer */ 2325 a = EHCI_PAGE(a); 2326 cur->qtd.qtd_buffer[i] = htole32(a); 2327 cur->qtd.qtd_buffer_hi[i] = 0; 2328 #ifdef DIAGNOSTIC 2329 if (i >= EHCI_QTD_NBUFFERS) { 2330 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2331 goto nomem; 2332 } 2333 #endif 2334 } 2335 cur->nextqtd = next; 2336 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2337 cur->qtd.qtd_status = 2338 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2339 cur->xfer = xfer; 2340 cur->len = curlen; 2341 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2342 dataphys, dataphys + curlen)); 2343 /* adjust the toggle based on the number of packets in this 2344 qtd */ 2345 if (((curlen + mps - 1) / mps) & 1) { 2346 tog ^= 1; 2347 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2348 } 2349 if (len == 0) 2350 break; 2351 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2352 dataphys += curlen; 2353 cur = next; 2354 } 2355 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2356 *ep = cur; 2357 epipe->nexttoggle = tog; 2358 2359 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2360 *sp, *ep)); 2361 2362 return (USBD_NORMAL_COMPLETION); 2363 2364 nomem: 2365 /* XXX free chain */ 2366 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2367 return (USBD_NOMEM); 2368 } 2369 2370 Static void 2371 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2372 ehci_soft_qtd_t *sqtdend) 2373 { 2374 ehci_soft_qtd_t *p; 2375 int i; 2376 2377 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2378 sqtd, sqtdend)); 2379 2380 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2381 p = sqtd->nextqtd; 2382 ehci_free_sqtd(sc, sqtd); 2383 } 2384 } 2385 2386 /****************/ 2387 2388 /* 2389 * Close a reqular pipe. 2390 * Assumes that there are no pending transactions. 2391 */ 2392 void 2393 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2394 { 2395 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2396 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2397 ehci_soft_qh_t *sqh = epipe->sqh; 2398 int s; 2399 2400 s = splusb(); 2401 ehci_rem_qh(sc, sqh, head); 2402 splx(s); 2403 ehci_free_sqh(sc, epipe->sqh); 2404 } 2405 2406 /* 2407 * Abort a device request. 2408 * If this routine is called at splusb() it guarantees that the request 2409 * will be removed from the hardware scheduling and that the callback 2410 * for it will be called with USBD_CANCELLED status. 2411 * It's impossible to guarantee that the requested transfer will not 2412 * have happened since the hardware runs concurrently. 2413 * If the transaction has already happened we rely on the ordinary 2414 * interrupt processing to process it. 2415 * XXX This is most probably wrong. 2416 */ 2417 void 2418 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2419 { 2420 #define exfer EXFER(xfer) 2421 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2422 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2423 ehci_soft_qh_t *sqh = epipe->sqh; 2424 ehci_soft_qtd_t *sqtd; 2425 ehci_physaddr_t cur; 2426 u_int32_t qhstatus; 2427 int s; 2428 int hit; 2429 2430 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2431 2432 if (sc->sc_dying) { 2433 /* If we're dying, just do the software part. */ 2434 s = splusb(); 2435 xfer->status = status; /* make software ignore it */ 2436 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2437 usb_transfer_complete(xfer); 2438 splx(s); 2439 return; 2440 } 2441 2442 if (xfer->device->bus->intr_context || !curproc) 2443 panic("ehci_abort_xfer: not in process context"); 2444 2445 /* 2446 * Step 1: Make interrupt routine and hardware ignore xfer. 2447 */ 2448 s = splusb(); 2449 xfer->status = status; /* make software ignore it */ 2450 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2451 qhstatus = sqh->qh.qh_qtd.qtd_status; 2452 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2453 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2454 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2455 if (sqtd == exfer->sqtdend) 2456 break; 2457 } 2458 splx(s); 2459 2460 /* 2461 * Step 2: Wait until we know hardware has finished any possible 2462 * use of the xfer. Also make sure the soft interrupt routine 2463 * has run. 2464 */ 2465 ehci_sync_hc(sc); 2466 s = splusb(); 2467 #ifdef USB_USE_SOFTINTR 2468 sc->sc_softwake = 1; 2469 #endif /* USB_USE_SOFTINTR */ 2470 usb_schedsoftintr(&sc->sc_bus); 2471 #ifdef USB_USE_SOFTINTR 2472 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2473 #endif /* USB_USE_SOFTINTR */ 2474 splx(s); 2475 2476 /* 2477 * Step 3: Remove any vestiges of the xfer from the hardware. 2478 * The complication here is that the hardware may have executed 2479 * beyond the xfer we're trying to abort. So as we're scanning 2480 * the TDs of this xfer we check if the hardware points to 2481 * any of them. 2482 */ 2483 s = splusb(); /* XXX why? */ 2484 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2485 hit = 0; 2486 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2487 hit |= cur == sqtd->physaddr; 2488 if (sqtd == exfer->sqtdend) 2489 break; 2490 } 2491 sqtd = sqtd->nextqtd; 2492 /* Zap curqtd register if hardware pointed inside the xfer. */ 2493 if (hit && sqtd != NULL) { 2494 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2495 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2496 sqh->qh.qh_qtd.qtd_status = qhstatus; 2497 } else { 2498 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2499 } 2500 2501 /* 2502 * Step 4: Execute callback. 2503 */ 2504 #ifdef DIAGNOSTIC 2505 exfer->isdone = 1; 2506 #endif 2507 usb_transfer_complete(xfer); 2508 2509 splx(s); 2510 #undef exfer 2511 } 2512 2513 void 2514 ehci_timeout(void *addr) 2515 { 2516 struct ehci_xfer *exfer = addr; 2517 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2518 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2519 2520 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2521 #ifdef USB_DEBUG 2522 if (ehcidebug > 1) 2523 usbd_dump_pipe(exfer->xfer.pipe); 2524 #endif 2525 2526 if (sc->sc_dying) { 2527 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2528 return; 2529 } 2530 2531 /* Execute the abort in a process context. */ 2532 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2533 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2534 } 2535 2536 void 2537 ehci_timeout_task(void *addr) 2538 { 2539 usbd_xfer_handle xfer = addr; 2540 int s; 2541 2542 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2543 2544 s = splusb(); 2545 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2546 splx(s); 2547 } 2548 2549 /************************/ 2550 2551 Static usbd_status 2552 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2553 { 2554 usbd_status err; 2555 2556 /* Insert last in queue. */ 2557 err = usb_insert_transfer(xfer); 2558 if (err) 2559 return (err); 2560 2561 /* Pipe isn't running, start first */ 2562 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2563 } 2564 2565 Static usbd_status 2566 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2567 { 2568 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2569 usbd_status err; 2570 2571 if (sc->sc_dying) 2572 return (USBD_IOERROR); 2573 2574 #ifdef DIAGNOSTIC 2575 if (!(xfer->rqflags & URQ_REQUEST)) { 2576 /* XXX panic */ 2577 printf("ehci_device_ctrl_transfer: not a request\n"); 2578 return (USBD_INVAL); 2579 } 2580 #endif 2581 2582 err = ehci_device_request(xfer); 2583 if (err) 2584 return (err); 2585 2586 if (sc->sc_bus.use_polling) 2587 ehci_waitintr(sc, xfer); 2588 return (USBD_IN_PROGRESS); 2589 } 2590 2591 void 2592 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2593 { 2594 struct ehci_xfer *ex = EXFER(xfer); 2595 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2596 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2597 2598 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2599 2600 #ifdef DIAGNOSTIC 2601 if (!(xfer->rqflags & URQ_REQUEST)) { 2602 panic("ehci_ctrl_done: not a request"); 2603 } 2604 #endif 2605 2606 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2607 ehci_del_intr_list(ex); /* remove from active list */ 2608 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2609 } 2610 2611 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2612 } 2613 2614 /* Abort a device control request. */ 2615 Static void 2616 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2617 { 2618 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2619 ehci_abort_xfer(xfer, USBD_CANCELLED); 2620 } 2621 2622 /* Close a device control pipe. */ 2623 Static void 2624 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2625 { 2626 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2627 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2628 2629 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2630 ehci_close_pipe(pipe, sc->sc_async_head); 2631 } 2632 2633 usbd_status 2634 ehci_device_request(usbd_xfer_handle xfer) 2635 { 2636 #define exfer EXFER(xfer) 2637 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2638 usb_device_request_t *req = &xfer->request; 2639 usbd_device_handle dev = epipe->pipe.device; 2640 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2641 int addr = dev->address; 2642 ehci_soft_qtd_t *setup, *stat, *next; 2643 ehci_soft_qh_t *sqh; 2644 int isread; 2645 int len; 2646 usbd_status err; 2647 int s; 2648 2649 isread = req->bmRequestType & UT_READ; 2650 len = UGETW(req->wLength); 2651 2652 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2653 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2654 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2655 UGETW(req->wIndex), len, addr, 2656 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2657 2658 setup = ehci_alloc_sqtd(sc); 2659 if (setup == NULL) { 2660 err = USBD_NOMEM; 2661 goto bad1; 2662 } 2663 stat = ehci_alloc_sqtd(sc); 2664 if (stat == NULL) { 2665 err = USBD_NOMEM; 2666 goto bad2; 2667 } 2668 2669 sqh = epipe->sqh; 2670 epipe->u.ctl.length = len; 2671 2672 /* Update device address and length since they may have changed 2673 during the setup of the control pipe in usbd_new_device(). */ 2674 /* XXX This only needs to be done once, but it's too early in open. */ 2675 /* XXXX Should not touch ED here! */ 2676 sqh->qh.qh_endp = 2677 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2678 htole32( 2679 EHCI_QH_SET_ADDR(addr) | 2680 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2681 ); 2682 2683 /* Set up data transaction */ 2684 if (len != 0) { 2685 ehci_soft_qtd_t *end; 2686 2687 /* Start toggle at 1. */ 2688 epipe->nexttoggle = 1; 2689 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2690 &next, &end); 2691 if (err) 2692 goto bad3; 2693 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2694 end->nextqtd = stat; 2695 end->qtd.qtd_next = 2696 end->qtd.qtd_altnext = htole32(stat->physaddr); 2697 } else { 2698 next = stat; 2699 } 2700 2701 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2702 2703 /* Clear toggle */ 2704 setup->qtd.qtd_status = htole32( 2705 EHCI_QTD_ACTIVE | 2706 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2707 EHCI_QTD_SET_CERR(3) | 2708 EHCI_QTD_SET_TOGGLE(0) | 2709 EHCI_QTD_SET_BYTES(sizeof *req) 2710 ); 2711 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2712 setup->qtd.qtd_buffer_hi[0] = 0; 2713 setup->nextqtd = next; 2714 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2715 setup->xfer = xfer; 2716 setup->len = sizeof *req; 2717 2718 stat->qtd.qtd_status = htole32( 2719 EHCI_QTD_ACTIVE | 2720 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2721 EHCI_QTD_SET_CERR(3) | 2722 EHCI_QTD_SET_TOGGLE(1) | 2723 EHCI_QTD_IOC 2724 ); 2725 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2726 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2727 stat->nextqtd = NULL; 2728 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2729 stat->xfer = xfer; 2730 stat->len = 0; 2731 2732 #ifdef EHCI_DEBUG 2733 if (ehcidebug > 5) { 2734 DPRINTF(("ehci_device_request:\n")); 2735 ehci_dump_sqh(sqh); 2736 ehci_dump_sqtds(setup); 2737 } 2738 #endif 2739 2740 exfer->sqtdstart = setup; 2741 exfer->sqtdend = stat; 2742 #ifdef DIAGNOSTIC 2743 if (!exfer->isdone) { 2744 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2745 } 2746 exfer->isdone = 0; 2747 #endif 2748 2749 /* Insert qTD in QH list. */ 2750 s = splusb(); 2751 ehci_set_qh_qtd(sqh, setup); 2752 if (xfer->timeout && !sc->sc_bus.use_polling) { 2753 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2754 ehci_timeout, xfer); 2755 } 2756 ehci_add_intr_list(sc, exfer); 2757 xfer->status = USBD_IN_PROGRESS; 2758 splx(s); 2759 2760 #ifdef EHCI_DEBUG 2761 if (ehcidebug > 10) { 2762 DPRINTF(("ehci_device_request: status=%x\n", 2763 EOREAD4(sc, EHCI_USBSTS))); 2764 delay(10000); 2765 ehci_dump_regs(sc); 2766 ehci_dump_sqh(sc->sc_async_head); 2767 ehci_dump_sqh(sqh); 2768 ehci_dump_sqtds(setup); 2769 } 2770 #endif 2771 2772 return (USBD_NORMAL_COMPLETION); 2773 2774 bad3: 2775 ehci_free_sqtd(sc, stat); 2776 bad2: 2777 ehci_free_sqtd(sc, setup); 2778 bad1: 2779 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2780 xfer->status = err; 2781 usb_transfer_complete(xfer); 2782 return (err); 2783 #undef exfer 2784 } 2785 2786 /************************/ 2787 2788 Static usbd_status 2789 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2790 { 2791 usbd_status err; 2792 2793 /* Insert last in queue. */ 2794 err = usb_insert_transfer(xfer); 2795 if (err) 2796 return (err); 2797 2798 /* Pipe isn't running, start first */ 2799 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2800 } 2801 2802 usbd_status 2803 ehci_device_bulk_start(usbd_xfer_handle xfer) 2804 { 2805 #define exfer EXFER(xfer) 2806 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2807 usbd_device_handle dev = epipe->pipe.device; 2808 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2809 ehci_soft_qtd_t *data, *dataend; 2810 ehci_soft_qh_t *sqh; 2811 usbd_status err; 2812 int len, isread, endpt; 2813 int s; 2814 2815 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2816 xfer, xfer->length, xfer->flags)); 2817 2818 if (sc->sc_dying) 2819 return (USBD_IOERROR); 2820 2821 #ifdef DIAGNOSTIC 2822 if (xfer->rqflags & URQ_REQUEST) 2823 panic("ehci_device_bulk_start: a request"); 2824 #endif 2825 2826 len = xfer->length; 2827 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2828 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2829 sqh = epipe->sqh; 2830 2831 epipe->u.bulk.length = len; 2832 2833 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2834 &dataend); 2835 if (err) { 2836 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2837 xfer->status = err; 2838 usb_transfer_complete(xfer); 2839 return (err); 2840 } 2841 2842 #ifdef EHCI_DEBUG 2843 if (ehcidebug > 5) { 2844 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2845 ehci_dump_sqh(sqh); 2846 ehci_dump_sqtds(data); 2847 } 2848 #endif 2849 2850 /* Set up interrupt info. */ 2851 exfer->sqtdstart = data; 2852 exfer->sqtdend = dataend; 2853 #ifdef DIAGNOSTIC 2854 if (!exfer->isdone) { 2855 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2856 } 2857 exfer->isdone = 0; 2858 #endif 2859 2860 s = splusb(); 2861 ehci_set_qh_qtd(sqh, data); 2862 if (xfer->timeout && !sc->sc_bus.use_polling) { 2863 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2864 ehci_timeout, xfer); 2865 } 2866 ehci_add_intr_list(sc, exfer); 2867 xfer->status = USBD_IN_PROGRESS; 2868 splx(s); 2869 2870 #ifdef EHCI_DEBUG 2871 if (ehcidebug > 10) { 2872 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2873 delay(10000); 2874 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2875 ehci_dump_regs(sc); 2876 #if 0 2877 printf("async_head:\n"); 2878 ehci_dump_sqh(sc->sc_async_head); 2879 #endif 2880 printf("sqh:\n"); 2881 ehci_dump_sqh(sqh); 2882 ehci_dump_sqtds(data); 2883 } 2884 #endif 2885 2886 if (sc->sc_bus.use_polling) 2887 ehci_waitintr(sc, xfer); 2888 2889 return (USBD_IN_PROGRESS); 2890 #undef exfer 2891 } 2892 2893 Static void 2894 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2895 { 2896 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2897 ehci_abort_xfer(xfer, USBD_CANCELLED); 2898 } 2899 2900 /* 2901 * Close a device bulk pipe. 2902 */ 2903 Static void 2904 ehci_device_bulk_close(usbd_pipe_handle pipe) 2905 { 2906 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2907 2908 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2909 ehci_close_pipe(pipe, sc->sc_async_head); 2910 } 2911 2912 void 2913 ehci_device_bulk_done(usbd_xfer_handle xfer) 2914 { 2915 struct ehci_xfer *ex = EXFER(xfer); 2916 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2917 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2918 2919 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2920 xfer, xfer->actlen)); 2921 2922 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2923 ehci_del_intr_list(ex); /* remove from active list */ 2924 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2925 } 2926 2927 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2928 } 2929 2930 /************************/ 2931 2932 Static usbd_status 2933 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2934 { 2935 struct ehci_soft_islot *isp; 2936 int islot, lev; 2937 2938 /* Find a poll rate that is large enough. */ 2939 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2940 if (EHCI_ILEV_IVAL(lev) <= ival) 2941 break; 2942 2943 /* Pick an interrupt slot at the right level. */ 2944 /* XXX could do better than picking at random */ 2945 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2946 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2947 2948 sqh->islot = islot; 2949 isp = &sc->sc_islots[islot]; 2950 ehci_add_qh(sqh, isp->sqh); 2951 2952 return (USBD_NORMAL_COMPLETION); 2953 } 2954 2955 Static usbd_status 2956 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2957 { 2958 usbd_status err; 2959 2960 /* Insert last in queue. */ 2961 err = usb_insert_transfer(xfer); 2962 if (err) 2963 return (err); 2964 2965 /* 2966 * Pipe isn't running (otherwise err would be USBD_INPROG), 2967 * so start it first. 2968 */ 2969 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2970 } 2971 2972 Static usbd_status 2973 ehci_device_intr_start(usbd_xfer_handle xfer) 2974 { 2975 #define exfer EXFER(xfer) 2976 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2977 usbd_device_handle dev = xfer->pipe->device; 2978 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2979 ehci_soft_qtd_t *data, *dataend; 2980 ehci_soft_qh_t *sqh; 2981 usbd_status err; 2982 int len, isread, endpt; 2983 int s; 2984 2985 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 2986 xfer, xfer->length, xfer->flags)); 2987 2988 if (sc->sc_dying) 2989 return (USBD_IOERROR); 2990 2991 #ifdef DIAGNOSTIC 2992 if (xfer->rqflags & URQ_REQUEST) 2993 panic("ehci_device_intr_start: a request"); 2994 #endif 2995 2996 len = xfer->length; 2997 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2998 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2999 sqh = epipe->sqh; 3000 3001 epipe->u.intr.length = len; 3002 3003 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3004 &dataend); 3005 if (err) { 3006 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3007 xfer->status = err; 3008 usb_transfer_complete(xfer); 3009 return (err); 3010 } 3011 3012 #ifdef EHCI_DEBUG 3013 if (ehcidebug > 5) { 3014 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3015 ehci_dump_sqh(sqh); 3016 ehci_dump_sqtds(data); 3017 } 3018 #endif 3019 3020 /* Set up interrupt info. */ 3021 exfer->sqtdstart = data; 3022 exfer->sqtdend = dataend; 3023 #ifdef DIAGNOSTIC 3024 if (!exfer->isdone) { 3025 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3026 } 3027 exfer->isdone = 0; 3028 #endif 3029 3030 s = splusb(); 3031 ehci_set_qh_qtd(sqh, data); 3032 if (xfer->timeout && !sc->sc_bus.use_polling) { 3033 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3034 ehci_timeout, xfer); 3035 } 3036 ehci_add_intr_list(sc, exfer); 3037 xfer->status = USBD_IN_PROGRESS; 3038 splx(s); 3039 3040 #ifdef EHCI_DEBUG 3041 if (ehcidebug > 10) { 3042 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3043 delay(10000); 3044 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3045 ehci_dump_regs(sc); 3046 printf("sqh:\n"); 3047 ehci_dump_sqh(sqh); 3048 ehci_dump_sqtds(data); 3049 } 3050 #endif 3051 3052 if (sc->sc_bus.use_polling) 3053 ehci_waitintr(sc, xfer); 3054 3055 return (USBD_IN_PROGRESS); 3056 #undef exfer 3057 } 3058 3059 Static void 3060 ehci_device_intr_abort(usbd_xfer_handle xfer) 3061 { 3062 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3063 if (xfer->pipe->intrxfer == xfer) { 3064 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3065 xfer->pipe->intrxfer = NULL; 3066 } 3067 ehci_abort_xfer(xfer, USBD_CANCELLED); 3068 } 3069 3070 Static void 3071 ehci_device_intr_close(usbd_pipe_handle pipe) 3072 { 3073 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3074 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3075 struct ehci_soft_islot *isp; 3076 3077 isp = &sc->sc_islots[epipe->sqh->islot]; 3078 ehci_close_pipe(pipe, isp->sqh); 3079 } 3080 3081 Static void 3082 ehci_device_intr_done(usbd_xfer_handle xfer) 3083 { 3084 #define exfer EXFER(xfer) 3085 struct ehci_xfer *ex = EXFER(xfer); 3086 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3087 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3088 ehci_soft_qtd_t *data, *dataend; 3089 ehci_soft_qh_t *sqh; 3090 usbd_status err; 3091 int len, isread, endpt, s; 3092 3093 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3094 xfer, xfer->actlen)); 3095 3096 if (xfer->pipe->repeat) { 3097 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3098 3099 len = epipe->u.intr.length; 3100 xfer->length = len; 3101 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3102 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3103 sqh = epipe->sqh; 3104 3105 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3106 &data, &dataend); 3107 if (err) { 3108 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3109 xfer->status = err; 3110 return; 3111 } 3112 3113 /* Set up interrupt info. */ 3114 exfer->sqtdstart = data; 3115 exfer->sqtdend = dataend; 3116 #ifdef DIAGNOSTIC 3117 if (!exfer->isdone) { 3118 printf("ehci_device_intr_done: not done, ex=%p\n", 3119 exfer); 3120 } 3121 exfer->isdone = 0; 3122 #endif 3123 3124 s = splusb(); 3125 ehci_set_qh_qtd(sqh, data); 3126 if (xfer->timeout && !sc->sc_bus.use_polling) { 3127 usb_callout(xfer->timeout_handle, 3128 mstohz(xfer->timeout), ehci_timeout, xfer); 3129 } 3130 splx(s); 3131 3132 xfer->status = USBD_IN_PROGRESS; 3133 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3134 ehci_del_intr_list(ex); /* remove from active list */ 3135 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3136 } 3137 #undef exfer 3138 } 3139 3140 /************************/ 3141 3142 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3143 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3144 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3145 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3146 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3147
Indexes created Wed Oct 01 19:09:53 GMT 2025