ehci.c revision 1.93
1 /* $NetBSD: ehci.c,v 1.93 2005/04/27 16:20:26 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.93 2005/04/27 16:20:26 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 usbd_status 316 ehci_init(ehci_softc_t *sc) 317 { 318 u_int32_t version, sparams, cparams, hcr; 319 u_int i; 320 usbd_status err; 321 ehci_soft_qh_t *sqh; 322 u_int ncomp; 323 324 DPRINTF(("ehci_init: start\n")); 325 #ifdef EHCI_DEBUG 326 theehci = sc; 327 #endif 328 329 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 330 331 version = EREAD2(sc, EHCI_HCIVERSION); 332 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 333 version >> 8, version & 0xff); 334 335 sparams = EREAD4(sc, EHCI_HCSPARAMS); 336 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 337 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 338 ncomp = EHCI_HCS_N_CC(sparams); 339 if (ncomp != sc->sc_ncomp) { 340 aprint_error("%s: wrong number of companions (%d != %d)\n", 341 USBDEVNAME(sc->sc_bus.bdev), 342 ncomp, sc->sc_ncomp); 343 #if NOHCI == 0 || NUHCI == 0 344 aprint_error("%s: ohci or uhci probably not configured\n", 345 USBDEVNAME(sc->sc_bus.bdev)); 346 #endif 347 if (ncomp < sc->sc_ncomp) 348 sc->sc_ncomp = ncomp; 349 } 350 if (sc->sc_ncomp > 0) { 351 aprint_normal("%s: companion controller%s, %d port%s each:", 352 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 353 EHCI_HCS_N_PCC(sparams), 354 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 355 for (i = 0; i < sc->sc_ncomp; i++) 356 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 357 aprint_normal("\n"); 358 } 359 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 360 cparams = EREAD4(sc, EHCI_HCCPARAMS); 361 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 362 363 if (EHCI_HCC_64BIT(cparams)) { 364 /* MUST clear segment register if 64 bit capable. */ 365 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 366 } 367 368 sc->sc_bus.usbrev = USBREV_2_0; 369 370 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 371 USB_MEM_RESERVE); 372 373 /* Reset the controller */ 374 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 375 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 376 usb_delay_ms(&sc->sc_bus, 1); 377 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 378 for (i = 0; i < 100; i++) { 379 usb_delay_ms(&sc->sc_bus, 1); 380 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 381 if (!hcr) 382 break; 383 } 384 if (hcr) { 385 aprint_error("%s: reset timeout\n", 386 USBDEVNAME(sc->sc_bus.bdev)); 387 return (USBD_IOERROR); 388 } 389 390 /* XXX need proper intr scheduling */ 391 sc->sc_rand = 96; 392 393 /* frame list size at default, read back what we got and use that */ 394 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 395 case 0: sc->sc_flsize = 1024; break; 396 case 1: sc->sc_flsize = 512; break; 397 case 2: sc->sc_flsize = 256; break; 398 case 3: return (USBD_IOERROR); 399 } 400 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 401 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 402 if (err) 403 return (err); 404 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 405 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 406 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 407 408 /* Set up the bus struct. */ 409 sc->sc_bus.methods = &ehci_bus_methods; 410 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 411 412 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 413 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 414 415 sc->sc_eintrs = EHCI_NORMAL_INTRS; 416 417 /* 418 * Allocate the interrupt dummy QHs. These are arranged to give poll 419 * intervals that are powers of 2 times 1ms. 420 */ 421 for (i = 0; i < EHCI_INTRQHS; i++) { 422 sqh = ehci_alloc_sqh(sc); 423 if (sqh == NULL) { 424 err = USBD_NOMEM; 425 goto bad1; 426 } 427 sc->sc_islots[i].sqh = sqh; 428 } 429 for (i = 0; i < EHCI_INTRQHS; i++) { 430 sqh = sc->sc_islots[i].sqh; 431 if (i == 0) { 432 /* The last (1ms) QH terminates. */ 433 sqh->qh.qh_link = EHCI_NULL; 434 sqh->next = NULL; 435 } else { 436 /* Otherwise the next QH has half the poll interval */ 437 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 438 sqh->qh.qh_link = htole32(sqh->next->physaddr | 439 EHCI_LINK_QH); 440 } 441 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 442 sqh->qh.qh_curqtd = EHCI_NULL; 443 sqh->next = NULL; 444 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 445 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 446 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 447 sqh->sqtd = NULL; 448 } 449 /* Point the frame list at the last level (128ms). */ 450 for (i = 0; i < sc->sc_flsize; i++) { 451 sc->sc_flist[i] = htole32(EHCI_LINK_QH | 452 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 453 i)].sqh->physaddr); 454 } 455 456 /* Allocate dummy QH that starts the async list. */ 457 sqh = ehci_alloc_sqh(sc); 458 if (sqh == NULL) { 459 err = USBD_NOMEM; 460 goto bad1; 461 } 462 /* Fill the QH */ 463 sqh->qh.qh_endp = 464 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 465 sqh->qh.qh_link = 466 htole32(sqh->physaddr | EHCI_LINK_QH); 467 sqh->qh.qh_curqtd = EHCI_NULL; 468 sqh->next = NULL; 469 /* Fill the overlay qTD */ 470 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 471 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 472 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 473 sqh->sqtd = NULL; 474 #ifdef EHCI_DEBUG 475 if (ehcidebug) { 476 ehci_dump_sqh(sqh); 477 } 478 #endif 479 480 /* Point to async list */ 481 sc->sc_async_head = sqh; 482 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 483 484 usb_callout_init(sc->sc_tmo_pcd); 485 486 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 487 488 /* Enable interrupts */ 489 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 490 491 /* Turn on controller */ 492 EOWRITE4(sc, EHCI_USBCMD, 493 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 494 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 495 EHCI_CMD_ASE | 496 EHCI_CMD_PSE | 497 EHCI_CMD_RS); 498 499 /* Take over port ownership */ 500 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 501 502 for (i = 0; i < 100; i++) { 503 usb_delay_ms(&sc->sc_bus, 1); 504 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 505 if (!hcr) 506 break; 507 } 508 if (hcr) { 509 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 510 return (USBD_IOERROR); 511 } 512 513 return (USBD_NORMAL_COMPLETION); 514 515 #if 0 516 bad2: 517 ehci_free_sqh(sc, sc->sc_async_head); 518 #endif 519 bad1: 520 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 521 return (err); 522 } 523 524 int 525 ehci_intr(void *v) 526 { 527 ehci_softc_t *sc = v; 528 529 if (sc == NULL || sc->sc_dying) 530 return (0); 531 532 /* If we get an interrupt while polling, then just ignore it. */ 533 if (sc->sc_bus.use_polling) { 534 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 535 536 if (intrs) 537 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 538 #ifdef DIAGNOSTIC 539 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 540 #endif 541 return (0); 542 } 543 544 return (ehci_intr1(sc)); 545 } 546 547 Static int 548 ehci_intr1(ehci_softc_t *sc) 549 { 550 u_int32_t intrs, eintrs; 551 552 DPRINTFN(20,("ehci_intr1: enter\n")); 553 554 /* In case the interrupt occurs before initialization has completed. */ 555 if (sc == NULL) { 556 #ifdef DIAGNOSTIC 557 printf("ehci_intr1: sc == NULL\n"); 558 #endif 559 return (0); 560 } 561 562 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 563 if (!intrs) 564 return (0); 565 566 eintrs = intrs & sc->sc_eintrs; 567 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 568 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 569 (u_int)eintrs)); 570 if (!eintrs) 571 return (0); 572 573 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 574 sc->sc_bus.intr_context++; 575 sc->sc_bus.no_intrs++; 576 if (eintrs & EHCI_STS_IAA) { 577 DPRINTF(("ehci_intr1: door bell\n")); 578 wakeup(&sc->sc_async_head); 579 eintrs &= ~EHCI_STS_IAA; 580 } 581 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 582 DPRINTFN(5,("ehci_intr1: %s %s\n", 583 eintrs & EHCI_STS_INT ? "INT" : "", 584 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 585 usb_schedsoftintr(&sc->sc_bus); 586 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 587 } 588 if (eintrs & EHCI_STS_HSE) { 589 printf("%s: unrecoverable error, controller halted\n", 590 USBDEVNAME(sc->sc_bus.bdev)); 591 /* XXX what else */ 592 } 593 if (eintrs & EHCI_STS_PCD) { 594 ehci_pcd(sc, sc->sc_intrxfer); 595 /* 596 * Disable PCD interrupt for now, because it will be 597 * on until the port has been reset. 598 */ 599 ehci_pcd_able(sc, 0); 600 /* Do not allow RHSC interrupts > 1 per second */ 601 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 602 eintrs &= ~EHCI_STS_PCD; 603 } 604 605 sc->sc_bus.intr_context--; 606 607 if (eintrs != 0) { 608 /* Block unprocessed interrupts. */ 609 sc->sc_eintrs &= ~eintrs; 610 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 611 printf("%s: blocking intrs 0x%x\n", 612 USBDEVNAME(sc->sc_bus.bdev), eintrs); 613 } 614 615 return (1); 616 } 617 618 void 619 ehci_pcd_able(ehci_softc_t *sc, int on) 620 { 621 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 622 if (on) 623 sc->sc_eintrs |= EHCI_STS_PCD; 624 else 625 sc->sc_eintrs &= ~EHCI_STS_PCD; 626 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 627 } 628 629 void 630 ehci_pcd_enable(void *v_sc) 631 { 632 ehci_softc_t *sc = v_sc; 633 634 ehci_pcd_able(sc, 1); 635 } 636 637 void 638 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 639 { 640 usbd_pipe_handle pipe; 641 u_char *p; 642 int i, m; 643 644 if (xfer == NULL) { 645 /* Just ignore the change. */ 646 return; 647 } 648 649 pipe = xfer->pipe; 650 651 p = KERNADDR(&xfer->dmabuf, 0); 652 m = min(sc->sc_noport, xfer->length * 8 - 1); 653 memset(p, 0, xfer->length); 654 for (i = 1; i <= m; i++) { 655 /* Pick out CHANGE bits from the status reg. */ 656 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 657 p[i/8] |= 1 << (i%8); 658 } 659 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 660 xfer->actlen = xfer->length; 661 xfer->status = USBD_NORMAL_COMPLETION; 662 663 usb_transfer_complete(xfer); 664 } 665 666 void 667 ehci_softintr(void *v) 668 { 669 ehci_softc_t *sc = v; 670 struct ehci_xfer *ex, *nextex; 671 672 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 673 sc->sc_bus.intr_context)); 674 675 sc->sc_bus.intr_context++; 676 677 /* 678 * The only explanation I can think of for why EHCI is as brain dead 679 * as UHCI interrupt-wise is that Intel was involved in both. 680 * An interrupt just tells us that something is done, we have no 681 * clue what, so we need to scan through all active transfers. :-( 682 */ 683 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 684 nextex = LIST_NEXT(ex, inext); 685 ehci_check_intr(sc, ex); 686 } 687 688 #ifdef USB_USE_SOFTINTR 689 if (sc->sc_softwake) { 690 sc->sc_softwake = 0; 691 wakeup(&sc->sc_softwake); 692 } 693 #endif /* USB_USE_SOFTINTR */ 694 695 sc->sc_bus.intr_context--; 696 } 697 698 /* Check for an interrupt. */ 699 void 700 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 701 { 702 ehci_soft_qtd_t *sqtd, *lsqtd; 703 u_int32_t status; 704 705 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 706 707 if (ex->sqtdstart == NULL) { 708 printf("ehci_check_intr: sqtdstart=NULL\n"); 709 return; 710 } 711 lsqtd = ex->sqtdend; 712 #ifdef DIAGNOSTIC 713 if (lsqtd == NULL) { 714 printf("ehci_check_intr: lsqtd==0\n"); 715 return; 716 } 717 #endif 718 /* 719 * If the last TD is still active we need to check whether there 720 * is a an error somewhere in the middle, or whether there was a 721 * short packet (SPD and not ACTIVE). 722 */ 723 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 724 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 725 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 726 status = le32toh(sqtd->qtd.qtd_status); 727 /* If there's an active QTD the xfer isn't done. */ 728 if (status & EHCI_QTD_ACTIVE) 729 break; 730 /* Any kind of error makes the xfer done. */ 731 if (status & EHCI_QTD_HALTED) 732 goto done; 733 /* We want short packets, and it is short: it's done */ 734 if (EHCI_QTD_GET_BYTES(status) != 0) 735 goto done; 736 } 737 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 738 ex, ex->sqtdstart)); 739 return; 740 } 741 done: 742 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 743 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 744 ehci_idone(ex); 745 } 746 747 void 748 ehci_idone(struct ehci_xfer *ex) 749 { 750 usbd_xfer_handle xfer = &ex->xfer; 751 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 752 ehci_soft_qtd_t *sqtd, *lsqtd; 753 u_int32_t status = 0, nstatus = 0; 754 int actlen; 755 uint pkts_left; 756 757 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 758 #ifdef DIAGNOSTIC 759 { 760 int s = splhigh(); 761 if (ex->isdone) { 762 splx(s); 763 #ifdef EHCI_DEBUG 764 printf("ehci_idone: ex is done!\n "); 765 ehci_dump_exfer(ex); 766 #else 767 printf("ehci_idone: ex=%p is done!\n", ex); 768 #endif 769 return; 770 } 771 ex->isdone = 1; 772 splx(s); 773 } 774 #endif 775 776 if (xfer->status == USBD_CANCELLED || 777 xfer->status == USBD_TIMEOUT) { 778 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 779 return; 780 } 781 782 #ifdef EHCI_DEBUG 783 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 784 if (ehcidebug > 10) 785 ehci_dump_sqtds(ex->sqtdstart); 786 #endif 787 788 /* The transfer is done, compute actual length and status. */ 789 lsqtd = ex->sqtdend; 790 actlen = 0; 791 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 792 nstatus = le32toh(sqtd->qtd.qtd_status); 793 if (nstatus & EHCI_QTD_ACTIVE) 794 break; 795 796 status = nstatus; 797 /* halt is ok if descriptor is last, and complete */ 798 if (sqtd->qtd.qtd_next == EHCI_NULL && 799 EHCI_QTD_GET_BYTES(status) == 0) 800 status &= ~EHCI_QTD_HALTED; 801 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 802 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 803 } 804 805 /* 806 * If there are left over TDs we need to update the toggle. 807 * The default pipe doesn't need it since control transfers 808 * start the toggle at 0 every time. 809 */ 810 if (sqtd != lsqtd->nextqtd && 811 xfer->pipe->device->default_pipe != xfer->pipe) { 812 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 813 #if 0 814 ehci_dump_sqh(epipe->sqh); 815 ehci_dump_sqtds(ex->sqtdstart); 816 #endif 817 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 818 } 819 820 /* 821 * For a short transfer we need to update the toggle for the missing 822 * packets within the qTD. 823 */ 824 pkts_left = EHCI_QTD_GET_BYTES(status) / 825 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 826 epipe->nexttoggle ^= pkts_left % 2; 827 828 status &= EHCI_QTD_STATERRS; 829 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 830 xfer->length, actlen, status)); 831 xfer->actlen = actlen; 832 if (status != 0) { 833 #ifdef EHCI_DEBUG 834 char sbuf[128]; 835 836 bitmask_snprintf((u_int32_t)status, 837 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 838 "\3MISSED", sbuf, sizeof(sbuf)); 839 840 DPRINTFN((status == EHCI_QTD_HALTED) ? 2 : 0, 841 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 842 "status 0x%s\n", 843 xfer->pipe->device->address, 844 xfer->pipe->endpoint->edesc->bEndpointAddress, 845 sbuf)); 846 if (ehcidebug > 2) { 847 ehci_dump_sqh(epipe->sqh); 848 ehci_dump_sqtds(ex->sqtdstart); 849 } 850 #endif 851 if (status == EHCI_QTD_HALTED) 852 xfer->status = USBD_STALLED; 853 else 854 xfer->status = USBD_IOERROR; /* more info XXX */ 855 } else { 856 xfer->status = USBD_NORMAL_COMPLETION; 857 } 858 859 usb_transfer_complete(xfer); 860 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 861 } 862 863 /* 864 * Wait here until controller claims to have an interrupt. 865 * Then call ehci_intr and return. Use timeout to avoid waiting 866 * too long. 867 */ 868 void 869 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 870 { 871 int timo = xfer->timeout; 872 int usecs; 873 u_int32_t intrs; 874 875 xfer->status = USBD_IN_PROGRESS; 876 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 877 usb_delay_ms(&sc->sc_bus, 1); 878 if (sc->sc_dying) 879 break; 880 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 881 sc->sc_eintrs; 882 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 883 #ifdef EHCI_DEBUG 884 if (ehcidebug > 15) 885 ehci_dump_regs(sc); 886 #endif 887 if (intrs) { 888 ehci_intr1(sc); 889 if (xfer->status != USBD_IN_PROGRESS) 890 return; 891 } 892 } 893 894 /* Timeout */ 895 DPRINTF(("ehci_waitintr: timeout\n")); 896 xfer->status = USBD_TIMEOUT; 897 usb_transfer_complete(xfer); 898 /* XXX should free TD */ 899 } 900 901 void 902 ehci_poll(struct usbd_bus *bus) 903 { 904 ehci_softc_t *sc = (ehci_softc_t *)bus; 905 #ifdef EHCI_DEBUG 906 static int last; 907 int new; 908 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 909 if (new != last) { 910 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 911 last = new; 912 } 913 #endif 914 915 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 916 ehci_intr1(sc); 917 } 918 919 int 920 ehci_detach(struct ehci_softc *sc, int flags) 921 { 922 int rv = 0; 923 924 if (sc->sc_child != NULL) 925 rv = config_detach(sc->sc_child, flags); 926 927 if (rv != 0) 928 return (rv); 929 930 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 931 932 if (sc->sc_powerhook != NULL) 933 powerhook_disestablish(sc->sc_powerhook); 934 if (sc->sc_shutdownhook != NULL) 935 shutdownhook_disestablish(sc->sc_shutdownhook); 936 937 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 938 939 /* XXX free other data structures XXX */ 940 941 return (rv); 942 } 943 944 945 int 946 ehci_activate(device_ptr_t self, enum devact act) 947 { 948 struct ehci_softc *sc = (struct ehci_softc *)self; 949 int rv = 0; 950 951 switch (act) { 952 case DVACT_ACTIVATE: 953 return (EOPNOTSUPP); 954 955 case DVACT_DEACTIVATE: 956 if (sc->sc_child != NULL) 957 rv = config_deactivate(sc->sc_child); 958 sc->sc_dying = 1; 959 break; 960 } 961 return (rv); 962 } 963 964 /* 965 * Handle suspend/resume. 966 * 967 * We need to switch to polling mode here, because this routine is 968 * called from an interrupt context. This is all right since we 969 * are almost suspended anyway. 970 */ 971 void 972 ehci_power(int why, void *v) 973 { 974 ehci_softc_t *sc = v; 975 u_int32_t cmd, hcr; 976 int s, i; 977 978 #ifdef EHCI_DEBUG 979 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 980 if (ehcidebug > 0) 981 ehci_dump_regs(sc); 982 #endif 983 984 s = splhardusb(); 985 switch (why) { 986 case PWR_SUSPEND: 987 case PWR_STANDBY: 988 sc->sc_bus.use_polling++; 989 990 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 991 992 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 993 EOWRITE4(sc, EHCI_USBCMD, cmd); 994 995 for (i = 0; i < 100; i++) { 996 hcr = EOREAD4(sc, EHCI_USBSTS) & 997 (EHCI_STS_ASS | EHCI_STS_PSS); 998 if (hcr == 0) 999 break; 1000 1001 usb_delay_ms(&sc->sc_bus, 1); 1002 } 1003 if (hcr != 0) { 1004 printf("%s: reset timeout\n", 1005 USBDEVNAME(sc->sc_bus.bdev)); 1006 } 1007 1008 cmd &= ~EHCI_CMD_RS; 1009 EOWRITE4(sc, EHCI_USBCMD, cmd); 1010 1011 for (i = 0; i < 100; i++) { 1012 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1013 if (hcr == EHCI_STS_HCH) 1014 break; 1015 1016 usb_delay_ms(&sc->sc_bus, 1); 1017 } 1018 if (hcr != EHCI_STS_HCH) { 1019 printf("%s: config timeout\n", 1020 USBDEVNAME(sc->sc_bus.bdev)); 1021 } 1022 1023 sc->sc_bus.use_polling--; 1024 break; 1025 1026 case PWR_RESUME: 1027 sc->sc_bus.use_polling++; 1028 1029 /* restore things in case the bios sucks */ 1030 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1031 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1032 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1033 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1034 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1035 1036 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1037 1038 for (i = 0; i < 100; i++) { 1039 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1040 if (hcr != EHCI_STS_HCH) 1041 break; 1042 1043 usb_delay_ms(&sc->sc_bus, 1); 1044 } 1045 if (hcr == EHCI_STS_HCH) { 1046 printf("%s: config timeout\n", 1047 USBDEVNAME(sc->sc_bus.bdev)); 1048 } 1049 1050 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1051 1052 sc->sc_bus.use_polling--; 1053 break; 1054 case PWR_SOFTSUSPEND: 1055 case PWR_SOFTSTANDBY: 1056 case PWR_SOFTRESUME: 1057 break; 1058 } 1059 splx(s); 1060 1061 #ifdef EHCI_DEBUG 1062 DPRINTF(("ehci_power: sc=%p\n", sc)); 1063 if (ehcidebug > 0) 1064 ehci_dump_regs(sc); 1065 #endif 1066 } 1067 1068 /* 1069 * Shut down the controller when the system is going down. 1070 */ 1071 void 1072 ehci_shutdown(void *v) 1073 { 1074 ehci_softc_t *sc = v; 1075 1076 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1077 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1078 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1079 } 1080 1081 usbd_status 1082 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1083 { 1084 struct ehci_softc *sc = (struct ehci_softc *)bus; 1085 usbd_status err; 1086 1087 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1088 if (err == USBD_NOMEM) 1089 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1090 #ifdef EHCI_DEBUG 1091 if (err) 1092 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1093 #endif 1094 return (err); 1095 } 1096 1097 void 1098 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1099 { 1100 struct ehci_softc *sc = (struct ehci_softc *)bus; 1101 1102 if (dma->block->flags & USB_DMA_RESERVE) { 1103 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1104 dma); 1105 return; 1106 } 1107 usb_freemem(&sc->sc_bus, dma); 1108 } 1109 1110 usbd_xfer_handle 1111 ehci_allocx(struct usbd_bus *bus) 1112 { 1113 struct ehci_softc *sc = (struct ehci_softc *)bus; 1114 usbd_xfer_handle xfer; 1115 1116 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1117 if (xfer != NULL) { 1118 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1119 #ifdef DIAGNOSTIC 1120 if (xfer->busy_free != XFER_FREE) { 1121 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1122 xfer->busy_free); 1123 } 1124 #endif 1125 } else { 1126 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1127 } 1128 if (xfer != NULL) { 1129 memset(xfer, 0, sizeof(struct ehci_xfer)); 1130 #ifdef DIAGNOSTIC 1131 EXFER(xfer)->isdone = 1; 1132 xfer->busy_free = XFER_BUSY; 1133 #endif 1134 } 1135 return (xfer); 1136 } 1137 1138 void 1139 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1140 { 1141 struct ehci_softc *sc = (struct ehci_softc *)bus; 1142 1143 #ifdef DIAGNOSTIC 1144 if (xfer->busy_free != XFER_BUSY) { 1145 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1146 xfer->busy_free); 1147 return; 1148 } 1149 xfer->busy_free = XFER_FREE; 1150 if (!EXFER(xfer)->isdone) { 1151 printf("ehci_freex: !isdone\n"); 1152 return; 1153 } 1154 #endif 1155 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1156 } 1157 1158 Static void 1159 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1160 { 1161 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1162 1163 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1164 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1165 #ifdef USB_DEBUG 1166 if (ehcidebug) 1167 usbd_dump_pipe(pipe); 1168 #endif 1169 epipe->nexttoggle = 0; 1170 } 1171 1172 Static void 1173 ehci_noop(usbd_pipe_handle pipe) 1174 { 1175 } 1176 1177 #ifdef EHCI_DEBUG 1178 void 1179 ehci_dump_regs(ehci_softc_t *sc) 1180 { 1181 int i; 1182 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1183 EOREAD4(sc, EHCI_USBCMD), 1184 EOREAD4(sc, EHCI_USBSTS), 1185 EOREAD4(sc, EHCI_USBINTR)); 1186 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1187 EOREAD4(sc, EHCI_FRINDEX), 1188 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1189 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1190 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1191 for (i = 1; i <= sc->sc_noport; i++) 1192 printf("port %d status=0x%08x\n", i, 1193 EOREAD4(sc, EHCI_PORTSC(i))); 1194 } 1195 1196 /* 1197 * Unused function - this is meant to be called from a kernel 1198 * debugger. 1199 */ 1200 void 1201 ehci_dump() 1202 { 1203 ehci_dump_regs(theehci); 1204 } 1205 1206 void 1207 ehci_dump_link(ehci_link_t link, int type) 1208 { 1209 link = le32toh(link); 1210 printf("0x%08x", link); 1211 if (link & EHCI_LINK_TERMINATE) 1212 printf("<T>"); 1213 else { 1214 printf("<"); 1215 if (type) { 1216 switch (EHCI_LINK_TYPE(link)) { 1217 case EHCI_LINK_ITD: printf("ITD"); break; 1218 case EHCI_LINK_QH: printf("QH"); break; 1219 case EHCI_LINK_SITD: printf("SITD"); break; 1220 case EHCI_LINK_FSTN: printf("FSTN"); break; 1221 } 1222 } 1223 printf(">"); 1224 } 1225 } 1226 1227 void 1228 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1229 { 1230 int i; 1231 u_int32_t stop; 1232 1233 stop = 0; 1234 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1235 ehci_dump_sqtd(sqtd); 1236 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1237 } 1238 if (sqtd) 1239 printf("dump aborted, too many TDs\n"); 1240 } 1241 1242 void 1243 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1244 { 1245 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1246 ehci_dump_qtd(&sqtd->qtd); 1247 } 1248 1249 void 1250 ehci_dump_qtd(ehci_qtd_t *qtd) 1251 { 1252 u_int32_t s; 1253 char sbuf[128]; 1254 1255 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1256 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1257 printf("\n"); 1258 s = le32toh(qtd->qtd_status); 1259 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1260 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1261 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1262 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1263 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1264 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1265 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1266 EHCI_QTD_GET_PID(s), sbuf); 1267 for (s = 0; s < 5; s++) 1268 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1269 } 1270 1271 void 1272 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1273 { 1274 ehci_qh_t *qh = &sqh->qh; 1275 u_int32_t endp, endphub; 1276 1277 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1278 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1279 endp = le32toh(qh->qh_endp); 1280 printf(" endp=0x%08x\n", endp); 1281 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1282 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1283 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1284 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1285 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1286 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1287 EHCI_QH_GET_NRL(endp)); 1288 endphub = le32toh(qh->qh_endphub); 1289 printf(" endphub=0x%08x\n", endphub); 1290 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1291 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1292 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1293 EHCI_QH_GET_MULT(endphub)); 1294 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1295 printf("Overlay qTD:\n"); 1296 ehci_dump_qtd(&qh->qh_qtd); 1297 } 1298 1299 #ifdef DIAGNOSTIC 1300 Static void 1301 ehci_dump_exfer(struct ehci_xfer *ex) 1302 { 1303 printf("ehci_dump_exfer: ex=%p\n", ex); 1304 } 1305 #endif 1306 #endif 1307 1308 usbd_status 1309 ehci_open(usbd_pipe_handle pipe) 1310 { 1311 usbd_device_handle dev = pipe->device; 1312 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1313 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1314 u_int8_t addr = dev->address; 1315 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1316 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1317 ehci_soft_qh_t *sqh; 1318 usbd_status err; 1319 int s; 1320 int ival, speed, naks; 1321 int hshubaddr, hshubport; 1322 1323 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1324 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1325 1326 if (dev->myhsport) { 1327 hshubaddr = dev->myhsport->parent->address; 1328 hshubport = dev->myhsport->portno; 1329 } else { 1330 hshubaddr = 0; 1331 hshubport = 0; 1332 } 1333 1334 if (sc->sc_dying) 1335 return (USBD_IOERROR); 1336 1337 epipe->nexttoggle = 0; 1338 1339 if (addr == sc->sc_addr) { 1340 switch (ed->bEndpointAddress) { 1341 case USB_CONTROL_ENDPOINT: 1342 pipe->methods = &ehci_root_ctrl_methods; 1343 break; 1344 case UE_DIR_IN | EHCI_INTR_ENDPT: 1345 pipe->methods = &ehci_root_intr_methods; 1346 break; 1347 default: 1348 return (USBD_INVAL); 1349 } 1350 return (USBD_NORMAL_COMPLETION); 1351 } 1352 1353 /* XXX All this stuff is only valid for async. */ 1354 switch (dev->speed) { 1355 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1356 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1357 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1358 default: panic("ehci_open: bad device speed %d", dev->speed); 1359 } 1360 if (speed != EHCI_QH_SPEED_HIGH) { 1361 printf("%s: *** WARNING: opening low/full speed device, this " 1362 "may not work yet.\n", 1363 USBDEVNAME(sc->sc_bus.bdev)); 1364 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1365 hshubaddr, hshubport)); 1366 #if 0 1367 if (xfertype != UE_CONTROL) 1368 return USBD_INVAL; 1369 #endif 1370 } 1371 1372 naks = 8; /* XXX */ 1373 sqh = ehci_alloc_sqh(sc); 1374 if (sqh == NULL) 1375 goto bad0; 1376 /* qh_link filled when the QH is added */ 1377 sqh->qh.qh_endp = htole32( 1378 EHCI_QH_SET_ADDR(addr) | 1379 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1380 EHCI_QH_SET_EPS(speed) | 1381 EHCI_QH_DTC | 1382 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1383 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1384 EHCI_QH_CTL : 0) | 1385 EHCI_QH_SET_NRL(naks) 1386 ); 1387 sqh->qh.qh_endphub = htole32( 1388 EHCI_QH_SET_MULT(1) | 1389 EHCI_QH_SET_HUBA(hshubaddr) | 1390 EHCI_QH_SET_PORT(hshubport) | 1391 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1392 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1393 ); 1394 sqh->qh.qh_curqtd = EHCI_NULL; 1395 /* Fill the overlay qTD */ 1396 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1397 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1398 sqh->qh.qh_qtd.qtd_status = htole32(0); 1399 1400 epipe->sqh = sqh; 1401 1402 switch (xfertype) { 1403 case UE_CONTROL: 1404 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1405 0, &epipe->u.ctl.reqdma); 1406 #ifdef EHCI_DEBUG 1407 if (err) 1408 printf("ehci_open: usb_allocmem()=%d\n", err); 1409 #endif 1410 if (err) 1411 goto bad1; 1412 pipe->methods = &ehci_device_ctrl_methods; 1413 s = splusb(); 1414 ehci_add_qh(sqh, sc->sc_async_head); 1415 splx(s); 1416 break; 1417 case UE_BULK: 1418 pipe->methods = &ehci_device_bulk_methods; 1419 s = splusb(); 1420 ehci_add_qh(sqh, sc->sc_async_head); 1421 splx(s); 1422 break; 1423 case UE_INTERRUPT: 1424 pipe->methods = &ehci_device_intr_methods; 1425 ival = pipe->interval; 1426 if (ival == USBD_DEFAULT_INTERVAL) 1427 ival = ed->bInterval; 1428 return (ehci_device_setintr(sc, sqh, ival)); 1429 case UE_ISOCHRONOUS: 1430 pipe->methods = &ehci_device_isoc_methods; 1431 return (USBD_INVAL); 1432 default: 1433 return (USBD_INVAL); 1434 } 1435 return (USBD_NORMAL_COMPLETION); 1436 1437 bad1: 1438 ehci_free_sqh(sc, sqh); 1439 bad0: 1440 return (USBD_NOMEM); 1441 } 1442 1443 /* 1444 * Add an ED to the schedule. Called at splusb(). 1445 */ 1446 void 1447 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1448 { 1449 SPLUSBCHECK; 1450 1451 sqh->next = head->next; 1452 sqh->qh.qh_link = head->qh.qh_link; 1453 head->next = sqh; 1454 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1455 1456 #ifdef EHCI_DEBUG 1457 if (ehcidebug > 5) { 1458 printf("ehci_add_qh:\n"); 1459 ehci_dump_sqh(sqh); 1460 } 1461 #endif 1462 } 1463 1464 /* 1465 * Remove an ED from the schedule. Called at splusb(). 1466 */ 1467 void 1468 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1469 { 1470 ehci_soft_qh_t *p; 1471 1472 SPLUSBCHECK; 1473 /* XXX */ 1474 for (p = head; p != NULL && p->next != sqh; p = p->next) 1475 ; 1476 if (p == NULL) 1477 panic("ehci_rem_qh: ED not found"); 1478 p->next = sqh->next; 1479 p->qh.qh_link = sqh->qh.qh_link; 1480 1481 ehci_sync_hc(sc); 1482 } 1483 1484 void 1485 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1486 { 1487 int i; 1488 u_int32_t status; 1489 1490 /* Save toggle bit and ping status. */ 1491 status = sqh->qh.qh_qtd.qtd_status & 1492 htole32(EHCI_QTD_TOGGLE_MASK | 1493 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1494 /* Set HALTED to make hw leave it alone. */ 1495 sqh->qh.qh_qtd.qtd_status = 1496 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1497 sqh->qh.qh_curqtd = 0; 1498 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1499 sqh->qh.qh_qtd.qtd_altnext = 0; 1500 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1501 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1502 sqh->sqtd = sqtd; 1503 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1504 sqh->qh.qh_qtd.qtd_status = status; 1505 } 1506 1507 /* 1508 * Ensure that the HC has released all references to the QH. We do this 1509 * by asking for a Async Advance Doorbell interrupt and then we wait for 1510 * the interrupt. 1511 * To make this easier we first obtain exclusive use of the doorbell. 1512 */ 1513 void 1514 ehci_sync_hc(ehci_softc_t *sc) 1515 { 1516 int s, error; 1517 1518 if (sc->sc_dying) { 1519 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1520 return; 1521 } 1522 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1523 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1524 s = splhardusb(); 1525 /* ask for doorbell */ 1526 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1527 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1528 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1529 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1530 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1531 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1532 splx(s); 1533 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1534 #ifdef DIAGNOSTIC 1535 if (error) 1536 printf("ehci_sync_hc: tsleep() = %d\n", error); 1537 #endif 1538 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1539 } 1540 1541 /***********/ 1542 1543 /* 1544 * Data structures and routines to emulate the root hub. 1545 */ 1546 Static usb_device_descriptor_t ehci_devd = { 1547 USB_DEVICE_DESCRIPTOR_SIZE, 1548 UDESC_DEVICE, /* type */ 1549 {0x00, 0x02}, /* USB version */ 1550 UDCLASS_HUB, /* class */ 1551 UDSUBCLASS_HUB, /* subclass */ 1552 UDPROTO_HSHUBSTT, /* protocol */ 1553 64, /* max packet */ 1554 {0},{0},{0x00,0x01}, /* device id */ 1555 1,2,0, /* string indicies */ 1556 1 /* # of configurations */ 1557 }; 1558 1559 Static usb_device_qualifier_t ehci_odevd = { 1560 USB_DEVICE_DESCRIPTOR_SIZE, 1561 UDESC_DEVICE_QUALIFIER, /* type */ 1562 {0x00, 0x02}, /* USB version */ 1563 UDCLASS_HUB, /* class */ 1564 UDSUBCLASS_HUB, /* subclass */ 1565 UDPROTO_FSHUB, /* protocol */ 1566 64, /* max packet */ 1567 1, /* # of configurations */ 1568 0 1569 }; 1570 1571 Static usb_config_descriptor_t ehci_confd = { 1572 USB_CONFIG_DESCRIPTOR_SIZE, 1573 UDESC_CONFIG, 1574 {USB_CONFIG_DESCRIPTOR_SIZE + 1575 USB_INTERFACE_DESCRIPTOR_SIZE + 1576 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1577 1, 1578 1, 1579 0, 1580 UC_SELF_POWERED, 1581 0 /* max power */ 1582 }; 1583 1584 Static usb_interface_descriptor_t ehci_ifcd = { 1585 USB_INTERFACE_DESCRIPTOR_SIZE, 1586 UDESC_INTERFACE, 1587 0, 1588 0, 1589 1, 1590 UICLASS_HUB, 1591 UISUBCLASS_HUB, 1592 UIPROTO_HSHUBSTT, 1593 0 1594 }; 1595 1596 Static usb_endpoint_descriptor_t ehci_endpd = { 1597 USB_ENDPOINT_DESCRIPTOR_SIZE, 1598 UDESC_ENDPOINT, 1599 UE_DIR_IN | EHCI_INTR_ENDPT, 1600 UE_INTERRUPT, 1601 {8, 0}, /* max packet */ 1602 255 1603 }; 1604 1605 Static usb_hub_descriptor_t ehci_hubd = { 1606 USB_HUB_DESCRIPTOR_SIZE, 1607 UDESC_HUB, 1608 0, 1609 {0,0}, 1610 0, 1611 0, 1612 {0}, 1613 }; 1614 1615 Static int 1616 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1617 { 1618 int i; 1619 1620 if (l == 0) 1621 return (0); 1622 p->bLength = 2 * strlen(s) + 2; 1623 if (l == 1) 1624 return (1); 1625 p->bDescriptorType = UDESC_STRING; 1626 l -= 2; 1627 for (i = 0; s[i] && l > 1; i++, l -= 2) 1628 USETW2(p->bString[i], 0, s[i]); 1629 return (2*i+2); 1630 } 1631 1632 /* 1633 * Simulate a hardware hub by handling all the necessary requests. 1634 */ 1635 Static usbd_status 1636 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1637 { 1638 usbd_status err; 1639 1640 /* Insert last in queue. */ 1641 err = usb_insert_transfer(xfer); 1642 if (err) 1643 return (err); 1644 1645 /* Pipe isn't running, start first */ 1646 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1647 } 1648 1649 Static usbd_status 1650 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1651 { 1652 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1653 usb_device_request_t *req; 1654 void *buf = NULL; 1655 int port, i; 1656 int s, len, value, index, l, totlen = 0; 1657 usb_port_status_t ps; 1658 usb_hub_descriptor_t hubd; 1659 usbd_status err; 1660 u_int32_t v; 1661 1662 if (sc->sc_dying) 1663 return (USBD_IOERROR); 1664 1665 #ifdef DIAGNOSTIC 1666 if (!(xfer->rqflags & URQ_REQUEST)) 1667 /* XXX panic */ 1668 return (USBD_INVAL); 1669 #endif 1670 req = &xfer->request; 1671 1672 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1673 req->bmRequestType, req->bRequest)); 1674 1675 len = UGETW(req->wLength); 1676 value = UGETW(req->wValue); 1677 index = UGETW(req->wIndex); 1678 1679 if (len != 0) 1680 buf = KERNADDR(&xfer->dmabuf, 0); 1681 1682 #define C(x,y) ((x) | ((y) << 8)) 1683 switch(C(req->bRequest, req->bmRequestType)) { 1684 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1685 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1686 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1687 /* 1688 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1689 * for the integrated root hub. 1690 */ 1691 break; 1692 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1693 if (len > 0) { 1694 *(u_int8_t *)buf = sc->sc_conf; 1695 totlen = 1; 1696 } 1697 break; 1698 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1699 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1700 switch(value >> 8) { 1701 case UDESC_DEVICE: 1702 if ((value & 0xff) != 0) { 1703 err = USBD_IOERROR; 1704 goto ret; 1705 } 1706 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1707 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1708 memcpy(buf, &ehci_devd, l); 1709 break; 1710 /* 1711 * We can't really operate at another speed, but the spec says 1712 * we need this descriptor. 1713 */ 1714 case UDESC_DEVICE_QUALIFIER: 1715 if ((value & 0xff) != 0) { 1716 err = USBD_IOERROR; 1717 goto ret; 1718 } 1719 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1720 memcpy(buf, &ehci_odevd, l); 1721 break; 1722 /* 1723 * We can't really operate at another speed, but the spec says 1724 * we need this descriptor. 1725 */ 1726 case UDESC_OTHER_SPEED_CONFIGURATION: 1727 case UDESC_CONFIG: 1728 if ((value & 0xff) != 0) { 1729 err = USBD_IOERROR; 1730 goto ret; 1731 } 1732 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1733 memcpy(buf, &ehci_confd, l); 1734 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1735 value >> 8; 1736 buf = (char *)buf + l; 1737 len -= l; 1738 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1739 totlen += l; 1740 memcpy(buf, &ehci_ifcd, l); 1741 buf = (char *)buf + l; 1742 len -= l; 1743 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1744 totlen += l; 1745 memcpy(buf, &ehci_endpd, l); 1746 break; 1747 case UDESC_STRING: 1748 if (len == 0) 1749 break; 1750 *(u_int8_t *)buf = 0; 1751 totlen = 1; 1752 switch (value & 0xff) { 1753 case 0: /* Language table */ 1754 totlen = ehci_str(buf, len, "\001"); 1755 break; 1756 case 1: /* Vendor */ 1757 totlen = ehci_str(buf, len, sc->sc_vendor); 1758 break; 1759 case 2: /* Product */ 1760 totlen = ehci_str(buf, len, "EHCI root hub"); 1761 break; 1762 } 1763 break; 1764 default: 1765 err = USBD_IOERROR; 1766 goto ret; 1767 } 1768 break; 1769 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1770 if (len > 0) { 1771 *(u_int8_t *)buf = 0; 1772 totlen = 1; 1773 } 1774 break; 1775 case C(UR_GET_STATUS, UT_READ_DEVICE): 1776 if (len > 1) { 1777 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1778 totlen = 2; 1779 } 1780 break; 1781 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1782 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1783 if (len > 1) { 1784 USETW(((usb_status_t *)buf)->wStatus, 0); 1785 totlen = 2; 1786 } 1787 break; 1788 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1789 if (value >= USB_MAX_DEVICES) { 1790 err = USBD_IOERROR; 1791 goto ret; 1792 } 1793 sc->sc_addr = value; 1794 break; 1795 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1796 if (value != 0 && value != 1) { 1797 err = USBD_IOERROR; 1798 goto ret; 1799 } 1800 sc->sc_conf = value; 1801 break; 1802 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1803 break; 1804 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1805 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1806 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1807 err = USBD_IOERROR; 1808 goto ret; 1809 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1810 break; 1811 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1812 break; 1813 /* Hub requests */ 1814 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1815 break; 1816 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1817 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1818 "port=%d feature=%d\n", 1819 index, value)); 1820 if (index < 1 || index > sc->sc_noport) { 1821 err = USBD_IOERROR; 1822 goto ret; 1823 } 1824 port = EHCI_PORTSC(index); 1825 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1826 switch(value) { 1827 case UHF_PORT_ENABLE: 1828 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1829 break; 1830 case UHF_PORT_SUSPEND: 1831 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1832 break; 1833 case UHF_PORT_POWER: 1834 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1835 break; 1836 case UHF_PORT_TEST: 1837 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1838 "%d\n", index)); 1839 break; 1840 case UHF_PORT_INDICATOR: 1841 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1842 "%d\n", index)); 1843 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1844 break; 1845 case UHF_C_PORT_CONNECTION: 1846 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1847 break; 1848 case UHF_C_PORT_ENABLE: 1849 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1850 break; 1851 case UHF_C_PORT_SUSPEND: 1852 /* how? */ 1853 break; 1854 case UHF_C_PORT_OVER_CURRENT: 1855 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1856 break; 1857 case UHF_C_PORT_RESET: 1858 sc->sc_isreset = 0; 1859 break; 1860 default: 1861 err = USBD_IOERROR; 1862 goto ret; 1863 } 1864 #if 0 1865 switch(value) { 1866 case UHF_C_PORT_CONNECTION: 1867 case UHF_C_PORT_ENABLE: 1868 case UHF_C_PORT_SUSPEND: 1869 case UHF_C_PORT_OVER_CURRENT: 1870 case UHF_C_PORT_RESET: 1871 /* Enable RHSC interrupt if condition is cleared. */ 1872 if ((OREAD4(sc, port) >> 16) == 0) 1873 ehci_pcd_able(sc, 1); 1874 break; 1875 default: 1876 break; 1877 } 1878 #endif 1879 break; 1880 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1881 if ((value & 0xff) != 0) { 1882 err = USBD_IOERROR; 1883 goto ret; 1884 } 1885 hubd = ehci_hubd; 1886 hubd.bNbrPorts = sc->sc_noport; 1887 v = EOREAD4(sc, EHCI_HCSPARAMS); 1888 USETW(hubd.wHubCharacteristics, 1889 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1890 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1891 ? UHD_PORT_IND : 0); 1892 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1893 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1894 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1895 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1896 l = min(len, hubd.bDescLength); 1897 totlen = l; 1898 memcpy(buf, &hubd, l); 1899 break; 1900 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1901 if (len != 4) { 1902 err = USBD_IOERROR; 1903 goto ret; 1904 } 1905 memset(buf, 0, len); /* ? XXX */ 1906 totlen = len; 1907 break; 1908 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1909 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1910 index)); 1911 if (index < 1 || index > sc->sc_noport) { 1912 err = USBD_IOERROR; 1913 goto ret; 1914 } 1915 if (len != 4) { 1916 err = USBD_IOERROR; 1917 goto ret; 1918 } 1919 v = EOREAD4(sc, EHCI_PORTSC(index)); 1920 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1921 v)); 1922 i = UPS_HIGH_SPEED; 1923 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1924 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1925 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1926 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1927 if (v & EHCI_PS_PR) i |= UPS_RESET; 1928 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1929 USETW(ps.wPortStatus, i); 1930 i = 0; 1931 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1932 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1933 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1934 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1935 USETW(ps.wPortChange, i); 1936 l = min(len, sizeof ps); 1937 memcpy(buf, &ps, l); 1938 totlen = l; 1939 break; 1940 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1941 err = USBD_IOERROR; 1942 goto ret; 1943 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1944 break; 1945 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1946 if (index < 1 || index > sc->sc_noport) { 1947 err = USBD_IOERROR; 1948 goto ret; 1949 } 1950 port = EHCI_PORTSC(index); 1951 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1952 switch(value) { 1953 case UHF_PORT_ENABLE: 1954 EOWRITE4(sc, port, v | EHCI_PS_PE); 1955 break; 1956 case UHF_PORT_SUSPEND: 1957 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1958 break; 1959 case UHF_PORT_RESET: 1960 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1961 index)); 1962 if (EHCI_PS_IS_LOWSPEED(v)) { 1963 /* Low speed device, give up ownership. */ 1964 ehci_disown(sc, index, 1); 1965 break; 1966 } 1967 /* Start reset sequence. */ 1968 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1969 EOWRITE4(sc, port, v | EHCI_PS_PR); 1970 /* Wait for reset to complete. */ 1971 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1972 if (sc->sc_dying) { 1973 err = USBD_IOERROR; 1974 goto ret; 1975 } 1976 /* Terminate reset sequence. */ 1977 EOWRITE4(sc, port, v); 1978 /* Wait for HC to complete reset. */ 1979 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1980 if (sc->sc_dying) { 1981 err = USBD_IOERROR; 1982 goto ret; 1983 } 1984 v = EOREAD4(sc, port); 1985 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 1986 if (v & EHCI_PS_PR) { 1987 printf("%s: port reset timeout\n", 1988 USBDEVNAME(sc->sc_bus.bdev)); 1989 return (USBD_TIMEOUT); 1990 } 1991 if (!(v & EHCI_PS_PE)) { 1992 /* Not a high speed device, give up ownership.*/ 1993 ehci_disown(sc, index, 0); 1994 break; 1995 } 1996 sc->sc_isreset = 1; 1997 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 1998 index, v)); 1999 break; 2000 case UHF_PORT_POWER: 2001 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2002 "%d\n", index)); 2003 EOWRITE4(sc, port, v | EHCI_PS_PP); 2004 break; 2005 case UHF_PORT_TEST: 2006 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2007 "%d\n", index)); 2008 break; 2009 case UHF_PORT_INDICATOR: 2010 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2011 "%d\n", index)); 2012 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2013 break; 2014 default: 2015 err = USBD_IOERROR; 2016 goto ret; 2017 } 2018 break; 2019 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2020 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2021 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2022 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2023 break; 2024 default: 2025 err = USBD_IOERROR; 2026 goto ret; 2027 } 2028 xfer->actlen = totlen; 2029 err = USBD_NORMAL_COMPLETION; 2030 ret: 2031 xfer->status = err; 2032 s = splusb(); 2033 usb_transfer_complete(xfer); 2034 splx(s); 2035 return (USBD_IN_PROGRESS); 2036 } 2037 2038 void 2039 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2040 { 2041 int port; 2042 u_int32_t v; 2043 2044 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2045 #ifdef DIAGNOSTIC 2046 if (sc->sc_npcomp != 0) { 2047 int i = (index-1) / sc->sc_npcomp; 2048 if (i >= sc->sc_ncomp) 2049 printf("%s: strange port\n", 2050 USBDEVNAME(sc->sc_bus.bdev)); 2051 else 2052 printf("%s: handing over %s speed device on " 2053 "port %d to %s\n", 2054 USBDEVNAME(sc->sc_bus.bdev), 2055 lowspeed ? "low" : "full", 2056 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2057 } else { 2058 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2059 } 2060 #endif 2061 port = EHCI_PORTSC(index); 2062 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2063 EOWRITE4(sc, port, v | EHCI_PS_PO); 2064 } 2065 2066 /* Abort a root control request. */ 2067 Static void 2068 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2069 { 2070 /* Nothing to do, all transfers are synchronous. */ 2071 } 2072 2073 /* Close the root pipe. */ 2074 Static void 2075 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2076 { 2077 DPRINTF(("ehci_root_ctrl_close\n")); 2078 /* Nothing to do. */ 2079 } 2080 2081 void 2082 ehci_root_intr_done(usbd_xfer_handle xfer) 2083 { 2084 xfer->hcpriv = NULL; 2085 } 2086 2087 Static usbd_status 2088 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2089 { 2090 usbd_status err; 2091 2092 /* Insert last in queue. */ 2093 err = usb_insert_transfer(xfer); 2094 if (err) 2095 return (err); 2096 2097 /* Pipe isn't running, start first */ 2098 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2099 } 2100 2101 Static usbd_status 2102 ehci_root_intr_start(usbd_xfer_handle xfer) 2103 { 2104 usbd_pipe_handle pipe = xfer->pipe; 2105 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2106 2107 if (sc->sc_dying) 2108 return (USBD_IOERROR); 2109 2110 sc->sc_intrxfer = xfer; 2111 2112 return (USBD_IN_PROGRESS); 2113 } 2114 2115 /* Abort a root interrupt request. */ 2116 Static void 2117 ehci_root_intr_abort(usbd_xfer_handle xfer) 2118 { 2119 int s; 2120 2121 if (xfer->pipe->intrxfer == xfer) { 2122 DPRINTF(("ehci_root_intr_abort: remove\n")); 2123 xfer->pipe->intrxfer = NULL; 2124 } 2125 xfer->status = USBD_CANCELLED; 2126 s = splusb(); 2127 usb_transfer_complete(xfer); 2128 splx(s); 2129 } 2130 2131 /* Close the root pipe. */ 2132 Static void 2133 ehci_root_intr_close(usbd_pipe_handle pipe) 2134 { 2135 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2136 2137 DPRINTF(("ehci_root_intr_close\n")); 2138 2139 sc->sc_intrxfer = NULL; 2140 } 2141 2142 void 2143 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2144 { 2145 xfer->hcpriv = NULL; 2146 } 2147 2148 /************************/ 2149 2150 ehci_soft_qh_t * 2151 ehci_alloc_sqh(ehci_softc_t *sc) 2152 { 2153 ehci_soft_qh_t *sqh; 2154 usbd_status err; 2155 int i, offs; 2156 usb_dma_t dma; 2157 2158 if (sc->sc_freeqhs == NULL) { 2159 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2160 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2161 EHCI_PAGE_SIZE, &dma); 2162 #ifdef EHCI_DEBUG 2163 if (err) 2164 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2165 #endif 2166 if (err) 2167 return (NULL); 2168 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2169 offs = i * EHCI_SQH_SIZE; 2170 sqh = KERNADDR(&dma, offs); 2171 sqh->physaddr = DMAADDR(&dma, offs); 2172 sqh->next = sc->sc_freeqhs; 2173 sc->sc_freeqhs = sqh; 2174 } 2175 } 2176 sqh = sc->sc_freeqhs; 2177 sc->sc_freeqhs = sqh->next; 2178 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2179 sqh->next = NULL; 2180 return (sqh); 2181 } 2182 2183 void 2184 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2185 { 2186 sqh->next = sc->sc_freeqhs; 2187 sc->sc_freeqhs = sqh; 2188 } 2189 2190 ehci_soft_qtd_t * 2191 ehci_alloc_sqtd(ehci_softc_t *sc) 2192 { 2193 ehci_soft_qtd_t *sqtd; 2194 usbd_status err; 2195 int i, offs; 2196 usb_dma_t dma; 2197 int s; 2198 2199 if (sc->sc_freeqtds == NULL) { 2200 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2201 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2202 EHCI_PAGE_SIZE, &dma); 2203 #ifdef EHCI_DEBUG 2204 if (err) 2205 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2206 #endif 2207 if (err) 2208 return (NULL); 2209 s = splusb(); 2210 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2211 offs = i * EHCI_SQTD_SIZE; 2212 sqtd = KERNADDR(&dma, offs); 2213 sqtd->physaddr = DMAADDR(&dma, offs); 2214 sqtd->nextqtd = sc->sc_freeqtds; 2215 sc->sc_freeqtds = sqtd; 2216 } 2217 splx(s); 2218 } 2219 2220 s = splusb(); 2221 sqtd = sc->sc_freeqtds; 2222 sc->sc_freeqtds = sqtd->nextqtd; 2223 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2224 sqtd->nextqtd = NULL; 2225 sqtd->xfer = NULL; 2226 splx(s); 2227 2228 return (sqtd); 2229 } 2230 2231 void 2232 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2233 { 2234 int s; 2235 2236 s = splusb(); 2237 sqtd->nextqtd = sc->sc_freeqtds; 2238 sc->sc_freeqtds = sqtd; 2239 splx(s); 2240 } 2241 2242 usbd_status 2243 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2244 int alen, int rd, usbd_xfer_handle xfer, 2245 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2246 { 2247 ehci_soft_qtd_t *next, *cur; 2248 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2249 u_int32_t qtdstatus; 2250 int len, curlen, mps; 2251 int i, tog; 2252 usb_dma_t *dma = &xfer->dmabuf; 2253 2254 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2255 2256 len = alen; 2257 dataphys = DMAADDR(dma, 0); 2258 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2259 #if 0 2260 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2261 epipe->nexttoggle); 2262 #endif 2263 qtdstatus = EHCI_QTD_ACTIVE | 2264 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2265 EHCI_QTD_SET_CERR(3) 2266 /* IOC set below */ 2267 /* BYTES set below */ 2268 ; 2269 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2270 tog = epipe->nexttoggle; 2271 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2272 2273 cur = ehci_alloc_sqtd(sc); 2274 *sp = cur; 2275 if (cur == NULL) 2276 goto nomem; 2277 for (;;) { 2278 dataphyspage = EHCI_PAGE(dataphys); 2279 /* The EHCI hardware can handle at most 5 pages. */ 2280 if (dataphyslastpage - dataphyspage < 2281 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2282 /* we can handle it in this QTD */ 2283 curlen = len; 2284 } else { 2285 /* must use multiple TDs, fill as much as possible. */ 2286 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2287 EHCI_PAGE_OFFSET(dataphys); 2288 #ifdef DIAGNOSTIC 2289 if (curlen > len) { 2290 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2291 "len=0x%x offs=0x%x\n", curlen, len, 2292 EHCI_PAGE_OFFSET(dataphys)); 2293 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2294 dataphyslastpage, dataphyspage, 2295 dataphys); 2296 curlen = len; 2297 } 2298 #endif 2299 /* the length must be a multiple of the max size */ 2300 curlen -= curlen % mps; 2301 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2302 "curlen=%d\n", curlen)); 2303 #ifdef DIAGNOSTIC 2304 if (curlen == 0) 2305 panic("ehci_alloc_std: curlen == 0"); 2306 #endif 2307 } 2308 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2309 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2310 dataphys, dataphyslastpage, 2311 len, curlen)); 2312 len -= curlen; 2313 2314 if (len != 0) { 2315 next = ehci_alloc_sqtd(sc); 2316 if (next == NULL) 2317 goto nomem; 2318 nextphys = htole32(next->physaddr); 2319 } else { 2320 next = NULL; 2321 nextphys = EHCI_NULL; 2322 } 2323 2324 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2325 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2326 if (i != 0) /* use offset only in first buffer */ 2327 a = EHCI_PAGE(a); 2328 cur->qtd.qtd_buffer[i] = htole32(a); 2329 cur->qtd.qtd_buffer_hi[i] = 0; 2330 #ifdef DIAGNOSTIC 2331 if (i >= EHCI_QTD_NBUFFERS) { 2332 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2333 goto nomem; 2334 } 2335 #endif 2336 } 2337 cur->nextqtd = next; 2338 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2339 cur->qtd.qtd_status = 2340 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2341 cur->xfer = xfer; 2342 cur->len = curlen; 2343 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2344 dataphys, dataphys + curlen)); 2345 /* adjust the toggle based on the number of packets in this 2346 qtd */ 2347 if (((curlen + mps - 1) / mps) & 1) { 2348 tog ^= 1; 2349 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2350 } 2351 if (len == 0) 2352 break; 2353 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2354 dataphys += curlen; 2355 cur = next; 2356 } 2357 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2358 *ep = cur; 2359 epipe->nexttoggle = tog; 2360 2361 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2362 *sp, *ep)); 2363 2364 return (USBD_NORMAL_COMPLETION); 2365 2366 nomem: 2367 /* XXX free chain */ 2368 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2369 return (USBD_NOMEM); 2370 } 2371 2372 Static void 2373 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2374 ehci_soft_qtd_t *sqtdend) 2375 { 2376 ehci_soft_qtd_t *p; 2377 int i; 2378 2379 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2380 sqtd, sqtdend)); 2381 2382 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2383 p = sqtd->nextqtd; 2384 ehci_free_sqtd(sc, sqtd); 2385 } 2386 } 2387 2388 /****************/ 2389 2390 /* 2391 * Close a reqular pipe. 2392 * Assumes that there are no pending transactions. 2393 */ 2394 void 2395 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2396 { 2397 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2398 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2399 ehci_soft_qh_t *sqh = epipe->sqh; 2400 int s; 2401 2402 s = splusb(); 2403 ehci_rem_qh(sc, sqh, head); 2404 splx(s); 2405 ehci_free_sqh(sc, epipe->sqh); 2406 } 2407 2408 /* 2409 * Abort a device request. 2410 * If this routine is called at splusb() it guarantees that the request 2411 * will be removed from the hardware scheduling and that the callback 2412 * for it will be called with USBD_CANCELLED status. 2413 * It's impossible to guarantee that the requested transfer will not 2414 * have happened since the hardware runs concurrently. 2415 * If the transaction has already happened we rely on the ordinary 2416 * interrupt processing to process it. 2417 * XXX This is most probably wrong. 2418 */ 2419 void 2420 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2421 { 2422 #define exfer EXFER(xfer) 2423 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2424 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2425 ehci_soft_qh_t *sqh = epipe->sqh; 2426 ehci_soft_qtd_t *sqtd; 2427 ehci_physaddr_t cur; 2428 u_int32_t qhstatus; 2429 int s; 2430 int hit; 2431 2432 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2433 2434 if (sc->sc_dying) { 2435 /* If we're dying, just do the software part. */ 2436 s = splusb(); 2437 xfer->status = status; /* make software ignore it */ 2438 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2439 usb_transfer_complete(xfer); 2440 splx(s); 2441 return; 2442 } 2443 2444 if (xfer->device->bus->intr_context || !curproc) 2445 panic("ehci_abort_xfer: not in process context"); 2446 2447 /* 2448 * Step 1: Make interrupt routine and hardware ignore xfer. 2449 */ 2450 s = splusb(); 2451 xfer->status = status; /* make software ignore it */ 2452 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2453 qhstatus = sqh->qh.qh_qtd.qtd_status; 2454 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2455 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2456 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2457 if (sqtd == exfer->sqtdend) 2458 break; 2459 } 2460 splx(s); 2461 2462 /* 2463 * Step 2: Wait until we know hardware has finished any possible 2464 * use of the xfer. Also make sure the soft interrupt routine 2465 * has run. 2466 */ 2467 ehci_sync_hc(sc); 2468 s = splusb(); 2469 #ifdef USB_USE_SOFTINTR 2470 sc->sc_softwake = 1; 2471 #endif /* USB_USE_SOFTINTR */ 2472 usb_schedsoftintr(&sc->sc_bus); 2473 #ifdef USB_USE_SOFTINTR 2474 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2475 #endif /* USB_USE_SOFTINTR */ 2476 splx(s); 2477 2478 /* 2479 * Step 3: Remove any vestiges of the xfer from the hardware. 2480 * The complication here is that the hardware may have executed 2481 * beyond the xfer we're trying to abort. So as we're scanning 2482 * the TDs of this xfer we check if the hardware points to 2483 * any of them. 2484 */ 2485 s = splusb(); /* XXX why? */ 2486 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2487 hit = 0; 2488 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2489 hit |= cur == sqtd->physaddr; 2490 if (sqtd == exfer->sqtdend) 2491 break; 2492 } 2493 sqtd = sqtd->nextqtd; 2494 /* Zap curqtd register if hardware pointed inside the xfer. */ 2495 if (hit && sqtd != NULL) { 2496 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2497 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2498 sqh->qh.qh_qtd.qtd_status = qhstatus; 2499 } else { 2500 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2501 } 2502 2503 /* 2504 * Step 4: Execute callback. 2505 */ 2506 #ifdef DIAGNOSTIC 2507 exfer->isdone = 1; 2508 #endif 2509 usb_transfer_complete(xfer); 2510 2511 splx(s); 2512 #undef exfer 2513 } 2514 2515 void 2516 ehci_timeout(void *addr) 2517 { 2518 struct ehci_xfer *exfer = addr; 2519 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2520 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2521 2522 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2523 #ifdef USB_DEBUG 2524 if (ehcidebug > 1) 2525 usbd_dump_pipe(exfer->xfer.pipe); 2526 #endif 2527 2528 if (sc->sc_dying) { 2529 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2530 return; 2531 } 2532 2533 /* Execute the abort in a process context. */ 2534 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2535 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2536 } 2537 2538 void 2539 ehci_timeout_task(void *addr) 2540 { 2541 usbd_xfer_handle xfer = addr; 2542 int s; 2543 2544 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2545 2546 s = splusb(); 2547 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2548 splx(s); 2549 } 2550 2551 /************************/ 2552 2553 Static usbd_status 2554 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2555 { 2556 usbd_status err; 2557 2558 /* Insert last in queue. */ 2559 err = usb_insert_transfer(xfer); 2560 if (err) 2561 return (err); 2562 2563 /* Pipe isn't running, start first */ 2564 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2565 } 2566 2567 Static usbd_status 2568 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2569 { 2570 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2571 usbd_status err; 2572 2573 if (sc->sc_dying) 2574 return (USBD_IOERROR); 2575 2576 #ifdef DIAGNOSTIC 2577 if (!(xfer->rqflags & URQ_REQUEST)) { 2578 /* XXX panic */ 2579 printf("ehci_device_ctrl_transfer: not a request\n"); 2580 return (USBD_INVAL); 2581 } 2582 #endif 2583 2584 err = ehci_device_request(xfer); 2585 if (err) 2586 return (err); 2587 2588 if (sc->sc_bus.use_polling) 2589 ehci_waitintr(sc, xfer); 2590 return (USBD_IN_PROGRESS); 2591 } 2592 2593 void 2594 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2595 { 2596 struct ehci_xfer *ex = EXFER(xfer); 2597 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2598 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2599 2600 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2601 2602 #ifdef DIAGNOSTIC 2603 if (!(xfer->rqflags & URQ_REQUEST)) { 2604 panic("ehci_ctrl_done: not a request"); 2605 } 2606 #endif 2607 2608 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2609 ehci_del_intr_list(ex); /* remove from active list */ 2610 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2611 } 2612 2613 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2614 } 2615 2616 /* Abort a device control request. */ 2617 Static void 2618 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2619 { 2620 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2621 ehci_abort_xfer(xfer, USBD_CANCELLED); 2622 } 2623 2624 /* Close a device control pipe. */ 2625 Static void 2626 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2627 { 2628 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2629 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2630 2631 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2632 ehci_close_pipe(pipe, sc->sc_async_head); 2633 } 2634 2635 usbd_status 2636 ehci_device_request(usbd_xfer_handle xfer) 2637 { 2638 #define exfer EXFER(xfer) 2639 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2640 usb_device_request_t *req = &xfer->request; 2641 usbd_device_handle dev = epipe->pipe.device; 2642 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2643 int addr = dev->address; 2644 ehci_soft_qtd_t *setup, *stat, *next; 2645 ehci_soft_qh_t *sqh; 2646 int isread; 2647 int len; 2648 usbd_status err; 2649 int s; 2650 2651 isread = req->bmRequestType & UT_READ; 2652 len = UGETW(req->wLength); 2653 2654 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2655 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2656 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2657 UGETW(req->wIndex), len, addr, 2658 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2659 2660 setup = ehci_alloc_sqtd(sc); 2661 if (setup == NULL) { 2662 err = USBD_NOMEM; 2663 goto bad1; 2664 } 2665 stat = ehci_alloc_sqtd(sc); 2666 if (stat == NULL) { 2667 err = USBD_NOMEM; 2668 goto bad2; 2669 } 2670 2671 sqh = epipe->sqh; 2672 epipe->u.ctl.length = len; 2673 2674 /* Update device address and length since they may have changed 2675 during the setup of the control pipe in usbd_new_device(). */ 2676 /* XXX This only needs to be done once, but it's too early in open. */ 2677 /* XXXX Should not touch ED here! */ 2678 sqh->qh.qh_endp = 2679 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2680 htole32( 2681 EHCI_QH_SET_ADDR(addr) | 2682 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2683 ); 2684 2685 /* Set up data transaction */ 2686 if (len != 0) { 2687 ehci_soft_qtd_t *end; 2688 2689 /* Start toggle at 1. */ 2690 epipe->nexttoggle = 1; 2691 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2692 &next, &end); 2693 if (err) 2694 goto bad3; 2695 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2696 end->nextqtd = stat; 2697 end->qtd.qtd_next = 2698 end->qtd.qtd_altnext = htole32(stat->physaddr); 2699 } else { 2700 next = stat; 2701 } 2702 2703 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2704 2705 /* Clear toggle */ 2706 setup->qtd.qtd_status = htole32( 2707 EHCI_QTD_ACTIVE | 2708 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2709 EHCI_QTD_SET_CERR(3) | 2710 EHCI_QTD_SET_TOGGLE(0) | 2711 EHCI_QTD_SET_BYTES(sizeof *req) 2712 ); 2713 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2714 setup->qtd.qtd_buffer_hi[0] = 0; 2715 setup->nextqtd = next; 2716 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2717 setup->xfer = xfer; 2718 setup->len = sizeof *req; 2719 2720 stat->qtd.qtd_status = htole32( 2721 EHCI_QTD_ACTIVE | 2722 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2723 EHCI_QTD_SET_CERR(3) | 2724 EHCI_QTD_SET_TOGGLE(1) | 2725 EHCI_QTD_IOC 2726 ); 2727 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2728 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2729 stat->nextqtd = NULL; 2730 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2731 stat->xfer = xfer; 2732 stat->len = 0; 2733 2734 #ifdef EHCI_DEBUG 2735 if (ehcidebug > 5) { 2736 DPRINTF(("ehci_device_request:\n")); 2737 ehci_dump_sqh(sqh); 2738 ehci_dump_sqtds(setup); 2739 } 2740 #endif 2741 2742 exfer->sqtdstart = setup; 2743 exfer->sqtdend = stat; 2744 #ifdef DIAGNOSTIC 2745 if (!exfer->isdone) { 2746 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2747 } 2748 exfer->isdone = 0; 2749 #endif 2750 2751 /* Insert qTD in QH list. */ 2752 s = splusb(); 2753 ehci_set_qh_qtd(sqh, setup); 2754 if (xfer->timeout && !sc->sc_bus.use_polling) { 2755 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2756 ehci_timeout, xfer); 2757 } 2758 ehci_add_intr_list(sc, exfer); 2759 xfer->status = USBD_IN_PROGRESS; 2760 splx(s); 2761 2762 #ifdef EHCI_DEBUG 2763 if (ehcidebug > 10) { 2764 DPRINTF(("ehci_device_request: status=%x\n", 2765 EOREAD4(sc, EHCI_USBSTS))); 2766 delay(10000); 2767 ehci_dump_regs(sc); 2768 ehci_dump_sqh(sc->sc_async_head); 2769 ehci_dump_sqh(sqh); 2770 ehci_dump_sqtds(setup); 2771 } 2772 #endif 2773 2774 return (USBD_NORMAL_COMPLETION); 2775 2776 bad3: 2777 ehci_free_sqtd(sc, stat); 2778 bad2: 2779 ehci_free_sqtd(sc, setup); 2780 bad1: 2781 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2782 xfer->status = err; 2783 usb_transfer_complete(xfer); 2784 return (err); 2785 #undef exfer 2786 } 2787 2788 /************************/ 2789 2790 Static usbd_status 2791 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2792 { 2793 usbd_status err; 2794 2795 /* Insert last in queue. */ 2796 err = usb_insert_transfer(xfer); 2797 if (err) 2798 return (err); 2799 2800 /* Pipe isn't running, start first */ 2801 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2802 } 2803 2804 usbd_status 2805 ehci_device_bulk_start(usbd_xfer_handle xfer) 2806 { 2807 #define exfer EXFER(xfer) 2808 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2809 usbd_device_handle dev = epipe->pipe.device; 2810 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2811 ehci_soft_qtd_t *data, *dataend; 2812 ehci_soft_qh_t *sqh; 2813 usbd_status err; 2814 int len, isread, endpt; 2815 int s; 2816 2817 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2818 xfer, xfer->length, xfer->flags)); 2819 2820 if (sc->sc_dying) 2821 return (USBD_IOERROR); 2822 2823 #ifdef DIAGNOSTIC 2824 if (xfer->rqflags & URQ_REQUEST) 2825 panic("ehci_device_bulk_start: a request"); 2826 #endif 2827 2828 len = xfer->length; 2829 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2830 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2831 sqh = epipe->sqh; 2832 2833 epipe->u.bulk.length = len; 2834 2835 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2836 &dataend); 2837 if (err) { 2838 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2839 xfer->status = err; 2840 usb_transfer_complete(xfer); 2841 return (err); 2842 } 2843 2844 #ifdef EHCI_DEBUG 2845 if (ehcidebug > 5) { 2846 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2847 ehci_dump_sqh(sqh); 2848 ehci_dump_sqtds(data); 2849 } 2850 #endif 2851 2852 /* Set up interrupt info. */ 2853 exfer->sqtdstart = data; 2854 exfer->sqtdend = dataend; 2855 #ifdef DIAGNOSTIC 2856 if (!exfer->isdone) { 2857 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2858 } 2859 exfer->isdone = 0; 2860 #endif 2861 2862 s = splusb(); 2863 ehci_set_qh_qtd(sqh, data); 2864 if (xfer->timeout && !sc->sc_bus.use_polling) { 2865 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2866 ehci_timeout, xfer); 2867 } 2868 ehci_add_intr_list(sc, exfer); 2869 xfer->status = USBD_IN_PROGRESS; 2870 splx(s); 2871 2872 #ifdef EHCI_DEBUG 2873 if (ehcidebug > 10) { 2874 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2875 delay(10000); 2876 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2877 ehci_dump_regs(sc); 2878 #if 0 2879 printf("async_head:\n"); 2880 ehci_dump_sqh(sc->sc_async_head); 2881 #endif 2882 printf("sqh:\n"); 2883 ehci_dump_sqh(sqh); 2884 ehci_dump_sqtds(data); 2885 } 2886 #endif 2887 2888 if (sc->sc_bus.use_polling) 2889 ehci_waitintr(sc, xfer); 2890 2891 return (USBD_IN_PROGRESS); 2892 #undef exfer 2893 } 2894 2895 Static void 2896 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2897 { 2898 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2899 ehci_abort_xfer(xfer, USBD_CANCELLED); 2900 } 2901 2902 /* 2903 * Close a device bulk pipe. 2904 */ 2905 Static void 2906 ehci_device_bulk_close(usbd_pipe_handle pipe) 2907 { 2908 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2909 2910 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2911 ehci_close_pipe(pipe, sc->sc_async_head); 2912 } 2913 2914 void 2915 ehci_device_bulk_done(usbd_xfer_handle xfer) 2916 { 2917 struct ehci_xfer *ex = EXFER(xfer); 2918 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2919 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2920 2921 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2922 xfer, xfer->actlen)); 2923 2924 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2925 ehci_del_intr_list(ex); /* remove from active list */ 2926 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2927 } 2928 2929 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2930 } 2931 2932 /************************/ 2933 2934 Static usbd_status 2935 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2936 { 2937 struct ehci_soft_islot *isp; 2938 int islot, lev; 2939 2940 /* Find a poll rate that is large enough. */ 2941 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2942 if (EHCI_ILEV_IVAL(lev) <= ival) 2943 break; 2944 2945 /* Pick an interrupt slot at the right level. */ 2946 /* XXX could do better than picking at random */ 2947 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2948 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2949 2950 sqh->islot = islot; 2951 isp = &sc->sc_islots[islot]; 2952 ehci_add_qh(sqh, isp->sqh); 2953 2954 return (USBD_NORMAL_COMPLETION); 2955 } 2956 2957 Static usbd_status 2958 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2959 { 2960 usbd_status err; 2961 2962 /* Insert last in queue. */ 2963 err = usb_insert_transfer(xfer); 2964 if (err) 2965 return (err); 2966 2967 /* 2968 * Pipe isn't running (otherwise err would be USBD_INPROG), 2969 * so start it first. 2970 */ 2971 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2972 } 2973 2974 Static usbd_status 2975 ehci_device_intr_start(usbd_xfer_handle xfer) 2976 { 2977 #define exfer EXFER(xfer) 2978 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2979 usbd_device_handle dev = xfer->pipe->device; 2980 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2981 ehci_soft_qtd_t *data, *dataend; 2982 ehci_soft_qh_t *sqh; 2983 usbd_status err; 2984 int len, isread, endpt; 2985 int s; 2986 2987 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 2988 xfer, xfer->length, xfer->flags)); 2989 2990 if (sc->sc_dying) 2991 return (USBD_IOERROR); 2992 2993 #ifdef DIAGNOSTIC 2994 if (xfer->rqflags & URQ_REQUEST) 2995 panic("ehci_device_intr_start: a request"); 2996 #endif 2997 2998 len = xfer->length; 2999 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3000 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3001 sqh = epipe->sqh; 3002 3003 epipe->u.intr.length = len; 3004 3005 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3006 &dataend); 3007 if (err) { 3008 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3009 xfer->status = err; 3010 usb_transfer_complete(xfer); 3011 return (err); 3012 } 3013 3014 #ifdef EHCI_DEBUG 3015 if (ehcidebug > 5) { 3016 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3017 ehci_dump_sqh(sqh); 3018 ehci_dump_sqtds(data); 3019 } 3020 #endif 3021 3022 /* Set up interrupt info. */ 3023 exfer->sqtdstart = data; 3024 exfer->sqtdend = dataend; 3025 #ifdef DIAGNOSTIC 3026 if (!exfer->isdone) { 3027 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3028 } 3029 exfer->isdone = 0; 3030 #endif 3031 3032 s = splusb(); 3033 ehci_set_qh_qtd(sqh, data); 3034 if (xfer->timeout && !sc->sc_bus.use_polling) { 3035 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3036 ehci_timeout, xfer); 3037 } 3038 ehci_add_intr_list(sc, exfer); 3039 xfer->status = USBD_IN_PROGRESS; 3040 splx(s); 3041 3042 #ifdef EHCI_DEBUG 3043 if (ehcidebug > 10) { 3044 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3045 delay(10000); 3046 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3047 ehci_dump_regs(sc); 3048 printf("sqh:\n"); 3049 ehci_dump_sqh(sqh); 3050 ehci_dump_sqtds(data); 3051 } 3052 #endif 3053 3054 if (sc->sc_bus.use_polling) 3055 ehci_waitintr(sc, xfer); 3056 3057 return (USBD_IN_PROGRESS); 3058 #undef exfer 3059 } 3060 3061 Static void 3062 ehci_device_intr_abort(usbd_xfer_handle xfer) 3063 { 3064 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3065 if (xfer->pipe->intrxfer == xfer) { 3066 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3067 xfer->pipe->intrxfer = NULL; 3068 } 3069 ehci_abort_xfer(xfer, USBD_CANCELLED); 3070 } 3071 3072 Static void 3073 ehci_device_intr_close(usbd_pipe_handle pipe) 3074 { 3075 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3076 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3077 struct ehci_soft_islot *isp; 3078 3079 isp = &sc->sc_islots[epipe->sqh->islot]; 3080 ehci_close_pipe(pipe, isp->sqh); 3081 } 3082 3083 Static void 3084 ehci_device_intr_done(usbd_xfer_handle xfer) 3085 { 3086 #define exfer EXFER(xfer) 3087 struct ehci_xfer *ex = EXFER(xfer); 3088 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3089 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3090 ehci_soft_qtd_t *data, *dataend; 3091 ehci_soft_qh_t *sqh; 3092 usbd_status err; 3093 int len, isread, endpt, s; 3094 3095 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3096 xfer, xfer->actlen)); 3097 3098 if (xfer->pipe->repeat) { 3099 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3100 3101 len = epipe->u.intr.length; 3102 xfer->length = len; 3103 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3104 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3105 sqh = epipe->sqh; 3106 3107 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3108 &data, &dataend); 3109 if (err) { 3110 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3111 xfer->status = err; 3112 return; 3113 } 3114 3115 /* Set up interrupt info. */ 3116 exfer->sqtdstart = data; 3117 exfer->sqtdend = dataend; 3118 #ifdef DIAGNOSTIC 3119 if (!exfer->isdone) { 3120 printf("ehci_device_intr_done: not done, ex=%p\n", 3121 exfer); 3122 } 3123 exfer->isdone = 0; 3124 #endif 3125 3126 s = splusb(); 3127 ehci_set_qh_qtd(sqh, data); 3128 if (xfer->timeout && !sc->sc_bus.use_polling) { 3129 usb_callout(xfer->timeout_handle, 3130 mstohz(xfer->timeout), ehci_timeout, xfer); 3131 } 3132 splx(s); 3133 3134 xfer->status = USBD_IN_PROGRESS; 3135 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3136 ehci_del_intr_list(ex); /* remove from active list */ 3137 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3138 } 3139 #undef exfer 3140 } 3141 3142 /************************/ 3143 3144 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3145 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3146 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3147 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3148 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3149
Indexes created Mon Sep 22 13:09:51 GMT 2025