ehci.c revision 1.95
1 /* $NetBSD: ehci.c,v 1.95 2005/04/27 23:39:54 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.95 2005/04/27 23:39:54 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 316 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 317 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 318 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 319 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 320 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 321 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 322 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 323 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 324 }; 325 326 usbd_status 327 ehci_init(ehci_softc_t *sc) 328 { 329 u_int32_t version, sparams, cparams, hcr; 330 u_int i; 331 usbd_status err; 332 ehci_soft_qh_t *sqh; 333 u_int ncomp; 334 335 DPRINTF(("ehci_init: start\n")); 336 #ifdef EHCI_DEBUG 337 theehci = sc; 338 #endif 339 340 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 341 342 version = EREAD2(sc, EHCI_HCIVERSION); 343 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 344 version >> 8, version & 0xff); 345 346 sparams = EREAD4(sc, EHCI_HCSPARAMS); 347 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 348 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 349 ncomp = EHCI_HCS_N_CC(sparams); 350 if (ncomp != sc->sc_ncomp) { 351 aprint_error("%s: wrong number of companions (%d != %d)\n", 352 USBDEVNAME(sc->sc_bus.bdev), 353 ncomp, sc->sc_ncomp); 354 #if NOHCI == 0 || NUHCI == 0 355 aprint_error("%s: ohci or uhci probably not configured\n", 356 USBDEVNAME(sc->sc_bus.bdev)); 357 #endif 358 if (ncomp < sc->sc_ncomp) 359 sc->sc_ncomp = ncomp; 360 } 361 if (sc->sc_ncomp > 0) { 362 aprint_normal("%s: companion controller%s, %d port%s each:", 363 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 364 EHCI_HCS_N_PCC(sparams), 365 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 366 for (i = 0; i < sc->sc_ncomp; i++) 367 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 368 aprint_normal("\n"); 369 } 370 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 371 cparams = EREAD4(sc, EHCI_HCCPARAMS); 372 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 373 374 if (EHCI_HCC_64BIT(cparams)) { 375 /* MUST clear segment register if 64 bit capable. */ 376 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 377 } 378 379 sc->sc_bus.usbrev = USBREV_2_0; 380 381 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 382 USB_MEM_RESERVE); 383 384 /* Reset the controller */ 385 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 386 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 387 usb_delay_ms(&sc->sc_bus, 1); 388 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 389 for (i = 0; i < 100; i++) { 390 usb_delay_ms(&sc->sc_bus, 1); 391 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 392 if (!hcr) 393 break; 394 } 395 if (hcr) { 396 aprint_error("%s: reset timeout\n", 397 USBDEVNAME(sc->sc_bus.bdev)); 398 return (USBD_IOERROR); 399 } 400 401 /* XXX need proper intr scheduling */ 402 sc->sc_rand = 96; 403 404 /* frame list size at default, read back what we got and use that */ 405 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 406 case 0: sc->sc_flsize = 1024; break; 407 case 1: sc->sc_flsize = 512; break; 408 case 2: sc->sc_flsize = 256; break; 409 case 3: return (USBD_IOERROR); 410 } 411 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 412 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 413 if (err) 414 return (err); 415 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 416 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 417 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 418 419 /* Set up the bus struct. */ 420 sc->sc_bus.methods = &ehci_bus_methods; 421 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 422 423 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 424 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 425 426 sc->sc_eintrs = EHCI_NORMAL_INTRS; 427 428 /* 429 * Allocate the interrupt dummy QHs. These are arranged to give poll 430 * intervals that are powers of 2 times 1ms. 431 */ 432 for (i = 0; i < EHCI_INTRQHS; i++) { 433 sqh = ehci_alloc_sqh(sc); 434 if (sqh == NULL) { 435 err = USBD_NOMEM; 436 goto bad1; 437 } 438 sc->sc_islots[i].sqh = sqh; 439 } 440 for (i = 0; i < EHCI_INTRQHS; i++) { 441 sqh = sc->sc_islots[i].sqh; 442 if (i == 0) { 443 /* The last (1ms) QH terminates. */ 444 sqh->qh.qh_link = EHCI_NULL; 445 sqh->next = NULL; 446 } else { 447 /* Otherwise the next QH has half the poll interval */ 448 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 449 sqh->qh.qh_link = htole32(sqh->next->physaddr | 450 EHCI_LINK_QH); 451 } 452 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 453 sqh->qh.qh_curqtd = EHCI_NULL; 454 sqh->next = NULL; 455 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 456 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 457 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 458 sqh->sqtd = NULL; 459 } 460 /* Point the frame list at the last level (128ms). */ 461 for (i = 0; i < sc->sc_flsize; i++) { 462 int j; 463 464 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 465 revbits[i & (EHCI_MAX_POLLRATE-1)]; 466 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 467 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 468 i)].sqh->physaddr); 469 } 470 471 /* Allocate dummy QH that starts the async list. */ 472 sqh = ehci_alloc_sqh(sc); 473 if (sqh == NULL) { 474 err = USBD_NOMEM; 475 goto bad1; 476 } 477 /* Fill the QH */ 478 sqh->qh.qh_endp = 479 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 480 sqh->qh.qh_link = 481 htole32(sqh->physaddr | EHCI_LINK_QH); 482 sqh->qh.qh_curqtd = EHCI_NULL; 483 sqh->next = NULL; 484 /* Fill the overlay qTD */ 485 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 486 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 487 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 488 sqh->sqtd = NULL; 489 #ifdef EHCI_DEBUG 490 if (ehcidebug) { 491 ehci_dump_sqh(sqh); 492 } 493 #endif 494 495 /* Point to async list */ 496 sc->sc_async_head = sqh; 497 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 498 499 usb_callout_init(sc->sc_tmo_pcd); 500 501 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 502 503 /* Enable interrupts */ 504 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 505 506 /* Turn on controller */ 507 EOWRITE4(sc, EHCI_USBCMD, 508 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 509 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 510 EHCI_CMD_ASE | 511 EHCI_CMD_PSE | 512 EHCI_CMD_RS); 513 514 /* Take over port ownership */ 515 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 516 517 for (i = 0; i < 100; i++) { 518 usb_delay_ms(&sc->sc_bus, 1); 519 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 520 if (!hcr) 521 break; 522 } 523 if (hcr) { 524 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 525 return (USBD_IOERROR); 526 } 527 528 return (USBD_NORMAL_COMPLETION); 529 530 #if 0 531 bad2: 532 ehci_free_sqh(sc, sc->sc_async_head); 533 #endif 534 bad1: 535 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 536 return (err); 537 } 538 539 int 540 ehci_intr(void *v) 541 { 542 ehci_softc_t *sc = v; 543 544 if (sc == NULL || sc->sc_dying) 545 return (0); 546 547 /* If we get an interrupt while polling, then just ignore it. */ 548 if (sc->sc_bus.use_polling) { 549 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 550 551 if (intrs) 552 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 553 #ifdef DIAGNOSTIC 554 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 555 #endif 556 return (0); 557 } 558 559 return (ehci_intr1(sc)); 560 } 561 562 Static int 563 ehci_intr1(ehci_softc_t *sc) 564 { 565 u_int32_t intrs, eintrs; 566 567 DPRINTFN(20,("ehci_intr1: enter\n")); 568 569 /* In case the interrupt occurs before initialization has completed. */ 570 if (sc == NULL) { 571 #ifdef DIAGNOSTIC 572 printf("ehci_intr1: sc == NULL\n"); 573 #endif 574 return (0); 575 } 576 577 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 578 if (!intrs) 579 return (0); 580 581 eintrs = intrs & sc->sc_eintrs; 582 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 583 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 584 (u_int)eintrs)); 585 if (!eintrs) 586 return (0); 587 588 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 589 sc->sc_bus.intr_context++; 590 sc->sc_bus.no_intrs++; 591 if (eintrs & EHCI_STS_IAA) { 592 DPRINTF(("ehci_intr1: door bell\n")); 593 wakeup(&sc->sc_async_head); 594 eintrs &= ~EHCI_STS_IAA; 595 } 596 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 597 DPRINTFN(5,("ehci_intr1: %s %s\n", 598 eintrs & EHCI_STS_INT ? "INT" : "", 599 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 600 usb_schedsoftintr(&sc->sc_bus); 601 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 602 } 603 if (eintrs & EHCI_STS_HSE) { 604 printf("%s: unrecoverable error, controller halted\n", 605 USBDEVNAME(sc->sc_bus.bdev)); 606 /* XXX what else */ 607 } 608 if (eintrs & EHCI_STS_PCD) { 609 ehci_pcd(sc, sc->sc_intrxfer); 610 /* 611 * Disable PCD interrupt for now, because it will be 612 * on until the port has been reset. 613 */ 614 ehci_pcd_able(sc, 0); 615 /* Do not allow RHSC interrupts > 1 per second */ 616 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 617 eintrs &= ~EHCI_STS_PCD; 618 } 619 620 sc->sc_bus.intr_context--; 621 622 if (eintrs != 0) { 623 /* Block unprocessed interrupts. */ 624 sc->sc_eintrs &= ~eintrs; 625 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 626 printf("%s: blocking intrs 0x%x\n", 627 USBDEVNAME(sc->sc_bus.bdev), eintrs); 628 } 629 630 return (1); 631 } 632 633 void 634 ehci_pcd_able(ehci_softc_t *sc, int on) 635 { 636 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 637 if (on) 638 sc->sc_eintrs |= EHCI_STS_PCD; 639 else 640 sc->sc_eintrs &= ~EHCI_STS_PCD; 641 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 642 } 643 644 void 645 ehci_pcd_enable(void *v_sc) 646 { 647 ehci_softc_t *sc = v_sc; 648 649 ehci_pcd_able(sc, 1); 650 } 651 652 void 653 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 654 { 655 usbd_pipe_handle pipe; 656 u_char *p; 657 int i, m; 658 659 if (xfer == NULL) { 660 /* Just ignore the change. */ 661 return; 662 } 663 664 pipe = xfer->pipe; 665 666 p = KERNADDR(&xfer->dmabuf, 0); 667 m = min(sc->sc_noport, xfer->length * 8 - 1); 668 memset(p, 0, xfer->length); 669 for (i = 1; i <= m; i++) { 670 /* Pick out CHANGE bits from the status reg. */ 671 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 672 p[i/8] |= 1 << (i%8); 673 } 674 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 675 xfer->actlen = xfer->length; 676 xfer->status = USBD_NORMAL_COMPLETION; 677 678 usb_transfer_complete(xfer); 679 } 680 681 void 682 ehci_softintr(void *v) 683 { 684 ehci_softc_t *sc = v; 685 struct ehci_xfer *ex, *nextex; 686 687 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 688 sc->sc_bus.intr_context)); 689 690 sc->sc_bus.intr_context++; 691 692 /* 693 * The only explanation I can think of for why EHCI is as brain dead 694 * as UHCI interrupt-wise is that Intel was involved in both. 695 * An interrupt just tells us that something is done, we have no 696 * clue what, so we need to scan through all active transfers. :-( 697 */ 698 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 699 nextex = LIST_NEXT(ex, inext); 700 ehci_check_intr(sc, ex); 701 } 702 703 #ifdef USB_USE_SOFTINTR 704 if (sc->sc_softwake) { 705 sc->sc_softwake = 0; 706 wakeup(&sc->sc_softwake); 707 } 708 #endif /* USB_USE_SOFTINTR */ 709 710 sc->sc_bus.intr_context--; 711 } 712 713 /* Check for an interrupt. */ 714 void 715 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 716 { 717 ehci_soft_qtd_t *sqtd, *lsqtd; 718 u_int32_t status; 719 720 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 721 722 if (ex->sqtdstart == NULL) { 723 printf("ehci_check_intr: sqtdstart=NULL\n"); 724 return; 725 } 726 lsqtd = ex->sqtdend; 727 #ifdef DIAGNOSTIC 728 if (lsqtd == NULL) { 729 printf("ehci_check_intr: lsqtd==0\n"); 730 return; 731 } 732 #endif 733 /* 734 * If the last TD is still active we need to check whether there 735 * is a an error somewhere in the middle, or whether there was a 736 * short packet (SPD and not ACTIVE). 737 */ 738 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 739 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 740 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 741 status = le32toh(sqtd->qtd.qtd_status); 742 /* If there's an active QTD the xfer isn't done. */ 743 if (status & EHCI_QTD_ACTIVE) 744 break; 745 /* Any kind of error makes the xfer done. */ 746 if (status & EHCI_QTD_HALTED) 747 goto done; 748 /* We want short packets, and it is short: it's done */ 749 if (EHCI_QTD_GET_BYTES(status) != 0) 750 goto done; 751 } 752 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 753 ex, ex->sqtdstart)); 754 return; 755 } 756 done: 757 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 758 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 759 ehci_idone(ex); 760 } 761 762 void 763 ehci_idone(struct ehci_xfer *ex) 764 { 765 usbd_xfer_handle xfer = &ex->xfer; 766 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 767 ehci_soft_qtd_t *sqtd, *lsqtd; 768 u_int32_t status = 0, nstatus = 0; 769 int actlen; 770 uint pkts_left; 771 772 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 773 #ifdef DIAGNOSTIC 774 { 775 int s = splhigh(); 776 if (ex->isdone) { 777 splx(s); 778 #ifdef EHCI_DEBUG 779 printf("ehci_idone: ex is done!\n "); 780 ehci_dump_exfer(ex); 781 #else 782 printf("ehci_idone: ex=%p is done!\n", ex); 783 #endif 784 return; 785 } 786 ex->isdone = 1; 787 splx(s); 788 } 789 #endif 790 791 if (xfer->status == USBD_CANCELLED || 792 xfer->status == USBD_TIMEOUT) { 793 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 794 return; 795 } 796 797 #ifdef EHCI_DEBUG 798 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 799 if (ehcidebug > 10) 800 ehci_dump_sqtds(ex->sqtdstart); 801 #endif 802 803 /* The transfer is done, compute actual length and status. */ 804 lsqtd = ex->sqtdend; 805 actlen = 0; 806 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 807 nstatus = le32toh(sqtd->qtd.qtd_status); 808 if (nstatus & EHCI_QTD_ACTIVE) 809 break; 810 811 status = nstatus; 812 /* halt is ok if descriptor is last, and complete */ 813 if (sqtd->qtd.qtd_next == EHCI_NULL && 814 EHCI_QTD_GET_BYTES(status) == 0) 815 status &= ~EHCI_QTD_HALTED; 816 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 817 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 818 } 819 820 /* 821 * If there are left over TDs we need to update the toggle. 822 * The default pipe doesn't need it since control transfers 823 * start the toggle at 0 every time. 824 */ 825 if (sqtd != lsqtd->nextqtd && 826 xfer->pipe->device->default_pipe != xfer->pipe) { 827 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 828 #if 0 829 ehci_dump_sqh(epipe->sqh); 830 ehci_dump_sqtds(ex->sqtdstart); 831 #endif 832 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 833 } 834 835 /* 836 * For a short transfer we need to update the toggle for the missing 837 * packets within the qTD. 838 */ 839 pkts_left = EHCI_QTD_GET_BYTES(status) / 840 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 841 epipe->nexttoggle ^= pkts_left % 2; 842 843 status &= EHCI_QTD_STATERRS; 844 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 845 xfer->length, actlen, status)); 846 xfer->actlen = actlen; 847 if (status != 0) { 848 #ifdef EHCI_DEBUG 849 char sbuf[128]; 850 851 bitmask_snprintf((u_int32_t)status, 852 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 853 "\3MISSED", sbuf, sizeof(sbuf)); 854 855 DPRINTFN((status == EHCI_QTD_HALTED) ? 2 : 0, 856 ("ehci_idone: error, addr=%d, endpt=0x%02x, " 857 "status 0x%s\n", 858 xfer->pipe->device->address, 859 xfer->pipe->endpoint->edesc->bEndpointAddress, 860 sbuf)); 861 if (ehcidebug > 2) { 862 ehci_dump_sqh(epipe->sqh); 863 ehci_dump_sqtds(ex->sqtdstart); 864 } 865 #endif 866 if (status == EHCI_QTD_HALTED) 867 xfer->status = USBD_STALLED; 868 else 869 xfer->status = USBD_IOERROR; /* more info XXX */ 870 } else { 871 xfer->status = USBD_NORMAL_COMPLETION; 872 } 873 874 usb_transfer_complete(xfer); 875 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 876 } 877 878 /* 879 * Wait here until controller claims to have an interrupt. 880 * Then call ehci_intr and return. Use timeout to avoid waiting 881 * too long. 882 */ 883 void 884 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 885 { 886 int timo = xfer->timeout; 887 int usecs; 888 u_int32_t intrs; 889 890 xfer->status = USBD_IN_PROGRESS; 891 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 892 usb_delay_ms(&sc->sc_bus, 1); 893 if (sc->sc_dying) 894 break; 895 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 896 sc->sc_eintrs; 897 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 898 #ifdef EHCI_DEBUG 899 if (ehcidebug > 15) 900 ehci_dump_regs(sc); 901 #endif 902 if (intrs) { 903 ehci_intr1(sc); 904 if (xfer->status != USBD_IN_PROGRESS) 905 return; 906 } 907 } 908 909 /* Timeout */ 910 DPRINTF(("ehci_waitintr: timeout\n")); 911 xfer->status = USBD_TIMEOUT; 912 usb_transfer_complete(xfer); 913 /* XXX should free TD */ 914 } 915 916 void 917 ehci_poll(struct usbd_bus *bus) 918 { 919 ehci_softc_t *sc = (ehci_softc_t *)bus; 920 #ifdef EHCI_DEBUG 921 static int last; 922 int new; 923 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 924 if (new != last) { 925 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 926 last = new; 927 } 928 #endif 929 930 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 931 ehci_intr1(sc); 932 } 933 934 int 935 ehci_detach(struct ehci_softc *sc, int flags) 936 { 937 int rv = 0; 938 939 if (sc->sc_child != NULL) 940 rv = config_detach(sc->sc_child, flags); 941 942 if (rv != 0) 943 return (rv); 944 945 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 946 947 if (sc->sc_powerhook != NULL) 948 powerhook_disestablish(sc->sc_powerhook); 949 if (sc->sc_shutdownhook != NULL) 950 shutdownhook_disestablish(sc->sc_shutdownhook); 951 952 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 953 954 /* XXX free other data structures XXX */ 955 956 return (rv); 957 } 958 959 960 int 961 ehci_activate(device_ptr_t self, enum devact act) 962 { 963 struct ehci_softc *sc = (struct ehci_softc *)self; 964 int rv = 0; 965 966 switch (act) { 967 case DVACT_ACTIVATE: 968 return (EOPNOTSUPP); 969 970 case DVACT_DEACTIVATE: 971 if (sc->sc_child != NULL) 972 rv = config_deactivate(sc->sc_child); 973 sc->sc_dying = 1; 974 break; 975 } 976 return (rv); 977 } 978 979 /* 980 * Handle suspend/resume. 981 * 982 * We need to switch to polling mode here, because this routine is 983 * called from an interrupt context. This is all right since we 984 * are almost suspended anyway. 985 */ 986 void 987 ehci_power(int why, void *v) 988 { 989 ehci_softc_t *sc = v; 990 u_int32_t cmd, hcr; 991 int s, i; 992 993 #ifdef EHCI_DEBUG 994 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 995 if (ehcidebug > 0) 996 ehci_dump_regs(sc); 997 #endif 998 999 s = splhardusb(); 1000 switch (why) { 1001 case PWR_SUSPEND: 1002 case PWR_STANDBY: 1003 sc->sc_bus.use_polling++; 1004 1005 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1006 1007 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1008 EOWRITE4(sc, EHCI_USBCMD, cmd); 1009 1010 for (i = 0; i < 100; i++) { 1011 hcr = EOREAD4(sc, EHCI_USBSTS) & 1012 (EHCI_STS_ASS | EHCI_STS_PSS); 1013 if (hcr == 0) 1014 break; 1015 1016 usb_delay_ms(&sc->sc_bus, 1); 1017 } 1018 if (hcr != 0) { 1019 printf("%s: reset timeout\n", 1020 USBDEVNAME(sc->sc_bus.bdev)); 1021 } 1022 1023 cmd &= ~EHCI_CMD_RS; 1024 EOWRITE4(sc, EHCI_USBCMD, cmd); 1025 1026 for (i = 0; i < 100; i++) { 1027 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1028 if (hcr == EHCI_STS_HCH) 1029 break; 1030 1031 usb_delay_ms(&sc->sc_bus, 1); 1032 } 1033 if (hcr != EHCI_STS_HCH) { 1034 printf("%s: config timeout\n", 1035 USBDEVNAME(sc->sc_bus.bdev)); 1036 } 1037 1038 sc->sc_bus.use_polling--; 1039 break; 1040 1041 case PWR_RESUME: 1042 sc->sc_bus.use_polling++; 1043 1044 /* restore things in case the bios sucks */ 1045 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1046 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1047 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1048 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1049 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1050 1051 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1052 1053 for (i = 0; i < 100; i++) { 1054 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1055 if (hcr != EHCI_STS_HCH) 1056 break; 1057 1058 usb_delay_ms(&sc->sc_bus, 1); 1059 } 1060 if (hcr == EHCI_STS_HCH) { 1061 printf("%s: config timeout\n", 1062 USBDEVNAME(sc->sc_bus.bdev)); 1063 } 1064 1065 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1066 1067 sc->sc_bus.use_polling--; 1068 break; 1069 case PWR_SOFTSUSPEND: 1070 case PWR_SOFTSTANDBY: 1071 case PWR_SOFTRESUME: 1072 break; 1073 } 1074 splx(s); 1075 1076 #ifdef EHCI_DEBUG 1077 DPRINTF(("ehci_power: sc=%p\n", sc)); 1078 if (ehcidebug > 0) 1079 ehci_dump_regs(sc); 1080 #endif 1081 } 1082 1083 /* 1084 * Shut down the controller when the system is going down. 1085 */ 1086 void 1087 ehci_shutdown(void *v) 1088 { 1089 ehci_softc_t *sc = v; 1090 1091 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1092 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1093 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1094 } 1095 1096 usbd_status 1097 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1098 { 1099 struct ehci_softc *sc = (struct ehci_softc *)bus; 1100 usbd_status err; 1101 1102 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1103 if (err == USBD_NOMEM) 1104 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1105 #ifdef EHCI_DEBUG 1106 if (err) 1107 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1108 #endif 1109 return (err); 1110 } 1111 1112 void 1113 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1114 { 1115 struct ehci_softc *sc = (struct ehci_softc *)bus; 1116 1117 if (dma->block->flags & USB_DMA_RESERVE) { 1118 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1119 dma); 1120 return; 1121 } 1122 usb_freemem(&sc->sc_bus, dma); 1123 } 1124 1125 usbd_xfer_handle 1126 ehci_allocx(struct usbd_bus *bus) 1127 { 1128 struct ehci_softc *sc = (struct ehci_softc *)bus; 1129 usbd_xfer_handle xfer; 1130 1131 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1132 if (xfer != NULL) { 1133 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1134 #ifdef DIAGNOSTIC 1135 if (xfer->busy_free != XFER_FREE) { 1136 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1137 xfer->busy_free); 1138 } 1139 #endif 1140 } else { 1141 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1142 } 1143 if (xfer != NULL) { 1144 memset(xfer, 0, sizeof(struct ehci_xfer)); 1145 #ifdef DIAGNOSTIC 1146 EXFER(xfer)->isdone = 1; 1147 xfer->busy_free = XFER_BUSY; 1148 #endif 1149 } 1150 return (xfer); 1151 } 1152 1153 void 1154 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1155 { 1156 struct ehci_softc *sc = (struct ehci_softc *)bus; 1157 1158 #ifdef DIAGNOSTIC 1159 if (xfer->busy_free != XFER_BUSY) { 1160 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1161 xfer->busy_free); 1162 return; 1163 } 1164 xfer->busy_free = XFER_FREE; 1165 if (!EXFER(xfer)->isdone) { 1166 printf("ehci_freex: !isdone\n"); 1167 return; 1168 } 1169 #endif 1170 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1171 } 1172 1173 Static void 1174 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1175 { 1176 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1177 1178 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1179 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1180 #ifdef USB_DEBUG 1181 if (ehcidebug) 1182 usbd_dump_pipe(pipe); 1183 #endif 1184 epipe->nexttoggle = 0; 1185 } 1186 1187 Static void 1188 ehci_noop(usbd_pipe_handle pipe) 1189 { 1190 } 1191 1192 #ifdef EHCI_DEBUG 1193 void 1194 ehci_dump_regs(ehci_softc_t *sc) 1195 { 1196 int i; 1197 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1198 EOREAD4(sc, EHCI_USBCMD), 1199 EOREAD4(sc, EHCI_USBSTS), 1200 EOREAD4(sc, EHCI_USBINTR)); 1201 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1202 EOREAD4(sc, EHCI_FRINDEX), 1203 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1204 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1205 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1206 for (i = 1; i <= sc->sc_noport; i++) 1207 printf("port %d status=0x%08x\n", i, 1208 EOREAD4(sc, EHCI_PORTSC(i))); 1209 } 1210 1211 /* 1212 * Unused function - this is meant to be called from a kernel 1213 * debugger. 1214 */ 1215 void 1216 ehci_dump() 1217 { 1218 ehci_dump_regs(theehci); 1219 } 1220 1221 void 1222 ehci_dump_link(ehci_link_t link, int type) 1223 { 1224 link = le32toh(link); 1225 printf("0x%08x", link); 1226 if (link & EHCI_LINK_TERMINATE) 1227 printf("<T>"); 1228 else { 1229 printf("<"); 1230 if (type) { 1231 switch (EHCI_LINK_TYPE(link)) { 1232 case EHCI_LINK_ITD: printf("ITD"); break; 1233 case EHCI_LINK_QH: printf("QH"); break; 1234 case EHCI_LINK_SITD: printf("SITD"); break; 1235 case EHCI_LINK_FSTN: printf("FSTN"); break; 1236 } 1237 } 1238 printf(">"); 1239 } 1240 } 1241 1242 void 1243 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1244 { 1245 int i; 1246 u_int32_t stop; 1247 1248 stop = 0; 1249 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1250 ehci_dump_sqtd(sqtd); 1251 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1252 } 1253 if (sqtd) 1254 printf("dump aborted, too many TDs\n"); 1255 } 1256 1257 void 1258 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1259 { 1260 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1261 ehci_dump_qtd(&sqtd->qtd); 1262 } 1263 1264 void 1265 ehci_dump_qtd(ehci_qtd_t *qtd) 1266 { 1267 u_int32_t s; 1268 char sbuf[128]; 1269 1270 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1271 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1272 printf("\n"); 1273 s = le32toh(qtd->qtd_status); 1274 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1275 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1276 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1277 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1278 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1279 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1280 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1281 EHCI_QTD_GET_PID(s), sbuf); 1282 for (s = 0; s < 5; s++) 1283 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1284 } 1285 1286 void 1287 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1288 { 1289 ehci_qh_t *qh = &sqh->qh; 1290 u_int32_t endp, endphub; 1291 1292 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1293 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1294 endp = le32toh(qh->qh_endp); 1295 printf(" endp=0x%08x\n", endp); 1296 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1297 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1298 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1299 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1300 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1301 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1302 EHCI_QH_GET_NRL(endp)); 1303 endphub = le32toh(qh->qh_endphub); 1304 printf(" endphub=0x%08x\n", endphub); 1305 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1306 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1307 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1308 EHCI_QH_GET_MULT(endphub)); 1309 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1310 printf("Overlay qTD:\n"); 1311 ehci_dump_qtd(&qh->qh_qtd); 1312 } 1313 1314 #ifdef DIAGNOSTIC 1315 Static void 1316 ehci_dump_exfer(struct ehci_xfer *ex) 1317 { 1318 printf("ehci_dump_exfer: ex=%p\n", ex); 1319 } 1320 #endif 1321 #endif 1322 1323 usbd_status 1324 ehci_open(usbd_pipe_handle pipe) 1325 { 1326 usbd_device_handle dev = pipe->device; 1327 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1328 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1329 u_int8_t addr = dev->address; 1330 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1331 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1332 ehci_soft_qh_t *sqh; 1333 usbd_status err; 1334 int s; 1335 int ival, speed, naks; 1336 int hshubaddr, hshubport; 1337 1338 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1339 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1340 1341 if (dev->myhsport) { 1342 hshubaddr = dev->myhsport->parent->address; 1343 hshubport = dev->myhsport->portno; 1344 } else { 1345 hshubaddr = 0; 1346 hshubport = 0; 1347 } 1348 1349 if (sc->sc_dying) 1350 return (USBD_IOERROR); 1351 1352 epipe->nexttoggle = 0; 1353 1354 if (addr == sc->sc_addr) { 1355 switch (ed->bEndpointAddress) { 1356 case USB_CONTROL_ENDPOINT: 1357 pipe->methods = &ehci_root_ctrl_methods; 1358 break; 1359 case UE_DIR_IN | EHCI_INTR_ENDPT: 1360 pipe->methods = &ehci_root_intr_methods; 1361 break; 1362 default: 1363 return (USBD_INVAL); 1364 } 1365 return (USBD_NORMAL_COMPLETION); 1366 } 1367 1368 /* XXX All this stuff is only valid for async. */ 1369 switch (dev->speed) { 1370 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1371 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1372 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1373 default: panic("ehci_open: bad device speed %d", dev->speed); 1374 } 1375 if (speed != EHCI_QH_SPEED_HIGH) { 1376 printf("%s: *** WARNING: opening low/full speed device, this " 1377 "may not work yet.\n", 1378 USBDEVNAME(sc->sc_bus.bdev)); 1379 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1380 hshubaddr, hshubport)); 1381 #if 0 1382 if (xfertype != UE_CONTROL) 1383 return USBD_INVAL; 1384 #endif 1385 } 1386 1387 naks = 8; /* XXX */ 1388 sqh = ehci_alloc_sqh(sc); 1389 if (sqh == NULL) 1390 goto bad0; 1391 /* qh_link filled when the QH is added */ 1392 sqh->qh.qh_endp = htole32( 1393 EHCI_QH_SET_ADDR(addr) | 1394 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1395 EHCI_QH_SET_EPS(speed) | 1396 EHCI_QH_DTC | 1397 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1398 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1399 EHCI_QH_CTL : 0) | 1400 EHCI_QH_SET_NRL(naks) 1401 ); 1402 sqh->qh.qh_endphub = htole32( 1403 EHCI_QH_SET_MULT(1) | 1404 EHCI_QH_SET_HUBA(hshubaddr) | 1405 EHCI_QH_SET_PORT(hshubport) | 1406 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1407 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1408 ); 1409 sqh->qh.qh_curqtd = EHCI_NULL; 1410 /* Fill the overlay qTD */ 1411 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1412 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1413 sqh->qh.qh_qtd.qtd_status = htole32(0); 1414 1415 epipe->sqh = sqh; 1416 1417 switch (xfertype) { 1418 case UE_CONTROL: 1419 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1420 0, &epipe->u.ctl.reqdma); 1421 #ifdef EHCI_DEBUG 1422 if (err) 1423 printf("ehci_open: usb_allocmem()=%d\n", err); 1424 #endif 1425 if (err) 1426 goto bad1; 1427 pipe->methods = &ehci_device_ctrl_methods; 1428 s = splusb(); 1429 ehci_add_qh(sqh, sc->sc_async_head); 1430 splx(s); 1431 break; 1432 case UE_BULK: 1433 pipe->methods = &ehci_device_bulk_methods; 1434 s = splusb(); 1435 ehci_add_qh(sqh, sc->sc_async_head); 1436 splx(s); 1437 break; 1438 case UE_INTERRUPT: 1439 pipe->methods = &ehci_device_intr_methods; 1440 ival = pipe->interval; 1441 if (ival == USBD_DEFAULT_INTERVAL) 1442 ival = ed->bInterval; 1443 return (ehci_device_setintr(sc, sqh, ival)); 1444 case UE_ISOCHRONOUS: 1445 pipe->methods = &ehci_device_isoc_methods; 1446 return (USBD_INVAL); 1447 default: 1448 return (USBD_INVAL); 1449 } 1450 return (USBD_NORMAL_COMPLETION); 1451 1452 bad1: 1453 ehci_free_sqh(sc, sqh); 1454 bad0: 1455 return (USBD_NOMEM); 1456 } 1457 1458 /* 1459 * Add an ED to the schedule. Called at splusb(). 1460 */ 1461 void 1462 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1463 { 1464 SPLUSBCHECK; 1465 1466 sqh->next = head->next; 1467 sqh->qh.qh_link = head->qh.qh_link; 1468 head->next = sqh; 1469 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1470 1471 #ifdef EHCI_DEBUG 1472 if (ehcidebug > 5) { 1473 printf("ehci_add_qh:\n"); 1474 ehci_dump_sqh(sqh); 1475 } 1476 #endif 1477 } 1478 1479 /* 1480 * Remove an ED from the schedule. Called at splusb(). 1481 */ 1482 void 1483 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1484 { 1485 ehci_soft_qh_t *p; 1486 1487 SPLUSBCHECK; 1488 /* XXX */ 1489 for (p = head; p != NULL && p->next != sqh; p = p->next) 1490 ; 1491 if (p == NULL) 1492 panic("ehci_rem_qh: ED not found"); 1493 p->next = sqh->next; 1494 p->qh.qh_link = sqh->qh.qh_link; 1495 1496 ehci_sync_hc(sc); 1497 } 1498 1499 void 1500 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1501 { 1502 int i; 1503 u_int32_t status; 1504 1505 /* Save toggle bit and ping status. */ 1506 status = sqh->qh.qh_qtd.qtd_status & 1507 htole32(EHCI_QTD_TOGGLE_MASK | 1508 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1509 /* Set HALTED to make hw leave it alone. */ 1510 sqh->qh.qh_qtd.qtd_status = 1511 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1512 sqh->qh.qh_curqtd = 0; 1513 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1514 sqh->qh.qh_qtd.qtd_altnext = 0; 1515 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1516 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1517 sqh->sqtd = sqtd; 1518 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1519 sqh->qh.qh_qtd.qtd_status = status; 1520 } 1521 1522 /* 1523 * Ensure that the HC has released all references to the QH. We do this 1524 * by asking for a Async Advance Doorbell interrupt and then we wait for 1525 * the interrupt. 1526 * To make this easier we first obtain exclusive use of the doorbell. 1527 */ 1528 void 1529 ehci_sync_hc(ehci_softc_t *sc) 1530 { 1531 int s, error; 1532 1533 if (sc->sc_dying) { 1534 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1535 return; 1536 } 1537 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1538 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1539 s = splhardusb(); 1540 /* ask for doorbell */ 1541 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1542 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1543 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1544 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1545 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1546 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1547 splx(s); 1548 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1549 #ifdef DIAGNOSTIC 1550 if (error) 1551 printf("ehci_sync_hc: tsleep() = %d\n", error); 1552 #endif 1553 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1554 } 1555 1556 /***********/ 1557 1558 /* 1559 * Data structures and routines to emulate the root hub. 1560 */ 1561 Static usb_device_descriptor_t ehci_devd = { 1562 USB_DEVICE_DESCRIPTOR_SIZE, 1563 UDESC_DEVICE, /* type */ 1564 {0x00, 0x02}, /* USB version */ 1565 UDCLASS_HUB, /* class */ 1566 UDSUBCLASS_HUB, /* subclass */ 1567 UDPROTO_HSHUBSTT, /* protocol */ 1568 64, /* max packet */ 1569 {0},{0},{0x00,0x01}, /* device id */ 1570 1,2,0, /* string indicies */ 1571 1 /* # of configurations */ 1572 }; 1573 1574 Static usb_device_qualifier_t ehci_odevd = { 1575 USB_DEVICE_DESCRIPTOR_SIZE, 1576 UDESC_DEVICE_QUALIFIER, /* type */ 1577 {0x00, 0x02}, /* USB version */ 1578 UDCLASS_HUB, /* class */ 1579 UDSUBCLASS_HUB, /* subclass */ 1580 UDPROTO_FSHUB, /* protocol */ 1581 64, /* max packet */ 1582 1, /* # of configurations */ 1583 0 1584 }; 1585 1586 Static usb_config_descriptor_t ehci_confd = { 1587 USB_CONFIG_DESCRIPTOR_SIZE, 1588 UDESC_CONFIG, 1589 {USB_CONFIG_DESCRIPTOR_SIZE + 1590 USB_INTERFACE_DESCRIPTOR_SIZE + 1591 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1592 1, 1593 1, 1594 0, 1595 UC_SELF_POWERED, 1596 0 /* max power */ 1597 }; 1598 1599 Static usb_interface_descriptor_t ehci_ifcd = { 1600 USB_INTERFACE_DESCRIPTOR_SIZE, 1601 UDESC_INTERFACE, 1602 0, 1603 0, 1604 1, 1605 UICLASS_HUB, 1606 UISUBCLASS_HUB, 1607 UIPROTO_HSHUBSTT, 1608 0 1609 }; 1610 1611 Static usb_endpoint_descriptor_t ehci_endpd = { 1612 USB_ENDPOINT_DESCRIPTOR_SIZE, 1613 UDESC_ENDPOINT, 1614 UE_DIR_IN | EHCI_INTR_ENDPT, 1615 UE_INTERRUPT, 1616 {8, 0}, /* max packet */ 1617 255 1618 }; 1619 1620 Static usb_hub_descriptor_t ehci_hubd = { 1621 USB_HUB_DESCRIPTOR_SIZE, 1622 UDESC_HUB, 1623 0, 1624 {0,0}, 1625 0, 1626 0, 1627 {0}, 1628 }; 1629 1630 Static int 1631 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1632 { 1633 int i; 1634 1635 if (l == 0) 1636 return (0); 1637 p->bLength = 2 * strlen(s) + 2; 1638 if (l == 1) 1639 return (1); 1640 p->bDescriptorType = UDESC_STRING; 1641 l -= 2; 1642 for (i = 0; s[i] && l > 1; i++, l -= 2) 1643 USETW2(p->bString[i], 0, s[i]); 1644 return (2*i+2); 1645 } 1646 1647 /* 1648 * Simulate a hardware hub by handling all the necessary requests. 1649 */ 1650 Static usbd_status 1651 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1652 { 1653 usbd_status err; 1654 1655 /* Insert last in queue. */ 1656 err = usb_insert_transfer(xfer); 1657 if (err) 1658 return (err); 1659 1660 /* Pipe isn't running, start first */ 1661 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1662 } 1663 1664 Static usbd_status 1665 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1666 { 1667 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1668 usb_device_request_t *req; 1669 void *buf = NULL; 1670 int port, i; 1671 int s, len, value, index, l, totlen = 0; 1672 usb_port_status_t ps; 1673 usb_hub_descriptor_t hubd; 1674 usbd_status err; 1675 u_int32_t v; 1676 1677 if (sc->sc_dying) 1678 return (USBD_IOERROR); 1679 1680 #ifdef DIAGNOSTIC 1681 if (!(xfer->rqflags & URQ_REQUEST)) 1682 /* XXX panic */ 1683 return (USBD_INVAL); 1684 #endif 1685 req = &xfer->request; 1686 1687 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1688 req->bmRequestType, req->bRequest)); 1689 1690 len = UGETW(req->wLength); 1691 value = UGETW(req->wValue); 1692 index = UGETW(req->wIndex); 1693 1694 if (len != 0) 1695 buf = KERNADDR(&xfer->dmabuf, 0); 1696 1697 #define C(x,y) ((x) | ((y) << 8)) 1698 switch(C(req->bRequest, req->bmRequestType)) { 1699 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1700 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1701 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1702 /* 1703 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1704 * for the integrated root hub. 1705 */ 1706 break; 1707 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1708 if (len > 0) { 1709 *(u_int8_t *)buf = sc->sc_conf; 1710 totlen = 1; 1711 } 1712 break; 1713 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1714 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1715 switch(value >> 8) { 1716 case UDESC_DEVICE: 1717 if ((value & 0xff) != 0) { 1718 err = USBD_IOERROR; 1719 goto ret; 1720 } 1721 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1722 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1723 memcpy(buf, &ehci_devd, l); 1724 break; 1725 /* 1726 * We can't really operate at another speed, but the spec says 1727 * we need this descriptor. 1728 */ 1729 case UDESC_DEVICE_QUALIFIER: 1730 if ((value & 0xff) != 0) { 1731 err = USBD_IOERROR; 1732 goto ret; 1733 } 1734 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1735 memcpy(buf, &ehci_odevd, l); 1736 break; 1737 /* 1738 * We can't really operate at another speed, but the spec says 1739 * we need this descriptor. 1740 */ 1741 case UDESC_OTHER_SPEED_CONFIGURATION: 1742 case UDESC_CONFIG: 1743 if ((value & 0xff) != 0) { 1744 err = USBD_IOERROR; 1745 goto ret; 1746 } 1747 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1748 memcpy(buf, &ehci_confd, l); 1749 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1750 value >> 8; 1751 buf = (char *)buf + l; 1752 len -= l; 1753 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1754 totlen += l; 1755 memcpy(buf, &ehci_ifcd, l); 1756 buf = (char *)buf + l; 1757 len -= l; 1758 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1759 totlen += l; 1760 memcpy(buf, &ehci_endpd, l); 1761 break; 1762 case UDESC_STRING: 1763 if (len == 0) 1764 break; 1765 *(u_int8_t *)buf = 0; 1766 totlen = 1; 1767 switch (value & 0xff) { 1768 case 0: /* Language table */ 1769 totlen = ehci_str(buf, len, "\001"); 1770 break; 1771 case 1: /* Vendor */ 1772 totlen = ehci_str(buf, len, sc->sc_vendor); 1773 break; 1774 case 2: /* Product */ 1775 totlen = ehci_str(buf, len, "EHCI root hub"); 1776 break; 1777 } 1778 break; 1779 default: 1780 err = USBD_IOERROR; 1781 goto ret; 1782 } 1783 break; 1784 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1785 if (len > 0) { 1786 *(u_int8_t *)buf = 0; 1787 totlen = 1; 1788 } 1789 break; 1790 case C(UR_GET_STATUS, UT_READ_DEVICE): 1791 if (len > 1) { 1792 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1793 totlen = 2; 1794 } 1795 break; 1796 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1797 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1798 if (len > 1) { 1799 USETW(((usb_status_t *)buf)->wStatus, 0); 1800 totlen = 2; 1801 } 1802 break; 1803 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1804 if (value >= USB_MAX_DEVICES) { 1805 err = USBD_IOERROR; 1806 goto ret; 1807 } 1808 sc->sc_addr = value; 1809 break; 1810 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1811 if (value != 0 && value != 1) { 1812 err = USBD_IOERROR; 1813 goto ret; 1814 } 1815 sc->sc_conf = value; 1816 break; 1817 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1818 break; 1819 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1820 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1821 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1822 err = USBD_IOERROR; 1823 goto ret; 1824 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1825 break; 1826 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1827 break; 1828 /* Hub requests */ 1829 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1830 break; 1831 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1832 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1833 "port=%d feature=%d\n", 1834 index, value)); 1835 if (index < 1 || index > sc->sc_noport) { 1836 err = USBD_IOERROR; 1837 goto ret; 1838 } 1839 port = EHCI_PORTSC(index); 1840 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1841 switch(value) { 1842 case UHF_PORT_ENABLE: 1843 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1844 break; 1845 case UHF_PORT_SUSPEND: 1846 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1847 break; 1848 case UHF_PORT_POWER: 1849 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1850 break; 1851 case UHF_PORT_TEST: 1852 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1853 "%d\n", index)); 1854 break; 1855 case UHF_PORT_INDICATOR: 1856 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1857 "%d\n", index)); 1858 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1859 break; 1860 case UHF_C_PORT_CONNECTION: 1861 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1862 break; 1863 case UHF_C_PORT_ENABLE: 1864 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1865 break; 1866 case UHF_C_PORT_SUSPEND: 1867 /* how? */ 1868 break; 1869 case UHF_C_PORT_OVER_CURRENT: 1870 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1871 break; 1872 case UHF_C_PORT_RESET: 1873 sc->sc_isreset = 0; 1874 break; 1875 default: 1876 err = USBD_IOERROR; 1877 goto ret; 1878 } 1879 #if 0 1880 switch(value) { 1881 case UHF_C_PORT_CONNECTION: 1882 case UHF_C_PORT_ENABLE: 1883 case UHF_C_PORT_SUSPEND: 1884 case UHF_C_PORT_OVER_CURRENT: 1885 case UHF_C_PORT_RESET: 1886 /* Enable RHSC interrupt if condition is cleared. */ 1887 if ((OREAD4(sc, port) >> 16) == 0) 1888 ehci_pcd_able(sc, 1); 1889 break; 1890 default: 1891 break; 1892 } 1893 #endif 1894 break; 1895 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1896 if ((value & 0xff) != 0) { 1897 err = USBD_IOERROR; 1898 goto ret; 1899 } 1900 hubd = ehci_hubd; 1901 hubd.bNbrPorts = sc->sc_noport; 1902 v = EOREAD4(sc, EHCI_HCSPARAMS); 1903 USETW(hubd.wHubCharacteristics, 1904 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1905 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1906 ? UHD_PORT_IND : 0); 1907 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1908 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1909 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1910 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1911 l = min(len, hubd.bDescLength); 1912 totlen = l; 1913 memcpy(buf, &hubd, l); 1914 break; 1915 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1916 if (len != 4) { 1917 err = USBD_IOERROR; 1918 goto ret; 1919 } 1920 memset(buf, 0, len); /* ? XXX */ 1921 totlen = len; 1922 break; 1923 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1924 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1925 index)); 1926 if (index < 1 || index > sc->sc_noport) { 1927 err = USBD_IOERROR; 1928 goto ret; 1929 } 1930 if (len != 4) { 1931 err = USBD_IOERROR; 1932 goto ret; 1933 } 1934 v = EOREAD4(sc, EHCI_PORTSC(index)); 1935 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1936 v)); 1937 i = UPS_HIGH_SPEED; 1938 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1939 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1940 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1941 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1942 if (v & EHCI_PS_PR) i |= UPS_RESET; 1943 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1944 USETW(ps.wPortStatus, i); 1945 i = 0; 1946 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1947 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1948 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1949 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1950 USETW(ps.wPortChange, i); 1951 l = min(len, sizeof ps); 1952 memcpy(buf, &ps, l); 1953 totlen = l; 1954 break; 1955 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1956 err = USBD_IOERROR; 1957 goto ret; 1958 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1959 break; 1960 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1961 if (index < 1 || index > sc->sc_noport) { 1962 err = USBD_IOERROR; 1963 goto ret; 1964 } 1965 port = EHCI_PORTSC(index); 1966 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1967 switch(value) { 1968 case UHF_PORT_ENABLE: 1969 EOWRITE4(sc, port, v | EHCI_PS_PE); 1970 break; 1971 case UHF_PORT_SUSPEND: 1972 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1973 break; 1974 case UHF_PORT_RESET: 1975 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1976 index)); 1977 if (EHCI_PS_IS_LOWSPEED(v)) { 1978 /* Low speed device, give up ownership. */ 1979 ehci_disown(sc, index, 1); 1980 break; 1981 } 1982 /* Start reset sequence. */ 1983 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1984 EOWRITE4(sc, port, v | EHCI_PS_PR); 1985 /* Wait for reset to complete. */ 1986 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1987 if (sc->sc_dying) { 1988 err = USBD_IOERROR; 1989 goto ret; 1990 } 1991 /* Terminate reset sequence. */ 1992 EOWRITE4(sc, port, v); 1993 /* Wait for HC to complete reset. */ 1994 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 1995 if (sc->sc_dying) { 1996 err = USBD_IOERROR; 1997 goto ret; 1998 } 1999 v = EOREAD4(sc, port); 2000 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2001 if (v & EHCI_PS_PR) { 2002 printf("%s: port reset timeout\n", 2003 USBDEVNAME(sc->sc_bus.bdev)); 2004 return (USBD_TIMEOUT); 2005 } 2006 if (!(v & EHCI_PS_PE)) { 2007 /* Not a high speed device, give up ownership.*/ 2008 ehci_disown(sc, index, 0); 2009 break; 2010 } 2011 sc->sc_isreset = 1; 2012 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2013 index, v)); 2014 break; 2015 case UHF_PORT_POWER: 2016 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2017 "%d\n", index)); 2018 EOWRITE4(sc, port, v | EHCI_PS_PP); 2019 break; 2020 case UHF_PORT_TEST: 2021 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2022 "%d\n", index)); 2023 break; 2024 case UHF_PORT_INDICATOR: 2025 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2026 "%d\n", index)); 2027 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2028 break; 2029 default: 2030 err = USBD_IOERROR; 2031 goto ret; 2032 } 2033 break; 2034 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2035 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2036 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2037 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2038 break; 2039 default: 2040 err = USBD_IOERROR; 2041 goto ret; 2042 } 2043 xfer->actlen = totlen; 2044 err = USBD_NORMAL_COMPLETION; 2045 ret: 2046 xfer->status = err; 2047 s = splusb(); 2048 usb_transfer_complete(xfer); 2049 splx(s); 2050 return (USBD_IN_PROGRESS); 2051 } 2052 2053 void 2054 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2055 { 2056 int port; 2057 u_int32_t v; 2058 2059 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2060 #ifdef DIAGNOSTIC 2061 if (sc->sc_npcomp != 0) { 2062 int i = (index-1) / sc->sc_npcomp; 2063 if (i >= sc->sc_ncomp) 2064 printf("%s: strange port\n", 2065 USBDEVNAME(sc->sc_bus.bdev)); 2066 else 2067 printf("%s: handing over %s speed device on " 2068 "port %d to %s\n", 2069 USBDEVNAME(sc->sc_bus.bdev), 2070 lowspeed ? "low" : "full", 2071 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2072 } else { 2073 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2074 } 2075 #endif 2076 port = EHCI_PORTSC(index); 2077 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2078 EOWRITE4(sc, port, v | EHCI_PS_PO); 2079 } 2080 2081 /* Abort a root control request. */ 2082 Static void 2083 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2084 { 2085 /* Nothing to do, all transfers are synchronous. */ 2086 } 2087 2088 /* Close the root pipe. */ 2089 Static void 2090 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2091 { 2092 DPRINTF(("ehci_root_ctrl_close\n")); 2093 /* Nothing to do. */ 2094 } 2095 2096 void 2097 ehci_root_intr_done(usbd_xfer_handle xfer) 2098 { 2099 xfer->hcpriv = NULL; 2100 } 2101 2102 Static usbd_status 2103 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2104 { 2105 usbd_status err; 2106 2107 /* Insert last in queue. */ 2108 err = usb_insert_transfer(xfer); 2109 if (err) 2110 return (err); 2111 2112 /* Pipe isn't running, start first */ 2113 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2114 } 2115 2116 Static usbd_status 2117 ehci_root_intr_start(usbd_xfer_handle xfer) 2118 { 2119 usbd_pipe_handle pipe = xfer->pipe; 2120 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2121 2122 if (sc->sc_dying) 2123 return (USBD_IOERROR); 2124 2125 sc->sc_intrxfer = xfer; 2126 2127 return (USBD_IN_PROGRESS); 2128 } 2129 2130 /* Abort a root interrupt request. */ 2131 Static void 2132 ehci_root_intr_abort(usbd_xfer_handle xfer) 2133 { 2134 int s; 2135 2136 if (xfer->pipe->intrxfer == xfer) { 2137 DPRINTF(("ehci_root_intr_abort: remove\n")); 2138 xfer->pipe->intrxfer = NULL; 2139 } 2140 xfer->status = USBD_CANCELLED; 2141 s = splusb(); 2142 usb_transfer_complete(xfer); 2143 splx(s); 2144 } 2145 2146 /* Close the root pipe. */ 2147 Static void 2148 ehci_root_intr_close(usbd_pipe_handle pipe) 2149 { 2150 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2151 2152 DPRINTF(("ehci_root_intr_close\n")); 2153 2154 sc->sc_intrxfer = NULL; 2155 } 2156 2157 void 2158 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2159 { 2160 xfer->hcpriv = NULL; 2161 } 2162 2163 /************************/ 2164 2165 ehci_soft_qh_t * 2166 ehci_alloc_sqh(ehci_softc_t *sc) 2167 { 2168 ehci_soft_qh_t *sqh; 2169 usbd_status err; 2170 int i, offs; 2171 usb_dma_t dma; 2172 2173 if (sc->sc_freeqhs == NULL) { 2174 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2175 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2176 EHCI_PAGE_SIZE, &dma); 2177 #ifdef EHCI_DEBUG 2178 if (err) 2179 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2180 #endif 2181 if (err) 2182 return (NULL); 2183 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2184 offs = i * EHCI_SQH_SIZE; 2185 sqh = KERNADDR(&dma, offs); 2186 sqh->physaddr = DMAADDR(&dma, offs); 2187 sqh->next = sc->sc_freeqhs; 2188 sc->sc_freeqhs = sqh; 2189 } 2190 } 2191 sqh = sc->sc_freeqhs; 2192 sc->sc_freeqhs = sqh->next; 2193 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2194 sqh->next = NULL; 2195 return (sqh); 2196 } 2197 2198 void 2199 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2200 { 2201 sqh->next = sc->sc_freeqhs; 2202 sc->sc_freeqhs = sqh; 2203 } 2204 2205 ehci_soft_qtd_t * 2206 ehci_alloc_sqtd(ehci_softc_t *sc) 2207 { 2208 ehci_soft_qtd_t *sqtd; 2209 usbd_status err; 2210 int i, offs; 2211 usb_dma_t dma; 2212 int s; 2213 2214 if (sc->sc_freeqtds == NULL) { 2215 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2216 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2217 EHCI_PAGE_SIZE, &dma); 2218 #ifdef EHCI_DEBUG 2219 if (err) 2220 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2221 #endif 2222 if (err) 2223 return (NULL); 2224 s = splusb(); 2225 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2226 offs = i * EHCI_SQTD_SIZE; 2227 sqtd = KERNADDR(&dma, offs); 2228 sqtd->physaddr = DMAADDR(&dma, offs); 2229 sqtd->nextqtd = sc->sc_freeqtds; 2230 sc->sc_freeqtds = sqtd; 2231 } 2232 splx(s); 2233 } 2234 2235 s = splusb(); 2236 sqtd = sc->sc_freeqtds; 2237 sc->sc_freeqtds = sqtd->nextqtd; 2238 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2239 sqtd->nextqtd = NULL; 2240 sqtd->xfer = NULL; 2241 splx(s); 2242 2243 return (sqtd); 2244 } 2245 2246 void 2247 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2248 { 2249 int s; 2250 2251 s = splusb(); 2252 sqtd->nextqtd = sc->sc_freeqtds; 2253 sc->sc_freeqtds = sqtd; 2254 splx(s); 2255 } 2256 2257 usbd_status 2258 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2259 int alen, int rd, usbd_xfer_handle xfer, 2260 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2261 { 2262 ehci_soft_qtd_t *next, *cur; 2263 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2264 u_int32_t qtdstatus; 2265 int len, curlen, mps; 2266 int i, tog; 2267 usb_dma_t *dma = &xfer->dmabuf; 2268 2269 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2270 2271 len = alen; 2272 dataphys = DMAADDR(dma, 0); 2273 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2274 #if 0 2275 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2276 epipe->nexttoggle); 2277 #endif 2278 qtdstatus = EHCI_QTD_ACTIVE | 2279 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2280 EHCI_QTD_SET_CERR(3) 2281 /* IOC set below */ 2282 /* BYTES set below */ 2283 ; 2284 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2285 tog = epipe->nexttoggle; 2286 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2287 2288 cur = ehci_alloc_sqtd(sc); 2289 *sp = cur; 2290 if (cur == NULL) 2291 goto nomem; 2292 for (;;) { 2293 dataphyspage = EHCI_PAGE(dataphys); 2294 /* The EHCI hardware can handle at most 5 pages. */ 2295 if (dataphyslastpage - dataphyspage < 2296 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2297 /* we can handle it in this QTD */ 2298 curlen = len; 2299 } else { 2300 /* must use multiple TDs, fill as much as possible. */ 2301 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2302 EHCI_PAGE_OFFSET(dataphys); 2303 #ifdef DIAGNOSTIC 2304 if (curlen > len) { 2305 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2306 "len=0x%x offs=0x%x\n", curlen, len, 2307 EHCI_PAGE_OFFSET(dataphys)); 2308 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2309 dataphyslastpage, dataphyspage, 2310 dataphys); 2311 curlen = len; 2312 } 2313 #endif 2314 /* the length must be a multiple of the max size */ 2315 curlen -= curlen % mps; 2316 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2317 "curlen=%d\n", curlen)); 2318 #ifdef DIAGNOSTIC 2319 if (curlen == 0) 2320 panic("ehci_alloc_std: curlen == 0"); 2321 #endif 2322 } 2323 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2324 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2325 dataphys, dataphyslastpage, 2326 len, curlen)); 2327 len -= curlen; 2328 2329 if (len != 0) { 2330 next = ehci_alloc_sqtd(sc); 2331 if (next == NULL) 2332 goto nomem; 2333 nextphys = htole32(next->physaddr); 2334 } else { 2335 next = NULL; 2336 nextphys = EHCI_NULL; 2337 } 2338 2339 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2340 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2341 if (i != 0) /* use offset only in first buffer */ 2342 a = EHCI_PAGE(a); 2343 cur->qtd.qtd_buffer[i] = htole32(a); 2344 cur->qtd.qtd_buffer_hi[i] = 0; 2345 #ifdef DIAGNOSTIC 2346 if (i >= EHCI_QTD_NBUFFERS) { 2347 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2348 goto nomem; 2349 } 2350 #endif 2351 } 2352 cur->nextqtd = next; 2353 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2354 cur->qtd.qtd_status = 2355 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2356 cur->xfer = xfer; 2357 cur->len = curlen; 2358 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2359 dataphys, dataphys + curlen)); 2360 /* adjust the toggle based on the number of packets in this 2361 qtd */ 2362 if (((curlen + mps - 1) / mps) & 1) { 2363 tog ^= 1; 2364 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2365 } 2366 if (len == 0) 2367 break; 2368 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2369 dataphys += curlen; 2370 cur = next; 2371 } 2372 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2373 *ep = cur; 2374 epipe->nexttoggle = tog; 2375 2376 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2377 *sp, *ep)); 2378 2379 return (USBD_NORMAL_COMPLETION); 2380 2381 nomem: 2382 /* XXX free chain */ 2383 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2384 return (USBD_NOMEM); 2385 } 2386 2387 Static void 2388 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2389 ehci_soft_qtd_t *sqtdend) 2390 { 2391 ehci_soft_qtd_t *p; 2392 int i; 2393 2394 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2395 sqtd, sqtdend)); 2396 2397 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2398 p = sqtd->nextqtd; 2399 ehci_free_sqtd(sc, sqtd); 2400 } 2401 } 2402 2403 /****************/ 2404 2405 /* 2406 * Close a reqular pipe. 2407 * Assumes that there are no pending transactions. 2408 */ 2409 void 2410 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2411 { 2412 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2413 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2414 ehci_soft_qh_t *sqh = epipe->sqh; 2415 int s; 2416 2417 s = splusb(); 2418 ehci_rem_qh(sc, sqh, head); 2419 splx(s); 2420 ehci_free_sqh(sc, epipe->sqh); 2421 } 2422 2423 /* 2424 * Abort a device request. 2425 * If this routine is called at splusb() it guarantees that the request 2426 * will be removed from the hardware scheduling and that the callback 2427 * for it will be called with USBD_CANCELLED status. 2428 * It's impossible to guarantee that the requested transfer will not 2429 * have happened since the hardware runs concurrently. 2430 * If the transaction has already happened we rely on the ordinary 2431 * interrupt processing to process it. 2432 * XXX This is most probably wrong. 2433 */ 2434 void 2435 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2436 { 2437 #define exfer EXFER(xfer) 2438 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2439 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2440 ehci_soft_qh_t *sqh = epipe->sqh; 2441 ehci_soft_qtd_t *sqtd; 2442 ehci_physaddr_t cur; 2443 u_int32_t qhstatus; 2444 int s; 2445 int hit; 2446 2447 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2448 2449 if (sc->sc_dying) { 2450 /* If we're dying, just do the software part. */ 2451 s = splusb(); 2452 xfer->status = status; /* make software ignore it */ 2453 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2454 usb_transfer_complete(xfer); 2455 splx(s); 2456 return; 2457 } 2458 2459 if (xfer->device->bus->intr_context || !curproc) 2460 panic("ehci_abort_xfer: not in process context"); 2461 2462 /* 2463 * Step 1: Make interrupt routine and hardware ignore xfer. 2464 */ 2465 s = splusb(); 2466 xfer->status = status; /* make software ignore it */ 2467 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2468 qhstatus = sqh->qh.qh_qtd.qtd_status; 2469 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2470 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2471 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2472 if (sqtd == exfer->sqtdend) 2473 break; 2474 } 2475 splx(s); 2476 2477 /* 2478 * Step 2: Wait until we know hardware has finished any possible 2479 * use of the xfer. Also make sure the soft interrupt routine 2480 * has run. 2481 */ 2482 ehci_sync_hc(sc); 2483 s = splusb(); 2484 #ifdef USB_USE_SOFTINTR 2485 sc->sc_softwake = 1; 2486 #endif /* USB_USE_SOFTINTR */ 2487 usb_schedsoftintr(&sc->sc_bus); 2488 #ifdef USB_USE_SOFTINTR 2489 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2490 #endif /* USB_USE_SOFTINTR */ 2491 splx(s); 2492 2493 /* 2494 * Step 3: Remove any vestiges of the xfer from the hardware. 2495 * The complication here is that the hardware may have executed 2496 * beyond the xfer we're trying to abort. So as we're scanning 2497 * the TDs of this xfer we check if the hardware points to 2498 * any of them. 2499 */ 2500 s = splusb(); /* XXX why? */ 2501 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2502 hit = 0; 2503 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2504 hit |= cur == sqtd->physaddr; 2505 if (sqtd == exfer->sqtdend) 2506 break; 2507 } 2508 sqtd = sqtd->nextqtd; 2509 /* Zap curqtd register if hardware pointed inside the xfer. */ 2510 if (hit && sqtd != NULL) { 2511 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2512 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2513 sqh->qh.qh_qtd.qtd_status = qhstatus; 2514 } else { 2515 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2516 } 2517 2518 /* 2519 * Step 4: Execute callback. 2520 */ 2521 #ifdef DIAGNOSTIC 2522 exfer->isdone = 1; 2523 #endif 2524 usb_transfer_complete(xfer); 2525 2526 splx(s); 2527 #undef exfer 2528 } 2529 2530 void 2531 ehci_timeout(void *addr) 2532 { 2533 struct ehci_xfer *exfer = addr; 2534 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2535 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2536 2537 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2538 #ifdef USB_DEBUG 2539 if (ehcidebug > 1) 2540 usbd_dump_pipe(exfer->xfer.pipe); 2541 #endif 2542 2543 if (sc->sc_dying) { 2544 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2545 return; 2546 } 2547 2548 /* Execute the abort in a process context. */ 2549 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2550 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2551 } 2552 2553 void 2554 ehci_timeout_task(void *addr) 2555 { 2556 usbd_xfer_handle xfer = addr; 2557 int s; 2558 2559 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2560 2561 s = splusb(); 2562 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2563 splx(s); 2564 } 2565 2566 /************************/ 2567 2568 Static usbd_status 2569 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2570 { 2571 usbd_status err; 2572 2573 /* Insert last in queue. */ 2574 err = usb_insert_transfer(xfer); 2575 if (err) 2576 return (err); 2577 2578 /* Pipe isn't running, start first */ 2579 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2580 } 2581 2582 Static usbd_status 2583 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2584 { 2585 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2586 usbd_status err; 2587 2588 if (sc->sc_dying) 2589 return (USBD_IOERROR); 2590 2591 #ifdef DIAGNOSTIC 2592 if (!(xfer->rqflags & URQ_REQUEST)) { 2593 /* XXX panic */ 2594 printf("ehci_device_ctrl_transfer: not a request\n"); 2595 return (USBD_INVAL); 2596 } 2597 #endif 2598 2599 err = ehci_device_request(xfer); 2600 if (err) 2601 return (err); 2602 2603 if (sc->sc_bus.use_polling) 2604 ehci_waitintr(sc, xfer); 2605 return (USBD_IN_PROGRESS); 2606 } 2607 2608 void 2609 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2610 { 2611 struct ehci_xfer *ex = EXFER(xfer); 2612 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2613 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2614 2615 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2616 2617 #ifdef DIAGNOSTIC 2618 if (!(xfer->rqflags & URQ_REQUEST)) { 2619 panic("ehci_ctrl_done: not a request"); 2620 } 2621 #endif 2622 2623 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2624 ehci_del_intr_list(ex); /* remove from active list */ 2625 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2626 } 2627 2628 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2629 } 2630 2631 /* Abort a device control request. */ 2632 Static void 2633 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2634 { 2635 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2636 ehci_abort_xfer(xfer, USBD_CANCELLED); 2637 } 2638 2639 /* Close a device control pipe. */ 2640 Static void 2641 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2642 { 2643 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2644 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2645 2646 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2647 ehci_close_pipe(pipe, sc->sc_async_head); 2648 } 2649 2650 usbd_status 2651 ehci_device_request(usbd_xfer_handle xfer) 2652 { 2653 #define exfer EXFER(xfer) 2654 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2655 usb_device_request_t *req = &xfer->request; 2656 usbd_device_handle dev = epipe->pipe.device; 2657 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2658 int addr = dev->address; 2659 ehci_soft_qtd_t *setup, *stat, *next; 2660 ehci_soft_qh_t *sqh; 2661 int isread; 2662 int len; 2663 usbd_status err; 2664 int s; 2665 2666 isread = req->bmRequestType & UT_READ; 2667 len = UGETW(req->wLength); 2668 2669 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2670 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2671 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2672 UGETW(req->wIndex), len, addr, 2673 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2674 2675 setup = ehci_alloc_sqtd(sc); 2676 if (setup == NULL) { 2677 err = USBD_NOMEM; 2678 goto bad1; 2679 } 2680 stat = ehci_alloc_sqtd(sc); 2681 if (stat == NULL) { 2682 err = USBD_NOMEM; 2683 goto bad2; 2684 } 2685 2686 sqh = epipe->sqh; 2687 epipe->u.ctl.length = len; 2688 2689 /* Update device address and length since they may have changed 2690 during the setup of the control pipe in usbd_new_device(). */ 2691 /* XXX This only needs to be done once, but it's too early in open. */ 2692 /* XXXX Should not touch ED here! */ 2693 sqh->qh.qh_endp = 2694 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2695 htole32( 2696 EHCI_QH_SET_ADDR(addr) | 2697 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2698 ); 2699 2700 /* Set up data transaction */ 2701 if (len != 0) { 2702 ehci_soft_qtd_t *end; 2703 2704 /* Start toggle at 1. */ 2705 epipe->nexttoggle = 1; 2706 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2707 &next, &end); 2708 if (err) 2709 goto bad3; 2710 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2711 end->nextqtd = stat; 2712 end->qtd.qtd_next = 2713 end->qtd.qtd_altnext = htole32(stat->physaddr); 2714 } else { 2715 next = stat; 2716 } 2717 2718 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2719 2720 /* Clear toggle */ 2721 setup->qtd.qtd_status = htole32( 2722 EHCI_QTD_ACTIVE | 2723 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2724 EHCI_QTD_SET_CERR(3) | 2725 EHCI_QTD_SET_TOGGLE(0) | 2726 EHCI_QTD_SET_BYTES(sizeof *req) 2727 ); 2728 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2729 setup->qtd.qtd_buffer_hi[0] = 0; 2730 setup->nextqtd = next; 2731 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2732 setup->xfer = xfer; 2733 setup->len = sizeof *req; 2734 2735 stat->qtd.qtd_status = htole32( 2736 EHCI_QTD_ACTIVE | 2737 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2738 EHCI_QTD_SET_CERR(3) | 2739 EHCI_QTD_SET_TOGGLE(1) | 2740 EHCI_QTD_IOC 2741 ); 2742 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2743 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2744 stat->nextqtd = NULL; 2745 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2746 stat->xfer = xfer; 2747 stat->len = 0; 2748 2749 #ifdef EHCI_DEBUG 2750 if (ehcidebug > 5) { 2751 DPRINTF(("ehci_device_request:\n")); 2752 ehci_dump_sqh(sqh); 2753 ehci_dump_sqtds(setup); 2754 } 2755 #endif 2756 2757 exfer->sqtdstart = setup; 2758 exfer->sqtdend = stat; 2759 #ifdef DIAGNOSTIC 2760 if (!exfer->isdone) { 2761 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2762 } 2763 exfer->isdone = 0; 2764 #endif 2765 2766 /* Insert qTD in QH list. */ 2767 s = splusb(); 2768 ehci_set_qh_qtd(sqh, setup); 2769 if (xfer->timeout && !sc->sc_bus.use_polling) { 2770 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2771 ehci_timeout, xfer); 2772 } 2773 ehci_add_intr_list(sc, exfer); 2774 xfer->status = USBD_IN_PROGRESS; 2775 splx(s); 2776 2777 #ifdef EHCI_DEBUG 2778 if (ehcidebug > 10) { 2779 DPRINTF(("ehci_device_request: status=%x\n", 2780 EOREAD4(sc, EHCI_USBSTS))); 2781 delay(10000); 2782 ehci_dump_regs(sc); 2783 ehci_dump_sqh(sc->sc_async_head); 2784 ehci_dump_sqh(sqh); 2785 ehci_dump_sqtds(setup); 2786 } 2787 #endif 2788 2789 return (USBD_NORMAL_COMPLETION); 2790 2791 bad3: 2792 ehci_free_sqtd(sc, stat); 2793 bad2: 2794 ehci_free_sqtd(sc, setup); 2795 bad1: 2796 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2797 xfer->status = err; 2798 usb_transfer_complete(xfer); 2799 return (err); 2800 #undef exfer 2801 } 2802 2803 /************************/ 2804 2805 Static usbd_status 2806 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2807 { 2808 usbd_status err; 2809 2810 /* Insert last in queue. */ 2811 err = usb_insert_transfer(xfer); 2812 if (err) 2813 return (err); 2814 2815 /* Pipe isn't running, start first */ 2816 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2817 } 2818 2819 usbd_status 2820 ehci_device_bulk_start(usbd_xfer_handle xfer) 2821 { 2822 #define exfer EXFER(xfer) 2823 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2824 usbd_device_handle dev = epipe->pipe.device; 2825 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2826 ehci_soft_qtd_t *data, *dataend; 2827 ehci_soft_qh_t *sqh; 2828 usbd_status err; 2829 int len, isread, endpt; 2830 int s; 2831 2832 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2833 xfer, xfer->length, xfer->flags)); 2834 2835 if (sc->sc_dying) 2836 return (USBD_IOERROR); 2837 2838 #ifdef DIAGNOSTIC 2839 if (xfer->rqflags & URQ_REQUEST) 2840 panic("ehci_device_bulk_start: a request"); 2841 #endif 2842 2843 len = xfer->length; 2844 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2845 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2846 sqh = epipe->sqh; 2847 2848 epipe->u.bulk.length = len; 2849 2850 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2851 &dataend); 2852 if (err) { 2853 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2854 xfer->status = err; 2855 usb_transfer_complete(xfer); 2856 return (err); 2857 } 2858 2859 #ifdef EHCI_DEBUG 2860 if (ehcidebug > 5) { 2861 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2862 ehci_dump_sqh(sqh); 2863 ehci_dump_sqtds(data); 2864 } 2865 #endif 2866 2867 /* Set up interrupt info. */ 2868 exfer->sqtdstart = data; 2869 exfer->sqtdend = dataend; 2870 #ifdef DIAGNOSTIC 2871 if (!exfer->isdone) { 2872 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2873 } 2874 exfer->isdone = 0; 2875 #endif 2876 2877 s = splusb(); 2878 ehci_set_qh_qtd(sqh, data); 2879 if (xfer->timeout && !sc->sc_bus.use_polling) { 2880 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2881 ehci_timeout, xfer); 2882 } 2883 ehci_add_intr_list(sc, exfer); 2884 xfer->status = USBD_IN_PROGRESS; 2885 splx(s); 2886 2887 #ifdef EHCI_DEBUG 2888 if (ehcidebug > 10) { 2889 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2890 delay(10000); 2891 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2892 ehci_dump_regs(sc); 2893 #if 0 2894 printf("async_head:\n"); 2895 ehci_dump_sqh(sc->sc_async_head); 2896 #endif 2897 printf("sqh:\n"); 2898 ehci_dump_sqh(sqh); 2899 ehci_dump_sqtds(data); 2900 } 2901 #endif 2902 2903 if (sc->sc_bus.use_polling) 2904 ehci_waitintr(sc, xfer); 2905 2906 return (USBD_IN_PROGRESS); 2907 #undef exfer 2908 } 2909 2910 Static void 2911 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2912 { 2913 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2914 ehci_abort_xfer(xfer, USBD_CANCELLED); 2915 } 2916 2917 /* 2918 * Close a device bulk pipe. 2919 */ 2920 Static void 2921 ehci_device_bulk_close(usbd_pipe_handle pipe) 2922 { 2923 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2924 2925 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2926 ehci_close_pipe(pipe, sc->sc_async_head); 2927 } 2928 2929 void 2930 ehci_device_bulk_done(usbd_xfer_handle xfer) 2931 { 2932 struct ehci_xfer *ex = EXFER(xfer); 2933 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2934 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2935 2936 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2937 xfer, xfer->actlen)); 2938 2939 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2940 ehci_del_intr_list(ex); /* remove from active list */ 2941 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2942 } 2943 2944 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2945 } 2946 2947 /************************/ 2948 2949 Static usbd_status 2950 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2951 { 2952 struct ehci_soft_islot *isp; 2953 int islot, lev; 2954 2955 /* Find a poll rate that is large enough. */ 2956 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2957 if (EHCI_ILEV_IVAL(lev) <= ival) 2958 break; 2959 2960 /* Pick an interrupt slot at the right level. */ 2961 /* XXX could do better than picking at random */ 2962 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2963 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2964 2965 sqh->islot = islot; 2966 isp = &sc->sc_islots[islot]; 2967 ehci_add_qh(sqh, isp->sqh); 2968 2969 return (USBD_NORMAL_COMPLETION); 2970 } 2971 2972 Static usbd_status 2973 ehci_device_intr_transfer(usbd_xfer_handle xfer) 2974 { 2975 usbd_status err; 2976 2977 /* Insert last in queue. */ 2978 err = usb_insert_transfer(xfer); 2979 if (err) 2980 return (err); 2981 2982 /* 2983 * Pipe isn't running (otherwise err would be USBD_INPROG), 2984 * so start it first. 2985 */ 2986 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2987 } 2988 2989 Static usbd_status 2990 ehci_device_intr_start(usbd_xfer_handle xfer) 2991 { 2992 #define exfer EXFER(xfer) 2993 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2994 usbd_device_handle dev = xfer->pipe->device; 2995 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2996 ehci_soft_qtd_t *data, *dataend; 2997 ehci_soft_qh_t *sqh; 2998 usbd_status err; 2999 int len, isread, endpt; 3000 int s; 3001 3002 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3003 xfer, xfer->length, xfer->flags)); 3004 3005 if (sc->sc_dying) 3006 return (USBD_IOERROR); 3007 3008 #ifdef DIAGNOSTIC 3009 if (xfer->rqflags & URQ_REQUEST) 3010 panic("ehci_device_intr_start: a request"); 3011 #endif 3012 3013 len = xfer->length; 3014 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3015 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3016 sqh = epipe->sqh; 3017 3018 epipe->u.intr.length = len; 3019 3020 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3021 &dataend); 3022 if (err) { 3023 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3024 xfer->status = err; 3025 usb_transfer_complete(xfer); 3026 return (err); 3027 } 3028 3029 #ifdef EHCI_DEBUG 3030 if (ehcidebug > 5) { 3031 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3032 ehci_dump_sqh(sqh); 3033 ehci_dump_sqtds(data); 3034 } 3035 #endif 3036 3037 /* Set up interrupt info. */ 3038 exfer->sqtdstart = data; 3039 exfer->sqtdend = dataend; 3040 #ifdef DIAGNOSTIC 3041 if (!exfer->isdone) { 3042 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3043 } 3044 exfer->isdone = 0; 3045 #endif 3046 3047 s = splusb(); 3048 ehci_set_qh_qtd(sqh, data); 3049 if (xfer->timeout && !sc->sc_bus.use_polling) { 3050 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3051 ehci_timeout, xfer); 3052 } 3053 ehci_add_intr_list(sc, exfer); 3054 xfer->status = USBD_IN_PROGRESS; 3055 splx(s); 3056 3057 #ifdef EHCI_DEBUG 3058 if (ehcidebug > 10) { 3059 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3060 delay(10000); 3061 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3062 ehci_dump_regs(sc); 3063 printf("sqh:\n"); 3064 ehci_dump_sqh(sqh); 3065 ehci_dump_sqtds(data); 3066 } 3067 #endif 3068 3069 if (sc->sc_bus.use_polling) 3070 ehci_waitintr(sc, xfer); 3071 3072 return (USBD_IN_PROGRESS); 3073 #undef exfer 3074 } 3075 3076 Static void 3077 ehci_device_intr_abort(usbd_xfer_handle xfer) 3078 { 3079 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3080 if (xfer->pipe->intrxfer == xfer) { 3081 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3082 xfer->pipe->intrxfer = NULL; 3083 } 3084 ehci_abort_xfer(xfer, USBD_CANCELLED); 3085 } 3086 3087 Static void 3088 ehci_device_intr_close(usbd_pipe_handle pipe) 3089 { 3090 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3091 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3092 struct ehci_soft_islot *isp; 3093 3094 isp = &sc->sc_islots[epipe->sqh->islot]; 3095 ehci_close_pipe(pipe, isp->sqh); 3096 } 3097 3098 Static void 3099 ehci_device_intr_done(usbd_xfer_handle xfer) 3100 { 3101 #define exfer EXFER(xfer) 3102 struct ehci_xfer *ex = EXFER(xfer); 3103 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3104 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3105 ehci_soft_qtd_t *data, *dataend; 3106 ehci_soft_qh_t *sqh; 3107 usbd_status err; 3108 int len, isread, endpt, s; 3109 3110 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3111 xfer, xfer->actlen)); 3112 3113 if (xfer->pipe->repeat) { 3114 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3115 3116 len = epipe->u.intr.length; 3117 xfer->length = len; 3118 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3119 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3120 sqh = epipe->sqh; 3121 3122 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3123 &data, &dataend); 3124 if (err) { 3125 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3126 xfer->status = err; 3127 return; 3128 } 3129 3130 /* Set up interrupt info. */ 3131 exfer->sqtdstart = data; 3132 exfer->sqtdend = dataend; 3133 #ifdef DIAGNOSTIC 3134 if (!exfer->isdone) { 3135 printf("ehci_device_intr_done: not done, ex=%p\n", 3136 exfer); 3137 } 3138 exfer->isdone = 0; 3139 #endif 3140 3141 s = splusb(); 3142 ehci_set_qh_qtd(sqh, data); 3143 if (xfer->timeout && !sc->sc_bus.use_polling) { 3144 usb_callout(xfer->timeout_handle, 3145 mstohz(xfer->timeout), ehci_timeout, xfer); 3146 } 3147 splx(s); 3148 3149 xfer->status = USBD_IN_PROGRESS; 3150 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3151 ehci_del_intr_list(ex); /* remove from active list */ 3152 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3153 } 3154 #undef exfer 3155 } 3156 3157 /************************/ 3158 3159 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3160 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3161 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3162 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3163 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3164
Indexes created Mon Sep 22 21:09:42 GMT 2025