ehci.c revision 1.98
1 /* $NetBSD: ehci.c,v 1.98 2005/05/01 19:24:39 augustss Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) and by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller. 41 * 42 * The EHCI 1.0 spec can be found at 43 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf 44 * and the USB 2.0 spec at 45 * http://www.usb.org/developers/docs/usb_20.zip 46 * 47 */ 48 49 /* 50 * TODO: 51 * 1) hold off explorations by companion controllers until ehci has started. 52 * 53 * 2) The EHCI driver lacks support for interrupt isochronous transfers, so 54 * devices using them don't work. 55 * Interrupt transfers are not difficult, it's just not done. 56 * 57 * 3) The meaty part to implement is the support for USB 2.0 hubs. 58 * They are quite complicated since the need to be able to do 59 * "transaction translation", i.e., converting to/from USB 2 and USB 1. 60 * So the hub driver needs to handle and schedule these things, to 61 * assign place in frame where different devices get to go. See chapter 62 * on hubs in USB 2.0 for details. 63 * 64 * 4) command failures are not recovered correctly 65 */ 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.98 2005/05/01 19:24:39 augustss Exp $"); 69 70 #include "ohci.h" 71 #include "uhci.h" 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/kernel.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/select.h> 79 #include <sys/proc.h> 80 #include <sys/queue.h> 81 82 #include <machine/bus.h> 83 #include <machine/endian.h> 84 85 #include <dev/usb/usb.h> 86 #include <dev/usb/usbdi.h> 87 #include <dev/usb/usbdivar.h> 88 #include <dev/usb/usb_mem.h> 89 #include <dev/usb/usb_quirks.h> 90 91 #include <dev/usb/ehcireg.h> 92 #include <dev/usb/ehcivar.h> 93 94 #ifdef EHCI_DEBUG 95 #define DPRINTF(x) do { if (ehcidebug) printf x; } while(0) 96 #define DPRINTFN(n,x) do { if (ehcidebug>(n)) printf x; } while (0) 97 int ehcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 struct ehci_pipe { 107 struct usbd_pipe pipe; 108 int nexttoggle; 109 110 ehci_soft_qh_t *sqh; 111 union { 112 ehci_soft_qtd_t *qtd; 113 /* ehci_soft_itd_t *itd; */ 114 } tail; 115 union { 116 /* Control pipe */ 117 struct { 118 usb_dma_t reqdma; 119 u_int length; 120 /*ehci_soft_qtd_t *setup, *data, *stat;*/ 121 } ctl; 122 /* Interrupt pipe */ 123 struct { 124 u_int length; 125 } intr; 126 /* Bulk pipe */ 127 struct { 128 u_int length; 129 } bulk; 130 /* Iso pipe */ 131 /* XXX */ 132 } u; 133 }; 134 135 Static void ehci_shutdown(void *); 136 Static void ehci_power(int, void *); 137 138 Static usbd_status ehci_open(usbd_pipe_handle); 139 Static void ehci_poll(struct usbd_bus *); 140 Static void ehci_softintr(void *); 141 Static int ehci_intr1(ehci_softc_t *); 142 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle); 143 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *); 144 Static void ehci_idone(struct ehci_xfer *); 145 Static void ehci_timeout(void *); 146 Static void ehci_timeout_task(void *); 147 148 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 149 Static void ehci_freem(struct usbd_bus *, usb_dma_t *); 150 151 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *); 152 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle); 153 154 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle); 155 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle); 156 Static void ehci_root_ctrl_abort(usbd_xfer_handle); 157 Static void ehci_root_ctrl_close(usbd_pipe_handle); 158 Static void ehci_root_ctrl_done(usbd_xfer_handle); 159 160 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle); 161 Static usbd_status ehci_root_intr_start(usbd_xfer_handle); 162 Static void ehci_root_intr_abort(usbd_xfer_handle); 163 Static void ehci_root_intr_close(usbd_pipe_handle); 164 Static void ehci_root_intr_done(usbd_xfer_handle); 165 166 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle); 167 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle); 168 Static void ehci_device_ctrl_abort(usbd_xfer_handle); 169 Static void ehci_device_ctrl_close(usbd_pipe_handle); 170 Static void ehci_device_ctrl_done(usbd_xfer_handle); 171 172 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle); 173 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle); 174 Static void ehci_device_bulk_abort(usbd_xfer_handle); 175 Static void ehci_device_bulk_close(usbd_pipe_handle); 176 Static void ehci_device_bulk_done(usbd_xfer_handle); 177 178 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle); 179 Static usbd_status ehci_device_intr_start(usbd_xfer_handle); 180 Static void ehci_device_intr_abort(usbd_xfer_handle); 181 Static void ehci_device_intr_close(usbd_pipe_handle); 182 Static void ehci_device_intr_done(usbd_xfer_handle); 183 184 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle); 185 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle); 186 Static void ehci_device_isoc_abort(usbd_xfer_handle); 187 Static void ehci_device_isoc_close(usbd_pipe_handle); 188 Static void ehci_device_isoc_done(usbd_xfer_handle); 189 190 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe); 191 Static void ehci_noop(usbd_pipe_handle pipe); 192 193 Static int ehci_str(usb_string_descriptor_t *, int, char *); 194 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle); 195 Static void ehci_pcd_able(ehci_softc_t *, int); 196 Static void ehci_pcd_enable(void *); 197 Static void ehci_disown(ehci_softc_t *, int, int); 198 199 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *); 200 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *); 201 202 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *); 203 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *); 204 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *, 205 ehci_softc_t *, int, int, usbd_xfer_handle, 206 ehci_soft_qtd_t **, ehci_soft_qtd_t **); 207 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *, 208 ehci_soft_qtd_t *); 209 210 Static usbd_status ehci_device_request(usbd_xfer_handle xfer); 211 212 Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *, 213 int ival); 214 215 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *); 216 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *, 217 ehci_soft_qh_t *); 218 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *); 219 Static void ehci_sync_hc(ehci_softc_t *); 220 221 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *); 222 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status); 223 224 #ifdef EHCI_DEBUG 225 Static void ehci_dump_regs(ehci_softc_t *); 226 Static void ehci_dump(void); 227 Static ehci_softc_t *theehci; 228 Static void ehci_dump_link(ehci_link_t, int); 229 Static void ehci_dump_sqtds(ehci_soft_qtd_t *); 230 Static void ehci_dump_sqtd(ehci_soft_qtd_t *); 231 Static void ehci_dump_qtd(ehci_qtd_t *); 232 Static void ehci_dump_sqh(ehci_soft_qh_t *); 233 #ifdef DIAGNOSTIC 234 Static void ehci_dump_exfer(struct ehci_xfer *); 235 #endif 236 #endif 237 238 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE) 239 240 #define EHCI_INTR_ENDPT 1 241 242 #define ehci_add_intr_list(sc, ex) \ 243 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext); 244 #define ehci_del_intr_list(ex) \ 245 do { \ 246 LIST_REMOVE((ex), inext); \ 247 (ex)->inext.le_prev = NULL; \ 248 } while (0) 249 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 250 251 Static struct usbd_bus_methods ehci_bus_methods = { 252 ehci_open, 253 ehci_softintr, 254 ehci_poll, 255 ehci_allocm, 256 ehci_freem, 257 ehci_allocx, 258 ehci_freex, 259 }; 260 261 Static struct usbd_pipe_methods ehci_root_ctrl_methods = { 262 ehci_root_ctrl_transfer, 263 ehci_root_ctrl_start, 264 ehci_root_ctrl_abort, 265 ehci_root_ctrl_close, 266 ehci_noop, 267 ehci_root_ctrl_done, 268 }; 269 270 Static struct usbd_pipe_methods ehci_root_intr_methods = { 271 ehci_root_intr_transfer, 272 ehci_root_intr_start, 273 ehci_root_intr_abort, 274 ehci_root_intr_close, 275 ehci_noop, 276 ehci_root_intr_done, 277 }; 278 279 Static struct usbd_pipe_methods ehci_device_ctrl_methods = { 280 ehci_device_ctrl_transfer, 281 ehci_device_ctrl_start, 282 ehci_device_ctrl_abort, 283 ehci_device_ctrl_close, 284 ehci_noop, 285 ehci_device_ctrl_done, 286 }; 287 288 Static struct usbd_pipe_methods ehci_device_intr_methods = { 289 ehci_device_intr_transfer, 290 ehci_device_intr_start, 291 ehci_device_intr_abort, 292 ehci_device_intr_close, 293 ehci_device_clear_toggle, 294 ehci_device_intr_done, 295 }; 296 297 Static struct usbd_pipe_methods ehci_device_bulk_methods = { 298 ehci_device_bulk_transfer, 299 ehci_device_bulk_start, 300 ehci_device_bulk_abort, 301 ehci_device_bulk_close, 302 ehci_device_clear_toggle, 303 ehci_device_bulk_done, 304 }; 305 306 Static struct usbd_pipe_methods ehci_device_isoc_methods = { 307 ehci_device_isoc_transfer, 308 ehci_device_isoc_start, 309 ehci_device_isoc_abort, 310 ehci_device_isoc_close, 311 ehci_noop, 312 ehci_device_isoc_done, 313 }; 314 315 static uint8_t revbits[EHCI_MAX_POLLRATE] = { 316 0x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78, 317 0x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c, 318 0x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a, 319 0x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e, 320 0x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79, 321 0x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d, 322 0x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b, 323 0x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f, 324 }; 325 326 usbd_status 327 ehci_init(ehci_softc_t *sc) 328 { 329 u_int32_t version, sparams, cparams, hcr; 330 u_int i; 331 usbd_status err; 332 ehci_soft_qh_t *sqh; 333 u_int ncomp; 334 335 DPRINTF(("ehci_init: start\n")); 336 #ifdef EHCI_DEBUG 337 theehci = sc; 338 #endif 339 340 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); 341 342 version = EREAD2(sc, EHCI_HCIVERSION); 343 aprint_normal("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev), 344 version >> 8, version & 0xff); 345 346 sparams = EREAD4(sc, EHCI_HCSPARAMS); 347 DPRINTF(("ehci_init: sparams=0x%x\n", sparams)); 348 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams); 349 ncomp = EHCI_HCS_N_CC(sparams); 350 if (ncomp != sc->sc_ncomp) { 351 aprint_error("%s: wrong number of companions (%d != %d)\n", 352 USBDEVNAME(sc->sc_bus.bdev), 353 ncomp, sc->sc_ncomp); 354 #if NOHCI == 0 || NUHCI == 0 355 aprint_error("%s: ohci or uhci probably not configured\n", 356 USBDEVNAME(sc->sc_bus.bdev)); 357 #endif 358 if (ncomp < sc->sc_ncomp) 359 sc->sc_ncomp = ncomp; 360 } 361 if (sc->sc_ncomp > 0) { 362 aprint_normal("%s: companion controller%s, %d port%s each:", 363 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "", 364 EHCI_HCS_N_PCC(sparams), 365 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : ""); 366 for (i = 0; i < sc->sc_ncomp; i++) 367 aprint_normal(" %s", USBDEVNAME(sc->sc_comps[i]->bdev)); 368 aprint_normal("\n"); 369 } 370 sc->sc_noport = EHCI_HCS_N_PORTS(sparams); 371 cparams = EREAD4(sc, EHCI_HCCPARAMS); 372 DPRINTF(("ehci_init: cparams=0x%x\n", cparams)); 373 374 if (EHCI_HCC_64BIT(cparams)) { 375 /* MUST clear segment register if 64 bit capable. */ 376 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 377 } 378 379 sc->sc_bus.usbrev = USBREV_2_0; 380 381 usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 382 USB_MEM_RESERVE); 383 384 /* Reset the controller */ 385 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 386 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 387 usb_delay_ms(&sc->sc_bus, 1); 388 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 389 for (i = 0; i < 100; i++) { 390 usb_delay_ms(&sc->sc_bus, 1); 391 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET; 392 if (!hcr) 393 break; 394 } 395 if (hcr) { 396 aprint_error("%s: reset timeout\n", 397 USBDEVNAME(sc->sc_bus.bdev)); 398 return (USBD_IOERROR); 399 } 400 401 /* XXX need proper intr scheduling */ 402 sc->sc_rand = 96; 403 404 /* frame list size at default, read back what we got and use that */ 405 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) { 406 case 0: sc->sc_flsize = 1024; break; 407 case 1: sc->sc_flsize = 512; break; 408 case 2: sc->sc_flsize = 256; break; 409 case 3: return (USBD_IOERROR); 410 } 411 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t), 412 EHCI_FLALIGN_ALIGN, &sc->sc_fldma); 413 if (err) 414 return (err); 415 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize)); 416 sc->sc_flist = KERNADDR(&sc->sc_fldma, 0); 417 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 418 419 /* Set up the bus struct. */ 420 sc->sc_bus.methods = &ehci_bus_methods; 421 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe); 422 423 sc->sc_powerhook = powerhook_establish(ehci_power, sc); 424 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc); 425 426 sc->sc_eintrs = EHCI_NORMAL_INTRS; 427 428 /* 429 * Allocate the interrupt dummy QHs. These are arranged to give poll 430 * intervals that are powers of 2 times 1ms. 431 */ 432 for (i = 0; i < EHCI_INTRQHS; i++) { 433 sqh = ehci_alloc_sqh(sc); 434 if (sqh == NULL) { 435 err = USBD_NOMEM; 436 goto bad1; 437 } 438 sc->sc_islots[i].sqh = sqh; 439 } 440 for (i = 0; i < EHCI_INTRQHS; i++) { 441 sqh = sc->sc_islots[i].sqh; 442 if (i == 0) { 443 /* The last (1ms) QH terminates. */ 444 sqh->qh.qh_link = EHCI_NULL; 445 sqh->next = NULL; 446 } else { 447 /* Otherwise the next QH has half the poll interval */ 448 sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh; 449 sqh->qh.qh_link = htole32(sqh->next->physaddr | 450 EHCI_LINK_QH); 451 } 452 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH)); 453 sqh->qh.qh_curqtd = EHCI_NULL; 454 sqh->next = NULL; 455 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 456 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 457 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 458 sqh->sqtd = NULL; 459 } 460 /* Point the frame list at the last level (128ms). */ 461 for (i = 0; i < sc->sc_flsize; i++) { 462 int j; 463 464 j = (i & ~(EHCI_MAX_POLLRATE-1)) | 465 revbits[i & (EHCI_MAX_POLLRATE-1)]; 466 sc->sc_flist[j] = htole32(EHCI_LINK_QH | 467 sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1, 468 i)].sqh->physaddr); 469 } 470 471 /* Allocate dummy QH that starts the async list. */ 472 sqh = ehci_alloc_sqh(sc); 473 if (sqh == NULL) { 474 err = USBD_NOMEM; 475 goto bad1; 476 } 477 /* Fill the QH */ 478 sqh->qh.qh_endp = 479 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL); 480 sqh->qh.qh_link = 481 htole32(sqh->physaddr | EHCI_LINK_QH); 482 sqh->qh.qh_curqtd = EHCI_NULL; 483 sqh->next = NULL; 484 /* Fill the overlay qTD */ 485 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 486 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 487 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED); 488 sqh->sqtd = NULL; 489 #ifdef EHCI_DEBUG 490 if (ehcidebug) { 491 ehci_dump_sqh(sqh); 492 } 493 #endif 494 495 /* Point to async list */ 496 sc->sc_async_head = sqh; 497 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH); 498 499 usb_callout_init(sc->sc_tmo_pcd); 500 501 lockinit(&sc->sc_doorbell_lock, PZERO, "ehcidb", 0, 0); 502 503 /* Enable interrupts */ 504 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 505 506 /* Turn on controller */ 507 EOWRITE4(sc, EHCI_USBCMD, 508 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */ 509 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) | 510 EHCI_CMD_ASE | 511 EHCI_CMD_PSE | 512 EHCI_CMD_RS); 513 514 /* Take over port ownership */ 515 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF); 516 517 for (i = 0; i < 100; i++) { 518 usb_delay_ms(&sc->sc_bus, 1); 519 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 520 if (!hcr) 521 break; 522 } 523 if (hcr) { 524 aprint_error("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 525 return (USBD_IOERROR); 526 } 527 528 return (USBD_NORMAL_COMPLETION); 529 530 #if 0 531 bad2: 532 ehci_free_sqh(sc, sc->sc_async_head); 533 #endif 534 bad1: 535 usb_freemem(&sc->sc_bus, &sc->sc_fldma); 536 return (err); 537 } 538 539 int 540 ehci_intr(void *v) 541 { 542 ehci_softc_t *sc = v; 543 544 if (sc == NULL || sc->sc_dying) 545 return (0); 546 547 /* If we get an interrupt while polling, then just ignore it. */ 548 if (sc->sc_bus.use_polling) { 549 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 550 551 if (intrs) 552 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 553 #ifdef DIAGNOSTIC 554 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n")); 555 #endif 556 return (0); 557 } 558 559 return (ehci_intr1(sc)); 560 } 561 562 Static int 563 ehci_intr1(ehci_softc_t *sc) 564 { 565 u_int32_t intrs, eintrs; 566 567 DPRINTFN(20,("ehci_intr1: enter\n")); 568 569 /* In case the interrupt occurs before initialization has completed. */ 570 if (sc == NULL) { 571 #ifdef DIAGNOSTIC 572 printf("ehci_intr1: sc == NULL\n"); 573 #endif 574 return (0); 575 } 576 577 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 578 if (!intrs) 579 return (0); 580 581 eintrs = intrs & sc->sc_eintrs; 582 DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 583 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), 584 (u_int)eintrs)); 585 if (!eintrs) 586 return (0); 587 588 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */ 589 sc->sc_bus.intr_context++; 590 sc->sc_bus.no_intrs++; 591 if (eintrs & EHCI_STS_IAA) { 592 DPRINTF(("ehci_intr1: door bell\n")); 593 wakeup(&sc->sc_async_head); 594 eintrs &= ~EHCI_STS_IAA; 595 } 596 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) { 597 DPRINTFN(5,("ehci_intr1: %s %s\n", 598 eintrs & EHCI_STS_INT ? "INT" : "", 599 eintrs & EHCI_STS_ERRINT ? "ERRINT" : "")); 600 usb_schedsoftintr(&sc->sc_bus); 601 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT); 602 } 603 if (eintrs & EHCI_STS_HSE) { 604 printf("%s: unrecoverable error, controller halted\n", 605 USBDEVNAME(sc->sc_bus.bdev)); 606 /* XXX what else */ 607 } 608 if (eintrs & EHCI_STS_PCD) { 609 ehci_pcd(sc, sc->sc_intrxfer); 610 /* 611 * Disable PCD interrupt for now, because it will be 612 * on until the port has been reset. 613 */ 614 ehci_pcd_able(sc, 0); 615 /* Do not allow RHSC interrupts > 1 per second */ 616 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc); 617 eintrs &= ~EHCI_STS_PCD; 618 } 619 620 sc->sc_bus.intr_context--; 621 622 if (eintrs != 0) { 623 /* Block unprocessed interrupts. */ 624 sc->sc_eintrs &= ~eintrs; 625 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 626 printf("%s: blocking intrs 0x%x\n", 627 USBDEVNAME(sc->sc_bus.bdev), eintrs); 628 } 629 630 return (1); 631 } 632 633 void 634 ehci_pcd_able(ehci_softc_t *sc, int on) 635 { 636 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on)); 637 if (on) 638 sc->sc_eintrs |= EHCI_STS_PCD; 639 else 640 sc->sc_eintrs &= ~EHCI_STS_PCD; 641 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 642 } 643 644 void 645 ehci_pcd_enable(void *v_sc) 646 { 647 ehci_softc_t *sc = v_sc; 648 649 ehci_pcd_able(sc, 1); 650 } 651 652 void 653 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer) 654 { 655 usbd_pipe_handle pipe; 656 u_char *p; 657 int i, m; 658 659 if (xfer == NULL) { 660 /* Just ignore the change. */ 661 return; 662 } 663 664 pipe = xfer->pipe; 665 666 p = KERNADDR(&xfer->dmabuf, 0); 667 m = min(sc->sc_noport, xfer->length * 8 - 1); 668 memset(p, 0, xfer->length); 669 for (i = 1; i <= m; i++) { 670 /* Pick out CHANGE bits from the status reg. */ 671 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) 672 p[i/8] |= 1 << (i%8); 673 } 674 DPRINTF(("ehci_pcd: change=0x%02x\n", *p)); 675 xfer->actlen = xfer->length; 676 xfer->status = USBD_NORMAL_COMPLETION; 677 678 usb_transfer_complete(xfer); 679 } 680 681 void 682 ehci_softintr(void *v) 683 { 684 ehci_softc_t *sc = v; 685 struct ehci_xfer *ex, *nextex; 686 687 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev), 688 sc->sc_bus.intr_context)); 689 690 sc->sc_bus.intr_context++; 691 692 /* 693 * The only explanation I can think of for why EHCI is as brain dead 694 * as UHCI interrupt-wise is that Intel was involved in both. 695 * An interrupt just tells us that something is done, we have no 696 * clue what, so we need to scan through all active transfers. :-( 697 */ 698 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) { 699 nextex = LIST_NEXT(ex, inext); 700 ehci_check_intr(sc, ex); 701 } 702 703 #ifdef USB_USE_SOFTINTR 704 if (sc->sc_softwake) { 705 sc->sc_softwake = 0; 706 wakeup(&sc->sc_softwake); 707 } 708 #endif /* USB_USE_SOFTINTR */ 709 710 sc->sc_bus.intr_context--; 711 } 712 713 /* Check for an interrupt. */ 714 void 715 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex) 716 { 717 ehci_soft_qtd_t *sqtd, *lsqtd; 718 u_int32_t status; 719 720 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex)); 721 722 if (ex->sqtdstart == NULL) { 723 printf("ehci_check_intr: sqtdstart=NULL\n"); 724 return; 725 } 726 lsqtd = ex->sqtdend; 727 #ifdef DIAGNOSTIC 728 if (lsqtd == NULL) { 729 printf("ehci_check_intr: lsqtd==0\n"); 730 return; 731 } 732 #endif 733 /* 734 * If the last TD is still active we need to check whether there 735 * is a an error somewhere in the middle, or whether there was a 736 * short packet (SPD and not ACTIVE). 737 */ 738 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) { 739 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex)); 740 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) { 741 status = le32toh(sqtd->qtd.qtd_status); 742 /* If there's an active QTD the xfer isn't done. */ 743 if (status & EHCI_QTD_ACTIVE) 744 break; 745 /* Any kind of error makes the xfer done. */ 746 if (status & EHCI_QTD_HALTED) 747 goto done; 748 /* We want short packets, and it is short: it's done */ 749 if (EHCI_QTD_GET_BYTES(status) != 0) 750 goto done; 751 } 752 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n", 753 ex, ex->sqtdstart)); 754 return; 755 } 756 done: 757 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex)); 758 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex); 759 ehci_idone(ex); 760 } 761 762 void 763 ehci_idone(struct ehci_xfer *ex) 764 { 765 usbd_xfer_handle xfer = &ex->xfer; 766 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 767 ehci_soft_qtd_t *sqtd, *lsqtd; 768 u_int32_t status = 0, nstatus = 0; 769 int actlen; 770 uint pkts_left; 771 772 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex)); 773 #ifdef DIAGNOSTIC 774 { 775 int s = splhigh(); 776 if (ex->isdone) { 777 splx(s); 778 #ifdef EHCI_DEBUG 779 printf("ehci_idone: ex is done!\n "); 780 ehci_dump_exfer(ex); 781 #else 782 printf("ehci_idone: ex=%p is done!\n", ex); 783 #endif 784 return; 785 } 786 ex->isdone = 1; 787 splx(s); 788 } 789 #endif 790 791 if (xfer->status == USBD_CANCELLED || 792 xfer->status == USBD_TIMEOUT) { 793 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer)); 794 return; 795 } 796 797 #ifdef EHCI_DEBUG 798 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe)); 799 if (ehcidebug > 10) 800 ehci_dump_sqtds(ex->sqtdstart); 801 #endif 802 803 /* The transfer is done, compute actual length and status. */ 804 lsqtd = ex->sqtdend; 805 actlen = 0; 806 for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) { 807 nstatus = le32toh(sqtd->qtd.qtd_status); 808 if (nstatus & EHCI_QTD_ACTIVE) 809 break; 810 811 status = nstatus; 812 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP) 813 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status); 814 } 815 816 /* 817 * If there are left over TDs we need to update the toggle. 818 * The default pipe doesn't need it since control transfers 819 * start the toggle at 0 every time. 820 */ 821 if (sqtd != lsqtd->nextqtd && 822 xfer->pipe->device->default_pipe != xfer->pipe) { 823 printf("ehci_idone: need toggle update status=%08x nstatus=%08x\n", status, nstatus); 824 #if 0 825 ehci_dump_sqh(epipe->sqh); 826 ehci_dump_sqtds(ex->sqtdstart); 827 #endif 828 epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus); 829 } 830 831 /* 832 * For a short transfer we need to update the toggle for the missing 833 * packets within the qTD. 834 */ 835 pkts_left = EHCI_QTD_GET_BYTES(status) / 836 UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 837 epipe->nexttoggle ^= pkts_left % 2; 838 839 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n", 840 xfer->length, actlen, status)); 841 xfer->actlen = actlen; 842 if (status & EHCI_QTD_HALTED) { 843 #ifdef EHCI_DEBUG 844 char sbuf[128]; 845 846 bitmask_snprintf((u_int32_t)status, 847 "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR" 848 "\3MISSED\1PINGSTATE", sbuf, sizeof(sbuf)); 849 850 DPRINTFN(2, ("ehci_idone: error, addr=%d, endpt=0x%02x, " 851 "status 0x%s\n", 852 xfer->pipe->device->address, 853 xfer->pipe->endpoint->edesc->bEndpointAddress, 854 sbuf)); 855 if (ehcidebug > 2) { 856 ehci_dump_sqh(epipe->sqh); 857 ehci_dump_sqtds(ex->sqtdstart); 858 } 859 #endif 860 /* low&full speed has an extra error flag */ 861 if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) != 862 EHCI_QH_SPEED_HIGH) 863 status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE; 864 else 865 status &= EHCI_QTD_STATERRS; 866 if (status == 0) /* no other errors means a stall */ 867 xfer->status = USBD_STALLED; 868 else 869 xfer->status = USBD_IOERROR; /* more info XXX */ 870 /* XXX need to reset TT on missed microframe */ 871 if (status & EHCI_QTD_MISSEDMICRO) { 872 ehci_softc_t *sc = (ehci_softc_t *) 873 xfer->pipe->device->bus; 874 875 printf("%s: missed microframe, TT reset not " 876 "implemented, hub might be inoperational\n", 877 USBDEVNAME(sc->sc_bus.bdev)); 878 } 879 } else { 880 xfer->status = USBD_NORMAL_COMPLETION; 881 } 882 883 usb_transfer_complete(xfer); 884 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex)); 885 } 886 887 /* 888 * Wait here until controller claims to have an interrupt. 889 * Then call ehci_intr and return. Use timeout to avoid waiting 890 * too long. 891 */ 892 void 893 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer) 894 { 895 int timo; 896 u_int32_t intrs; 897 898 xfer->status = USBD_IN_PROGRESS; 899 for (timo = xfer->timeout; timo >= 0; timo--) { 900 usb_delay_ms(&sc->sc_bus, 1); 901 if (sc->sc_dying) 902 break; 903 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) & 904 sc->sc_eintrs; 905 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs)); 906 #ifdef EHCI_DEBUG 907 if (ehcidebug > 15) 908 ehci_dump_regs(sc); 909 #endif 910 if (intrs) { 911 ehci_intr1(sc); 912 if (xfer->status != USBD_IN_PROGRESS) 913 return; 914 } 915 } 916 917 /* Timeout */ 918 DPRINTF(("ehci_waitintr: timeout\n")); 919 xfer->status = USBD_TIMEOUT; 920 usb_transfer_complete(xfer); 921 /* XXX should free TD */ 922 } 923 924 void 925 ehci_poll(struct usbd_bus *bus) 926 { 927 ehci_softc_t *sc = (ehci_softc_t *)bus; 928 #ifdef EHCI_DEBUG 929 static int last; 930 int new; 931 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)); 932 if (new != last) { 933 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new)); 934 last = new; 935 } 936 #endif 937 938 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs) 939 ehci_intr1(sc); 940 } 941 942 int 943 ehci_detach(struct ehci_softc *sc, int flags) 944 { 945 int rv = 0; 946 947 if (sc->sc_child != NULL) 948 rv = config_detach(sc->sc_child, flags); 949 950 if (rv != 0) 951 return (rv); 952 953 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc); 954 955 if (sc->sc_powerhook != NULL) 956 powerhook_disestablish(sc->sc_powerhook); 957 if (sc->sc_shutdownhook != NULL) 958 shutdownhook_disestablish(sc->sc_shutdownhook); 959 960 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 961 962 /* XXX free other data structures XXX */ 963 964 return (rv); 965 } 966 967 968 int 969 ehci_activate(device_ptr_t self, enum devact act) 970 { 971 struct ehci_softc *sc = (struct ehci_softc *)self; 972 int rv = 0; 973 974 switch (act) { 975 case DVACT_ACTIVATE: 976 return (EOPNOTSUPP); 977 978 case DVACT_DEACTIVATE: 979 if (sc->sc_child != NULL) 980 rv = config_deactivate(sc->sc_child); 981 sc->sc_dying = 1; 982 break; 983 } 984 return (rv); 985 } 986 987 /* 988 * Handle suspend/resume. 989 * 990 * We need to switch to polling mode here, because this routine is 991 * called from an interrupt context. This is all right since we 992 * are almost suspended anyway. 993 */ 994 void 995 ehci_power(int why, void *v) 996 { 997 ehci_softc_t *sc = v; 998 u_int32_t cmd, hcr; 999 int s, i; 1000 1001 #ifdef EHCI_DEBUG 1002 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why)); 1003 if (ehcidebug > 0) 1004 ehci_dump_regs(sc); 1005 #endif 1006 1007 s = splhardusb(); 1008 switch (why) { 1009 case PWR_SUSPEND: 1010 case PWR_STANDBY: 1011 sc->sc_bus.use_polling++; 1012 1013 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD); 1014 1015 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE); 1016 EOWRITE4(sc, EHCI_USBCMD, cmd); 1017 1018 for (i = 0; i < 100; i++) { 1019 hcr = EOREAD4(sc, EHCI_USBSTS) & 1020 (EHCI_STS_ASS | EHCI_STS_PSS); 1021 if (hcr == 0) 1022 break; 1023 1024 usb_delay_ms(&sc->sc_bus, 1); 1025 } 1026 if (hcr != 0) { 1027 printf("%s: reset timeout\n", 1028 USBDEVNAME(sc->sc_bus.bdev)); 1029 } 1030 1031 cmd &= ~EHCI_CMD_RS; 1032 EOWRITE4(sc, EHCI_USBCMD, cmd); 1033 1034 for (i = 0; i < 100; i++) { 1035 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1036 if (hcr == EHCI_STS_HCH) 1037 break; 1038 1039 usb_delay_ms(&sc->sc_bus, 1); 1040 } 1041 if (hcr != EHCI_STS_HCH) { 1042 printf("%s: config timeout\n", 1043 USBDEVNAME(sc->sc_bus.bdev)); 1044 } 1045 1046 sc->sc_bus.use_polling--; 1047 break; 1048 1049 case PWR_RESUME: 1050 sc->sc_bus.use_polling++; 1051 1052 /* restore things in case the bios sucks */ 1053 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); 1054 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0)); 1055 EOWRITE4(sc, EHCI_ASYNCLISTADDR, 1056 sc->sc_async_head->physaddr | EHCI_LINK_QH); 1057 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs); 1058 1059 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd); 1060 1061 for (i = 0; i < 100; i++) { 1062 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH; 1063 if (hcr != EHCI_STS_HCH) 1064 break; 1065 1066 usb_delay_ms(&sc->sc_bus, 1); 1067 } 1068 if (hcr == EHCI_STS_HCH) { 1069 printf("%s: config timeout\n", 1070 USBDEVNAME(sc->sc_bus.bdev)); 1071 } 1072 1073 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1074 1075 sc->sc_bus.use_polling--; 1076 break; 1077 case PWR_SOFTSUSPEND: 1078 case PWR_SOFTSTANDBY: 1079 case PWR_SOFTRESUME: 1080 break; 1081 } 1082 splx(s); 1083 1084 #ifdef EHCI_DEBUG 1085 DPRINTF(("ehci_power: sc=%p\n", sc)); 1086 if (ehcidebug > 0) 1087 ehci_dump_regs(sc); 1088 #endif 1089 } 1090 1091 /* 1092 * Shut down the controller when the system is going down. 1093 */ 1094 void 1095 ehci_shutdown(void *v) 1096 { 1097 ehci_softc_t *sc = v; 1098 1099 DPRINTF(("ehci_shutdown: stopping the HC\n")); 1100 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */ 1101 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET); 1102 } 1103 1104 usbd_status 1105 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 1106 { 1107 struct ehci_softc *sc = (struct ehci_softc *)bus; 1108 usbd_status err; 1109 1110 err = usb_allocmem(&sc->sc_bus, size, 0, dma); 1111 if (err == USBD_NOMEM) 1112 err = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 1113 #ifdef EHCI_DEBUG 1114 if (err) 1115 printf("ehci_allocm: usb_allocmem()=%d\n", err); 1116 #endif 1117 return (err); 1118 } 1119 1120 void 1121 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma) 1122 { 1123 struct ehci_softc *sc = (struct ehci_softc *)bus; 1124 1125 if (dma->block->flags & USB_DMA_RESERVE) { 1126 usb_reserve_freem(&((struct ehci_softc *)bus)->sc_dma_reserve, 1127 dma); 1128 return; 1129 } 1130 usb_freemem(&sc->sc_bus, dma); 1131 } 1132 1133 usbd_xfer_handle 1134 ehci_allocx(struct usbd_bus *bus) 1135 { 1136 struct ehci_softc *sc = (struct ehci_softc *)bus; 1137 usbd_xfer_handle xfer; 1138 1139 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 1140 if (xfer != NULL) { 1141 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 1142 #ifdef DIAGNOSTIC 1143 if (xfer->busy_free != XFER_FREE) { 1144 printf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer, 1145 xfer->busy_free); 1146 } 1147 #endif 1148 } else { 1149 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT); 1150 } 1151 if (xfer != NULL) { 1152 memset(xfer, 0, sizeof(struct ehci_xfer)); 1153 #ifdef DIAGNOSTIC 1154 EXFER(xfer)->isdone = 1; 1155 xfer->busy_free = XFER_BUSY; 1156 #endif 1157 } 1158 return (xfer); 1159 } 1160 1161 void 1162 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 1163 { 1164 struct ehci_softc *sc = (struct ehci_softc *)bus; 1165 1166 #ifdef DIAGNOSTIC 1167 if (xfer->busy_free != XFER_BUSY) { 1168 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer, 1169 xfer->busy_free); 1170 return; 1171 } 1172 xfer->busy_free = XFER_FREE; 1173 if (!EXFER(xfer)->isdone) { 1174 printf("ehci_freex: !isdone\n"); 1175 return; 1176 } 1177 #endif 1178 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 1179 } 1180 1181 Static void 1182 ehci_device_clear_toggle(usbd_pipe_handle pipe) 1183 { 1184 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1185 1186 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n", 1187 epipe, epipe->sqh->qh.qh_qtd.qtd_status)); 1188 #ifdef USB_DEBUG 1189 if (ehcidebug) 1190 usbd_dump_pipe(pipe); 1191 #endif 1192 epipe->nexttoggle = 0; 1193 } 1194 1195 Static void 1196 ehci_noop(usbd_pipe_handle pipe) 1197 { 1198 } 1199 1200 #ifdef EHCI_DEBUG 1201 void 1202 ehci_dump_regs(ehci_softc_t *sc) 1203 { 1204 int i; 1205 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n", 1206 EOREAD4(sc, EHCI_USBCMD), 1207 EOREAD4(sc, EHCI_USBSTS), 1208 EOREAD4(sc, EHCI_USBINTR)); 1209 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n", 1210 EOREAD4(sc, EHCI_FRINDEX), 1211 EOREAD4(sc, EHCI_CTRLDSSEGMENT), 1212 EOREAD4(sc, EHCI_PERIODICLISTBASE), 1213 EOREAD4(sc, EHCI_ASYNCLISTADDR)); 1214 for (i = 1; i <= sc->sc_noport; i++) 1215 printf("port %d status=0x%08x\n", i, 1216 EOREAD4(sc, EHCI_PORTSC(i))); 1217 } 1218 1219 /* 1220 * Unused function - this is meant to be called from a kernel 1221 * debugger. 1222 */ 1223 void 1224 ehci_dump() 1225 { 1226 ehci_dump_regs(theehci); 1227 } 1228 1229 void 1230 ehci_dump_link(ehci_link_t link, int type) 1231 { 1232 link = le32toh(link); 1233 printf("0x%08x", link); 1234 if (link & EHCI_LINK_TERMINATE) 1235 printf("<T>"); 1236 else { 1237 printf("<"); 1238 if (type) { 1239 switch (EHCI_LINK_TYPE(link)) { 1240 case EHCI_LINK_ITD: printf("ITD"); break; 1241 case EHCI_LINK_QH: printf("QH"); break; 1242 case EHCI_LINK_SITD: printf("SITD"); break; 1243 case EHCI_LINK_FSTN: printf("FSTN"); break; 1244 } 1245 } 1246 printf(">"); 1247 } 1248 } 1249 1250 void 1251 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd) 1252 { 1253 int i; 1254 u_int32_t stop; 1255 1256 stop = 0; 1257 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) { 1258 ehci_dump_sqtd(sqtd); 1259 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE); 1260 } 1261 if (sqtd) 1262 printf("dump aborted, too many TDs\n"); 1263 } 1264 1265 void 1266 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd) 1267 { 1268 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr); 1269 ehci_dump_qtd(&sqtd->qtd); 1270 } 1271 1272 void 1273 ehci_dump_qtd(ehci_qtd_t *qtd) 1274 { 1275 u_int32_t s; 1276 char sbuf[128]; 1277 1278 printf(" next="); ehci_dump_link(qtd->qtd_next, 0); 1279 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0); 1280 printf("\n"); 1281 s = le32toh(qtd->qtd_status); 1282 bitmask_snprintf(EHCI_QTD_GET_STATUS(s), 1283 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR" 1284 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf)); 1285 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n", 1286 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s), 1287 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s)); 1288 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s), 1289 EHCI_QTD_GET_PID(s), sbuf); 1290 for (s = 0; s < 5; s++) 1291 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s])); 1292 } 1293 1294 void 1295 ehci_dump_sqh(ehci_soft_qh_t *sqh) 1296 { 1297 ehci_qh_t *qh = &sqh->qh; 1298 u_int32_t endp, endphub; 1299 1300 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr); 1301 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n"); 1302 endp = le32toh(qh->qh_endp); 1303 printf(" endp=0x%08x\n", endp); 1304 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n", 1305 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp), 1306 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp), 1307 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp)); 1308 printf(" mpl=0x%x ctl=%d nrl=%d\n", 1309 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp), 1310 EHCI_QH_GET_NRL(endp)); 1311 endphub = le32toh(qh->qh_endphub); 1312 printf(" endphub=0x%08x\n", endphub); 1313 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n", 1314 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub), 1315 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub), 1316 EHCI_QH_GET_MULT(endphub)); 1317 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n"); 1318 printf("Overlay qTD:\n"); 1319 ehci_dump_qtd(&qh->qh_qtd); 1320 } 1321 1322 #ifdef DIAGNOSTIC 1323 Static void 1324 ehci_dump_exfer(struct ehci_xfer *ex) 1325 { 1326 printf("ehci_dump_exfer: ex=%p\n", ex); 1327 } 1328 #endif 1329 #endif 1330 1331 usbd_status 1332 ehci_open(usbd_pipe_handle pipe) 1333 { 1334 usbd_device_handle dev = pipe->device; 1335 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 1336 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1337 u_int8_t addr = dev->address; 1338 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1339 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 1340 ehci_soft_qh_t *sqh; 1341 usbd_status err; 1342 int s; 1343 int ival, speed, naks; 1344 int hshubaddr, hshubport; 1345 1346 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1347 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1348 1349 if (dev->myhsport) { 1350 hshubaddr = dev->myhsport->parent->address; 1351 hshubport = dev->myhsport->portno; 1352 } else { 1353 hshubaddr = 0; 1354 hshubport = 0; 1355 } 1356 1357 if (sc->sc_dying) 1358 return (USBD_IOERROR); 1359 1360 epipe->nexttoggle = 0; 1361 1362 if (addr == sc->sc_addr) { 1363 switch (ed->bEndpointAddress) { 1364 case USB_CONTROL_ENDPOINT: 1365 pipe->methods = &ehci_root_ctrl_methods; 1366 break; 1367 case UE_DIR_IN | EHCI_INTR_ENDPT: 1368 pipe->methods = &ehci_root_intr_methods; 1369 break; 1370 default: 1371 return (USBD_INVAL); 1372 } 1373 return (USBD_NORMAL_COMPLETION); 1374 } 1375 1376 /* XXX All this stuff is only valid for async. */ 1377 switch (dev->speed) { 1378 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break; 1379 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break; 1380 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break; 1381 default: panic("ehci_open: bad device speed %d", dev->speed); 1382 } 1383 if (speed != EHCI_QH_SPEED_HIGH) { 1384 printf("%s: *** WARNING: opening low/full speed device, this " 1385 "may not work yet.\n", 1386 USBDEVNAME(sc->sc_bus.bdev)); 1387 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n", 1388 hshubaddr, hshubport)); 1389 #if 0 1390 if (xfertype != UE_CONTROL) 1391 return USBD_INVAL; 1392 #endif 1393 } 1394 1395 naks = 8; /* XXX */ 1396 sqh = ehci_alloc_sqh(sc); 1397 if (sqh == NULL) 1398 goto bad0; 1399 /* qh_link filled when the QH is added */ 1400 sqh->qh.qh_endp = htole32( 1401 EHCI_QH_SET_ADDR(addr) | 1402 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) | 1403 EHCI_QH_SET_EPS(speed) | 1404 EHCI_QH_DTC | 1405 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) | 1406 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ? 1407 EHCI_QH_CTL : 0) | 1408 EHCI_QH_SET_NRL(naks) 1409 ); 1410 sqh->qh.qh_endphub = htole32( 1411 EHCI_QH_SET_MULT(1) | 1412 EHCI_QH_SET_HUBA(hshubaddr) | 1413 EHCI_QH_SET_PORT(hshubport) | 1414 EHCI_QH_SET_CMASK(0x08) | /* XXX */ 1415 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x02 : 0) 1416 ); 1417 sqh->qh.qh_curqtd = EHCI_NULL; 1418 /* Fill the overlay qTD */ 1419 sqh->qh.qh_qtd.qtd_next = EHCI_NULL; 1420 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL; 1421 sqh->qh.qh_qtd.qtd_status = htole32(0); 1422 1423 epipe->sqh = sqh; 1424 1425 switch (xfertype) { 1426 case UE_CONTROL: 1427 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 1428 0, &epipe->u.ctl.reqdma); 1429 #ifdef EHCI_DEBUG 1430 if (err) 1431 printf("ehci_open: usb_allocmem()=%d\n", err); 1432 #endif 1433 if (err) 1434 goto bad1; 1435 pipe->methods = &ehci_device_ctrl_methods; 1436 s = splusb(); 1437 ehci_add_qh(sqh, sc->sc_async_head); 1438 splx(s); 1439 break; 1440 case UE_BULK: 1441 pipe->methods = &ehci_device_bulk_methods; 1442 s = splusb(); 1443 ehci_add_qh(sqh, sc->sc_async_head); 1444 splx(s); 1445 break; 1446 case UE_INTERRUPT: 1447 pipe->methods = &ehci_device_intr_methods; 1448 ival = pipe->interval; 1449 if (ival == USBD_DEFAULT_INTERVAL) 1450 ival = ed->bInterval; 1451 return (ehci_device_setintr(sc, sqh, ival)); 1452 case UE_ISOCHRONOUS: 1453 pipe->methods = &ehci_device_isoc_methods; 1454 return (USBD_INVAL); 1455 default: 1456 return (USBD_INVAL); 1457 } 1458 return (USBD_NORMAL_COMPLETION); 1459 1460 bad1: 1461 ehci_free_sqh(sc, sqh); 1462 bad0: 1463 return (USBD_NOMEM); 1464 } 1465 1466 /* 1467 * Add an ED to the schedule. Called at splusb(). 1468 */ 1469 void 1470 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1471 { 1472 SPLUSBCHECK; 1473 1474 sqh->next = head->next; 1475 sqh->qh.qh_link = head->qh.qh_link; 1476 head->next = sqh; 1477 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH); 1478 1479 #ifdef EHCI_DEBUG 1480 if (ehcidebug > 5) { 1481 printf("ehci_add_qh:\n"); 1482 ehci_dump_sqh(sqh); 1483 } 1484 #endif 1485 } 1486 1487 /* 1488 * Remove an ED from the schedule. Called at splusb(). 1489 */ 1490 void 1491 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head) 1492 { 1493 ehci_soft_qh_t *p; 1494 1495 SPLUSBCHECK; 1496 /* XXX */ 1497 for (p = head; p != NULL && p->next != sqh; p = p->next) 1498 ; 1499 if (p == NULL) 1500 panic("ehci_rem_qh: ED not found"); 1501 p->next = sqh->next; 1502 p->qh.qh_link = sqh->qh.qh_link; 1503 1504 ehci_sync_hc(sc); 1505 } 1506 1507 void 1508 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd) 1509 { 1510 int i; 1511 u_int32_t status; 1512 1513 /* Save toggle bit and ping status. */ 1514 status = sqh->qh.qh_qtd.qtd_status & 1515 htole32(EHCI_QTD_TOGGLE_MASK | 1516 EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE)); 1517 /* Set HALTED to make hw leave it alone. */ 1518 sqh->qh.qh_qtd.qtd_status = 1519 htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED)); 1520 sqh->qh.qh_curqtd = 0; 1521 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr); 1522 sqh->qh.qh_qtd.qtd_altnext = 0; 1523 for (i = 0; i < EHCI_QTD_NBUFFERS; i++) 1524 sqh->qh.qh_qtd.qtd_buffer[i] = 0; 1525 sqh->sqtd = sqtd; 1526 /* Set !HALTED && !ACTIVE to start execution, preserve some fields */ 1527 sqh->qh.qh_qtd.qtd_status = status; 1528 } 1529 1530 /* 1531 * Ensure that the HC has released all references to the QH. We do this 1532 * by asking for a Async Advance Doorbell interrupt and then we wait for 1533 * the interrupt. 1534 * To make this easier we first obtain exclusive use of the doorbell. 1535 */ 1536 void 1537 ehci_sync_hc(ehci_softc_t *sc) 1538 { 1539 int s, error; 1540 1541 if (sc->sc_dying) { 1542 DPRINTFN(2,("ehci_sync_hc: dying\n")); 1543 return; 1544 } 1545 DPRINTFN(2,("ehci_sync_hc: enter\n")); 1546 usb_lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL); /* get doorbell */ 1547 s = splhardusb(); 1548 /* ask for doorbell */ 1549 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD); 1550 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1551 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1552 error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz); /* bell wait */ 1553 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n", 1554 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS))); 1555 splx(s); 1556 usb_lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL); /* release doorbell */ 1557 #ifdef DIAGNOSTIC 1558 if (error) 1559 printf("ehci_sync_hc: tsleep() = %d\n", error); 1560 #endif 1561 DPRINTFN(2,("ehci_sync_hc: exit\n")); 1562 } 1563 1564 /***********/ 1565 1566 /* 1567 * Data structures and routines to emulate the root hub. 1568 */ 1569 Static usb_device_descriptor_t ehci_devd = { 1570 USB_DEVICE_DESCRIPTOR_SIZE, 1571 UDESC_DEVICE, /* type */ 1572 {0x00, 0x02}, /* USB version */ 1573 UDCLASS_HUB, /* class */ 1574 UDSUBCLASS_HUB, /* subclass */ 1575 UDPROTO_HSHUBSTT, /* protocol */ 1576 64, /* max packet */ 1577 {0},{0},{0x00,0x01}, /* device id */ 1578 1,2,0, /* string indicies */ 1579 1 /* # of configurations */ 1580 }; 1581 1582 Static usb_device_qualifier_t ehci_odevd = { 1583 USB_DEVICE_DESCRIPTOR_SIZE, 1584 UDESC_DEVICE_QUALIFIER, /* type */ 1585 {0x00, 0x02}, /* USB version */ 1586 UDCLASS_HUB, /* class */ 1587 UDSUBCLASS_HUB, /* subclass */ 1588 UDPROTO_FSHUB, /* protocol */ 1589 64, /* max packet */ 1590 1, /* # of configurations */ 1591 0 1592 }; 1593 1594 Static usb_config_descriptor_t ehci_confd = { 1595 USB_CONFIG_DESCRIPTOR_SIZE, 1596 UDESC_CONFIG, 1597 {USB_CONFIG_DESCRIPTOR_SIZE + 1598 USB_INTERFACE_DESCRIPTOR_SIZE + 1599 USB_ENDPOINT_DESCRIPTOR_SIZE}, 1600 1, 1601 1, 1602 0, 1603 UC_SELF_POWERED, 1604 0 /* max power */ 1605 }; 1606 1607 Static usb_interface_descriptor_t ehci_ifcd = { 1608 USB_INTERFACE_DESCRIPTOR_SIZE, 1609 UDESC_INTERFACE, 1610 0, 1611 0, 1612 1, 1613 UICLASS_HUB, 1614 UISUBCLASS_HUB, 1615 UIPROTO_HSHUBSTT, 1616 0 1617 }; 1618 1619 Static usb_endpoint_descriptor_t ehci_endpd = { 1620 USB_ENDPOINT_DESCRIPTOR_SIZE, 1621 UDESC_ENDPOINT, 1622 UE_DIR_IN | EHCI_INTR_ENDPT, 1623 UE_INTERRUPT, 1624 {8, 0}, /* max packet */ 1625 255 1626 }; 1627 1628 Static usb_hub_descriptor_t ehci_hubd = { 1629 USB_HUB_DESCRIPTOR_SIZE, 1630 UDESC_HUB, 1631 0, 1632 {0,0}, 1633 0, 1634 0, 1635 {0}, 1636 }; 1637 1638 Static int 1639 ehci_str(usb_string_descriptor_t *p, int l, char *s) 1640 { 1641 int i; 1642 1643 if (l == 0) 1644 return (0); 1645 p->bLength = 2 * strlen(s) + 2; 1646 if (l == 1) 1647 return (1); 1648 p->bDescriptorType = UDESC_STRING; 1649 l -= 2; 1650 for (i = 0; s[i] && l > 1; i++, l -= 2) 1651 USETW2(p->bString[i], 0, s[i]); 1652 return (2*i+2); 1653 } 1654 1655 /* 1656 * Simulate a hardware hub by handling all the necessary requests. 1657 */ 1658 Static usbd_status 1659 ehci_root_ctrl_transfer(usbd_xfer_handle xfer) 1660 { 1661 usbd_status err; 1662 1663 /* Insert last in queue. */ 1664 err = usb_insert_transfer(xfer); 1665 if (err) 1666 return (err); 1667 1668 /* Pipe isn't running, start first */ 1669 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1670 } 1671 1672 Static usbd_status 1673 ehci_root_ctrl_start(usbd_xfer_handle xfer) 1674 { 1675 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 1676 usb_device_request_t *req; 1677 void *buf = NULL; 1678 int port, i; 1679 int s, len, value, index, l, totlen = 0; 1680 usb_port_status_t ps; 1681 usb_hub_descriptor_t hubd; 1682 usbd_status err; 1683 u_int32_t v; 1684 1685 if (sc->sc_dying) 1686 return (USBD_IOERROR); 1687 1688 #ifdef DIAGNOSTIC 1689 if (!(xfer->rqflags & URQ_REQUEST)) 1690 /* XXX panic */ 1691 return (USBD_INVAL); 1692 #endif 1693 req = &xfer->request; 1694 1695 DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n", 1696 req->bmRequestType, req->bRequest)); 1697 1698 len = UGETW(req->wLength); 1699 value = UGETW(req->wValue); 1700 index = UGETW(req->wIndex); 1701 1702 if (len != 0) 1703 buf = KERNADDR(&xfer->dmabuf, 0); 1704 1705 #define C(x,y) ((x) | ((y) << 8)) 1706 switch(C(req->bRequest, req->bmRequestType)) { 1707 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 1708 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 1709 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 1710 /* 1711 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 1712 * for the integrated root hub. 1713 */ 1714 break; 1715 case C(UR_GET_CONFIG, UT_READ_DEVICE): 1716 if (len > 0) { 1717 *(u_int8_t *)buf = sc->sc_conf; 1718 totlen = 1; 1719 } 1720 break; 1721 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 1722 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value)); 1723 switch(value >> 8) { 1724 case UDESC_DEVICE: 1725 if ((value & 0xff) != 0) { 1726 err = USBD_IOERROR; 1727 goto ret; 1728 } 1729 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1730 USETW(ehci_devd.idVendor, sc->sc_id_vendor); 1731 memcpy(buf, &ehci_devd, l); 1732 break; 1733 /* 1734 * We can't really operate at another speed, but the spec says 1735 * we need this descriptor. 1736 */ 1737 case UDESC_DEVICE_QUALIFIER: 1738 if ((value & 0xff) != 0) { 1739 err = USBD_IOERROR; 1740 goto ret; 1741 } 1742 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 1743 memcpy(buf, &ehci_odevd, l); 1744 break; 1745 /* 1746 * We can't really operate at another speed, but the spec says 1747 * we need this descriptor. 1748 */ 1749 case UDESC_OTHER_SPEED_CONFIGURATION: 1750 case UDESC_CONFIG: 1751 if ((value & 0xff) != 0) { 1752 err = USBD_IOERROR; 1753 goto ret; 1754 } 1755 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 1756 memcpy(buf, &ehci_confd, l); 1757 ((usb_config_descriptor_t *)buf)->bDescriptorType = 1758 value >> 8; 1759 buf = (char *)buf + l; 1760 len -= l; 1761 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 1762 totlen += l; 1763 memcpy(buf, &ehci_ifcd, l); 1764 buf = (char *)buf + l; 1765 len -= l; 1766 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 1767 totlen += l; 1768 memcpy(buf, &ehci_endpd, l); 1769 break; 1770 case UDESC_STRING: 1771 if (len == 0) 1772 break; 1773 *(u_int8_t *)buf = 0; 1774 totlen = 1; 1775 switch (value & 0xff) { 1776 case 0: /* Language table */ 1777 totlen = ehci_str(buf, len, "\001"); 1778 break; 1779 case 1: /* Vendor */ 1780 totlen = ehci_str(buf, len, sc->sc_vendor); 1781 break; 1782 case 2: /* Product */ 1783 totlen = ehci_str(buf, len, "EHCI root hub"); 1784 break; 1785 } 1786 break; 1787 default: 1788 err = USBD_IOERROR; 1789 goto ret; 1790 } 1791 break; 1792 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 1793 if (len > 0) { 1794 *(u_int8_t *)buf = 0; 1795 totlen = 1; 1796 } 1797 break; 1798 case C(UR_GET_STATUS, UT_READ_DEVICE): 1799 if (len > 1) { 1800 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 1801 totlen = 2; 1802 } 1803 break; 1804 case C(UR_GET_STATUS, UT_READ_INTERFACE): 1805 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 1806 if (len > 1) { 1807 USETW(((usb_status_t *)buf)->wStatus, 0); 1808 totlen = 2; 1809 } 1810 break; 1811 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 1812 if (value >= USB_MAX_DEVICES) { 1813 err = USBD_IOERROR; 1814 goto ret; 1815 } 1816 sc->sc_addr = value; 1817 break; 1818 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 1819 if (value != 0 && value != 1) { 1820 err = USBD_IOERROR; 1821 goto ret; 1822 } 1823 sc->sc_conf = value; 1824 break; 1825 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 1826 break; 1827 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 1828 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 1829 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 1830 err = USBD_IOERROR; 1831 goto ret; 1832 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 1833 break; 1834 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 1835 break; 1836 /* Hub requests */ 1837 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 1838 break; 1839 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 1840 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 1841 "port=%d feature=%d\n", 1842 index, value)); 1843 if (index < 1 || index > sc->sc_noport) { 1844 err = USBD_IOERROR; 1845 goto ret; 1846 } 1847 port = EHCI_PORTSC(index); 1848 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1849 switch(value) { 1850 case UHF_PORT_ENABLE: 1851 EOWRITE4(sc, port, v &~ EHCI_PS_PE); 1852 break; 1853 case UHF_PORT_SUSPEND: 1854 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP); 1855 break; 1856 case UHF_PORT_POWER: 1857 EOWRITE4(sc, port, v &~ EHCI_PS_PP); 1858 break; 1859 case UHF_PORT_TEST: 1860 DPRINTFN(2,("ehci_root_ctrl_start: clear port test " 1861 "%d\n", index)); 1862 break; 1863 case UHF_PORT_INDICATOR: 1864 DPRINTFN(2,("ehci_root_ctrl_start: clear port ind " 1865 "%d\n", index)); 1866 EOWRITE4(sc, port, v &~ EHCI_PS_PIC); 1867 break; 1868 case UHF_C_PORT_CONNECTION: 1869 EOWRITE4(sc, port, v | EHCI_PS_CSC); 1870 break; 1871 case UHF_C_PORT_ENABLE: 1872 EOWRITE4(sc, port, v | EHCI_PS_PEC); 1873 break; 1874 case UHF_C_PORT_SUSPEND: 1875 /* how? */ 1876 break; 1877 case UHF_C_PORT_OVER_CURRENT: 1878 EOWRITE4(sc, port, v | EHCI_PS_OCC); 1879 break; 1880 case UHF_C_PORT_RESET: 1881 sc->sc_isreset = 0; 1882 break; 1883 default: 1884 err = USBD_IOERROR; 1885 goto ret; 1886 } 1887 #if 0 1888 switch(value) { 1889 case UHF_C_PORT_CONNECTION: 1890 case UHF_C_PORT_ENABLE: 1891 case UHF_C_PORT_SUSPEND: 1892 case UHF_C_PORT_OVER_CURRENT: 1893 case UHF_C_PORT_RESET: 1894 /* Enable RHSC interrupt if condition is cleared. */ 1895 if ((OREAD4(sc, port) >> 16) == 0) 1896 ehci_pcd_able(sc, 1); 1897 break; 1898 default: 1899 break; 1900 } 1901 #endif 1902 break; 1903 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 1904 if ((value & 0xff) != 0) { 1905 err = USBD_IOERROR; 1906 goto ret; 1907 } 1908 hubd = ehci_hubd; 1909 hubd.bNbrPorts = sc->sc_noport; 1910 v = EOREAD4(sc, EHCI_HCSPARAMS); 1911 USETW(hubd.wHubCharacteristics, 1912 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH | 1913 EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) 1914 ? UHD_PORT_IND : 0); 1915 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */ 1916 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 1917 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */ 1918 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 1919 l = min(len, hubd.bDescLength); 1920 totlen = l; 1921 memcpy(buf, &hubd, l); 1922 break; 1923 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 1924 if (len != 4) { 1925 err = USBD_IOERROR; 1926 goto ret; 1927 } 1928 memset(buf, 0, len); /* ? XXX */ 1929 totlen = len; 1930 break; 1931 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 1932 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n", 1933 index)); 1934 if (index < 1 || index > sc->sc_noport) { 1935 err = USBD_IOERROR; 1936 goto ret; 1937 } 1938 if (len != 4) { 1939 err = USBD_IOERROR; 1940 goto ret; 1941 } 1942 v = EOREAD4(sc, EHCI_PORTSC(index)); 1943 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", 1944 v)); 1945 i = UPS_HIGH_SPEED; 1946 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS; 1947 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED; 1948 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND; 1949 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR; 1950 if (v & EHCI_PS_PR) i |= UPS_RESET; 1951 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER; 1952 USETW(ps.wPortStatus, i); 1953 i = 0; 1954 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS; 1955 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED; 1956 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR; 1957 if (sc->sc_isreset) i |= UPS_C_PORT_RESET; 1958 USETW(ps.wPortChange, i); 1959 l = min(len, sizeof ps); 1960 memcpy(buf, &ps, l); 1961 totlen = l; 1962 break; 1963 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 1964 err = USBD_IOERROR; 1965 goto ret; 1966 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 1967 break; 1968 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 1969 if (index < 1 || index > sc->sc_noport) { 1970 err = USBD_IOERROR; 1971 goto ret; 1972 } 1973 port = EHCI_PORTSC(index); 1974 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 1975 switch(value) { 1976 case UHF_PORT_ENABLE: 1977 EOWRITE4(sc, port, v | EHCI_PS_PE); 1978 break; 1979 case UHF_PORT_SUSPEND: 1980 EOWRITE4(sc, port, v | EHCI_PS_SUSP); 1981 break; 1982 case UHF_PORT_RESET: 1983 DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n", 1984 index)); 1985 if (EHCI_PS_IS_LOWSPEED(v)) { 1986 /* Low speed device, give up ownership. */ 1987 ehci_disown(sc, index, 1); 1988 break; 1989 } 1990 /* Start reset sequence. */ 1991 v &= ~ (EHCI_PS_PE | EHCI_PS_PR); 1992 EOWRITE4(sc, port, v | EHCI_PS_PR); 1993 /* Wait for reset to complete. */ 1994 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 1995 if (sc->sc_dying) { 1996 err = USBD_IOERROR; 1997 goto ret; 1998 } 1999 /* Terminate reset sequence. */ 2000 EOWRITE4(sc, port, v); 2001 /* Wait for HC to complete reset. */ 2002 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE); 2003 if (sc->sc_dying) { 2004 err = USBD_IOERROR; 2005 goto ret; 2006 } 2007 v = EOREAD4(sc, port); 2008 DPRINTF(("ehci after reset, status=0x%08x\n", v)); 2009 if (v & EHCI_PS_PR) { 2010 printf("%s: port reset timeout\n", 2011 USBDEVNAME(sc->sc_bus.bdev)); 2012 return (USBD_TIMEOUT); 2013 } 2014 if (!(v & EHCI_PS_PE)) { 2015 /* Not a high speed device, give up ownership.*/ 2016 ehci_disown(sc, index, 0); 2017 break; 2018 } 2019 sc->sc_isreset = 1; 2020 DPRINTF(("ehci port %d reset, status = 0x%08x\n", 2021 index, v)); 2022 break; 2023 case UHF_PORT_POWER: 2024 DPRINTFN(2,("ehci_root_ctrl_start: set port power " 2025 "%d\n", index)); 2026 EOWRITE4(sc, port, v | EHCI_PS_PP); 2027 break; 2028 case UHF_PORT_TEST: 2029 DPRINTFN(2,("ehci_root_ctrl_start: set port test " 2030 "%d\n", index)); 2031 break; 2032 case UHF_PORT_INDICATOR: 2033 DPRINTFN(2,("ehci_root_ctrl_start: set port ind " 2034 "%d\n", index)); 2035 EOWRITE4(sc, port, v | EHCI_PS_PIC); 2036 break; 2037 default: 2038 err = USBD_IOERROR; 2039 goto ret; 2040 } 2041 break; 2042 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER): 2043 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER): 2044 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER): 2045 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER): 2046 break; 2047 default: 2048 err = USBD_IOERROR; 2049 goto ret; 2050 } 2051 xfer->actlen = totlen; 2052 err = USBD_NORMAL_COMPLETION; 2053 ret: 2054 xfer->status = err; 2055 s = splusb(); 2056 usb_transfer_complete(xfer); 2057 splx(s); 2058 return (USBD_IN_PROGRESS); 2059 } 2060 2061 void 2062 ehci_disown(ehci_softc_t *sc, int index, int lowspeed) 2063 { 2064 int port; 2065 u_int32_t v; 2066 2067 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed)); 2068 #ifdef DIAGNOSTIC 2069 if (sc->sc_npcomp != 0) { 2070 int i = (index-1) / sc->sc_npcomp; 2071 if (i >= sc->sc_ncomp) 2072 printf("%s: strange port\n", 2073 USBDEVNAME(sc->sc_bus.bdev)); 2074 else 2075 printf("%s: handing over %s speed device on " 2076 "port %d to %s\n", 2077 USBDEVNAME(sc->sc_bus.bdev), 2078 lowspeed ? "low" : "full", 2079 index, USBDEVNAME(sc->sc_comps[i]->bdev)); 2080 } else { 2081 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev)); 2082 } 2083 #endif 2084 port = EHCI_PORTSC(index); 2085 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR; 2086 EOWRITE4(sc, port, v | EHCI_PS_PO); 2087 } 2088 2089 /* Abort a root control request. */ 2090 Static void 2091 ehci_root_ctrl_abort(usbd_xfer_handle xfer) 2092 { 2093 /* Nothing to do, all transfers are synchronous. */ 2094 } 2095 2096 /* Close the root pipe. */ 2097 Static void 2098 ehci_root_ctrl_close(usbd_pipe_handle pipe) 2099 { 2100 DPRINTF(("ehci_root_ctrl_close\n")); 2101 /* Nothing to do. */ 2102 } 2103 2104 void 2105 ehci_root_intr_done(usbd_xfer_handle xfer) 2106 { 2107 xfer->hcpriv = NULL; 2108 } 2109 2110 Static usbd_status 2111 ehci_root_intr_transfer(usbd_xfer_handle xfer) 2112 { 2113 usbd_status err; 2114 2115 /* Insert last in queue. */ 2116 err = usb_insert_transfer(xfer); 2117 if (err) 2118 return (err); 2119 2120 /* Pipe isn't running, start first */ 2121 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2122 } 2123 2124 Static usbd_status 2125 ehci_root_intr_start(usbd_xfer_handle xfer) 2126 { 2127 usbd_pipe_handle pipe = xfer->pipe; 2128 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2129 2130 if (sc->sc_dying) 2131 return (USBD_IOERROR); 2132 2133 sc->sc_intrxfer = xfer; 2134 2135 return (USBD_IN_PROGRESS); 2136 } 2137 2138 /* Abort a root interrupt request. */ 2139 Static void 2140 ehci_root_intr_abort(usbd_xfer_handle xfer) 2141 { 2142 int s; 2143 2144 if (xfer->pipe->intrxfer == xfer) { 2145 DPRINTF(("ehci_root_intr_abort: remove\n")); 2146 xfer->pipe->intrxfer = NULL; 2147 } 2148 xfer->status = USBD_CANCELLED; 2149 s = splusb(); 2150 usb_transfer_complete(xfer); 2151 splx(s); 2152 } 2153 2154 /* Close the root pipe. */ 2155 Static void 2156 ehci_root_intr_close(usbd_pipe_handle pipe) 2157 { 2158 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2159 2160 DPRINTF(("ehci_root_intr_close\n")); 2161 2162 sc->sc_intrxfer = NULL; 2163 } 2164 2165 void 2166 ehci_root_ctrl_done(usbd_xfer_handle xfer) 2167 { 2168 xfer->hcpriv = NULL; 2169 } 2170 2171 /************************/ 2172 2173 ehci_soft_qh_t * 2174 ehci_alloc_sqh(ehci_softc_t *sc) 2175 { 2176 ehci_soft_qh_t *sqh; 2177 usbd_status err; 2178 int i, offs; 2179 usb_dma_t dma; 2180 2181 if (sc->sc_freeqhs == NULL) { 2182 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n")); 2183 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK, 2184 EHCI_PAGE_SIZE, &dma); 2185 #ifdef EHCI_DEBUG 2186 if (err) 2187 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err); 2188 #endif 2189 if (err) 2190 return (NULL); 2191 for(i = 0; i < EHCI_SQH_CHUNK; i++) { 2192 offs = i * EHCI_SQH_SIZE; 2193 sqh = KERNADDR(&dma, offs); 2194 sqh->physaddr = DMAADDR(&dma, offs); 2195 sqh->next = sc->sc_freeqhs; 2196 sc->sc_freeqhs = sqh; 2197 } 2198 } 2199 sqh = sc->sc_freeqhs; 2200 sc->sc_freeqhs = sqh->next; 2201 memset(&sqh->qh, 0, sizeof(ehci_qh_t)); 2202 sqh->next = NULL; 2203 return (sqh); 2204 } 2205 2206 void 2207 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh) 2208 { 2209 sqh->next = sc->sc_freeqhs; 2210 sc->sc_freeqhs = sqh; 2211 } 2212 2213 ehci_soft_qtd_t * 2214 ehci_alloc_sqtd(ehci_softc_t *sc) 2215 { 2216 ehci_soft_qtd_t *sqtd; 2217 usbd_status err; 2218 int i, offs; 2219 usb_dma_t dma; 2220 int s; 2221 2222 if (sc->sc_freeqtds == NULL) { 2223 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n")); 2224 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK, 2225 EHCI_PAGE_SIZE, &dma); 2226 #ifdef EHCI_DEBUG 2227 if (err) 2228 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err); 2229 #endif 2230 if (err) 2231 return (NULL); 2232 s = splusb(); 2233 for(i = 0; i < EHCI_SQTD_CHUNK; i++) { 2234 offs = i * EHCI_SQTD_SIZE; 2235 sqtd = KERNADDR(&dma, offs); 2236 sqtd->physaddr = DMAADDR(&dma, offs); 2237 sqtd->nextqtd = sc->sc_freeqtds; 2238 sc->sc_freeqtds = sqtd; 2239 } 2240 splx(s); 2241 } 2242 2243 s = splusb(); 2244 sqtd = sc->sc_freeqtds; 2245 sc->sc_freeqtds = sqtd->nextqtd; 2246 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t)); 2247 sqtd->nextqtd = NULL; 2248 sqtd->xfer = NULL; 2249 splx(s); 2250 2251 return (sqtd); 2252 } 2253 2254 void 2255 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd) 2256 { 2257 int s; 2258 2259 s = splusb(); 2260 sqtd->nextqtd = sc->sc_freeqtds; 2261 sc->sc_freeqtds = sqtd; 2262 splx(s); 2263 } 2264 2265 usbd_status 2266 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, 2267 int alen, int rd, usbd_xfer_handle xfer, 2268 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep) 2269 { 2270 ehci_soft_qtd_t *next, *cur; 2271 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys; 2272 u_int32_t qtdstatus; 2273 int len, curlen, mps; 2274 int i, tog; 2275 usb_dma_t *dma = &xfer->dmabuf; 2276 2277 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen)); 2278 2279 len = alen; 2280 dataphys = DMAADDR(dma, 0); 2281 dataphyslastpage = EHCI_PAGE(dataphys + len - 1); 2282 #if 0 2283 printf("status=%08x toggle=%d\n", epipe->sqh->qh.qh_qtd.qtd_status, 2284 epipe->nexttoggle); 2285 #endif 2286 qtdstatus = EHCI_QTD_ACTIVE | 2287 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) | 2288 EHCI_QTD_SET_CERR(3) 2289 /* IOC set below */ 2290 /* BYTES set below */ 2291 ; 2292 mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize); 2293 tog = epipe->nexttoggle; 2294 qtdstatus |= EHCI_QTD_SET_TOGGLE(tog); 2295 2296 cur = ehci_alloc_sqtd(sc); 2297 *sp = cur; 2298 if (cur == NULL) 2299 goto nomem; 2300 for (;;) { 2301 dataphyspage = EHCI_PAGE(dataphys); 2302 /* The EHCI hardware can handle at most 5 pages. */ 2303 if (dataphyslastpage - dataphyspage < 2304 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) { 2305 /* we can handle it in this QTD */ 2306 curlen = len; 2307 } else { 2308 /* must use multiple TDs, fill as much as possible. */ 2309 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE - 2310 EHCI_PAGE_OFFSET(dataphys); 2311 #ifdef DIAGNOSTIC 2312 if (curlen > len) { 2313 printf("ehci_alloc_sqtd_chain: curlen=0x%x " 2314 "len=0x%x offs=0x%x\n", curlen, len, 2315 EHCI_PAGE_OFFSET(dataphys)); 2316 printf("lastpage=0x%x page=0x%x phys=0x%x\n", 2317 dataphyslastpage, dataphyspage, 2318 dataphys); 2319 curlen = len; 2320 } 2321 #endif 2322 /* the length must be a multiple of the max size */ 2323 curlen -= curlen % mps; 2324 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, " 2325 "curlen=%d\n", curlen)); 2326 #ifdef DIAGNOSTIC 2327 if (curlen == 0) 2328 panic("ehci_alloc_std: curlen == 0"); 2329 #endif 2330 } 2331 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x " 2332 "dataphyslastpage=0x%08x len=%d curlen=%d\n", 2333 dataphys, dataphyslastpage, 2334 len, curlen)); 2335 len -= curlen; 2336 2337 if (len != 0) { 2338 next = ehci_alloc_sqtd(sc); 2339 if (next == NULL) 2340 goto nomem; 2341 nextphys = htole32(next->physaddr); 2342 } else { 2343 next = NULL; 2344 nextphys = EHCI_NULL; 2345 } 2346 2347 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) { 2348 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE; 2349 if (i != 0) /* use offset only in first buffer */ 2350 a = EHCI_PAGE(a); 2351 cur->qtd.qtd_buffer[i] = htole32(a); 2352 cur->qtd.qtd_buffer_hi[i] = 0; 2353 #ifdef DIAGNOSTIC 2354 if (i >= EHCI_QTD_NBUFFERS) { 2355 printf("ehci_alloc_sqtd_chain: i=%d\n", i); 2356 goto nomem; 2357 } 2358 #endif 2359 } 2360 cur->nextqtd = next; 2361 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys; 2362 cur->qtd.qtd_status = 2363 htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen)); 2364 cur->xfer = xfer; 2365 cur->len = curlen; 2366 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n", 2367 dataphys, dataphys + curlen)); 2368 /* adjust the toggle based on the number of packets in this 2369 qtd */ 2370 if (((curlen + mps - 1) / mps) & 1) { 2371 tog ^= 1; 2372 qtdstatus ^= EHCI_QTD_TOGGLE_MASK; 2373 } 2374 if (len == 0) 2375 break; 2376 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n")); 2377 dataphys += curlen; 2378 cur = next; 2379 } 2380 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC); 2381 *ep = cur; 2382 epipe->nexttoggle = tog; 2383 2384 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n", 2385 *sp, *ep)); 2386 2387 return (USBD_NORMAL_COMPLETION); 2388 2389 nomem: 2390 /* XXX free chain */ 2391 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n")); 2392 return (USBD_NOMEM); 2393 } 2394 2395 Static void 2396 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd, 2397 ehci_soft_qtd_t *sqtdend) 2398 { 2399 ehci_soft_qtd_t *p; 2400 int i; 2401 2402 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n", 2403 sqtd, sqtdend)); 2404 2405 for (i = 0; sqtd != sqtdend; sqtd = p, i++) { 2406 p = sqtd->nextqtd; 2407 ehci_free_sqtd(sc, sqtd); 2408 } 2409 } 2410 2411 /****************/ 2412 2413 /* 2414 * Close a reqular pipe. 2415 * Assumes that there are no pending transactions. 2416 */ 2417 void 2418 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head) 2419 { 2420 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 2421 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2422 ehci_soft_qh_t *sqh = epipe->sqh; 2423 int s; 2424 2425 s = splusb(); 2426 ehci_rem_qh(sc, sqh, head); 2427 splx(s); 2428 ehci_free_sqh(sc, epipe->sqh); 2429 } 2430 2431 /* 2432 * Abort a device request. 2433 * If this routine is called at splusb() it guarantees that the request 2434 * will be removed from the hardware scheduling and that the callback 2435 * for it will be called with USBD_CANCELLED status. 2436 * It's impossible to guarantee that the requested transfer will not 2437 * have happened since the hardware runs concurrently. 2438 * If the transaction has already happened we rely on the ordinary 2439 * interrupt processing to process it. 2440 * XXX This is most probably wrong. 2441 */ 2442 void 2443 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2444 { 2445 #define exfer EXFER(xfer) 2446 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2447 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2448 ehci_soft_qh_t *sqh = epipe->sqh; 2449 ehci_soft_qtd_t *sqtd; 2450 ehci_physaddr_t cur; 2451 u_int32_t qhstatus; 2452 int s; 2453 int hit; 2454 int wake; 2455 2456 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe)); 2457 2458 if (sc->sc_dying) { 2459 /* If we're dying, just do the software part. */ 2460 s = splusb(); 2461 xfer->status = status; /* make software ignore it */ 2462 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2463 usb_transfer_complete(xfer); 2464 splx(s); 2465 return; 2466 } 2467 2468 if (xfer->device->bus->intr_context || !curproc) 2469 panic("ehci_abort_xfer: not in process context"); 2470 2471 /* 2472 * If an abort is already in progress then just wait for it to 2473 * complete and return. 2474 */ 2475 if (xfer->hcflags & UXFER_ABORTING) { 2476 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n")); 2477 #ifdef DIAGNOSTIC 2478 if (status == USBD_TIMEOUT) 2479 printf("ehci_abort_xfer: TIMEOUT while aborting\n"); 2480 #endif 2481 /* Override the status which might be USBD_TIMEOUT. */ 2482 xfer->status = status; 2483 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n")); 2484 xfer->hcflags |= UXFER_ABORTWAIT; 2485 while (xfer->hcflags & UXFER_ABORTING) 2486 tsleep(&xfer->hcflags, PZERO, "ehciaw", 0); 2487 return; 2488 } 2489 xfer->hcflags |= UXFER_ABORTING; 2490 2491 /* 2492 * Step 1: Make interrupt routine and hardware ignore xfer. 2493 */ 2494 s = splusb(); 2495 xfer->status = status; /* make software ignore it */ 2496 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer); 2497 qhstatus = sqh->qh.qh_qtd.qtd_status; 2498 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED); 2499 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2500 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED); 2501 if (sqtd == exfer->sqtdend) 2502 break; 2503 } 2504 splx(s); 2505 2506 /* 2507 * Step 2: Wait until we know hardware has finished any possible 2508 * use of the xfer. Also make sure the soft interrupt routine 2509 * has run. 2510 */ 2511 ehci_sync_hc(sc); 2512 s = splusb(); 2513 #ifdef USB_USE_SOFTINTR 2514 sc->sc_softwake = 1; 2515 #endif /* USB_USE_SOFTINTR */ 2516 usb_schedsoftintr(&sc->sc_bus); 2517 #ifdef USB_USE_SOFTINTR 2518 tsleep(&sc->sc_softwake, PZERO, "ehciab", 0); 2519 #endif /* USB_USE_SOFTINTR */ 2520 splx(s); 2521 2522 /* 2523 * Step 3: Remove any vestiges of the xfer from the hardware. 2524 * The complication here is that the hardware may have executed 2525 * beyond the xfer we're trying to abort. So as we're scanning 2526 * the TDs of this xfer we check if the hardware points to 2527 * any of them. 2528 */ 2529 s = splusb(); /* XXX why? */ 2530 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd)); 2531 hit = 0; 2532 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) { 2533 hit |= cur == sqtd->physaddr; 2534 if (sqtd == exfer->sqtdend) 2535 break; 2536 } 2537 sqtd = sqtd->nextqtd; 2538 /* Zap curqtd register if hardware pointed inside the xfer. */ 2539 if (hit && sqtd != NULL) { 2540 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr)); 2541 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */ 2542 sqh->qh.qh_qtd.qtd_status = qhstatus; 2543 } else { 2544 DPRINTFN(1,("ehci_abort_xfer: no hit\n")); 2545 } 2546 2547 /* 2548 * Step 4: Execute callback. 2549 */ 2550 #ifdef DIAGNOSTIC 2551 exfer->isdone = 1; 2552 #endif 2553 wake = xfer->hcflags & UXFER_ABORTWAIT; 2554 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2555 usb_transfer_complete(xfer); 2556 if (wake) 2557 wakeup(&xfer->hcflags); 2558 2559 splx(s); 2560 #undef exfer 2561 } 2562 2563 void 2564 ehci_timeout(void *addr) 2565 { 2566 struct ehci_xfer *exfer = addr; 2567 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe; 2568 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus; 2569 2570 DPRINTF(("ehci_timeout: exfer=%p\n", exfer)); 2571 #ifdef USB_DEBUG 2572 if (ehcidebug > 1) 2573 usbd_dump_pipe(exfer->xfer.pipe); 2574 #endif 2575 2576 if (sc->sc_dying) { 2577 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT); 2578 return; 2579 } 2580 2581 /* Execute the abort in a process context. */ 2582 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr); 2583 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task); 2584 } 2585 2586 void 2587 ehci_timeout_task(void *addr) 2588 { 2589 usbd_xfer_handle xfer = addr; 2590 int s; 2591 2592 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer)); 2593 2594 s = splusb(); 2595 ehci_abort_xfer(xfer, USBD_TIMEOUT); 2596 splx(s); 2597 } 2598 2599 /************************/ 2600 2601 Static usbd_status 2602 ehci_device_ctrl_transfer(usbd_xfer_handle xfer) 2603 { 2604 usbd_status err; 2605 2606 /* Insert last in queue. */ 2607 err = usb_insert_transfer(xfer); 2608 if (err) 2609 return (err); 2610 2611 /* Pipe isn't running, start first */ 2612 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2613 } 2614 2615 Static usbd_status 2616 ehci_device_ctrl_start(usbd_xfer_handle xfer) 2617 { 2618 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2619 usbd_status err; 2620 2621 if (sc->sc_dying) 2622 return (USBD_IOERROR); 2623 2624 #ifdef DIAGNOSTIC 2625 if (!(xfer->rqflags & URQ_REQUEST)) { 2626 /* XXX panic */ 2627 printf("ehci_device_ctrl_transfer: not a request\n"); 2628 return (USBD_INVAL); 2629 } 2630 #endif 2631 2632 err = ehci_device_request(xfer); 2633 if (err) 2634 return (err); 2635 2636 if (sc->sc_bus.use_polling) 2637 ehci_waitintr(sc, xfer); 2638 return (USBD_IN_PROGRESS); 2639 } 2640 2641 void 2642 ehci_device_ctrl_done(usbd_xfer_handle xfer) 2643 { 2644 struct ehci_xfer *ex = EXFER(xfer); 2645 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2646 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2647 2648 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer)); 2649 2650 #ifdef DIAGNOSTIC 2651 if (!(xfer->rqflags & URQ_REQUEST)) { 2652 panic("ehci_ctrl_done: not a request"); 2653 } 2654 #endif 2655 2656 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2657 ehci_del_intr_list(ex); /* remove from active list */ 2658 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2659 } 2660 2661 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen)); 2662 } 2663 2664 /* Abort a device control request. */ 2665 Static void 2666 ehci_device_ctrl_abort(usbd_xfer_handle xfer) 2667 { 2668 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer)); 2669 ehci_abort_xfer(xfer, USBD_CANCELLED); 2670 } 2671 2672 /* Close a device control pipe. */ 2673 Static void 2674 ehci_device_ctrl_close(usbd_pipe_handle pipe) 2675 { 2676 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2677 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/ 2678 2679 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe)); 2680 ehci_close_pipe(pipe, sc->sc_async_head); 2681 } 2682 2683 usbd_status 2684 ehci_device_request(usbd_xfer_handle xfer) 2685 { 2686 #define exfer EXFER(xfer) 2687 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2688 usb_device_request_t *req = &xfer->request; 2689 usbd_device_handle dev = epipe->pipe.device; 2690 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2691 int addr = dev->address; 2692 ehci_soft_qtd_t *setup, *stat, *next; 2693 ehci_soft_qh_t *sqh; 2694 int isread; 2695 int len; 2696 usbd_status err; 2697 int s; 2698 2699 isread = req->bmRequestType & UT_READ; 2700 len = UGETW(req->wLength); 2701 2702 DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, " 2703 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2704 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2705 UGETW(req->wIndex), len, addr, 2706 epipe->pipe.endpoint->edesc->bEndpointAddress)); 2707 2708 setup = ehci_alloc_sqtd(sc); 2709 if (setup == NULL) { 2710 err = USBD_NOMEM; 2711 goto bad1; 2712 } 2713 stat = ehci_alloc_sqtd(sc); 2714 if (stat == NULL) { 2715 err = USBD_NOMEM; 2716 goto bad2; 2717 } 2718 2719 sqh = epipe->sqh; 2720 epipe->u.ctl.length = len; 2721 2722 /* Update device address and length since they may have changed 2723 during the setup of the control pipe in usbd_new_device(). */ 2724 /* XXX This only needs to be done once, but it's too early in open. */ 2725 /* XXXX Should not touch ED here! */ 2726 sqh->qh.qh_endp = 2727 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) | 2728 htole32( 2729 EHCI_QH_SET_ADDR(addr) | 2730 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize)) 2731 ); 2732 2733 /* Set up data transaction */ 2734 if (len != 0) { 2735 ehci_soft_qtd_t *end; 2736 2737 /* Start toggle at 1. */ 2738 epipe->nexttoggle = 1; 2739 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 2740 &next, &end); 2741 if (err) 2742 goto bad3; 2743 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC); 2744 end->nextqtd = stat; 2745 end->qtd.qtd_next = 2746 end->qtd.qtd_altnext = htole32(stat->physaddr); 2747 } else { 2748 next = stat; 2749 } 2750 2751 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req); 2752 2753 /* Clear toggle */ 2754 setup->qtd.qtd_status = htole32( 2755 EHCI_QTD_ACTIVE | 2756 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) | 2757 EHCI_QTD_SET_CERR(3) | 2758 EHCI_QTD_SET_TOGGLE(0) | 2759 EHCI_QTD_SET_BYTES(sizeof *req) 2760 ); 2761 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0)); 2762 setup->qtd.qtd_buffer_hi[0] = 0; 2763 setup->nextqtd = next; 2764 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr); 2765 setup->xfer = xfer; 2766 setup->len = sizeof *req; 2767 2768 stat->qtd.qtd_status = htole32( 2769 EHCI_QTD_ACTIVE | 2770 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) | 2771 EHCI_QTD_SET_CERR(3) | 2772 EHCI_QTD_SET_TOGGLE(1) | 2773 EHCI_QTD_IOC 2774 ); 2775 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */ 2776 stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */ 2777 stat->nextqtd = NULL; 2778 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL; 2779 stat->xfer = xfer; 2780 stat->len = 0; 2781 2782 #ifdef EHCI_DEBUG 2783 if (ehcidebug > 5) { 2784 DPRINTF(("ehci_device_request:\n")); 2785 ehci_dump_sqh(sqh); 2786 ehci_dump_sqtds(setup); 2787 } 2788 #endif 2789 2790 exfer->sqtdstart = setup; 2791 exfer->sqtdend = stat; 2792 #ifdef DIAGNOSTIC 2793 if (!exfer->isdone) { 2794 printf("ehci_device_request: not done, exfer=%p\n", exfer); 2795 } 2796 exfer->isdone = 0; 2797 #endif 2798 2799 /* Insert qTD in QH list. */ 2800 s = splusb(); 2801 ehci_set_qh_qtd(sqh, setup); 2802 if (xfer->timeout && !sc->sc_bus.use_polling) { 2803 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2804 ehci_timeout, xfer); 2805 } 2806 ehci_add_intr_list(sc, exfer); 2807 xfer->status = USBD_IN_PROGRESS; 2808 splx(s); 2809 2810 #ifdef EHCI_DEBUG 2811 if (ehcidebug > 10) { 2812 DPRINTF(("ehci_device_request: status=%x\n", 2813 EOREAD4(sc, EHCI_USBSTS))); 2814 delay(10000); 2815 ehci_dump_regs(sc); 2816 ehci_dump_sqh(sc->sc_async_head); 2817 ehci_dump_sqh(sqh); 2818 ehci_dump_sqtds(setup); 2819 } 2820 #endif 2821 2822 return (USBD_NORMAL_COMPLETION); 2823 2824 bad3: 2825 ehci_free_sqtd(sc, stat); 2826 bad2: 2827 ehci_free_sqtd(sc, setup); 2828 bad1: 2829 DPRINTFN(-1,("ehci_device_request: no memory\n")); 2830 xfer->status = err; 2831 usb_transfer_complete(xfer); 2832 return (err); 2833 #undef exfer 2834 } 2835 2836 /************************/ 2837 2838 Static usbd_status 2839 ehci_device_bulk_transfer(usbd_xfer_handle xfer) 2840 { 2841 usbd_status err; 2842 2843 /* Insert last in queue. */ 2844 err = usb_insert_transfer(xfer); 2845 if (err) 2846 return (err); 2847 2848 /* Pipe isn't running, start first */ 2849 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2850 } 2851 2852 usbd_status 2853 ehci_device_bulk_start(usbd_xfer_handle xfer) 2854 { 2855 #define exfer EXFER(xfer) 2856 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 2857 usbd_device_handle dev = epipe->pipe.device; 2858 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 2859 ehci_soft_qtd_t *data, *dataend; 2860 ehci_soft_qh_t *sqh; 2861 usbd_status err; 2862 int len, isread, endpt; 2863 int s; 2864 2865 DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n", 2866 xfer, xfer->length, xfer->flags)); 2867 2868 if (sc->sc_dying) 2869 return (USBD_IOERROR); 2870 2871 #ifdef DIAGNOSTIC 2872 if (xfer->rqflags & URQ_REQUEST) 2873 panic("ehci_device_bulk_start: a request"); 2874 #endif 2875 2876 len = xfer->length; 2877 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 2878 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2879 sqh = epipe->sqh; 2880 2881 epipe->u.bulk.length = len; 2882 2883 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 2884 &dataend); 2885 if (err) { 2886 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n")); 2887 xfer->status = err; 2888 usb_transfer_complete(xfer); 2889 return (err); 2890 } 2891 2892 #ifdef EHCI_DEBUG 2893 if (ehcidebug > 5) { 2894 DPRINTF(("ehci_device_bulk_start: data(1)\n")); 2895 ehci_dump_sqh(sqh); 2896 ehci_dump_sqtds(data); 2897 } 2898 #endif 2899 2900 /* Set up interrupt info. */ 2901 exfer->sqtdstart = data; 2902 exfer->sqtdend = dataend; 2903 #ifdef DIAGNOSTIC 2904 if (!exfer->isdone) { 2905 printf("ehci_device_bulk_start: not done, ex=%p\n", exfer); 2906 } 2907 exfer->isdone = 0; 2908 #endif 2909 2910 s = splusb(); 2911 ehci_set_qh_qtd(sqh, data); 2912 if (xfer->timeout && !sc->sc_bus.use_polling) { 2913 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2914 ehci_timeout, xfer); 2915 } 2916 ehci_add_intr_list(sc, exfer); 2917 xfer->status = USBD_IN_PROGRESS; 2918 splx(s); 2919 2920 #ifdef EHCI_DEBUG 2921 if (ehcidebug > 10) { 2922 DPRINTF(("ehci_device_bulk_start: data(2)\n")); 2923 delay(10000); 2924 DPRINTF(("ehci_device_bulk_start: data(3)\n")); 2925 ehci_dump_regs(sc); 2926 #if 0 2927 printf("async_head:\n"); 2928 ehci_dump_sqh(sc->sc_async_head); 2929 #endif 2930 printf("sqh:\n"); 2931 ehci_dump_sqh(sqh); 2932 ehci_dump_sqtds(data); 2933 } 2934 #endif 2935 2936 if (sc->sc_bus.use_polling) 2937 ehci_waitintr(sc, xfer); 2938 2939 return (USBD_IN_PROGRESS); 2940 #undef exfer 2941 } 2942 2943 Static void 2944 ehci_device_bulk_abort(usbd_xfer_handle xfer) 2945 { 2946 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer)); 2947 ehci_abort_xfer(xfer, USBD_CANCELLED); 2948 } 2949 2950 /* 2951 * Close a device bulk pipe. 2952 */ 2953 Static void 2954 ehci_device_bulk_close(usbd_pipe_handle pipe) 2955 { 2956 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 2957 2958 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe)); 2959 ehci_close_pipe(pipe, sc->sc_async_head); 2960 } 2961 2962 void 2963 ehci_device_bulk_done(usbd_xfer_handle xfer) 2964 { 2965 struct ehci_xfer *ex = EXFER(xfer); 2966 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 2967 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/ 2968 2969 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n", 2970 xfer, xfer->actlen)); 2971 2972 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 2973 ehci_del_intr_list(ex); /* remove from active list */ 2974 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 2975 } 2976 2977 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen)); 2978 } 2979 2980 /************************/ 2981 2982 Static usbd_status 2983 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival) 2984 { 2985 struct ehci_soft_islot *isp; 2986 int islot, lev; 2987 2988 /* Find a poll rate that is large enough. */ 2989 for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--) 2990 if (EHCI_ILEV_IVAL(lev) <= ival) 2991 break; 2992 2993 /* Pick an interrupt slot at the right level. */ 2994 /* XXX could do better than picking at random */ 2995 sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize; 2996 islot = EHCI_IQHIDX(lev, sc->sc_rand); 2997 2998 sqh->islot = islot; 2999 isp = &sc->sc_islots[islot]; 3000 ehci_add_qh(sqh, isp->sqh); 3001 3002 return (USBD_NORMAL_COMPLETION); 3003 } 3004 3005 Static usbd_status 3006 ehci_device_intr_transfer(usbd_xfer_handle xfer) 3007 { 3008 usbd_status err; 3009 3010 /* Insert last in queue. */ 3011 err = usb_insert_transfer(xfer); 3012 if (err) 3013 return (err); 3014 3015 /* 3016 * Pipe isn't running (otherwise err would be USBD_INPROG), 3017 * so start it first. 3018 */ 3019 return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3020 } 3021 3022 Static usbd_status 3023 ehci_device_intr_start(usbd_xfer_handle xfer) 3024 { 3025 #define exfer EXFER(xfer) 3026 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3027 usbd_device_handle dev = xfer->pipe->device; 3028 ehci_softc_t *sc = (ehci_softc_t *)dev->bus; 3029 ehci_soft_qtd_t *data, *dataend; 3030 ehci_soft_qh_t *sqh; 3031 usbd_status err; 3032 int len, isread, endpt; 3033 int s; 3034 3035 DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n", 3036 xfer, xfer->length, xfer->flags)); 3037 3038 if (sc->sc_dying) 3039 return (USBD_IOERROR); 3040 3041 #ifdef DIAGNOSTIC 3042 if (xfer->rqflags & URQ_REQUEST) 3043 panic("ehci_device_intr_start: a request"); 3044 #endif 3045 3046 len = xfer->length; 3047 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3048 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3049 sqh = epipe->sqh; 3050 3051 epipe->u.intr.length = len; 3052 3053 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data, 3054 &dataend); 3055 if (err) { 3056 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n")); 3057 xfer->status = err; 3058 usb_transfer_complete(xfer); 3059 return (err); 3060 } 3061 3062 #ifdef EHCI_DEBUG 3063 if (ehcidebug > 5) { 3064 DPRINTF(("ehci_device_intr_start: data(1)\n")); 3065 ehci_dump_sqh(sqh); 3066 ehci_dump_sqtds(data); 3067 } 3068 #endif 3069 3070 /* Set up interrupt info. */ 3071 exfer->sqtdstart = data; 3072 exfer->sqtdend = dataend; 3073 #ifdef DIAGNOSTIC 3074 if (!exfer->isdone) { 3075 printf("ehci_device_intr_start: not done, ex=%p\n", exfer); 3076 } 3077 exfer->isdone = 0; 3078 #endif 3079 3080 s = splusb(); 3081 ehci_set_qh_qtd(sqh, data); 3082 if (xfer->timeout && !sc->sc_bus.use_polling) { 3083 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 3084 ehci_timeout, xfer); 3085 } 3086 ehci_add_intr_list(sc, exfer); 3087 xfer->status = USBD_IN_PROGRESS; 3088 splx(s); 3089 3090 #ifdef EHCI_DEBUG 3091 if (ehcidebug > 10) { 3092 DPRINTF(("ehci_device_intr_start: data(2)\n")); 3093 delay(10000); 3094 DPRINTF(("ehci_device_intr_start: data(3)\n")); 3095 ehci_dump_regs(sc); 3096 printf("sqh:\n"); 3097 ehci_dump_sqh(sqh); 3098 ehci_dump_sqtds(data); 3099 } 3100 #endif 3101 3102 if (sc->sc_bus.use_polling) 3103 ehci_waitintr(sc, xfer); 3104 3105 return (USBD_IN_PROGRESS); 3106 #undef exfer 3107 } 3108 3109 Static void 3110 ehci_device_intr_abort(usbd_xfer_handle xfer) 3111 { 3112 DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer)); 3113 if (xfer->pipe->intrxfer == xfer) { 3114 DPRINTFN(1, ("echi_device_intr_abort: remove\n")); 3115 xfer->pipe->intrxfer = NULL; 3116 } 3117 ehci_abort_xfer(xfer, USBD_CANCELLED); 3118 } 3119 3120 Static void 3121 ehci_device_intr_close(usbd_pipe_handle pipe) 3122 { 3123 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus; 3124 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe; 3125 struct ehci_soft_islot *isp; 3126 3127 isp = &sc->sc_islots[epipe->sqh->islot]; 3128 ehci_close_pipe(pipe, isp->sqh); 3129 } 3130 3131 Static void 3132 ehci_device_intr_done(usbd_xfer_handle xfer) 3133 { 3134 #define exfer EXFER(xfer) 3135 struct ehci_xfer *ex = EXFER(xfer); 3136 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus; 3137 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe; 3138 ehci_soft_qtd_t *data, *dataend; 3139 ehci_soft_qh_t *sqh; 3140 usbd_status err; 3141 int len, isread, endpt, s; 3142 3143 DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n", 3144 xfer, xfer->actlen)); 3145 3146 if (xfer->pipe->repeat) { 3147 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3148 3149 len = epipe->u.intr.length; 3150 xfer->length = len; 3151 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress; 3152 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 3153 sqh = epipe->sqh; 3154 3155 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, 3156 &data, &dataend); 3157 if (err) { 3158 DPRINTFN(-1, ("ehci_device_intr_done: no memory\n")); 3159 xfer->status = err; 3160 return; 3161 } 3162 3163 /* Set up interrupt info. */ 3164 exfer->sqtdstart = data; 3165 exfer->sqtdend = dataend; 3166 #ifdef DIAGNOSTIC 3167 if (!exfer->isdone) { 3168 printf("ehci_device_intr_done: not done, ex=%p\n", 3169 exfer); 3170 } 3171 exfer->isdone = 0; 3172 #endif 3173 3174 s = splusb(); 3175 ehci_set_qh_qtd(sqh, data); 3176 if (xfer->timeout && !sc->sc_bus.use_polling) { 3177 usb_callout(xfer->timeout_handle, 3178 mstohz(xfer->timeout), ehci_timeout, xfer); 3179 } 3180 splx(s); 3181 3182 xfer->status = USBD_IN_PROGRESS; 3183 } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) { 3184 ehci_del_intr_list(ex); /* remove from active list */ 3185 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL); 3186 } 3187 #undef exfer 3188 } 3189 3190 /************************/ 3191 3192 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3193 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; } 3194 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { } 3195 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { } 3196 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { } 3197
Indexes created Wed Sep 24 05:09:52 GMT 2025