ehcivar.h revision 1.37 1 1.37 kiyohara /* $NetBSD: ehcivar.h,v 1.37 2010/10/16 05:23:42 kiyohara Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.4 augustss * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss *
19 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
30 1.1 augustss */
31 1.1 augustss
32 1.7 augustss typedef struct ehci_soft_qtd {
33 1.7 augustss ehci_qtd_t qtd;
34 1.7 augustss struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */
35 1.7 augustss ehci_physaddr_t physaddr;
36 1.31 bouyer usb_dma_t dma; /* qTD's DMA infos */
37 1.31 bouyer int offs; /* qTD's offset in usb_dma_t */
38 1.7 augustss usbd_xfer_handle xfer;
39 1.7 augustss LIST_ENTRY(ehci_soft_qtd) hnext;
40 1.7 augustss u_int16_t len;
41 1.7 augustss } ehci_soft_qtd_t;
42 1.7 augustss #define EHCI_SQTD_SIZE ((sizeof (struct ehci_soft_qtd) + EHCI_QTD_ALIGN - 1) / EHCI_QTD_ALIGN * EHCI_QTD_ALIGN)
43 1.7 augustss #define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE)
44 1.7 augustss
45 1.7 augustss typedef struct ehci_soft_qh {
46 1.7 augustss ehci_qh_t qh;
47 1.7 augustss struct ehci_soft_qh *next;
48 1.9 augustss struct ehci_soft_qtd *sqtd;
49 1.7 augustss ehci_physaddr_t physaddr;
50 1.31 bouyer usb_dma_t dma; /* QH's DMA infos */
51 1.31 bouyer int offs; /* QH's offset in usb_dma_t */
52 1.15 augustss int islot;
53 1.7 augustss } ehci_soft_qh_t;
54 1.7 augustss #define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN)
55 1.7 augustss #define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE)
56 1.7 augustss
57 1.32 jmcneill typedef struct ehci_soft_itd {
58 1.32 jmcneill ehci_itd_t itd;
59 1.32 jmcneill union {
60 1.32 jmcneill struct {
61 1.32 jmcneill /* soft_itds links in a periodic frame*/
62 1.32 jmcneill struct ehci_soft_itd *next;
63 1.32 jmcneill struct ehci_soft_itd *prev;
64 1.32 jmcneill } frame_list;
65 1.32 jmcneill /* circular list of free itds */
66 1.32 jmcneill LIST_ENTRY(ehci_soft_itd) free_list;
67 1.32 jmcneill } u;
68 1.32 jmcneill struct ehci_soft_itd *xfer_next; /* Next soft_itd in xfer */
69 1.32 jmcneill ehci_physaddr_t physaddr;
70 1.32 jmcneill usb_dma_t dma;
71 1.32 jmcneill int offs;
72 1.32 jmcneill int slot;
73 1.32 jmcneill struct timeval t; /* store free time */
74 1.32 jmcneill } ehci_soft_itd_t;
75 1.32 jmcneill #define EHCI_ITD_SIZE ((sizeof(struct ehci_soft_itd) + EHCI_QH_ALIGN - 1) / EHCI_ITD_ALIGN * EHCI_ITD_ALIGN)
76 1.32 jmcneill #define EHCI_ITD_CHUNK (EHCI_PAGE_SIZE / EHCI_ITD_SIZE)
77 1.32 jmcneill
78 1.11 augustss struct ehci_xfer {
79 1.11 augustss struct usbd_xfer xfer;
80 1.11 augustss struct usb_task abort_task;
81 1.33 jmcneill TAILQ_ENTRY(ehci_xfer) inext; /* list of active xfers */
82 1.11 augustss ehci_soft_qtd_t *sqtdstart;
83 1.11 augustss ehci_soft_qtd_t *sqtdend;
84 1.32 jmcneill ehci_soft_itd_t *itdstart;
85 1.32 jmcneill ehci_soft_itd_t *itdend;
86 1.32 jmcneill u_int isoc_len;
87 1.22 chs int isdone; /* used only when DIAGNOSTIC is defined */
88 1.11 augustss };
89 1.11 augustss #define EXFER(xfer) ((struct ehci_xfer *)(xfer))
90 1.11 augustss
91 1.15 augustss /* Information about an entry in the interrupt list. */
92 1.15 augustss struct ehci_soft_islot {
93 1.15 augustss ehci_soft_qh_t *sqh; /* Queue Head. */
94 1.15 augustss };
95 1.15 augustss
96 1.15 augustss #define EHCI_FRAMELIST_MAXCOUNT 1024
97 1.15 augustss #define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 .. 128) */
98 1.15 augustss #define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1)
99 1.18 augustss #define EHCI_MAX_POLLRATE (1 << (EHCI_IPOLLRATES - 1))
100 1.15 augustss #define EHCI_IQHIDX(lev, pos) \
101 1.15 augustss ((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1)
102 1.15 augustss #define EHCI_ILEV_IVAL(lev) (1 << (lev))
103 1.15 augustss
104 1.7 augustss
105 1.7 augustss #define EHCI_HASH_SIZE 128
106 1.3 augustss #define EHCI_COMPANION_MAX 8
107 1.7 augustss
108 1.32 jmcneill #define EHCI_FREE_LIST_INTERVAL 100
109 1.32 jmcneill
110 1.1 augustss typedef struct ehci_softc {
111 1.29 drochner device_t sc_dev;
112 1.29 drochner struct usbd_bus sc_bus;
113 1.1 augustss bus_space_tag_t iot;
114 1.1 augustss bus_space_handle_t ioh;
115 1.1 augustss bus_size_t sc_size;
116 1.2 augustss u_int sc_offs; /* offset to operational regs */
117 1.23 xtraeme int sc_flags; /* misc flags */
118 1.23 xtraeme #define EHCIF_DROPPED_INTR_WORKAROUND 0x01
119 1.1 augustss
120 1.19 augustss char sc_vendor[32]; /* vendor string for root hub */
121 1.1 augustss int sc_id_vendor; /* vendor ID for root hub */
122 1.1 augustss
123 1.13 augustss u_int32_t sc_cmd; /* shadow of cmd reg during suspend */
124 1.1 augustss
125 1.3 augustss u_int sc_ncomp;
126 1.5 augustss u_int sc_npcomp;
127 1.29 drochner device_t sc_comps[EHCI_COMPANION_MAX];
128 1.3 augustss
129 1.3 augustss usb_dma_t sc_fldma;
130 1.15 augustss ehci_link_t *sc_flist;
131 1.3 augustss u_int sc_flsize;
132 1.15 augustss u_int sc_rand; /* XXX need proper intr scheduling */
133 1.15 augustss
134 1.15 augustss struct ehci_soft_islot sc_islots[EHCI_INTRQHS];
135 1.3 augustss
136 1.32 jmcneill /* jcmm - an array matching sc_flist, but with software pointers,
137 1.32 jmcneill * not hardware address pointers
138 1.32 jmcneill */
139 1.32 jmcneill struct ehci_soft_itd **sc_softitds;
140 1.32 jmcneill
141 1.33 jmcneill TAILQ_HEAD(, ehci_xfer) sc_intrhead;
142 1.33 jmcneill kmutex_t sc_intrhead_lock;
143 1.11 augustss
144 1.7 augustss ehci_soft_qh_t *sc_freeqhs;
145 1.7 augustss ehci_soft_qtd_t *sc_freeqtds;
146 1.32 jmcneill LIST_HEAD(sc_freeitds, ehci_soft_itd) sc_freeitds;
147 1.7 augustss
148 1.4 augustss int sc_noport;
149 1.21 augustss u_int8_t sc_hasppc; /* has Port Power Control */
150 1.4 augustss u_int8_t sc_addr; /* device address */
151 1.4 augustss u_int8_t sc_conf; /* device configuration */
152 1.4 augustss usbd_xfer_handle sc_intrxfer;
153 1.21 augustss char sc_isreset[EHCI_MAX_PORTS];
154 1.14 augustss #ifdef USB_USE_SOFTINTR
155 1.12 augustss char sc_softwake;
156 1.14 augustss #endif /* USB_USE_SOFTINTR */
157 1.5 augustss
158 1.5 augustss u_int32_t sc_eintrs;
159 1.9 augustss ehci_soft_qh_t *sc_async_head;
160 1.4 augustss
161 1.4 augustss SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */
162 1.8 augustss
163 1.25 ad kmutex_t sc_doorbell_lock;
164 1.5 augustss
165 1.34 dyoung struct callout sc_tmo_intrlist;
166 1.4 augustss
167 1.34 dyoung device_t sc_child; /* /dev/usb# device */
168 1.4 augustss char sc_dying;
169 1.16 fvdl struct usb_dma_reserve sc_dma_reserve;
170 1.37 kiyohara
171 1.37 kiyohara void (*sc_vendor_init)(struct ehci_softc *);
172 1.37 kiyohara int (*sc_vendor_port_status)(struct ehci_softc *, uint32_t, int);
173 1.1 augustss } ehci_softc_t;
174 1.2 augustss
175 1.3 augustss #define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a))
176 1.3 augustss #define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
177 1.3 augustss #define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a))
178 1.3 augustss #define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x))
179 1.3 augustss #define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x))
180 1.3 augustss #define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x))
181 1.2 augustss #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
182 1.2 augustss #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
183 1.2 augustss #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
184 1.2 augustss #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
185 1.2 augustss #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
186 1.2 augustss #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
187 1.1 augustss
188 1.1 augustss usbd_status ehci_init(ehci_softc_t *);
189 1.1 augustss int ehci_intr(void *);
190 1.1 augustss int ehci_detach(ehci_softc_t *, int);
191 1.27 dyoung int ehci_activate(device_t, enum devact);
192 1.27 dyoung void ehci_childdet(device_t, device_t);
193 1.36 dyoung bool ehci_suspend(device_t, const pmf_qual_t *);
194 1.36 dyoung bool ehci_resume(device_t, const pmf_qual_t *);
195 1.28 dyoung bool ehci_shutdown(device_t, int);
196