ehcivar.h revision 1.42 1 1.42 matt /* $NetBSD: ehcivar.h,v 1.42 2013/02/02 14:15:55 matt Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.4 augustss * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.1 augustss * by Lennart Augustsson (lennart (at) augustsson.net).
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss *
19 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
30 1.1 augustss */
31 1.1 augustss
32 1.41 christos #ifndef _EHCIVAR_H_
33 1.41 christos #define _EHCIVAR_H_
34 1.41 christos
35 1.41 christos #include <sys/pool.h>
36 1.41 christos
37 1.7 augustss typedef struct ehci_soft_qtd {
38 1.7 augustss ehci_qtd_t qtd;
39 1.7 augustss struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */
40 1.7 augustss ehci_physaddr_t physaddr;
41 1.31 bouyer usb_dma_t dma; /* qTD's DMA infos */
42 1.31 bouyer int offs; /* qTD's offset in usb_dma_t */
43 1.7 augustss usbd_xfer_handle xfer;
44 1.7 augustss LIST_ENTRY(ehci_soft_qtd) hnext;
45 1.7 augustss u_int16_t len;
46 1.7 augustss } ehci_soft_qtd_t;
47 1.42 matt #define EHCI_SQTD_ALIGN MAX(EHCI_QTD_ALIGN, CACHE_LINE_SIZE)
48 1.42 matt #define EHCI_SQTD_SIZE ((sizeof (struct ehci_soft_qtd) + EHCI_SQTD_ALIGN - 1) & -EHCI_SQTD_ALIGN)
49 1.7 augustss #define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE)
50 1.7 augustss
51 1.7 augustss typedef struct ehci_soft_qh {
52 1.7 augustss ehci_qh_t qh;
53 1.7 augustss struct ehci_soft_qh *next;
54 1.9 augustss struct ehci_soft_qtd *sqtd;
55 1.7 augustss ehci_physaddr_t physaddr;
56 1.31 bouyer usb_dma_t dma; /* QH's DMA infos */
57 1.31 bouyer int offs; /* QH's offset in usb_dma_t */
58 1.15 augustss int islot;
59 1.7 augustss } ehci_soft_qh_t;
60 1.7 augustss #define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN)
61 1.7 augustss #define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE)
62 1.7 augustss
63 1.32 jmcneill typedef struct ehci_soft_itd {
64 1.32 jmcneill ehci_itd_t itd;
65 1.32 jmcneill union {
66 1.32 jmcneill struct {
67 1.32 jmcneill /* soft_itds links in a periodic frame*/
68 1.32 jmcneill struct ehci_soft_itd *next;
69 1.32 jmcneill struct ehci_soft_itd *prev;
70 1.32 jmcneill } frame_list;
71 1.32 jmcneill /* circular list of free itds */
72 1.32 jmcneill LIST_ENTRY(ehci_soft_itd) free_list;
73 1.32 jmcneill } u;
74 1.32 jmcneill struct ehci_soft_itd *xfer_next; /* Next soft_itd in xfer */
75 1.32 jmcneill ehci_physaddr_t physaddr;
76 1.32 jmcneill usb_dma_t dma;
77 1.32 jmcneill int offs;
78 1.32 jmcneill int slot;
79 1.32 jmcneill struct timeval t; /* store free time */
80 1.32 jmcneill } ehci_soft_itd_t;
81 1.32 jmcneill #define EHCI_ITD_SIZE ((sizeof(struct ehci_soft_itd) + EHCI_QH_ALIGN - 1) / EHCI_ITD_ALIGN * EHCI_ITD_ALIGN)
82 1.32 jmcneill #define EHCI_ITD_CHUNK (EHCI_PAGE_SIZE / EHCI_ITD_SIZE)
83 1.32 jmcneill
84 1.11 augustss struct ehci_xfer {
85 1.11 augustss struct usbd_xfer xfer;
86 1.11 augustss struct usb_task abort_task;
87 1.33 jmcneill TAILQ_ENTRY(ehci_xfer) inext; /* list of active xfers */
88 1.11 augustss ehci_soft_qtd_t *sqtdstart;
89 1.11 augustss ehci_soft_qtd_t *sqtdend;
90 1.32 jmcneill ehci_soft_itd_t *itdstart;
91 1.32 jmcneill ehci_soft_itd_t *itdend;
92 1.32 jmcneill u_int isoc_len;
93 1.22 chs int isdone; /* used only when DIAGNOSTIC is defined */
94 1.11 augustss };
95 1.11 augustss #define EXFER(xfer) ((struct ehci_xfer *)(xfer))
96 1.11 augustss
97 1.15 augustss /* Information about an entry in the interrupt list. */
98 1.15 augustss struct ehci_soft_islot {
99 1.15 augustss ehci_soft_qh_t *sqh; /* Queue Head. */
100 1.15 augustss };
101 1.15 augustss
102 1.15 augustss #define EHCI_FRAMELIST_MAXCOUNT 1024
103 1.15 augustss #define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 .. 128) */
104 1.15 augustss #define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1)
105 1.18 augustss #define EHCI_MAX_POLLRATE (1 << (EHCI_IPOLLRATES - 1))
106 1.15 augustss #define EHCI_IQHIDX(lev, pos) \
107 1.15 augustss ((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1)
108 1.15 augustss #define EHCI_ILEV_IVAL(lev) (1 << (lev))
109 1.15 augustss
110 1.7 augustss
111 1.7 augustss #define EHCI_HASH_SIZE 128
112 1.3 augustss #define EHCI_COMPANION_MAX 8
113 1.7 augustss
114 1.32 jmcneill #define EHCI_FREE_LIST_INTERVAL 100
115 1.32 jmcneill
116 1.1 augustss typedef struct ehci_softc {
117 1.29 drochner device_t sc_dev;
118 1.40 mrg kmutex_t sc_lock;
119 1.40 mrg kmutex_t sc_intr_lock;
120 1.40 mrg kcondvar_t sc_doorbell;
121 1.40 mrg void *sc_doorbell_si;
122 1.40 mrg void *sc_pcd_si;
123 1.29 drochner struct usbd_bus sc_bus;
124 1.1 augustss bus_space_tag_t iot;
125 1.1 augustss bus_space_handle_t ioh;
126 1.1 augustss bus_size_t sc_size;
127 1.2 augustss u_int sc_offs; /* offset to operational regs */
128 1.23 xtraeme int sc_flags; /* misc flags */
129 1.23 xtraeme #define EHCIF_DROPPED_INTR_WORKAROUND 0x01
130 1.38 matt #define EHCIF_ETTF 0x02 /* Emb. Transaction Translater func. */
131 1.1 augustss
132 1.19 augustss char sc_vendor[32]; /* vendor string for root hub */
133 1.1 augustss int sc_id_vendor; /* vendor ID for root hub */
134 1.1 augustss
135 1.13 augustss u_int32_t sc_cmd; /* shadow of cmd reg during suspend */
136 1.1 augustss
137 1.3 augustss u_int sc_ncomp;
138 1.5 augustss u_int sc_npcomp;
139 1.29 drochner device_t sc_comps[EHCI_COMPANION_MAX];
140 1.3 augustss
141 1.3 augustss usb_dma_t sc_fldma;
142 1.15 augustss ehci_link_t *sc_flist;
143 1.3 augustss u_int sc_flsize;
144 1.15 augustss u_int sc_rand; /* XXX need proper intr scheduling */
145 1.15 augustss
146 1.15 augustss struct ehci_soft_islot sc_islots[EHCI_INTRQHS];
147 1.3 augustss
148 1.32 jmcneill /* jcmm - an array matching sc_flist, but with software pointers,
149 1.32 jmcneill * not hardware address pointers
150 1.32 jmcneill */
151 1.32 jmcneill struct ehci_soft_itd **sc_softitds;
152 1.32 jmcneill
153 1.33 jmcneill TAILQ_HEAD(, ehci_xfer) sc_intrhead;
154 1.11 augustss
155 1.7 augustss ehci_soft_qh_t *sc_freeqhs;
156 1.7 augustss ehci_soft_qtd_t *sc_freeqtds;
157 1.32 jmcneill LIST_HEAD(sc_freeitds, ehci_soft_itd) sc_freeitds;
158 1.7 augustss
159 1.4 augustss int sc_noport;
160 1.21 augustss u_int8_t sc_hasppc; /* has Port Power Control */
161 1.4 augustss u_int8_t sc_addr; /* device address */
162 1.4 augustss u_int8_t sc_conf; /* device configuration */
163 1.4 augustss usbd_xfer_handle sc_intrxfer;
164 1.21 augustss char sc_isreset[EHCI_MAX_PORTS];
165 1.12 augustss char sc_softwake;
166 1.40 mrg kcondvar_t sc_softwake_cv;
167 1.5 augustss
168 1.5 augustss u_int32_t sc_eintrs;
169 1.9 augustss ehci_soft_qh_t *sc_async_head;
170 1.4 augustss
171 1.41 christos pool_cache_t sc_xferpool; /* free xfer pool */
172 1.8 augustss
173 1.34 dyoung struct callout sc_tmo_intrlist;
174 1.4 augustss
175 1.34 dyoung device_t sc_child; /* /dev/usb# device */
176 1.4 augustss char sc_dying;
177 1.16 fvdl struct usb_dma_reserve sc_dma_reserve;
178 1.37 kiyohara
179 1.37 kiyohara void (*sc_vendor_init)(struct ehci_softc *);
180 1.37 kiyohara int (*sc_vendor_port_status)(struct ehci_softc *, uint32_t, int);
181 1.1 augustss } ehci_softc_t;
182 1.2 augustss
183 1.3 augustss #define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a))
184 1.3 augustss #define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
185 1.3 augustss #define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a))
186 1.3 augustss #define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x))
187 1.3 augustss #define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x))
188 1.3 augustss #define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x))
189 1.2 augustss #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
190 1.2 augustss #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
191 1.2 augustss #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
192 1.2 augustss #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
193 1.2 augustss #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
194 1.2 augustss #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
195 1.1 augustss
196 1.1 augustss usbd_status ehci_init(ehci_softc_t *);
197 1.1 augustss int ehci_intr(void *);
198 1.1 augustss int ehci_detach(ehci_softc_t *, int);
199 1.27 dyoung int ehci_activate(device_t, enum devact);
200 1.27 dyoung void ehci_childdet(device_t, device_t);
201 1.36 dyoung bool ehci_suspend(device_t, const pmf_qual_t *);
202 1.36 dyoung bool ehci_resume(device_t, const pmf_qual_t *);
203 1.28 dyoung bool ehci_shutdown(device_t, int);
204 1.41 christos
205 1.41 christos #endif /* _EHCIVAR_H_ */
206