ehcivar.h revision 1.42.14.22
1 /* $NetBSD: ehcivar.h,v 1.42.14.22 2016/01/10 16:49:29 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _EHCIVAR_H_ 33 #define _EHCIVAR_H_ 34 35 #include <sys/pool.h> 36 37 typedef struct ehci_soft_qtd { 38 ehci_qtd_t qtd; 39 struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */ 40 ehci_physaddr_t physaddr; /* qTD's physical address */ 41 usb_dma_t dma; /* qTD's DMA infos */ 42 int offs; /* qTD's offset in usb_dma_t */ 43 struct usbd_xfer *xfer; /* xfer back pointer */ 44 size_t bufoff; /* Offset into xfer buffer */ 45 uint16_t len; 46 uint16_t tdlen; 47 } ehci_soft_qtd_t; 48 #define EHCI_SQTD_ALIGN MAX(EHCI_QTD_ALIGN, CACHE_LINE_SIZE) 49 #define EHCI_SQTD_SIZE ((sizeof(struct ehci_soft_qtd) + EHCI_SQTD_ALIGN - 1) & -EHCI_SQTD_ALIGN) 50 #define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE) 51 52 typedef struct ehci_soft_qh { 53 ehci_qh_t qh; 54 struct ehci_soft_qh *next; 55 struct ehci_soft_qtd *sqtd; 56 ehci_physaddr_t physaddr; 57 usb_dma_t dma; /* QH's DMA infos */ 58 int offs; /* QH's offset in usb_dma_t */ 59 int islot; 60 } ehci_soft_qh_t; 61 #define EHCI_SQH_SIZE ((sizeof(struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN) 62 #define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE) 63 64 typedef struct ehci_soft_itd { 65 union { 66 ehci_itd_t itd; 67 ehci_sitd_t sitd; 68 }; 69 union { 70 struct { 71 /* soft_itds links in a periodic frame */ 72 struct ehci_soft_itd *next; 73 struct ehci_soft_itd *prev; 74 } frame_list; 75 /* circular list of free itds */ 76 LIST_ENTRY(ehci_soft_itd) free_list; 77 }; 78 struct ehci_soft_itd *xfer_next; /* Next soft_itd in xfer */ 79 ehci_physaddr_t physaddr; 80 usb_dma_t dma; 81 int offs; 82 int slot; 83 struct timeval t; /* store free time */ 84 } ehci_soft_itd_t; 85 #define EHCI_ITD_SIZE ((sizeof(struct ehci_soft_itd) + EHCI_QH_ALIGN - 1) / EHCI_ITD_ALIGN * EHCI_ITD_ALIGN) 86 #define EHCI_ITD_CHUNK (EHCI_PAGE_SIZE / EHCI_ITD_SIZE) 87 88 #define ehci_soft_sitd_t ehci_soft_itd_t 89 #define ehci_soft_sitd ehci_soft_itd 90 #define sc_softsitds sc_softitds 91 #define EHCI_SITD_SIZE ((sizeof(struct ehci_soft_sitd) + EHCI_QH_ALIGN - 1) / EHCI_SITD_ALIGN * EHCI_SITD_ALIGN) 92 #define EHCI_SITD_CHUNK (EHCI_PAGE_SIZE / EHCI_SITD_SIZE) 93 94 struct ehci_xfer { 95 struct usbd_xfer ex_xfer; 96 struct usb_task ex_aborttask; 97 TAILQ_ENTRY(ehci_xfer) ex_next; /* list of active xfers */ 98 enum { 99 EX_NONE, 100 EX_CTRL, 101 EX_BULK, 102 EX_INTR, 103 EX_ISOC, 104 EX_FS_ISOC 105 } ex_type; 106 union { 107 /* ctrl/bulk/intr */ 108 struct { 109 ehci_soft_qtd_t **ex_sqtds; 110 size_t ex_nsqtd; 111 }; 112 /* isoc */ 113 bool ex_isrunning; 114 }; 115 union { 116 /* ctrl */ 117 struct { 118 ehci_soft_qtd_t *ex_setup; 119 ehci_soft_qtd_t *ex_data; 120 ehci_soft_qtd_t *ex_status; 121 }; 122 /* bulk/intr */ 123 struct { 124 ehci_soft_qtd_t *ex_sqtdstart; 125 ehci_soft_qtd_t *ex_sqtdend; 126 }; 127 /* isoc */ 128 struct { 129 ehci_soft_itd_t *ex_itdstart; 130 ehci_soft_itd_t *ex_itdend; 131 }; 132 /* split (aka fs) isoc */ 133 struct { 134 ehci_soft_sitd_t *ex_sitdstart; 135 ehci_soft_sitd_t *ex_sitdend; 136 }; 137 }; 138 bool ex_isdone; /* used only when DIAGNOSTIC is defined */ 139 }; 140 141 #define EHCI_BUS2SC(bus) ((bus)->ub_hcpriv) 142 #define EHCI_PIPE2SC(pipe) EHCI_BUS2SC((pipe)->up_dev->ud_bus) 143 #define EHCI_XFER2SC(xfer) EHCI_BUS2SC((xfer)->ux_bus) 144 #define EHCI_EPIPE2SC(epipe) EHCI_BUS2SC((epipe)->pipe.up_dev->ud_bus) 145 146 #define EHCI_XFER2EXFER(xfer) ((struct ehci_xfer *)(xfer)) 147 148 #define EHCI_XFER2EPIPE(xfer) ((struct ehci_pipe *)((xfer)->ux_pipe)) 149 #define EHCI_PIPE2EPIPE(pipe) ((struct ehci_pipe *)(pipe)) 150 151 /* Information about an entry in the interrupt list. */ 152 struct ehci_soft_islot { 153 ehci_soft_qh_t *sqh; /* Queue Head. */ 154 }; 155 156 #define EHCI_FRAMELIST_MAXCOUNT 1024 157 #define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 .. 128) */ 158 #define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1) 159 #define EHCI_MAX_POLLRATE (1 << (EHCI_IPOLLRATES - 1)) 160 #define EHCI_IQHIDX(lev, pos) \ 161 ((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1) 162 #define EHCI_ILEV_IVAL(lev) (1 << (lev)) 163 164 165 #define EHCI_HASH_SIZE 128 166 #define EHCI_COMPANION_MAX 8 167 168 #define EHCI_FREE_LIST_INTERVAL 100 169 170 typedef struct ehci_softc { 171 device_t sc_dev; 172 kmutex_t sc_lock; 173 kmutex_t sc_intr_lock; 174 kcondvar_t sc_doorbell; 175 void *sc_doorbell_si; 176 void *sc_pcd_si; 177 struct usbd_bus sc_bus; 178 bus_space_tag_t iot; 179 bus_space_handle_t ioh; 180 bus_size_t sc_size; 181 u_int sc_offs; /* offset to operational regs */ 182 int sc_flags; /* misc flags */ 183 #define EHCIF_DROPPED_INTR_WORKAROUND 0x01 184 #define EHCIF_ETTF 0x02 /* Emb. Transaction Translater func. */ 185 186 char sc_vendor[32]; /* vendor string for root hub */ 187 int sc_id_vendor; /* vendor ID for root hub */ 188 189 uint32_t sc_cmd; /* shadow of cmd reg during suspend */ 190 191 u_int sc_ncomp; 192 u_int sc_npcomp; 193 device_t sc_comps[EHCI_COMPANION_MAX]; 194 195 usb_dma_t sc_fldma; 196 ehci_link_t *sc_flist; 197 u_int sc_flsize; 198 u_int sc_rand; /* XXX need proper intr scheduling */ 199 200 struct ehci_soft_islot sc_islots[EHCI_INTRQHS]; 201 202 /* 203 * an array matching sc_flist, but with software pointers, 204 * not hardware address pointers 205 */ 206 struct ehci_soft_itd **sc_softitds; 207 208 TAILQ_HEAD(, ehci_xfer) sc_intrhead; 209 210 ehci_soft_qh_t *sc_freeqhs; 211 ehci_soft_qtd_t *sc_freeqtds; 212 LIST_HEAD(sc_freeitds, ehci_soft_itd) sc_freeitds; 213 LIST_HEAD(sc_freesitds, ehci_soft_sitd) sc_freesitds; 214 215 int sc_noport; 216 uint8_t sc_hasppc; /* has Port Power Control */ 217 struct usbd_xfer *sc_intrxfer; 218 char sc_isreset[EHCI_MAX_PORTS]; 219 char sc_softwake; 220 kcondvar_t sc_softwake_cv; 221 222 uint32_t sc_eintrs; 223 ehci_soft_qh_t *sc_async_head; 224 225 pool_cache_t sc_xferpool; /* free xfer pool */ 226 227 struct callout sc_tmo_intrlist; 228 229 device_t sc_child; /* /dev/usb# device */ 230 char sc_dying; 231 232 void (*sc_vendor_init)(struct ehci_softc *); 233 int (*sc_vendor_port_status)(struct ehci_softc *, uint32_t, int); 234 } ehci_softc_t; 235 236 #define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a)) 237 #define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a)) 238 #define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a)) 239 #define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x)) 240 #define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x)) 241 #define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x)) 242 #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 243 #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 244 #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 245 #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 246 #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 247 #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 248 249 int ehci_init(ehci_softc_t *); 250 int ehci_intr(void *); 251 int ehci_detach(ehci_softc_t *, int); 252 int ehci_activate(device_t, enum devact); 253 void ehci_childdet(device_t, device_t); 254 bool ehci_suspend(device_t, const pmf_qual_t *); 255 bool ehci_resume(device_t, const pmf_qual_t *); 256 bool ehci_shutdown(device_t, int); 257 258 #endif /* _EHCIVAR_H_ */ 259
Indexes created Sun Oct 12 09:09:55 GMT 2025