if_axe.c revision 1.35 1 1.35 pgoyette /* $NetBSD: if_axe.c,v 1.35 2010/06/23 19:00:26 pgoyette Exp $ */
2 1.35 pgoyette /* $OpenBSD: if_axe.c,v 1.96 2010/01/09 05:33:08 jsg Exp $ */
3 1.35 pgoyette
4 1.35 pgoyette /*
5 1.35 pgoyette * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg (at) openbsd.org>
6 1.35 pgoyette *
7 1.35 pgoyette * Permission to use, copy, modify, and distribute this software for any
8 1.35 pgoyette * purpose with or without fee is hereby granted, provided that the above
9 1.35 pgoyette * copyright notice and this permission notice appear in all copies.
10 1.35 pgoyette *
11 1.35 pgoyette * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.35 pgoyette * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.35 pgoyette * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.35 pgoyette * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.35 pgoyette * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.35 pgoyette * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.35 pgoyette * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.35 pgoyette */
19 1.1 augustss
20 1.1 augustss /*
21 1.1 augustss * Copyright (c) 1997, 1998, 1999, 2000-2003
22 1.1 augustss * Bill Paul <wpaul (at) windriver.com>. All rights reserved.
23 1.1 augustss *
24 1.1 augustss * Redistribution and use in source and binary forms, with or without
25 1.1 augustss * modification, are permitted provided that the following conditions
26 1.1 augustss * are met:
27 1.1 augustss * 1. Redistributions of source code must retain the above copyright
28 1.1 augustss * notice, this list of conditions and the following disclaimer.
29 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
30 1.1 augustss * notice, this list of conditions and the following disclaimer in the
31 1.1 augustss * documentation and/or other materials provided with the distribution.
32 1.1 augustss * 3. All advertising materials mentioning features or use of this software
33 1.1 augustss * must display the following acknowledgement:
34 1.1 augustss * This product includes software developed by Bill Paul.
35 1.1 augustss * 4. Neither the name of the author nor the names of any co-contributors
36 1.1 augustss * may be used to endorse or promote products derived from this software
37 1.1 augustss * without specific prior written permission.
38 1.1 augustss *
39 1.1 augustss * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
40 1.1 augustss * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
41 1.1 augustss * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
42 1.1 augustss * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
43 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
44 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
45 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
46 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
48 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
49 1.1 augustss * THE POSSIBILITY OF SUCH DAMAGE.
50 1.1 augustss */
51 1.1 augustss
52 1.1 augustss /*
53 1.1 augustss * ASIX Electronics AX88172 USB 2.0 ethernet driver. Used in the
54 1.1 augustss * LinkSys USB200M and various other adapters.
55 1.1 augustss *
56 1.1 augustss * Manuals available from:
57 1.1 augustss * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF
58 1.1 augustss * Note: you need the manual for the AX88170 chip (USB 1.x ethernet
59 1.1 augustss * controller) to find the definitions for the RX control register.
60 1.1 augustss * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF
61 1.1 augustss *
62 1.1 augustss * Written by Bill Paul <wpaul (at) windriver.com>
63 1.1 augustss * Senior Engineer
64 1.1 augustss * Wind River Systems
65 1.1 augustss */
66 1.1 augustss
67 1.1 augustss /*
68 1.1 augustss * The AX88172 provides USB ethernet supports at 10 and 100Mbps.
69 1.1 augustss * It uses an external PHY (reference designs use a RealTek chip),
70 1.1 augustss * and has a 64-bit multicast hash filter. There is some information
71 1.1 augustss * missing from the manual which one needs to know in order to make
72 1.1 augustss * the chip function:
73 1.1 augustss *
74 1.1 augustss * - You must set bit 7 in the RX control register, otherwise the
75 1.1 augustss * chip won't receive any packets.
76 1.1 augustss * - You must initialize all 3 IPG registers, or you won't be able
77 1.1 augustss * to send any packets.
78 1.1 augustss *
79 1.1 augustss * Note that this device appears to only support loading the station
80 1.1 augustss * address via autload from the EEPROM (i.e. there's no way to manaully
81 1.1 augustss * set it).
82 1.1 augustss *
83 1.1 augustss * (Adam Weinberger wanted me to name this driver if_gir.c.)
84 1.1 augustss */
85 1.1 augustss
86 1.1 augustss /*
87 1.1 augustss * Ported to OpenBSD 3/28/2004 by Greg Taleck <taleck (at) oz.net>
88 1.1 augustss * with bits and pieces from the aue and url drivers.
89 1.1 augustss */
90 1.1 augustss
91 1.1 augustss #include <sys/cdefs.h>
92 1.35 pgoyette __KERNEL_RCSID(0, "$NetBSD: if_axe.c,v 1.35 2010/06/23 19:00:26 pgoyette Exp $");
93 1.1 augustss
94 1.1 augustss #if defined(__NetBSD__)
95 1.1 augustss #include "opt_inet.h"
96 1.1 augustss #include "rnd.h"
97 1.1 augustss #endif
98 1.1 augustss
99 1.1 augustss
100 1.1 augustss #include <sys/param.h>
101 1.35 pgoyette #include <sys/bus.h>
102 1.35 pgoyette #include <sys/device.h>
103 1.35 pgoyette #include <sys/kernel.h>
104 1.35 pgoyette #include <sys/mbuf.h>
105 1.21 ad #include <sys/mutex.h>
106 1.1 augustss #include <sys/socket.h>
107 1.35 pgoyette #include <sys/sockio.h>
108 1.35 pgoyette #include <sys/systm.h>
109 1.1 augustss
110 1.1 augustss #if NRND > 0
111 1.1 augustss #include <sys/rnd.h>
112 1.1 augustss #endif
113 1.1 augustss
114 1.1 augustss #include <net/if.h>
115 1.1 augustss #include <net/if_dl.h>
116 1.35 pgoyette #include <net/if_ether.h>
117 1.1 augustss #include <net/if_media.h>
118 1.1 augustss
119 1.1 augustss #include <net/bpf.h>
120 1.1 augustss
121 1.1 augustss #include <dev/mii/mii.h>
122 1.1 augustss #include <dev/mii/miivar.h>
123 1.1 augustss
124 1.1 augustss #include <dev/usb/usb.h>
125 1.1 augustss #include <dev/usb/usbdi.h>
126 1.1 augustss #include <dev/usb/usbdi_util.h>
127 1.35 pgoyette #include <dev/usb/usbdivar.h>
128 1.1 augustss #include <dev/usb/usbdevs.h>
129 1.1 augustss
130 1.1 augustss #include <dev/usb/if_axereg.h>
131 1.1 augustss
132 1.35 pgoyette #ifdef AXE_DEBUG
133 1.1 augustss #define DPRINTF(x) do { if (axedebug) logprintf x; } while (0)
134 1.1 augustss #define DPRINTFN(n,x) do { if (axedebug >= (n)) logprintf x; } while (0)
135 1.1 augustss int axedebug = 0;
136 1.1 augustss #else
137 1.1 augustss #define DPRINTF(x)
138 1.1 augustss #define DPRINTFN(n,x)
139 1.1 augustss #endif
140 1.1 augustss
141 1.1 augustss /*
142 1.1 augustss * Various supported device vendors/products.
143 1.1 augustss */
144 1.35 pgoyette static const struct axe_type axe_devs[] = {
145 1.35 pgoyette { { USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UFE2000}, 0 },
146 1.35 pgoyette { { USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2}, 0 },
147 1.35 pgoyette { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET }, AX772 },
148 1.1 augustss { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172}, 0 },
149 1.35 pgoyette { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772}, AX772 },
150 1.35 pgoyette { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772A}, AX772 },
151 1.35 pgoyette { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178}, AX178 },
152 1.35 pgoyette { { USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T}, 0 },
153 1.35 pgoyette { { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055 }, AX178 },
154 1.35 pgoyette { { USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR}, 0},
155 1.35 pgoyette { { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2}, AX772 },
156 1.1 augustss { { USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX }, 0},
157 1.1 augustss { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100}, 0 },
158 1.35 pgoyette { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1 }, AX772 },
159 1.35 pgoyette { { USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E}, 0 },
160 1.35 pgoyette { { USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2 }, AX178 },
161 1.35 pgoyette { { USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1}, 0 },
162 1.1 augustss { { USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M}, 0 },
163 1.35 pgoyette { { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000 }, AX178 },
164 1.35 pgoyette { { USB_VENDOR_LOGITEC, USB_PRODUCT_LOGITEC_LAN_GTJU2}, AX178 },
165 1.35 pgoyette { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2GT}, AX178 },
166 1.2 augustss { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX}, 0 },
167 1.35 pgoyette { { USB_VENDOR_MSI, USB_PRODUCT_MSI_AX88772A}, AX772 },
168 1.1 augustss { { USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120}, 0 },
169 1.35 pgoyette { { USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS }, AX772 },
170 1.35 pgoyette { { USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T }, AX178 },
171 1.35 pgoyette { { USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL}, 0 },
172 1.1 augustss { { USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029}, 0 },
173 1.35 pgoyette { { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028 }, AX178 }
174 1.1 augustss };
175 1.9 christos #define axe_lookup(v, p) ((const struct axe_type *)usb_lookup(axe_devs, v, p))
176 1.1 augustss
177 1.35 pgoyette int axe_match(device_t, cfdata_t, void *);
178 1.35 pgoyette void axe_attach(device_t, device_t, void *);
179 1.35 pgoyette int axe_detach(device_t, int);
180 1.35 pgoyette int axe_activate(device_t, devact_t);
181 1.35 pgoyette
182 1.35 pgoyette CFATTACH_DECL_NEW(axe, sizeof(struct axe_softc),
183 1.35 pgoyette axe_match, axe_attach, axe_detach, axe_activate);
184 1.35 pgoyette
185 1.35 pgoyette static int axe_tx_list_init(struct axe_softc *);
186 1.35 pgoyette static int axe_rx_list_init(struct axe_softc *);
187 1.35 pgoyette static int axe_newbuf(struct axe_softc *, struct axe_chain *,
188 1.35 pgoyette struct mbuf *);
189 1.35 pgoyette static int axe_encap(struct axe_softc *, struct mbuf *, int);
190 1.35 pgoyette static void axe_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
191 1.35 pgoyette static void axe_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
192 1.35 pgoyette static void axe_tick(void *);
193 1.35 pgoyette static void axe_tick_task(void *);
194 1.35 pgoyette static void axe_start(struct ifnet *);
195 1.35 pgoyette static int axe_ioctl(struct ifnet *, u_long, void *);
196 1.35 pgoyette static int axe_init(struct ifnet *);
197 1.35 pgoyette static void axe_stop(struct ifnet *, int);
198 1.35 pgoyette static void axe_watchdog(struct ifnet *);
199 1.35 pgoyette static int axe_miibus_readreg(device_t, int, int);
200 1.35 pgoyette static void axe_miibus_writereg(device_t, int, int, int);
201 1.35 pgoyette static void axe_miibus_statchg(device_t);
202 1.35 pgoyette static int axe_cmd(struct axe_softc *, int, int, int, void *);
203 1.35 pgoyette static void axe_reset(struct axe_softc *sc);
204 1.35 pgoyette static int axe_ifmedia_upd(struct ifnet *);
205 1.35 pgoyette static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
206 1.35 pgoyette
207 1.35 pgoyette static void axe_setmulti(struct axe_softc *);
208 1.35 pgoyette static void axe_lock_mii(struct axe_softc *sc);
209 1.35 pgoyette static void axe_unlock_mii(struct axe_softc *sc);
210 1.35 pgoyette
211 1.35 pgoyette static void axe_ax88178_init(struct axe_softc *);
212 1.35 pgoyette static void axe_ax88772_init(struct axe_softc *);
213 1.1 augustss
214 1.1 augustss /* Get exclusive access to the MII registers */
215 1.35 pgoyette static void
216 1.1 augustss axe_lock_mii(struct axe_softc *sc)
217 1.1 augustss {
218 1.1 augustss sc->axe_refcnt++;
219 1.21 ad mutex_enter(&sc->axe_mii_lock);
220 1.1 augustss }
221 1.1 augustss
222 1.35 pgoyette static void
223 1.1 augustss axe_unlock_mii(struct axe_softc *sc)
224 1.1 augustss {
225 1.21 ad mutex_exit(&sc->axe_mii_lock);
226 1.1 augustss if (--sc->axe_refcnt < 0)
227 1.28 dyoung usb_detach_wakeup((sc->axe_dev));
228 1.1 augustss }
229 1.1 augustss
230 1.35 pgoyette static int
231 1.1 augustss axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
232 1.1 augustss {
233 1.1 augustss usb_device_request_t req;
234 1.1 augustss usbd_status err;
235 1.1 augustss
236 1.21 ad KASSERT(mutex_owned(&sc->axe_mii_lock));
237 1.21 ad
238 1.1 augustss if (sc->axe_dying)
239 1.35 pgoyette return 0;
240 1.1 augustss
241 1.1 augustss if (AXE_CMD_DIR(cmd))
242 1.1 augustss req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
243 1.1 augustss else
244 1.1 augustss req.bmRequestType = UT_READ_VENDOR_DEVICE;
245 1.1 augustss req.bRequest = AXE_CMD_CMD(cmd);
246 1.1 augustss USETW(req.wValue, val);
247 1.1 augustss USETW(req.wIndex, index);
248 1.1 augustss USETW(req.wLength, AXE_CMD_LEN(cmd));
249 1.1 augustss
250 1.1 augustss err = usbd_do_request(sc->axe_udev, &req, buf);
251 1.1 augustss
252 1.35 pgoyette if (err) {
253 1.35 pgoyette DPRINTF(("axe_cmd err: cmd %d err %d\n", cmd, err));
254 1.35 pgoyette return -1;
255 1.35 pgoyette }
256 1.35 pgoyette return 0;
257 1.1 augustss }
258 1.1 augustss
259 1.35 pgoyette static int
260 1.27 dyoung axe_miibus_readreg(device_t dev, int phy, int reg)
261 1.1 augustss {
262 1.28 dyoung struct axe_softc *sc = device_private(dev);
263 1.1 augustss usbd_status err;
264 1.1 augustss u_int16_t val;
265 1.1 augustss
266 1.1 augustss if (sc->axe_dying) {
267 1.1 augustss DPRINTF(("axe: dying\n"));
268 1.35 pgoyette return 0;
269 1.1 augustss }
270 1.1 augustss
271 1.1 augustss /*
272 1.1 augustss * The chip tells us the MII address of any supported
273 1.1 augustss * PHYs attached to the chip, so only read from those.
274 1.35 pgoyette *
275 1.35 pgoyette * But if the chip lies about its PHYs, read from any.
276 1.1 augustss */
277 1.35 pgoyette val = 0;
278 1.1 augustss
279 1.35 pgoyette if ((phy == sc->axe_phyaddrs[0]) || (phy == sc->axe_phyaddrs[1]) ||
280 1.35 pgoyette (sc->axe_flags & AXE_ANY_PHY)) {
281 1.35 pgoyette axe_lock_mii(sc);
282 1.35 pgoyette axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
283 1.35 pgoyette err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, (void *)&val);
284 1.35 pgoyette axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
285 1.35 pgoyette axe_unlock_mii(sc);
286 1.1 augustss
287 1.35 pgoyette if (err) {
288 1.35 pgoyette aprint_error_dev(sc->axe_dev, "read PHY failed\n");
289 1.35 pgoyette return -1;
290 1.35 pgoyette }
291 1.35 pgoyette DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x val 0x%x\n",
292 1.35 pgoyette phy, reg, val));
293 1.1 augustss
294 1.35 pgoyette if (val && val != 0xffff)
295 1.35 pgoyette sc->axe_phyaddrs[0] = phy;
296 1.35 pgoyette } else {
297 1.35 pgoyette DPRINTF(("axe_miibus_readreg: ignore read from phy 0x%x\n",
298 1.35 pgoyette phy));
299 1.1 augustss }
300 1.10 tron return (le16toh(val));
301 1.1 augustss }
302 1.1 augustss
303 1.35 pgoyette static void
304 1.27 dyoung axe_miibus_writereg(device_t dev, int phy, int reg, int aval)
305 1.1 augustss {
306 1.35 pgoyette struct axe_softc *sc = device_private(dev);
307 1.1 augustss usbd_status err;
308 1.11 augustss u_int16_t val;
309 1.1 augustss
310 1.1 augustss if (sc->axe_dying)
311 1.1 augustss return;
312 1.1 augustss
313 1.11 augustss val = htole16(aval);
314 1.5 augustss axe_lock_mii(sc);
315 1.1 augustss axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
316 1.1 augustss err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, (void *)&val);
317 1.1 augustss axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
318 1.5 augustss axe_unlock_mii(sc);
319 1.1 augustss
320 1.1 augustss if (err) {
321 1.25 cube aprint_error_dev(sc->axe_dev, "write PHY failed\n");
322 1.1 augustss return;
323 1.1 augustss }
324 1.1 augustss }
325 1.1 augustss
326 1.35 pgoyette static void
327 1.27 dyoung axe_miibus_statchg(device_t dev)
328 1.1 augustss {
329 1.28 dyoung struct axe_softc *sc = device_private(dev);
330 1.35 pgoyette struct mii_data *mii = &sc->axe_mii;
331 1.5 augustss int val, err;
332 1.5 augustss
333 1.5 augustss if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
334 1.5 augustss val = AXE_MEDIA_FULL_DUPLEX;
335 1.5 augustss else
336 1.5 augustss val = 0;
337 1.35 pgoyette
338 1.35 pgoyette if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
339 1.35 pgoyette val |= (AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC);
340 1.35 pgoyette
341 1.35 pgoyette switch (IFM_SUBTYPE(mii->mii_media_active)) {
342 1.35 pgoyette case IFM_1000_T:
343 1.35 pgoyette val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
344 1.35 pgoyette break;
345 1.35 pgoyette case IFM_100_TX:
346 1.35 pgoyette val |= AXE_178_MEDIA_100TX;
347 1.35 pgoyette break;
348 1.35 pgoyette case IFM_10_T:
349 1.35 pgoyette /* doesn't need to be handled */
350 1.35 pgoyette break;
351 1.35 pgoyette }
352 1.35 pgoyette }
353 1.35 pgoyette
354 1.5 augustss DPRINTF(("axe_miibus_statchg: val=0x%x\n", val));
355 1.21 ad axe_lock_mii(sc);
356 1.5 augustss err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
357 1.21 ad axe_unlock_mii(sc);
358 1.5 augustss if (err) {
359 1.25 cube aprint_error_dev(sc->axe_dev, "media change failed\n");
360 1.5 augustss return;
361 1.5 augustss }
362 1.1 augustss }
363 1.1 augustss
364 1.35 pgoyette /*
365 1.35 pgoyette * Set media options
366 1.35 pgoyette */
367 1.35 pgoyette static int
368 1.35 pgoyette axe_ifmedia_upd(struct ifnet *ifp)
369 1.35 pgoyette {
370 1.35 pgoyette struct axe_softc *sc = ifp->if_softc;
371 1.35 pgoyette struct mii_data *mii = &sc->axe_mii;
372 1.35 pgoyette int rc;
373 1.35 pgoyette
374 1.35 pgoyette sc->axe_link = 0;
375 1.35 pgoyette
376 1.35 pgoyette if (mii->mii_instance) {
377 1.35 pgoyette struct mii_softc *miisc;
378 1.35 pgoyette
379 1.35 pgoyette LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
380 1.35 pgoyette mii_phy_reset(miisc);
381 1.35 pgoyette }
382 1.35 pgoyette
383 1.35 pgoyette if ((rc = mii_mediachg(mii)) == ENXIO)
384 1.35 pgoyette return 0;
385 1.35 pgoyette return rc;
386 1.35 pgoyette }
387 1.35 pgoyette
388 1.35 pgoyette /*
389 1.35 pgoyette * Report current media status
390 1.35 pgoyette */
391 1.35 pgoyette static void
392 1.35 pgoyette axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
393 1.35 pgoyette {
394 1.35 pgoyette struct axe_softc *sc = ifp->if_softc;
395 1.35 pgoyette struct mii_data *mii = &sc->axe_mii;
396 1.35 pgoyette
397 1.35 pgoyette mii_pollstat(mii);
398 1.35 pgoyette ifmr->ifm_active = mii->mii_media_active;
399 1.35 pgoyette ifmr->ifm_status = mii->mii_media_status;
400 1.35 pgoyette }
401 1.35 pgoyette
402 1.35 pgoyette static void
403 1.1 augustss axe_setmulti(struct axe_softc *sc)
404 1.1 augustss {
405 1.35 pgoyette struct ifnet *ifp = &sc->sc_if;
406 1.35 pgoyette struct ether_multi *enm;
407 1.35 pgoyette struct ether_multistep step;
408 1.1 augustss u_int32_t h = 0;
409 1.1 augustss u_int16_t rxmode;
410 1.1 augustss u_int8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
411 1.1 augustss
412 1.1 augustss if (sc->axe_dying)
413 1.1 augustss return;
414 1.1 augustss
415 1.21 ad axe_lock_mii(sc);
416 1.1 augustss axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, (void *)&rxmode);
417 1.10 tron rxmode = le16toh(rxmode);
418 1.1 augustss
419 1.35 pgoyette rxmode &= ~(AXE_RXCMD_ALLMULTI | AXE_RXCMD_PROMISC);
420 1.35 pgoyette
421 1.35 pgoyette /* If we want promiscuous mode, set the allframes bit */
422 1.35 pgoyette if (ifp->if_flags & IFF_PROMISC) {
423 1.35 pgoyette rxmode |= AXE_RXCMD_PROMISC;
424 1.35 pgoyette goto allmulti;
425 1.35 pgoyette }
426 1.1 augustss
427 1.35 pgoyette /* Now program new ones */
428 1.1 augustss ETHER_FIRST_MULTI(step, &sc->axe_ec, enm);
429 1.1 augustss while (enm != NULL) {
430 1.1 augustss if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
431 1.1 augustss ETHER_ADDR_LEN) != 0)
432 1.1 augustss goto allmulti;
433 1.1 augustss
434 1.1 augustss h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26;
435 1.35 pgoyette hashtbl[h >> 3] |= 1U << (h & 7);
436 1.1 augustss ETHER_NEXT_MULTI(step, enm);
437 1.1 augustss }
438 1.1 augustss ifp->if_flags &= ~IFF_ALLMULTI;
439 1.1 augustss axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
440 1.1 augustss axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
441 1.21 ad axe_unlock_mii(sc);
442 1.1 augustss return;
443 1.35 pgoyette
444 1.35 pgoyette allmulti:
445 1.35 pgoyette ifp->if_flags |= IFF_ALLMULTI;
446 1.35 pgoyette rxmode |= AXE_RXCMD_ALLMULTI;
447 1.35 pgoyette axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
448 1.35 pgoyette axe_unlock_mii(sc);
449 1.35 pgoyette return;
450 1.1 augustss }
451 1.1 augustss
452 1.35 pgoyette static void
453 1.1 augustss axe_reset(struct axe_softc *sc)
454 1.1 augustss {
455 1.1 augustss if (sc->axe_dying)
456 1.1 augustss return;
457 1.1 augustss /* XXX What to reset? */
458 1.1 augustss
459 1.1 augustss /* Wait a little while for the chip to get its brains in order. */
460 1.1 augustss DELAY(1000);
461 1.1 augustss return;
462 1.1 augustss }
463 1.1 augustss
464 1.35 pgoyette static void
465 1.35 pgoyette axe_ax88178_init(struct axe_softc *sc)
466 1.35 pgoyette {
467 1.35 pgoyette int gpio0 = 0, phymode = 0;
468 1.35 pgoyette uint16_t eeprom;
469 1.35 pgoyette
470 1.35 pgoyette axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
471 1.35 pgoyette /* XXX magic */
472 1.35 pgoyette axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
473 1.35 pgoyette axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
474 1.35 pgoyette
475 1.35 pgoyette eeprom = le16toh(eeprom);
476 1.35 pgoyette
477 1.35 pgoyette DPRINTF((" EEPROM is 0x%x\n", eeprom));
478 1.35 pgoyette
479 1.35 pgoyette /* if EEPROM is invalid we have to use to GPIO0 */
480 1.35 pgoyette if (eeprom == 0xffff) {
481 1.35 pgoyette phymode = 0;
482 1.35 pgoyette gpio0 = 1;
483 1.35 pgoyette } else {
484 1.35 pgoyette phymode = eeprom & 7;
485 1.35 pgoyette gpio0 = (eeprom & 0x80) ? 0 : 1;
486 1.35 pgoyette }
487 1.35 pgoyette
488 1.35 pgoyette DPRINTF(("use gpio0: %d, phymode %d\n", gpio0, phymode));
489 1.35 pgoyette
490 1.35 pgoyette axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL);
491 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 40);
492 1.35 pgoyette if ((eeprom >> 8) != 1) {
493 1.35 pgoyette axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
494 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 30);
495 1.35 pgoyette
496 1.35 pgoyette axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL);
497 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 300);
498 1.35 pgoyette
499 1.35 pgoyette axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
500 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 30);
501 1.35 pgoyette } else {
502 1.35 pgoyette DPRINTF(("axe gpio phymode == 1 path\n"));
503 1.35 pgoyette axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL);
504 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 30);
505 1.35 pgoyette axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL);
506 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 30);
507 1.35 pgoyette }
508 1.35 pgoyette
509 1.35 pgoyette /* soft reset */
510 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
511 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 150);
512 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
513 1.35 pgoyette AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL);
514 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 150);
515 1.35 pgoyette /* Enable MII/GMII/RGMII for external PHY */
516 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
517 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 10);
518 1.35 pgoyette axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
519 1.35 pgoyette }
520 1.35 pgoyette
521 1.35 pgoyette static void
522 1.35 pgoyette axe_ax88772_init(struct axe_softc *sc)
523 1.35 pgoyette {
524 1.35 pgoyette
525 1.35 pgoyette axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
526 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 40);
527 1.35 pgoyette
528 1.35 pgoyette if (sc->axe_phyaddrs[1] == AXE_INTPHY) {
529 1.35 pgoyette /* ask for the embedded PHY */
530 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
531 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 10);
532 1.35 pgoyette
533 1.35 pgoyette /* power down and reset state, pin reset state */
534 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
535 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 60);
536 1.35 pgoyette
537 1.35 pgoyette /* power down/reset state, pin operating state */
538 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
539 1.35 pgoyette AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
540 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 150);
541 1.35 pgoyette
542 1.35 pgoyette /* power up, reset */
543 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
544 1.35 pgoyette
545 1.35 pgoyette /* power up, operating */
546 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
547 1.35 pgoyette AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL);
548 1.35 pgoyette } else {
549 1.35 pgoyette /* ask for external PHY */
550 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
551 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 10);
552 1.35 pgoyette
553 1.35 pgoyette /* power down internal PHY */
554 1.35 pgoyette axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
555 1.35 pgoyette AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
556 1.35 pgoyette }
557 1.35 pgoyette
558 1.35 pgoyette usbd_delay_ms(sc->axe_udev, 150);
559 1.35 pgoyette axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
560 1.35 pgoyette }
561 1.35 pgoyette
562 1.1 augustss /*
563 1.1 augustss * Probe for a AX88172 chip.
564 1.1 augustss */
565 1.27 dyoung int
566 1.27 dyoung axe_match(device_t parent, cfdata_t match, void *aux)
567 1.1 augustss {
568 1.27 dyoung struct usb_attach_arg *uaa = aux;
569 1.1 augustss
570 1.7 perry return (axe_lookup(uaa->vendor, uaa->product) != NULL ?
571 1.1 augustss UMATCH_VENDOR_PRODUCT : UMATCH_NONE);
572 1.1 augustss }
573 1.1 augustss
574 1.1 augustss /*
575 1.1 augustss * Attach the interface. Allocate softc structures, do ifmedia
576 1.1 augustss * setup and ethernet/BPF attach.
577 1.1 augustss */
578 1.27 dyoung void
579 1.27 dyoung axe_attach(device_t parent, device_t self, void *aux)
580 1.1 augustss {
581 1.27 dyoung struct axe_softc *sc = device_private(self);
582 1.27 dyoung struct usb_attach_arg *uaa = aux;
583 1.1 augustss usbd_device_handle dev = uaa->device;
584 1.1 augustss usbd_status err;
585 1.1 augustss usb_interface_descriptor_t *id;
586 1.1 augustss usb_endpoint_descriptor_t *ed;
587 1.1 augustss struct mii_data *mii;
588 1.35 pgoyette uint8_t eaddr[ETHER_ADDR_LEN];
589 1.8 augustss char *devinfop;
590 1.25 cube const char *devname = device_xname(self);
591 1.1 augustss struct ifnet *ifp;
592 1.1 augustss int i, s;
593 1.1 augustss
594 1.28 dyoung aprint_naive("\n");
595 1.28 dyoung aprint_normal("\n");
596 1.29 plunky
597 1.35 pgoyette sc->axe_dev = self;
598 1.35 pgoyette sc->axe_udev = dev;
599 1.35 pgoyette
600 1.29 plunky devinfop = usbd_devinfo_alloc(dev, 0);
601 1.29 plunky aprint_normal_dev(self, "%s\n", devinfop);
602 1.29 plunky usbd_devinfo_free(devinfop);
603 1.1 augustss
604 1.1 augustss err = usbd_set_config_no(dev, AXE_CONFIG_NO, 1);
605 1.1 augustss if (err) {
606 1.25 cube aprint_error_dev(self, "getting interface handle failed\n");
607 1.28 dyoung return;
608 1.1 augustss }
609 1.1 augustss
610 1.35 pgoyette sc->axe_flags = axe_lookup(uaa->vendor, uaa->product)->axe_flags;
611 1.35 pgoyette
612 1.35 pgoyette mutex_init(&sc->axe_mii_lock, MUTEX_DEFAULT, IPL_NONE);
613 1.1 augustss usb_init_task(&sc->axe_tick_task, axe_tick_task, sc);
614 1.1 augustss usb_init_task(&sc->axe_stop_task, (void (*)(void *))axe_stop, sc);
615 1.1 augustss
616 1.1 augustss err = usbd_device2interface_handle(dev, AXE_IFACE_IDX, &sc->axe_iface);
617 1.1 augustss if (err) {
618 1.25 cube aprint_error_dev(self, "getting interface handle failed\n");
619 1.28 dyoung return;
620 1.1 augustss }
621 1.1 augustss
622 1.1 augustss sc->axe_product = uaa->product;
623 1.1 augustss sc->axe_vendor = uaa->vendor;
624 1.1 augustss
625 1.1 augustss id = usbd_get_interface_descriptor(sc->axe_iface);
626 1.1 augustss
627 1.35 pgoyette /* decide on what our bufsize will be */
628 1.35 pgoyette if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
629 1.35 pgoyette sc->axe_bufsz = (sc->axe_udev->speed == USB_SPEED_HIGH) ?
630 1.35 pgoyette AXE_178_MAX_BUFSZ : AXE_178_MIN_BUFSZ;
631 1.35 pgoyette else
632 1.35 pgoyette sc->axe_bufsz = AXE_172_BUFSZ;
633 1.35 pgoyette
634 1.1 augustss /* Find endpoints. */
635 1.1 augustss for (i = 0; i < id->bNumEndpoints; i++) {
636 1.1 augustss ed = usbd_interface2endpoint_descriptor(sc->axe_iface, i);
637 1.1 augustss if (!ed) {
638 1.25 cube aprint_error_dev(self, "couldn't get ep %d\n", i);
639 1.28 dyoung return;
640 1.1 augustss }
641 1.1 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
642 1.1 augustss UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
643 1.1 augustss sc->axe_ed[AXE_ENDPT_RX] = ed->bEndpointAddress;
644 1.1 augustss } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
645 1.1 augustss UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
646 1.1 augustss sc->axe_ed[AXE_ENDPT_TX] = ed->bEndpointAddress;
647 1.1 augustss } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
648 1.1 augustss UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
649 1.1 augustss sc->axe_ed[AXE_ENDPT_INTR] = ed->bEndpointAddress;
650 1.1 augustss }
651 1.1 augustss }
652 1.1 augustss
653 1.1 augustss s = splnet();
654 1.1 augustss
655 1.35 pgoyette /* We need the PHYID for init dance in some cases */
656 1.35 pgoyette axe_lock_mii(sc);
657 1.35 pgoyette axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, (void *)&sc->axe_phyaddrs);
658 1.35 pgoyette
659 1.35 pgoyette DPRINTF((" phyaddrs[0]: %x phyaddrs[1]: %x\n",
660 1.35 pgoyette sc->axe_phyaddrs[0], sc->axe_phyaddrs[1]));
661 1.35 pgoyette
662 1.35 pgoyette if (sc->axe_flags & AX178)
663 1.35 pgoyette axe_ax88178_init(sc);
664 1.35 pgoyette else if (sc->axe_flags & AX772)
665 1.35 pgoyette axe_ax88772_init(sc);
666 1.35 pgoyette
667 1.1 augustss /*
668 1.1 augustss * Get station address.
669 1.1 augustss */
670 1.35 pgoyette if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
671 1.35 pgoyette axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, &eaddr);
672 1.35 pgoyette else
673 1.35 pgoyette axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, &eaddr);
674 1.1 augustss
675 1.1 augustss /*
676 1.35 pgoyette * Load IPG values
677 1.1 augustss */
678 1.1 augustss axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, (void *)&sc->axe_ipgs);
679 1.21 ad axe_unlock_mii(sc);
680 1.1 augustss
681 1.1 augustss /*
682 1.1 augustss * An ASIX chip was detected. Inform the world.
683 1.1 augustss */
684 1.35 pgoyette aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(eaddr));
685 1.1 augustss
686 1.1 augustss /* Initialize interface info.*/
687 1.35 pgoyette ifp = &sc->sc_if;
688 1.1 augustss ifp->if_softc = sc;
689 1.1 augustss strncpy(ifp->if_xname, devname, IFNAMSIZ);
690 1.1 augustss ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
691 1.1 augustss ifp->if_ioctl = axe_ioctl;
692 1.1 augustss ifp->if_start = axe_start;
693 1.35 pgoyette ifp->if_init = axe_init;
694 1.35 pgoyette ifp->if_stop = axe_stop;
695 1.1 augustss ifp->if_watchdog = axe_watchdog;
696 1.1 augustss
697 1.35 pgoyette IFQ_SET_READY(&ifp->if_snd);
698 1.1 augustss
699 1.35 pgoyette sc->axe_ec.ec_capabilities = ETHERCAP_VLAN_MTU;
700 1.1 augustss
701 1.1 augustss /* Initialize MII/media info. */
702 1.1 augustss mii = &sc->axe_mii;
703 1.1 augustss mii->mii_ifp = ifp;
704 1.1 augustss mii->mii_readreg = axe_miibus_readreg;
705 1.1 augustss mii->mii_writereg = axe_miibus_writereg;
706 1.1 augustss mii->mii_statchg = axe_miibus_statchg;
707 1.1 augustss mii->mii_flags = MIIF_AUTOTSLEEP;
708 1.1 augustss
709 1.22 dyoung sc->axe_ec.ec_mii = mii;
710 1.35 pgoyette if (sc->axe_flags & AXE_MII)
711 1.35 pgoyette ifmedia_init(&mii->mii_media, 0, axe_ifmedia_upd,
712 1.35 pgoyette axe_ifmedia_sts);
713 1.35 pgoyette else
714 1.35 pgoyette ifmedia_init(&mii->mii_media, 0, ether_mediachange,
715 1.35 pgoyette ether_mediastatus);
716 1.35 pgoyette
717 1.35 pgoyette mii_attach(sc->axe_dev, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
718 1.35 pgoyette 0);
719 1.1 augustss
720 1.22 dyoung if (LIST_EMPTY(&mii->mii_phys)) {
721 1.1 augustss ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
722 1.1 augustss ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
723 1.1 augustss } else
724 1.1 augustss ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
725 1.1 augustss
726 1.1 augustss /* Attach the interface. */
727 1.1 augustss if_attach(ifp);
728 1.28 dyoung ether_ifattach(ifp, eaddr);
729 1.1 augustss #if NRND > 0
730 1.28 dyoung rnd_attach_source(&sc->rnd_source, device_xname(sc->axe_dev),
731 1.1 augustss RND_TYPE_NET, 0);
732 1.1 augustss #endif
733 1.1 augustss
734 1.35 pgoyette callout_init(&sc->axe_stat_ch, 0);
735 1.35 pgoyette callout_setfunc(&sc->axe_stat_ch, axe_tick, sc);
736 1.1 augustss
737 1.1 augustss sc->axe_attached = 1;
738 1.1 augustss splx(s);
739 1.1 augustss
740 1.28 dyoung usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->axe_udev, sc->axe_dev);
741 1.1 augustss
742 1.28 dyoung return;
743 1.1 augustss }
744 1.1 augustss
745 1.27 dyoung int
746 1.27 dyoung axe_detach(device_t self, int flags)
747 1.1 augustss {
748 1.35 pgoyette struct axe_softc *sc = device_private(self);
749 1.1 augustss int s;
750 1.35 pgoyette struct ifnet *ifp = &sc->sc_if;
751 1.1 augustss
752 1.1 augustss DPRINTFN(2,("%s: %s: enter\n", USBDEVNAME(sc->axe_dev), __func__));
753 1.1 augustss
754 1.1 augustss /* Detached before attached finished, so just bail out. */
755 1.1 augustss if (!sc->axe_attached)
756 1.35 pgoyette return 0;
757 1.1 augustss
758 1.35 pgoyette callout_destroy(&sc->axe_stat_ch);
759 1.1 augustss
760 1.1 augustss sc->axe_dying = 1;
761 1.1 augustss
762 1.1 augustss if (sc->axe_ep[AXE_ENDPT_TX] != NULL)
763 1.1 augustss usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]);
764 1.1 augustss if (sc->axe_ep[AXE_ENDPT_RX] != NULL)
765 1.1 augustss usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]);
766 1.1 augustss if (sc->axe_ep[AXE_ENDPT_INTR] != NULL)
767 1.1 augustss usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
768 1.1 augustss
769 1.1 augustss /*
770 1.1 augustss * Remove any pending tasks. They cannot be executing because they run
771 1.1 augustss * in the same thread as detach.
772 1.1 augustss */
773 1.1 augustss usb_rem_task(sc->axe_udev, &sc->axe_tick_task);
774 1.1 augustss usb_rem_task(sc->axe_udev, &sc->axe_stop_task);
775 1.1 augustss
776 1.1 augustss s = splusb();
777 1.1 augustss
778 1.1 augustss if (--sc->axe_refcnt >= 0) {
779 1.1 augustss /* Wait for processes to go away */
780 1.28 dyoung usb_detach_wait((sc->axe_dev));
781 1.1 augustss }
782 1.1 augustss
783 1.1 augustss if (ifp->if_flags & IFF_RUNNING)
784 1.35 pgoyette axe_stop(ifp, 1);
785 1.1 augustss
786 1.1 augustss #if NRND > 0
787 1.1 augustss rnd_detach_source(&sc->rnd_source);
788 1.1 augustss #endif
789 1.1 augustss mii_detach(&sc->axe_mii, MII_PHY_ANY, MII_OFFSET_ANY);
790 1.1 augustss ifmedia_delete_instance(&sc->axe_mii.mii_media, IFM_INST_ANY);
791 1.1 augustss ether_ifdetach(ifp);
792 1.1 augustss if_detach(ifp);
793 1.1 augustss
794 1.1 augustss #ifdef DIAGNOSTIC
795 1.1 augustss if (sc->axe_ep[AXE_ENDPT_TX] != NULL ||
796 1.1 augustss sc->axe_ep[AXE_ENDPT_RX] != NULL ||
797 1.1 augustss sc->axe_ep[AXE_ENDPT_INTR] != NULL)
798 1.25 cube aprint_debug_dev(self, "detach has active endpoints\n");
799 1.1 augustss #endif
800 1.1 augustss
801 1.1 augustss sc->axe_attached = 0;
802 1.1 augustss
803 1.1 augustss if (--sc->axe_refcnt >= 0) {
804 1.1 augustss /* Wait for processes to go away. */
805 1.28 dyoung usb_detach_wait((sc->axe_dev));
806 1.1 augustss }
807 1.1 augustss splx(s);
808 1.1 augustss
809 1.28 dyoung usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->axe_udev, sc->axe_dev);
810 1.1 augustss
811 1.35 pgoyette return 0;
812 1.1 augustss }
813 1.1 augustss
814 1.1 augustss int
815 1.35 pgoyette axe_activate(device_t self, devact_t act)
816 1.1 augustss {
817 1.25 cube struct axe_softc *sc = device_private(self);
818 1.1 augustss
819 1.1 augustss DPRINTFN(2,("%s: %s: enter\n", USBDEVNAME(sc->axe_dev), __func__));
820 1.1 augustss
821 1.1 augustss switch (act) {
822 1.1 augustss case DVACT_DEACTIVATE:
823 1.1 augustss if_deactivate(&sc->axe_ec.ec_if);
824 1.1 augustss sc->axe_dying = 1;
825 1.30 dyoung return 0;
826 1.30 dyoung default:
827 1.30 dyoung return EOPNOTSUPP;
828 1.1 augustss }
829 1.1 augustss }
830 1.1 augustss
831 1.1 augustss /*
832 1.1 augustss * Initialize an RX descriptor and attach an MBUF cluster.
833 1.1 augustss */
834 1.35 pgoyette static int
835 1.1 augustss axe_newbuf(struct axe_softc *sc, struct axe_chain *c, struct mbuf *m)
836 1.1 augustss {
837 1.1 augustss struct mbuf *m_new = NULL;
838 1.1 augustss
839 1.1 augustss DPRINTFN(10,("%s: %s: enter\n", USBDEVNAME(sc->axe_dev),__func__));
840 1.1 augustss
841 1.1 augustss if (m == NULL) {
842 1.1 augustss MGETHDR(m_new, M_DONTWAIT, MT_DATA);
843 1.1 augustss if (m_new == NULL) {
844 1.25 cube aprint_error_dev(sc->axe_dev, "no memory for rx list "
845 1.25 cube "-- packet dropped!\n");
846 1.1 augustss return (ENOBUFS);
847 1.1 augustss }
848 1.1 augustss
849 1.1 augustss MCLGET(m_new, M_DONTWAIT);
850 1.1 augustss if (!(m_new->m_flags & M_EXT)) {
851 1.25 cube aprint_error_dev(sc->axe_dev, "no memory for rx list "
852 1.25 cube "-- packet dropped!\n");
853 1.1 augustss m_freem(m_new);
854 1.1 augustss return (ENOBUFS);
855 1.1 augustss }
856 1.1 augustss m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
857 1.1 augustss } else {
858 1.1 augustss m_new = m;
859 1.1 augustss m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
860 1.1 augustss m_new->m_data = m_new->m_ext.ext_buf;
861 1.1 augustss }
862 1.1 augustss
863 1.1 augustss m_adj(m_new, ETHER_ALIGN);
864 1.1 augustss c->axe_mbuf = m_new;
865 1.1 augustss
866 1.1 augustss return (0);
867 1.1 augustss }
868 1.1 augustss
869 1.35 pgoyette static int
870 1.1 augustss axe_rx_list_init(struct axe_softc *sc)
871 1.1 augustss {
872 1.1 augustss struct axe_cdata *cd;
873 1.1 augustss struct axe_chain *c;
874 1.1 augustss int i;
875 1.1 augustss
876 1.1 augustss DPRINTF(("%s: %s: enter\n", USBDEVNAME(sc->axe_dev), __func__));
877 1.1 augustss
878 1.1 augustss cd = &sc->axe_cdata;
879 1.1 augustss for (i = 0; i < AXE_RX_LIST_CNT; i++) {
880 1.1 augustss c = &cd->axe_rx_chain[i];
881 1.1 augustss c->axe_sc = sc;
882 1.1 augustss c->axe_idx = i;
883 1.1 augustss if (axe_newbuf(sc, c, NULL) == ENOBUFS)
884 1.1 augustss return (ENOBUFS);
885 1.1 augustss if (c->axe_xfer == NULL) {
886 1.1 augustss c->axe_xfer = usbd_alloc_xfer(sc->axe_udev);
887 1.1 augustss if (c->axe_xfer == NULL)
888 1.1 augustss return (ENOBUFS);
889 1.35 pgoyette c->axe_buf = usbd_alloc_buffer(c->axe_xfer,
890 1.35 pgoyette sc->axe_bufsz);
891 1.1 augustss if (c->axe_buf == NULL) {
892 1.1 augustss usbd_free_xfer(c->axe_xfer);
893 1.1 augustss return (ENOBUFS);
894 1.1 augustss }
895 1.1 augustss }
896 1.1 augustss }
897 1.1 augustss
898 1.35 pgoyette return 0;
899 1.1 augustss }
900 1.1 augustss
901 1.35 pgoyette static int
902 1.1 augustss axe_tx_list_init(struct axe_softc *sc)
903 1.1 augustss {
904 1.1 augustss struct axe_cdata *cd;
905 1.1 augustss struct axe_chain *c;
906 1.1 augustss int i;
907 1.1 augustss
908 1.1 augustss DPRINTF(("%s: %s: enter\n", USBDEVNAME(sc->axe_dev), __func__));
909 1.1 augustss
910 1.1 augustss cd = &sc->axe_cdata;
911 1.1 augustss for (i = 0; i < AXE_TX_LIST_CNT; i++) {
912 1.1 augustss c = &cd->axe_tx_chain[i];
913 1.1 augustss c->axe_sc = sc;
914 1.1 augustss c->axe_idx = i;
915 1.1 augustss c->axe_mbuf = NULL;
916 1.1 augustss if (c->axe_xfer == NULL) {
917 1.1 augustss c->axe_xfer = usbd_alloc_xfer(sc->axe_udev);
918 1.1 augustss if (c->axe_xfer == NULL)
919 1.1 augustss return (ENOBUFS);
920 1.35 pgoyette c->axe_buf = usbd_alloc_buffer(c->axe_xfer,
921 1.35 pgoyette sc->axe_bufsz);
922 1.1 augustss if (c->axe_buf == NULL) {
923 1.1 augustss usbd_free_xfer(c->axe_xfer);
924 1.1 augustss return (ENOBUFS);
925 1.1 augustss }
926 1.1 augustss }
927 1.1 augustss }
928 1.1 augustss
929 1.35 pgoyette return 0;
930 1.1 augustss }
931 1.1 augustss
932 1.1 augustss /*
933 1.1 augustss * A frame has been uploaded: pass the resulting mbuf chain up to
934 1.1 augustss * the higher level protocols.
935 1.1 augustss */
936 1.35 pgoyette static void
937 1.1 augustss axe_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
938 1.1 augustss {
939 1.1 augustss struct axe_softc *sc;
940 1.1 augustss struct axe_chain *c;
941 1.1 augustss struct ifnet *ifp;
942 1.35 pgoyette uint8_t *buf;
943 1.35 pgoyette u_int32_t total_len;
944 1.35 pgoyette u_int16_t pktlen = 0;
945 1.1 augustss struct mbuf *m;
946 1.35 pgoyette struct axe_sframe_hdr hdr;
947 1.1 augustss int s;
948 1.1 augustss
949 1.35 pgoyette c = (struct axe_chain *)priv;
950 1.1 augustss sc = c->axe_sc;
951 1.35 pgoyette buf = c->axe_buf;
952 1.35 pgoyette ifp = &sc->sc_if;
953 1.1 augustss
954 1.1 augustss DPRINTFN(10,("%s: %s: enter\n", USBDEVNAME(sc->axe_dev),__func__));
955 1.1 augustss
956 1.1 augustss if (sc->axe_dying)
957 1.1 augustss return;
958 1.1 augustss
959 1.1 augustss if (!(ifp->if_flags & IFF_RUNNING))
960 1.1 augustss return;
961 1.1 augustss
962 1.1 augustss if (status != USBD_NORMAL_COMPLETION) {
963 1.1 augustss if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
964 1.1 augustss return;
965 1.35 pgoyette if (usbd_ratecheck(&sc->axe_rx_notice))
966 1.35 pgoyette aprint_error_dev(sc->axe_dev, "usb errors on rx: %s\n",
967 1.35 pgoyette usbd_errstr(status));
968 1.1 augustss if (status == USBD_STALLED)
969 1.12 augustss usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_RX]);
970 1.1 augustss goto done;
971 1.1 augustss }
972 1.1 augustss
973 1.1 augustss usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
974 1.1 augustss
975 1.35 pgoyette do {
976 1.35 pgoyette if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
977 1.35 pgoyette if (total_len < sizeof(hdr)) {
978 1.35 pgoyette ifp->if_ierrors++;
979 1.35 pgoyette goto done;
980 1.35 pgoyette }
981 1.35 pgoyette buf += pktlen;
982 1.35 pgoyette
983 1.35 pgoyette memcpy(&hdr, buf, sizeof(hdr));
984 1.35 pgoyette total_len -= sizeof(hdr);
985 1.35 pgoyette
986 1.35 pgoyette if ((hdr.len ^ hdr.ilen) != 0xffff) {
987 1.35 pgoyette ifp->if_ierrors++;
988 1.35 pgoyette goto done;
989 1.35 pgoyette }
990 1.35 pgoyette pktlen = le16toh(hdr.len);
991 1.35 pgoyette if (pktlen > total_len) {
992 1.35 pgoyette ifp->if_ierrors++;
993 1.35 pgoyette goto done;
994 1.35 pgoyette }
995 1.35 pgoyette
996 1.35 pgoyette buf += sizeof(hdr);
997 1.35 pgoyette
998 1.35 pgoyette pktlen = roundup2(pktlen, 2);
999 1.35 pgoyette
1000 1.35 pgoyette if (total_len < pktlen)
1001 1.35 pgoyette total_len = 0;
1002 1.35 pgoyette else
1003 1.35 pgoyette total_len -= pktlen;
1004 1.35 pgoyette } else { /* AX172 */
1005 1.35 pgoyette pktlen = total_len;
1006 1.35 pgoyette total_len = 0;
1007 1.35 pgoyette }
1008 1.35 pgoyette
1009 1.35 pgoyette m = c->axe_mbuf;
1010 1.35 pgoyette
1011 1.35 pgoyette /* XXX ugly */
1012 1.35 pgoyette if (axe_newbuf(sc, c, NULL) == ENOBUFS) {
1013 1.35 pgoyette ifp->if_ierrors++;
1014 1.35 pgoyette goto done;
1015 1.35 pgoyette }
1016 1.1 augustss
1017 1.35 pgoyette ifp->if_ipackets++;
1018 1.35 pgoyette m->m_pkthdr.rcvif = ifp;
1019 1.35 pgoyette m->m_pkthdr.len = m->m_len = pktlen;
1020 1.1 augustss
1021 1.35 pgoyette memcpy(mtod(m, char *), buf, pktlen);
1022 1.1 augustss
1023 1.35 pgoyette /* No errors; receive the packet. */
1024 1.35 pgoyette pktlen -= ETHER_CRC_LEN + 4;
1025 1.1 augustss
1026 1.35 pgoyette s = splnet();
1027 1.1 augustss
1028 1.35 pgoyette bpf_mtap(ifp, m);
1029 1.1 augustss
1030 1.35 pgoyette DPRINTFN(10,("%s: %s: deliver %d\n", USBDEVNAME(sc->axe_dev),
1031 1.35 pgoyette __func__, m->m_len));
1032 1.35 pgoyette (*(ifp)->if_input)((ifp), (m));
1033 1.1 augustss
1034 1.35 pgoyette splx(s);
1035 1.1 augustss
1036 1.35 pgoyette } while (total_len > 0);
1037 1.1 augustss
1038 1.1 augustss done:
1039 1.1 augustss
1040 1.1 augustss /* Setup new transfer. */
1041 1.1 augustss usbd_setup_xfer(xfer, sc->axe_ep[AXE_ENDPT_RX],
1042 1.35 pgoyette c, c->axe_buf, sc->axe_bufsz,
1043 1.1 augustss USBD_SHORT_XFER_OK | USBD_NO_COPY,
1044 1.1 augustss USBD_NO_TIMEOUT, axe_rxeof);
1045 1.1 augustss usbd_transfer(xfer);
1046 1.1 augustss
1047 1.1 augustss DPRINTFN(10,("%s: %s: start rx\n", USBDEVNAME(sc->axe_dev),
1048 1.1 augustss __func__));
1049 1.1 augustss return;
1050 1.1 augustss }
1051 1.1 augustss
1052 1.1 augustss /*
1053 1.1 augustss * A frame was downloaded to the chip. It's safe for us to clean up
1054 1.1 augustss * the list buffers.
1055 1.1 augustss */
1056 1.1 augustss
1057 1.35 pgoyette static void
1058 1.17 christos axe_txeof(usbd_xfer_handle xfer, usbd_private_handle priv,
1059 1.15 christos usbd_status status)
1060 1.1 augustss {
1061 1.1 augustss struct axe_softc *sc;
1062 1.1 augustss struct axe_chain *c;
1063 1.1 augustss struct ifnet *ifp;
1064 1.1 augustss int s;
1065 1.1 augustss
1066 1.1 augustss c = priv;
1067 1.1 augustss sc = c->axe_sc;
1068 1.35 pgoyette ifp = &sc->sc_if;
1069 1.1 augustss
1070 1.1 augustss if (sc->axe_dying)
1071 1.1 augustss return;
1072 1.1 augustss
1073 1.1 augustss s = splnet();
1074 1.1 augustss
1075 1.1 augustss if (status != USBD_NORMAL_COMPLETION) {
1076 1.1 augustss if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
1077 1.1 augustss splx(s);
1078 1.1 augustss return;
1079 1.1 augustss }
1080 1.1 augustss ifp->if_oerrors++;
1081 1.35 pgoyette aprint_error_dev(sc->axe_dev, "usb error on tx: %s\n",
1082 1.28 dyoung usbd_errstr(status));
1083 1.1 augustss if (status == USBD_STALLED)
1084 1.12 augustss usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_TX]);
1085 1.1 augustss splx(s);
1086 1.1 augustss return;
1087 1.1 augustss }
1088 1.1 augustss
1089 1.1 augustss ifp->if_timer = 0;
1090 1.1 augustss ifp->if_flags &= ~IFF_OACTIVE;
1091 1.1 augustss
1092 1.1 augustss m_freem(c->axe_mbuf);
1093 1.1 augustss c->axe_mbuf = NULL;
1094 1.1 augustss
1095 1.1 augustss if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1096 1.1 augustss axe_start(ifp);
1097 1.1 augustss
1098 1.1 augustss ifp->if_opackets++;
1099 1.1 augustss splx(s);
1100 1.1 augustss return;
1101 1.1 augustss }
1102 1.1 augustss
1103 1.35 pgoyette static void
1104 1.1 augustss axe_tick(void *xsc)
1105 1.1 augustss {
1106 1.1 augustss struct axe_softc *sc = xsc;
1107 1.1 augustss
1108 1.1 augustss if (sc == NULL)
1109 1.1 augustss return;
1110 1.1 augustss
1111 1.1 augustss DPRINTFN(0xff, ("%s: %s: enter\n", USBDEVNAME(sc->axe_dev),
1112 1.1 augustss __func__));
1113 1.1 augustss
1114 1.1 augustss if (sc->axe_dying)
1115 1.1 augustss return;
1116 1.1 augustss
1117 1.1 augustss /* Perform periodic stuff in process context */
1118 1.16 joerg usb_add_task(sc->axe_udev, &sc->axe_tick_task, USB_TASKQ_DRIVER);
1119 1.1 augustss
1120 1.1 augustss }
1121 1.1 augustss
1122 1.35 pgoyette static void
1123 1.1 augustss axe_tick_task(void *xsc)
1124 1.1 augustss {
1125 1.1 augustss int s;
1126 1.1 augustss struct axe_softc *sc;
1127 1.1 augustss struct ifnet *ifp;
1128 1.1 augustss struct mii_data *mii;
1129 1.1 augustss
1130 1.1 augustss sc = xsc;
1131 1.1 augustss
1132 1.1 augustss if (sc == NULL)
1133 1.1 augustss return;
1134 1.1 augustss
1135 1.1 augustss if (sc->axe_dying)
1136 1.1 augustss return;
1137 1.1 augustss
1138 1.35 pgoyette ifp = &sc->sc_if;
1139 1.35 pgoyette mii = &sc->axe_mii;
1140 1.35 pgoyette
1141 1.1 augustss if (mii == NULL)
1142 1.1 augustss return;
1143 1.1 augustss
1144 1.1 augustss s = splnet();
1145 1.1 augustss
1146 1.1 augustss mii_tick(mii);
1147 1.35 pgoyette if (!sc->axe_link && mii->mii_media_status & IFM_ACTIVE &&
1148 1.35 pgoyette IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1149 1.35 pgoyette DPRINTF(("%s: %s: got link\n", device_xname(sc->axe_dev),
1150 1.35 pgoyette __func__));
1151 1.35 pgoyette sc->axe_link++;
1152 1.35 pgoyette if (!IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1153 1.35 pgoyette axe_start(ifp);
1154 1.35 pgoyette }
1155 1.1 augustss
1156 1.35 pgoyette callout_schedule(&sc->axe_stat_ch, hz);
1157 1.1 augustss
1158 1.1 augustss splx(s);
1159 1.1 augustss }
1160 1.1 augustss
1161 1.35 pgoyette static int
1162 1.1 augustss axe_encap(struct axe_softc *sc, struct mbuf *m, int idx)
1163 1.1 augustss {
1164 1.35 pgoyette struct ifnet *ifp = &sc->sc_if;
1165 1.1 augustss struct axe_chain *c;
1166 1.1 augustss usbd_status err;
1167 1.35 pgoyette struct axe_sframe_hdr hdr;
1168 1.35 pgoyette int length, boundary;
1169 1.1 augustss
1170 1.1 augustss c = &sc->axe_cdata.axe_tx_chain[idx];
1171 1.1 augustss
1172 1.1 augustss /*
1173 1.1 augustss * Copy the mbuf data into a contiguous buffer, leaving two
1174 1.1 augustss * bytes at the beginning to hold the frame length.
1175 1.1 augustss */
1176 1.35 pgoyette if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
1177 1.35 pgoyette boundary = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 512 : 64;
1178 1.35 pgoyette
1179 1.35 pgoyette hdr.len = htole16(m->m_pkthdr.len);
1180 1.35 pgoyette hdr.ilen = ~hdr.len;
1181 1.35 pgoyette
1182 1.35 pgoyette memcpy(c->axe_buf, &hdr, sizeof(hdr));
1183 1.35 pgoyette length = sizeof(hdr);
1184 1.35 pgoyette
1185 1.35 pgoyette m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf + length);
1186 1.35 pgoyette length += m->m_pkthdr.len;
1187 1.35 pgoyette
1188 1.35 pgoyette if ((length % boundary) == 0) {
1189 1.35 pgoyette hdr.len = 0x0000;
1190 1.35 pgoyette hdr.ilen = 0xffff;
1191 1.35 pgoyette memcpy(c->axe_buf + length, &hdr, sizeof(hdr));
1192 1.35 pgoyette length += sizeof(hdr);
1193 1.35 pgoyette }
1194 1.35 pgoyette } else {
1195 1.35 pgoyette m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf);
1196 1.35 pgoyette length = m->m_pkthdr.len;
1197 1.35 pgoyette }
1198 1.1 augustss c->axe_mbuf = m;
1199 1.1 augustss
1200 1.1 augustss usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_TX],
1201 1.35 pgoyette c, c->axe_buf, length, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, 10000,
1202 1.1 augustss axe_txeof);
1203 1.1 augustss
1204 1.1 augustss /* Transmit */
1205 1.1 augustss err = usbd_transfer(c->axe_xfer);
1206 1.1 augustss if (err != USBD_IN_PROGRESS) {
1207 1.35 pgoyette axe_stop(ifp, 0);
1208 1.35 pgoyette return EIO;
1209 1.1 augustss }
1210 1.1 augustss
1211 1.1 augustss sc->axe_cdata.axe_tx_cnt++;
1212 1.1 augustss
1213 1.35 pgoyette return 0;
1214 1.1 augustss }
1215 1.1 augustss
1216 1.35 pgoyette static void
1217 1.1 augustss axe_start(struct ifnet *ifp)
1218 1.1 augustss {
1219 1.1 augustss struct axe_softc *sc;
1220 1.1 augustss struct mbuf *m_head = NULL;
1221 1.1 augustss
1222 1.1 augustss sc = ifp->if_softc;
1223 1.1 augustss
1224 1.35 pgoyette if ((sc->axe_flags & AXE_MII) != 0 && sc->axe_link == 0)
1225 1.35 pgoyette return;
1226 1.35 pgoyette
1227 1.22 dyoung if ((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING)) != IFF_RUNNING)
1228 1.1 augustss return;
1229 1.1 augustss
1230 1.35 pgoyette IFQ_POLL(&ifp->if_snd, m_head);
1231 1.1 augustss if (m_head == NULL) {
1232 1.1 augustss return;
1233 1.1 augustss }
1234 1.1 augustss
1235 1.1 augustss if (axe_encap(sc, m_head, 0)) {
1236 1.1 augustss ifp->if_flags |= IFF_OACTIVE;
1237 1.1 augustss return;
1238 1.1 augustss }
1239 1.35 pgoyette IFQ_DEQUEUE(&ifp->if_snd, m_head);
1240 1.1 augustss
1241 1.1 augustss /*
1242 1.1 augustss * If there's a BPF listener, bounce a copy of this frame
1243 1.1 augustss * to him.
1244 1.1 augustss */
1245 1.32 joerg bpf_mtap(ifp, m_head);
1246 1.1 augustss
1247 1.1 augustss ifp->if_flags |= IFF_OACTIVE;
1248 1.1 augustss
1249 1.1 augustss /*
1250 1.1 augustss * Set a timeout in case the chip goes out to lunch.
1251 1.1 augustss */
1252 1.1 augustss ifp->if_timer = 5;
1253 1.1 augustss
1254 1.1 augustss return;
1255 1.1 augustss }
1256 1.1 augustss
1257 1.35 pgoyette static int
1258 1.35 pgoyette axe_init(struct ifnet *ifp)
1259 1.1 augustss {
1260 1.35 pgoyette struct axe_softc *sc = ifp->if_softc;
1261 1.1 augustss struct axe_chain *c;
1262 1.1 augustss usbd_status err;
1263 1.1 augustss int rxmode;
1264 1.1 augustss int i, s;
1265 1.35 pgoyette uint8_t eaddr[ETHER_ADDR_LEN];
1266 1.35 pgoyette
1267 1.35 pgoyette s = splnet();
1268 1.1 augustss
1269 1.1 augustss if (ifp->if_flags & IFF_RUNNING)
1270 1.35 pgoyette axe_stop(ifp, 0);
1271 1.1 augustss
1272 1.1 augustss /*
1273 1.1 augustss * Cancel pending I/O and free all RX/TX buffers.
1274 1.1 augustss */
1275 1.1 augustss axe_reset(sc);
1276 1.1 augustss
1277 1.35 pgoyette /* Set MAC address */
1278 1.35 pgoyette if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
1279 1.35 pgoyette memcpy(eaddr, CLLADDR(ifp->if_sadl), sizeof(eaddr));
1280 1.35 pgoyette axe_lock_mii(sc);
1281 1.35 pgoyette axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, eaddr);
1282 1.35 pgoyette axe_unlock_mii(sc);
1283 1.35 pgoyette }
1284 1.35 pgoyette
1285 1.1 augustss /* Enable RX logic. */
1286 1.1 augustss
1287 1.1 augustss /* Init RX ring. */
1288 1.1 augustss if (axe_rx_list_init(sc) == ENOBUFS) {
1289 1.35 pgoyette aprint_error_dev(sc->axe_dev, "rx list init failed\n");
1290 1.1 augustss splx(s);
1291 1.35 pgoyette return ENOBUFS;
1292 1.1 augustss }
1293 1.1 augustss
1294 1.1 augustss /* Init TX ring. */
1295 1.1 augustss if (axe_tx_list_init(sc) == ENOBUFS) {
1296 1.35 pgoyette aprint_error_dev(sc->axe_dev, "tx list init failed\n");
1297 1.1 augustss splx(s);
1298 1.35 pgoyette return ENOBUFS;
1299 1.1 augustss }
1300 1.1 augustss
1301 1.1 augustss /* Set transmitter IPG values */
1302 1.21 ad axe_lock_mii(sc);
1303 1.35 pgoyette if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
1304 1.35 pgoyette axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2],
1305 1.35 pgoyette (sc->axe_ipgs[1] << 8) | (sc->axe_ipgs[0]), NULL);
1306 1.35 pgoyette else {
1307 1.35 pgoyette axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL);
1308 1.35 pgoyette axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL);
1309 1.35 pgoyette axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL);
1310 1.35 pgoyette }
1311 1.1 augustss
1312 1.1 augustss /* Enable receiver, set RX mode */
1313 1.35 pgoyette rxmode = AXE_RXCMD_BROADCAST | AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE;
1314 1.35 pgoyette if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
1315 1.35 pgoyette if (sc->axe_udev->speed == USB_SPEED_HIGH) {
1316 1.35 pgoyette /* Largest possible USB buffer size for AX88178 */
1317 1.35 pgoyette rxmode |= AXE_178_RXCMD_MFB;
1318 1.35 pgoyette }
1319 1.35 pgoyette } else
1320 1.35 pgoyette rxmode |= AXE_172_RXCMD_UNICAST;
1321 1.1 augustss
1322 1.1 augustss /* If we want promiscuous mode, set the allframes bit. */
1323 1.1 augustss if (ifp->if_flags & IFF_PROMISC)
1324 1.1 augustss rxmode |= AXE_RXCMD_PROMISC;
1325 1.1 augustss
1326 1.1 augustss if (ifp->if_flags & IFF_BROADCAST)
1327 1.1 augustss rxmode |= AXE_RXCMD_BROADCAST;
1328 1.1 augustss
1329 1.1 augustss axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1330 1.21 ad axe_unlock_mii(sc);
1331 1.1 augustss
1332 1.1 augustss /* Load the multicast filter. */
1333 1.1 augustss axe_setmulti(sc);
1334 1.1 augustss
1335 1.1 augustss /* Open RX and TX pipes. */
1336 1.1 augustss err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_RX],
1337 1.1 augustss USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_RX]);
1338 1.1 augustss if (err) {
1339 1.35 pgoyette aprint_error_dev(sc->axe_dev, "open rx pipe failed: %s\n",
1340 1.35 pgoyette usbd_errstr(err));
1341 1.1 augustss splx(s);
1342 1.35 pgoyette return EIO;
1343 1.1 augustss }
1344 1.1 augustss
1345 1.1 augustss err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_TX],
1346 1.1 augustss USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_TX]);
1347 1.1 augustss if (err) {
1348 1.35 pgoyette aprint_error_dev(sc->axe_dev, "open tx pipe failed: %s\n",
1349 1.35 pgoyette usbd_errstr(err));
1350 1.1 augustss splx(s);
1351 1.35 pgoyette return EIO;
1352 1.1 augustss }
1353 1.1 augustss
1354 1.1 augustss /* Start up the receive pipe. */
1355 1.1 augustss for (i = 0; i < AXE_RX_LIST_CNT; i++) {
1356 1.1 augustss c = &sc->axe_cdata.axe_rx_chain[i];
1357 1.1 augustss usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_RX],
1358 1.35 pgoyette c, c->axe_buf, sc->axe_bufsz,
1359 1.35 pgoyette USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT,
1360 1.35 pgoyette axe_rxeof);
1361 1.1 augustss usbd_transfer(c->axe_xfer);
1362 1.1 augustss }
1363 1.1 augustss
1364 1.1 augustss ifp->if_flags |= IFF_RUNNING;
1365 1.1 augustss ifp->if_flags &= ~IFF_OACTIVE;
1366 1.1 augustss
1367 1.1 augustss splx(s);
1368 1.1 augustss
1369 1.35 pgoyette callout_schedule(&sc->axe_stat_ch, hz);
1370 1.35 pgoyette return 0;
1371 1.1 augustss }
1372 1.1 augustss
1373 1.35 pgoyette static int
1374 1.18 christos axe_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1375 1.1 augustss {
1376 1.1 augustss struct axe_softc *sc = ifp->if_softc;
1377 1.35 pgoyette int s;
1378 1.1 augustss int error = 0;
1379 1.1 augustss
1380 1.35 pgoyette s = splnet();
1381 1.35 pgoyette
1382 1.1 augustss switch(cmd) {
1383 1.35 pgoyette case SIOCSIFFLAGS:
1384 1.35 pgoyette if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1385 1.35 pgoyette break;
1386 1.35 pgoyette
1387 1.35 pgoyette switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
1388 1.35 pgoyette case IFF_RUNNING:
1389 1.35 pgoyette axe_stop(ifp, 1);
1390 1.35 pgoyette break;
1391 1.35 pgoyette case IFF_UP:
1392 1.35 pgoyette axe_init(ifp);
1393 1.35 pgoyette break;
1394 1.35 pgoyette case IFF_UP | IFF_RUNNING:
1395 1.35 pgoyette if ((ifp->if_flags ^ sc->axe_if_flags) == IFF_PROMISC)
1396 1.35 pgoyette axe_setmulti(sc);
1397 1.35 pgoyette else
1398 1.35 pgoyette axe_init(ifp);
1399 1.1 augustss break;
1400 1.1 augustss }
1401 1.35 pgoyette sc->axe_if_flags = ifp->if_flags;
1402 1.1 augustss break;
1403 1.1 augustss
1404 1.35 pgoyette default:
1405 1.35 pgoyette if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET)
1406 1.26 dyoung break;
1407 1.1 augustss
1408 1.1 augustss error = 0;
1409 1.35 pgoyette
1410 1.35 pgoyette if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI)
1411 1.35 pgoyette axe_setmulti(sc);
1412 1.35 pgoyette
1413 1.1 augustss }
1414 1.35 pgoyette splx(s);
1415 1.1 augustss
1416 1.35 pgoyette return error;
1417 1.1 augustss }
1418 1.1 augustss
1419 1.35 pgoyette static void
1420 1.1 augustss axe_watchdog(struct ifnet *ifp)
1421 1.1 augustss {
1422 1.1 augustss struct axe_softc *sc;
1423 1.1 augustss struct axe_chain *c;
1424 1.1 augustss usbd_status stat;
1425 1.4 augustss int s;
1426 1.1 augustss
1427 1.1 augustss sc = ifp->if_softc;
1428 1.1 augustss
1429 1.1 augustss ifp->if_oerrors++;
1430 1.35 pgoyette aprint_error_dev(sc->axe_dev, "watchdog timeout\n");
1431 1.1 augustss
1432 1.4 augustss s = splusb();
1433 1.1 augustss c = &sc->axe_cdata.axe_tx_chain[0];
1434 1.1 augustss usbd_get_xfer_status(c->axe_xfer, NULL, NULL, NULL, &stat);
1435 1.1 augustss axe_txeof(c->axe_xfer, c, stat);
1436 1.1 augustss
1437 1.35 pgoyette if (!IFQ_IS_EMPTY(&ifp->if_snd))
1438 1.1 augustss axe_start(ifp);
1439 1.4 augustss splx(s);
1440 1.1 augustss }
1441 1.1 augustss
1442 1.1 augustss /*
1443 1.1 augustss * Stop the adapter and free any mbufs allocated to the
1444 1.1 augustss * RX and TX lists.
1445 1.1 augustss */
1446 1.35 pgoyette static void
1447 1.35 pgoyette axe_stop(struct ifnet *ifp, int disable)
1448 1.1 augustss {
1449 1.35 pgoyette struct axe_softc *sc = ifp->if_softc;
1450 1.1 augustss usbd_status err;
1451 1.1 augustss int i;
1452 1.1 augustss
1453 1.1 augustss axe_reset(sc);
1454 1.1 augustss
1455 1.1 augustss ifp->if_timer = 0;
1456 1.35 pgoyette ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1457 1.1 augustss
1458 1.28 dyoung callout_stop(&(sc->axe_stat_ch));
1459 1.1 augustss
1460 1.1 augustss /* Stop transfers. */
1461 1.1 augustss if (sc->axe_ep[AXE_ENDPT_RX] != NULL) {
1462 1.1 augustss err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]);
1463 1.1 augustss if (err) {
1464 1.35 pgoyette aprint_error_dev(sc->axe_dev,
1465 1.35 pgoyette "abort rx pipe failed: %s\n", usbd_errstr(err));
1466 1.1 augustss }
1467 1.1 augustss err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_RX]);
1468 1.1 augustss if (err) {
1469 1.35 pgoyette aprint_error_dev(sc->axe_dev,
1470 1.35 pgoyette "close rx pipe failed: %s\n", usbd_errstr(err));
1471 1.1 augustss }
1472 1.1 augustss sc->axe_ep[AXE_ENDPT_RX] = NULL;
1473 1.1 augustss }
1474 1.1 augustss
1475 1.1 augustss if (sc->axe_ep[AXE_ENDPT_TX] != NULL) {
1476 1.1 augustss err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]);
1477 1.1 augustss if (err) {
1478 1.35 pgoyette aprint_error_dev(sc->axe_dev,
1479 1.35 pgoyette "abort tx pipe failed: %s\n", usbd_errstr(err));
1480 1.1 augustss }
1481 1.1 augustss err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_TX]);
1482 1.1 augustss if (err) {
1483 1.35 pgoyette aprint_error_dev(sc->axe_dev,
1484 1.35 pgoyette "close tx pipe failed: %s\n", usbd_errstr(err));
1485 1.1 augustss }
1486 1.1 augustss sc->axe_ep[AXE_ENDPT_TX] = NULL;
1487 1.1 augustss }
1488 1.1 augustss
1489 1.1 augustss if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) {
1490 1.1 augustss err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
1491 1.1 augustss if (err) {
1492 1.35 pgoyette aprint_error_dev(sc->axe_dev,
1493 1.35 pgoyette "abort intr pipe failed: %s\n", usbd_errstr(err));
1494 1.1 augustss }
1495 1.1 augustss err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
1496 1.1 augustss if (err) {
1497 1.35 pgoyette aprint_error_dev(sc->axe_dev,
1498 1.35 pgoyette "close intr pipe failed: %s\n", usbd_errstr(err));
1499 1.1 augustss }
1500 1.1 augustss sc->axe_ep[AXE_ENDPT_INTR] = NULL;
1501 1.1 augustss }
1502 1.1 augustss
1503 1.1 augustss /* Free RX resources. */
1504 1.1 augustss for (i = 0; i < AXE_RX_LIST_CNT; i++) {
1505 1.1 augustss if (sc->axe_cdata.axe_rx_chain[i].axe_mbuf != NULL) {
1506 1.1 augustss m_freem(sc->axe_cdata.axe_rx_chain[i].axe_mbuf);
1507 1.1 augustss sc->axe_cdata.axe_rx_chain[i].axe_mbuf = NULL;
1508 1.1 augustss }
1509 1.1 augustss if (sc->axe_cdata.axe_rx_chain[i].axe_xfer != NULL) {
1510 1.1 augustss usbd_free_xfer(sc->axe_cdata.axe_rx_chain[i].axe_xfer);
1511 1.1 augustss sc->axe_cdata.axe_rx_chain[i].axe_xfer = NULL;
1512 1.1 augustss }
1513 1.1 augustss }
1514 1.1 augustss
1515 1.1 augustss /* Free TX resources. */
1516 1.1 augustss for (i = 0; i < AXE_TX_LIST_CNT; i++) {
1517 1.1 augustss if (sc->axe_cdata.axe_tx_chain[i].axe_mbuf != NULL) {
1518 1.1 augustss m_freem(sc->axe_cdata.axe_tx_chain[i].axe_mbuf);
1519 1.1 augustss sc->axe_cdata.axe_tx_chain[i].axe_mbuf = NULL;
1520 1.1 augustss }
1521 1.1 augustss if (sc->axe_cdata.axe_tx_chain[i].axe_xfer != NULL) {
1522 1.1 augustss usbd_free_xfer(sc->axe_cdata.axe_tx_chain[i].axe_xfer);
1523 1.1 augustss sc->axe_cdata.axe_tx_chain[i].axe_xfer = NULL;
1524 1.1 augustss }
1525 1.1 augustss }
1526 1.1 augustss
1527 1.35 pgoyette sc->axe_link = 0;
1528 1.1 augustss }
1529