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if_axe.c revision 1.67.2.1
      1  1.67.2.1       snj /*	$NetBSD: if_axe.c,v 1.67.2.1 2016/09/18 06:00:20 snj Exp $	*/
      2      1.35  pgoyette /*	$OpenBSD: if_axe.c,v 1.96 2010/01/09 05:33:08 jsg Exp $ */
      3      1.35  pgoyette 
      4      1.35  pgoyette /*
      5      1.35  pgoyette  * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg (at) openbsd.org>
      6      1.35  pgoyette  *
      7      1.35  pgoyette  * Permission to use, copy, modify, and distribute this software for any
      8      1.35  pgoyette  * purpose with or without fee is hereby granted, provided that the above
      9      1.35  pgoyette  * copyright notice and this permission notice appear in all copies.
     10      1.35  pgoyette  *
     11      1.35  pgoyette  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     12      1.35  pgoyette  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     13      1.35  pgoyette  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     14      1.35  pgoyette  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     15      1.35  pgoyette  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     16      1.35  pgoyette  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     17      1.35  pgoyette  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     18      1.35  pgoyette  */
     19       1.1  augustss 
     20       1.1  augustss /*
     21       1.1  augustss  * Copyright (c) 1997, 1998, 1999, 2000-2003
     22       1.1  augustss  *	Bill Paul <wpaul (at) windriver.com>.  All rights reserved.
     23       1.1  augustss  *
     24       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     25       1.1  augustss  * modification, are permitted provided that the following conditions
     26       1.1  augustss  * are met:
     27       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     28       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     29       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     30       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     31       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     32       1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     33       1.1  augustss  *    must display the following acknowledgement:
     34       1.1  augustss  *	This product includes software developed by Bill Paul.
     35       1.1  augustss  * 4. Neither the name of the author nor the names of any co-contributors
     36       1.1  augustss  *    may be used to endorse or promote products derived from this software
     37       1.1  augustss  *    without specific prior written permission.
     38       1.1  augustss  *
     39       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     40       1.1  augustss  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     41       1.1  augustss  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     42       1.1  augustss  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     43       1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     44       1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     45       1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     46       1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     47       1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     48       1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     49       1.1  augustss  * THE POSSIBILITY OF SUCH DAMAGE.
     50       1.1  augustss  */
     51       1.1  augustss 
     52       1.1  augustss /*
     53       1.1  augustss  * ASIX Electronics AX88172 USB 2.0 ethernet driver. Used in the
     54       1.1  augustss  * LinkSys USB200M and various other adapters.
     55       1.1  augustss  *
     56       1.1  augustss  * Manuals available from:
     57       1.1  augustss  * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF
     58       1.1  augustss  * Note: you need the manual for the AX88170 chip (USB 1.x ethernet
     59       1.1  augustss  * controller) to find the definitions for the RX control register.
     60       1.1  augustss  * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF
     61       1.1  augustss  *
     62       1.1  augustss  * Written by Bill Paul <wpaul (at) windriver.com>
     63       1.1  augustss  * Senior Engineer
     64       1.1  augustss  * Wind River Systems
     65       1.1  augustss  */
     66       1.1  augustss 
     67       1.1  augustss /*
     68       1.1  augustss  * The AX88172 provides USB ethernet supports at 10 and 100Mbps.
     69       1.1  augustss  * It uses an external PHY (reference designs use a RealTek chip),
     70       1.1  augustss  * and has a 64-bit multicast hash filter. There is some information
     71       1.1  augustss  * missing from the manual which one needs to know in order to make
     72       1.1  augustss  * the chip function:
     73       1.1  augustss  *
     74       1.1  augustss  * - You must set bit 7 in the RX control register, otherwise the
     75       1.1  augustss  *   chip won't receive any packets.
     76       1.1  augustss  * - You must initialize all 3 IPG registers, or you won't be able
     77       1.1  augustss  *   to send any packets.
     78       1.1  augustss  *
     79       1.1  augustss  * Note that this device appears to only support loading the station
     80      1.57   msaitoh  * address via autoload from the EEPROM (i.e. there's no way to manaully
     81       1.1  augustss  * set it).
     82       1.1  augustss  *
     83       1.1  augustss  * (Adam Weinberger wanted me to name this driver if_gir.c.)
     84       1.1  augustss  */
     85       1.1  augustss 
     86       1.1  augustss /*
     87       1.1  augustss  * Ported to OpenBSD 3/28/2004 by Greg Taleck <taleck (at) oz.net>
     88       1.1  augustss  * with bits and pieces from the aue and url drivers.
     89       1.1  augustss  */
     90       1.1  augustss 
     91       1.1  augustss #include <sys/cdefs.h>
     92  1.67.2.1       snj __KERNEL_RCSID(0, "$NetBSD: if_axe.c,v 1.67.2.1 2016/09/18 06:00:20 snj Exp $");
     93       1.1  augustss 
     94      1.62  christos #ifdef _KERNEL_OPT
     95       1.1  augustss #include "opt_inet.h"
     96       1.1  augustss #endif
     97       1.1  augustss 
     98       1.1  augustss #include <sys/param.h>
     99      1.35  pgoyette #include <sys/bus.h>
    100      1.35  pgoyette #include <sys/device.h>
    101      1.35  pgoyette #include <sys/kernel.h>
    102      1.35  pgoyette #include <sys/mbuf.h>
    103      1.48  pgoyette #include <sys/module.h>
    104      1.21        ad #include <sys/mutex.h>
    105       1.1  augustss #include <sys/socket.h>
    106      1.35  pgoyette #include <sys/sockio.h>
    107      1.35  pgoyette #include <sys/systm.h>
    108       1.1  augustss 
    109       1.1  augustss #include <sys/rnd.h>
    110       1.1  augustss 
    111       1.1  augustss #include <net/if.h>
    112       1.1  augustss #include <net/if_dl.h>
    113      1.35  pgoyette #include <net/if_ether.h>
    114       1.1  augustss #include <net/if_media.h>
    115       1.1  augustss 
    116       1.1  augustss #include <net/bpf.h>
    117       1.1  augustss 
    118       1.1  augustss #include <dev/mii/mii.h>
    119       1.1  augustss #include <dev/mii/miivar.h>
    120       1.1  augustss 
    121       1.1  augustss #include <dev/usb/usb.h>
    122       1.1  augustss #include <dev/usb/usbdi.h>
    123       1.1  augustss #include <dev/usb/usbdi_util.h>
    124      1.35  pgoyette #include <dev/usb/usbdivar.h>
    125       1.1  augustss #include <dev/usb/usbdevs.h>
    126       1.1  augustss 
    127       1.1  augustss #include <dev/usb/if_axereg.h>
    128       1.1  augustss 
    129      1.35  pgoyette #ifdef	AXE_DEBUG
    130      1.47    dyoung #define DPRINTF(x)	do { if (axedebug) printf x; } while (0)
    131      1.47    dyoung #define DPRINTFN(n,x)	do { if (axedebug >= (n)) printf x; } while (0)
    132       1.1  augustss int	axedebug = 0;
    133       1.1  augustss #else
    134       1.1  augustss #define DPRINTF(x)
    135       1.1  augustss #define DPRINTFN(n,x)
    136       1.1  augustss #endif
    137       1.1  augustss 
    138       1.1  augustss /*
    139       1.1  augustss  * Various supported device vendors/products.
    140       1.1  augustss  */
    141      1.35  pgoyette static const struct axe_type axe_devs[] = {
    142      1.35  pgoyette 	{ { USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_UFE2000}, 0 },
    143      1.35  pgoyette 	{ { USB_VENDOR_ACERCM,		USB_PRODUCT_ACERCM_EP1427X2}, 0 },
    144      1.35  pgoyette 	{ { USB_VENDOR_APPLE,		USB_PRODUCT_APPLE_ETHERNET }, AX772 },
    145       1.1  augustss 	{ { USB_VENDOR_ASIX,		USB_PRODUCT_ASIX_AX88172}, 0 },
    146      1.35  pgoyette 	{ { USB_VENDOR_ASIX,		USB_PRODUCT_ASIX_AX88772}, AX772 },
    147      1.35  pgoyette 	{ { USB_VENDOR_ASIX,		USB_PRODUCT_ASIX_AX88772A}, AX772 },
    148      1.58  christos 	{ { USB_VENDOR_ASIX,		USB_PRODUCT_ASIX_AX88772B}, AX772 | AX772B },
    149      1.59  christos 	{ { USB_VENDOR_ASIX,		USB_PRODUCT_ASIX_AX88772B_1}, AX772 | AX772B },
    150      1.35  pgoyette 	{ { USB_VENDOR_ASIX,		USB_PRODUCT_ASIX_AX88178}, AX178 },
    151      1.35  pgoyette 	{ { USB_VENDOR_ATEN,		USB_PRODUCT_ATEN_UC210T}, 0 },
    152      1.35  pgoyette 	{ { USB_VENDOR_BELKIN,		USB_PRODUCT_BELKIN_F5D5055 }, AX178 },
    153      1.35  pgoyette 	{ { USB_VENDOR_BILLIONTON,	USB_PRODUCT_BILLIONTON_USB2AR}, 0},
    154      1.35  pgoyette 	{ { USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_USB200MV2}, AX772 },
    155       1.1  augustss 	{ { USB_VENDOR_COREGA,		USB_PRODUCT_COREGA_FETHER_USB2_TX }, 0},
    156       1.1  augustss 	{ { USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DUBE100}, 0 },
    157      1.35  pgoyette 	{ { USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DUBE100B1 }, AX772 },
    158  1.67.2.1       snj 	{ { USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DUBE100B1 }, AX772 },
    159      1.60  christos 	{ { USB_VENDOR_DLINK,		USB_PRODUCT_DLINK_DUBE100C1 }, AX772 | AX772B },
    160      1.35  pgoyette 	{ { USB_VENDOR_GOODWAY,		USB_PRODUCT_GOODWAY_GWUSB2E}, 0 },
    161      1.35  pgoyette 	{ { USB_VENDOR_IODATA,		USB_PRODUCT_IODATA_ETGUS2 }, AX178 },
    162      1.35  pgoyette 	{ { USB_VENDOR_JVC,		USB_PRODUCT_JVC_MP_PRX1}, 0 },
    163      1.60  christos 	{ { USB_VENDOR_LENOVO,		USB_PRODUCT_LENOVO_ETHERNET }, AX772 | AX772B },
    164       1.1  augustss 	{ { USB_VENDOR_LINKSYS2,	USB_PRODUCT_LINKSYS2_USB200M}, 0 },
    165      1.35  pgoyette 	{ { USB_VENDOR_LINKSYS4,	USB_PRODUCT_LINKSYS4_USB1000 }, AX178 },
    166      1.35  pgoyette 	{ { USB_VENDOR_LOGITEC,		USB_PRODUCT_LOGITEC_LAN_GTJU2}, AX178 },
    167      1.35  pgoyette 	{ { USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_LUAU2GT}, AX178 },
    168       1.2  augustss 	{ { USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_LUAU2KTX}, 0 },
    169      1.35  pgoyette 	{ { USB_VENDOR_MSI,		USB_PRODUCT_MSI_AX88772A}, AX772 },
    170       1.1  augustss 	{ { USB_VENDOR_NETGEAR,		USB_PRODUCT_NETGEAR_FA120}, 0 },
    171      1.35  pgoyette 	{ { USB_VENDOR_OQO,		USB_PRODUCT_OQO_ETHER01PLUS }, AX772 },
    172      1.35  pgoyette 	{ { USB_VENDOR_PLANEX3,		USB_PRODUCT_PLANEX3_GU1000T }, AX178 },
    173      1.35  pgoyette 	{ { USB_VENDOR_SYSTEMTALKS,	USB_PRODUCT_SYSTEMTALKS_SGCX2UL}, 0 },
    174       1.1  augustss 	{ { USB_VENDOR_SITECOM,		USB_PRODUCT_SITECOM_LN029}, 0 },
    175      1.35  pgoyette 	{ { USB_VENDOR_SITECOMEU,	USB_PRODUCT_SITECOMEU_LN028 }, AX178 }
    176       1.1  augustss };
    177       1.9  christos #define axe_lookup(v, p) ((const struct axe_type *)usb_lookup(axe_devs, v, p))
    178       1.1  augustss 
    179      1.35  pgoyette int	axe_match(device_t, cfdata_t, void *);
    180      1.35  pgoyette void	axe_attach(device_t, device_t, void *);
    181      1.35  pgoyette int	axe_detach(device_t, int);
    182      1.35  pgoyette int	axe_activate(device_t, devact_t);
    183      1.35  pgoyette 
    184      1.35  pgoyette CFATTACH_DECL_NEW(axe, sizeof(struct axe_softc),
    185      1.35  pgoyette 	axe_match, axe_attach, axe_detach, axe_activate);
    186      1.35  pgoyette 
    187      1.35  pgoyette static int	axe_tx_list_init(struct axe_softc *);
    188      1.35  pgoyette static int	axe_rx_list_init(struct axe_softc *);
    189      1.35  pgoyette static int	axe_encap(struct axe_softc *, struct mbuf *, int);
    190      1.35  pgoyette static void	axe_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
    191      1.35  pgoyette static void	axe_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
    192      1.35  pgoyette static void	axe_tick(void *);
    193      1.35  pgoyette static void	axe_tick_task(void *);
    194      1.35  pgoyette static void	axe_start(struct ifnet *);
    195      1.35  pgoyette static int	axe_ioctl(struct ifnet *, u_long, void *);
    196      1.35  pgoyette static int	axe_init(struct ifnet *);
    197      1.35  pgoyette static void	axe_stop(struct ifnet *, int);
    198      1.35  pgoyette static void	axe_watchdog(struct ifnet *);
    199      1.66       roy static int	axe_miibus_readreg_locked(device_t, int, int);
    200      1.35  pgoyette static int	axe_miibus_readreg(device_t, int, int);
    201      1.66       roy static void	axe_miibus_writereg_locked(device_t, int, int, int);
    202      1.35  pgoyette static void	axe_miibus_writereg(device_t, int, int, int);
    203      1.56      matt static void	axe_miibus_statchg(struct ifnet *);
    204      1.35  pgoyette static int	axe_cmd(struct axe_softc *, int, int, int, void *);
    205      1.35  pgoyette static void	axe_reset(struct axe_softc *sc);
    206      1.35  pgoyette static int	axe_ifmedia_upd(struct ifnet *);
    207      1.35  pgoyette static void	axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
    208      1.35  pgoyette 
    209      1.35  pgoyette static void	axe_setmulti(struct axe_softc *);
    210      1.35  pgoyette static void	axe_lock_mii(struct axe_softc *sc);
    211      1.35  pgoyette static void	axe_unlock_mii(struct axe_softc *sc);
    212      1.35  pgoyette 
    213      1.35  pgoyette static void	axe_ax88178_init(struct axe_softc *);
    214      1.35  pgoyette static void	axe_ax88772_init(struct axe_softc *);
    215       1.1  augustss 
    216       1.1  augustss /* Get exclusive access to the MII registers */
    217      1.35  pgoyette static void
    218       1.1  augustss axe_lock_mii(struct axe_softc *sc)
    219       1.1  augustss {
    220      1.38   tsutsui 
    221       1.1  augustss 	sc->axe_refcnt++;
    222      1.21        ad 	mutex_enter(&sc->axe_mii_lock);
    223       1.1  augustss }
    224       1.1  augustss 
    225      1.35  pgoyette static void
    226       1.1  augustss axe_unlock_mii(struct axe_softc *sc)
    227       1.1  augustss {
    228      1.38   tsutsui 
    229      1.21        ad 	mutex_exit(&sc->axe_mii_lock);
    230       1.1  augustss 	if (--sc->axe_refcnt < 0)
    231      1.53       mrg 		usb_detach_wakeupold((sc->axe_dev));
    232       1.1  augustss }
    233       1.1  augustss 
    234      1.35  pgoyette static int
    235       1.1  augustss axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
    236       1.1  augustss {
    237      1.38   tsutsui 	usb_device_request_t req;
    238      1.38   tsutsui 	usbd_status err;
    239       1.1  augustss 
    240      1.21        ad 	KASSERT(mutex_owned(&sc->axe_mii_lock));
    241      1.21        ad 
    242       1.1  augustss 	if (sc->axe_dying)
    243      1.35  pgoyette 		return 0;
    244       1.1  augustss 
    245       1.1  augustss 	if (AXE_CMD_DIR(cmd))
    246       1.1  augustss 		req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
    247       1.1  augustss 	else
    248       1.1  augustss 		req.bmRequestType = UT_READ_VENDOR_DEVICE;
    249       1.1  augustss 	req.bRequest = AXE_CMD_CMD(cmd);
    250       1.1  augustss 	USETW(req.wValue, val);
    251       1.1  augustss 	USETW(req.wIndex, index);
    252       1.1  augustss 	USETW(req.wLength, AXE_CMD_LEN(cmd));
    253       1.1  augustss 
    254       1.1  augustss 	err = usbd_do_request(sc->axe_udev, &req, buf);
    255       1.1  augustss 
    256      1.35  pgoyette 	if (err) {
    257      1.35  pgoyette 		DPRINTF(("axe_cmd err: cmd %d err %d\n", cmd, err));
    258      1.35  pgoyette 		return -1;
    259      1.35  pgoyette 	}
    260      1.35  pgoyette 	return 0;
    261       1.1  augustss }
    262       1.1  augustss 
    263      1.35  pgoyette static int
    264      1.66       roy axe_miibus_readreg_locked(device_t dev, int phy, int reg)
    265       1.1  augustss {
    266      1.28    dyoung 	struct axe_softc *sc = device_private(dev);
    267      1.38   tsutsui 	usbd_status err;
    268      1.38   tsutsui 	uint16_t val;
    269       1.1  augustss 
    270      1.66       roy 	axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
    271      1.66       roy 	err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, (void *)&val);
    272      1.66       roy 	axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
    273      1.66       roy 	if (err) {
    274      1.66       roy 		aprint_error_dev(sc->axe_dev, "read PHY failed\n");
    275      1.66       roy 		return -1;
    276      1.66       roy 	}
    277      1.66       roy 
    278      1.66       roy 	val = le16toh(val);
    279      1.66       roy 	if (sc->axe_flags & AX772 && reg == MII_BMSR) {
    280      1.66       roy 		/*
    281      1.66       roy 		 * BMSR of AX88772 indicates it supports extended
    282      1.66       roy 		 * capability but the extended status register is
    283      1.66       roy 		 * reserverd for embedded ethernet PHY. So clear the
    284      1.66       roy 		 * extended capability bit of BMSR.
    285      1.66       roy 		 */
    286      1.66       roy 		 val &= ~BMSR_EXTCAP;
    287       1.1  augustss 	}
    288       1.1  augustss 
    289      1.66       roy 	DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x val 0x%x\n",
    290      1.66       roy 	    phy, reg, val));
    291      1.66       roy 
    292      1.66       roy 	return val;
    293      1.66       roy }
    294      1.66       roy 
    295      1.66       roy static int
    296      1.66       roy axe_miibus_readreg(device_t dev, int phy, int reg)
    297      1.66       roy {
    298      1.66       roy 	struct axe_softc *sc = device_private(dev);
    299      1.66       roy 	int val;
    300      1.66       roy 
    301      1.66       roy 	if (sc->axe_dying)
    302      1.66       roy 		return 0;
    303       1.1  augustss 
    304      1.66       roy 	if (sc->axe_phyno != phy)
    305      1.66       roy 		return 0;
    306       1.1  augustss 
    307      1.66       roy 	axe_lock_mii(sc);
    308      1.66       roy 	val = axe_miibus_readreg_locked(dev, phy, reg);
    309      1.66       roy 	axe_unlock_mii(sc);
    310       1.1  augustss 
    311      1.66       roy 	return val;
    312       1.1  augustss }
    313       1.1  augustss 
    314      1.35  pgoyette static void
    315      1.66       roy axe_miibus_writereg_locked(device_t dev, int phy, int reg, int aval)
    316       1.1  augustss {
    317      1.38   tsutsui 	struct axe_softc *sc = device_private(dev);
    318      1.38   tsutsui 	usbd_status err;
    319      1.38   tsutsui 	uint16_t val;
    320       1.1  augustss 
    321      1.66       roy 	val = htole16(aval);
    322       1.1  augustss 
    323       1.1  augustss 	axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
    324       1.1  augustss 	err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, (void *)&val);
    325       1.1  augustss 	axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
    326       1.1  augustss 
    327       1.1  augustss 	if (err) {
    328      1.25      cube 		aprint_error_dev(sc->axe_dev, "write PHY failed\n");
    329       1.1  augustss 		return;
    330       1.1  augustss 	}
    331       1.1  augustss }
    332       1.1  augustss 
    333      1.35  pgoyette static void
    334      1.66       roy axe_miibus_writereg(device_t dev, int phy, int reg, int aval)
    335      1.66       roy {
    336      1.66       roy 	struct axe_softc *sc = device_private(dev);
    337      1.66       roy 
    338      1.66       roy 	if (sc->axe_dying)
    339      1.66       roy 		return;
    340      1.66       roy 
    341      1.66       roy 	if (sc->axe_phyno != phy)
    342      1.66       roy 		return;
    343      1.66       roy 
    344      1.66       roy 	axe_lock_mii(sc);
    345      1.66       roy 	axe_miibus_writereg_locked(dev, phy, reg, aval);
    346      1.66       roy 	axe_unlock_mii(sc);
    347      1.66       roy }
    348      1.66       roy 
    349      1.66       roy static void
    350      1.56      matt axe_miibus_statchg(struct ifnet *ifp)
    351       1.1  augustss {
    352      1.56      matt 	struct axe_softc *sc = ifp->if_softc;
    353      1.38   tsutsui 	struct mii_data *mii = &sc->axe_mii;
    354       1.5  augustss 	int val, err;
    355       1.5  augustss 
    356       1.5  augustss 	if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
    357       1.5  augustss 		val = AXE_MEDIA_FULL_DUPLEX;
    358       1.5  augustss 	else
    359       1.5  augustss 		val = 0;
    360      1.35  pgoyette 
    361      1.35  pgoyette 	if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
    362      1.35  pgoyette 		val |= (AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC);
    363      1.66       roy 		if (sc->axe_flags & AX178)
    364      1.66       roy 			val |= AXE_178_MEDIA_ENCK;
    365      1.35  pgoyette 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
    366      1.38   tsutsui 		case IFM_1000_T:
    367      1.35  pgoyette 			val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
    368      1.35  pgoyette 			break;
    369      1.35  pgoyette 		case IFM_100_TX:
    370      1.35  pgoyette 			val |= AXE_178_MEDIA_100TX;
    371      1.35  pgoyette 			break;
    372      1.35  pgoyette 		case IFM_10_T:
    373      1.35  pgoyette 			/* doesn't need to be handled */
    374      1.35  pgoyette 			break;
    375      1.35  pgoyette 		}
    376      1.35  pgoyette 	}
    377      1.35  pgoyette 
    378       1.5  augustss 	DPRINTF(("axe_miibus_statchg: val=0x%x\n", val));
    379      1.21        ad 	axe_lock_mii(sc);
    380       1.5  augustss 	err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
    381      1.21        ad 	axe_unlock_mii(sc);
    382       1.5  augustss 	if (err) {
    383      1.25      cube 		aprint_error_dev(sc->axe_dev, "media change failed\n");
    384       1.5  augustss 		return;
    385       1.5  augustss 	}
    386       1.1  augustss }
    387       1.1  augustss 
    388      1.35  pgoyette /*
    389      1.35  pgoyette  * Set media options
    390      1.35  pgoyette  */
    391      1.35  pgoyette static int
    392      1.35  pgoyette axe_ifmedia_upd(struct ifnet *ifp)
    393      1.35  pgoyette {
    394      1.38   tsutsui 	struct axe_softc *sc = ifp->if_softc;
    395      1.38   tsutsui 	struct mii_data *mii = &sc->axe_mii;
    396      1.38   tsutsui 	int rc;
    397      1.35  pgoyette 
    398      1.35  pgoyette 	sc->axe_link = 0;
    399      1.35  pgoyette 
    400      1.35  pgoyette 	if (mii->mii_instance) {
    401      1.35  pgoyette 		struct mii_softc *miisc;
    402      1.35  pgoyette 
    403      1.35  pgoyette 		LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
    404      1.35  pgoyette 			mii_phy_reset(miisc);
    405      1.35  pgoyette 	}
    406      1.35  pgoyette 
    407      1.35  pgoyette 	if ((rc = mii_mediachg(mii)) == ENXIO)
    408      1.35  pgoyette 		return 0;
    409      1.35  pgoyette 	return rc;
    410      1.35  pgoyette }
    411      1.35  pgoyette 
    412      1.35  pgoyette /*
    413      1.35  pgoyette  * Report current media status
    414      1.35  pgoyette  */
    415      1.35  pgoyette static void
    416      1.35  pgoyette axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
    417      1.35  pgoyette {
    418      1.35  pgoyette 	struct axe_softc	*sc = ifp->if_softc;
    419      1.35  pgoyette 	struct mii_data		*mii = &sc->axe_mii;
    420      1.35  pgoyette 
    421      1.35  pgoyette 	mii_pollstat(mii);
    422      1.35  pgoyette 	ifmr->ifm_active = mii->mii_media_active;
    423      1.35  pgoyette 	ifmr->ifm_status = mii->mii_media_status;
    424      1.35  pgoyette }
    425      1.35  pgoyette 
    426      1.35  pgoyette static void
    427       1.1  augustss axe_setmulti(struct axe_softc *sc)
    428       1.1  augustss {
    429      1.38   tsutsui 	struct ifnet *ifp = &sc->sc_if;
    430      1.38   tsutsui 	struct ether_multi *enm;
    431      1.38   tsutsui 	struct ether_multistep step;
    432      1.38   tsutsui 	uint32_t h = 0;
    433      1.38   tsutsui 	uint16_t rxmode;
    434      1.38   tsutsui 	uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
    435       1.1  augustss 
    436       1.1  augustss 	if (sc->axe_dying)
    437       1.1  augustss 		return;
    438       1.1  augustss 
    439      1.21        ad 	axe_lock_mii(sc);
    440       1.1  augustss 	axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, (void *)&rxmode);
    441      1.10      tron 	rxmode = le16toh(rxmode);
    442       1.1  augustss 
    443      1.35  pgoyette 	rxmode &= ~(AXE_RXCMD_ALLMULTI | AXE_RXCMD_PROMISC);
    444      1.35  pgoyette 
    445      1.35  pgoyette 	/* If we want promiscuous mode, set the allframes bit */
    446      1.35  pgoyette 	if (ifp->if_flags & IFF_PROMISC) {
    447      1.35  pgoyette 		rxmode |= AXE_RXCMD_PROMISC;
    448      1.35  pgoyette 		goto allmulti;
    449      1.35  pgoyette 	}
    450       1.1  augustss 
    451      1.35  pgoyette 	/* Now program new ones */
    452       1.1  augustss 	ETHER_FIRST_MULTI(step, &sc->axe_ec, enm);
    453       1.1  augustss 	while (enm != NULL) {
    454       1.1  augustss 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
    455      1.38   tsutsui 		    ETHER_ADDR_LEN) != 0)
    456       1.1  augustss 			goto allmulti;
    457       1.1  augustss 
    458       1.1  augustss 		h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26;
    459      1.35  pgoyette 		hashtbl[h >> 3] |= 1U << (h & 7);
    460       1.1  augustss 		ETHER_NEXT_MULTI(step, enm);
    461       1.1  augustss 	}
    462       1.1  augustss 	ifp->if_flags &= ~IFF_ALLMULTI;
    463       1.1  augustss 	axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
    464       1.1  augustss 	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
    465      1.21        ad 	axe_unlock_mii(sc);
    466       1.1  augustss 	return;
    467      1.35  pgoyette 
    468      1.35  pgoyette  allmulti:
    469      1.35  pgoyette 	ifp->if_flags |= IFF_ALLMULTI;
    470      1.35  pgoyette 	rxmode |= AXE_RXCMD_ALLMULTI;
    471      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
    472      1.35  pgoyette 	axe_unlock_mii(sc);
    473       1.1  augustss }
    474       1.1  augustss 
    475      1.35  pgoyette static void
    476       1.1  augustss axe_reset(struct axe_softc *sc)
    477       1.1  augustss {
    478      1.38   tsutsui 
    479       1.1  augustss 	if (sc->axe_dying)
    480       1.1  augustss 		return;
    481       1.1  augustss 	/* XXX What to reset? */
    482       1.1  augustss 
    483       1.1  augustss 	/* Wait a little while for the chip to get its brains in order. */
    484       1.1  augustss 	DELAY(1000);
    485       1.1  augustss }
    486       1.1  augustss 
    487      1.66       roy static int
    488      1.66       roy axe_get_phyno(struct axe_softc *sc, int sel)
    489      1.66       roy {
    490      1.66       roy 	int phyno;
    491      1.66       roy 
    492      1.66       roy 	switch (AXE_PHY_TYPE(sc->axe_phyaddrs[sel])) {
    493      1.66       roy 	case PHY_TYPE_100_HOME:
    494      1.66       roy 		/* FALLTHROUGH */
    495      1.66       roy 	case PHY_TYPE_GIG:
    496      1.66       roy 		phyno = AXE_PHY_NO(sc->axe_phyaddrs[sel]);
    497      1.66       roy 		break;
    498      1.66       roy 	case PHY_TYPE_SPECIAL:
    499      1.66       roy 		/* FALLTHROUGH */
    500      1.66       roy 	case PHY_TYPE_RSVD:
    501      1.66       roy 		/* FALLTHROUGH */
    502      1.66       roy 	case PHY_TYPE_NON_SUP:
    503      1.66       roy 		/* FALLTHROUGH */
    504      1.66       roy 	default:
    505      1.66       roy 		phyno = -1;
    506      1.66       roy 		break;
    507      1.66       roy 	}
    508      1.66       roy 
    509      1.66       roy 	return phyno;
    510      1.66       roy }
    511      1.66       roy 
    512      1.66       roy #define	AXE_GPIO_WRITE(x, y)	do {				\
    513      1.66       roy 	axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL);		\
    514      1.66       roy 	usbd_delay_ms(sc->axe_udev, hztoms(y));			\
    515      1.66       roy } while (0)
    516      1.66       roy 
    517      1.35  pgoyette static void
    518      1.35  pgoyette axe_ax88178_init(struct axe_softc *sc)
    519      1.35  pgoyette {
    520      1.66       roy 	int gpio0, ledmode, phymode;
    521      1.66       roy 	uint16_t eeprom, val;
    522      1.35  pgoyette 
    523      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
    524      1.35  pgoyette 	/* XXX magic */
    525      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
    526      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
    527      1.35  pgoyette 
    528      1.35  pgoyette 	eeprom = le16toh(eeprom);
    529      1.35  pgoyette 
    530      1.35  pgoyette 	DPRINTF((" EEPROM is 0x%x\n", eeprom));
    531      1.35  pgoyette 
    532      1.35  pgoyette 	/* if EEPROM is invalid we have to use to GPIO0 */
    533      1.35  pgoyette 	if (eeprom == 0xffff) {
    534      1.66       roy 		phymode = AXE_PHY_MODE_MARVELL;
    535      1.35  pgoyette 		gpio0 = 1;
    536      1.66       roy 		ledmode = 0;
    537      1.35  pgoyette 	} else {
    538      1.66       roy 		phymode = eeprom & 0x7f;
    539      1.35  pgoyette 		gpio0 = (eeprom & 0x80) ? 0 : 1;
    540      1.66       roy 		ledmode = eeprom >> 8;
    541      1.35  pgoyette 	}
    542      1.35  pgoyette 
    543      1.35  pgoyette 	DPRINTF(("use gpio0: %d, phymode %d\n", gpio0, phymode));
    544      1.35  pgoyette 
    545      1.66       roy 	/* Program GPIOs depending on PHY hardware. */
    546      1.66       roy 	switch (phymode) {
    547      1.66       roy 	case AXE_PHY_MODE_MARVELL:
    548      1.66       roy 		if (gpio0 == 1) {
    549      1.66       roy 			AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0_EN,
    550      1.66       roy 			    hz / 32);
    551      1.66       roy 			AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN,
    552      1.66       roy 			    hz / 32);
    553      1.66       roy 			AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2_EN, hz / 4);
    554      1.66       roy 			AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN,
    555      1.66       roy 			    hz / 32);
    556      1.66       roy 		} else {
    557      1.66       roy 			AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
    558      1.66       roy 			    AXE_GPIO1_EN, hz / 3);
    559      1.66       roy 			if (ledmode == 1) {
    560      1.66       roy 				AXE_GPIO_WRITE(AXE_GPIO1_EN, hz / 3);
    561      1.66       roy 				AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN,
    562      1.66       roy 				    hz / 3);
    563      1.66       roy 			} else {
    564      1.66       roy 				AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
    565      1.66       roy 				    AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
    566      1.66       roy 				AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
    567      1.66       roy 				    AXE_GPIO2_EN, hz / 4);
    568      1.66       roy 				AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
    569      1.66       roy 				    AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
    570      1.66       roy 			}
    571      1.66       roy 		}
    572      1.66       roy 		break;
    573      1.66       roy 	case AXE_PHY_MODE_CICADA:
    574      1.66       roy 	case AXE_PHY_MODE_CICADA_V2:
    575      1.66       roy 	case AXE_PHY_MODE_CICADA_V2_ASIX:
    576      1.66       roy 		if (gpio0 == 1)
    577      1.66       roy 			AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0 |
    578      1.66       roy 			    AXE_GPIO0_EN, hz / 32);
    579      1.66       roy 		else
    580      1.66       roy 			AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
    581      1.66       roy 			    AXE_GPIO1_EN, hz / 32);
    582      1.66       roy 		break;
    583      1.66       roy 	case AXE_PHY_MODE_AGERE:
    584      1.66       roy 		AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
    585      1.66       roy 		    AXE_GPIO1_EN, hz / 32);
    586      1.66       roy 		AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 |
    587      1.66       roy 		    AXE_GPIO2_EN, hz / 32);
    588      1.66       roy 		AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2_EN, hz / 4);
    589      1.66       roy 		AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 |
    590      1.66       roy 		    AXE_GPIO2_EN, hz / 32);
    591      1.66       roy 		break;
    592      1.66       roy 	case AXE_PHY_MODE_REALTEK_8211CL:
    593      1.66       roy 	case AXE_PHY_MODE_REALTEK_8211BN:
    594      1.66       roy 	case AXE_PHY_MODE_REALTEK_8251CL:
    595      1.66       roy 		val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN :
    596      1.66       roy 		    AXE_GPIO1 | AXE_GPIO1_EN;
    597      1.66       roy 		AXE_GPIO_WRITE(val, hz / 32);
    598      1.66       roy 		AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
    599      1.66       roy 		AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4);
    600      1.66       roy 		AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
    601      1.66       roy 		if (phymode == AXE_PHY_MODE_REALTEK_8211CL) {
    602      1.66       roy 			axe_miibus_writereg_locked(sc->axe_dev,
    603      1.66       roy 			    sc->axe_phyno, 0x1F, 0x0005);
    604      1.66       roy 			axe_miibus_writereg_locked(sc->axe_dev,
    605      1.66       roy 			    sc->axe_phyno, 0x0C, 0x0000);
    606      1.66       roy 			val = axe_miibus_readreg_locked(sc->axe_dev,
    607      1.66       roy 			    sc->axe_phyno, 0x0001);
    608      1.66       roy 			axe_miibus_writereg_locked(sc->axe_dev,
    609      1.66       roy 			    sc->axe_phyno, 0x01, val | 0x0080);
    610      1.66       roy 			axe_miibus_writereg_locked(sc->axe_dev,
    611      1.66       roy 			    sc->axe_phyno, 0x1F, 0x0000);
    612      1.66       roy 		}
    613      1.66       roy 		break;
    614      1.66       roy 	default:
    615      1.66       roy 		/* Unknown PHY model or no need to program GPIOs. */
    616      1.66       roy 		break;
    617      1.35  pgoyette 	}
    618      1.35  pgoyette 
    619      1.35  pgoyette 	/* soft reset */
    620      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
    621      1.35  pgoyette 	usbd_delay_ms(sc->axe_udev, 150);
    622      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
    623      1.35  pgoyette 	    AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL);
    624      1.35  pgoyette 	usbd_delay_ms(sc->axe_udev, 150);
    625      1.35  pgoyette 	/* Enable MII/GMII/RGMII for external PHY */
    626      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
    627      1.35  pgoyette 	usbd_delay_ms(sc->axe_udev, 10);
    628      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
    629      1.35  pgoyette }
    630      1.35  pgoyette 
    631      1.35  pgoyette static void
    632      1.35  pgoyette axe_ax88772_init(struct axe_softc *sc)
    633      1.35  pgoyette {
    634      1.35  pgoyette 
    635      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
    636      1.35  pgoyette 	usbd_delay_ms(sc->axe_udev, 40);
    637      1.35  pgoyette 
    638      1.66       roy 	if (sc->axe_phyno == AXE_772_PHY_NO_EPHY) {
    639      1.35  pgoyette 		/* ask for the embedded PHY */
    640      1.35  pgoyette 		axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
    641      1.35  pgoyette 		usbd_delay_ms(sc->axe_udev, 10);
    642      1.35  pgoyette 
    643      1.35  pgoyette 		/* power down and reset state, pin reset state */
    644      1.35  pgoyette 		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
    645      1.35  pgoyette 		usbd_delay_ms(sc->axe_udev, 60);
    646      1.35  pgoyette 
    647      1.35  pgoyette 		/* power down/reset state, pin operating state */
    648      1.35  pgoyette 		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
    649      1.35  pgoyette 		    AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
    650      1.35  pgoyette 		usbd_delay_ms(sc->axe_udev, 150);
    651      1.35  pgoyette 
    652      1.35  pgoyette 		/* power up, reset */
    653      1.35  pgoyette 		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
    654      1.35  pgoyette 
    655      1.35  pgoyette 		/* power up, operating */
    656      1.35  pgoyette 		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
    657      1.35  pgoyette 		    AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL);
    658      1.35  pgoyette 	} else {
    659      1.35  pgoyette 		/* ask for external PHY */
    660      1.35  pgoyette 		axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
    661      1.35  pgoyette 		usbd_delay_ms(sc->axe_udev, 10);
    662      1.35  pgoyette 
    663      1.35  pgoyette 		/* power down internal PHY */
    664      1.35  pgoyette 		axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
    665      1.35  pgoyette 		    AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
    666      1.35  pgoyette 	}
    667      1.35  pgoyette 
    668      1.35  pgoyette 	usbd_delay_ms(sc->axe_udev, 150);
    669      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
    670      1.35  pgoyette }
    671      1.35  pgoyette 
    672       1.1  augustss /*
    673       1.1  augustss  * Probe for a AX88172 chip.
    674       1.1  augustss  */
    675      1.27    dyoung int
    676      1.27    dyoung axe_match(device_t parent, cfdata_t match, void *aux)
    677       1.1  augustss {
    678      1.27    dyoung 	struct usb_attach_arg *uaa = aux;
    679       1.1  augustss 
    680      1.38   tsutsui 	return axe_lookup(uaa->vendor, uaa->product) != NULL ?
    681      1.38   tsutsui 	    UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
    682       1.1  augustss }
    683       1.1  augustss 
    684       1.1  augustss /*
    685       1.1  augustss  * Attach the interface. Allocate softc structures, do ifmedia
    686       1.1  augustss  * setup and ethernet/BPF attach.
    687       1.1  augustss  */
    688      1.27    dyoung void
    689      1.27    dyoung axe_attach(device_t parent, device_t self, void *aux)
    690       1.1  augustss {
    691      1.27    dyoung 	struct axe_softc *sc = device_private(self);
    692      1.27    dyoung 	struct usb_attach_arg *uaa = aux;
    693       1.1  augustss 	usbd_device_handle dev = uaa->device;
    694       1.1  augustss 	usbd_status err;
    695       1.1  augustss 	usb_interface_descriptor_t *id;
    696       1.1  augustss 	usb_endpoint_descriptor_t *ed;
    697       1.1  augustss 	struct mii_data	*mii;
    698      1.35  pgoyette 	uint8_t eaddr[ETHER_ADDR_LEN];
    699       1.8  augustss 	char *devinfop;
    700      1.25      cube 	const char *devname = device_xname(self);
    701       1.1  augustss 	struct ifnet *ifp;
    702       1.1  augustss 	int i, s;
    703       1.1  augustss 
    704      1.28    dyoung 	aprint_naive("\n");
    705      1.28    dyoung 	aprint_normal("\n");
    706      1.29    plunky 
    707      1.35  pgoyette 	sc->axe_dev = self;
    708      1.35  pgoyette 	sc->axe_udev = dev;
    709      1.35  pgoyette 
    710      1.29    plunky 	devinfop = usbd_devinfo_alloc(dev, 0);
    711      1.29    plunky 	aprint_normal_dev(self, "%s\n", devinfop);
    712      1.29    plunky 	usbd_devinfo_free(devinfop);
    713       1.1  augustss 
    714       1.1  augustss 	err = usbd_set_config_no(dev, AXE_CONFIG_NO, 1);
    715       1.1  augustss 	if (err) {
    716      1.61     skrll 		aprint_error_dev(self, "failed to set configuration"
    717      1.61     skrll 		    ", err=%s\n", usbd_errstr(err));
    718      1.28    dyoung 		return;
    719       1.1  augustss 	}
    720       1.1  augustss 
    721      1.35  pgoyette 	sc->axe_flags = axe_lookup(uaa->vendor, uaa->product)->axe_flags;
    722      1.35  pgoyette 
    723      1.35  pgoyette 	mutex_init(&sc->axe_mii_lock, MUTEX_DEFAULT, IPL_NONE);
    724      1.64  jmcneill 	usb_init_task(&sc->axe_tick_task, axe_tick_task, sc, 0);
    725       1.1  augustss 
    726       1.1  augustss 	err = usbd_device2interface_handle(dev, AXE_IFACE_IDX, &sc->axe_iface);
    727       1.1  augustss 	if (err) {
    728      1.25      cube 		aprint_error_dev(self, "getting interface handle failed\n");
    729      1.28    dyoung 		return;
    730       1.1  augustss 	}
    731       1.1  augustss 
    732       1.1  augustss 	sc->axe_product = uaa->product;
    733       1.1  augustss 	sc->axe_vendor = uaa->vendor;
    734       1.1  augustss 
    735       1.1  augustss 	id = usbd_get_interface_descriptor(sc->axe_iface);
    736       1.1  augustss 
    737      1.35  pgoyette 	/* decide on what our bufsize will be */
    738      1.35  pgoyette 	if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
    739      1.35  pgoyette 		sc->axe_bufsz = (sc->axe_udev->speed == USB_SPEED_HIGH) ?
    740      1.35  pgoyette 		    AXE_178_MAX_BUFSZ : AXE_178_MIN_BUFSZ;
    741      1.35  pgoyette 	else
    742      1.35  pgoyette 		sc->axe_bufsz = AXE_172_BUFSZ;
    743      1.35  pgoyette 
    744       1.1  augustss 	/* Find endpoints. */
    745       1.1  augustss 	for (i = 0; i < id->bNumEndpoints; i++) {
    746       1.1  augustss 		ed = usbd_interface2endpoint_descriptor(sc->axe_iface, i);
    747      1.38   tsutsui 		if (ed == NULL) {
    748      1.25      cube 			aprint_error_dev(self, "couldn't get ep %d\n", i);
    749      1.28    dyoung 			return;
    750       1.1  augustss 		}
    751       1.1  augustss 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
    752       1.1  augustss 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
    753       1.1  augustss 			sc->axe_ed[AXE_ENDPT_RX] = ed->bEndpointAddress;
    754       1.1  augustss 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
    755       1.1  augustss 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
    756       1.1  augustss 			sc->axe_ed[AXE_ENDPT_TX] = ed->bEndpointAddress;
    757       1.1  augustss 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
    758       1.1  augustss 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
    759       1.1  augustss 			sc->axe_ed[AXE_ENDPT_INTR] = ed->bEndpointAddress;
    760       1.1  augustss 		}
    761       1.1  augustss 	}
    762       1.1  augustss 
    763       1.1  augustss 	s = splnet();
    764       1.1  augustss 
    765      1.35  pgoyette 	/* We need the PHYID for init dance in some cases */
    766      1.35  pgoyette 	axe_lock_mii(sc);
    767      1.35  pgoyette 	axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, (void *)&sc->axe_phyaddrs);
    768      1.35  pgoyette 
    769      1.35  pgoyette 	DPRINTF((" phyaddrs[0]: %x phyaddrs[1]: %x\n",
    770      1.35  pgoyette 	    sc->axe_phyaddrs[0], sc->axe_phyaddrs[1]));
    771      1.66       roy 	sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI);
    772      1.66       roy 	if (sc->axe_phyno == -1)
    773      1.66       roy 		sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC);
    774      1.66       roy 	if (sc->axe_phyno == -1) {
    775      1.66       roy 		DPRINTF((" no valid PHY address found, assuming PHY address 0\n"));
    776      1.66       roy 		sc->axe_phyno = 0;
    777      1.66       roy 	}
    778      1.35  pgoyette 
    779      1.35  pgoyette 	if (sc->axe_flags & AX178)
    780      1.35  pgoyette 		axe_ax88178_init(sc);
    781      1.35  pgoyette 	else if (sc->axe_flags & AX772)
    782      1.35  pgoyette 		axe_ax88772_init(sc);
    783      1.35  pgoyette 
    784       1.1  augustss 	/*
    785       1.1  augustss 	 * Get station address.
    786       1.1  augustss 	 */
    787      1.35  pgoyette 	if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
    788      1.35  pgoyette 		axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, &eaddr);
    789      1.38   tsutsui 	else
    790      1.35  pgoyette 		axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, &eaddr);
    791       1.1  augustss 
    792       1.1  augustss 	/*
    793      1.35  pgoyette 	 * Load IPG values
    794       1.1  augustss 	 */
    795       1.1  augustss 	axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, (void *)&sc->axe_ipgs);
    796      1.21        ad 	axe_unlock_mii(sc);
    797       1.1  augustss 
    798       1.1  augustss 	/*
    799       1.1  augustss 	 * An ASIX chip was detected. Inform the world.
    800       1.1  augustss 	 */
    801      1.35  pgoyette 	aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(eaddr));
    802       1.1  augustss 
    803       1.1  augustss 	/* Initialize interface info.*/
    804      1.35  pgoyette 	ifp = &sc->sc_if;
    805       1.1  augustss 	ifp->if_softc = sc;
    806       1.1  augustss 	strncpy(ifp->if_xname, devname, IFNAMSIZ);
    807       1.1  augustss 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    808       1.1  augustss 	ifp->if_ioctl = axe_ioctl;
    809       1.1  augustss 	ifp->if_start = axe_start;
    810      1.35  pgoyette 	ifp->if_init = axe_init;
    811      1.35  pgoyette 	ifp->if_stop = axe_stop;
    812       1.1  augustss 	ifp->if_watchdog = axe_watchdog;
    813       1.1  augustss 
    814      1.35  pgoyette 	IFQ_SET_READY(&ifp->if_snd);
    815       1.1  augustss 
    816      1.35  pgoyette 	sc->axe_ec.ec_capabilities = ETHERCAP_VLAN_MTU;
    817       1.1  augustss 
    818       1.1  augustss 	/* Initialize MII/media info. */
    819       1.1  augustss 	mii = &sc->axe_mii;
    820       1.1  augustss 	mii->mii_ifp = ifp;
    821       1.1  augustss 	mii->mii_readreg = axe_miibus_readreg;
    822       1.1  augustss 	mii->mii_writereg = axe_miibus_writereg;
    823       1.1  augustss 	mii->mii_statchg = axe_miibus_statchg;
    824       1.1  augustss 	mii->mii_flags = MIIF_AUTOTSLEEP;
    825       1.1  augustss 
    826      1.22    dyoung 	sc->axe_ec.ec_mii = mii;
    827      1.35  pgoyette 	if (sc->axe_flags & AXE_MII)
    828      1.35  pgoyette 		ifmedia_init(&mii->mii_media, 0, axe_ifmedia_upd,
    829      1.35  pgoyette 		    axe_ifmedia_sts);
    830      1.35  pgoyette 	else
    831      1.35  pgoyette 		ifmedia_init(&mii->mii_media, 0, ether_mediachange,
    832      1.35  pgoyette 		    ether_mediastatus);
    833      1.35  pgoyette 
    834      1.35  pgoyette 	mii_attach(sc->axe_dev, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
    835      1.35  pgoyette 	    0);
    836       1.1  augustss 
    837      1.22    dyoung 	if (LIST_EMPTY(&mii->mii_phys)) {
    838       1.1  augustss 		ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
    839       1.1  augustss 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
    840       1.1  augustss 	} else
    841       1.1  augustss 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
    842       1.1  augustss 
    843       1.1  augustss 	/* Attach the interface. */
    844       1.1  augustss 	if_attach(ifp);
    845      1.28    dyoung 	ether_ifattach(ifp, eaddr);
    846      1.28    dyoung 	rnd_attach_source(&sc->rnd_source, device_xname(sc->axe_dev),
    847      1.67       tls 	    RND_TYPE_NET, RND_FLAG_DEFAULT);
    848       1.1  augustss 
    849      1.35  pgoyette 	callout_init(&sc->axe_stat_ch, 0);
    850      1.35  pgoyette 	callout_setfunc(&sc->axe_stat_ch, axe_tick, sc);
    851       1.1  augustss 
    852      1.45   tsutsui 	sc->axe_attached = true;
    853       1.1  augustss 	splx(s);
    854       1.1  augustss 
    855      1.28    dyoung 	usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->axe_udev, sc->axe_dev);
    856       1.1  augustss }
    857       1.1  augustss 
    858      1.27    dyoung int
    859      1.27    dyoung axe_detach(device_t self, int flags)
    860       1.1  augustss {
    861      1.38   tsutsui 	struct axe_softc *sc = device_private(self);
    862      1.38   tsutsui 	int s;
    863      1.38   tsutsui 	struct ifnet *ifp = &sc->sc_if;
    864       1.1  augustss 
    865      1.47    dyoung 	DPRINTFN(2,("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
    866       1.1  augustss 
    867       1.1  augustss 	/* Detached before attached finished, so just bail out. */
    868       1.1  augustss 	if (!sc->axe_attached)
    869      1.35  pgoyette 		return 0;
    870       1.1  augustss 
    871      1.45   tsutsui 	sc->axe_dying = true;
    872       1.1  augustss 
    873       1.1  augustss 	/*
    874       1.1  augustss 	 * Remove any pending tasks.  They cannot be executing because they run
    875       1.1  augustss 	 * in the same thread as detach.
    876       1.1  augustss 	 */
    877       1.1  augustss 	usb_rem_task(sc->axe_udev, &sc->axe_tick_task);
    878       1.1  augustss 
    879       1.1  augustss 	s = splusb();
    880       1.1  augustss 
    881       1.1  augustss 	if (ifp->if_flags & IFF_RUNNING)
    882      1.35  pgoyette 		axe_stop(ifp, 1);
    883       1.1  augustss 
    884      1.36   tsutsui 	callout_destroy(&sc->axe_stat_ch);
    885      1.36   tsutsui 	mutex_destroy(&sc->axe_mii_lock);
    886       1.1  augustss 	rnd_detach_source(&sc->rnd_source);
    887       1.1  augustss 	mii_detach(&sc->axe_mii, MII_PHY_ANY, MII_OFFSET_ANY);
    888       1.1  augustss 	ifmedia_delete_instance(&sc->axe_mii.mii_media, IFM_INST_ANY);
    889       1.1  augustss 	ether_ifdetach(ifp);
    890       1.1  augustss 	if_detach(ifp);
    891       1.1  augustss 
    892       1.1  augustss #ifdef DIAGNOSTIC
    893       1.1  augustss 	if (sc->axe_ep[AXE_ENDPT_TX] != NULL ||
    894       1.1  augustss 	    sc->axe_ep[AXE_ENDPT_RX] != NULL ||
    895       1.1  augustss 	    sc->axe_ep[AXE_ENDPT_INTR] != NULL)
    896      1.25      cube 		aprint_debug_dev(self, "detach has active endpoints\n");
    897       1.1  augustss #endif
    898       1.1  augustss 
    899      1.45   tsutsui 	sc->axe_attached = false;
    900       1.1  augustss 
    901       1.1  augustss 	if (--sc->axe_refcnt >= 0) {
    902       1.1  augustss 		/* Wait for processes to go away. */
    903      1.54       mrg 		usb_detach_waitold(sc->axe_dev);
    904       1.1  augustss 	}
    905       1.1  augustss 	splx(s);
    906       1.1  augustss 
    907      1.28    dyoung 	usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->axe_udev, sc->axe_dev);
    908       1.1  augustss 
    909      1.35  pgoyette 	return 0;
    910       1.1  augustss }
    911       1.1  augustss 
    912       1.1  augustss int
    913      1.35  pgoyette axe_activate(device_t self, devact_t act)
    914       1.1  augustss {
    915      1.25      cube 	struct axe_softc *sc = device_private(self);
    916       1.1  augustss 
    917      1.47    dyoung 	DPRINTFN(2,("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
    918       1.1  augustss 
    919       1.1  augustss 	switch (act) {
    920       1.1  augustss 	case DVACT_DEACTIVATE:
    921       1.1  augustss 		if_deactivate(&sc->axe_ec.ec_if);
    922      1.45   tsutsui 		sc->axe_dying = true;
    923      1.30    dyoung 		return 0;
    924      1.30    dyoung 	default:
    925      1.30    dyoung 		return EOPNOTSUPP;
    926       1.1  augustss 	}
    927       1.1  augustss }
    928       1.1  augustss 
    929      1.35  pgoyette static int
    930       1.1  augustss axe_rx_list_init(struct axe_softc *sc)
    931       1.1  augustss {
    932       1.1  augustss 	struct axe_cdata *cd;
    933       1.1  augustss 	struct axe_chain *c;
    934       1.1  augustss 	int i;
    935       1.1  augustss 
    936      1.47    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
    937       1.1  augustss 
    938       1.1  augustss 	cd = &sc->axe_cdata;
    939       1.1  augustss 	for (i = 0; i < AXE_RX_LIST_CNT; i++) {
    940       1.1  augustss 		c = &cd->axe_rx_chain[i];
    941       1.1  augustss 		c->axe_sc = sc;
    942       1.1  augustss 		c->axe_idx = i;
    943       1.1  augustss 		if (c->axe_xfer == NULL) {
    944       1.1  augustss 			c->axe_xfer = usbd_alloc_xfer(sc->axe_udev);
    945       1.1  augustss 			if (c->axe_xfer == NULL)
    946      1.38   tsutsui 				return ENOBUFS;
    947      1.35  pgoyette 			c->axe_buf = usbd_alloc_buffer(c->axe_xfer,
    948      1.35  pgoyette 			    sc->axe_bufsz);
    949       1.1  augustss 			if (c->axe_buf == NULL) {
    950       1.1  augustss 				usbd_free_xfer(c->axe_xfer);
    951      1.38   tsutsui 				return ENOBUFS;
    952       1.1  augustss 			}
    953       1.1  augustss 		}
    954       1.1  augustss 	}
    955       1.1  augustss 
    956      1.35  pgoyette 	return 0;
    957       1.1  augustss }
    958       1.1  augustss 
    959      1.35  pgoyette static int
    960       1.1  augustss axe_tx_list_init(struct axe_softc *sc)
    961       1.1  augustss {
    962       1.1  augustss 	struct axe_cdata *cd;
    963       1.1  augustss 	struct axe_chain *c;
    964       1.1  augustss 	int i;
    965       1.1  augustss 
    966      1.47    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
    967       1.1  augustss 
    968       1.1  augustss 	cd = &sc->axe_cdata;
    969       1.1  augustss 	for (i = 0; i < AXE_TX_LIST_CNT; i++) {
    970       1.1  augustss 		c = &cd->axe_tx_chain[i];
    971       1.1  augustss 		c->axe_sc = sc;
    972       1.1  augustss 		c->axe_idx = i;
    973       1.1  augustss 		if (c->axe_xfer == NULL) {
    974       1.1  augustss 			c->axe_xfer = usbd_alloc_xfer(sc->axe_udev);
    975       1.1  augustss 			if (c->axe_xfer == NULL)
    976      1.38   tsutsui 				return ENOBUFS;
    977      1.35  pgoyette 			c->axe_buf = usbd_alloc_buffer(c->axe_xfer,
    978      1.35  pgoyette 			    sc->axe_bufsz);
    979       1.1  augustss 			if (c->axe_buf == NULL) {
    980       1.1  augustss 				usbd_free_xfer(c->axe_xfer);
    981      1.38   tsutsui 				return ENOBUFS;
    982       1.1  augustss 			}
    983       1.1  augustss 		}
    984       1.1  augustss 	}
    985       1.1  augustss 
    986      1.35  pgoyette 	return 0;
    987       1.1  augustss }
    988       1.1  augustss 
    989       1.1  augustss /*
    990       1.1  augustss  * A frame has been uploaded: pass the resulting mbuf chain up to
    991       1.1  augustss  * the higher level protocols.
    992       1.1  augustss  */
    993      1.35  pgoyette static void
    994       1.1  augustss axe_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
    995       1.1  augustss {
    996      1.38   tsutsui 	struct axe_softc *sc;
    997      1.38   tsutsui 	struct axe_chain *c;
    998      1.38   tsutsui 	struct ifnet *ifp;
    999      1.38   tsutsui 	uint8_t *buf;
   1000      1.38   tsutsui 	uint32_t total_len;
   1001      1.42   tsutsui 	u_int rxlen, pktlen;
   1002      1.38   tsutsui 	struct mbuf *m;
   1003      1.38   tsutsui 	struct axe_sframe_hdr hdr;
   1004      1.38   tsutsui 	int s;
   1005       1.1  augustss 
   1006      1.35  pgoyette 	c = (struct axe_chain *)priv;
   1007       1.1  augustss 	sc = c->axe_sc;
   1008      1.35  pgoyette 	buf = c->axe_buf;
   1009      1.35  pgoyette 	ifp = &sc->sc_if;
   1010       1.1  augustss 
   1011      1.47    dyoung 	DPRINTFN(10,("%s: %s: enter\n", device_xname(sc->axe_dev),__func__));
   1012       1.1  augustss 
   1013       1.1  augustss 	if (sc->axe_dying)
   1014       1.1  augustss 		return;
   1015       1.1  augustss 
   1016      1.38   tsutsui 	if ((ifp->if_flags & IFF_RUNNING) == 0)
   1017       1.1  augustss 		return;
   1018       1.1  augustss 
   1019       1.1  augustss 	if (status != USBD_NORMAL_COMPLETION) {
   1020       1.1  augustss 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
   1021       1.1  augustss 			return;
   1022      1.35  pgoyette 		if (usbd_ratecheck(&sc->axe_rx_notice))
   1023      1.35  pgoyette 			aprint_error_dev(sc->axe_dev, "usb errors on rx: %s\n",
   1024      1.35  pgoyette 			    usbd_errstr(status));
   1025       1.1  augustss 		if (status == USBD_STALLED)
   1026      1.12  augustss 			usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_RX]);
   1027       1.1  augustss 		goto done;
   1028       1.1  augustss 	}
   1029       1.1  augustss 
   1030       1.1  augustss 	usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
   1031       1.1  augustss 
   1032      1.35  pgoyette 	do {
   1033      1.35  pgoyette 		if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
   1034      1.35  pgoyette 			if (total_len < sizeof(hdr)) {
   1035      1.35  pgoyette 				ifp->if_ierrors++;
   1036      1.35  pgoyette 				goto done;
   1037      1.35  pgoyette 			}
   1038      1.35  pgoyette 
   1039      1.35  pgoyette 			memcpy(&hdr, buf, sizeof(hdr));
   1040      1.35  pgoyette 			total_len -= sizeof(hdr);
   1041      1.42   tsutsui 			buf += sizeof(hdr);
   1042      1.35  pgoyette 
   1043      1.58  christos 			if (((le16toh(hdr.len) & AXE_RH1M_RXLEN_MASK) ^
   1044      1.62  christos 			    (le16toh(hdr.ilen) & AXE_RH1M_RXLEN_MASK)) !=
   1045      1.62  christos 			    AXE_RH1M_RXLEN_MASK) {
   1046      1.35  pgoyette 				ifp->if_ierrors++;
   1047      1.35  pgoyette 				goto done;
   1048      1.35  pgoyette 			}
   1049      1.42   tsutsui 
   1050      1.63  christos 			rxlen = le16toh(hdr.len) & AXE_RH1M_RXLEN_MASK;
   1051      1.42   tsutsui 			if (total_len < rxlen) {
   1052      1.42   tsutsui 				pktlen = total_len;
   1053      1.42   tsutsui 				total_len = 0;
   1054      1.42   tsutsui 			} else {
   1055      1.43   tsutsui 				pktlen = rxlen;
   1056      1.43   tsutsui 				rxlen = roundup2(rxlen, 2);
   1057      1.42   tsutsui 				total_len -= rxlen;
   1058      1.35  pgoyette 			}
   1059      1.35  pgoyette 
   1060      1.35  pgoyette 		} else { /* AX172 */
   1061      1.42   tsutsui 			pktlen = rxlen = total_len;
   1062      1.35  pgoyette 			total_len = 0;
   1063      1.35  pgoyette 		}
   1064      1.35  pgoyette 
   1065      1.44   tsutsui 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   1066      1.44   tsutsui 		if (m == NULL) {
   1067      1.35  pgoyette 			ifp->if_ierrors++;
   1068      1.35  pgoyette 			goto done;
   1069      1.35  pgoyette 		}
   1070       1.1  augustss 
   1071      1.44   tsutsui 		if (pktlen > MHLEN - ETHER_ALIGN) {
   1072      1.44   tsutsui 			MCLGET(m, M_DONTWAIT);
   1073      1.44   tsutsui 			if ((m->m_flags & M_EXT) == 0) {
   1074      1.44   tsutsui 				m_freem(m);
   1075      1.44   tsutsui 				ifp->if_ierrors++;
   1076      1.44   tsutsui 				goto done;
   1077      1.44   tsutsui 			}
   1078      1.44   tsutsui 		}
   1079      1.44   tsutsui 		m->m_data += ETHER_ALIGN;
   1080      1.44   tsutsui 
   1081      1.35  pgoyette 		ifp->if_ipackets++;
   1082      1.35  pgoyette 		m->m_pkthdr.rcvif = ifp;
   1083      1.35  pgoyette 		m->m_pkthdr.len = m->m_len = pktlen;
   1084       1.1  augustss 
   1085      1.45   tsutsui 		memcpy(mtod(m, uint8_t *), buf, pktlen);
   1086      1.42   tsutsui 		buf += rxlen;
   1087       1.1  augustss 
   1088      1.35  pgoyette 		s = splnet();
   1089       1.1  augustss 
   1090      1.35  pgoyette 		bpf_mtap(ifp, m);
   1091       1.1  augustss 
   1092      1.47    dyoung 		DPRINTFN(10,("%s: %s: deliver %d\n", device_xname(sc->axe_dev),
   1093      1.38   tsutsui 		    __func__, m->m_len));
   1094      1.35  pgoyette 		(*(ifp)->if_input)((ifp), (m));
   1095       1.1  augustss 
   1096      1.35  pgoyette 		splx(s);
   1097       1.1  augustss 
   1098      1.35  pgoyette 	} while (total_len > 0);
   1099       1.1  augustss 
   1100       1.1  augustss  done:
   1101       1.1  augustss 
   1102       1.1  augustss 	/* Setup new transfer. */
   1103       1.1  augustss 	usbd_setup_xfer(xfer, sc->axe_ep[AXE_ENDPT_RX],
   1104      1.35  pgoyette 	    c, c->axe_buf, sc->axe_bufsz,
   1105       1.1  augustss 	    USBD_SHORT_XFER_OK | USBD_NO_COPY,
   1106       1.1  augustss 	    USBD_NO_TIMEOUT, axe_rxeof);
   1107       1.1  augustss 	usbd_transfer(xfer);
   1108       1.1  augustss 
   1109      1.47    dyoung 	DPRINTFN(10,("%s: %s: start rx\n", device_xname(sc->axe_dev), __func__));
   1110       1.1  augustss }
   1111       1.1  augustss 
   1112       1.1  augustss /*
   1113       1.1  augustss  * A frame was downloaded to the chip. It's safe for us to clean up
   1114       1.1  augustss  * the list buffers.
   1115       1.1  augustss  */
   1116       1.1  augustss 
   1117      1.35  pgoyette static void
   1118      1.38   tsutsui axe_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
   1119       1.1  augustss {
   1120      1.38   tsutsui 	struct axe_softc *sc;
   1121      1.38   tsutsui 	struct axe_chain *c;
   1122      1.38   tsutsui 	struct ifnet *ifp;
   1123      1.38   tsutsui 	int s;
   1124       1.1  augustss 
   1125       1.1  augustss 	c = priv;
   1126       1.1  augustss 	sc = c->axe_sc;
   1127      1.35  pgoyette 	ifp = &sc->sc_if;
   1128       1.1  augustss 
   1129       1.1  augustss 	if (sc->axe_dying)
   1130       1.1  augustss 		return;
   1131       1.1  augustss 
   1132       1.1  augustss 	s = splnet();
   1133       1.1  augustss 
   1134      1.66       roy 	ifp->if_timer = 0;
   1135      1.66       roy 	ifp->if_flags &= ~IFF_OACTIVE;
   1136      1.66       roy 
   1137       1.1  augustss 	if (status != USBD_NORMAL_COMPLETION) {
   1138       1.1  augustss 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
   1139       1.1  augustss 			splx(s);
   1140       1.1  augustss 			return;
   1141       1.1  augustss 		}
   1142       1.1  augustss 		ifp->if_oerrors++;
   1143      1.35  pgoyette 		aprint_error_dev(sc->axe_dev, "usb error on tx: %s\n",
   1144      1.28    dyoung 		    usbd_errstr(status));
   1145       1.1  augustss 		if (status == USBD_STALLED)
   1146      1.12  augustss 			usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_TX]);
   1147       1.1  augustss 		splx(s);
   1148       1.1  augustss 		return;
   1149       1.1  augustss 	}
   1150      1.66       roy 	ifp->if_opackets++;
   1151       1.1  augustss 
   1152      1.38   tsutsui 	if (!IFQ_IS_EMPTY(&ifp->if_snd))
   1153       1.1  augustss 		axe_start(ifp);
   1154       1.1  augustss 
   1155       1.1  augustss 	splx(s);
   1156       1.1  augustss }
   1157       1.1  augustss 
   1158      1.35  pgoyette static void
   1159       1.1  augustss axe_tick(void *xsc)
   1160       1.1  augustss {
   1161       1.1  augustss 	struct axe_softc *sc = xsc;
   1162       1.1  augustss 
   1163       1.1  augustss 	if (sc == NULL)
   1164       1.1  augustss 		return;
   1165       1.1  augustss 
   1166      1.47    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
   1167       1.1  augustss 
   1168       1.1  augustss 	if (sc->axe_dying)
   1169       1.1  augustss 		return;
   1170       1.1  augustss 
   1171       1.1  augustss 	/* Perform periodic stuff in process context */
   1172      1.16     joerg 	usb_add_task(sc->axe_udev, &sc->axe_tick_task, USB_TASKQ_DRIVER);
   1173       1.1  augustss }
   1174       1.1  augustss 
   1175      1.35  pgoyette static void
   1176       1.1  augustss axe_tick_task(void *xsc)
   1177       1.1  augustss {
   1178      1.38   tsutsui 	int s;
   1179      1.38   tsutsui 	struct axe_softc *sc;
   1180      1.38   tsutsui 	struct ifnet *ifp;
   1181      1.38   tsutsui 	struct mii_data *mii;
   1182       1.1  augustss 
   1183       1.1  augustss 	sc = xsc;
   1184       1.1  augustss 
   1185       1.1  augustss 	if (sc == NULL)
   1186       1.1  augustss 		return;
   1187       1.1  augustss 
   1188       1.1  augustss 	if (sc->axe_dying)
   1189       1.1  augustss 		return;
   1190       1.1  augustss 
   1191      1.35  pgoyette 	ifp = &sc->sc_if;
   1192      1.35  pgoyette 	mii = &sc->axe_mii;
   1193      1.35  pgoyette 
   1194       1.1  augustss 	if (mii == NULL)
   1195       1.1  augustss 		return;
   1196       1.1  augustss 
   1197       1.1  augustss 	s = splnet();
   1198       1.1  augustss 
   1199       1.1  augustss 	mii_tick(mii);
   1200      1.38   tsutsui 	if (sc->axe_link == 0 &&
   1201      1.38   tsutsui 	    (mii->mii_media_status & IFM_ACTIVE) != 0 &&
   1202      1.35  pgoyette 	    IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
   1203      1.35  pgoyette 		DPRINTF(("%s: %s: got link\n", device_xname(sc->axe_dev),
   1204      1.35  pgoyette 		    __func__));
   1205      1.35  pgoyette 		sc->axe_link++;
   1206      1.36   tsutsui 		if (!IFQ_IS_EMPTY(&ifp->if_snd))
   1207      1.35  pgoyette 			axe_start(ifp);
   1208      1.35  pgoyette 	}
   1209       1.1  augustss 
   1210      1.35  pgoyette 	callout_schedule(&sc->axe_stat_ch, hz);
   1211       1.1  augustss 
   1212       1.1  augustss 	splx(s);
   1213       1.1  augustss }
   1214       1.1  augustss 
   1215      1.35  pgoyette static int
   1216       1.1  augustss axe_encap(struct axe_softc *sc, struct mbuf *m, int idx)
   1217       1.1  augustss {
   1218      1.38   tsutsui 	struct ifnet *ifp = &sc->sc_if;
   1219      1.38   tsutsui 	struct axe_chain *c;
   1220      1.38   tsutsui 	usbd_status err;
   1221      1.38   tsutsui 	struct axe_sframe_hdr hdr;
   1222      1.38   tsutsui 	int length, boundary;
   1223       1.1  augustss 
   1224       1.1  augustss 	c = &sc->axe_cdata.axe_tx_chain[idx];
   1225       1.1  augustss 
   1226       1.1  augustss 	/*
   1227       1.1  augustss 	 * Copy the mbuf data into a contiguous buffer, leaving two
   1228       1.1  augustss 	 * bytes at the beginning to hold the frame length.
   1229       1.1  augustss 	 */
   1230      1.35  pgoyette 	if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
   1231      1.35  pgoyette 		boundary = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 512 : 64;
   1232      1.35  pgoyette 
   1233      1.35  pgoyette 		hdr.len = htole16(m->m_pkthdr.len);
   1234      1.35  pgoyette 		hdr.ilen = ~hdr.len;
   1235      1.35  pgoyette 
   1236      1.35  pgoyette 		memcpy(c->axe_buf, &hdr, sizeof(hdr));
   1237      1.35  pgoyette 		length = sizeof(hdr);
   1238      1.35  pgoyette 
   1239      1.35  pgoyette 		m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf + length);
   1240      1.35  pgoyette 		length += m->m_pkthdr.len;
   1241      1.35  pgoyette 
   1242      1.35  pgoyette 		if ((length % boundary) == 0) {
   1243      1.35  pgoyette 			hdr.len = 0x0000;
   1244      1.35  pgoyette 			hdr.ilen = 0xffff;
   1245      1.35  pgoyette 			memcpy(c->axe_buf + length, &hdr, sizeof(hdr));
   1246      1.35  pgoyette 			length += sizeof(hdr);
   1247      1.35  pgoyette 		}
   1248      1.35  pgoyette 	} else {
   1249      1.35  pgoyette 		m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf);
   1250      1.35  pgoyette 		length = m->m_pkthdr.len;
   1251      1.35  pgoyette 	}
   1252       1.1  augustss 
   1253       1.1  augustss 	usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_TX],
   1254      1.35  pgoyette 	    c, c->axe_buf, length, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, 10000,
   1255       1.1  augustss 	    axe_txeof);
   1256       1.1  augustss 
   1257       1.1  augustss 	/* Transmit */
   1258       1.1  augustss 	err = usbd_transfer(c->axe_xfer);
   1259       1.1  augustss 	if (err != USBD_IN_PROGRESS) {
   1260      1.35  pgoyette 		axe_stop(ifp, 0);
   1261      1.35  pgoyette 		return EIO;
   1262       1.1  augustss 	}
   1263       1.1  augustss 
   1264       1.1  augustss 	sc->axe_cdata.axe_tx_cnt++;
   1265       1.1  augustss 
   1266      1.35  pgoyette 	return 0;
   1267       1.1  augustss }
   1268       1.1  augustss 
   1269      1.35  pgoyette static void
   1270       1.1  augustss axe_start(struct ifnet *ifp)
   1271       1.1  augustss {
   1272      1.38   tsutsui 	struct axe_softc *sc;
   1273      1.46   tsutsui 	struct mbuf *m;
   1274       1.1  augustss 
   1275       1.1  augustss 	sc = ifp->if_softc;
   1276       1.1  augustss 
   1277      1.35  pgoyette 	if ((sc->axe_flags & AXE_MII) != 0 && sc->axe_link == 0)
   1278      1.35  pgoyette 		return;
   1279      1.35  pgoyette 
   1280      1.22    dyoung 	if ((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING)) != IFF_RUNNING)
   1281       1.1  augustss 		return;
   1282       1.1  augustss 
   1283      1.46   tsutsui 	IFQ_POLL(&ifp->if_snd, m);
   1284      1.46   tsutsui 	if (m == NULL) {
   1285       1.1  augustss 		return;
   1286       1.1  augustss 	}
   1287       1.1  augustss 
   1288      1.46   tsutsui 	if (axe_encap(sc, m, 0)) {
   1289       1.1  augustss 		ifp->if_flags |= IFF_OACTIVE;
   1290       1.1  augustss 		return;
   1291       1.1  augustss 	}
   1292      1.46   tsutsui 	IFQ_DEQUEUE(&ifp->if_snd, m);
   1293       1.1  augustss 
   1294       1.1  augustss 	/*
   1295       1.1  augustss 	 * If there's a BPF listener, bounce a copy of this frame
   1296       1.1  augustss 	 * to him.
   1297       1.1  augustss 	 */
   1298      1.46   tsutsui 	bpf_mtap(ifp, m);
   1299      1.46   tsutsui 	m_freem(m);
   1300       1.1  augustss 
   1301       1.1  augustss 	ifp->if_flags |= IFF_OACTIVE;
   1302       1.1  augustss 
   1303       1.1  augustss 	/*
   1304       1.1  augustss 	 * Set a timeout in case the chip goes out to lunch.
   1305       1.1  augustss 	 */
   1306       1.1  augustss 	ifp->if_timer = 5;
   1307       1.1  augustss 
   1308       1.1  augustss 	return;
   1309       1.1  augustss }
   1310       1.1  augustss 
   1311      1.35  pgoyette static int
   1312      1.35  pgoyette axe_init(struct ifnet *ifp)
   1313       1.1  augustss {
   1314      1.38   tsutsui 	struct axe_softc *sc = ifp->if_softc;
   1315      1.38   tsutsui 	struct axe_chain *c;
   1316      1.38   tsutsui 	usbd_status err;
   1317      1.38   tsutsui 	int rxmode;
   1318      1.38   tsutsui 	int i, s;
   1319      1.38   tsutsui 	uint8_t eaddr[ETHER_ADDR_LEN];
   1320      1.35  pgoyette 
   1321      1.35  pgoyette 	s = splnet();
   1322       1.1  augustss 
   1323       1.1  augustss 	if (ifp->if_flags & IFF_RUNNING)
   1324      1.35  pgoyette 		axe_stop(ifp, 0);
   1325       1.1  augustss 
   1326       1.1  augustss 	/*
   1327       1.1  augustss 	 * Cancel pending I/O and free all RX/TX buffers.
   1328       1.1  augustss 	 */
   1329       1.1  augustss 	axe_reset(sc);
   1330       1.1  augustss 
   1331      1.35  pgoyette 	/* Set MAC address */
   1332      1.35  pgoyette 	if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
   1333      1.35  pgoyette 		memcpy(eaddr, CLLADDR(ifp->if_sadl), sizeof(eaddr));
   1334      1.35  pgoyette 		axe_lock_mii(sc);
   1335      1.35  pgoyette 		axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, eaddr);
   1336      1.35  pgoyette 		axe_unlock_mii(sc);
   1337      1.35  pgoyette 	}
   1338      1.35  pgoyette 
   1339       1.1  augustss 	/* Enable RX logic. */
   1340       1.1  augustss 
   1341       1.1  augustss 	/* Init RX ring. */
   1342       1.1  augustss 	if (axe_rx_list_init(sc) == ENOBUFS) {
   1343      1.35  pgoyette 		aprint_error_dev(sc->axe_dev, "rx list init failed\n");
   1344       1.1  augustss 		splx(s);
   1345      1.35  pgoyette 		return ENOBUFS;
   1346       1.1  augustss 	}
   1347       1.1  augustss 
   1348       1.1  augustss 	/* Init TX ring. */
   1349       1.1  augustss 	if (axe_tx_list_init(sc) == ENOBUFS) {
   1350      1.35  pgoyette 		aprint_error_dev(sc->axe_dev, "tx list init failed\n");
   1351       1.1  augustss 		splx(s);
   1352      1.35  pgoyette 		return ENOBUFS;
   1353       1.1  augustss 	}
   1354       1.1  augustss 
   1355       1.1  augustss 	/* Set transmitter IPG values */
   1356      1.21        ad 	axe_lock_mii(sc);
   1357      1.35  pgoyette 	if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
   1358      1.35  pgoyette 		axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2],
   1359      1.35  pgoyette 		    (sc->axe_ipgs[1] << 8) | (sc->axe_ipgs[0]), NULL);
   1360      1.35  pgoyette 	else {
   1361      1.35  pgoyette 		axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL);
   1362      1.35  pgoyette 		axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL);
   1363      1.35  pgoyette 		axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL);
   1364      1.35  pgoyette 	}
   1365       1.1  augustss 
   1366       1.1  augustss 	/* Enable receiver, set RX mode */
   1367      1.35  pgoyette 	rxmode = AXE_RXCMD_BROADCAST | AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE;
   1368      1.58  christos 	if (sc->axe_flags & AX772B)
   1369      1.58  christos 		rxmode |= AXE_772B_RXCMD_RH1M;
   1370      1.58  christos 	else if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
   1371      1.35  pgoyette 		if (sc->axe_udev->speed == USB_SPEED_HIGH) {
   1372      1.35  pgoyette 			/* Largest possible USB buffer size for AX88178 */
   1373      1.35  pgoyette 			rxmode |= AXE_178_RXCMD_MFB;
   1374      1.35  pgoyette 		}
   1375      1.35  pgoyette 	} else
   1376      1.35  pgoyette 		rxmode |= AXE_172_RXCMD_UNICAST;
   1377       1.1  augustss 
   1378       1.1  augustss 	/* If we want promiscuous mode, set the allframes bit. */
   1379       1.1  augustss 	if (ifp->if_flags & IFF_PROMISC)
   1380       1.1  augustss 		rxmode |= AXE_RXCMD_PROMISC;
   1381       1.1  augustss 
   1382       1.1  augustss 	if (ifp->if_flags & IFF_BROADCAST)
   1383       1.1  augustss 		rxmode |= AXE_RXCMD_BROADCAST;
   1384       1.1  augustss 
   1385       1.1  augustss 	axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
   1386      1.21        ad 	axe_unlock_mii(sc);
   1387       1.1  augustss 
   1388       1.1  augustss 	/* Load the multicast filter. */
   1389       1.1  augustss 	axe_setmulti(sc);
   1390       1.1  augustss 
   1391       1.1  augustss 	/* Open RX and TX pipes. */
   1392       1.1  augustss 	err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_RX],
   1393       1.1  augustss 	    USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_RX]);
   1394       1.1  augustss 	if (err) {
   1395      1.35  pgoyette 		aprint_error_dev(sc->axe_dev, "open rx pipe failed: %s\n",
   1396      1.35  pgoyette 		    usbd_errstr(err));
   1397       1.1  augustss 		splx(s);
   1398      1.35  pgoyette 		return EIO;
   1399       1.1  augustss 	}
   1400       1.1  augustss 
   1401       1.1  augustss 	err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_TX],
   1402       1.1  augustss 	    USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_TX]);
   1403       1.1  augustss 	if (err) {
   1404      1.35  pgoyette 		aprint_error_dev(sc->axe_dev, "open tx pipe failed: %s\n",
   1405      1.35  pgoyette 		    usbd_errstr(err));
   1406       1.1  augustss 		splx(s);
   1407      1.35  pgoyette 		return EIO;
   1408       1.1  augustss 	}
   1409       1.1  augustss 
   1410       1.1  augustss 	/* Start up the receive pipe. */
   1411       1.1  augustss 	for (i = 0; i < AXE_RX_LIST_CNT; i++) {
   1412       1.1  augustss 		c = &sc->axe_cdata.axe_rx_chain[i];
   1413       1.1  augustss 		usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_RX],
   1414      1.35  pgoyette 		    c, c->axe_buf, sc->axe_bufsz,
   1415      1.35  pgoyette 		    USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT,
   1416      1.35  pgoyette 		    axe_rxeof);
   1417       1.1  augustss 		usbd_transfer(c->axe_xfer);
   1418       1.1  augustss 	}
   1419       1.1  augustss 
   1420       1.1  augustss 	ifp->if_flags |= IFF_RUNNING;
   1421       1.1  augustss 	ifp->if_flags &= ~IFF_OACTIVE;
   1422       1.1  augustss 
   1423       1.1  augustss 	splx(s);
   1424       1.1  augustss 
   1425      1.35  pgoyette 	callout_schedule(&sc->axe_stat_ch, hz);
   1426      1.35  pgoyette 	return 0;
   1427       1.1  augustss }
   1428       1.1  augustss 
   1429      1.35  pgoyette static int
   1430      1.18  christos axe_ioctl(struct ifnet *ifp, u_long cmd, void *data)
   1431       1.1  augustss {
   1432      1.38   tsutsui 	struct axe_softc *sc = ifp->if_softc;
   1433      1.38   tsutsui 	int s;
   1434      1.38   tsutsui 	int error = 0;
   1435       1.1  augustss 
   1436      1.35  pgoyette 	s = splnet();
   1437      1.35  pgoyette 
   1438       1.1  augustss 	switch(cmd) {
   1439      1.35  pgoyette 	case SIOCSIFFLAGS:
   1440      1.38   tsutsui 		if ((error = ifioctl_common(ifp, cmd, data)) != 0)
   1441      1.38   tsutsui 			break;
   1442      1.35  pgoyette 
   1443      1.35  pgoyette 		switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
   1444      1.35  pgoyette 		case IFF_RUNNING:
   1445      1.35  pgoyette 			axe_stop(ifp, 1);
   1446      1.35  pgoyette 			break;
   1447      1.35  pgoyette 		case IFF_UP:
   1448      1.35  pgoyette 			axe_init(ifp);
   1449      1.35  pgoyette 			break;
   1450      1.35  pgoyette 		case IFF_UP | IFF_RUNNING:
   1451      1.35  pgoyette 			if ((ifp->if_flags ^ sc->axe_if_flags) == IFF_PROMISC)
   1452      1.35  pgoyette 				axe_setmulti(sc);
   1453      1.35  pgoyette 			else
   1454      1.35  pgoyette 				axe_init(ifp);
   1455       1.1  augustss 			break;
   1456       1.1  augustss 		}
   1457      1.35  pgoyette 		sc->axe_if_flags = ifp->if_flags;
   1458       1.1  augustss 		break;
   1459       1.1  augustss 
   1460      1.35  pgoyette 	default:
   1461      1.35  pgoyette 		if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET)
   1462      1.26    dyoung 			break;
   1463       1.1  augustss 
   1464       1.1  augustss 		error = 0;
   1465      1.35  pgoyette 
   1466      1.35  pgoyette 		if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI)
   1467      1.35  pgoyette 			axe_setmulti(sc);
   1468      1.35  pgoyette 
   1469       1.1  augustss 	}
   1470      1.35  pgoyette 	splx(s);
   1471       1.1  augustss 
   1472      1.35  pgoyette 	return error;
   1473       1.1  augustss }
   1474       1.1  augustss 
   1475      1.35  pgoyette static void
   1476       1.1  augustss axe_watchdog(struct ifnet *ifp)
   1477       1.1  augustss {
   1478      1.38   tsutsui 	struct axe_softc *sc;
   1479      1.38   tsutsui 	struct axe_chain *c;
   1480      1.38   tsutsui 	usbd_status stat;
   1481      1.38   tsutsui 	int s;
   1482       1.1  augustss 
   1483       1.1  augustss 	sc = ifp->if_softc;
   1484       1.1  augustss 
   1485       1.1  augustss 	ifp->if_oerrors++;
   1486      1.35  pgoyette 	aprint_error_dev(sc->axe_dev, "watchdog timeout\n");
   1487       1.1  augustss 
   1488       1.4  augustss 	s = splusb();
   1489       1.1  augustss 	c = &sc->axe_cdata.axe_tx_chain[0];
   1490       1.1  augustss 	usbd_get_xfer_status(c->axe_xfer, NULL, NULL, NULL, &stat);
   1491       1.1  augustss 	axe_txeof(c->axe_xfer, c, stat);
   1492       1.1  augustss 
   1493      1.35  pgoyette 	if (!IFQ_IS_EMPTY(&ifp->if_snd))
   1494       1.1  augustss 		axe_start(ifp);
   1495       1.4  augustss 	splx(s);
   1496       1.1  augustss }
   1497       1.1  augustss 
   1498       1.1  augustss /*
   1499       1.1  augustss  * Stop the adapter and free any mbufs allocated to the
   1500       1.1  augustss  * RX and TX lists.
   1501       1.1  augustss  */
   1502      1.35  pgoyette static void
   1503      1.35  pgoyette axe_stop(struct ifnet *ifp, int disable)
   1504       1.1  augustss {
   1505      1.38   tsutsui 	struct axe_softc *sc = ifp->if_softc;
   1506      1.38   tsutsui 	usbd_status err;
   1507      1.38   tsutsui 	int i;
   1508       1.1  augustss 
   1509       1.1  augustss 	axe_reset(sc);
   1510       1.1  augustss 
   1511       1.1  augustss 	ifp->if_timer = 0;
   1512      1.35  pgoyette 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1513       1.1  augustss 
   1514      1.47    dyoung 	callout_stop(&sc->axe_stat_ch);
   1515       1.1  augustss 
   1516       1.1  augustss 	/* Stop transfers. */
   1517       1.1  augustss 	if (sc->axe_ep[AXE_ENDPT_RX] != NULL) {
   1518       1.1  augustss 		err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]);
   1519       1.1  augustss 		if (err) {
   1520      1.35  pgoyette 			aprint_error_dev(sc->axe_dev,
   1521      1.35  pgoyette 			    "abort rx pipe failed: %s\n", usbd_errstr(err));
   1522       1.1  augustss 		}
   1523       1.1  augustss 		err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_RX]);
   1524       1.1  augustss 		if (err) {
   1525      1.35  pgoyette 			aprint_error_dev(sc->axe_dev,
   1526      1.35  pgoyette 			    "close rx pipe failed: %s\n", usbd_errstr(err));
   1527       1.1  augustss 		}
   1528       1.1  augustss 		sc->axe_ep[AXE_ENDPT_RX] = NULL;
   1529       1.1  augustss 	}
   1530       1.1  augustss 
   1531       1.1  augustss 	if (sc->axe_ep[AXE_ENDPT_TX] != NULL) {
   1532       1.1  augustss 		err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]);
   1533       1.1  augustss 		if (err) {
   1534      1.35  pgoyette 			aprint_error_dev(sc->axe_dev,
   1535      1.35  pgoyette 			    "abort tx pipe failed: %s\n", usbd_errstr(err));
   1536       1.1  augustss 		}
   1537       1.1  augustss 		err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_TX]);
   1538       1.1  augustss 		if (err) {
   1539      1.35  pgoyette 			aprint_error_dev(sc->axe_dev,
   1540      1.35  pgoyette 			    "close tx pipe failed: %s\n", usbd_errstr(err));
   1541       1.1  augustss 		}
   1542       1.1  augustss 		sc->axe_ep[AXE_ENDPT_TX] = NULL;
   1543       1.1  augustss 	}
   1544       1.1  augustss 
   1545       1.1  augustss 	if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) {
   1546       1.1  augustss 		err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
   1547       1.1  augustss 		if (err) {
   1548      1.35  pgoyette 			aprint_error_dev(sc->axe_dev,
   1549      1.35  pgoyette 			    "abort intr pipe failed: %s\n", usbd_errstr(err));
   1550       1.1  augustss 		}
   1551       1.1  augustss 		err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
   1552       1.1  augustss 		if (err) {
   1553      1.35  pgoyette 			aprint_error_dev(sc->axe_dev,
   1554      1.35  pgoyette 			    "close intr pipe failed: %s\n", usbd_errstr(err));
   1555       1.1  augustss 		}
   1556       1.1  augustss 		sc->axe_ep[AXE_ENDPT_INTR] = NULL;
   1557       1.1  augustss 	}
   1558       1.1  augustss 
   1559       1.1  augustss 	/* Free RX resources. */
   1560       1.1  augustss 	for (i = 0; i < AXE_RX_LIST_CNT; i++) {
   1561       1.1  augustss 		if (sc->axe_cdata.axe_rx_chain[i].axe_xfer != NULL) {
   1562       1.1  augustss 			usbd_free_xfer(sc->axe_cdata.axe_rx_chain[i].axe_xfer);
   1563       1.1  augustss 			sc->axe_cdata.axe_rx_chain[i].axe_xfer = NULL;
   1564       1.1  augustss 		}
   1565       1.1  augustss 	}
   1566       1.1  augustss 
   1567       1.1  augustss 	/* Free TX resources. */
   1568       1.1  augustss 	for (i = 0; i < AXE_TX_LIST_CNT; i++) {
   1569       1.1  augustss 		if (sc->axe_cdata.axe_tx_chain[i].axe_xfer != NULL) {
   1570       1.1  augustss 			usbd_free_xfer(sc->axe_cdata.axe_tx_chain[i].axe_xfer);
   1571       1.1  augustss 			sc->axe_cdata.axe_tx_chain[i].axe_xfer = NULL;
   1572       1.1  augustss 		}
   1573       1.1  augustss 	}
   1574       1.1  augustss 
   1575      1.35  pgoyette 	sc->axe_link = 0;
   1576       1.1  augustss }
   1577      1.48  pgoyette 
   1578      1.55    nonaka MODULE(MODULE_CLASS_DRIVER, if_axe, "bpf");
   1579      1.48  pgoyette 
   1580      1.48  pgoyette #ifdef _MODULE
   1581      1.48  pgoyette #include "ioconf.c"
   1582      1.48  pgoyette #endif
   1583      1.48  pgoyette 
   1584      1.48  pgoyette static int
   1585      1.48  pgoyette if_axe_modcmd(modcmd_t cmd, void *aux)
   1586      1.48  pgoyette {
   1587      1.48  pgoyette 	int error = 0;
   1588      1.48  pgoyette 
   1589      1.48  pgoyette 	switch (cmd) {
   1590      1.48  pgoyette 	case MODULE_CMD_INIT:
   1591      1.48  pgoyette #ifdef _MODULE
   1592      1.49  pgoyette 		error = config_init_component(cfdriver_ioconf_axe,
   1593      1.49  pgoyette 		    cfattach_ioconf_axe, cfdata_ioconf_axe);
   1594      1.48  pgoyette #endif
   1595      1.48  pgoyette 		return error;
   1596      1.48  pgoyette 	case MODULE_CMD_FINI:
   1597      1.48  pgoyette #ifdef _MODULE
   1598      1.49  pgoyette 		error = config_fini_component(cfdriver_ioconf_axe,
   1599      1.49  pgoyette 		    cfattach_ioconf_axe, cfdata_ioconf_axe);
   1600      1.48  pgoyette #endif
   1601      1.48  pgoyette 		return error;
   1602      1.48  pgoyette 	default:
   1603      1.48  pgoyette 		return ENOTTY;
   1604      1.48  pgoyette 	}
   1605      1.48  pgoyette }
   1606