if_axe.c revision 1.75 1 /* $NetBSD: if_axe.c,v 1.75 2016/11/25 12:56:29 skrll Exp $ */
2 /* $OpenBSD: if_axe.c,v 1.96 2010/01/09 05:33:08 jsg Exp $ */
3
4 /*
5 * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg (at) openbsd.org>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 /*
21 * Copyright (c) 1997, 1998, 1999, 2000-2003
22 * Bill Paul <wpaul (at) windriver.com>. All rights reserved.
23 *
24 * Redistribution and use in source and binary forms, with or without
25 * modification, are permitted provided that the following conditions
26 * are met:
27 * 1. Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * 2. Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in the
31 * documentation and/or other materials provided with the distribution.
32 * 3. All advertising materials mentioning features or use of this software
33 * must display the following acknowledgement:
34 * This product includes software developed by Bill Paul.
35 * 4. Neither the name of the author nor the names of any co-contributors
36 * may be used to endorse or promote products derived from this software
37 * without specific prior written permission.
38 *
39 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
40 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
41 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
42 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
43 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
44 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
45 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
46 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
48 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
49 * THE POSSIBILITY OF SUCH DAMAGE.
50 */
51
52 /*
53 * ASIX Electronics AX88172 USB 2.0 ethernet driver. Used in the
54 * LinkSys USB200M and various other adapters.
55 *
56 * Manuals available from:
57 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF
58 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet
59 * controller) to find the definitions for the RX control register.
60 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF
61 *
62 * Written by Bill Paul <wpaul (at) windriver.com>
63 * Senior Engineer
64 * Wind River Systems
65 */
66
67 /*
68 * The AX88172 provides USB ethernet supports at 10 and 100Mbps.
69 * It uses an external PHY (reference designs use a RealTek chip),
70 * and has a 64-bit multicast hash filter. There is some information
71 * missing from the manual which one needs to know in order to make
72 * the chip function:
73 *
74 * - You must set bit 7 in the RX control register, otherwise the
75 * chip won't receive any packets.
76 * - You must initialize all 3 IPG registers, or you won't be able
77 * to send any packets.
78 *
79 * Note that this device appears to only support loading the station
80 * address via autoload from the EEPROM (i.e. there's no way to manaully
81 * set it).
82 *
83 * (Adam Weinberger wanted me to name this driver if_gir.c.)
84 */
85
86 /*
87 * Ported to OpenBSD 3/28/2004 by Greg Taleck <taleck (at) oz.net>
88 * with bits and pieces from the aue and url drivers.
89 */
90
91 #include <sys/cdefs.h>
92 __KERNEL_RCSID(0, "$NetBSD: if_axe.c,v 1.75 2016/11/25 12:56:29 skrll Exp $");
93
94 #ifdef _KERNEL_OPT
95 #include "opt_inet.h"
96 #include "opt_usb.h"
97 #endif
98
99 #include <sys/param.h>
100 #include <sys/bus.h>
101 #include <sys/device.h>
102 #include <sys/kernel.h>
103 #include <sys/mbuf.h>
104 #include <sys/module.h>
105 #include <sys/mutex.h>
106 #include <sys/socket.h>
107 #include <sys/sockio.h>
108 #include <sys/systm.h>
109
110 #include <sys/rndsource.h>
111
112 #include <net/if.h>
113 #include <net/if_dl.h>
114 #include <net/if_ether.h>
115 #include <net/if_media.h>
116
117 #include <net/bpf.h>
118
119 #include <dev/mii/mii.h>
120 #include <dev/mii/miivar.h>
121
122 #include <dev/usb/usb.h>
123 #include <dev/usb/usbdi.h>
124 #include <dev/usb/usbdi_util.h>
125 #include <dev/usb/usbdivar.h>
126 #include <dev/usb/usbdevs.h>
127
128 #include <dev/usb/if_axereg.h>
129
130 #ifdef AXE_DEBUG
131 #define DPRINTF(x) do { if (axedebug) printf x; } while (0)
132 #define DPRINTFN(n,x) do { if (axedebug >= (n)) printf x; } while (0)
133 int axedebug = 0;
134 #else
135 #define DPRINTF(x)
136 #define DPRINTFN(n,x)
137 #endif
138
139 /*
140 * Various supported device vendors/products.
141 */
142 static const struct axe_type axe_devs[] = {
143 { { USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UFE2000}, 0 },
144 { { USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2}, 0 },
145 { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET }, AX772 },
146 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172}, 0 },
147 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772}, AX772 },
148 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772A}, AX772 },
149 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B}, AX772 | AX772B },
150 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B_1}, AX772 | AX772B },
151 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178}, AX178 },
152 { { USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T}, 0 },
153 { { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055 }, AX178 },
154 { { USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR}, 0},
155 { { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2}, AX772 },
156 { { USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX }, 0},
157 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100}, 0 },
158 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1 }, AX772 },
159 { { USB_VENDOR_DLINK2, USB_PRODUCT_DLINK2_DUBE100B1 }, AX772 },
160 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100C1 }, AX772 | AX772B },
161 { { USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E}, 0 },
162 { { USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2 }, AX178 },
163 { { USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1}, 0 },
164 { { USB_VENDOR_LENOVO, USB_PRODUCT_LENOVO_ETHERNET }, AX772 | AX772B },
165 { { USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M}, 0 },
166 { { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000 }, AX178 },
167 { { USB_VENDOR_LOGITEC, USB_PRODUCT_LOGITEC_LAN_GTJU2}, AX178 },
168 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2GT}, AX178 },
169 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX}, 0 },
170 { { USB_VENDOR_MSI, USB_PRODUCT_MSI_AX88772A}, AX772 },
171 { { USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120}, 0 },
172 { { USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS }, AX772 },
173 { { USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T }, AX178 },
174 { { USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL}, 0 },
175 { { USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029}, 0 },
176 { { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028 }, AX178 }
177 };
178 #define axe_lookup(v, p) ((const struct axe_type *)usb_lookup(axe_devs, v, p))
179
180 int axe_match(device_t, cfdata_t, void *);
181 void axe_attach(device_t, device_t, void *);
182 int axe_detach(device_t, int);
183 int axe_activate(device_t, devact_t);
184
185 CFATTACH_DECL_NEW(axe, sizeof(struct axe_softc),
186 axe_match, axe_attach, axe_detach, axe_activate);
187
188 static int axe_tx_list_init(struct axe_softc *);
189 static int axe_rx_list_init(struct axe_softc *);
190 static int axe_encap(struct axe_softc *, struct mbuf *, int);
191 static void axe_rxeof(struct usbd_xfer *, void *, usbd_status);
192 static void axe_txeof(struct usbd_xfer *, void *, usbd_status);
193 static void axe_tick(void *);
194 static void axe_tick_task(void *);
195 static void axe_start(struct ifnet *);
196 static int axe_ioctl(struct ifnet *, u_long, void *);
197 static int axe_init(struct ifnet *);
198 static void axe_stop(struct ifnet *, int);
199 static void axe_watchdog(struct ifnet *);
200 static int axe_miibus_readreg_locked(device_t, int, int);
201 static int axe_miibus_readreg(device_t, int, int);
202 static void axe_miibus_writereg_locked(device_t, int, int, int);
203 static void axe_miibus_writereg(device_t, int, int, int);
204 static void axe_miibus_statchg(struct ifnet *);
205 static int axe_cmd(struct axe_softc *, int, int, int, void *);
206 static void axe_reset(struct axe_softc *);
207 static int axe_ifmedia_upd(struct ifnet *);
208 static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
209
210 static void axe_setmulti(struct axe_softc *);
211 static void axe_lock_mii(struct axe_softc *);
212 static void axe_unlock_mii(struct axe_softc *);
213
214 static void axe_ax88178_init(struct axe_softc *);
215 static void axe_ax88772_init(struct axe_softc *);
216
217 /* Get exclusive access to the MII registers */
218 static void
219 axe_lock_mii(struct axe_softc *sc)
220 {
221
222 sc->axe_refcnt++;
223 mutex_enter(&sc->axe_mii_lock);
224 }
225
226 static void
227 axe_unlock_mii(struct axe_softc *sc)
228 {
229
230 mutex_exit(&sc->axe_mii_lock);
231 if (--sc->axe_refcnt < 0)
232 usb_detach_wakeupold((sc->axe_dev));
233 }
234
235 static int
236 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
237 {
238 usb_device_request_t req;
239 usbd_status err;
240
241 KASSERT(mutex_owned(&sc->axe_mii_lock));
242
243 if (sc->axe_dying)
244 return 0;
245
246 if (AXE_CMD_DIR(cmd))
247 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
248 else
249 req.bmRequestType = UT_READ_VENDOR_DEVICE;
250 req.bRequest = AXE_CMD_CMD(cmd);
251 USETW(req.wValue, val);
252 USETW(req.wIndex, index);
253 USETW(req.wLength, AXE_CMD_LEN(cmd));
254
255 err = usbd_do_request(sc->axe_udev, &req, buf);
256
257 if (err) {
258 DPRINTF(("axe_cmd err: cmd %d err %d\n", cmd, err));
259 return -1;
260 }
261 return 0;
262 }
263
264 static int
265 axe_miibus_readreg_locked(device_t dev, int phy, int reg)
266 {
267 struct axe_softc *sc = device_private(dev);
268 usbd_status err;
269 uint16_t val;
270
271 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
272 err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, (void *)&val);
273 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
274 if (err) {
275 aprint_error_dev(sc->axe_dev, "read PHY failed\n");
276 return -1;
277 }
278
279 val = le16toh(val);
280 if (sc->axe_flags & AX772 && reg == MII_BMSR) {
281 /*
282 * BMSR of AX88772 indicates it supports extended
283 * capability but the extended status register is
284 * reserverd for embedded ethernet PHY. So clear the
285 * extended capability bit of BMSR.
286 */
287 val &= ~BMSR_EXTCAP;
288 }
289
290 DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x val 0x%x\n",
291 phy, reg, val));
292
293 return val;
294 }
295
296 static int
297 axe_miibus_readreg(device_t dev, int phy, int reg)
298 {
299 struct axe_softc *sc = device_private(dev);
300 int val;
301
302 if (sc->axe_dying)
303 return 0;
304
305 if (sc->axe_phyno != phy)
306 return 0;
307
308 axe_lock_mii(sc);
309 val = axe_miibus_readreg_locked(dev, phy, reg);
310 axe_unlock_mii(sc);
311
312 return val;
313 }
314
315 static void
316 axe_miibus_writereg_locked(device_t dev, int phy, int reg, int aval)
317 {
318 struct axe_softc *sc = device_private(dev);
319 usbd_status err;
320 uint16_t val;
321
322 val = htole16(aval);
323
324 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
325 err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, (void *)&val);
326 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
327
328 if (err) {
329 aprint_error_dev(sc->axe_dev, "write PHY failed\n");
330 return;
331 }
332 }
333
334 static void
335 axe_miibus_writereg(device_t dev, int phy, int reg, int aval)
336 {
337 struct axe_softc *sc = device_private(dev);
338
339 if (sc->axe_dying)
340 return;
341
342 if (sc->axe_phyno != phy)
343 return;
344
345 axe_lock_mii(sc);
346 axe_miibus_writereg_locked(dev, phy, reg, aval);
347 axe_unlock_mii(sc);
348 }
349
350 static void
351 axe_miibus_statchg(struct ifnet *ifp)
352 {
353 struct axe_softc *sc = ifp->if_softc;
354 struct mii_data *mii = &sc->axe_mii;
355 int val, err;
356
357 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
358 val = AXE_MEDIA_FULL_DUPLEX;
359 else
360 val = 0;
361
362 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
363 val |= (AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC);
364 if (sc->axe_flags & AX178)
365 val |= AXE_178_MEDIA_ENCK;
366 switch (IFM_SUBTYPE(mii->mii_media_active)) {
367 case IFM_1000_T:
368 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK;
369 break;
370 case IFM_100_TX:
371 val |= AXE_178_MEDIA_100TX;
372 break;
373 case IFM_10_T:
374 /* doesn't need to be handled */
375 break;
376 }
377 }
378
379 DPRINTF(("axe_miibus_statchg: val=0x%x\n", val));
380 axe_lock_mii(sc);
381 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
382 axe_unlock_mii(sc);
383 if (err) {
384 aprint_error_dev(sc->axe_dev, "media change failed\n");
385 return;
386 }
387 }
388
389 /*
390 * Set media options
391 */
392 static int
393 axe_ifmedia_upd(struct ifnet *ifp)
394 {
395 struct axe_softc *sc = ifp->if_softc;
396 struct mii_data *mii = &sc->axe_mii;
397 int rc;
398
399 sc->axe_link = 0;
400
401 if (mii->mii_instance) {
402 struct mii_softc *miisc;
403
404 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
405 mii_phy_reset(miisc);
406 }
407
408 if ((rc = mii_mediachg(mii)) == ENXIO)
409 return 0;
410 return rc;
411 }
412
413 /*
414 * Report current media status
415 */
416 static void
417 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
418 {
419 struct axe_softc *sc = ifp->if_softc;
420 struct mii_data *mii = &sc->axe_mii;
421
422 mii_pollstat(mii);
423 ifmr->ifm_active = mii->mii_media_active;
424 ifmr->ifm_status = mii->mii_media_status;
425 }
426
427 static void
428 axe_setmulti(struct axe_softc *sc)
429 {
430 struct ifnet *ifp = &sc->sc_if;
431 struct ether_multi *enm;
432 struct ether_multistep step;
433 uint32_t h = 0;
434 uint16_t rxmode;
435 uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
436
437 if (sc->axe_dying)
438 return;
439
440 axe_lock_mii(sc);
441 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, (void *)&rxmode);
442 rxmode = le16toh(rxmode);
443
444 rxmode &= ~(AXE_RXCMD_ALLMULTI | AXE_RXCMD_PROMISC);
445
446 /* If we want promiscuous mode, set the allframes bit */
447 if (ifp->if_flags & IFF_PROMISC) {
448 rxmode |= AXE_RXCMD_PROMISC;
449 goto allmulti;
450 }
451
452 /* Now program new ones */
453 ETHER_FIRST_MULTI(step, &sc->axe_ec, enm);
454 while (enm != NULL) {
455 if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
456 ETHER_ADDR_LEN) != 0)
457 goto allmulti;
458
459 h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN) >> 26;
460 hashtbl[h >> 3] |= 1U << (h & 7);
461 ETHER_NEXT_MULTI(step, enm);
462 }
463 ifp->if_flags &= ~IFF_ALLMULTI;
464 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
465 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
466 axe_unlock_mii(sc);
467 return;
468
469 allmulti:
470 ifp->if_flags |= IFF_ALLMULTI;
471 rxmode |= AXE_RXCMD_ALLMULTI;
472 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
473 axe_unlock_mii(sc);
474 }
475
476 static void
477 axe_reset(struct axe_softc *sc)
478 {
479
480 if (sc->axe_dying)
481 return;
482 /* XXX What to reset? */
483
484 /* Wait a little while for the chip to get its brains in order. */
485 DELAY(1000);
486 }
487
488 static int
489 axe_get_phyno(struct axe_softc *sc, int sel)
490 {
491 int phyno;
492
493 switch (AXE_PHY_TYPE(sc->axe_phyaddrs[sel])) {
494 case PHY_TYPE_100_HOME:
495 /* FALLTHROUGH */
496 case PHY_TYPE_GIG:
497 phyno = AXE_PHY_NO(sc->axe_phyaddrs[sel]);
498 break;
499 case PHY_TYPE_SPECIAL:
500 /* FALLTHROUGH */
501 case PHY_TYPE_RSVD:
502 /* FALLTHROUGH */
503 case PHY_TYPE_NON_SUP:
504 /* FALLTHROUGH */
505 default:
506 phyno = -1;
507 break;
508 }
509
510 return phyno;
511 }
512
513 #define AXE_GPIO_WRITE(x, y) do { \
514 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \
515 usbd_delay_ms(sc->axe_udev, hztoms(y)); \
516 } while (0)
517
518 static void
519 axe_ax88178_init(struct axe_softc *sc)
520 {
521 int gpio0, ledmode, phymode;
522 uint16_t eeprom, val;
523
524 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
525 /* XXX magic */
526 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
527 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
528
529 eeprom = le16toh(eeprom);
530
531 DPRINTF((" EEPROM is 0x%x\n", eeprom));
532
533 /* if EEPROM is invalid we have to use to GPIO0 */
534 if (eeprom == 0xffff) {
535 phymode = AXE_PHY_MODE_MARVELL;
536 gpio0 = 1;
537 ledmode = 0;
538 } else {
539 phymode = eeprom & 0x7f;
540 gpio0 = (eeprom & 0x80) ? 0 : 1;
541 ledmode = eeprom >> 8;
542 }
543
544 DPRINTF(("use gpio0: %d, phymode %d\n", gpio0, phymode));
545
546 /* Program GPIOs depending on PHY hardware. */
547 switch (phymode) {
548 case AXE_PHY_MODE_MARVELL:
549 if (gpio0 == 1) {
550 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0_EN,
551 hz / 32);
552 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN,
553 hz / 32);
554 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2_EN, hz / 4);
555 AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN,
556 hz / 32);
557 } else {
558 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
559 AXE_GPIO1_EN, hz / 3);
560 if (ledmode == 1) {
561 AXE_GPIO_WRITE(AXE_GPIO1_EN, hz / 3);
562 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN,
563 hz / 3);
564 } else {
565 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
566 AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
567 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
568 AXE_GPIO2_EN, hz / 4);
569 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN |
570 AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
571 }
572 }
573 break;
574 case AXE_PHY_MODE_CICADA:
575 case AXE_PHY_MODE_CICADA_V2:
576 case AXE_PHY_MODE_CICADA_V2_ASIX:
577 if (gpio0 == 1)
578 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0 |
579 AXE_GPIO0_EN, hz / 32);
580 else
581 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
582 AXE_GPIO1_EN, hz / 32);
583 break;
584 case AXE_PHY_MODE_AGERE:
585 AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 |
586 AXE_GPIO1_EN, hz / 32);
587 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 |
588 AXE_GPIO2_EN, hz / 32);
589 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2_EN, hz / 4);
590 AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 |
591 AXE_GPIO2_EN, hz / 32);
592 break;
593 case AXE_PHY_MODE_REALTEK_8211CL:
594 case AXE_PHY_MODE_REALTEK_8211BN:
595 case AXE_PHY_MODE_REALTEK_8251CL:
596 val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN :
597 AXE_GPIO1 | AXE_GPIO1_EN;
598 AXE_GPIO_WRITE(val, hz / 32);
599 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
600 AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4);
601 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32);
602 if (phymode == AXE_PHY_MODE_REALTEK_8211CL) {
603 axe_miibus_writereg_locked(sc->axe_dev,
604 sc->axe_phyno, 0x1F, 0x0005);
605 axe_miibus_writereg_locked(sc->axe_dev,
606 sc->axe_phyno, 0x0C, 0x0000);
607 val = axe_miibus_readreg_locked(sc->axe_dev,
608 sc->axe_phyno, 0x0001);
609 axe_miibus_writereg_locked(sc->axe_dev,
610 sc->axe_phyno, 0x01, val | 0x0080);
611 axe_miibus_writereg_locked(sc->axe_dev,
612 sc->axe_phyno, 0x1F, 0x0000);
613 }
614 break;
615 default:
616 /* Unknown PHY model or no need to program GPIOs. */
617 break;
618 }
619
620 /* soft reset */
621 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
622 usbd_delay_ms(sc->axe_udev, 150);
623 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
624 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL);
625 usbd_delay_ms(sc->axe_udev, 150);
626 /* Enable MII/GMII/RGMII for external PHY */
627 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL);
628 usbd_delay_ms(sc->axe_udev, 10);
629 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
630 }
631
632 static void
633 axe_ax88772_init(struct axe_softc *sc)
634 {
635
636 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
637 usbd_delay_ms(sc->axe_udev, 40);
638
639 if (sc->axe_phyno == AXE_772_PHY_NO_EPHY) {
640 /* ask for the embedded PHY */
641 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
642 usbd_delay_ms(sc->axe_udev, 10);
643
644 /* power down and reset state, pin reset state */
645 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
646 usbd_delay_ms(sc->axe_udev, 60);
647
648 /* power down/reset state, pin operating state */
649 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
650 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
651 usbd_delay_ms(sc->axe_udev, 150);
652
653 /* power up, reset */
654 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
655
656 /* power up, operating */
657 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
658 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL);
659 } else {
660 /* ask for external PHY */
661 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
662 usbd_delay_ms(sc->axe_udev, 10);
663
664 /* power down internal PHY */
665 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
666 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL);
667 }
668
669 usbd_delay_ms(sc->axe_udev, 150);
670 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
671 }
672
673 /*
674 * Probe for a AX88172 chip.
675 */
676 int
677 axe_match(device_t parent, cfdata_t match, void *aux)
678 {
679 struct usb_attach_arg *uaa = aux;
680
681 return axe_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
682 UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
683 }
684
685 /*
686 * Attach the interface. Allocate softc structures, do ifmedia
687 * setup and ethernet/BPF attach.
688 */
689 void
690 axe_attach(device_t parent, device_t self, void *aux)
691 {
692 struct axe_softc *sc = device_private(self);
693 struct usb_attach_arg *uaa = aux;
694 struct usbd_device *dev = uaa->uaa_device;
695 usbd_status err;
696 usb_interface_descriptor_t *id;
697 usb_endpoint_descriptor_t *ed;
698 struct mii_data *mii;
699 uint8_t eaddr[ETHER_ADDR_LEN];
700 char *devinfop;
701 const char *devname = device_xname(self);
702 struct ifnet *ifp;
703 int i, s;
704
705 aprint_naive("\n");
706 aprint_normal("\n");
707
708 sc->axe_dev = self;
709 sc->axe_udev = dev;
710
711 devinfop = usbd_devinfo_alloc(dev, 0);
712 aprint_normal_dev(self, "%s\n", devinfop);
713 usbd_devinfo_free(devinfop);
714
715 err = usbd_set_config_no(dev, AXE_CONFIG_NO, 1);
716 if (err) {
717 aprint_error_dev(self, "failed to set configuration"
718 ", err=%s\n", usbd_errstr(err));
719 return;
720 }
721
722 sc->axe_flags = axe_lookup(uaa->uaa_vendor, uaa->uaa_product)->axe_flags;
723
724 mutex_init(&sc->axe_mii_lock, MUTEX_DEFAULT, IPL_NONE);
725 usb_init_task(&sc->axe_tick_task, axe_tick_task, sc, 0);
726
727 err = usbd_device2interface_handle(dev, AXE_IFACE_IDX, &sc->axe_iface);
728 if (err) {
729 aprint_error_dev(self, "getting interface handle failed\n");
730 return;
731 }
732
733 sc->axe_product = uaa->uaa_product;
734 sc->axe_vendor = uaa->uaa_vendor;
735
736 id = usbd_get_interface_descriptor(sc->axe_iface);
737
738 /* decide on what our bufsize will be */
739 if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
740 sc->axe_bufsz = (sc->axe_udev->ud_speed == USB_SPEED_HIGH) ?
741 AXE_178_MAX_BUFSZ : AXE_178_MIN_BUFSZ;
742 else
743 sc->axe_bufsz = AXE_172_BUFSZ;
744
745 /* Find endpoints. */
746 for (i = 0; i < id->bNumEndpoints; i++) {
747 ed = usbd_interface2endpoint_descriptor(sc->axe_iface, i);
748 if (ed == NULL) {
749 aprint_error_dev(self, "couldn't get ep %d\n", i);
750 return;
751 }
752 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
753 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
754 sc->axe_ed[AXE_ENDPT_RX] = ed->bEndpointAddress;
755 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
756 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
757 sc->axe_ed[AXE_ENDPT_TX] = ed->bEndpointAddress;
758 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
759 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
760 sc->axe_ed[AXE_ENDPT_INTR] = ed->bEndpointAddress;
761 }
762 }
763
764 s = splnet();
765
766 /* We need the PHYID for init dance in some cases */
767 axe_lock_mii(sc);
768 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, (void *)&sc->axe_phyaddrs);
769
770 DPRINTF((" phyaddrs[0]: %x phyaddrs[1]: %x\n",
771 sc->axe_phyaddrs[0], sc->axe_phyaddrs[1]));
772 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI);
773 if (sc->axe_phyno == -1)
774 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC);
775 if (sc->axe_phyno == -1) {
776 DPRINTF((" no valid PHY address found, assuming PHY address 0\n"));
777 sc->axe_phyno = 0;
778 }
779
780 if (sc->axe_flags & AX178)
781 axe_ax88178_init(sc);
782 else if (sc->axe_flags & AX772)
783 axe_ax88772_init(sc);
784
785 /*
786 * Get station address.
787 */
788 if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
789 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, &eaddr);
790 else
791 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, &eaddr);
792
793 /*
794 * Load IPG values
795 */
796 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, (void *)&sc->axe_ipgs);
797 axe_unlock_mii(sc);
798
799 /*
800 * An ASIX chip was detected. Inform the world.
801 */
802 aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(eaddr));
803
804 /* Initialize interface info.*/
805 ifp = &sc->sc_if;
806 ifp->if_softc = sc;
807 strncpy(ifp->if_xname, devname, IFNAMSIZ);
808 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
809 ifp->if_ioctl = axe_ioctl;
810 ifp->if_start = axe_start;
811 ifp->if_init = axe_init;
812 ifp->if_stop = axe_stop;
813 ifp->if_watchdog = axe_watchdog;
814
815 IFQ_SET_READY(&ifp->if_snd);
816
817 sc->axe_ec.ec_capabilities = ETHERCAP_VLAN_MTU;
818
819 /* Initialize MII/media info. */
820 mii = &sc->axe_mii;
821 mii->mii_ifp = ifp;
822 mii->mii_readreg = axe_miibus_readreg;
823 mii->mii_writereg = axe_miibus_writereg;
824 mii->mii_statchg = axe_miibus_statchg;
825 mii->mii_flags = MIIF_AUTOTSLEEP;
826
827 sc->axe_ec.ec_mii = mii;
828 if (sc->axe_flags & AXE_MII)
829 ifmedia_init(&mii->mii_media, 0, axe_ifmedia_upd,
830 axe_ifmedia_sts);
831 else
832 ifmedia_init(&mii->mii_media, 0, ether_mediachange,
833 ether_mediastatus);
834
835 mii_attach(sc->axe_dev, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
836 0);
837
838 if (LIST_EMPTY(&mii->mii_phys)) {
839 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
840 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
841 } else
842 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
843
844 /* Attach the interface. */
845 if_attach(ifp);
846 ether_ifattach(ifp, eaddr);
847 rnd_attach_source(&sc->rnd_source, device_xname(sc->axe_dev),
848 RND_TYPE_NET, RND_FLAG_DEFAULT);
849
850 callout_init(&sc->axe_stat_ch, 0);
851 callout_setfunc(&sc->axe_stat_ch, axe_tick, sc);
852
853 sc->axe_attached = true;
854 splx(s);
855
856 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->axe_udev, sc->axe_dev);
857
858 if (!pmf_device_register(self, NULL, NULL))
859 aprint_error_dev(self, "couldn't establish power handler\n");
860 }
861
862 int
863 axe_detach(device_t self, int flags)
864 {
865 struct axe_softc *sc = device_private(self);
866 int s;
867 struct ifnet *ifp = &sc->sc_if;
868
869 DPRINTFN(2,("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
870
871 /* Detached before attached finished, so just bail out. */
872 if (!sc->axe_attached)
873 return 0;
874
875 pmf_device_deregister(self);
876
877 sc->axe_dying = true;
878
879 /*
880 * Remove any pending tasks. They cannot be executing because they run
881 * in the same thread as detach.
882 */
883 usb_rem_task(sc->axe_udev, &sc->axe_tick_task);
884
885 s = splusb();
886
887 if (ifp->if_flags & IFF_RUNNING)
888 axe_stop(ifp, 1);
889
890 callout_destroy(&sc->axe_stat_ch);
891 mutex_destroy(&sc->axe_mii_lock);
892 rnd_detach_source(&sc->rnd_source);
893 mii_detach(&sc->axe_mii, MII_PHY_ANY, MII_OFFSET_ANY);
894 ifmedia_delete_instance(&sc->axe_mii.mii_media, IFM_INST_ANY);
895 ether_ifdetach(ifp);
896 if_detach(ifp);
897
898 #ifdef DIAGNOSTIC
899 if (sc->axe_ep[AXE_ENDPT_TX] != NULL ||
900 sc->axe_ep[AXE_ENDPT_RX] != NULL ||
901 sc->axe_ep[AXE_ENDPT_INTR] != NULL)
902 aprint_debug_dev(self, "detach has active endpoints\n");
903 #endif
904
905 sc->axe_attached = false;
906
907 if (--sc->axe_refcnt >= 0) {
908 /* Wait for processes to go away. */
909 usb_detach_waitold(sc->axe_dev);
910 }
911 splx(s);
912
913 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->axe_udev, sc->axe_dev);
914
915 return 0;
916 }
917
918 int
919 axe_activate(device_t self, devact_t act)
920 {
921 struct axe_softc *sc = device_private(self);
922
923 DPRINTFN(2,("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
924
925 switch (act) {
926 case DVACT_DEACTIVATE:
927 if_deactivate(&sc->axe_ec.ec_if);
928 sc->axe_dying = true;
929 return 0;
930 default:
931 return EOPNOTSUPP;
932 }
933 }
934
935 static int
936 axe_rx_list_init(struct axe_softc *sc)
937 {
938 struct axe_cdata *cd;
939 struct axe_chain *c;
940 int i;
941
942 DPRINTF(("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
943
944 cd = &sc->axe_cdata;
945 for (i = 0; i < AXE_RX_LIST_CNT; i++) {
946 c = &cd->axe_rx_chain[i];
947 c->axe_sc = sc;
948 c->axe_idx = i;
949 if (c->axe_xfer == NULL) {
950 int err = usbd_create_xfer(sc->axe_ep[AXE_ENDPT_RX],
951 sc->axe_bufsz, USBD_SHORT_XFER_OK, 0, &c->axe_xfer);
952 if (err)
953 return err;
954 c->axe_buf = usbd_get_buffer(c->axe_xfer);
955 }
956 }
957
958 return 0;
959 }
960
961 static int
962 axe_tx_list_init(struct axe_softc *sc)
963 {
964 struct axe_cdata *cd;
965 struct axe_chain *c;
966 int i;
967
968 DPRINTF(("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
969
970 cd = &sc->axe_cdata;
971 for (i = 0; i < AXE_TX_LIST_CNT; i++) {
972 c = &cd->axe_tx_chain[i];
973 c->axe_sc = sc;
974 c->axe_idx = i;
975 if (c->axe_xfer == NULL) {
976 int err = usbd_create_xfer(sc->axe_ep[AXE_ENDPT_TX],
977 sc->axe_bufsz, USBD_FORCE_SHORT_XFER, 0,
978 &c->axe_xfer);
979 if (err)
980 return err;
981 c->axe_buf = usbd_get_buffer(c->axe_xfer);
982 }
983 }
984
985 return 0;
986 }
987
988 /*
989 * A frame has been uploaded: pass the resulting mbuf chain up to
990 * the higher level protocols.
991 */
992 static void
993 axe_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status)
994 {
995 struct axe_softc *sc;
996 struct axe_chain *c;
997 struct ifnet *ifp;
998 uint8_t *buf;
999 uint32_t total_len;
1000 u_int rxlen, pktlen;
1001 struct mbuf *m;
1002 struct axe_sframe_hdr hdr;
1003 int s;
1004
1005 c = (struct axe_chain *)priv;
1006 sc = c->axe_sc;
1007 buf = c->axe_buf;
1008 ifp = &sc->sc_if;
1009
1010 DPRINTFN(10,("%s: %s: enter\n", device_xname(sc->axe_dev),__func__));
1011
1012 if (sc->axe_dying)
1013 return;
1014
1015 if ((ifp->if_flags & IFF_RUNNING) == 0)
1016 return;
1017
1018 if (status != USBD_NORMAL_COMPLETION) {
1019 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
1020 return;
1021 if (usbd_ratecheck(&sc->axe_rx_notice))
1022 aprint_error_dev(sc->axe_dev, "usb errors on rx: %s\n",
1023 usbd_errstr(status));
1024 if (status == USBD_STALLED)
1025 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_RX]);
1026 goto done;
1027 }
1028
1029 usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
1030
1031 do {
1032 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
1033 if (total_len < sizeof(hdr)) {
1034 ifp->if_ierrors++;
1035 goto done;
1036 }
1037
1038 memcpy(&hdr, buf, sizeof(hdr));
1039 total_len -= sizeof(hdr);
1040 buf += sizeof(hdr);
1041
1042 if (((le16toh(hdr.len) & AXE_RH1M_RXLEN_MASK) ^
1043 (le16toh(hdr.ilen) & AXE_RH1M_RXLEN_MASK)) !=
1044 AXE_RH1M_RXLEN_MASK) {
1045 ifp->if_ierrors++;
1046 goto done;
1047 }
1048
1049 rxlen = le16toh(hdr.len) & AXE_RH1M_RXLEN_MASK;
1050 if (total_len < rxlen) {
1051 pktlen = total_len;
1052 total_len = 0;
1053 } else {
1054 pktlen = rxlen;
1055 rxlen = roundup2(rxlen, 2);
1056 total_len -= rxlen;
1057 }
1058
1059 } else { /* AX172 */
1060 pktlen = rxlen = total_len;
1061 total_len = 0;
1062 }
1063
1064 MGETHDR(m, M_DONTWAIT, MT_DATA);
1065 if (m == NULL) {
1066 ifp->if_ierrors++;
1067 goto done;
1068 }
1069
1070 if (pktlen > MHLEN - ETHER_ALIGN) {
1071 MCLGET(m, M_DONTWAIT);
1072 if ((m->m_flags & M_EXT) == 0) {
1073 m_freem(m);
1074 ifp->if_ierrors++;
1075 goto done;
1076 }
1077 }
1078 m->m_data += ETHER_ALIGN;
1079
1080 ifp->if_ipackets++;
1081 m_set_rcvif(m, ifp);
1082 m->m_pkthdr.len = m->m_len = pktlen;
1083
1084 memcpy(mtod(m, uint8_t *), buf, pktlen);
1085 buf += rxlen;
1086
1087 s = splnet();
1088
1089 bpf_mtap(ifp, m);
1090
1091 DPRINTFN(10,("%s: %s: deliver %d\n", device_xname(sc->axe_dev),
1092 __func__, m->m_len));
1093 if_percpuq_enqueue((ifp)->if_percpuq, (m));
1094
1095 splx(s);
1096
1097 } while (total_len > 0);
1098
1099 done:
1100
1101 /* Setup new transfer. */
1102 usbd_setup_xfer(xfer, c, c->axe_buf, sc->axe_bufsz,
1103 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, axe_rxeof);
1104 usbd_transfer(xfer);
1105
1106 DPRINTFN(10,("%s: %s: start rx\n", device_xname(sc->axe_dev), __func__));
1107 }
1108
1109 /*
1110 * A frame was downloaded to the chip. It's safe for us to clean up
1111 * the list buffers.
1112 */
1113
1114 static void
1115 axe_txeof(struct usbd_xfer *xfer, void * priv, usbd_status status)
1116 {
1117 struct axe_softc *sc;
1118 struct axe_chain *c;
1119 struct ifnet *ifp;
1120 int s;
1121
1122 c = priv;
1123 sc = c->axe_sc;
1124 ifp = &sc->sc_if;
1125
1126 if (sc->axe_dying)
1127 return;
1128
1129 s = splnet();
1130
1131 ifp->if_timer = 0;
1132 ifp->if_flags &= ~IFF_OACTIVE;
1133
1134 if (status != USBD_NORMAL_COMPLETION) {
1135 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
1136 splx(s);
1137 return;
1138 }
1139 ifp->if_oerrors++;
1140 aprint_error_dev(sc->axe_dev, "usb error on tx: %s\n",
1141 usbd_errstr(status));
1142 if (status == USBD_STALLED)
1143 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_TX]);
1144 splx(s);
1145 return;
1146 }
1147 ifp->if_opackets++;
1148
1149 if (!IFQ_IS_EMPTY(&ifp->if_snd))
1150 axe_start(ifp);
1151
1152 splx(s);
1153 }
1154
1155 static void
1156 axe_tick(void *xsc)
1157 {
1158 struct axe_softc *sc = xsc;
1159
1160 if (sc == NULL)
1161 return;
1162
1163 DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->axe_dev), __func__));
1164
1165 if (sc->axe_dying)
1166 return;
1167
1168 /* Perform periodic stuff in process context */
1169 usb_add_task(sc->axe_udev, &sc->axe_tick_task, USB_TASKQ_DRIVER);
1170 }
1171
1172 static void
1173 axe_tick_task(void *xsc)
1174 {
1175 int s;
1176 struct axe_softc *sc;
1177 struct ifnet *ifp;
1178 struct mii_data *mii;
1179
1180 sc = xsc;
1181
1182 if (sc == NULL)
1183 return;
1184
1185 if (sc->axe_dying)
1186 return;
1187
1188 ifp = &sc->sc_if;
1189 mii = &sc->axe_mii;
1190
1191 if (mii == NULL)
1192 return;
1193
1194 s = splnet();
1195
1196 mii_tick(mii);
1197 if (sc->axe_link == 0 &&
1198 (mii->mii_media_status & IFM_ACTIVE) != 0 &&
1199 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1200 DPRINTF(("%s: %s: got link\n", device_xname(sc->axe_dev),
1201 __func__));
1202 sc->axe_link++;
1203 if (!IFQ_IS_EMPTY(&ifp->if_snd))
1204 axe_start(ifp);
1205 }
1206
1207 callout_schedule(&sc->axe_stat_ch, hz);
1208
1209 splx(s);
1210 }
1211
1212 static int
1213 axe_encap(struct axe_softc *sc, struct mbuf *m, int idx)
1214 {
1215 struct ifnet *ifp = &sc->sc_if;
1216 struct axe_chain *c;
1217 usbd_status err;
1218 struct axe_sframe_hdr hdr;
1219 int length, boundary;
1220
1221 c = &sc->axe_cdata.axe_tx_chain[idx];
1222
1223 /*
1224 * Copy the mbuf data into a contiguous buffer, leaving two
1225 * bytes at the beginning to hold the frame length.
1226 */
1227 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
1228 boundary = (sc->axe_udev->ud_speed == USB_SPEED_HIGH) ? 512 : 64;
1229
1230 hdr.len = htole16(m->m_pkthdr.len);
1231 hdr.ilen = ~hdr.len;
1232
1233 memcpy(c->axe_buf, &hdr, sizeof(hdr));
1234 length = sizeof(hdr);
1235
1236 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf + length);
1237 length += m->m_pkthdr.len;
1238
1239 if ((length % boundary) == 0) {
1240 hdr.len = 0x0000;
1241 hdr.ilen = 0xffff;
1242 memcpy(c->axe_buf + length, &hdr, sizeof(hdr));
1243 length += sizeof(hdr);
1244 }
1245 } else {
1246 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf);
1247 length = m->m_pkthdr.len;
1248 }
1249
1250 usbd_setup_xfer(c->axe_xfer, c, c->axe_buf, length,
1251 USBD_FORCE_SHORT_XFER, 10000, axe_txeof);
1252
1253 /* Transmit */
1254 err = usbd_transfer(c->axe_xfer);
1255 if (err != USBD_IN_PROGRESS) {
1256 axe_stop(ifp, 0);
1257 return EIO;
1258 }
1259
1260 sc->axe_cdata.axe_tx_cnt++;
1261
1262 return 0;
1263 }
1264
1265 static void
1266 axe_start(struct ifnet *ifp)
1267 {
1268 struct axe_softc *sc;
1269 struct mbuf *m;
1270
1271 sc = ifp->if_softc;
1272
1273 if ((sc->axe_flags & AXE_MII) != 0 && sc->axe_link == 0)
1274 return;
1275
1276 if ((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING)) != IFF_RUNNING)
1277 return;
1278
1279 IFQ_POLL(&ifp->if_snd, m);
1280 if (m == NULL) {
1281 return;
1282 }
1283
1284 if (axe_encap(sc, m, 0)) {
1285 ifp->if_flags |= IFF_OACTIVE;
1286 return;
1287 }
1288 IFQ_DEQUEUE(&ifp->if_snd, m);
1289
1290 /*
1291 * If there's a BPF listener, bounce a copy of this frame
1292 * to him.
1293 */
1294 bpf_mtap(ifp, m);
1295 m_freem(m);
1296
1297 ifp->if_flags |= IFF_OACTIVE;
1298
1299 /*
1300 * Set a timeout in case the chip goes out to lunch.
1301 */
1302 ifp->if_timer = 5;
1303
1304 return;
1305 }
1306
1307 static int
1308 axe_init(struct ifnet *ifp)
1309 {
1310 struct axe_softc *sc = ifp->if_softc;
1311 struct axe_chain *c;
1312 usbd_status err;
1313 int rxmode;
1314 int i, s;
1315 uint8_t eaddr[ETHER_ADDR_LEN];
1316
1317 s = splnet();
1318
1319 if (ifp->if_flags & IFF_RUNNING)
1320 axe_stop(ifp, 0);
1321
1322 /*
1323 * Cancel pending I/O and free all RX/TX buffers.
1324 */
1325 axe_reset(sc);
1326
1327 /* Set MAC address */
1328 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
1329 memcpy(eaddr, CLLADDR(ifp->if_sadl), sizeof(eaddr));
1330 axe_lock_mii(sc);
1331 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, eaddr);
1332 axe_unlock_mii(sc);
1333 }
1334
1335 /* Set transmitter IPG values */
1336 axe_lock_mii(sc);
1337 if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
1338 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2],
1339 (sc->axe_ipgs[1] << 8) | (sc->axe_ipgs[0]), NULL);
1340 else {
1341 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL);
1342 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL);
1343 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL);
1344 }
1345
1346 /* Enable receiver, set RX mode */
1347 rxmode = AXE_RXCMD_BROADCAST | AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE;
1348 if (sc->axe_flags & AX772B)
1349 rxmode |= AXE_772B_RXCMD_RH1M;
1350 else if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
1351 if (sc->axe_udev->ud_speed == USB_SPEED_HIGH) {
1352 /* Largest possible USB buffer size for AX88178 */
1353 rxmode |= AXE_178_RXCMD_MFB;
1354 }
1355 } else
1356 rxmode |= AXE_172_RXCMD_UNICAST;
1357
1358 /* If we want promiscuous mode, set the allframes bit. */
1359 if (ifp->if_flags & IFF_PROMISC)
1360 rxmode |= AXE_RXCMD_PROMISC;
1361
1362 if (ifp->if_flags & IFF_BROADCAST)
1363 rxmode |= AXE_RXCMD_BROADCAST;
1364
1365 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
1366 axe_unlock_mii(sc);
1367
1368 /* Load the multicast filter. */
1369 axe_setmulti(sc);
1370
1371 /* Open RX and TX pipes. */
1372 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_RX],
1373 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_RX]);
1374 if (err) {
1375 aprint_error_dev(sc->axe_dev, "open rx pipe failed: %s\n",
1376 usbd_errstr(err));
1377 splx(s);
1378 return EIO;
1379 }
1380
1381 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_TX],
1382 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_TX]);
1383 if (err) {
1384 aprint_error_dev(sc->axe_dev, "open tx pipe failed: %s\n",
1385 usbd_errstr(err));
1386 splx(s);
1387 return EIO;
1388 }
1389
1390 /* Init RX ring. */
1391 if (axe_rx_list_init(sc) != 0) {
1392 aprint_error_dev(sc->axe_dev, "rx list init failed\n");
1393 splx(s);
1394 return ENOBUFS;
1395 }
1396
1397 /* Init TX ring. */
1398 if (axe_tx_list_init(sc) != 0) {
1399 aprint_error_dev(sc->axe_dev, "tx list init failed\n");
1400 splx(s);
1401 return ENOBUFS;
1402 }
1403
1404 /* Start up the receive pipe. */
1405 for (i = 0; i < AXE_RX_LIST_CNT; i++) {
1406 c = &sc->axe_cdata.axe_rx_chain[i];
1407 usbd_setup_xfer(c->axe_xfer, c, c->axe_buf, sc->axe_bufsz,
1408 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, axe_rxeof);
1409 usbd_transfer(c->axe_xfer);
1410 }
1411
1412 ifp->if_flags |= IFF_RUNNING;
1413 ifp->if_flags &= ~IFF_OACTIVE;
1414
1415 splx(s);
1416
1417 callout_schedule(&sc->axe_stat_ch, hz);
1418 return 0;
1419 }
1420
1421 static int
1422 axe_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1423 {
1424 struct axe_softc *sc = ifp->if_softc;
1425 int s;
1426 int error = 0;
1427
1428 s = splnet();
1429
1430 switch(cmd) {
1431 case SIOCSIFFLAGS:
1432 if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1433 break;
1434
1435 switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
1436 case IFF_RUNNING:
1437 axe_stop(ifp, 1);
1438 break;
1439 case IFF_UP:
1440 axe_init(ifp);
1441 break;
1442 case IFF_UP | IFF_RUNNING:
1443 if ((ifp->if_flags ^ sc->axe_if_flags) == IFF_PROMISC)
1444 axe_setmulti(sc);
1445 else
1446 axe_init(ifp);
1447 break;
1448 }
1449 sc->axe_if_flags = ifp->if_flags;
1450 break;
1451
1452 default:
1453 if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET)
1454 break;
1455
1456 error = 0;
1457
1458 if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI)
1459 axe_setmulti(sc);
1460
1461 }
1462 splx(s);
1463
1464 return error;
1465 }
1466
1467 static void
1468 axe_watchdog(struct ifnet *ifp)
1469 {
1470 struct axe_softc *sc;
1471 struct axe_chain *c;
1472 usbd_status stat;
1473 int s;
1474
1475 sc = ifp->if_softc;
1476
1477 ifp->if_oerrors++;
1478 aprint_error_dev(sc->axe_dev, "watchdog timeout\n");
1479
1480 s = splusb();
1481 c = &sc->axe_cdata.axe_tx_chain[0];
1482 usbd_get_xfer_status(c->axe_xfer, NULL, NULL, NULL, &stat);
1483 axe_txeof(c->axe_xfer, c, stat);
1484
1485 if (!IFQ_IS_EMPTY(&ifp->if_snd))
1486 axe_start(ifp);
1487 splx(s);
1488 }
1489
1490 /*
1491 * Stop the adapter and free any mbufs allocated to the
1492 * RX and TX lists.
1493 */
1494 static void
1495 axe_stop(struct ifnet *ifp, int disable)
1496 {
1497 struct axe_softc *sc = ifp->if_softc;
1498 usbd_status err;
1499 int i;
1500
1501 axe_reset(sc);
1502
1503 ifp->if_timer = 0;
1504 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1505
1506 callout_stop(&sc->axe_stat_ch);
1507
1508 /* Stop transfers. */
1509 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) {
1510 err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]);
1511 if (err) {
1512 aprint_error_dev(sc->axe_dev,
1513 "abort rx pipe failed: %s\n", usbd_errstr(err));
1514 }
1515 }
1516
1517 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) {
1518 err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]);
1519 if (err) {
1520 aprint_error_dev(sc->axe_dev,
1521 "abort tx pipe failed: %s\n", usbd_errstr(err));
1522 }
1523 }
1524
1525 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) {
1526 err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
1527 if (err) {
1528 aprint_error_dev(sc->axe_dev,
1529 "abort intr pipe failed: %s\n", usbd_errstr(err));
1530 }
1531 }
1532
1533 /* Free RX resources. */
1534 for (i = 0; i < AXE_RX_LIST_CNT; i++) {
1535 if (sc->axe_cdata.axe_rx_chain[i].axe_xfer != NULL) {
1536 usbd_destroy_xfer(sc->axe_cdata.axe_rx_chain[i].axe_xfer);
1537 sc->axe_cdata.axe_rx_chain[i].axe_xfer = NULL;
1538 }
1539 }
1540
1541 /* Free TX resources. */
1542 for (i = 0; i < AXE_TX_LIST_CNT; i++) {
1543 if (sc->axe_cdata.axe_tx_chain[i].axe_xfer != NULL) {
1544 usbd_destroy_xfer(sc->axe_cdata.axe_tx_chain[i].axe_xfer);
1545 sc->axe_cdata.axe_tx_chain[i].axe_xfer = NULL;
1546 }
1547 }
1548
1549 /* Close pipes. */
1550 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) {
1551 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_RX]);
1552 if (err) {
1553 aprint_error_dev(sc->axe_dev,
1554 "close rx pipe failed: %s\n", usbd_errstr(err));
1555 }
1556 sc->axe_ep[AXE_ENDPT_RX] = NULL;
1557 }
1558
1559 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) {
1560 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_TX]);
1561 if (err) {
1562 aprint_error_dev(sc->axe_dev,
1563 "close tx pipe failed: %s\n", usbd_errstr(err));
1564 }
1565 sc->axe_ep[AXE_ENDPT_TX] = NULL;
1566 }
1567
1568 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) {
1569 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
1570 if (err) {
1571 aprint_error_dev(sc->axe_dev,
1572 "close intr pipe failed: %s\n", usbd_errstr(err));
1573 }
1574 sc->axe_ep[AXE_ENDPT_INTR] = NULL;
1575 }
1576
1577 sc->axe_link = 0;
1578 }
1579
1580 MODULE(MODULE_CLASS_DRIVER, if_axe, "bpf");
1581
1582 #ifdef _MODULE
1583 #include "ioconf.c"
1584 #endif
1585
1586 static int
1587 if_axe_modcmd(modcmd_t cmd, void *aux)
1588 {
1589 int error = 0;
1590
1591 switch (cmd) {
1592 case MODULE_CMD_INIT:
1593 #ifdef _MODULE
1594 error = config_init_component(cfdriver_ioconf_axe,
1595 cfattach_ioconf_axe, cfdata_ioconf_axe);
1596 #endif
1597 return error;
1598 case MODULE_CMD_FINI:
1599 #ifdef _MODULE
1600 error = config_fini_component(cfdriver_ioconf_axe,
1601 cfattach_ioconf_axe, cfdata_ioconf_axe);
1602 #endif
1603 return error;
1604 default:
1605 return ENOTTY;
1606 }
1607 }
1608