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if_axereg.h revision 1.8
      1  1.8  pgoyette /*	$NetBSD: if_axereg.h,v 1.8 2010/06/23 19:00:26 pgoyette Exp $	*/
      2  1.1  augustss 
      3  1.1  augustss /*
      4  1.1  augustss  * Copyright (c) 1997, 1998, 1999, 2000-2003
      5  1.1  augustss  *	Bill Paul <wpaul (at) windriver.com>.  All rights reserved.
      6  1.1  augustss  *
      7  1.1  augustss  * Redistribution and use in source and binary forms, with or without
      8  1.1  augustss  * modification, are permitted provided that the following conditions
      9  1.1  augustss  * are met:
     10  1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     11  1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     12  1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  augustss  *    documentation and/or other materials provided with the distribution.
     15  1.1  augustss  * 3. All advertising materials mentioning features or use of this software
     16  1.1  augustss  *    must display the following acknowledgement:
     17  1.1  augustss  *	This product includes software developed by Bill Paul.
     18  1.1  augustss  * 4. Neither the name of the author nor the names of any co-contributors
     19  1.1  augustss  *    may be used to endorse or promote products derived from this software
     20  1.1  augustss  *    without specific prior written permission.
     21  1.1  augustss  *
     22  1.1  augustss  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     23  1.1  augustss  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  1.1  augustss  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  1.1  augustss  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     26  1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27  1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28  1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29  1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30  1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31  1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     32  1.1  augustss  * THE POSSIBILITY OF SUCH DAMAGE.
     33  1.1  augustss  *
     34  1.1  augustss  * $FreeBSD: src/sys/dev/usb/if_axereg.h,v 1.2 2003/06/15 21:45:43 wpaul Exp $
     35  1.1  augustss  */
     36  1.1  augustss 
     37  1.1  augustss /*
     38  1.1  augustss  * Definitions for the ASIX Electronics AX88172 to ethernet controller.
     39  1.1  augustss  */
     40  1.1  augustss 
     41  1.1  augustss 
     42  1.1  augustss /*
     43  1.1  augustss  * Vendor specific commands
     44  1.1  augustss  * ASIX conveniently doesn't document the 'set NODEID' command in their
     45  1.1  augustss  * datasheet (thanks a lot guys).
     46  1.1  augustss  * To make handling these commands easier, I added some extra data
     47  1.1  augustss  * which is decided by the axe_cmd() routine. Commands are encoded
     48  1.1  augustss  * in 16 bites, with the format: LDCC. L and D are both nibbles in
     49  1.1  augustss  * the high byte. L represents the data length (0 to 15) and D
     50  1.1  augustss  * represents the direction (0 for vendor read, 1 for vendor write).
     51  1.1  augustss  * CC is the command byte, as specified in the manual.
     52  1.1  augustss  */
     53  1.1  augustss 
     54  1.1  augustss #define AXE_CMD_DIR(x)	(((x) & 0x0F00) >> 8)
     55  1.1  augustss #define AXE_CMD_LEN(x)	(((x) & 0xF000) >> 12)
     56  1.1  augustss #define AXE_CMD_CMD(x)	((x) & 0x00FF)
     57  1.1  augustss 
     58  1.8  pgoyette #define AXE_172_CMD_READ_RXTX_SRAM		0x2002
     59  1.8  pgoyette #define AXE_182_CMD_READ_RXTX_SRAM		0x6002
     60  1.8  pgoyette #define AXE_172_CMD_WRITE_RX_SRAM		0x0103
     61  1.8  pgoyette #define AXE_172_CMD_WRITE_TX_SRAM		0x0104
     62  1.8  pgoyette #define AXE_182_CMD_WRITE_RXTX_SRAM		0x8103
     63  1.1  augustss #define AXE_CMD_MII_OPMODE_SW			0x0106
     64  1.1  augustss #define AXE_CMD_MII_READ_REG			0x2007
     65  1.1  augustss #define AXE_CMD_MII_WRITE_REG			0x2108
     66  1.1  augustss #define AXE_CMD_MII_READ_OPMODE			0x1009
     67  1.1  augustss #define AXE_CMD_MII_OPMODE_HW			0x010A
     68  1.1  augustss #define AXE_CMD_SROM_READ			0x200B
     69  1.1  augustss #define AXE_CMD_SROM_WRITE			0x010C
     70  1.1  augustss #define AXE_CMD_SROM_WR_ENABLE			0x010D
     71  1.1  augustss #define AXE_CMD_SROM_WR_DISABLE			0x010E
     72  1.1  augustss #define AXE_CMD_RXCTL_READ			0x200F
     73  1.1  augustss #define AXE_CMD_RXCTL_WRITE			0x0110
     74  1.1  augustss #define AXE_CMD_READ_IPG012			0x3011
     75  1.8  pgoyette #define AXE_172_CMD_WRITE_IPG0			0x0112
     76  1.8  pgoyette #define AXE_172_CMD_WRITE_IPG1			0x0113
     77  1.8  pgoyette #define AXE_172_CMD_WRITE_IPG2			0x0114
     78  1.8  pgoyette #define AXE_178_CMD_WRITE_IPG012		0x0112
     79  1.1  augustss #define AXE_CMD_READ_MCAST			0x8015
     80  1.1  augustss #define AXE_CMD_WRITE_MCAST			0x8116
     81  1.8  pgoyette #define AXE_172_CMD_READ_NODEID			0x6017
     82  1.8  pgoyette #define AXE_172_CMD_WRITE_NODEID		0x6118
     83  1.8  pgoyette #define AXE_178_CMD_READ_NODEID			0x6013
     84  1.8  pgoyette #define AXE_178_CMD_WRITE_NODEID		0x6114
     85  1.1  augustss #define AXE_CMD_READ_PHYID			0x2019
     86  1.8  pgoyette #define AXE_172_CMD_READ_MEDIA			0x101A
     87  1.8  pgoyette #define AXE_178_CMD_READ_MEDIA			0x201A
     88  1.1  augustss #define AXE_CMD_WRITE_MEDIA			0x011B
     89  1.1  augustss #define AXE_CMD_READ_MONITOR_MODE		0x101C
     90  1.1  augustss #define AXE_CMD_WRITE_MONITOR_MODE		0x011D
     91  1.1  augustss #define AXE_CMD_READ_GPIO			0x101E
     92  1.1  augustss #define AXE_CMD_WRITE_GPIO			0x011F
     93  1.8  pgoyette #define AXE_CMD_SW_RESET_REG			0x0120
     94  1.8  pgoyette #define AXE_CMD_SW_PHY_STATUS			0x0021
     95  1.8  pgoyette #define AXE_CMD_SW_PHY_SELECT			0x0122
     96  1.8  pgoyette 
     97  1.8  pgoyette #define AXE_SW_RESET_CLEAR			0x00
     98  1.8  pgoyette #define AXE_SW_RESET_RR				0x01
     99  1.8  pgoyette #define AXE_SW_RESET_RT				0x02
    100  1.8  pgoyette #define AXE_SW_RESET_PRTE			0x04
    101  1.8  pgoyette #define AXE_SW_RESET_PRL			0x08
    102  1.8  pgoyette #define AXE_SW_RESET_BZ				0x10
    103  1.8  pgoyette #define AXE_SW_RESET_IPRL			0x20
    104  1.8  pgoyette #define AXE_SW_RESET_IPPD			0x40
    105  1.8  pgoyette 
    106  1.8  pgoyette /* AX88178 documentation says to always write this bit... */
    107  1.8  pgoyette #define AXE_178_RESET_MAGIC			0x40
    108  1.8  pgoyette 
    109  1.8  pgoyette #define AXE_178_MEDIA_GMII			0x0001
    110  1.8  pgoyette #define AXE_MEDIA_FULL_DUPLEX			0x0002
    111  1.8  pgoyette #define AXE_172_MEDIA_TX_ABORT_ALLOW		0x0004
    112  1.8  pgoyette /* AX88178 documentation says to always write 1 to reserved bit... */
    113  1.8  pgoyette #define AXE_178_MEDIA_MAGIC			0x0004
    114  1.8  pgoyette #define AXE_178_MEDIA_ENCK			0x0008
    115  1.8  pgoyette #define AXE_172_MEDIA_FLOW_CONTROL_EN		0x0010
    116  1.8  pgoyette #define AXE_178_MEDIA_RXFLOW_CONTROL_EN		0x0010
    117  1.8  pgoyette #define AXE_178_MEDIA_TXFLOW_CONTROL_EN		0x0020
    118  1.8  pgoyette #define AXE_178_MEDIA_JUMBO_EN			0x0040
    119  1.8  pgoyette #define AXE_178_MEDIA_LTPF_ONLY			0x0080
    120  1.8  pgoyette #define AXE_178_MEDIA_RX_EN			0x0100
    121  1.8  pgoyette #define AXE_178_MEDIA_100TX			0x0200
    122  1.8  pgoyette #define AXE_178_MEDIA_SBP			0x0800
    123  1.8  pgoyette #define AXE_178_MEDIA_SUPERMAC			0x1000
    124  1.2  augustss 
    125  1.1  augustss #define AXE_RXCMD_PROMISC			0x0001
    126  1.1  augustss #define AXE_RXCMD_ALLMULTI			0x0002
    127  1.8  pgoyette #define AXE_172_RXCMD_UNICAST			0x0004
    128  1.8  pgoyette #define AXE_178_RXCMD_KEEP_INVALID_CRC		0x0004
    129  1.1  augustss #define AXE_RXCMD_BROADCAST			0x0008
    130  1.1  augustss #define AXE_RXCMD_MULTICAST			0x0010
    131  1.1  augustss #define AXE_RXCMD_ENABLE			0x0080
    132  1.8  pgoyette #define AXE_178_RXCMD_MFB			0x0300
    133  1.1  augustss 
    134  1.1  augustss #define AXE_NOPHY				0xE0
    135  1.8  pgoyette #define AXE_INTPHY				0x10
    136  1.1  augustss 
    137  1.1  augustss #define AXE_TIMEOUT		1000
    138  1.8  pgoyette 
    139  1.8  pgoyette #define AXE_172_BUFSZ		1536
    140  1.8  pgoyette #define AXE_178_MIN_BUFSZ	2048
    141  1.8  pgoyette #define AXE_178_MAX_BUFSZ	16384
    142  1.8  pgoyette 
    143  1.1  augustss #define AXE_MIN_FRAMELEN	60
    144  1.1  augustss #define AXE_RX_FRAMES		1
    145  1.1  augustss #define AXE_TX_FRAMES		1
    146  1.1  augustss 
    147  1.1  augustss #define AXE_RX_LIST_CNT		1
    148  1.1  augustss #define AXE_TX_LIST_CNT		1
    149  1.1  augustss 
    150  1.1  augustss #define AXE_CTL_READ		0x01
    151  1.1  augustss #define AXE_CTL_WRITE		0x02
    152  1.1  augustss 
    153  1.1  augustss #define AXE_CONFIG_NO		1
    154  1.1  augustss #define AXE_IFACE_IDX		0
    155  1.1  augustss 
    156  1.1  augustss /*
    157  1.1  augustss  * The interrupt endpoint is currently unused
    158  1.1  augustss  * by the ASIX part.
    159  1.1  augustss  */
    160  1.1  augustss #define AXE_ENDPT_RX		0x0
    161  1.1  augustss #define AXE_ENDPT_TX		0x1
    162  1.1  augustss #define AXE_ENDPT_INTR		0x2
    163  1.1  augustss #define AXE_ENDPT_MAX		0x3
    164  1.1  augustss 
    165  1.1  augustss struct axe_type {
    166  1.1  augustss 	struct usb_devno	axe_dev;
    167  1.1  augustss 	u_int16_t		axe_flags;
    168  1.8  pgoyette #define AX178		0x0001		/* AX88178 */
    169  1.8  pgoyette #define AX772		0x0002		/* AX88772 */
    170  1.8  pgoyette #define AXE_ANY_PHY	0x1000		/* Chip lies about valid phys */
    171  1.8  pgoyette #define AXE_MII		0x2000		/* Chip-specific MII handling */
    172  1.1  augustss };
    173  1.1  augustss 
    174  1.1  augustss struct axe_softc;
    175  1.1  augustss 
    176  1.1  augustss struct axe_chain {
    177  1.1  augustss 	struct axe_softc	*axe_sc;
    178  1.1  augustss 	usbd_xfer_handle	axe_xfer;
    179  1.1  augustss 	char			*axe_buf;
    180  1.1  augustss 	struct mbuf		*axe_mbuf;
    181  1.1  augustss 	int			axe_accum;
    182  1.1  augustss 	int			axe_idx;
    183  1.1  augustss };
    184  1.1  augustss 
    185  1.1  augustss struct axe_cdata {
    186  1.1  augustss 	struct axe_chain	axe_tx_chain[AXE_TX_LIST_CNT];
    187  1.1  augustss 	struct axe_chain	axe_rx_chain[AXE_RX_LIST_CNT];
    188  1.1  augustss 	int			axe_tx_prod;
    189  1.1  augustss 	int			axe_tx_cons;
    190  1.1  augustss 	int			axe_tx_cnt;
    191  1.1  augustss 	int			axe_rx_prod;
    192  1.1  augustss };
    193  1.1  augustss 
    194  1.8  pgoyette struct axe_sframe_hdr {
    195  1.8  pgoyette 	u_int16_t		len;
    196  1.8  pgoyette 	u_int16_t		ilen;
    197  1.8  pgoyette } __packed;
    198  1.1  augustss 
    199  1.1  augustss struct axe_softc {
    200  1.7    dyoung 	device_t axe_dev;
    201  1.1  augustss 	struct ethercom		axe_ec;
    202  1.1  augustss 	struct mii_data		axe_mii;
    203  1.1  augustss #if NRND > 0
    204  1.1  augustss 	rndsource_element_t	rnd_source;
    205  1.1  augustss #endif
    206  1.1  augustss 	usbd_device_handle	axe_udev;
    207  1.1  augustss 	usbd_interface_handle	axe_iface;
    208  1.1  augustss 
    209  1.1  augustss 	u_int16_t		axe_vendor;
    210  1.1  augustss 	u_int16_t		axe_product;
    211  1.8  pgoyette 	u_int16_t		axe_flags;
    212  1.1  augustss 
    213  1.1  augustss 	int			axe_ed[AXE_ENDPT_MAX];
    214  1.1  augustss 	usbd_pipe_handle	axe_ep[AXE_ENDPT_MAX];
    215  1.1  augustss 	int			axe_if_flags;
    216  1.1  augustss 	struct axe_cdata	axe_cdata;
    217  1.7    dyoung 	struct callout axe_stat_ch;
    218  1.1  augustss 
    219  1.1  augustss 	int			axe_refcnt;
    220  1.1  augustss 	char			axe_dying;
    221  1.1  augustss 	char			axe_attached;
    222  1.1  augustss 
    223  1.1  augustss 	struct usb_task		axe_tick_task;
    224  1.1  augustss 	struct usb_task		axe_stop_task;
    225  1.1  augustss 
    226  1.4        ad 	kmutex_t		axe_mii_lock;
    227  1.1  augustss 
    228  1.8  pgoyette 	int			axe_link;
    229  1.8  pgoyette 
    230  1.1  augustss 	unsigned char		axe_ipgs[3];
    231  1.1  augustss 	unsigned char 		axe_phyaddrs[2];
    232  1.1  augustss 	struct timeval		axe_rx_notice;
    233  1.8  pgoyette 	int			axe_bufsz;
    234  1.8  pgoyette 
    235  1.8  pgoyette #define sc_if	axe_ec.ec_if
    236  1.1  augustss };
    237  1.1  augustss 
    238  1.1  augustss #define ETHER_ALIGN		2
    239