if_mos.c revision 1.9 1 1.9 riastrad /* $NetBSD: if_mos.c,v 1.9 2022/03/03 05:50:57 riastradh Exp $ */
2 1.1 mrg /* $OpenBSD: if_mos.c,v 1.40 2019/07/07 06:40:10 kevlo Exp $ */
3 1.1 mrg
4 1.1 mrg /*
5 1.1 mrg * Copyright (c) 2008 Johann Christian Rode <jcrode (at) gmx.net>
6 1.1 mrg *
7 1.1 mrg * Permission to use, copy, modify, and distribute this software for any
8 1.1 mrg * purpose with or without fee is hereby granted, provided that the above
9 1.1 mrg * copyright notice and this permission notice appear in all copies.
10 1.1 mrg *
11 1.1 mrg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 mrg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 mrg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 mrg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 mrg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 mrg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 mrg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 mrg */
19 1.1 mrg
20 1.1 mrg /*
21 1.1 mrg * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg (at) openbsd.org>
22 1.1 mrg *
23 1.1 mrg * Permission to use, copy, modify, and distribute this software for any
24 1.1 mrg * purpose with or without fee is hereby granted, provided that the above
25 1.1 mrg * copyright notice and this permission notice appear in all copies.
26 1.1 mrg *
27 1.1 mrg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
28 1.1 mrg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
29 1.1 mrg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
30 1.1 mrg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
31 1.1 mrg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
32 1.1 mrg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
33 1.1 mrg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
34 1.1 mrg */
35 1.1 mrg
36 1.1 mrg /*
37 1.1 mrg * Copyright (c) 1997, 1998, 1999, 2000-2003
38 1.1 mrg * Bill Paul <wpaul (at) windriver.com>. All rights reserved.
39 1.1 mrg *
40 1.1 mrg * Redistribution and use in source and binary forms, with or without
41 1.1 mrg * modification, are permitted provided that the following conditions
42 1.1 mrg * are met:
43 1.1 mrg * 1. Redistributions of source code must retain the above copyright
44 1.1 mrg * notice, this list of conditions and the following disclaimer.
45 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
46 1.1 mrg * notice, this list of conditions and the following disclaimer in the
47 1.1 mrg * documentation and/or other materials provided with the distribution.
48 1.1 mrg * 3. All advertising materials mentioning features or use of this software
49 1.1 mrg * must display the following acknowledgement:
50 1.1 mrg * This product includes software developed by Bill Paul.
51 1.1 mrg * 4. Neither the name of the author nor the names of any co-contributors
52 1.1 mrg * may be used to endorse or promote products derived from this software
53 1.1 mrg * without specific prior written permission.
54 1.1 mrg *
55 1.1 mrg * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
56 1.1 mrg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
57 1.1 mrg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
58 1.1 mrg * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
59 1.1 mrg * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
60 1.1 mrg * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
61 1.1 mrg * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
62 1.1 mrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
63 1.1 mrg * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
64 1.1 mrg * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
65 1.1 mrg * THE POSSIBILITY OF SUCH DAMAGE.
66 1.1 mrg */
67 1.1 mrg
68 1.1 mrg /*
69 1.1 mrg * Moschip MCS7730/MCS7830/MCS7832 USB to Ethernet controller
70 1.1 mrg * The datasheet is available at the following URL:
71 1.1 mrg * http://www.moschip.com/data/products/MCS7830/Data%20Sheet_7830.pdf
72 1.1 mrg */
73 1.1 mrg
74 1.1 mrg #include <sys/cdefs.h>
75 1.9 riastrad __KERNEL_RCSID(0, "$NetBSD: if_mos.c,v 1.9 2022/03/03 05:50:57 riastradh Exp $");
76 1.1 mrg
77 1.1 mrg #include <sys/param.h>
78 1.1 mrg
79 1.1 mrg #include <dev/usb/usbnet.h>
80 1.1 mrg #include <dev/usb/if_mosreg.h>
81 1.1 mrg
82 1.1 mrg #define MOS_PAUSE_REWRITES 3
83 1.1 mrg
84 1.1 mrg #define MOS_TIMEOUT 1000
85 1.1 mrg
86 1.1 mrg #define MOS_RX_LIST_CNT 1
87 1.1 mrg #define MOS_TX_LIST_CNT 1
88 1.1 mrg
89 1.1 mrg /* Maximum size of a fast ethernet frame plus one byte for the status */
90 1.1 mrg #define MOS_BUFSZ (ETHER_MAX_LEN+1)
91 1.1 mrg
92 1.1 mrg /*
93 1.1 mrg * USB endpoints.
94 1.1 mrg */
95 1.1 mrg #define MOS_ENDPT_RX 0
96 1.1 mrg #define MOS_ENDPT_TX 1
97 1.1 mrg #define MOS_ENDPT_INTR 2
98 1.1 mrg #define MOS_ENDPT_MAX 3
99 1.1 mrg
100 1.1 mrg /*
101 1.1 mrg * USB vendor requests.
102 1.1 mrg */
103 1.1 mrg #define MOS_UR_READREG 0x0e
104 1.1 mrg #define MOS_UR_WRITEREG 0x0d
105 1.1 mrg
106 1.1 mrg #define MOS_CONFIG_NO 1
107 1.1 mrg #define MOS_IFACE_IDX 0
108 1.1 mrg
109 1.1 mrg struct mos_type {
110 1.1 mrg struct usb_devno mos_dev;
111 1.1 mrg u_int16_t mos_flags;
112 1.1 mrg #define MCS7730 0x0001 /* MCS7730 */
113 1.1 mrg #define MCS7830 0x0002 /* MCS7830 */
114 1.1 mrg #define MCS7832 0x0004 /* MCS7832 */
115 1.1 mrg };
116 1.1 mrg
117 1.1 mrg #define MOS_INC(x, y) (x) = (x + 1) % y
118 1.1 mrg
119 1.1 mrg #ifdef MOS_DEBUG
120 1.1 mrg #define DPRINTF(x) do { if (mosdebug) printf x; } while (0)
121 1.1 mrg #define DPRINTFN(n,x) do { if (mosdebug >= (n)) printf x; } while (0)
122 1.1 mrg int mosdebug = 0;
123 1.1 mrg #else
124 1.1 mrg #define DPRINTF(x) __nothing
125 1.1 mrg #define DPRINTFN(n,x) __nothing
126 1.1 mrg #endif
127 1.1 mrg
128 1.1 mrg /*
129 1.1 mrg * Various supported device vendors/products.
130 1.1 mrg */
131 1.3 maxv static const struct mos_type mos_devs[] = {
132 1.1 mrg { { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7730 }, MCS7730 },
133 1.1 mrg { { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7830 }, MCS7830 },
134 1.1 mrg { { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7832 }, MCS7832 },
135 1.1 mrg { { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN030 }, MCS7830 },
136 1.1 mrg };
137 1.1 mrg #define mos_lookup(v, p) ((const struct mos_type *)usb_lookup(mos_devs, v, p))
138 1.1 mrg
139 1.1 mrg static int mos_match(device_t, cfdata_t, void *);
140 1.1 mrg static void mos_attach(device_t, device_t, void *);
141 1.1 mrg
142 1.1 mrg CFATTACH_DECL_NEW(mos, sizeof(struct usbnet),
143 1.1 mrg mos_match, mos_attach, usbnet_detach, usbnet_activate);
144 1.1 mrg
145 1.5 thorpej static void mos_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t);
146 1.5 thorpej static unsigned mos_uno_tx_prepare(struct usbnet *, struct mbuf *,
147 1.5 thorpej struct usbnet_chain *);
148 1.5 thorpej static int mos_uno_ioctl(struct ifnet *, u_long, void *);
149 1.5 thorpej static int mos_uno_init(struct ifnet *);
150 1.1 mrg static void mos_chip_init(struct usbnet *);
151 1.5 thorpej static void mos_uno_stop(struct ifnet *ifp, int disable);
152 1.5 thorpej static int mos_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
153 1.5 thorpej static int mos_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
154 1.5 thorpej static void mos_uno_mii_statchg(struct ifnet *);
155 1.1 mrg static void mos_reset(struct usbnet *);
156 1.1 mrg
157 1.1 mrg static int mos_reg_read_1(struct usbnet *, int);
158 1.1 mrg static int mos_reg_read_2(struct usbnet *, int);
159 1.1 mrg static int mos_reg_write_1(struct usbnet *, int, int);
160 1.1 mrg static int mos_reg_write_2(struct usbnet *, int, int);
161 1.1 mrg static int mos_readmac(struct usbnet *);
162 1.1 mrg static int mos_writemac(struct usbnet *);
163 1.1 mrg static int mos_write_mcast(struct usbnet *, uint8_t *);
164 1.1 mrg
165 1.3 maxv static const struct usbnet_ops mos_ops = {
166 1.5 thorpej .uno_stop = mos_uno_stop,
167 1.5 thorpej .uno_ioctl = mos_uno_ioctl,
168 1.5 thorpej .uno_read_reg = mos_uno_mii_read_reg,
169 1.5 thorpej .uno_write_reg = mos_uno_mii_write_reg,
170 1.5 thorpej .uno_statchg = mos_uno_mii_statchg,
171 1.5 thorpej .uno_tx_prepare = mos_uno_tx_prepare,
172 1.5 thorpej .uno_rx_loop = mos_uno_rx_loop,
173 1.5 thorpej .uno_init = mos_uno_init,
174 1.1 mrg };
175 1.1 mrg
176 1.1 mrg static int
177 1.1 mrg mos_reg_read_1(struct usbnet *un, int reg)
178 1.1 mrg {
179 1.1 mrg usb_device_request_t req;
180 1.1 mrg usbd_status err;
181 1.1 mrg uByte val = 0;
182 1.1 mrg
183 1.1 mrg if (usbnet_isdying(un))
184 1.1 mrg return 0;
185 1.1 mrg
186 1.1 mrg req.bmRequestType = UT_READ_VENDOR_DEVICE;
187 1.1 mrg req.bRequest = MOS_UR_READREG;
188 1.1 mrg USETW(req.wValue, 0);
189 1.1 mrg USETW(req.wIndex, reg);
190 1.1 mrg USETW(req.wLength, 1);
191 1.1 mrg
192 1.1 mrg err = usbd_do_request(un->un_udev, &req, &val);
193 1.1 mrg
194 1.1 mrg if (err) {
195 1.1 mrg aprint_error_dev(un->un_dev, "read reg %x\n", reg);
196 1.1 mrg return 0;
197 1.1 mrg }
198 1.1 mrg
199 1.1 mrg return val;
200 1.1 mrg }
201 1.1 mrg
202 1.1 mrg static int
203 1.1 mrg mos_reg_read_2(struct usbnet *un, int reg)
204 1.1 mrg {
205 1.1 mrg usb_device_request_t req;
206 1.1 mrg usbd_status err;
207 1.1 mrg uWord val;
208 1.1 mrg
209 1.1 mrg if (usbnet_isdying(un))
210 1.1 mrg return 0;
211 1.1 mrg
212 1.1 mrg USETW(val,0);
213 1.1 mrg
214 1.1 mrg req.bmRequestType = UT_READ_VENDOR_DEVICE;
215 1.1 mrg req.bRequest = MOS_UR_READREG;
216 1.1 mrg USETW(req.wValue, 0);
217 1.1 mrg USETW(req.wIndex, reg);
218 1.1 mrg USETW(req.wLength, 2);
219 1.1 mrg
220 1.1 mrg err = usbd_do_request(un->un_udev, &req, &val);
221 1.1 mrg
222 1.1 mrg if (err) {
223 1.1 mrg aprint_error_dev(un->un_dev, "read reg2 %x\n", reg);
224 1.1 mrg return 0;
225 1.1 mrg }
226 1.1 mrg
227 1.1 mrg return UGETW(val);
228 1.1 mrg }
229 1.1 mrg
230 1.1 mrg static int
231 1.1 mrg mos_reg_write_1(struct usbnet *un, int reg, int aval)
232 1.1 mrg {
233 1.1 mrg usb_device_request_t req;
234 1.1 mrg usbd_status err;
235 1.1 mrg uByte val;
236 1.1 mrg
237 1.1 mrg if (usbnet_isdying(un))
238 1.1 mrg return 0;
239 1.1 mrg
240 1.1 mrg val = aval;
241 1.1 mrg
242 1.1 mrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
243 1.1 mrg req.bRequest = MOS_UR_WRITEREG;
244 1.1 mrg USETW(req.wValue, 0);
245 1.1 mrg USETW(req.wIndex, reg);
246 1.1 mrg USETW(req.wLength, 1);
247 1.1 mrg
248 1.1 mrg err = usbd_do_request(un->un_udev, &req, &val);
249 1.1 mrg
250 1.1 mrg if (err)
251 1.1 mrg aprint_error_dev(un->un_dev, "write reg %x <- %x\n",
252 1.1 mrg reg, aval);
253 1.1 mrg
254 1.1 mrg return 0;
255 1.1 mrg }
256 1.1 mrg
257 1.1 mrg static int
258 1.1 mrg mos_reg_write_2(struct usbnet *un, int reg, int aval)
259 1.1 mrg {
260 1.1 mrg usb_device_request_t req;
261 1.1 mrg usbd_status err;
262 1.1 mrg uWord val;
263 1.1 mrg
264 1.1 mrg USETW(val, aval);
265 1.1 mrg
266 1.1 mrg if (usbnet_isdying(un))
267 1.1 mrg return EIO;
268 1.1 mrg
269 1.1 mrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
270 1.1 mrg req.bRequest = MOS_UR_WRITEREG;
271 1.1 mrg USETW(req.wValue, 0);
272 1.1 mrg USETW(req.wIndex, reg);
273 1.1 mrg USETW(req.wLength, 2);
274 1.1 mrg
275 1.1 mrg err = usbd_do_request(un->un_udev, &req, &val);
276 1.1 mrg
277 1.1 mrg if (err)
278 1.1 mrg aprint_error_dev(un->un_dev, "write reg2 %x <- %x\n",
279 1.1 mrg reg, aval);
280 1.1 mrg
281 1.1 mrg return 0;
282 1.1 mrg }
283 1.1 mrg
284 1.1 mrg static int
285 1.1 mrg mos_readmac(struct usbnet *un)
286 1.1 mrg {
287 1.1 mrg usb_device_request_t req;
288 1.1 mrg usbd_status err;
289 1.1 mrg
290 1.1 mrg if (usbnet_isdying(un))
291 1.1 mrg return 0;
292 1.1 mrg
293 1.1 mrg req.bmRequestType = UT_READ_VENDOR_DEVICE;
294 1.1 mrg req.bRequest = MOS_UR_READREG;
295 1.1 mrg USETW(req.wValue, 0);
296 1.1 mrg USETW(req.wIndex, MOS_MAC);
297 1.1 mrg USETW(req.wLength, ETHER_ADDR_LEN);
298 1.1 mrg
299 1.1 mrg err = usbd_do_request(un->un_udev, &req, un->un_eaddr);
300 1.1 mrg
301 1.1 mrg if (err)
302 1.1 mrg aprint_error_dev(un->un_dev, "%s: failed", __func__);
303 1.1 mrg
304 1.1 mrg return err;
305 1.1 mrg }
306 1.1 mrg
307 1.1 mrg static int
308 1.1 mrg mos_writemac(struct usbnet *un)
309 1.1 mrg {
310 1.1 mrg usb_device_request_t req;
311 1.1 mrg usbd_status err;
312 1.1 mrg
313 1.1 mrg if (usbnet_isdying(un))
314 1.1 mrg return 0;
315 1.1 mrg
316 1.1 mrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
317 1.1 mrg req.bRequest = MOS_UR_WRITEREG;
318 1.1 mrg USETW(req.wValue, 0);
319 1.1 mrg USETW(req.wIndex, MOS_MAC);
320 1.1 mrg USETW(req.wLength, ETHER_ADDR_LEN);
321 1.1 mrg
322 1.1 mrg err = usbd_do_request(un->un_udev, &req, un->un_eaddr);
323 1.1 mrg
324 1.1 mrg if (err)
325 1.1 mrg aprint_error_dev(un->un_dev, "%s: failed", __func__);
326 1.1 mrg
327 1.1 mrg return 0;
328 1.1 mrg }
329 1.1 mrg
330 1.1 mrg static int
331 1.1 mrg mos_write_mcast(struct usbnet *un, uint8_t *hashtbl)
332 1.1 mrg {
333 1.1 mrg usb_device_request_t req;
334 1.1 mrg usbd_status err;
335 1.1 mrg
336 1.1 mrg if (usbnet_isdying(un))
337 1.1 mrg return EIO;
338 1.1 mrg
339 1.1 mrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
340 1.1 mrg req.bRequest = MOS_UR_WRITEREG;
341 1.1 mrg USETW(req.wValue, 0);
342 1.1 mrg USETW(req.wIndex, MOS_MCAST_TABLE);
343 1.1 mrg USETW(req.wLength, 8);
344 1.1 mrg
345 1.1 mrg err = usbd_do_request(un->un_udev, &req, hashtbl);
346 1.1 mrg
347 1.1 mrg if (err) {
348 1.1 mrg aprint_error_dev(un->un_dev, "%s: failed", __func__);
349 1.1 mrg return(-1);
350 1.1 mrg }
351 1.1 mrg
352 1.1 mrg return 0;
353 1.1 mrg }
354 1.1 mrg
355 1.1 mrg static int
356 1.5 thorpej mos_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
357 1.1 mrg {
358 1.1 mrg int i, res;
359 1.1 mrg
360 1.1 mrg mos_reg_write_2(un, MOS_PHY_DATA, 0);
361 1.1 mrg mos_reg_write_1(un, MOS_PHY_CTL, (phy & MOS_PHYCTL_PHYADDR) |
362 1.1 mrg MOS_PHYCTL_READ);
363 1.1 mrg mos_reg_write_1(un, MOS_PHY_STS, (reg & MOS_PHYSTS_PHYREG) |
364 1.1 mrg MOS_PHYSTS_PENDING);
365 1.1 mrg
366 1.1 mrg for (i = 0; i < MOS_TIMEOUT; i++) {
367 1.9 riastrad if (usbnet_isdying(un))
368 1.9 riastrad return ENXIO;
369 1.1 mrg if (mos_reg_read_1(un, MOS_PHY_STS) & MOS_PHYSTS_READY)
370 1.1 mrg break;
371 1.1 mrg }
372 1.1 mrg if (i == MOS_TIMEOUT) {
373 1.1 mrg aprint_error_dev(un->un_dev, "read PHY failed\n");
374 1.1 mrg return EIO;
375 1.1 mrg }
376 1.1 mrg
377 1.1 mrg res = mos_reg_read_2(un, MOS_PHY_DATA);
378 1.1 mrg *val = res;
379 1.1 mrg
380 1.1 mrg DPRINTFN(10,("%s: %s: phy %d reg %d val %u\n",
381 1.1 mrg device_xname(un->un_dev), __func__, phy, reg, res));
382 1.1 mrg
383 1.1 mrg return 0;
384 1.1 mrg }
385 1.1 mrg
386 1.1 mrg static int
387 1.5 thorpej mos_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
388 1.1 mrg {
389 1.1 mrg int i;
390 1.1 mrg
391 1.1 mrg DPRINTFN(10,("%s: %s: phy %d reg %d val %u\n",
392 1.1 mrg device_xname(un->un_dev), __func__, phy, reg, val));
393 1.1 mrg
394 1.1 mrg mos_reg_write_2(un, MOS_PHY_DATA, val);
395 1.1 mrg mos_reg_write_1(un, MOS_PHY_CTL, (phy & MOS_PHYCTL_PHYADDR) |
396 1.1 mrg MOS_PHYCTL_WRITE);
397 1.1 mrg mos_reg_write_1(un, MOS_PHY_STS, (reg & MOS_PHYSTS_PHYREG) |
398 1.1 mrg MOS_PHYSTS_PENDING);
399 1.1 mrg
400 1.1 mrg for (i = 0; i < MOS_TIMEOUT; i++) {
401 1.9 riastrad if (usbnet_isdying(un))
402 1.9 riastrad return ENXIO;
403 1.1 mrg if (mos_reg_read_1(un, MOS_PHY_STS) & MOS_PHYSTS_READY)
404 1.1 mrg break;
405 1.1 mrg }
406 1.1 mrg if (i == MOS_TIMEOUT) {
407 1.1 mrg aprint_error_dev(un->un_dev, "write PHY failed\n");
408 1.1 mrg return EIO;
409 1.1 mrg }
410 1.1 mrg
411 1.1 mrg return 0;
412 1.1 mrg }
413 1.1 mrg
414 1.1 mrg void
415 1.5 thorpej mos_uno_mii_statchg(struct ifnet *ifp)
416 1.1 mrg {
417 1.1 mrg struct usbnet * const un = ifp->if_softc;
418 1.1 mrg struct mii_data * const mii = usbnet_mii(un);
419 1.1 mrg int val, err;
420 1.1 mrg
421 1.1 mrg if (usbnet_isdying(un))
422 1.1 mrg return;
423 1.1 mrg
424 1.1 mrg DPRINTFN(10,("%s: %s: enter\n", device_xname(un->un_dev), __func__));
425 1.1 mrg
426 1.1 mrg /* disable RX, TX prior to changing FDX, SPEEDSEL */
427 1.1 mrg val = mos_reg_read_1(un, MOS_CTL);
428 1.1 mrg val &= ~(MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);
429 1.1 mrg mos_reg_write_1(un, MOS_CTL, val);
430 1.1 mrg
431 1.1 mrg /* reset register which counts dropped frames */
432 1.1 mrg mos_reg_write_1(un, MOS_FRAME_DROP_CNT, 0);
433 1.1 mrg
434 1.1 mrg if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
435 1.1 mrg val |= MOS_CTL_FDX_ENB;
436 1.1 mrg else
437 1.1 mrg val &= ~(MOS_CTL_FDX_ENB);
438 1.1 mrg
439 1.1 mrg if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
440 1.1 mrg (IFM_ACTIVE | IFM_AVALID)) {
441 1.1 mrg switch (IFM_SUBTYPE(mii->mii_media_active)) {
442 1.1 mrg case IFM_100_TX:
443 1.1 mrg val |= MOS_CTL_SPEEDSEL;
444 1.1 mrg break;
445 1.1 mrg case IFM_10_T:
446 1.1 mrg val &= ~(MOS_CTL_SPEEDSEL);
447 1.1 mrg break;
448 1.1 mrg }
449 1.1 mrg usbnet_set_link(un, true);
450 1.1 mrg }
451 1.1 mrg
452 1.1 mrg /* re-enable TX, RX */
453 1.1 mrg val |= (MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);
454 1.1 mrg err = mos_reg_write_1(un, MOS_CTL, val);
455 1.1 mrg
456 1.1 mrg if (err)
457 1.1 mrg aprint_error_dev(un->un_dev, "media change failed\n");
458 1.1 mrg }
459 1.1 mrg
460 1.1 mrg static void
461 1.6 nisimura mos_rcvfilt_locked(struct usbnet *un)
462 1.1 mrg {
463 1.1 mrg struct ifnet *ifp = usbnet_ifp(un);
464 1.1 mrg struct ethercom *ec = usbnet_ec(un);
465 1.1 mrg struct ether_multi *enm;
466 1.1 mrg struct ether_multistep step;
467 1.6 nisimura u_int32_t h = 0;
468 1.6 nisimura u_int8_t rxmode, mchash[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
469 1.1 mrg
470 1.1 mrg if (usbnet_isdying(un))
471 1.1 mrg return;
472 1.1 mrg
473 1.1 mrg rxmode = mos_reg_read_1(un, MOS_CTL);
474 1.1 mrg rxmode &= ~(MOS_CTL_ALLMULTI | MOS_CTL_RX_PROMISC);
475 1.1 mrg
476 1.2 msaitoh ETHER_LOCK(ec);
477 1.2 msaitoh if (ifp->if_flags & IFF_PROMISC) {
478 1.1 mrg ec->ec_flags |= ETHER_F_ALLMULTI;
479 1.6 nisimura ETHER_UNLOCK(ec);
480 1.6 nisimura /* run promisc. mode */
481 1.6 nisimura rxmode |= MOS_CTL_ALLMULTI; /* ??? */
482 1.6 nisimura rxmode |= MOS_CTL_RX_PROMISC;
483 1.6 nisimura goto update;
484 1.6 nisimura }
485 1.6 nisimura ec->ec_flags &= ~ETHER_F_ALLMULTI;
486 1.6 nisimura ETHER_FIRST_MULTI(step, ec, enm);
487 1.6 nisimura while (enm != NULL) {
488 1.6 nisimura if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
489 1.6 nisimura ec->ec_flags |= ETHER_F_ALLMULTI;
490 1.6 nisimura ETHER_UNLOCK(ec);
491 1.6 nisimura memset(mchash, 0, sizeof(mchash)); /* correct ??? */
492 1.7 nisimura /* accept all multicast frame */
493 1.6 nisimura rxmode |= MOS_CTL_ALLMULTI;
494 1.6 nisimura goto update;
495 1.1 mrg }
496 1.6 nisimura h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN);
497 1.6 nisimura /* 3(31:29) and 3(28:26) sampling to have uint8_t[8] */
498 1.6 nisimura mchash[h >> 29] |= 1 << ((h >> 26) % 8);
499 1.6 nisimura ETHER_NEXT_MULTI(step, enm);
500 1.1 mrg }
501 1.2 msaitoh ETHER_UNLOCK(ec);
502 1.6 nisimura /* MOS receive filter is always on */
503 1.6 nisimura update:
504 1.1 mrg /*
505 1.1 mrg * The datasheet claims broadcast frames were always accepted
506 1.1 mrg * regardless of filter settings. But the hardware seems to
507 1.1 mrg * filter broadcast frames, so pass them explicitly.
508 1.1 mrg */
509 1.6 nisimura mchash[7] |= 0x80;
510 1.6 nisimura mos_write_mcast(un, mchash);
511 1.1 mrg mos_reg_write_1(un, MOS_CTL, rxmode);
512 1.1 mrg }
513 1.1 mrg
514 1.1 mrg static void
515 1.1 mrg mos_reset(struct usbnet *un)
516 1.1 mrg {
517 1.1 mrg u_int8_t ctl;
518 1.1 mrg
519 1.1 mrg if (usbnet_isdying(un))
520 1.1 mrg return;
521 1.1 mrg
522 1.1 mrg ctl = mos_reg_read_1(un, MOS_CTL);
523 1.1 mrg ctl &= ~(MOS_CTL_RX_PROMISC | MOS_CTL_ALLMULTI | MOS_CTL_TX_ENB |
524 1.1 mrg MOS_CTL_RX_ENB);
525 1.1 mrg /* Disable RX, TX, promiscuous and allmulticast mode */
526 1.1 mrg mos_reg_write_1(un, MOS_CTL, ctl);
527 1.1 mrg
528 1.1 mrg /* Reset frame drop counter register to zero */
529 1.1 mrg mos_reg_write_1(un, MOS_FRAME_DROP_CNT, 0);
530 1.1 mrg
531 1.1 mrg /* Wait a little while for the chip to get its brains in order. */
532 1.1 mrg DELAY(1000);
533 1.1 mrg }
534 1.1 mrg
535 1.1 mrg void
536 1.1 mrg mos_chip_init(struct usbnet *un)
537 1.1 mrg {
538 1.1 mrg int i;
539 1.1 mrg
540 1.1 mrg /*
541 1.1 mrg * Rev.C devices have a pause threshold register which needs to be set
542 1.1 mrg * at startup.
543 1.1 mrg */
544 1.1 mrg if (mos_reg_read_1(un, MOS_PAUSE_TRHD) != -1) {
545 1.1 mrg for (i = 0; i < MOS_PAUSE_REWRITES; i++)
546 1.1 mrg mos_reg_write_1(un, MOS_PAUSE_TRHD, 0);
547 1.1 mrg }
548 1.1 mrg }
549 1.1 mrg
550 1.1 mrg /*
551 1.1 mrg * Probe for a MCS7x30 chip.
552 1.1 mrg */
553 1.1 mrg static int
554 1.1 mrg mos_match(device_t parent, cfdata_t match, void *aux)
555 1.1 mrg {
556 1.1 mrg struct usb_attach_arg *uaa = aux;
557 1.1 mrg
558 1.1 mrg return (mos_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
559 1.1 mrg UMATCH_VENDOR_PRODUCT : UMATCH_NONE);
560 1.1 mrg }
561 1.1 mrg
562 1.1 mrg /*
563 1.1 mrg * Attach the interface.
564 1.1 mrg */
565 1.1 mrg static void
566 1.1 mrg mos_attach(device_t parent, device_t self, void *aux)
567 1.1 mrg {
568 1.1 mrg USBNET_MII_DECL_DEFAULT(unm);
569 1.1 mrg struct usbnet * un = device_private(self);
570 1.1 mrg struct usb_attach_arg *uaa = aux;
571 1.1 mrg struct usbd_device *dev = uaa->uaa_device;
572 1.1 mrg usbd_status err;
573 1.1 mrg usb_interface_descriptor_t *id;
574 1.1 mrg usb_endpoint_descriptor_t *ed;
575 1.1 mrg char *devinfop;
576 1.1 mrg int i;
577 1.1 mrg
578 1.1 mrg aprint_naive("\n");
579 1.1 mrg aprint_normal("\n");
580 1.1 mrg devinfop = usbd_devinfo_alloc(dev, 0);
581 1.1 mrg aprint_normal_dev(self, "%s\n", devinfop);
582 1.1 mrg usbd_devinfo_free(devinfop);
583 1.1 mrg
584 1.1 mrg un->un_dev = self;
585 1.1 mrg un->un_udev = dev;
586 1.1 mrg un->un_sc = un;
587 1.1 mrg un->un_ops = &mos_ops;
588 1.1 mrg un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
589 1.1 mrg un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
590 1.1 mrg un->un_rx_list_cnt = MOS_RX_LIST_CNT;
591 1.1 mrg un->un_tx_list_cnt = MOS_TX_LIST_CNT;
592 1.1 mrg un->un_rx_bufsz = un->un_tx_bufsz = MOS_BUFSZ;
593 1.1 mrg
594 1.1 mrg err = usbd_set_config_no(dev, MOS_CONFIG_NO, 1);
595 1.1 mrg if (err) {
596 1.1 mrg aprint_error_dev(self, "failed to set configuration"
597 1.1 mrg ", err=%s\n", usbd_errstr(err));
598 1.1 mrg return;
599 1.1 mrg }
600 1.1 mrg
601 1.1 mrg err = usbd_device2interface_handle(dev, MOS_IFACE_IDX, &un->un_iface);
602 1.1 mrg if (err) {
603 1.1 mrg aprint_error_dev(self, "failed getting interface handle"
604 1.1 mrg ", err=%s\n", usbd_errstr(err));
605 1.1 mrg return;
606 1.1 mrg }
607 1.1 mrg
608 1.1 mrg un->un_flags = mos_lookup(uaa->uaa_vendor, uaa->uaa_product)->mos_flags;
609 1.1 mrg
610 1.1 mrg id = usbd_get_interface_descriptor(un->un_iface);
611 1.1 mrg
612 1.1 mrg /* Find endpoints. */
613 1.1 mrg for (i = 0; i < id->bNumEndpoints; i++) {
614 1.1 mrg ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
615 1.1 mrg if (!ed) {
616 1.1 mrg aprint_error_dev(self, "couldn't get ep %d\n", i);
617 1.1 mrg return;
618 1.1 mrg }
619 1.1 mrg if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
620 1.1 mrg UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
621 1.1 mrg un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
622 1.1 mrg } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
623 1.1 mrg UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
624 1.1 mrg un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
625 1.1 mrg } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
626 1.1 mrg UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
627 1.1 mrg un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
628 1.1 mrg }
629 1.1 mrg }
630 1.1 mrg
631 1.1 mrg if (un->un_flags & MCS7730)
632 1.1 mrg aprint_normal_dev(self, "MCS7730\n");
633 1.1 mrg else if (un->un_flags & MCS7830)
634 1.1 mrg aprint_normal_dev(self, "MCS7830\n");
635 1.1 mrg else if (un->un_flags & MCS7832)
636 1.1 mrg aprint_normal_dev(self, "MCS7832\n");
637 1.1 mrg
638 1.1 mrg /* Set these up now for register access. */
639 1.1 mrg usbnet_attach(un, "mosdet");
640 1.1 mrg
641 1.1 mrg mos_chip_init(un);
642 1.1 mrg
643 1.1 mrg /*
644 1.1 mrg * Read MAC address, inform the world.
645 1.1 mrg */
646 1.1 mrg err = mos_readmac(un);
647 1.1 mrg if (err) {
648 1.1 mrg aprint_error_dev(self, "couldn't read MAC address\n");
649 1.1 mrg return;
650 1.1 mrg }
651 1.1 mrg
652 1.1 mrg struct ifnet *ifp = usbnet_ifp(un);
653 1.1 mrg ifp->if_capabilities = ETHERCAP_VLAN_MTU;
654 1.1 mrg
655 1.1 mrg usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
656 1.1 mrg 0, &unm);
657 1.1 mrg }
658 1.1 mrg
659 1.1 mrg /*
660 1.1 mrg * A frame has been uploaded: pass the resulting mbuf chain up to
661 1.1 mrg * the higher level protocols.
662 1.1 mrg */
663 1.1 mrg void
664 1.5 thorpej mos_uno_rx_loop(struct usbnet * un, struct usbnet_chain *c, uint32_t total_len)
665 1.1 mrg {
666 1.1 mrg struct ifnet *ifp = usbnet_ifp(un);
667 1.1 mrg uint8_t *buf = c->unc_buf;
668 1.1 mrg u_int8_t rxstat;
669 1.1 mrg u_int16_t pktlen = 0;
670 1.1 mrg
671 1.1 mrg DPRINTFN(5,("%s: %s: enter len %u\n",
672 1.1 mrg device_xname(un->un_dev), __func__, total_len));
673 1.1 mrg
674 1.1 mrg if (total_len <= 1)
675 1.1 mrg return;
676 1.1 mrg
677 1.1 mrg /* evaluate status byte at the end */
678 1.1 mrg pktlen = total_len - 1;
679 1.1 mrg if (pktlen > un->un_rx_bufsz) {
680 1.4 thorpej if_statinc(ifp, if_ierrors);
681 1.1 mrg return;
682 1.1 mrg }
683 1.1 mrg rxstat = buf[pktlen] & MOS_RXSTS_MASK;
684 1.1 mrg
685 1.1 mrg if (rxstat != MOS_RXSTS_VALID) {
686 1.1 mrg DPRINTF(("%s: erroneous frame received: ",
687 1.1 mrg device_xname(un->un_dev)));
688 1.1 mrg if (rxstat & MOS_RXSTS_SHORT_FRAME)
689 1.1 mrg DPRINTF(("frame size less than 64 bytes\n"));
690 1.1 mrg if (rxstat & MOS_RXSTS_LARGE_FRAME)
691 1.1 mrg DPRINTF(("frame size larger than 1532 bytes\n"));
692 1.1 mrg if (rxstat & MOS_RXSTS_CRC_ERROR)
693 1.1 mrg DPRINTF(("CRC error\n"));
694 1.1 mrg if (rxstat & MOS_RXSTS_ALIGN_ERROR)
695 1.1 mrg DPRINTF(("alignment error\n"));
696 1.4 thorpej if_statinc(ifp, if_ierrors);
697 1.1 mrg return;
698 1.1 mrg }
699 1.1 mrg
700 1.1 mrg if (pktlen < sizeof(struct ether_header) ) {
701 1.4 thorpej if_statinc(ifp, if_ierrors);
702 1.1 mrg return;
703 1.1 mrg }
704 1.1 mrg
705 1.1 mrg usbnet_enqueue(un, c->unc_buf, pktlen, 0, 0, 0);
706 1.1 mrg }
707 1.1 mrg
708 1.1 mrg static unsigned
709 1.5 thorpej mos_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
710 1.1 mrg {
711 1.1 mrg int length;
712 1.1 mrg
713 1.1 mrg if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz)
714 1.1 mrg return 0;
715 1.1 mrg
716 1.1 mrg m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf);
717 1.1 mrg length = m->m_pkthdr.len;
718 1.1 mrg
719 1.1 mrg DPRINTFN(5,("%s: %s: len %u\n",
720 1.1 mrg device_xname(un->un_dev), __func__, length));
721 1.1 mrg
722 1.1 mrg return length;
723 1.1 mrg }
724 1.1 mrg
725 1.1 mrg static int
726 1.1 mrg mos_init_locked(struct ifnet *ifp)
727 1.1 mrg {
728 1.1 mrg struct usbnet * const un = ifp->if_softc;
729 1.1 mrg u_int8_t rxmode;
730 1.1 mrg unsigned char ipgs[2];
731 1.1 mrg
732 1.1 mrg if (usbnet_isdying(un))
733 1.1 mrg return EIO;
734 1.1 mrg
735 1.1 mrg /* Cancel pending I/O */
736 1.1 mrg usbnet_stop(un, ifp, 1);
737 1.1 mrg
738 1.1 mrg /* Reset the ethernet interface. */
739 1.1 mrg mos_reset(un);
740 1.1 mrg
741 1.1 mrg /* Write MAC address. */
742 1.1 mrg mos_writemac(un);
743 1.1 mrg
744 1.1 mrg /* Read and set transmitter IPG values */
745 1.1 mrg ipgs[0] = mos_reg_read_1(un, MOS_IPG0);
746 1.1 mrg ipgs[1] = mos_reg_read_1(un, MOS_IPG1);
747 1.1 mrg mos_reg_write_1(un, MOS_IPG0, ipgs[0]);
748 1.1 mrg mos_reg_write_1(un, MOS_IPG1, ipgs[1]);
749 1.1 mrg
750 1.7 nisimura /* Accept multicast frame or run promisc. mode */
751 1.6 nisimura mos_rcvfilt_locked(un);
752 1.1 mrg
753 1.1 mrg /* Enable receiver and transmitter, bridge controls speed/duplex mode */
754 1.1 mrg rxmode = mos_reg_read_1(un, MOS_CTL);
755 1.1 mrg rxmode |= MOS_CTL_RX_ENB | MOS_CTL_TX_ENB | MOS_CTL_BS_ENB;
756 1.1 mrg rxmode &= ~(MOS_CTL_SLEEP);
757 1.1 mrg mos_reg_write_1(un, MOS_CTL, rxmode);
758 1.1 mrg
759 1.1 mrg return usbnet_init_rx_tx(un);
760 1.1 mrg }
761 1.1 mrg
762 1.1 mrg static int
763 1.5 thorpej mos_uno_init(struct ifnet *ifp)
764 1.1 mrg {
765 1.1 mrg struct usbnet * const un = ifp->if_softc;
766 1.1 mrg
767 1.5 thorpej usbnet_busy(un);
768 1.1 mrg int ret = mos_init_locked(ifp);
769 1.5 thorpej usbnet_unbusy(un);
770 1.1 mrg
771 1.1 mrg return ret;
772 1.1 mrg }
773 1.1 mrg
774 1.1 mrg static int
775 1.5 thorpej mos_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data)
776 1.1 mrg {
777 1.1 mrg struct usbnet * const un = ifp->if_softc;
778 1.1 mrg
779 1.5 thorpej usbnet_lock_core(un);
780 1.5 thorpej usbnet_busy(un);
781 1.5 thorpej
782 1.1 mrg switch (cmd) {
783 1.1 mrg case SIOCADDMULTI:
784 1.1 mrg case SIOCDELMULTI:
785 1.6 nisimura mos_rcvfilt_locked(un);
786 1.1 mrg break;
787 1.1 mrg default:
788 1.1 mrg break;
789 1.1 mrg }
790 1.1 mrg
791 1.5 thorpej usbnet_unbusy(un);
792 1.5 thorpej usbnet_unlock_core(un);
793 1.5 thorpej
794 1.1 mrg return 0;
795 1.1 mrg }
796 1.1 mrg
797 1.1 mrg void
798 1.5 thorpej mos_uno_stop(struct ifnet *ifp, int disable)
799 1.1 mrg {
800 1.1 mrg struct usbnet * const un = ifp->if_softc;
801 1.1 mrg
802 1.1 mrg mos_reset(un);
803 1.1 mrg }
804