1 1.1 mrg /* $NetBSD: if_mosreg.h,v 1.1 2019/09/20 10:34:54 mrg Exp $ */ 2 1.1 mrg /* $OpenBSD: if_mosreg.h,v 1.7 2013/04/15 09:23:01 mglocker Exp $ */ 3 1.1 mrg 4 1.1 mrg /* 5 1.1 mrg * Copyright (c) 2008 Johann Christian Rode <jcrode (at) gmx.net> 6 1.1 mrg * 7 1.1 mrg * Permission to use, copy, modify, and distribute this software for any 8 1.1 mrg * purpose with or without fee is hereby granted, provided that the above 9 1.1 mrg * copyright notice and this permission notice appear in all copies. 10 1.1 mrg * 11 1.1 mrg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 1.1 mrg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 1.1 mrg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 1.1 mrg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 1.1 mrg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 1.1 mrg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 1.1 mrg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 1.1 mrg */ 19 1.1 mrg 20 1.1 mrg /* 21 1.1 mrg * Copyright (c) 1997, 1998, 1999, 2000-2003 22 1.1 mrg * Bill Paul <wpaul (at) windriver.com>. All rights reserved. 23 1.1 mrg * 24 1.1 mrg * Redistribution and use in source and binary forms, with or without 25 1.1 mrg * modification, are permitted provided that the following conditions 26 1.1 mrg * are met: 27 1.1 mrg * 1. Redistributions of source code must retain the above copyright 28 1.1 mrg * notice, this list of conditions and the following disclaimer. 29 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright 30 1.1 mrg * notice, this list of conditions and the following disclaimer in the 31 1.1 mrg * documentation and/or other materials provided with the distribution. 32 1.1 mrg * 3. All advertising materials mentioning features or use of this software 33 1.1 mrg * must display the following acknowledgement: 34 1.1 mrg * This product includes software developed by Ravikanth. 35 1.1 mrg * 4. Neither the name of the author nor the names of any co-contributors 36 1.1 mrg * may be used to endorse or promote products derived from this software 37 1.1 mrg * without specific prior written permission. 38 1.1 mrg * 39 1.1 mrg * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 40 1.1 mrg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 41 1.1 mrg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 42 1.1 mrg * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul, THE VOICES IN HIS HEAD OR 43 1.1 mrg * THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 44 1.1 mrg * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 45 1.1 mrg * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 46 1.1 mrg * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 47 1.1 mrg * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 48 1.1 mrg * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 49 1.1 mrg * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 50 1.1 mrg * 51 1.1 mrg */ 52 1.1 mrg 53 1.1 mrg /* 54 1.1 mrg * Register definitions for the Moschip MCS7x30 ethernet controller. 55 1.1 mrg */ 56 1.1 mrg #define MOS_MCAST_TABLE 0x00 57 1.1 mrg #define MOS_IPG0 0x08 58 1.1 mrg #define MOS_IPG1 0x09 59 1.1 mrg #define MOS_PHY_DATA0 0x0a 60 1.1 mrg #define MOS_PHY_DATA1 0x0b 61 1.1 mrg #define MOS_PHY_CTL 0x0c 62 1.1 mrg #define MOS_PHY_STS 0x0d 63 1.1 mrg #define MOS_PHY_DATA MOS_PHY_DATA0 64 1.1 mrg #define MOS_CTL 0x0e 65 1.1 mrg #define MOS_MAC0 0x0f 66 1.1 mrg #define MOS_MAC1 0x10 67 1.1 mrg #define MOS_MAC2 0x11 68 1.1 mrg #define MOS_MAC3 0x12 69 1.1 mrg #define MOS_MAC4 0x13 70 1.1 mrg #define MOS_MAC5 0x14 71 1.1 mrg #define MOS_MAC MOS_MAC0 72 1.1 mrg /* apparently only available on hardware rev. C */ 73 1.1 mrg #define MOS_FRAME_DROP_CNT 0x15 74 1.1 mrg #define MOS_PAUSE_TRHD 0x16 75 1.1 mrg 76 1.1 mrg #define MOS_PHYCTL_PHYADDR 0x1f 77 1.1 mrg #define MOS_PHYCTL_WRITE 0x20 78 1.1 mrg #define MOS_PHYCTL_READ 0x40 79 1.1 mrg 80 1.1 mrg #define MOS_PHYSTS_PHYREG 0x1f 81 1.1 mrg #define MOS_PHYSTS_READY 0x40 82 1.1 mrg #define MOS_PHYSTS_PENDING 0x80 83 1.1 mrg 84 1.1 mrg #define MOS_CTL_RX_PROMISC 0x01 85 1.1 mrg #define MOS_CTL_ALLMULTI 0x02 86 1.1 mrg #define MOS_CTL_SLEEP 0x04 87 1.1 mrg #define MOS_CTL_TX_ENB 0x08 88 1.1 mrg /* 89 1.1 mrg * The documentation calls this bit 'reserved', but in the FreeBSD driver 90 1.1 mrg * provided by the vendor, this enables the receiver. 91 1.1 mrg */ 92 1.1 mrg #define MOS_CTL_RX_ENB 0x10 93 1.1 mrg #define MOS_CTL_FDX_ENB 0x20 94 1.1 mrg /* 0 = 10 Mbps, 1 = 100 Mbps */ 95 1.1 mrg #define MOS_CTL_SPEEDSEL 0x40 96 1.1 mrg /* 0 = PHY controls speed/duplex mode, 1 = bridge controls speed/duplex mode */ 97 1.1 mrg #define MOS_CTL_BS_ENB 0x80 98 1.1 mrg 99 1.1 mrg #define MOS_RXSTS_SHORT_FRAME 0x01 100 1.1 mrg #define MOS_RXSTS_LENGTH_ERROR 0x02 101 1.1 mrg #define MOS_RXSTS_ALIGN_ERROR 0x04 102 1.1 mrg #define MOS_RXSTS_CRC_ERROR 0x08 103 1.1 mrg #define MOS_RXSTS_LARGE_FRAME 0x10 104 1.1 mrg #define MOS_RXSTS_VALID 0x20 105 1.1 mrg /* 106 1.1 mrg * The EtherType field of an Ethernet frame can contain values other than 107 1.1 mrg * the frame length, hence length errors are ignored. 108 1.1 mrg */ 109 1.1 mrg #define MOS_RXSTS_MASK 0x3d 110
Indexes created Tue Sep 30 20:09:53 GMT 2025