if_mue.c revision 1.2 1 1.2 rin /* $NetBSD: if_mue.c,v 1.2 2018/08/27 14:59:04 rin Exp $ */
2 1.1 rin /* $OpenBSD: if_mue.c,v 1.3 2018/08/04 16:42:46 jsg Exp $ */
3 1.1 rin
4 1.1 rin /*
5 1.1 rin * Copyright (c) 2018 Kevin Lo <kevlo (at) openbsd.org>
6 1.1 rin *
7 1.1 rin * Permission to use, copy, modify, and distribute this software for any
8 1.1 rin * purpose with or without fee is hereby granted, provided that the above
9 1.1 rin * copyright notice and this permission notice appear in all copies.
10 1.1 rin *
11 1.1 rin * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 rin * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 rin * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 rin * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 rin * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 rin * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 rin * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 rin */
19 1.1 rin
20 1.1 rin /* Driver for Microchip LAN7500/LAN7800 chipsets. */
21 1.1 rin
22 1.1 rin #include <sys/cdefs.h>
23 1.2 rin __KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.2 2018/08/27 14:59:04 rin Exp $");
24 1.1 rin
25 1.1 rin #ifdef _KERNEL_OPT
26 1.1 rin #include "opt_usb.h"
27 1.1 rin #include "opt_inet.h"
28 1.1 rin #endif
29 1.1 rin
30 1.1 rin #include <sys/param.h>
31 1.1 rin #include <sys/cprng.h>
32 1.1 rin #include <sys/bus.h>
33 1.1 rin #include <sys/systm.h>
34 1.1 rin #include <sys/sockio.h>
35 1.1 rin #include <sys/mbuf.h>
36 1.1 rin #include <sys/mutex.h>
37 1.1 rin #include <sys/kernel.h>
38 1.1 rin #include <sys/proc.h>
39 1.1 rin #include <sys/socket.h>
40 1.1 rin
41 1.1 rin #include <sys/device.h>
42 1.1 rin
43 1.1 rin #include <sys/rndsource.h>
44 1.1 rin
45 1.1 rin #include <net/if.h>
46 1.1 rin #include <net/if_dl.h>
47 1.1 rin #include <net/if_media.h>
48 1.1 rin #include <net/if_ether.h>
49 1.1 rin
50 1.1 rin #include <net/bpf.h>
51 1.1 rin
52 1.1 rin #include <netinet/in.h>
53 1.1 rin #include <netinet/if_inarp.h>
54 1.1 rin
55 1.1 rin #include <dev/mii/mii.h>
56 1.1 rin #include <dev/mii/miivar.h>
57 1.1 rin
58 1.1 rin #include <dev/usb/usb.h>
59 1.1 rin #include <dev/usb/usbdi.h>
60 1.1 rin #include <dev/usb/usbdi_util.h>
61 1.1 rin #include <dev/usb/usbdivar.h>
62 1.1 rin #include <dev/usb/usbdevs.h>
63 1.1 rin
64 1.1 rin #include <dev/usb/if_muereg.h>
65 1.1 rin #include <dev/usb/if_muevar.h>
66 1.1 rin
67 1.1 rin #define MUE_PRINTF(sc, fmt, args...) \
68 1.1 rin device_printf((sc)->mue_dev, "%s: " fmt, __func__, ##args);
69 1.1 rin
70 1.1 rin #ifdef USB_DEBUG
71 1.1 rin int muedebug = 0;
72 1.1 rin #define DPRINTF(sc, fmt, args...) \
73 1.1 rin do { \
74 1.1 rin if (muedebug) \
75 1.1 rin MUE_PRINTF(sc, fmt, ##args); \
76 1.1 rin } while (0 /* CONSTCOND */)
77 1.1 rin #else
78 1.1 rin #define DPRINTF(sc, fmt, args...) /* nothing */
79 1.1 rin #endif
80 1.1 rin
81 1.1 rin /*
82 1.1 rin * Various supported device vendors/products.
83 1.1 rin */
84 1.1 rin struct mue_type {
85 1.1 rin struct usb_devno mue_dev;
86 1.1 rin uint16_t mue_flags;
87 1.1 rin #define LAN7500 0x0001 /* LAN7500 */
88 1.1 rin };
89 1.1 rin
90 1.1 rin const struct mue_type mue_devs[] = {
91 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7500 }, LAN7500 },
92 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7505 }, LAN7500 },
93 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7800 }, 0 },
94 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7801 }, 0 },
95 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7850 }, 0 }
96 1.1 rin };
97 1.1 rin
98 1.1 rin #define MUE_LOOKUP(uaa) ((const struct mue_type *)usb_lookup(mue_devs, \
99 1.1 rin uaa->uaa_vendor, uaa->uaa_product))
100 1.1 rin
101 1.1 rin #define MUE_ENADDR_LO(enaddr) \
102 1.1 rin ((enaddr[3] << 24) | (enaddr[2] << 16) | (enaddr[1] << 8) | enaddr[0])
103 1.1 rin #define MUE_ENADDR_HI(enaddr) \
104 1.1 rin ((enaddr[5] << 8) | enaddr[4])
105 1.1 rin
106 1.1 rin static int mue_match(device_t, cfdata_t, void *);
107 1.1 rin static void mue_attach(device_t, device_t, void *);
108 1.1 rin static int mue_detach(device_t, int);
109 1.1 rin static int mue_activate(device_t, enum devact);
110 1.1 rin
111 1.1 rin static uint32_t mue_csr_read(struct mue_softc *, uint32_t);
112 1.1 rin static int mue_csr_write(struct mue_softc *, uint32_t, uint32_t);
113 1.1 rin static int mue_wait_for_bits(struct mue_softc *sc, uint32_t, uint32_t,
114 1.1 rin uint32_t, uint32_t);
115 1.1 rin
116 1.1 rin static void mue_lock_mii(struct mue_softc *);
117 1.1 rin static void mue_unlock_mii(struct mue_softc *);
118 1.1 rin
119 1.1 rin static int mue_miibus_readreg(device_t, int, int);
120 1.1 rin static void mue_miibus_writereg(device_t, int, int, int);
121 1.1 rin static void mue_miibus_statchg(struct ifnet *);
122 1.1 rin static int mue_ifmedia_upd(struct ifnet *);
123 1.1 rin static void mue_ifmedia_sts(struct ifnet *, struct ifmediareq *);
124 1.1 rin
125 1.1 rin static uint8_t mue_eeprom_getbyte(struct mue_softc *, int, uint8_t *);
126 1.1 rin static int mue_read_eeprom(struct mue_softc *, uint8_t *, int, int);
127 1.1 rin static bool mue_eeprom_present(struct mue_softc *sc);
128 1.1 rin
129 1.1 rin static int mue_read_otp_raw(struct mue_softc *, uint8_t *, int, int);
130 1.1 rin static int mue_read_otp(struct mue_softc *, uint8_t *, int, int);
131 1.1 rin
132 1.1 rin static void mue_dataport_write(struct mue_softc *, uint32_t, uint32_t,
133 1.1 rin uint32_t, uint32_t *);
134 1.1 rin
135 1.1 rin static void mue_init_ltm(struct mue_softc *);
136 1.1 rin
137 1.1 rin static int mue_chip_init(struct mue_softc *);
138 1.1 rin
139 1.1 rin static void mue_set_macaddr(struct mue_softc *);
140 1.1 rin static int mue_get_macaddr(struct mue_softc *, prop_dictionary_t);
141 1.1 rin
142 1.1 rin static int mue_rx_list_init(struct mue_softc *);
143 1.1 rin static int mue_tx_list_init(struct mue_softc *);
144 1.1 rin static int mue_open_pipes(struct mue_softc *);
145 1.1 rin static void mue_start_rx(struct mue_softc *);
146 1.1 rin
147 1.1 rin static int mue_encap(struct mue_softc *, struct mbuf *, int);
148 1.1 rin
149 1.1 rin static void mue_setmulti(struct mue_softc *);
150 1.1 rin static void mue_sethwcsum(struct mue_softc *);
151 1.1 rin
152 1.1 rin static void mue_rxeof(struct usbd_xfer *, void *, usbd_status);
153 1.1 rin static void mue_txeof(struct usbd_xfer *, void *, usbd_status);
154 1.1 rin
155 1.1 rin static int mue_init(struct ifnet *);
156 1.1 rin static int mue_ioctl(struct ifnet *, u_long, void *);
157 1.1 rin static void mue_watchdog(struct ifnet *);
158 1.1 rin static void mue_reset(struct mue_softc *);
159 1.1 rin static void mue_start(struct ifnet *);
160 1.1 rin static void mue_stop(struct ifnet *, int);
161 1.1 rin static void mue_tick(void *);
162 1.1 rin static void mue_tick_task(void *);
163 1.1 rin
164 1.1 rin static struct mbuf *mue_newbuf(void);
165 1.1 rin
166 1.1 rin #define MUE_SETBIT(sc, reg, x) \
167 1.1 rin mue_csr_write(sc, reg, mue_csr_read(sc, reg) | (x))
168 1.1 rin
169 1.1 rin #define MUE_CLRBIT(sc, reg, x) \
170 1.1 rin mue_csr_write(sc, reg, mue_csr_read(sc, reg) & ~(x))
171 1.1 rin
172 1.1 rin #define MUE_WAIT_SET(sc, reg, set, fail) \
173 1.1 rin mue_wait_for_bits(sc, reg, set, ~0, fail)
174 1.1 rin
175 1.1 rin #define MUE_WAIT_CLR(sc, reg, clear, fail) \
176 1.1 rin mue_wait_for_bits(sc, reg, 0, clear, fail)
177 1.1 rin
178 1.1 rin #define ETHER_IS_VALID(addr) \
179 1.1 rin (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
180 1.1 rin
181 1.1 rin #define ETHER_IS_ZERO(addr) \
182 1.1 rin (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
183 1.1 rin
184 1.1 rin #define ETHER_ALIGN 2
185 1.1 rin
186 1.1 rin CFATTACH_DECL_NEW(mue, sizeof(struct mue_softc), mue_match, mue_attach,
187 1.1 rin mue_detach, mue_activate);
188 1.1 rin
189 1.1 rin static uint32_t
190 1.1 rin mue_csr_read(struct mue_softc *sc, uint32_t reg)
191 1.1 rin {
192 1.1 rin usb_device_request_t req;
193 1.1 rin usbd_status err;
194 1.1 rin uDWord val;
195 1.1 rin
196 1.1 rin if (sc->mue_dying)
197 1.1 rin return 0;
198 1.1 rin
199 1.1 rin USETDW(val, 0);
200 1.1 rin req.bmRequestType = UT_READ_VENDOR_DEVICE;
201 1.1 rin req.bRequest = MUE_UR_READREG;
202 1.1 rin USETW(req.wValue, 0);
203 1.1 rin USETW(req.wIndex, reg);
204 1.1 rin USETW(req.wLength, 4);
205 1.1 rin
206 1.1 rin err = usbd_do_request(sc->mue_udev, &req, &val);
207 1.1 rin if (err) {
208 1.1 rin MUE_PRINTF(sc, "reg = 0x%x: %s\n", reg, usbd_errstr(err));
209 1.1 rin return 0;
210 1.1 rin }
211 1.1 rin
212 1.1 rin return UGETDW(val);
213 1.1 rin }
214 1.1 rin
215 1.1 rin static int
216 1.1 rin mue_csr_write(struct mue_softc *sc, uint32_t reg, uint32_t aval)
217 1.1 rin {
218 1.1 rin usb_device_request_t req;
219 1.1 rin usbd_status err;
220 1.1 rin uDWord val;
221 1.1 rin
222 1.1 rin if (sc->mue_dying)
223 1.1 rin return 0;
224 1.1 rin
225 1.1 rin USETDW(val, aval);
226 1.1 rin req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
227 1.1 rin req.bRequest = MUE_UR_WRITEREG;
228 1.1 rin USETW(req.wValue, 0);
229 1.1 rin USETW(req.wIndex, reg);
230 1.1 rin USETW(req.wLength, 4);
231 1.1 rin
232 1.1 rin err = usbd_do_request(sc->mue_udev, &req, &val);
233 1.1 rin if (err) {
234 1.1 rin MUE_PRINTF(sc, "reg = 0x%x: %s\n", reg, usbd_errstr(err));
235 1.1 rin return -1;
236 1.1 rin }
237 1.1 rin
238 1.1 rin return 0;
239 1.1 rin }
240 1.1 rin
241 1.1 rin static int
242 1.1 rin mue_wait_for_bits(struct mue_softc *sc, uint32_t reg,
243 1.1 rin uint32_t set, uint32_t clear, uint32_t fail)
244 1.1 rin {
245 1.1 rin uint32_t val;
246 1.1 rin int ntries;
247 1.1 rin
248 1.1 rin for (ntries = 0; ntries < 1000; ntries++) {
249 1.1 rin val = mue_csr_read(sc, reg);
250 1.1 rin if ((val & set) || !(val & clear))
251 1.1 rin return 0;
252 1.1 rin if (val & fail)
253 1.1 rin return 1;
254 1.1 rin usbd_delay_ms(sc->mue_udev, 1);
255 1.1 rin }
256 1.1 rin
257 1.1 rin return 1;
258 1.1 rin }
259 1.1 rin
260 1.1 rin /*
261 1.1 rin * Get exclusive access to the MII registers.
262 1.1 rin */
263 1.1 rin static void
264 1.1 rin mue_lock_mii(struct mue_softc *sc)
265 1.1 rin {
266 1.1 rin sc->mue_refcnt++;
267 1.1 rin mutex_enter(&sc->mue_mii_lock);
268 1.1 rin }
269 1.1 rin
270 1.1 rin static void
271 1.1 rin mue_unlock_mii(struct mue_softc *sc)
272 1.1 rin {
273 1.1 rin mutex_exit(&sc->mue_mii_lock);
274 1.1 rin if (--sc->mue_refcnt < 0)
275 1.1 rin usb_detach_wakeupold(sc->mue_dev);
276 1.1 rin }
277 1.1 rin
278 1.1 rin static int
279 1.1 rin mue_miibus_readreg(device_t dev, int phy, int reg)
280 1.1 rin {
281 1.1 rin struct mue_softc *sc = device_private(dev);
282 1.1 rin uint32_t val;
283 1.1 rin
284 1.1 rin if (sc->mue_dying) {
285 1.1 rin DPRINTF(sc, "dying\n");
286 1.1 rin return 0;
287 1.1 rin }
288 1.1 rin
289 1.1 rin if (sc->mue_phyno != phy)
290 1.1 rin return 0;
291 1.1 rin
292 1.1 rin mue_lock_mii(sc);
293 1.1 rin if (MUE_WAIT_CLR(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
294 1.1 rin mue_unlock_mii(sc);
295 1.1 rin MUE_PRINTF(sc, "not ready\n");
296 1.1 rin return -1;
297 1.1 rin }
298 1.1 rin
299 1.1 rin mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_READ |
300 1.1 rin MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
301 1.1 rin MUE_MII_ACCESS_PHYADDR(phy));
302 1.1 rin
303 1.1 rin if (MUE_WAIT_CLR(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
304 1.1 rin mue_unlock_mii(sc);
305 1.1 rin MUE_PRINTF(sc, "timed out\n");
306 1.1 rin return -1;
307 1.1 rin }
308 1.1 rin
309 1.1 rin val = mue_csr_read(sc, MUE_MII_DATA);
310 1.1 rin mue_unlock_mii(sc);
311 1.1 rin return val & 0xffff;
312 1.1 rin }
313 1.1 rin
314 1.1 rin static void
315 1.1 rin mue_miibus_writereg(device_t dev, int phy, int reg, int data)
316 1.1 rin {
317 1.1 rin struct mue_softc *sc = device_private(dev);
318 1.1 rin
319 1.1 rin if (sc->mue_dying) {
320 1.1 rin DPRINTF(sc, "dying\n");
321 1.1 rin return;
322 1.1 rin }
323 1.1 rin
324 1.1 rin if (sc->mue_phyno != phy) {
325 1.1 rin DPRINTF(sc, "sc->mue_phyno (%d) != phy (%d)\n",
326 1.1 rin sc->mue_phyno, phy);
327 1.1 rin return;
328 1.1 rin }
329 1.1 rin
330 1.1 rin mue_lock_mii(sc);
331 1.1 rin if (MUE_WAIT_CLR(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
332 1.1 rin mue_unlock_mii(sc);
333 1.1 rin MUE_PRINTF(sc, "not ready\n");
334 1.1 rin return;
335 1.1 rin }
336 1.1 rin
337 1.1 rin mue_csr_write(sc, MUE_MII_DATA, data);
338 1.1 rin mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE |
339 1.1 rin MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
340 1.1 rin MUE_MII_ACCESS_PHYADDR(phy));
341 1.1 rin
342 1.1 rin if (MUE_WAIT_CLR(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0))
343 1.1 rin MUE_PRINTF(sc, "timed out\n");
344 1.1 rin
345 1.1 rin mue_unlock_mii(sc);
346 1.1 rin }
347 1.1 rin
348 1.1 rin static void
349 1.1 rin mue_miibus_statchg(struct ifnet *ifp)
350 1.1 rin {
351 1.1 rin struct mue_softc *sc = ifp->if_softc;
352 1.1 rin struct mii_data *mii = GET_MII(sc);
353 1.1 rin uint32_t flow, threshold;
354 1.1 rin
355 1.1 rin if (mii == NULL || ifp == NULL || (ifp->if_flags & IFF_RUNNING) == 0) {
356 1.1 rin DPRINTF(sc, "not ready\n");
357 1.1 rin return;
358 1.1 rin }
359 1.1 rin
360 1.1 rin sc->mue_link = 0;
361 1.1 rin if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
362 1.1 rin (IFM_ACTIVE | IFM_AVALID)) {
363 1.1 rin switch (IFM_SUBTYPE(mii->mii_media_active)) {
364 1.1 rin case IFM_10_T:
365 1.1 rin case IFM_100_TX:
366 1.1 rin case IFM_1000_T:
367 1.1 rin sc->mue_link++;
368 1.1 rin break;
369 1.1 rin default:
370 1.1 rin break;
371 1.1 rin }
372 1.1 rin }
373 1.1 rin
374 1.1 rin /* Lost link, do nothing. */
375 1.1 rin if (sc->mue_link == 0) {
376 1.1 rin DPRINTF(sc, "mii_media_status = 0x%x\n", mii->mii_media_status);
377 1.1 rin return;
378 1.1 rin }
379 1.1 rin
380 1.1 rin if (!(sc->mue_flags & LAN7500)) {
381 1.1 rin if (sc->mue_udev->ud_speed == USB_SPEED_SUPER) {
382 1.1 rin if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
383 1.1 rin /* Disable U2 and enable U1. */
384 1.1 rin MUE_CLRBIT(sc, MUE_USB_CFG1,
385 1.1 rin MUE_USB_CFG1_DEV_U2_INIT_EN);
386 1.1 rin MUE_SETBIT(sc, MUE_USB_CFG1,
387 1.1 rin MUE_USB_CFG1_DEV_U1_INIT_EN);
388 1.1 rin } else {
389 1.1 rin /* Enable U1 and U2. */
390 1.1 rin MUE_SETBIT(sc, MUE_USB_CFG1,
391 1.1 rin MUE_USB_CFG1_DEV_U1_INIT_EN |
392 1.1 rin MUE_USB_CFG1_DEV_U2_INIT_EN);
393 1.1 rin }
394 1.1 rin }
395 1.1 rin }
396 1.1 rin
397 1.1 rin flow = 0;
398 1.1 rin /* XXX Linux does not check IFM_FDX flag for 7800. */
399 1.1 rin if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) {
400 1.1 rin if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE)
401 1.1 rin flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME;
402 1.1 rin if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE)
403 1.1 rin flow |= MUE_FLOW_RX_FCEN;
404 1.1 rin }
405 1.1 rin
406 1.1 rin /* XXX Magic numbers taken from Linux driver. */
407 1.1 rin if (sc->mue_flags & LAN7500)
408 1.1 rin threshold = 0x820;
409 1.1 rin else
410 1.1 rin switch (sc->mue_udev->ud_speed) {
411 1.1 rin case USB_SPEED_SUPER:
412 1.1 rin threshold = 0x817;
413 1.1 rin break;
414 1.1 rin case USB_SPEED_HIGH:
415 1.1 rin threshold = 0x211;
416 1.1 rin break;
417 1.1 rin default:
418 1.1 rin threshold = 0;
419 1.1 rin break;
420 1.1 rin }
421 1.1 rin
422 1.1 rin /* Threshold value should be set before enabling flow. */
423 1.1 rin mue_csr_write(sc, (sc->mue_flags & LAN7500) ?
424 1.1 rin MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, threshold);
425 1.1 rin mue_csr_write(sc, MUE_FLOW, flow);
426 1.1 rin
427 1.1 rin DPRINTF(sc, "done\n");
428 1.1 rin }
429 1.1 rin
430 1.1 rin /*
431 1.1 rin * Set media options.
432 1.1 rin */
433 1.1 rin static int
434 1.1 rin mue_ifmedia_upd(struct ifnet *ifp)
435 1.1 rin {
436 1.1 rin struct mue_softc *sc = ifp->if_softc;
437 1.1 rin struct mii_data *mii = GET_MII(sc);
438 1.1 rin
439 1.1 rin sc->mue_link = 0; /* XXX */
440 1.1 rin
441 1.1 rin if (mii->mii_instance) {
442 1.1 rin struct mii_softc *miisc;
443 1.1 rin LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
444 1.1 rin mii_phy_reset(miisc);
445 1.1 rin }
446 1.1 rin return mii_mediachg(mii);
447 1.1 rin }
448 1.1 rin
449 1.1 rin /*
450 1.1 rin * Report current media status.
451 1.1 rin */
452 1.1 rin static void
453 1.1 rin mue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
454 1.1 rin {
455 1.1 rin struct mue_softc *sc = ifp->if_softc;
456 1.1 rin struct mii_data *mii = GET_MII(sc);
457 1.1 rin
458 1.1 rin mii_pollstat(mii);
459 1.1 rin ifmr->ifm_active = mii->mii_media_active;
460 1.1 rin ifmr->ifm_status = mii->mii_media_status;
461 1.1 rin }
462 1.1 rin
463 1.1 rin static uint8_t
464 1.1 rin mue_eeprom_getbyte(struct mue_softc *sc, int off, uint8_t *dest)
465 1.1 rin {
466 1.1 rin uint32_t val;
467 1.1 rin
468 1.1 rin if (MUE_WAIT_CLR(sc, MUE_E2P_CMD, MUE_E2P_CMD_BUSY, 0)) {
469 1.1 rin MUE_PRINTF(sc, "not ready\n");
470 1.1 rin return ETIMEDOUT;
471 1.1 rin }
472 1.1 rin
473 1.1 rin mue_csr_write(sc, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY |
474 1.1 rin (off & MUE_E2P_CMD_ADDR_MASK));
475 1.1 rin
476 1.1 rin if (MUE_WAIT_CLR(sc, MUE_E2P_CMD, MUE_E2P_CMD_BUSY,
477 1.1 rin MUE_E2P_CMD_TIMEOUT)) {
478 1.1 rin MUE_PRINTF(sc, "timed out\n");
479 1.1 rin return ETIMEDOUT;
480 1.1 rin }
481 1.1 rin
482 1.1 rin val = mue_csr_read(sc, MUE_E2P_DATA);
483 1.1 rin *dest = val & 0xff;
484 1.1 rin
485 1.1 rin return 0;
486 1.1 rin }
487 1.1 rin
488 1.1 rin static int
489 1.1 rin mue_read_eeprom(struct mue_softc *sc, uint8_t *dest, int off, int cnt)
490 1.1 rin {
491 1.1 rin uint32_t val = 0; /* XXX gcc */
492 1.1 rin uint8_t byte;
493 1.1 rin int i, err;
494 1.1 rin
495 1.1 rin /*
496 1.1 rin * EEPROM pins are muxed with the LED function on LAN7800 device.
497 1.1 rin */
498 1.1 rin if (sc->mue_product == USB_PRODUCT_SMSC_LAN7800) {
499 1.1 rin val = mue_csr_read(sc, MUE_HW_CFG);
500 1.1 rin mue_csr_write(sc, MUE_HW_CFG,
501 1.1 rin val & ~(MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN));
502 1.1 rin }
503 1.1 rin
504 1.1 rin for (i = 0; i < cnt; i++) {
505 1.1 rin err = mue_eeprom_getbyte(sc, off + i, &byte);
506 1.1 rin if (err)
507 1.1 rin break;
508 1.1 rin *(dest + i) = byte;
509 1.1 rin }
510 1.1 rin
511 1.1 rin if (sc->mue_product == USB_PRODUCT_SMSC_LAN7800)
512 1.1 rin mue_csr_write(sc, MUE_HW_CFG, val);
513 1.1 rin
514 1.1 rin return err ? 1 : 0;
515 1.1 rin }
516 1.1 rin
517 1.1 rin static bool
518 1.1 rin mue_eeprom_present(struct mue_softc *sc)
519 1.1 rin {
520 1.1 rin uint32_t val;
521 1.1 rin uint8_t sig;
522 1.1 rin int ret;
523 1.1 rin
524 1.1 rin if (sc->mue_flags & LAN7500) {
525 1.1 rin val = mue_csr_read(sc, MUE_E2P_CMD);
526 1.1 rin return val & MUE_E2P_CMD_LOADED;
527 1.1 rin } else {
528 1.1 rin ret = mue_read_eeprom(sc, &sig, MUE_E2P_IND_OFFSET, 1);
529 1.1 rin return (ret == 0) && (sig == MUE_E2P_IND);
530 1.1 rin }
531 1.1 rin }
532 1.1 rin
533 1.1 rin static int
534 1.1 rin mue_read_otp_raw(struct mue_softc *sc, uint8_t *dest, int off, int cnt)
535 1.1 rin {
536 1.1 rin uint32_t val;
537 1.1 rin int i, err;
538 1.1 rin
539 1.1 rin val = mue_csr_read(sc, MUE_OTP_PWR_DN);
540 1.1 rin
541 1.1 rin /* Checking if bit is set. */
542 1.1 rin if (val & MUE_OTP_PWR_DN_PWRDN_N) {
543 1.1 rin /* Clear it, then wait for it to be cleared. */
544 1.1 rin mue_csr_write(sc, MUE_OTP_PWR_DN, 0);
545 1.1 rin err = MUE_WAIT_CLR(sc, MUE_OTP_PWR_DN, MUE_OTP_PWR_DN_PWRDN_N,
546 1.1 rin 0);
547 1.1 rin if (err) {
548 1.1 rin MUE_PRINTF(sc, "not ready\n");
549 1.1 rin return 1;
550 1.1 rin }
551 1.1 rin }
552 1.1 rin
553 1.1 rin /* Start reading the bytes, one at a time. */
554 1.1 rin for (i = 0; i < cnt; i++) {
555 1.1 rin mue_csr_write(sc, MUE_OTP_ADDR1,
556 1.1 rin ((off + i) >> 8) & MUE_OTP_ADDR1_MASK);
557 1.1 rin mue_csr_write(sc, MUE_OTP_ADDR2,
558 1.1 rin ((off + i) & MUE_OTP_ADDR2_MASK));
559 1.1 rin mue_csr_write(sc, MUE_OTP_FUNC_CMD, MUE_OTP_FUNC_CMD_READ);
560 1.1 rin mue_csr_write(sc, MUE_OTP_CMD_GO, MUE_OTP_CMD_GO_GO);
561 1.1 rin
562 1.1 rin err = MUE_WAIT_CLR(sc, MUE_OTP_STATUS, MUE_OTP_STATUS_BUSY, 0);
563 1.1 rin if (err) {
564 1.1 rin MUE_PRINTF(sc, "timed out\n");
565 1.1 rin return 1;
566 1.1 rin }
567 1.1 rin val = mue_csr_read(sc, MUE_OTP_RD_DATA);
568 1.1 rin *(dest + i) = (uint8_t)(val & 0xff);
569 1.1 rin }
570 1.1 rin
571 1.1 rin return 0;
572 1.1 rin }
573 1.1 rin
574 1.1 rin static int
575 1.1 rin mue_read_otp(struct mue_softc *sc, uint8_t *dest, int off, int cnt)
576 1.1 rin {
577 1.1 rin uint8_t sig;
578 1.1 rin int err;
579 1.1 rin
580 1.1 rin if (sc->mue_flags & LAN7500)
581 1.1 rin return 1;
582 1.1 rin
583 1.1 rin err = mue_read_otp_raw(sc, &sig, MUE_OTP_IND_OFFSET, 1);
584 1.1 rin if (err)
585 1.1 rin return 1;
586 1.1 rin switch (sig) {
587 1.1 rin case MUE_OTP_IND_1:
588 1.1 rin break;
589 1.1 rin case MUE_OTP_IND_2:
590 1.1 rin off += 0x100;
591 1.1 rin break;
592 1.1 rin default:
593 1.1 rin DPRINTF(sc, "OTP not found\n");
594 1.1 rin return 1;
595 1.1 rin }
596 1.1 rin err = mue_read_otp_raw(sc, dest, off, cnt);
597 1.1 rin return err;
598 1.1 rin }
599 1.1 rin
600 1.1 rin static void
601 1.1 rin mue_dataport_write(struct mue_softc *sc, uint32_t sel, uint32_t addr,
602 1.1 rin uint32_t cnt, uint32_t *data)
603 1.1 rin {
604 1.1 rin uint32_t i;
605 1.1 rin
606 1.1 rin if (MUE_WAIT_SET(sc, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
607 1.1 rin MUE_PRINTF(sc, "not ready\n");
608 1.1 rin return;
609 1.1 rin }
610 1.1 rin
611 1.1 rin mue_csr_write(sc, MUE_DP_SEL,
612 1.1 rin (mue_csr_read(sc, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel);
613 1.1 rin
614 1.1 rin for (i = 0; i < cnt; i++) {
615 1.1 rin mue_csr_write(sc, MUE_DP_ADDR, addr + i);
616 1.1 rin mue_csr_write(sc, MUE_DP_DATA, data[i]);
617 1.1 rin mue_csr_write(sc, MUE_DP_CMD, MUE_DP_CMD_WRITE);
618 1.1 rin if (MUE_WAIT_SET(sc, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
619 1.1 rin MUE_PRINTF(sc, "timed out\n");
620 1.1 rin return;
621 1.1 rin }
622 1.1 rin }
623 1.1 rin }
624 1.1 rin
625 1.1 rin static void
626 1.1 rin mue_init_ltm(struct mue_softc *sc)
627 1.1 rin {
628 1.1 rin uint32_t idx[MUE_NUM_LTM_INDEX] = { 0, 0, 0, 0, 0, 0 };
629 1.1 rin uint8_t temp[2];
630 1.1 rin size_t i;
631 1.1 rin
632 1.1 rin if (mue_csr_read(sc, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) {
633 1.1 rin if (mue_eeprom_present(sc) &&
634 1.1 rin (mue_read_eeprom(sc, temp, MUE_E2P_LTM_OFFSET, 2) == 0)) {
635 1.1 rin if (temp[0] != sizeof(idx)) {
636 1.1 rin DPRINTF(sc, "EEPROM: unexpected size\n");
637 1.1 rin goto done;
638 1.1 rin }
639 1.1 rin if (mue_read_eeprom(sc, (uint8_t *)idx, temp[1] << 1,
640 1.1 rin sizeof(idx))) {
641 1.1 rin DPRINTF(sc, "EEPROM read failed\n");
642 1.1 rin goto done;
643 1.1 rin }
644 1.1 rin DPRINTF(sc, "success\n");
645 1.1 rin } else if (mue_read_otp(sc, temp, MUE_E2P_LTM_OFFSET, 2) == 0) {
646 1.1 rin if (temp[0] != sizeof(idx)) {
647 1.1 rin DPRINTF(sc, "OTP: unexpected size\n");
648 1.1 rin goto done;
649 1.1 rin }
650 1.1 rin if (mue_read_otp(sc, (uint8_t *)idx, temp[1] << 1,
651 1.1 rin sizeof(idx))) {
652 1.1 rin DPRINTF(sc, "OTP read failed\n");
653 1.1 rin goto done;
654 1.1 rin }
655 1.1 rin DPRINTF(sc, "success\n");
656 1.1 rin } else {
657 1.1 rin DPRINTF(sc, "nothing to do\n");
658 1.1 rin }
659 1.1 rin } else {
660 1.1 rin DPRINTF(sc, "nothing to do\n");
661 1.1 rin }
662 1.1 rin done:
663 1.1 rin for (i = 0; i < __arraycount(idx); i++)
664 1.1 rin mue_csr_write(sc, MUE_LTM_INDEX(i), idx[i]);
665 1.1 rin }
666 1.1 rin
667 1.1 rin static int
668 1.1 rin mue_chip_init(struct mue_softc *sc)
669 1.1 rin {
670 1.1 rin uint32_t val;
671 1.1 rin
672 1.1 rin if ((sc->mue_flags & LAN7500) &&
673 1.1 rin MUE_WAIT_SET(sc, MUE_PMT_CTL, MUE_PMT_CTL_READY, 0)) {
674 1.1 rin MUE_PRINTF(sc, "not ready\n");
675 1.1 rin return ETIMEDOUT;
676 1.1 rin }
677 1.1 rin
678 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_LRST);
679 1.1 rin if (MUE_WAIT_CLR(sc, MUE_HW_CFG, MUE_HW_CFG_LRST, 0)) {
680 1.1 rin MUE_PRINTF(sc, "timed out\n");
681 1.1 rin return ETIMEDOUT;
682 1.1 rin }
683 1.1 rin
684 1.1 rin /* Respond to the IN token with a NAK. */
685 1.1 rin if (sc->mue_flags & LAN7500)
686 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BIR);
687 1.1 rin else
688 1.1 rin MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BIR);
689 1.1 rin
690 1.1 rin if (sc->mue_flags & LAN7500) {
691 1.1 rin if (sc->mue_udev->ud_speed == USB_SPEED_HIGH)
692 1.1 rin val = MUE_7500_HS_BUFSIZE /
693 1.1 rin MUE_HS_USB_PKT_SIZE;
694 1.1 rin else
695 1.1 rin val = MUE_7500_FS_BUFSIZE /
696 1.1 rin MUE_FS_USB_PKT_SIZE;
697 1.1 rin mue_csr_write(sc, MUE_7500_BURST_CAP, val);
698 1.1 rin mue_csr_write(sc, MUE_7500_BULKIN_DELAY,
699 1.1 rin MUE_7500_DEFAULT_BULKIN_DELAY);
700 1.1 rin
701 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF);
702 1.1 rin
703 1.1 rin /* Set FIFO sizes. */
704 1.1 rin val = (MUE_7500_MAX_RX_FIFO_SIZE - 512) / 512;
705 1.1 rin mue_csr_write(sc, MUE_7500_FCT_RX_FIFO_END, val);
706 1.1 rin val = (MUE_7500_MAX_TX_FIFO_SIZE - 512) / 512;
707 1.1 rin mue_csr_write(sc, MUE_7500_FCT_TX_FIFO_END, val);
708 1.1 rin } else {
709 1.1 rin /* Init LTM. */
710 1.1 rin mue_init_ltm(sc);
711 1.1 rin
712 1.1 rin val = MUE_7800_BUFSIZE;
713 1.1 rin switch (sc->mue_udev->ud_speed) {
714 1.1 rin case USB_SPEED_SUPER:
715 1.1 rin val /= MUE_SS_USB_PKT_SIZE;
716 1.1 rin break;
717 1.1 rin case USB_SPEED_HIGH:
718 1.1 rin val /= MUE_HS_USB_PKT_SIZE;
719 1.1 rin break;
720 1.1 rin default:
721 1.1 rin val /= MUE_FS_USB_PKT_SIZE;
722 1.1 rin break;
723 1.1 rin }
724 1.1 rin mue_csr_write(sc, MUE_7800_BURST_CAP, val);
725 1.1 rin mue_csr_write(sc, MUE_7800_BULKIN_DELAY,
726 1.1 rin MUE_7800_DEFAULT_BULKIN_DELAY);
727 1.1 rin
728 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_MEF);
729 1.1 rin MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BCE);
730 1.1 rin
731 1.1 rin /*
732 1.1 rin * Set FCL's RX and TX FIFO sizes: according to data sheet this
733 1.1 rin * is already the default value. But we initialize it to the
734 1.1 rin * same value anyways, as that's what the Linux driver does.
735 1.1 rin */
736 1.1 rin val = (MUE_7800_MAX_RX_FIFO_SIZE - 512) / 512;
737 1.1 rin mue_csr_write(sc, MUE_7800_FCT_RX_FIFO_END, val);
738 1.1 rin val = (MUE_7800_MAX_TX_FIFO_SIZE - 512) / 512;
739 1.1 rin mue_csr_write(sc, MUE_7800_FCT_TX_FIFO_END, val);
740 1.1 rin }
741 1.1 rin
742 1.1 rin /* Enabling interrupts. */
743 1.1 rin mue_csr_write(sc, MUE_INT_STATUS, ~0);
744 1.1 rin
745 1.1 rin mue_csr_write(sc, (sc->mue_flags & LAN7500) ?
746 1.1 rin MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, 0);
747 1.1 rin mue_csr_write(sc, MUE_FLOW, 0);
748 1.1 rin
749 1.1 rin /* Reset PHY. */
750 1.1 rin MUE_SETBIT(sc, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST);
751 1.1 rin if (MUE_WAIT_CLR(sc, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST, 0)) {
752 1.1 rin MUE_PRINTF(sc, "PHY not ready\n");
753 1.1 rin return ETIMEDOUT;
754 1.1 rin }
755 1.1 rin
756 1.1 rin /* LAN7801 only has RGMII mode. */
757 1.1 rin if (sc->mue_product == USB_PRODUCT_SMSC_LAN7801)
758 1.1 rin MUE_CLRBIT(sc, MUE_MAC_CR, MUE_MAC_CR_GMII_EN);
759 1.1 rin
760 1.1 rin if ((sc->mue_flags & LAN7500) ||
761 1.1 rin (sc->mue_product == USB_PRODUCT_SMSC_LAN7800 &&
762 1.1 rin !mue_eeprom_present(sc))) {
763 1.1 rin /* Allow MAC to detect speed and duplex from PHY. */
764 1.1 rin MUE_SETBIT(sc, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED |
765 1.1 rin MUE_MAC_CR_AUTO_DUPLEX);
766 1.1 rin }
767 1.1 rin
768 1.1 rin MUE_SETBIT(sc, MUE_MAC_TX, MUE_MAC_TX_TXEN);
769 1.1 rin MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ?
770 1.1 rin MUE_7500_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN);
771 1.1 rin
772 1.1 rin /* Set the maximum frame size. */
773 1.1 rin MUE_CLRBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN);
774 1.1 rin val = mue_csr_read(sc, MUE_MAC_RX);
775 1.1 rin val &= ~MUE_MAC_RX_MAX_SIZE_MASK;
776 1.1 rin val |= MUE_MAC_RX_MAX_LEN(ETHER_MAX_LEN);
777 1.1 rin mue_csr_write(sc, MUE_MAC_RX, val);
778 1.1 rin MUE_SETBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN);
779 1.1 rin
780 1.1 rin MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ?
781 1.1 rin MUE_7500_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN);
782 1.1 rin
783 1.1 rin /* Set default GPIO/LED settings only if no EEPROM is detected. */
784 1.1 rin if ((sc->mue_flags & LAN7500) && !mue_eeprom_present(sc)) {
785 1.1 rin MUE_CLRBIT(sc, MUE_LED_CFG, MUE_LED_CFG_LED10_FUN_SEL);
786 1.1 rin MUE_SETBIT(sc, MUE_LED_CFG,
787 1.1 rin MUE_LED_CFG_LEDGPIO_EN | MUE_LED_CFG_LED2_FUN_SEL);
788 1.1 rin }
789 1.1 rin
790 1.1 rin /* XXX We assume two LEDs at least when EEPROM is missing. */
791 1.1 rin if (sc->mue_product == USB_PRODUCT_SMSC_LAN7800 &&
792 1.1 rin !mue_eeprom_present(sc))
793 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG,
794 1.1 rin MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN);
795 1.1 rin
796 1.1 rin return 0;
797 1.1 rin }
798 1.1 rin
799 1.1 rin static void
800 1.1 rin mue_set_macaddr(struct mue_softc *sc)
801 1.1 rin {
802 1.1 rin struct ifnet *ifp = GET_IFP(sc);
803 1.1 rin const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
804 1.1 rin uint32_t lo, hi;
805 1.1 rin
806 1.1 rin lo = MUE_ENADDR_LO(enaddr);
807 1.1 rin hi = MUE_ENADDR_HI(enaddr);
808 1.1 rin
809 1.1 rin mue_csr_write(sc, MUE_RX_ADDRL, lo);
810 1.1 rin mue_csr_write(sc, MUE_RX_ADDRH, hi);
811 1.1 rin }
812 1.1 rin
813 1.1 rin static int
814 1.1 rin mue_get_macaddr(struct mue_softc *sc, prop_dictionary_t dict)
815 1.1 rin {
816 1.1 rin prop_data_t eaprop;
817 1.1 rin uint32_t low, high;
818 1.1 rin
819 1.1 rin if (!(sc->mue_flags & LAN7500)) {
820 1.1 rin low = mue_csr_read(sc, MUE_RX_ADDRL);
821 1.1 rin high = mue_csr_read(sc, MUE_RX_ADDRH);
822 1.1 rin sc->mue_enaddr[5] = (uint8_t)((high >> 8) & 0xff);
823 1.1 rin sc->mue_enaddr[4] = (uint8_t)((high) & 0xff);
824 1.1 rin sc->mue_enaddr[3] = (uint8_t)((low >> 24) & 0xff);
825 1.1 rin sc->mue_enaddr[2] = (uint8_t)((low >> 16) & 0xff);
826 1.1 rin sc->mue_enaddr[1] = (uint8_t)((low >> 8) & 0xff);
827 1.1 rin sc->mue_enaddr[0] = (uint8_t)((low) & 0xff);
828 1.1 rin if (ETHER_IS_VALID(sc->mue_enaddr))
829 1.1 rin return 0;
830 1.1 rin else {
831 1.1 rin DPRINTF(sc, "registers: %s\n",
832 1.1 rin ether_sprintf(sc->mue_enaddr));
833 1.1 rin }
834 1.1 rin }
835 1.1 rin
836 1.1 rin if (mue_eeprom_present(sc) && !mue_read_eeprom(sc, sc->mue_enaddr,
837 1.1 rin MUE_E2P_MAC_OFFSET, ETHER_ADDR_LEN)) {
838 1.1 rin if (ETHER_IS_VALID(sc->mue_enaddr))
839 1.1 rin return 0;
840 1.1 rin else {
841 1.1 rin DPRINTF(sc, "EEPROM: %s\n",
842 1.1 rin ether_sprintf(sc->mue_enaddr));
843 1.1 rin }
844 1.1 rin }
845 1.1 rin
846 1.1 rin if (mue_read_otp(sc, sc->mue_enaddr, MUE_OTP_MAC_OFFSET,
847 1.1 rin ETHER_ADDR_LEN) == 0) {
848 1.1 rin if (ETHER_IS_VALID(sc->mue_enaddr))
849 1.1 rin return 0;
850 1.1 rin else {
851 1.1 rin DPRINTF(sc, "OTP: %s\n",
852 1.1 rin ether_sprintf(sc->mue_enaddr));
853 1.1 rin }
854 1.1 rin }
855 1.1 rin
856 1.1 rin /*
857 1.1 rin * Other MD methods. This should be tried only if other methods fail.
858 1.1 rin * Otherwise, MAC address for internal device can be assinged to
859 1.1 rin * external devices on Raspberry Pi, for example.
860 1.1 rin */
861 1.1 rin eaprop = prop_dictionary_get(dict, "mac-address");
862 1.1 rin if (eaprop != NULL) {
863 1.1 rin KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
864 1.1 rin KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
865 1.1 rin memcpy(sc->mue_enaddr, prop_data_data_nocopy(eaprop),
866 1.1 rin ETHER_ADDR_LEN);
867 1.1 rin if (ETHER_IS_VALID(sc->mue_enaddr))
868 1.1 rin return 0;
869 1.1 rin else {
870 1.1 rin DPRINTF(sc, "prop_dictionary_get: %s\n",
871 1.1 rin ether_sprintf(sc->mue_enaddr));
872 1.1 rin }
873 1.1 rin }
874 1.1 rin
875 1.1 rin return 1;
876 1.1 rin }
877 1.1 rin
878 1.1 rin
879 1.1 rin /*
880 1.1 rin * Probe for a Microchip chip. */
881 1.1 rin static int
882 1.1 rin mue_match(device_t parent, cfdata_t match, void *aux)
883 1.1 rin {
884 1.1 rin struct usb_attach_arg *uaa = aux;
885 1.1 rin
886 1.1 rin return (MUE_LOOKUP(uaa) != NULL) ? UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
887 1.1 rin }
888 1.1 rin
889 1.1 rin static void
890 1.1 rin mue_attach(device_t parent, device_t self, void *aux)
891 1.1 rin {
892 1.1 rin struct mue_softc *sc = device_private(self);
893 1.1 rin prop_dictionary_t dict = device_properties(self);
894 1.1 rin struct usb_attach_arg *uaa = aux;
895 1.1 rin struct usbd_device *dev = uaa->uaa_device;
896 1.1 rin usb_interface_descriptor_t *id;
897 1.1 rin usb_endpoint_descriptor_t *ed;
898 1.1 rin char *devinfop;
899 1.1 rin struct mii_data *mii;
900 1.1 rin struct ifnet *ifp;
901 1.1 rin usbd_status err;
902 1.1 rin int i, s;
903 1.1 rin
904 1.1 rin aprint_naive("\n");
905 1.1 rin aprint_normal("\n");
906 1.1 rin
907 1.1 rin sc->mue_dev = self;
908 1.1 rin sc->mue_udev = dev;
909 1.1 rin
910 1.1 rin devinfop = usbd_devinfo_alloc(sc->mue_udev, 0);
911 1.1 rin aprint_normal_dev(self, "%s\n", devinfop);
912 1.1 rin usbd_devinfo_free(devinfop);
913 1.1 rin
914 1.1 rin #define MUE_CONFIG_NO 1
915 1.1 rin err = usbd_set_config_no(dev, MUE_CONFIG_NO, 1);
916 1.1 rin if (err) {
917 1.1 rin aprint_error_dev(self, "failed to set configuration: %s\n",
918 1.1 rin usbd_errstr(err));
919 1.1 rin return;
920 1.1 rin }
921 1.1 rin
922 1.1 rin mutex_init(&sc->mue_mii_lock, MUTEX_DEFAULT, IPL_NONE);
923 1.1 rin usb_init_task(&sc->mue_tick_task, mue_tick_task, sc, 0);
924 1.1 rin usb_init_task(&sc->mue_stop_task, (void (*)(void *))mue_stop, sc, 0);
925 1.1 rin
926 1.1 rin #define MUE_IFACE_IDX 0
927 1.1 rin err = usbd_device2interface_handle(dev, MUE_IFACE_IDX, &sc->mue_iface);
928 1.1 rin if (err) {
929 1.1 rin aprint_error_dev(self, "failed to get interface handle: %s\n",
930 1.1 rin usbd_errstr(err));
931 1.1 rin return;
932 1.1 rin }
933 1.1 rin
934 1.1 rin sc->mue_product = uaa->uaa_product;
935 1.1 rin sc->mue_flags = MUE_LOOKUP(uaa)->mue_flags;
936 1.1 rin
937 1.1 rin /* Decide on what our bufsize will be. */
938 1.1 rin if (sc->mue_flags & LAN7500)
939 1.1 rin sc->mue_bufsz = (sc->mue_udev->ud_speed == USB_SPEED_HIGH) ?
940 1.1 rin MUE_7500_HS_BUFSIZE : MUE_7500_FS_BUFSIZE;
941 1.1 rin else
942 1.1 rin sc->mue_bufsz = MUE_7800_BUFSIZE;
943 1.1 rin
944 1.1 rin /* Find endpoints. */
945 1.1 rin id = usbd_get_interface_descriptor(sc->mue_iface);
946 1.1 rin for (i = 0; i < id->bNumEndpoints; i++) {
947 1.1 rin ed = usbd_interface2endpoint_descriptor(sc->mue_iface, i);
948 1.1 rin if (ed == NULL) {
949 1.1 rin aprint_error_dev(self, "couldn't get ep %d\n", i);
950 1.1 rin return;
951 1.1 rin }
952 1.1 rin if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
953 1.1 rin UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
954 1.1 rin sc->mue_ed[MUE_ENDPT_RX] = ed->bEndpointAddress;
955 1.1 rin } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
956 1.1 rin UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
957 1.1 rin sc->mue_ed[MUE_ENDPT_TX] = ed->bEndpointAddress;
958 1.1 rin } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
959 1.1 rin UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
960 1.1 rin sc->mue_ed[MUE_ENDPT_INTR] = ed->bEndpointAddress;
961 1.1 rin }
962 1.1 rin }
963 1.1 rin KASSERT(sc->mue_ed[MUE_ENDPT_RX] != 0);
964 1.1 rin KASSERT(sc->mue_ed[MUE_ENDPT_TX] != 0);
965 1.1 rin KASSERT(sc->mue_ed[MUE_ENDPT_INTR] != 0);
966 1.1 rin
967 1.1 rin s = splnet();
968 1.1 rin
969 1.1 rin sc->mue_phyno = 1;
970 1.1 rin
971 1.1 rin if (mue_chip_init(sc)) {
972 1.1 rin aprint_error_dev(self, "chip initialization failed\n");
973 1.1 rin splx(s);
974 1.1 rin return;
975 1.1 rin }
976 1.1 rin
977 1.1 rin /* A Microchip chip was detected. Inform the world. */
978 1.1 rin if (sc->mue_flags & LAN7500)
979 1.1 rin aprint_normal_dev(self, "LAN7500\n");
980 1.1 rin else
981 1.1 rin aprint_normal_dev(self, "LAN7800\n");
982 1.1 rin
983 1.1 rin if (mue_get_macaddr(sc, dict)) {
984 1.1 rin aprint_error_dev(self, "Ethernet address assigned randomly\n");
985 1.1 rin cprng_fast(sc->mue_enaddr, ETHER_ADDR_LEN);
986 1.1 rin sc->mue_enaddr[0] &= ~0x01; /* unicast */
987 1.1 rin sc->mue_enaddr[0] |= 0x02; /* locally administered */
988 1.1 rin }
989 1.1 rin
990 1.1 rin aprint_normal_dev(self, "Ethernet address %s\n",
991 1.1 rin ether_sprintf(sc->mue_enaddr));
992 1.1 rin
993 1.1 rin /* Initialize interface info.*/
994 1.1 rin ifp = GET_IFP(sc);
995 1.1 rin ifp->if_softc = sc;
996 1.1 rin strlcpy(ifp->if_xname, device_xname(sc->mue_dev), IFNAMSIZ);
997 1.1 rin ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
998 1.1 rin ifp->if_init = mue_init;
999 1.1 rin ifp->if_ioctl = mue_ioctl;
1000 1.1 rin ifp->if_start = mue_start;
1001 1.1 rin ifp->if_stop = mue_stop;
1002 1.1 rin ifp->if_watchdog = mue_watchdog;
1003 1.1 rin
1004 1.1 rin IFQ_SET_READY(&ifp->if_snd);
1005 1.1 rin
1006 1.1 rin sc->mue_ec.ec_capabilities = ETHERCAP_VLAN_MTU;
1007 1.1 rin
1008 1.1 rin /* Initialize MII/media info. */
1009 1.1 rin mii = GET_MII(sc);
1010 1.1 rin mii->mii_ifp = ifp;
1011 1.1 rin mii->mii_readreg = mue_miibus_readreg;
1012 1.1 rin mii->mii_writereg = mue_miibus_writereg;
1013 1.1 rin mii->mii_statchg = mue_miibus_statchg;
1014 1.1 rin mii->mii_flags = MIIF_AUTOTSLEEP;
1015 1.1 rin
1016 1.1 rin sc->mue_ec.ec_mii = mii;
1017 1.1 rin ifmedia_init(&mii->mii_media, 0, mue_ifmedia_upd, mue_ifmedia_sts);
1018 1.1 rin mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
1019 1.1 rin
1020 1.1 rin if (LIST_FIRST(&mii->mii_phys) == NULL) {
1021 1.1 rin ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
1022 1.1 rin ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
1023 1.1 rin } else
1024 1.1 rin ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
1025 1.1 rin
1026 1.1 rin /* Attach the interface. */
1027 1.1 rin if_attach(ifp);
1028 1.1 rin ether_ifattach(ifp, sc->mue_enaddr);
1029 1.1 rin
1030 1.1 rin rnd_attach_source(&sc->mue_rnd_source, device_xname(sc->mue_dev),
1031 1.1 rin RND_TYPE_NET, RND_FLAG_DEFAULT);
1032 1.1 rin
1033 1.1 rin callout_init(&sc->mue_stat_ch, 0);
1034 1.1 rin
1035 1.1 rin splx(s);
1036 1.1 rin
1037 1.1 rin usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->mue_udev, sc->mue_dev);
1038 1.1 rin }
1039 1.1 rin
1040 1.1 rin static int
1041 1.1 rin mue_detach(device_t self, int flags)
1042 1.1 rin {
1043 1.1 rin struct mue_softc *sc = device_private(self);
1044 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1045 1.1 rin size_t i;
1046 1.1 rin int s;
1047 1.1 rin
1048 1.1 rin sc->mue_dying = true;
1049 1.1 rin
1050 1.1 rin callout_halt(&sc->mue_stat_ch, NULL);
1051 1.1 rin
1052 1.1 rin for (i = 0; i < __arraycount(sc->mue_ep); i++)
1053 1.1 rin if (sc->mue_ep[i] != NULL)
1054 1.1 rin usbd_abort_pipe(sc->mue_ep[i]);
1055 1.1 rin
1056 1.1 rin /*
1057 1.1 rin * Remove any pending tasks. They cannot be executing because they run
1058 1.1 rin * in the same thread as detach.
1059 1.1 rin */
1060 1.1 rin usb_rem_task_wait(sc->mue_udev, &sc->mue_tick_task, USB_TASKQ_DRIVER,
1061 1.1 rin NULL);
1062 1.1 rin usb_rem_task_wait(sc->mue_udev, &sc->mue_stop_task, USB_TASKQ_DRIVER,
1063 1.1 rin NULL);
1064 1.1 rin
1065 1.1 rin s = splusb();
1066 1.1 rin
1067 1.1 rin if (ifp->if_flags & IFF_RUNNING)
1068 1.1 rin mue_stop(ifp, 1);
1069 1.1 rin
1070 1.1 rin rnd_detach_source(&sc->mue_rnd_source);
1071 1.1 rin mii_detach(&sc->mue_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1072 1.1 rin ifmedia_delete_instance(&sc->mue_mii.mii_media, IFM_INST_ANY);
1073 1.1 rin if (ifp->if_softc != NULL) {
1074 1.1 rin ether_ifdetach(ifp);
1075 1.1 rin if_detach(ifp);
1076 1.1 rin }
1077 1.1 rin
1078 1.1 rin if (--sc->mue_refcnt >= 0) {
1079 1.1 rin /* Wait for processes to go away. */
1080 1.1 rin usb_detach_waitold(sc->mue_dev);
1081 1.1 rin }
1082 1.1 rin splx(s);
1083 1.1 rin
1084 1.1 rin usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->mue_udev, sc->mue_dev);
1085 1.1 rin
1086 1.1 rin mutex_destroy(&sc->mue_mii_lock);
1087 1.1 rin
1088 1.1 rin return 0;
1089 1.1 rin }
1090 1.1 rin
1091 1.1 rin static int
1092 1.1 rin mue_activate(device_t self, enum devact act)
1093 1.1 rin {
1094 1.1 rin struct mue_softc *sc = device_private(self);
1095 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1096 1.1 rin
1097 1.1 rin switch (act) {
1098 1.1 rin case DVACT_DEACTIVATE:
1099 1.1 rin if_deactivate(ifp);
1100 1.1 rin sc->mue_dying = true;
1101 1.1 rin return 0;
1102 1.1 rin default:
1103 1.1 rin return EOPNOTSUPP;
1104 1.1 rin }
1105 1.1 rin return 0;
1106 1.1 rin }
1107 1.1 rin
1108 1.1 rin static int
1109 1.1 rin mue_rx_list_init(struct mue_softc *sc)
1110 1.1 rin {
1111 1.1 rin struct mue_cdata *cd;
1112 1.1 rin struct mue_chain *c;
1113 1.1 rin size_t i;
1114 1.1 rin int err;
1115 1.1 rin
1116 1.1 rin cd = &sc->mue_cdata;
1117 1.1 rin for (i = 0; i < __arraycount(cd->mue_rx_chain); i++) {
1118 1.1 rin c = &cd->mue_rx_chain[i];
1119 1.1 rin c->mue_sc = sc;
1120 1.1 rin c->mue_idx = i;
1121 1.1 rin if (c->mue_xfer == NULL) {
1122 1.1 rin err = usbd_create_xfer(sc->mue_ep[MUE_ENDPT_RX],
1123 1.1 rin sc->mue_bufsz, 0, 0, &c->mue_xfer);
1124 1.1 rin if (err)
1125 1.1 rin return err;
1126 1.1 rin c->mue_buf = usbd_get_buffer(c->mue_xfer);
1127 1.1 rin }
1128 1.1 rin }
1129 1.1 rin
1130 1.1 rin return 0;
1131 1.1 rin }
1132 1.1 rin
1133 1.1 rin static int
1134 1.1 rin mue_tx_list_init(struct mue_softc *sc)
1135 1.1 rin {
1136 1.1 rin struct mue_cdata *cd;
1137 1.1 rin struct mue_chain *c;
1138 1.1 rin size_t i;
1139 1.1 rin int err;
1140 1.1 rin
1141 1.1 rin cd = &sc->mue_cdata;
1142 1.1 rin for (i = 0; i < __arraycount(cd->mue_tx_chain); i++) {
1143 1.1 rin c = &cd->mue_tx_chain[i];
1144 1.1 rin c->mue_sc = sc;
1145 1.1 rin c->mue_idx = i;
1146 1.1 rin if (c->mue_xfer == NULL) {
1147 1.1 rin err = usbd_create_xfer(sc->mue_ep[MUE_ENDPT_TX],
1148 1.1 rin sc->mue_bufsz, USBD_FORCE_SHORT_XFER, 0,
1149 1.1 rin &c->mue_xfer);
1150 1.1 rin if (err)
1151 1.1 rin return err;
1152 1.1 rin c->mue_buf = usbd_get_buffer(c->mue_xfer);
1153 1.1 rin }
1154 1.1 rin }
1155 1.1 rin
1156 1.1 rin return 0;
1157 1.1 rin }
1158 1.1 rin
1159 1.1 rin static int
1160 1.1 rin mue_open_pipes(struct mue_softc *sc)
1161 1.1 rin {
1162 1.1 rin usbd_status err;
1163 1.1 rin
1164 1.1 rin /* Open RX and TX pipes. */
1165 1.1 rin err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_RX],
1166 1.1 rin USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_RX]);
1167 1.1 rin if (err) {
1168 1.1 rin MUE_PRINTF(sc, "rx pipe: %s\n", usbd_errstr(err));
1169 1.1 rin return EIO;
1170 1.1 rin }
1171 1.1 rin err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_TX],
1172 1.1 rin USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_TX]);
1173 1.1 rin if (err) {
1174 1.1 rin MUE_PRINTF(sc, "tx pipe: %s\n", usbd_errstr(err));
1175 1.1 rin return EIO;
1176 1.1 rin }
1177 1.1 rin return 0;
1178 1.1 rin }
1179 1.1 rin
1180 1.1 rin static void
1181 1.1 rin mue_start_rx(struct mue_softc *sc)
1182 1.1 rin {
1183 1.1 rin struct mue_chain *c;
1184 1.1 rin size_t i;
1185 1.1 rin
1186 1.1 rin /* Start up the receive pipe. */
1187 1.1 rin for (i = 0; i < __arraycount(sc->mue_cdata.mue_rx_chain); i++) {
1188 1.1 rin c = &sc->mue_cdata.mue_rx_chain[i];
1189 1.1 rin usbd_setup_xfer(c->mue_xfer, c, c->mue_buf, sc->mue_bufsz,
1190 1.1 rin USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, mue_rxeof);
1191 1.1 rin usbd_transfer(c->mue_xfer);
1192 1.1 rin }
1193 1.1 rin }
1194 1.1 rin
1195 1.1 rin static int
1196 1.1 rin mue_encap(struct mue_softc *sc, struct mbuf *m, int idx)
1197 1.1 rin {
1198 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1199 1.1 rin struct mue_chain *c;
1200 1.1 rin usbd_status err;
1201 1.1 rin struct mue_txbuf_hdr hdr;
1202 1.1 rin int len;
1203 1.1 rin
1204 1.1 rin c = &sc->mue_cdata.mue_tx_chain[idx];
1205 1.1 rin
1206 1.1 rin hdr.tx_cmd_a = htole32((m->m_pkthdr.len & MUE_TX_CMD_A_LEN_MASK) |
1207 1.1 rin MUE_TX_CMD_A_FCS);
1208 1.1 rin /* Disable segmentation offload. */
1209 1.1 rin hdr.tx_cmd_b = htole32(0);
1210 1.1 rin memcpy(c->mue_buf, &hdr, sizeof(hdr));
1211 1.1 rin len = sizeof(hdr);
1212 1.1 rin
1213 1.1 rin m_copydata(m, 0, m->m_pkthdr.len, c->mue_buf + len);
1214 1.1 rin len += m->m_pkthdr.len;
1215 1.1 rin
1216 1.1 rin usbd_setup_xfer(c->mue_xfer, c, c->mue_buf, len,
1217 1.1 rin USBD_FORCE_SHORT_XFER, 10000, mue_txeof);
1218 1.1 rin
1219 1.1 rin /* Transmit */
1220 1.1 rin err = usbd_transfer(c->mue_xfer);
1221 1.1 rin if (__predict_false(err != USBD_IN_PROGRESS)) {
1222 1.1 rin DPRINTF(sc, "%s\n", usbd_errstr(err));
1223 1.1 rin mue_stop(ifp, 0);
1224 1.1 rin return EIO;
1225 1.1 rin }
1226 1.1 rin
1227 1.1 rin sc->mue_cdata.mue_tx_cnt++;
1228 1.1 rin
1229 1.1 rin return 0;
1230 1.1 rin }
1231 1.1 rin
1232 1.1 rin static void
1233 1.1 rin mue_setmulti(struct mue_softc *sc)
1234 1.1 rin {
1235 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1236 1.1 rin const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
1237 1.1 rin struct ether_multi *enm;
1238 1.1 rin struct ether_multistep step;
1239 1.1 rin uint32_t pfiltbl[MUE_NUM_ADDR_FILTX][2];
1240 1.1 rin uint32_t hashtbl[MUE_DP_SEL_VHF_HASH_LEN];
1241 1.1 rin uint32_t reg, rxfilt, h, hireg, loreg;
1242 1.1 rin int i;
1243 1.1 rin
1244 1.1 rin if (sc->mue_dying)
1245 1.1 rin return;
1246 1.1 rin
1247 1.1 rin /* Clear perfect filter and hash tables. */
1248 1.1 rin memset(pfiltbl, 0, sizeof(pfiltbl));
1249 1.1 rin memset(hashtbl, 0, sizeof(hashtbl));
1250 1.1 rin
1251 1.1 rin reg = (sc->mue_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
1252 1.1 rin rxfilt = mue_csr_read(sc, reg);
1253 1.1 rin rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH |
1254 1.1 rin MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST);
1255 1.1 rin
1256 1.1 rin /* Always accept broadcast frames. */
1257 1.1 rin rxfilt |= MUE_RFE_CTL_BROADCAST;
1258 1.1 rin
1259 1.1 rin if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
1260 1.1 rin allmulti: rxfilt |= MUE_RFE_CTL_MULTICAST;
1261 1.1 rin if (ifp->if_flags & IFF_PROMISC) {
1262 1.1 rin rxfilt |= MUE_RFE_CTL_UNICAST;
1263 1.1 rin DPRINTF(sc, "promisc\n");
1264 1.1 rin } else {
1265 1.1 rin DPRINTF(sc, "allmulti\n");
1266 1.1 rin }
1267 1.1 rin } else {
1268 1.1 rin /* Now program new ones. */
1269 1.1 rin pfiltbl[0][0] = MUE_ENADDR_HI(enaddr) | MUE_ADDR_FILTX_VALID;
1270 1.1 rin pfiltbl[0][1] = MUE_ENADDR_LO(enaddr);
1271 1.1 rin i = 1;
1272 1.1 rin ETHER_FIRST_MULTI(step, &sc->mue_ec, enm);
1273 1.1 rin while (enm != NULL) {
1274 1.1 rin if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
1275 1.1 rin ETHER_ADDR_LEN)) {
1276 1.1 rin memset(pfiltbl, 0, sizeof(pfiltbl));
1277 1.1 rin memset(hashtbl, 0, sizeof(hashtbl));
1278 1.1 rin rxfilt &= ~MUE_RFE_CTL_MULTICAST_HASH;
1279 1.1 rin goto allmulti;
1280 1.1 rin }
1281 1.1 rin if (i < MUE_NUM_ADDR_FILTX) {
1282 1.1 rin /* Use perfect address table if possible. */
1283 1.1 rin pfiltbl[i][0] = MUE_ENADDR_HI(enm->enm_addrlo) |
1284 1.1 rin MUE_ADDR_FILTX_VALID;
1285 1.1 rin pfiltbl[i][1] = MUE_ENADDR_LO(enm->enm_addrlo);
1286 1.1 rin } else {
1287 1.1 rin /* Otherwise, use hash table. */
1288 1.1 rin rxfilt |= MUE_RFE_CTL_MULTICAST_HASH;
1289 1.1 rin h = (ether_crc32_be(enm->enm_addrlo,
1290 1.1 rin ETHER_ADDR_LEN) >> 23) & 0x1ff;
1291 1.1 rin hashtbl[h / 32] |= 1 << (h % 32);
1292 1.1 rin }
1293 1.1 rin i++;
1294 1.1 rin ETHER_NEXT_MULTI(step, enm);
1295 1.1 rin }
1296 1.1 rin rxfilt |= MUE_RFE_CTL_PERFECT;
1297 1.1 rin if (rxfilt & MUE_RFE_CTL_MULTICAST_HASH) {
1298 1.1 rin DPRINTF(sc, "perfect filter and hash tables\n");
1299 1.1 rin } else {
1300 1.1 rin DPRINTF(sc, "perfect filter\n");
1301 1.1 rin }
1302 1.1 rin }
1303 1.1 rin
1304 1.1 rin for (i = 0; i < MUE_NUM_ADDR_FILTX; i++) {
1305 1.1 rin hireg = (sc->mue_flags & LAN7500) ?
1306 1.1 rin MUE_7500_ADDR_FILTX(i) : MUE_7800_ADDR_FILTX(i);
1307 1.1 rin loreg = hireg + 4;
1308 1.1 rin mue_csr_write(sc, hireg, 0);
1309 1.1 rin mue_csr_write(sc, loreg, pfiltbl[i][1]);
1310 1.1 rin mue_csr_write(sc, hireg, pfiltbl[i][0]);
1311 1.1 rin }
1312 1.1 rin
1313 1.1 rin mue_dataport_write(sc, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN,
1314 1.1 rin MUE_DP_SEL_VHF_HASH_LEN, hashtbl);
1315 1.1 rin
1316 1.1 rin mue_csr_write(sc, reg, rxfilt);
1317 1.1 rin }
1318 1.1 rin
1319 1.1 rin static void
1320 1.1 rin mue_sethwcsum(struct mue_softc *sc)
1321 1.1 rin {
1322 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1323 1.1 rin uint32_t reg, val;
1324 1.1 rin
1325 1.1 rin reg = (sc->mue_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
1326 1.1 rin val = mue_csr_read(sc, reg);
1327 1.1 rin
1328 1.2 rin if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx)) {
1329 1.1 rin DPRINTF(sc, "enabled\n");;
1330 1.1 rin val |= MUE_RFE_CTL_IGMP_COE | MUE_RFE_CTL_ICMP_COE;
1331 1.1 rin val |= MUE_RFE_CTL_TCPUDP_COE | MUE_RFE_CTL_IP_COE;
1332 1.1 rin } else {
1333 1.1 rin DPRINTF(sc, "disabled\n");;
1334 1.1 rin val &=
1335 1.1 rin ~(MUE_RFE_CTL_IGMP_COE | MUE_RFE_CTL_ICMP_COE);
1336 1.1 rin val &=
1337 1.1 rin ~(MUE_RFE_CTL_TCPUDP_COE | MUE_RFE_CTL_IP_COE);
1338 1.1 rin }
1339 1.1 rin
1340 1.1 rin val &= ~MUE_RFE_CTL_VLAN_FILTER;
1341 1.1 rin
1342 1.1 rin mue_csr_write(sc, reg, val);
1343 1.1 rin }
1344 1.1 rin
1345 1.1 rin
1346 1.1 rin static void
1347 1.1 rin mue_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1348 1.1 rin {
1349 1.1 rin struct mue_chain *c = (struct mue_chain *)priv;
1350 1.1 rin struct mue_softc *sc = c->mue_sc;
1351 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1352 1.1 rin struct mbuf *m;
1353 1.1 rin struct mue_rxbuf_hdr *hdrp;
1354 1.1 rin uint32_t rx_cmd_a, total_len;
1355 1.1 rin uint16_t pktlen;
1356 1.1 rin int s;
1357 1.1 rin char *buf = c->mue_buf;
1358 1.1 rin
1359 1.1 rin if (__predict_false(sc->mue_dying)) {
1360 1.1 rin DPRINTF(sc, "dying\n");
1361 1.1 rin return;
1362 1.1 rin }
1363 1.1 rin
1364 1.1 rin if (__predict_false(!(ifp->if_flags & IFF_RUNNING))) {
1365 1.1 rin DPRINTF(sc, "not running\n");
1366 1.1 rin return;
1367 1.1 rin }
1368 1.1 rin
1369 1.1 rin if (__predict_false(status != USBD_NORMAL_COMPLETION)) {
1370 1.1 rin DPRINTF(sc, "%s\n", usbd_errstr(status));
1371 1.1 rin if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
1372 1.1 rin return;
1373 1.1 rin if (usbd_ratecheck(&sc->mue_rx_notice))
1374 1.1 rin MUE_PRINTF(sc, "%s\n", usbd_errstr(status));
1375 1.1 rin if (status == USBD_STALLED)
1376 1.1 rin usbd_clear_endpoint_stall_async(
1377 1.1 rin sc->mue_ep[MUE_ENDPT_RX]);
1378 1.1 rin goto done;
1379 1.1 rin }
1380 1.1 rin
1381 1.1 rin usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
1382 1.1 rin
1383 1.1 rin if (__predict_false(total_len > sc->mue_bufsz)) {
1384 1.1 rin DPRINTF(sc, "too large transfer\n");
1385 1.1 rin goto done;
1386 1.1 rin }
1387 1.1 rin
1388 1.1 rin do {
1389 1.1 rin if (__predict_false(total_len < sizeof(*hdrp))) {
1390 1.1 rin DPRINTF(sc, "too short transfer\n");
1391 1.1 rin ifp->if_ierrors++;
1392 1.1 rin goto done;
1393 1.1 rin }
1394 1.1 rin
1395 1.1 rin hdrp = (struct mue_rxbuf_hdr *)buf;
1396 1.1 rin rx_cmd_a = le32toh(hdrp->rx_cmd_a);
1397 1.1 rin
1398 1.1 rin if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_RED)) {
1399 1.1 rin DPRINTF(sc, "rx_cmd_a: 0x%x\n", rx_cmd_a);
1400 1.1 rin ifp->if_ierrors++;
1401 1.1 rin goto done;
1402 1.1 rin }
1403 1.1 rin
1404 1.1 rin /* XXX not yet */
1405 1.1 rin KASSERT((rx_cmd_a & MUE_RX_CMD_A_ICSM) == 0);
1406 1.1 rin
1407 1.1 rin pktlen = (uint16_t)(rx_cmd_a & MUE_RX_CMD_A_LEN_MASK);
1408 1.1 rin if (sc->mue_flags & LAN7500)
1409 1.1 rin pktlen -= 2;
1410 1.1 rin
1411 1.1 rin if (__predict_false(pktlen < ETHER_HDR_LEN ||
1412 1.1 rin pktlen > MCLBYTES - ETHER_ALIGN ||
1413 1.1 rin pktlen + sizeof(*hdrp) > total_len)) {
1414 1.1 rin DPRINTF(sc, "bad pktlen\n");
1415 1.1 rin ifp->if_ierrors++;
1416 1.1 rin goto done;
1417 1.1 rin }
1418 1.1 rin
1419 1.1 rin m = mue_newbuf();
1420 1.1 rin if (__predict_false(m == NULL)) {
1421 1.1 rin DPRINTF(sc, "mbuf allocation failed\n");
1422 1.1 rin ifp->if_ierrors++;
1423 1.1 rin goto done;
1424 1.1 rin }
1425 1.1 rin
1426 1.1 rin m_set_rcvif(m, ifp);
1427 1.1 rin m->m_pkthdr.len = m->m_len = pktlen;
1428 1.1 rin m->m_flags |= M_HASFCS;
1429 1.1 rin memcpy(mtod(m, char *), buf + sizeof(*hdrp), pktlen);
1430 1.1 rin
1431 1.1 rin /* Attention: sizeof(hdr) = 10 */
1432 1.1 rin pktlen = roundup(pktlen + sizeof(*hdrp), 4);
1433 1.1 rin if (pktlen > total_len)
1434 1.1 rin pktlen = total_len;
1435 1.1 rin total_len -= pktlen;
1436 1.1 rin buf += pktlen;
1437 1.1 rin
1438 1.1 rin s = splnet();
1439 1.1 rin if_percpuq_enqueue(ifp->if_percpuq, m);
1440 1.1 rin splx(s);
1441 1.1 rin } while (total_len > 0);
1442 1.1 rin
1443 1.1 rin done:
1444 1.1 rin /* Setup new transfer. */
1445 1.1 rin usbd_setup_xfer(xfer, c, c->mue_buf, sc->mue_bufsz,
1446 1.1 rin USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, mue_rxeof);
1447 1.1 rin usbd_transfer(xfer);
1448 1.1 rin }
1449 1.1 rin
1450 1.1 rin static void
1451 1.1 rin mue_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1452 1.1 rin {
1453 1.1 rin struct mue_chain *c = priv;
1454 1.1 rin struct mue_softc *sc = c->mue_sc;
1455 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1456 1.1 rin int s;
1457 1.1 rin
1458 1.1 rin if (__predict_false(sc->mue_dying))
1459 1.1 rin return;
1460 1.1 rin
1461 1.1 rin s = splnet();
1462 1.1 rin
1463 1.1 rin
1464 1.1 rin if (__predict_false(status != USBD_NORMAL_COMPLETION)) {
1465 1.1 rin if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
1466 1.1 rin splx(s);
1467 1.1 rin return;
1468 1.1 rin }
1469 1.1 rin ifp->if_oerrors++;
1470 1.1 rin MUE_PRINTF(sc, "%s\n", usbd_errstr(status));
1471 1.1 rin if (status == USBD_STALLED)
1472 1.1 rin usbd_clear_endpoint_stall_async(
1473 1.1 rin sc->mue_ep[MUE_ENDPT_TX]);
1474 1.1 rin splx(s);
1475 1.1 rin return;
1476 1.1 rin }
1477 1.1 rin
1478 1.1 rin ifp->if_timer = 0;
1479 1.1 rin ifp->if_flags &= ~IFF_OACTIVE;
1480 1.1 rin
1481 1.1 rin if (!IFQ_IS_EMPTY(&ifp->if_snd))
1482 1.1 rin mue_start(ifp);
1483 1.1 rin
1484 1.1 rin ifp->if_opackets++;
1485 1.1 rin splx(s);
1486 1.1 rin }
1487 1.1 rin
1488 1.1 rin static int
1489 1.1 rin mue_init(struct ifnet *ifp)
1490 1.1 rin {
1491 1.1 rin struct mue_softc *sc = ifp->if_softc;
1492 1.1 rin int s;
1493 1.1 rin
1494 1.1 rin if (sc->mue_dying) {
1495 1.1 rin DPRINTF(sc, "dying\n");
1496 1.1 rin return EIO;
1497 1.1 rin }
1498 1.1 rin
1499 1.1 rin s = splnet();
1500 1.1 rin
1501 1.1 rin /* Cancel pending I/O and free all TX/RX buffers. */
1502 1.1 rin if (ifp->if_flags & IFF_RUNNING)
1503 1.1 rin mue_stop(ifp, 1);
1504 1.1 rin
1505 1.1 rin mue_reset(sc);
1506 1.1 rin
1507 1.1 rin /* Set MAC address. */
1508 1.1 rin mue_set_macaddr(sc);
1509 1.1 rin
1510 1.1 rin /* Load the multicast filter. */
1511 1.1 rin mue_setmulti(sc);
1512 1.1 rin
1513 1.1 rin /* TCP/UDP checksum offload engines. */
1514 1.1 rin mue_sethwcsum(sc);
1515 1.1 rin
1516 1.1 rin if (mue_open_pipes(sc)) {
1517 1.1 rin splx(s);
1518 1.1 rin return EIO;
1519 1.1 rin }
1520 1.1 rin
1521 1.1 rin /* Init RX ring. */
1522 1.1 rin if (mue_rx_list_init(sc)) {
1523 1.1 rin MUE_PRINTF(sc, "rx list init failed\n");
1524 1.1 rin splx(s);
1525 1.1 rin return ENOBUFS;
1526 1.1 rin }
1527 1.1 rin
1528 1.1 rin /* Init TX ring. */
1529 1.1 rin if (mue_tx_list_init(sc)) {
1530 1.1 rin MUE_PRINTF(sc, "tx list init failed\n");
1531 1.1 rin splx(s);
1532 1.1 rin return ENOBUFS;
1533 1.1 rin }
1534 1.1 rin
1535 1.1 rin mue_start_rx(sc);
1536 1.1 rin
1537 1.1 rin ifp->if_flags |= IFF_RUNNING;
1538 1.1 rin ifp->if_flags &= ~IFF_OACTIVE;
1539 1.1 rin
1540 1.1 rin splx(s);
1541 1.1 rin
1542 1.1 rin callout_reset(&sc->mue_stat_ch, hz, mue_tick, sc);
1543 1.1 rin
1544 1.1 rin return 0;
1545 1.1 rin }
1546 1.1 rin
1547 1.1 rin static int
1548 1.1 rin mue_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1549 1.1 rin {
1550 1.1 rin struct mue_softc *sc = ifp->if_softc;
1551 1.1 rin struct ifreq /*const*/ *ifr = data;
1552 1.1 rin int s, error = 0;
1553 1.1 rin
1554 1.1 rin s = splnet();
1555 1.1 rin
1556 1.1 rin switch(cmd) {
1557 1.1 rin case SIOCSIFFLAGS:
1558 1.1 rin if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1559 1.1 rin break;
1560 1.1 rin
1561 1.1 rin switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
1562 1.1 rin case IFF_RUNNING:
1563 1.1 rin mue_stop(ifp, 1);
1564 1.1 rin break;
1565 1.1 rin case IFF_UP:
1566 1.1 rin mue_init(ifp);
1567 1.1 rin break;
1568 1.1 rin case IFF_UP | IFF_RUNNING:
1569 1.1 rin if ((ifp->if_flags ^ sc->mue_if_flags) == IFF_PROMISC)
1570 1.1 rin mue_setmulti(sc);
1571 1.1 rin else
1572 1.1 rin mue_init(ifp);
1573 1.1 rin break;
1574 1.1 rin }
1575 1.1 rin sc->mue_if_flags = ifp->if_flags;
1576 1.1 rin break;
1577 1.1 rin case SIOCGIFMEDIA:
1578 1.1 rin case SIOCSIFMEDIA:
1579 1.1 rin error = ifmedia_ioctl(ifp, ifr, &sc->mue_mii.mii_media, cmd);
1580 1.1 rin break;
1581 1.1 rin default:
1582 1.1 rin if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET)
1583 1.1 rin break;
1584 1.1 rin error = 0;
1585 1.1 rin if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI)
1586 1.1 rin mue_setmulti(sc);
1587 1.1 rin break;
1588 1.1 rin }
1589 1.1 rin splx(s);
1590 1.1 rin
1591 1.1 rin return error;
1592 1.1 rin }
1593 1.1 rin
1594 1.1 rin static void
1595 1.1 rin mue_watchdog(struct ifnet *ifp)
1596 1.1 rin {
1597 1.1 rin struct mue_softc *sc = ifp->if_softc;
1598 1.1 rin struct mue_chain *c;
1599 1.1 rin usbd_status stat;
1600 1.1 rin int s;
1601 1.1 rin
1602 1.1 rin ifp->if_oerrors++;
1603 1.1 rin MUE_PRINTF(sc, "timed out\n");
1604 1.1 rin
1605 1.1 rin s = splusb();
1606 1.1 rin c = &sc->mue_cdata.mue_tx_chain[0];
1607 1.1 rin usbd_get_xfer_status(c->mue_xfer, NULL, NULL, NULL, &stat);
1608 1.1 rin mue_txeof(c->mue_xfer, c, stat);
1609 1.1 rin
1610 1.1 rin if (!IFQ_IS_EMPTY(&ifp->if_snd))
1611 1.1 rin mue_start(ifp);
1612 1.1 rin splx(s);
1613 1.1 rin }
1614 1.1 rin
1615 1.1 rin static void
1616 1.1 rin mue_reset(struct mue_softc *sc)
1617 1.1 rin {
1618 1.1 rin if (sc->mue_dying)
1619 1.1 rin return;
1620 1.1 rin
1621 1.1 rin /* Wait a little while for the chip to get its brains in order. */
1622 1.1 rin usbd_delay_ms(sc->mue_udev, 1);
1623 1.1 rin
1624 1.1 rin // mue_chip_init(sc); /* XXX */
1625 1.1 rin }
1626 1.1 rin
1627 1.1 rin static void
1628 1.1 rin mue_start(struct ifnet *ifp)
1629 1.1 rin {
1630 1.1 rin struct mue_softc *sc = ifp->if_softc;
1631 1.1 rin struct mbuf *m;
1632 1.1 rin
1633 1.1 rin if (__predict_false(!sc->mue_link)) {
1634 1.1 rin DPRINTF(sc, "no link\n");
1635 1.1 rin return;
1636 1.1 rin }
1637 1.1 rin
1638 1.1 rin if (__predict_false((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING))
1639 1.1 rin != IFF_RUNNING)) {
1640 1.1 rin DPRINTF(sc, "not ready\n");
1641 1.1 rin return;
1642 1.1 rin }
1643 1.1 rin
1644 1.1 rin IFQ_POLL(&ifp->if_snd, m);
1645 1.1 rin if (m == NULL)
1646 1.1 rin return;
1647 1.1 rin
1648 1.1 rin if (__predict_false(mue_encap(sc, m, 0))) {
1649 1.1 rin DPRINTF(sc, "encap failed\n");
1650 1.1 rin ifp->if_flags |= IFF_OACTIVE;
1651 1.1 rin return;
1652 1.1 rin }
1653 1.1 rin IFQ_DEQUEUE(&ifp->if_snd, m);
1654 1.1 rin
1655 1.1 rin bpf_mtap(ifp, m, BPF_D_OUT);
1656 1.1 rin m_freem(m);
1657 1.1 rin
1658 1.1 rin ifp->if_flags |= IFF_OACTIVE;
1659 1.1 rin
1660 1.1 rin /* Set a timeout in case the chip goes out to lunch. */
1661 1.1 rin ifp->if_timer = 5;
1662 1.1 rin }
1663 1.1 rin
1664 1.1 rin static void
1665 1.1 rin mue_stop(struct ifnet *ifp, int disable __unused)
1666 1.1 rin {
1667 1.1 rin struct mue_softc *sc = ifp->if_softc;
1668 1.1 rin usbd_status err;
1669 1.1 rin size_t i;
1670 1.1 rin
1671 1.1 rin mue_reset(sc);
1672 1.1 rin
1673 1.1 rin ifp->if_timer = 0;
1674 1.1 rin ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1675 1.1 rin
1676 1.1 rin callout_stop(&sc->mue_stat_ch);
1677 1.1 rin
1678 1.1 rin /* Stop transfers. */
1679 1.1 rin for (i = 0; i < __arraycount(sc->mue_ep); i++)
1680 1.1 rin if (sc->mue_ep[i] != NULL) {
1681 1.1 rin err = usbd_abort_pipe(sc->mue_ep[i]);
1682 1.1 rin if (err)
1683 1.1 rin MUE_PRINTF(sc, "abort pipe %zu: %s\n",
1684 1.1 rin i, usbd_errstr(err));
1685 1.1 rin }
1686 1.1 rin
1687 1.1 rin /* Free RX resources. */
1688 1.1 rin for (i = 0; i < __arraycount(sc->mue_cdata.mue_rx_chain); i++)
1689 1.1 rin if (sc->mue_cdata.mue_rx_chain[i].mue_xfer != NULL) {
1690 1.1 rin usbd_destroy_xfer(
1691 1.1 rin sc->mue_cdata.mue_rx_chain[i].mue_xfer);
1692 1.1 rin sc->mue_cdata.mue_rx_chain[i].mue_xfer = NULL;
1693 1.1 rin }
1694 1.1 rin
1695 1.1 rin /* Free TX resources. */
1696 1.1 rin for (i = 0; i < __arraycount(sc->mue_cdata.mue_tx_chain); i++)
1697 1.1 rin if (sc->mue_cdata.mue_tx_chain[i].mue_xfer != NULL) {
1698 1.1 rin usbd_destroy_xfer(
1699 1.1 rin sc->mue_cdata.mue_tx_chain[i].mue_xfer);
1700 1.1 rin sc->mue_cdata.mue_tx_chain[i].mue_xfer = NULL;
1701 1.1 rin }
1702 1.1 rin
1703 1.1 rin /* Close pipes */
1704 1.1 rin for (i = 0; i < __arraycount(sc->mue_ep); i++)
1705 1.1 rin if (sc->mue_ep[i] != NULL) {
1706 1.1 rin err = usbd_close_pipe(sc->mue_ep[i]);
1707 1.1 rin if (err)
1708 1.1 rin MUE_PRINTF(sc, "close pipe %zu: %s\n",
1709 1.1 rin i, usbd_errstr(err));
1710 1.1 rin sc->mue_ep[i] = NULL;
1711 1.1 rin }
1712 1.1 rin
1713 1.1 rin sc->mue_link = 0; /* XXX */
1714 1.1 rin
1715 1.1 rin DPRINTF(sc, "done\n");
1716 1.1 rin }
1717 1.1 rin
1718 1.1 rin static void
1719 1.1 rin mue_tick(void *xsc)
1720 1.1 rin {
1721 1.1 rin struct mue_softc *sc = xsc;
1722 1.1 rin
1723 1.1 rin if (sc == NULL)
1724 1.1 rin return;
1725 1.1 rin
1726 1.1 rin if (sc->mue_dying)
1727 1.1 rin return;
1728 1.1 rin
1729 1.1 rin /* Perform periodic stuff in process context. */
1730 1.1 rin usb_add_task(sc->mue_udev, &sc->mue_tick_task, USB_TASKQ_DRIVER);
1731 1.1 rin }
1732 1.1 rin
1733 1.1 rin static void
1734 1.1 rin mue_tick_task(void *xsc)
1735 1.1 rin {
1736 1.1 rin struct mue_softc *sc = xsc;
1737 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1738 1.1 rin struct mii_data *mii = GET_MII(sc);
1739 1.1 rin int s;
1740 1.1 rin
1741 1.1 rin if (sc == NULL)
1742 1.1 rin return;
1743 1.1 rin
1744 1.1 rin if (sc->mue_dying)
1745 1.1 rin return;
1746 1.1 rin
1747 1.1 rin s = splnet();
1748 1.1 rin mii_tick(mii);
1749 1.1 rin if (sc->mue_link == 0)
1750 1.1 rin mue_miibus_statchg(ifp);
1751 1.1 rin callout_reset(&sc->mue_stat_ch, hz, mue_tick, sc);
1752 1.1 rin splx(s);
1753 1.1 rin }
1754 1.1 rin
1755 1.1 rin static struct mbuf *
1756 1.1 rin mue_newbuf(void)
1757 1.1 rin {
1758 1.1 rin struct mbuf *m;
1759 1.1 rin
1760 1.1 rin MGETHDR(m, M_DONTWAIT, MT_DATA);
1761 1.1 rin if (__predict_false(m == NULL))
1762 1.1 rin return NULL;
1763 1.1 rin
1764 1.1 rin MCLGET(m, M_DONTWAIT);
1765 1.1 rin if (__predict_false(!(m->m_flags & M_EXT))) {
1766 1.1 rin m_freem(m);
1767 1.1 rin return NULL;
1768 1.1 rin }
1769 1.1 rin
1770 1.1 rin m_adj(m, ETHER_ALIGN);
1771 1.1 rin
1772 1.1 rin return m;
1773 1.1 rin }
1774