if_mue.c revision 1.9 1 1.9 rin /* $NetBSD: if_mue.c,v 1.9 2018/09/16 01:07:38 rin Exp $ */
2 1.1 rin /* $OpenBSD: if_mue.c,v 1.3 2018/08/04 16:42:46 jsg Exp $ */
3 1.1 rin
4 1.1 rin /*
5 1.1 rin * Copyright (c) 2018 Kevin Lo <kevlo (at) openbsd.org>
6 1.1 rin *
7 1.1 rin * Permission to use, copy, modify, and distribute this software for any
8 1.1 rin * purpose with or without fee is hereby granted, provided that the above
9 1.1 rin * copyright notice and this permission notice appear in all copies.
10 1.1 rin *
11 1.1 rin * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 rin * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 rin * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 rin * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 rin * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 rin * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 rin * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 rin */
19 1.1 rin
20 1.1 rin /* Driver for Microchip LAN7500/LAN7800 chipsets. */
21 1.1 rin
22 1.1 rin #include <sys/cdefs.h>
23 1.9 rin __KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.9 2018/09/16 01:07:38 rin Exp $");
24 1.1 rin
25 1.1 rin #ifdef _KERNEL_OPT
26 1.1 rin #include "opt_usb.h"
27 1.1 rin #include "opt_inet.h"
28 1.1 rin #endif
29 1.1 rin
30 1.1 rin #include <sys/param.h>
31 1.1 rin #include <sys/cprng.h>
32 1.1 rin #include <sys/bus.h>
33 1.1 rin #include <sys/systm.h>
34 1.1 rin #include <sys/sockio.h>
35 1.1 rin #include <sys/mbuf.h>
36 1.1 rin #include <sys/mutex.h>
37 1.1 rin #include <sys/kernel.h>
38 1.1 rin #include <sys/proc.h>
39 1.1 rin #include <sys/socket.h>
40 1.1 rin
41 1.1 rin #include <sys/device.h>
42 1.1 rin
43 1.1 rin #include <sys/rndsource.h>
44 1.1 rin
45 1.1 rin #include <net/if.h>
46 1.1 rin #include <net/if_dl.h>
47 1.1 rin #include <net/if_media.h>
48 1.1 rin #include <net/if_ether.h>
49 1.1 rin
50 1.1 rin #include <net/bpf.h>
51 1.1 rin
52 1.3 rin #include <netinet/if_inarp.h>
53 1.1 rin #include <netinet/in.h>
54 1.3 rin #include <netinet/ip.h> /* XXX for struct ip */
55 1.3 rin #include <netinet/ip6.h> /* XXX for struct ip6_hdr */
56 1.3 rin #include <netinet/tcp.h> /* XXX for struct tcphdr */
57 1.1 rin
58 1.1 rin #include <dev/mii/mii.h>
59 1.1 rin #include <dev/mii/miivar.h>
60 1.1 rin
61 1.1 rin #include <dev/usb/usb.h>
62 1.1 rin #include <dev/usb/usbdi.h>
63 1.1 rin #include <dev/usb/usbdi_util.h>
64 1.1 rin #include <dev/usb/usbdivar.h>
65 1.1 rin #include <dev/usb/usbdevs.h>
66 1.1 rin
67 1.1 rin #include <dev/usb/if_muereg.h>
68 1.1 rin #include <dev/usb/if_muevar.h>
69 1.1 rin
70 1.1 rin #define MUE_PRINTF(sc, fmt, args...) \
71 1.1 rin device_printf((sc)->mue_dev, "%s: " fmt, __func__, ##args);
72 1.1 rin
73 1.1 rin #ifdef USB_DEBUG
74 1.1 rin int muedebug = 0;
75 1.1 rin #define DPRINTF(sc, fmt, args...) \
76 1.1 rin do { \
77 1.1 rin if (muedebug) \
78 1.1 rin MUE_PRINTF(sc, fmt, ##args); \
79 1.1 rin } while (0 /* CONSTCOND */)
80 1.1 rin #else
81 1.1 rin #define DPRINTF(sc, fmt, args...) /* nothing */
82 1.1 rin #endif
83 1.1 rin
84 1.1 rin /*
85 1.1 rin * Various supported device vendors/products.
86 1.1 rin */
87 1.1 rin struct mue_type {
88 1.1 rin struct usb_devno mue_dev;
89 1.1 rin uint16_t mue_flags;
90 1.1 rin #define LAN7500 0x0001 /* LAN7500 */
91 1.1 rin };
92 1.1 rin
93 1.1 rin const struct mue_type mue_devs[] = {
94 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7500 }, LAN7500 },
95 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7505 }, LAN7500 },
96 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7800 }, 0 },
97 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7801 }, 0 },
98 1.1 rin { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7850 }, 0 }
99 1.1 rin };
100 1.1 rin
101 1.1 rin #define MUE_LOOKUP(uaa) ((const struct mue_type *)usb_lookup(mue_devs, \
102 1.1 rin uaa->uaa_vendor, uaa->uaa_product))
103 1.1 rin
104 1.1 rin #define MUE_ENADDR_LO(enaddr) \
105 1.1 rin ((enaddr[3] << 24) | (enaddr[2] << 16) | (enaddr[1] << 8) | enaddr[0])
106 1.1 rin #define MUE_ENADDR_HI(enaddr) \
107 1.1 rin ((enaddr[5] << 8) | enaddr[4])
108 1.1 rin
109 1.1 rin static int mue_match(device_t, cfdata_t, void *);
110 1.1 rin static void mue_attach(device_t, device_t, void *);
111 1.1 rin static int mue_detach(device_t, int);
112 1.1 rin static int mue_activate(device_t, enum devact);
113 1.1 rin
114 1.1 rin static uint32_t mue_csr_read(struct mue_softc *, uint32_t);
115 1.1 rin static int mue_csr_write(struct mue_softc *, uint32_t, uint32_t);
116 1.1 rin static int mue_wait_for_bits(struct mue_softc *sc, uint32_t, uint32_t,
117 1.1 rin uint32_t, uint32_t);
118 1.1 rin
119 1.1 rin static void mue_lock_mii(struct mue_softc *);
120 1.1 rin static void mue_unlock_mii(struct mue_softc *);
121 1.1 rin
122 1.1 rin static int mue_miibus_readreg(device_t, int, int);
123 1.1 rin static void mue_miibus_writereg(device_t, int, int, int);
124 1.1 rin static void mue_miibus_statchg(struct ifnet *);
125 1.1 rin static int mue_ifmedia_upd(struct ifnet *);
126 1.1 rin static void mue_ifmedia_sts(struct ifnet *, struct ifmediareq *);
127 1.1 rin
128 1.1 rin static uint8_t mue_eeprom_getbyte(struct mue_softc *, int, uint8_t *);
129 1.1 rin static int mue_read_eeprom(struct mue_softc *, uint8_t *, int, int);
130 1.1 rin static bool mue_eeprom_present(struct mue_softc *sc);
131 1.1 rin
132 1.1 rin static int mue_read_otp_raw(struct mue_softc *, uint8_t *, int, int);
133 1.1 rin static int mue_read_otp(struct mue_softc *, uint8_t *, int, int);
134 1.1 rin
135 1.1 rin static void mue_dataport_write(struct mue_softc *, uint32_t, uint32_t,
136 1.1 rin uint32_t, uint32_t *);
137 1.1 rin
138 1.1 rin static void mue_init_ltm(struct mue_softc *);
139 1.1 rin
140 1.1 rin static int mue_chip_init(struct mue_softc *);
141 1.1 rin
142 1.1 rin static void mue_set_macaddr(struct mue_softc *);
143 1.1 rin static int mue_get_macaddr(struct mue_softc *, prop_dictionary_t);
144 1.1 rin
145 1.1 rin static int mue_rx_list_init(struct mue_softc *);
146 1.1 rin static int mue_tx_list_init(struct mue_softc *);
147 1.1 rin static int mue_open_pipes(struct mue_softc *);
148 1.1 rin static void mue_start_rx(struct mue_softc *);
149 1.1 rin
150 1.1 rin static int mue_encap(struct mue_softc *, struct mbuf *, int);
151 1.3 rin static void mue_tx_offload(struct mue_softc *, struct mbuf *);
152 1.1 rin
153 1.1 rin static void mue_setmulti(struct mue_softc *);
154 1.1 rin static void mue_sethwcsum(struct mue_softc *);
155 1.1 rin
156 1.1 rin static void mue_rxeof(struct usbd_xfer *, void *, usbd_status);
157 1.1 rin static void mue_txeof(struct usbd_xfer *, void *, usbd_status);
158 1.1 rin
159 1.1 rin static int mue_init(struct ifnet *);
160 1.1 rin static int mue_ioctl(struct ifnet *, u_long, void *);
161 1.1 rin static void mue_watchdog(struct ifnet *);
162 1.1 rin static void mue_reset(struct mue_softc *);
163 1.1 rin static void mue_start(struct ifnet *);
164 1.1 rin static void mue_stop(struct ifnet *, int);
165 1.1 rin static void mue_tick(void *);
166 1.1 rin static void mue_tick_task(void *);
167 1.1 rin
168 1.1 rin static struct mbuf *mue_newbuf(void);
169 1.1 rin
170 1.1 rin #define MUE_SETBIT(sc, reg, x) \
171 1.1 rin mue_csr_write(sc, reg, mue_csr_read(sc, reg) | (x))
172 1.1 rin
173 1.1 rin #define MUE_CLRBIT(sc, reg, x) \
174 1.1 rin mue_csr_write(sc, reg, mue_csr_read(sc, reg) & ~(x))
175 1.1 rin
176 1.1 rin #define MUE_WAIT_SET(sc, reg, set, fail) \
177 1.1 rin mue_wait_for_bits(sc, reg, set, ~0, fail)
178 1.1 rin
179 1.1 rin #define MUE_WAIT_CLR(sc, reg, clear, fail) \
180 1.1 rin mue_wait_for_bits(sc, reg, 0, clear, fail)
181 1.1 rin
182 1.1 rin #define ETHER_IS_VALID(addr) \
183 1.1 rin (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
184 1.1 rin
185 1.1 rin #define ETHER_IS_ZERO(addr) \
186 1.1 rin (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
187 1.1 rin
188 1.1 rin #define ETHER_ALIGN 2
189 1.1 rin
190 1.1 rin CFATTACH_DECL_NEW(mue, sizeof(struct mue_softc), mue_match, mue_attach,
191 1.1 rin mue_detach, mue_activate);
192 1.1 rin
193 1.1 rin static uint32_t
194 1.1 rin mue_csr_read(struct mue_softc *sc, uint32_t reg)
195 1.1 rin {
196 1.1 rin usb_device_request_t req;
197 1.1 rin usbd_status err;
198 1.1 rin uDWord val;
199 1.1 rin
200 1.1 rin if (sc->mue_dying)
201 1.1 rin return 0;
202 1.1 rin
203 1.1 rin USETDW(val, 0);
204 1.1 rin req.bmRequestType = UT_READ_VENDOR_DEVICE;
205 1.1 rin req.bRequest = MUE_UR_READREG;
206 1.1 rin USETW(req.wValue, 0);
207 1.1 rin USETW(req.wIndex, reg);
208 1.1 rin USETW(req.wLength, 4);
209 1.1 rin
210 1.1 rin err = usbd_do_request(sc->mue_udev, &req, &val);
211 1.1 rin if (err) {
212 1.1 rin MUE_PRINTF(sc, "reg = 0x%x: %s\n", reg, usbd_errstr(err));
213 1.1 rin return 0;
214 1.1 rin }
215 1.1 rin
216 1.1 rin return UGETDW(val);
217 1.1 rin }
218 1.1 rin
219 1.1 rin static int
220 1.1 rin mue_csr_write(struct mue_softc *sc, uint32_t reg, uint32_t aval)
221 1.1 rin {
222 1.1 rin usb_device_request_t req;
223 1.1 rin usbd_status err;
224 1.1 rin uDWord val;
225 1.1 rin
226 1.1 rin if (sc->mue_dying)
227 1.1 rin return 0;
228 1.1 rin
229 1.1 rin USETDW(val, aval);
230 1.1 rin req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
231 1.1 rin req.bRequest = MUE_UR_WRITEREG;
232 1.1 rin USETW(req.wValue, 0);
233 1.1 rin USETW(req.wIndex, reg);
234 1.1 rin USETW(req.wLength, 4);
235 1.1 rin
236 1.1 rin err = usbd_do_request(sc->mue_udev, &req, &val);
237 1.1 rin if (err) {
238 1.1 rin MUE_PRINTF(sc, "reg = 0x%x: %s\n", reg, usbd_errstr(err));
239 1.1 rin return -1;
240 1.1 rin }
241 1.1 rin
242 1.1 rin return 0;
243 1.1 rin }
244 1.1 rin
245 1.1 rin static int
246 1.1 rin mue_wait_for_bits(struct mue_softc *sc, uint32_t reg,
247 1.1 rin uint32_t set, uint32_t clear, uint32_t fail)
248 1.1 rin {
249 1.1 rin uint32_t val;
250 1.1 rin int ntries;
251 1.1 rin
252 1.1 rin for (ntries = 0; ntries < 1000; ntries++) {
253 1.1 rin val = mue_csr_read(sc, reg);
254 1.1 rin if ((val & set) || !(val & clear))
255 1.1 rin return 0;
256 1.1 rin if (val & fail)
257 1.1 rin return 1;
258 1.1 rin usbd_delay_ms(sc->mue_udev, 1);
259 1.1 rin }
260 1.1 rin
261 1.1 rin return 1;
262 1.1 rin }
263 1.1 rin
264 1.1 rin /*
265 1.1 rin * Get exclusive access to the MII registers.
266 1.1 rin */
267 1.1 rin static void
268 1.1 rin mue_lock_mii(struct mue_softc *sc)
269 1.1 rin {
270 1.1 rin sc->mue_refcnt++;
271 1.1 rin mutex_enter(&sc->mue_mii_lock);
272 1.1 rin }
273 1.1 rin
274 1.1 rin static void
275 1.1 rin mue_unlock_mii(struct mue_softc *sc)
276 1.1 rin {
277 1.1 rin mutex_exit(&sc->mue_mii_lock);
278 1.1 rin if (--sc->mue_refcnt < 0)
279 1.1 rin usb_detach_wakeupold(sc->mue_dev);
280 1.1 rin }
281 1.1 rin
282 1.1 rin static int
283 1.1 rin mue_miibus_readreg(device_t dev, int phy, int reg)
284 1.1 rin {
285 1.1 rin struct mue_softc *sc = device_private(dev);
286 1.1 rin uint32_t val;
287 1.1 rin
288 1.1 rin if (sc->mue_dying) {
289 1.1 rin DPRINTF(sc, "dying\n");
290 1.1 rin return 0;
291 1.1 rin }
292 1.1 rin
293 1.1 rin if (sc->mue_phyno != phy)
294 1.1 rin return 0;
295 1.1 rin
296 1.1 rin mue_lock_mii(sc);
297 1.1 rin if (MUE_WAIT_CLR(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
298 1.1 rin mue_unlock_mii(sc);
299 1.1 rin MUE_PRINTF(sc, "not ready\n");
300 1.1 rin return -1;
301 1.1 rin }
302 1.1 rin
303 1.1 rin mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_READ |
304 1.1 rin MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
305 1.1 rin MUE_MII_ACCESS_PHYADDR(phy));
306 1.1 rin
307 1.1 rin if (MUE_WAIT_CLR(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
308 1.1 rin mue_unlock_mii(sc);
309 1.1 rin MUE_PRINTF(sc, "timed out\n");
310 1.1 rin return -1;
311 1.1 rin }
312 1.1 rin
313 1.1 rin val = mue_csr_read(sc, MUE_MII_DATA);
314 1.1 rin mue_unlock_mii(sc);
315 1.1 rin return val & 0xffff;
316 1.1 rin }
317 1.1 rin
318 1.1 rin static void
319 1.1 rin mue_miibus_writereg(device_t dev, int phy, int reg, int data)
320 1.1 rin {
321 1.1 rin struct mue_softc *sc = device_private(dev);
322 1.1 rin
323 1.1 rin if (sc->mue_dying) {
324 1.1 rin DPRINTF(sc, "dying\n");
325 1.1 rin return;
326 1.1 rin }
327 1.1 rin
328 1.1 rin if (sc->mue_phyno != phy) {
329 1.1 rin DPRINTF(sc, "sc->mue_phyno (%d) != phy (%d)\n",
330 1.1 rin sc->mue_phyno, phy);
331 1.1 rin return;
332 1.1 rin }
333 1.1 rin
334 1.1 rin mue_lock_mii(sc);
335 1.1 rin if (MUE_WAIT_CLR(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
336 1.1 rin mue_unlock_mii(sc);
337 1.1 rin MUE_PRINTF(sc, "not ready\n");
338 1.1 rin return;
339 1.1 rin }
340 1.1 rin
341 1.1 rin mue_csr_write(sc, MUE_MII_DATA, data);
342 1.1 rin mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE |
343 1.1 rin MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
344 1.1 rin MUE_MII_ACCESS_PHYADDR(phy));
345 1.1 rin
346 1.1 rin if (MUE_WAIT_CLR(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0))
347 1.1 rin MUE_PRINTF(sc, "timed out\n");
348 1.1 rin
349 1.1 rin mue_unlock_mii(sc);
350 1.1 rin }
351 1.1 rin
352 1.1 rin static void
353 1.1 rin mue_miibus_statchg(struct ifnet *ifp)
354 1.1 rin {
355 1.1 rin struct mue_softc *sc = ifp->if_softc;
356 1.1 rin struct mii_data *mii = GET_MII(sc);
357 1.1 rin uint32_t flow, threshold;
358 1.1 rin
359 1.1 rin if (mii == NULL || ifp == NULL || (ifp->if_flags & IFF_RUNNING) == 0) {
360 1.1 rin DPRINTF(sc, "not ready\n");
361 1.1 rin return;
362 1.1 rin }
363 1.1 rin
364 1.1 rin sc->mue_link = 0;
365 1.1 rin if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
366 1.1 rin (IFM_ACTIVE | IFM_AVALID)) {
367 1.1 rin switch (IFM_SUBTYPE(mii->mii_media_active)) {
368 1.1 rin case IFM_10_T:
369 1.1 rin case IFM_100_TX:
370 1.1 rin case IFM_1000_T:
371 1.1 rin sc->mue_link++;
372 1.1 rin break;
373 1.1 rin default:
374 1.1 rin break;
375 1.1 rin }
376 1.1 rin }
377 1.1 rin
378 1.1 rin /* Lost link, do nothing. */
379 1.1 rin if (sc->mue_link == 0) {
380 1.1 rin DPRINTF(sc, "mii_media_status = 0x%x\n", mii->mii_media_status);
381 1.1 rin return;
382 1.1 rin }
383 1.1 rin
384 1.1 rin if (!(sc->mue_flags & LAN7500)) {
385 1.1 rin if (sc->mue_udev->ud_speed == USB_SPEED_SUPER) {
386 1.1 rin if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
387 1.1 rin /* Disable U2 and enable U1. */
388 1.1 rin MUE_CLRBIT(sc, MUE_USB_CFG1,
389 1.1 rin MUE_USB_CFG1_DEV_U2_INIT_EN);
390 1.1 rin MUE_SETBIT(sc, MUE_USB_CFG1,
391 1.1 rin MUE_USB_CFG1_DEV_U1_INIT_EN);
392 1.1 rin } else {
393 1.1 rin /* Enable U1 and U2. */
394 1.1 rin MUE_SETBIT(sc, MUE_USB_CFG1,
395 1.1 rin MUE_USB_CFG1_DEV_U1_INIT_EN |
396 1.1 rin MUE_USB_CFG1_DEV_U2_INIT_EN);
397 1.1 rin }
398 1.1 rin }
399 1.1 rin }
400 1.1 rin
401 1.1 rin flow = 0;
402 1.1 rin /* XXX Linux does not check IFM_FDX flag for 7800. */
403 1.1 rin if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) {
404 1.1 rin if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE)
405 1.1 rin flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME;
406 1.1 rin if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE)
407 1.1 rin flow |= MUE_FLOW_RX_FCEN;
408 1.1 rin }
409 1.1 rin
410 1.1 rin /* XXX Magic numbers taken from Linux driver. */
411 1.1 rin if (sc->mue_flags & LAN7500)
412 1.1 rin threshold = 0x820;
413 1.1 rin else
414 1.1 rin switch (sc->mue_udev->ud_speed) {
415 1.1 rin case USB_SPEED_SUPER:
416 1.1 rin threshold = 0x817;
417 1.1 rin break;
418 1.1 rin case USB_SPEED_HIGH:
419 1.1 rin threshold = 0x211;
420 1.1 rin break;
421 1.1 rin default:
422 1.1 rin threshold = 0;
423 1.1 rin break;
424 1.1 rin }
425 1.1 rin
426 1.1 rin /* Threshold value should be set before enabling flow. */
427 1.1 rin mue_csr_write(sc, (sc->mue_flags & LAN7500) ?
428 1.1 rin MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, threshold);
429 1.1 rin mue_csr_write(sc, MUE_FLOW, flow);
430 1.1 rin
431 1.1 rin DPRINTF(sc, "done\n");
432 1.1 rin }
433 1.1 rin
434 1.1 rin /*
435 1.1 rin * Set media options.
436 1.1 rin */
437 1.1 rin static int
438 1.1 rin mue_ifmedia_upd(struct ifnet *ifp)
439 1.1 rin {
440 1.1 rin struct mue_softc *sc = ifp->if_softc;
441 1.1 rin struct mii_data *mii = GET_MII(sc);
442 1.1 rin
443 1.1 rin sc->mue_link = 0; /* XXX */
444 1.1 rin
445 1.1 rin if (mii->mii_instance) {
446 1.1 rin struct mii_softc *miisc;
447 1.1 rin LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
448 1.1 rin mii_phy_reset(miisc);
449 1.1 rin }
450 1.1 rin return mii_mediachg(mii);
451 1.1 rin }
452 1.1 rin
453 1.1 rin /*
454 1.1 rin * Report current media status.
455 1.1 rin */
456 1.1 rin static void
457 1.1 rin mue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
458 1.1 rin {
459 1.1 rin struct mue_softc *sc = ifp->if_softc;
460 1.1 rin struct mii_data *mii = GET_MII(sc);
461 1.1 rin
462 1.1 rin mii_pollstat(mii);
463 1.1 rin ifmr->ifm_active = mii->mii_media_active;
464 1.1 rin ifmr->ifm_status = mii->mii_media_status;
465 1.1 rin }
466 1.1 rin
467 1.1 rin static uint8_t
468 1.1 rin mue_eeprom_getbyte(struct mue_softc *sc, int off, uint8_t *dest)
469 1.1 rin {
470 1.1 rin uint32_t val;
471 1.1 rin
472 1.1 rin if (MUE_WAIT_CLR(sc, MUE_E2P_CMD, MUE_E2P_CMD_BUSY, 0)) {
473 1.1 rin MUE_PRINTF(sc, "not ready\n");
474 1.1 rin return ETIMEDOUT;
475 1.1 rin }
476 1.1 rin
477 1.1 rin mue_csr_write(sc, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY |
478 1.1 rin (off & MUE_E2P_CMD_ADDR_MASK));
479 1.1 rin
480 1.1 rin if (MUE_WAIT_CLR(sc, MUE_E2P_CMD, MUE_E2P_CMD_BUSY,
481 1.1 rin MUE_E2P_CMD_TIMEOUT)) {
482 1.1 rin MUE_PRINTF(sc, "timed out\n");
483 1.1 rin return ETIMEDOUT;
484 1.1 rin }
485 1.1 rin
486 1.1 rin val = mue_csr_read(sc, MUE_E2P_DATA);
487 1.1 rin *dest = val & 0xff;
488 1.1 rin
489 1.1 rin return 0;
490 1.1 rin }
491 1.1 rin
492 1.1 rin static int
493 1.1 rin mue_read_eeprom(struct mue_softc *sc, uint8_t *dest, int off, int cnt)
494 1.1 rin {
495 1.1 rin uint32_t val = 0; /* XXX gcc */
496 1.1 rin uint8_t byte;
497 1.1 rin int i, err;
498 1.1 rin
499 1.1 rin /*
500 1.1 rin * EEPROM pins are muxed with the LED function on LAN7800 device.
501 1.1 rin */
502 1.1 rin if (sc->mue_product == USB_PRODUCT_SMSC_LAN7800) {
503 1.1 rin val = mue_csr_read(sc, MUE_HW_CFG);
504 1.1 rin mue_csr_write(sc, MUE_HW_CFG,
505 1.1 rin val & ~(MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN));
506 1.1 rin }
507 1.1 rin
508 1.1 rin for (i = 0; i < cnt; i++) {
509 1.1 rin err = mue_eeprom_getbyte(sc, off + i, &byte);
510 1.1 rin if (err)
511 1.1 rin break;
512 1.1 rin *(dest + i) = byte;
513 1.1 rin }
514 1.1 rin
515 1.1 rin if (sc->mue_product == USB_PRODUCT_SMSC_LAN7800)
516 1.1 rin mue_csr_write(sc, MUE_HW_CFG, val);
517 1.1 rin
518 1.1 rin return err ? 1 : 0;
519 1.1 rin }
520 1.1 rin
521 1.1 rin static bool
522 1.1 rin mue_eeprom_present(struct mue_softc *sc)
523 1.1 rin {
524 1.1 rin uint32_t val;
525 1.1 rin uint8_t sig;
526 1.1 rin int ret;
527 1.1 rin
528 1.1 rin if (sc->mue_flags & LAN7500) {
529 1.1 rin val = mue_csr_read(sc, MUE_E2P_CMD);
530 1.1 rin return val & MUE_E2P_CMD_LOADED;
531 1.1 rin } else {
532 1.1 rin ret = mue_read_eeprom(sc, &sig, MUE_E2P_IND_OFFSET, 1);
533 1.1 rin return (ret == 0) && (sig == MUE_E2P_IND);
534 1.1 rin }
535 1.1 rin }
536 1.1 rin
537 1.1 rin static int
538 1.1 rin mue_read_otp_raw(struct mue_softc *sc, uint8_t *dest, int off, int cnt)
539 1.1 rin {
540 1.1 rin uint32_t val;
541 1.1 rin int i, err;
542 1.1 rin
543 1.1 rin val = mue_csr_read(sc, MUE_OTP_PWR_DN);
544 1.1 rin
545 1.1 rin /* Checking if bit is set. */
546 1.1 rin if (val & MUE_OTP_PWR_DN_PWRDN_N) {
547 1.1 rin /* Clear it, then wait for it to be cleared. */
548 1.1 rin mue_csr_write(sc, MUE_OTP_PWR_DN, 0);
549 1.1 rin err = MUE_WAIT_CLR(sc, MUE_OTP_PWR_DN, MUE_OTP_PWR_DN_PWRDN_N,
550 1.1 rin 0);
551 1.1 rin if (err) {
552 1.1 rin MUE_PRINTF(sc, "not ready\n");
553 1.1 rin return 1;
554 1.1 rin }
555 1.1 rin }
556 1.1 rin
557 1.1 rin /* Start reading the bytes, one at a time. */
558 1.1 rin for (i = 0; i < cnt; i++) {
559 1.1 rin mue_csr_write(sc, MUE_OTP_ADDR1,
560 1.1 rin ((off + i) >> 8) & MUE_OTP_ADDR1_MASK);
561 1.1 rin mue_csr_write(sc, MUE_OTP_ADDR2,
562 1.1 rin ((off + i) & MUE_OTP_ADDR2_MASK));
563 1.1 rin mue_csr_write(sc, MUE_OTP_FUNC_CMD, MUE_OTP_FUNC_CMD_READ);
564 1.1 rin mue_csr_write(sc, MUE_OTP_CMD_GO, MUE_OTP_CMD_GO_GO);
565 1.1 rin
566 1.1 rin err = MUE_WAIT_CLR(sc, MUE_OTP_STATUS, MUE_OTP_STATUS_BUSY, 0);
567 1.1 rin if (err) {
568 1.1 rin MUE_PRINTF(sc, "timed out\n");
569 1.1 rin return 1;
570 1.1 rin }
571 1.1 rin val = mue_csr_read(sc, MUE_OTP_RD_DATA);
572 1.1 rin *(dest + i) = (uint8_t)(val & 0xff);
573 1.1 rin }
574 1.1 rin
575 1.1 rin return 0;
576 1.1 rin }
577 1.1 rin
578 1.1 rin static int
579 1.1 rin mue_read_otp(struct mue_softc *sc, uint8_t *dest, int off, int cnt)
580 1.1 rin {
581 1.1 rin uint8_t sig;
582 1.1 rin int err;
583 1.1 rin
584 1.1 rin if (sc->mue_flags & LAN7500)
585 1.1 rin return 1;
586 1.1 rin
587 1.1 rin err = mue_read_otp_raw(sc, &sig, MUE_OTP_IND_OFFSET, 1);
588 1.1 rin if (err)
589 1.1 rin return 1;
590 1.1 rin switch (sig) {
591 1.1 rin case MUE_OTP_IND_1:
592 1.1 rin break;
593 1.1 rin case MUE_OTP_IND_2:
594 1.1 rin off += 0x100;
595 1.1 rin break;
596 1.1 rin default:
597 1.1 rin DPRINTF(sc, "OTP not found\n");
598 1.1 rin return 1;
599 1.1 rin }
600 1.1 rin err = mue_read_otp_raw(sc, dest, off, cnt);
601 1.1 rin return err;
602 1.1 rin }
603 1.1 rin
604 1.1 rin static void
605 1.1 rin mue_dataport_write(struct mue_softc *sc, uint32_t sel, uint32_t addr,
606 1.1 rin uint32_t cnt, uint32_t *data)
607 1.1 rin {
608 1.1 rin uint32_t i;
609 1.1 rin
610 1.1 rin if (MUE_WAIT_SET(sc, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
611 1.1 rin MUE_PRINTF(sc, "not ready\n");
612 1.1 rin return;
613 1.1 rin }
614 1.1 rin
615 1.1 rin mue_csr_write(sc, MUE_DP_SEL,
616 1.1 rin (mue_csr_read(sc, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel);
617 1.1 rin
618 1.1 rin for (i = 0; i < cnt; i++) {
619 1.1 rin mue_csr_write(sc, MUE_DP_ADDR, addr + i);
620 1.1 rin mue_csr_write(sc, MUE_DP_DATA, data[i]);
621 1.1 rin mue_csr_write(sc, MUE_DP_CMD, MUE_DP_CMD_WRITE);
622 1.1 rin if (MUE_WAIT_SET(sc, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
623 1.1 rin MUE_PRINTF(sc, "timed out\n");
624 1.1 rin return;
625 1.1 rin }
626 1.1 rin }
627 1.1 rin }
628 1.1 rin
629 1.1 rin static void
630 1.1 rin mue_init_ltm(struct mue_softc *sc)
631 1.1 rin {
632 1.1 rin uint32_t idx[MUE_NUM_LTM_INDEX] = { 0, 0, 0, 0, 0, 0 };
633 1.1 rin uint8_t temp[2];
634 1.1 rin size_t i;
635 1.1 rin
636 1.1 rin if (mue_csr_read(sc, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) {
637 1.1 rin if (mue_eeprom_present(sc) &&
638 1.1 rin (mue_read_eeprom(sc, temp, MUE_E2P_LTM_OFFSET, 2) == 0)) {
639 1.1 rin if (temp[0] != sizeof(idx)) {
640 1.1 rin DPRINTF(sc, "EEPROM: unexpected size\n");
641 1.1 rin goto done;
642 1.1 rin }
643 1.1 rin if (mue_read_eeprom(sc, (uint8_t *)idx, temp[1] << 1,
644 1.1 rin sizeof(idx))) {
645 1.9 rin DPRINTF(sc, "EEPROM: failed to read\n");
646 1.1 rin goto done;
647 1.1 rin }
648 1.1 rin DPRINTF(sc, "success\n");
649 1.1 rin } else if (mue_read_otp(sc, temp, MUE_E2P_LTM_OFFSET, 2) == 0) {
650 1.1 rin if (temp[0] != sizeof(idx)) {
651 1.1 rin DPRINTF(sc, "OTP: unexpected size\n");
652 1.1 rin goto done;
653 1.1 rin }
654 1.1 rin if (mue_read_otp(sc, (uint8_t *)idx, temp[1] << 1,
655 1.1 rin sizeof(idx))) {
656 1.9 rin DPRINTF(sc, "OTP: failed to read\n");
657 1.1 rin goto done;
658 1.1 rin }
659 1.1 rin DPRINTF(sc, "success\n");
660 1.1 rin } else {
661 1.1 rin DPRINTF(sc, "nothing to do\n");
662 1.1 rin }
663 1.1 rin } else {
664 1.1 rin DPRINTF(sc, "nothing to do\n");
665 1.1 rin }
666 1.1 rin done:
667 1.1 rin for (i = 0; i < __arraycount(idx); i++)
668 1.1 rin mue_csr_write(sc, MUE_LTM_INDEX(i), idx[i]);
669 1.1 rin }
670 1.1 rin
671 1.1 rin static int
672 1.1 rin mue_chip_init(struct mue_softc *sc)
673 1.1 rin {
674 1.1 rin uint32_t val;
675 1.1 rin
676 1.1 rin if ((sc->mue_flags & LAN7500) &&
677 1.1 rin MUE_WAIT_SET(sc, MUE_PMT_CTL, MUE_PMT_CTL_READY, 0)) {
678 1.1 rin MUE_PRINTF(sc, "not ready\n");
679 1.1 rin return ETIMEDOUT;
680 1.1 rin }
681 1.1 rin
682 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_LRST);
683 1.1 rin if (MUE_WAIT_CLR(sc, MUE_HW_CFG, MUE_HW_CFG_LRST, 0)) {
684 1.1 rin MUE_PRINTF(sc, "timed out\n");
685 1.1 rin return ETIMEDOUT;
686 1.1 rin }
687 1.1 rin
688 1.1 rin /* Respond to the IN token with a NAK. */
689 1.1 rin if (sc->mue_flags & LAN7500)
690 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BIR);
691 1.1 rin else
692 1.1 rin MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BIR);
693 1.1 rin
694 1.1 rin if (sc->mue_flags & LAN7500) {
695 1.1 rin if (sc->mue_udev->ud_speed == USB_SPEED_HIGH)
696 1.3 rin val = MUE_7500_HS_RX_BUFSIZE /
697 1.1 rin MUE_HS_USB_PKT_SIZE;
698 1.1 rin else
699 1.3 rin val = MUE_7500_FS_RX_BUFSIZE /
700 1.1 rin MUE_FS_USB_PKT_SIZE;
701 1.1 rin mue_csr_write(sc, MUE_7500_BURST_CAP, val);
702 1.1 rin mue_csr_write(sc, MUE_7500_BULKIN_DELAY,
703 1.1 rin MUE_7500_DEFAULT_BULKIN_DELAY);
704 1.1 rin
705 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF);
706 1.1 rin
707 1.1 rin /* Set FIFO sizes. */
708 1.1 rin val = (MUE_7500_MAX_RX_FIFO_SIZE - 512) / 512;
709 1.1 rin mue_csr_write(sc, MUE_7500_FCT_RX_FIFO_END, val);
710 1.1 rin val = (MUE_7500_MAX_TX_FIFO_SIZE - 512) / 512;
711 1.1 rin mue_csr_write(sc, MUE_7500_FCT_TX_FIFO_END, val);
712 1.1 rin } else {
713 1.1 rin /* Init LTM. */
714 1.1 rin mue_init_ltm(sc);
715 1.1 rin
716 1.3 rin val = MUE_7800_RX_BUFSIZE;
717 1.1 rin switch (sc->mue_udev->ud_speed) {
718 1.1 rin case USB_SPEED_SUPER:
719 1.1 rin val /= MUE_SS_USB_PKT_SIZE;
720 1.1 rin break;
721 1.1 rin case USB_SPEED_HIGH:
722 1.1 rin val /= MUE_HS_USB_PKT_SIZE;
723 1.1 rin break;
724 1.1 rin default:
725 1.1 rin val /= MUE_FS_USB_PKT_SIZE;
726 1.1 rin break;
727 1.1 rin }
728 1.1 rin mue_csr_write(sc, MUE_7800_BURST_CAP, val);
729 1.1 rin mue_csr_write(sc, MUE_7800_BULKIN_DELAY,
730 1.1 rin MUE_7800_DEFAULT_BULKIN_DELAY);
731 1.1 rin
732 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_MEF);
733 1.1 rin MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BCE);
734 1.1 rin
735 1.1 rin /*
736 1.1 rin * Set FCL's RX and TX FIFO sizes: according to data sheet this
737 1.1 rin * is already the default value. But we initialize it to the
738 1.1 rin * same value anyways, as that's what the Linux driver does.
739 1.1 rin */
740 1.1 rin val = (MUE_7800_MAX_RX_FIFO_SIZE - 512) / 512;
741 1.1 rin mue_csr_write(sc, MUE_7800_FCT_RX_FIFO_END, val);
742 1.1 rin val = (MUE_7800_MAX_TX_FIFO_SIZE - 512) / 512;
743 1.1 rin mue_csr_write(sc, MUE_7800_FCT_TX_FIFO_END, val);
744 1.1 rin }
745 1.1 rin
746 1.1 rin /* Enabling interrupts. */
747 1.1 rin mue_csr_write(sc, MUE_INT_STATUS, ~0);
748 1.1 rin
749 1.1 rin mue_csr_write(sc, (sc->mue_flags & LAN7500) ?
750 1.1 rin MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, 0);
751 1.1 rin mue_csr_write(sc, MUE_FLOW, 0);
752 1.1 rin
753 1.1 rin /* Reset PHY. */
754 1.1 rin MUE_SETBIT(sc, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST);
755 1.1 rin if (MUE_WAIT_CLR(sc, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST, 0)) {
756 1.1 rin MUE_PRINTF(sc, "PHY not ready\n");
757 1.1 rin return ETIMEDOUT;
758 1.1 rin }
759 1.1 rin
760 1.1 rin /* LAN7801 only has RGMII mode. */
761 1.1 rin if (sc->mue_product == USB_PRODUCT_SMSC_LAN7801)
762 1.1 rin MUE_CLRBIT(sc, MUE_MAC_CR, MUE_MAC_CR_GMII_EN);
763 1.1 rin
764 1.1 rin if ((sc->mue_flags & LAN7500) ||
765 1.1 rin (sc->mue_product == USB_PRODUCT_SMSC_LAN7800 &&
766 1.1 rin !mue_eeprom_present(sc))) {
767 1.1 rin /* Allow MAC to detect speed and duplex from PHY. */
768 1.1 rin MUE_SETBIT(sc, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED |
769 1.1 rin MUE_MAC_CR_AUTO_DUPLEX);
770 1.1 rin }
771 1.1 rin
772 1.1 rin MUE_SETBIT(sc, MUE_MAC_TX, MUE_MAC_TX_TXEN);
773 1.1 rin MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ?
774 1.1 rin MUE_7500_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN);
775 1.1 rin
776 1.1 rin /* Set the maximum frame size. */
777 1.1 rin MUE_CLRBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN);
778 1.1 rin val = mue_csr_read(sc, MUE_MAC_RX);
779 1.1 rin val &= ~MUE_MAC_RX_MAX_SIZE_MASK;
780 1.1 rin val |= MUE_MAC_RX_MAX_LEN(ETHER_MAX_LEN);
781 1.1 rin mue_csr_write(sc, MUE_MAC_RX, val);
782 1.1 rin MUE_SETBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN);
783 1.1 rin
784 1.1 rin MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ?
785 1.1 rin MUE_7500_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN);
786 1.1 rin
787 1.1 rin /* Set default GPIO/LED settings only if no EEPROM is detected. */
788 1.1 rin if ((sc->mue_flags & LAN7500) && !mue_eeprom_present(sc)) {
789 1.1 rin MUE_CLRBIT(sc, MUE_LED_CFG, MUE_LED_CFG_LED10_FUN_SEL);
790 1.1 rin MUE_SETBIT(sc, MUE_LED_CFG,
791 1.1 rin MUE_LED_CFG_LEDGPIO_EN | MUE_LED_CFG_LED2_FUN_SEL);
792 1.1 rin }
793 1.1 rin
794 1.1 rin /* XXX We assume two LEDs at least when EEPROM is missing. */
795 1.1 rin if (sc->mue_product == USB_PRODUCT_SMSC_LAN7800 &&
796 1.1 rin !mue_eeprom_present(sc))
797 1.1 rin MUE_SETBIT(sc, MUE_HW_CFG,
798 1.1 rin MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN);
799 1.1 rin
800 1.1 rin return 0;
801 1.1 rin }
802 1.1 rin
803 1.1 rin static void
804 1.1 rin mue_set_macaddr(struct mue_softc *sc)
805 1.1 rin {
806 1.1 rin struct ifnet *ifp = GET_IFP(sc);
807 1.1 rin const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
808 1.1 rin uint32_t lo, hi;
809 1.1 rin
810 1.1 rin lo = MUE_ENADDR_LO(enaddr);
811 1.1 rin hi = MUE_ENADDR_HI(enaddr);
812 1.1 rin
813 1.1 rin mue_csr_write(sc, MUE_RX_ADDRL, lo);
814 1.1 rin mue_csr_write(sc, MUE_RX_ADDRH, hi);
815 1.1 rin }
816 1.1 rin
817 1.1 rin static int
818 1.1 rin mue_get_macaddr(struct mue_softc *sc, prop_dictionary_t dict)
819 1.1 rin {
820 1.1 rin prop_data_t eaprop;
821 1.1 rin uint32_t low, high;
822 1.1 rin
823 1.1 rin if (!(sc->mue_flags & LAN7500)) {
824 1.1 rin low = mue_csr_read(sc, MUE_RX_ADDRL);
825 1.1 rin high = mue_csr_read(sc, MUE_RX_ADDRH);
826 1.1 rin sc->mue_enaddr[5] = (uint8_t)((high >> 8) & 0xff);
827 1.1 rin sc->mue_enaddr[4] = (uint8_t)((high) & 0xff);
828 1.1 rin sc->mue_enaddr[3] = (uint8_t)((low >> 24) & 0xff);
829 1.1 rin sc->mue_enaddr[2] = (uint8_t)((low >> 16) & 0xff);
830 1.1 rin sc->mue_enaddr[1] = (uint8_t)((low >> 8) & 0xff);
831 1.1 rin sc->mue_enaddr[0] = (uint8_t)((low) & 0xff);
832 1.1 rin if (ETHER_IS_VALID(sc->mue_enaddr))
833 1.1 rin return 0;
834 1.1 rin else {
835 1.1 rin DPRINTF(sc, "registers: %s\n",
836 1.1 rin ether_sprintf(sc->mue_enaddr));
837 1.1 rin }
838 1.1 rin }
839 1.1 rin
840 1.1 rin if (mue_eeprom_present(sc) && !mue_read_eeprom(sc, sc->mue_enaddr,
841 1.1 rin MUE_E2P_MAC_OFFSET, ETHER_ADDR_LEN)) {
842 1.1 rin if (ETHER_IS_VALID(sc->mue_enaddr))
843 1.1 rin return 0;
844 1.1 rin else {
845 1.1 rin DPRINTF(sc, "EEPROM: %s\n",
846 1.1 rin ether_sprintf(sc->mue_enaddr));
847 1.1 rin }
848 1.1 rin }
849 1.1 rin
850 1.1 rin if (mue_read_otp(sc, sc->mue_enaddr, MUE_OTP_MAC_OFFSET,
851 1.1 rin ETHER_ADDR_LEN) == 0) {
852 1.1 rin if (ETHER_IS_VALID(sc->mue_enaddr))
853 1.1 rin return 0;
854 1.1 rin else {
855 1.1 rin DPRINTF(sc, "OTP: %s\n",
856 1.1 rin ether_sprintf(sc->mue_enaddr));
857 1.1 rin }
858 1.1 rin }
859 1.1 rin
860 1.1 rin /*
861 1.1 rin * Other MD methods. This should be tried only if other methods fail.
862 1.1 rin * Otherwise, MAC address for internal device can be assinged to
863 1.1 rin * external devices on Raspberry Pi, for example.
864 1.1 rin */
865 1.1 rin eaprop = prop_dictionary_get(dict, "mac-address");
866 1.1 rin if (eaprop != NULL) {
867 1.1 rin KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
868 1.1 rin KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
869 1.1 rin memcpy(sc->mue_enaddr, prop_data_data_nocopy(eaprop),
870 1.1 rin ETHER_ADDR_LEN);
871 1.1 rin if (ETHER_IS_VALID(sc->mue_enaddr))
872 1.1 rin return 0;
873 1.1 rin else {
874 1.1 rin DPRINTF(sc, "prop_dictionary_get: %s\n",
875 1.1 rin ether_sprintf(sc->mue_enaddr));
876 1.1 rin }
877 1.1 rin }
878 1.1 rin
879 1.1 rin return 1;
880 1.1 rin }
881 1.1 rin
882 1.1 rin
883 1.1 rin /*
884 1.1 rin * Probe for a Microchip chip. */
885 1.1 rin static int
886 1.1 rin mue_match(device_t parent, cfdata_t match, void *aux)
887 1.1 rin {
888 1.1 rin struct usb_attach_arg *uaa = aux;
889 1.1 rin
890 1.1 rin return (MUE_LOOKUP(uaa) != NULL) ? UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
891 1.1 rin }
892 1.1 rin
893 1.1 rin static void
894 1.1 rin mue_attach(device_t parent, device_t self, void *aux)
895 1.1 rin {
896 1.1 rin struct mue_softc *sc = device_private(self);
897 1.1 rin prop_dictionary_t dict = device_properties(self);
898 1.1 rin struct usb_attach_arg *uaa = aux;
899 1.1 rin struct usbd_device *dev = uaa->uaa_device;
900 1.1 rin usb_interface_descriptor_t *id;
901 1.1 rin usb_endpoint_descriptor_t *ed;
902 1.1 rin char *devinfop;
903 1.1 rin struct mii_data *mii;
904 1.1 rin struct ifnet *ifp;
905 1.1 rin usbd_status err;
906 1.8 rin uint8_t i;
907 1.8 rin int s;
908 1.1 rin
909 1.1 rin aprint_naive("\n");
910 1.1 rin aprint_normal("\n");
911 1.1 rin
912 1.1 rin sc->mue_dev = self;
913 1.1 rin sc->mue_udev = dev;
914 1.1 rin
915 1.1 rin devinfop = usbd_devinfo_alloc(sc->mue_udev, 0);
916 1.1 rin aprint_normal_dev(self, "%s\n", devinfop);
917 1.1 rin usbd_devinfo_free(devinfop);
918 1.1 rin
919 1.1 rin #define MUE_CONFIG_NO 1
920 1.1 rin err = usbd_set_config_no(dev, MUE_CONFIG_NO, 1);
921 1.1 rin if (err) {
922 1.1 rin aprint_error_dev(self, "failed to set configuration: %s\n",
923 1.1 rin usbd_errstr(err));
924 1.1 rin return;
925 1.1 rin }
926 1.1 rin
927 1.1 rin mutex_init(&sc->mue_mii_lock, MUTEX_DEFAULT, IPL_NONE);
928 1.1 rin usb_init_task(&sc->mue_tick_task, mue_tick_task, sc, 0);
929 1.1 rin usb_init_task(&sc->mue_stop_task, (void (*)(void *))mue_stop, sc, 0);
930 1.1 rin
931 1.1 rin #define MUE_IFACE_IDX 0
932 1.1 rin err = usbd_device2interface_handle(dev, MUE_IFACE_IDX, &sc->mue_iface);
933 1.1 rin if (err) {
934 1.1 rin aprint_error_dev(self, "failed to get interface handle: %s\n",
935 1.1 rin usbd_errstr(err));
936 1.1 rin return;
937 1.1 rin }
938 1.1 rin
939 1.1 rin sc->mue_product = uaa->uaa_product;
940 1.1 rin sc->mue_flags = MUE_LOOKUP(uaa)->mue_flags;
941 1.1 rin
942 1.1 rin /* Decide on what our bufsize will be. */
943 1.1 rin if (sc->mue_flags & LAN7500)
944 1.3 rin sc->mue_rxbufsz = (sc->mue_udev->ud_speed == USB_SPEED_HIGH) ?
945 1.3 rin MUE_7500_HS_RX_BUFSIZE : MUE_7500_FS_RX_BUFSIZE;
946 1.1 rin else
947 1.3 rin sc->mue_rxbufsz = MUE_7800_RX_BUFSIZE;
948 1.3 rin sc->mue_txbufsz = MUE_TX_BUFSIZE;
949 1.1 rin
950 1.1 rin /* Find endpoints. */
951 1.1 rin id = usbd_get_interface_descriptor(sc->mue_iface);
952 1.1 rin for (i = 0; i < id->bNumEndpoints; i++) {
953 1.1 rin ed = usbd_interface2endpoint_descriptor(sc->mue_iface, i);
954 1.1 rin if (ed == NULL) {
955 1.8 rin aprint_error_dev(self, "failed to get ep %hhd\n", i);
956 1.1 rin return;
957 1.1 rin }
958 1.1 rin if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
959 1.1 rin UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
960 1.1 rin sc->mue_ed[MUE_ENDPT_RX] = ed->bEndpointAddress;
961 1.1 rin } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
962 1.1 rin UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
963 1.1 rin sc->mue_ed[MUE_ENDPT_TX] = ed->bEndpointAddress;
964 1.1 rin } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
965 1.1 rin UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
966 1.1 rin sc->mue_ed[MUE_ENDPT_INTR] = ed->bEndpointAddress;
967 1.1 rin }
968 1.1 rin }
969 1.1 rin KASSERT(sc->mue_ed[MUE_ENDPT_RX] != 0);
970 1.1 rin KASSERT(sc->mue_ed[MUE_ENDPT_TX] != 0);
971 1.1 rin KASSERT(sc->mue_ed[MUE_ENDPT_INTR] != 0);
972 1.1 rin
973 1.1 rin s = splnet();
974 1.1 rin
975 1.1 rin sc->mue_phyno = 1;
976 1.1 rin
977 1.1 rin if (mue_chip_init(sc)) {
978 1.9 rin aprint_error_dev(self, "failed to initialize chip\n");
979 1.1 rin splx(s);
980 1.1 rin return;
981 1.1 rin }
982 1.1 rin
983 1.1 rin /* A Microchip chip was detected. Inform the world. */
984 1.1 rin if (sc->mue_flags & LAN7500)
985 1.1 rin aprint_normal_dev(self, "LAN7500\n");
986 1.1 rin else
987 1.1 rin aprint_normal_dev(self, "LAN7800\n");
988 1.1 rin
989 1.1 rin if (mue_get_macaddr(sc, dict)) {
990 1.1 rin aprint_error_dev(self, "Ethernet address assigned randomly\n");
991 1.1 rin cprng_fast(sc->mue_enaddr, ETHER_ADDR_LEN);
992 1.1 rin sc->mue_enaddr[0] &= ~0x01; /* unicast */
993 1.1 rin sc->mue_enaddr[0] |= 0x02; /* locally administered */
994 1.1 rin }
995 1.1 rin
996 1.1 rin aprint_normal_dev(self, "Ethernet address %s\n",
997 1.1 rin ether_sprintf(sc->mue_enaddr));
998 1.1 rin
999 1.1 rin /* Initialize interface info.*/
1000 1.1 rin ifp = GET_IFP(sc);
1001 1.1 rin ifp->if_softc = sc;
1002 1.1 rin strlcpy(ifp->if_xname, device_xname(sc->mue_dev), IFNAMSIZ);
1003 1.1 rin ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1004 1.1 rin ifp->if_init = mue_init;
1005 1.1 rin ifp->if_ioctl = mue_ioctl;
1006 1.1 rin ifp->if_start = mue_start;
1007 1.1 rin ifp->if_stop = mue_stop;
1008 1.1 rin ifp->if_watchdog = mue_watchdog;
1009 1.1 rin
1010 1.1 rin IFQ_SET_READY(&ifp->if_snd);
1011 1.1 rin
1012 1.3 rin ifp->if_capabilities = IFCAP_TSOv4 | IFCAP_TSOv6;
1013 1.3 rin
1014 1.1 rin sc->mue_ec.ec_capabilities = ETHERCAP_VLAN_MTU;
1015 1.1 rin
1016 1.1 rin /* Initialize MII/media info. */
1017 1.1 rin mii = GET_MII(sc);
1018 1.1 rin mii->mii_ifp = ifp;
1019 1.1 rin mii->mii_readreg = mue_miibus_readreg;
1020 1.1 rin mii->mii_writereg = mue_miibus_writereg;
1021 1.1 rin mii->mii_statchg = mue_miibus_statchg;
1022 1.1 rin mii->mii_flags = MIIF_AUTOTSLEEP;
1023 1.1 rin
1024 1.1 rin sc->mue_ec.ec_mii = mii;
1025 1.1 rin ifmedia_init(&mii->mii_media, 0, mue_ifmedia_upd, mue_ifmedia_sts);
1026 1.1 rin mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
1027 1.1 rin
1028 1.1 rin if (LIST_FIRST(&mii->mii_phys) == NULL) {
1029 1.1 rin ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
1030 1.1 rin ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
1031 1.1 rin } else
1032 1.1 rin ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
1033 1.1 rin
1034 1.1 rin /* Attach the interface. */
1035 1.1 rin if_attach(ifp);
1036 1.1 rin ether_ifattach(ifp, sc->mue_enaddr);
1037 1.1 rin
1038 1.1 rin rnd_attach_source(&sc->mue_rnd_source, device_xname(sc->mue_dev),
1039 1.1 rin RND_TYPE_NET, RND_FLAG_DEFAULT);
1040 1.1 rin
1041 1.1 rin callout_init(&sc->mue_stat_ch, 0);
1042 1.1 rin
1043 1.1 rin splx(s);
1044 1.1 rin
1045 1.1 rin usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->mue_udev, sc->mue_dev);
1046 1.1 rin }
1047 1.1 rin
1048 1.1 rin static int
1049 1.1 rin mue_detach(device_t self, int flags)
1050 1.1 rin {
1051 1.1 rin struct mue_softc *sc = device_private(self);
1052 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1053 1.1 rin size_t i;
1054 1.1 rin int s;
1055 1.1 rin
1056 1.1 rin sc->mue_dying = true;
1057 1.1 rin
1058 1.1 rin callout_halt(&sc->mue_stat_ch, NULL);
1059 1.1 rin
1060 1.1 rin for (i = 0; i < __arraycount(sc->mue_ep); i++)
1061 1.1 rin if (sc->mue_ep[i] != NULL)
1062 1.1 rin usbd_abort_pipe(sc->mue_ep[i]);
1063 1.1 rin
1064 1.1 rin /*
1065 1.7 rin * Remove any pending tasks. They cannot be executing because they run
1066 1.1 rin * in the same thread as detach.
1067 1.1 rin */
1068 1.1 rin usb_rem_task_wait(sc->mue_udev, &sc->mue_tick_task, USB_TASKQ_DRIVER,
1069 1.1 rin NULL);
1070 1.1 rin usb_rem_task_wait(sc->mue_udev, &sc->mue_stop_task, USB_TASKQ_DRIVER,
1071 1.1 rin NULL);
1072 1.1 rin
1073 1.1 rin s = splusb();
1074 1.1 rin
1075 1.1 rin if (ifp->if_flags & IFF_RUNNING)
1076 1.1 rin mue_stop(ifp, 1);
1077 1.1 rin
1078 1.1 rin rnd_detach_source(&sc->mue_rnd_source);
1079 1.1 rin mii_detach(&sc->mue_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1080 1.1 rin ifmedia_delete_instance(&sc->mue_mii.mii_media, IFM_INST_ANY);
1081 1.1 rin if (ifp->if_softc != NULL) {
1082 1.1 rin ether_ifdetach(ifp);
1083 1.1 rin if_detach(ifp);
1084 1.1 rin }
1085 1.1 rin
1086 1.1 rin if (--sc->mue_refcnt >= 0) {
1087 1.1 rin /* Wait for processes to go away. */
1088 1.1 rin usb_detach_waitold(sc->mue_dev);
1089 1.1 rin }
1090 1.1 rin splx(s);
1091 1.1 rin
1092 1.1 rin usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->mue_udev, sc->mue_dev);
1093 1.1 rin
1094 1.1 rin mutex_destroy(&sc->mue_mii_lock);
1095 1.1 rin
1096 1.1 rin return 0;
1097 1.1 rin }
1098 1.1 rin
1099 1.1 rin static int
1100 1.1 rin mue_activate(device_t self, enum devact act)
1101 1.1 rin {
1102 1.1 rin struct mue_softc *sc = device_private(self);
1103 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1104 1.1 rin
1105 1.1 rin switch (act) {
1106 1.1 rin case DVACT_DEACTIVATE:
1107 1.1 rin if_deactivate(ifp);
1108 1.1 rin sc->mue_dying = true;
1109 1.1 rin return 0;
1110 1.1 rin default:
1111 1.1 rin return EOPNOTSUPP;
1112 1.1 rin }
1113 1.1 rin return 0;
1114 1.1 rin }
1115 1.1 rin
1116 1.1 rin static int
1117 1.1 rin mue_rx_list_init(struct mue_softc *sc)
1118 1.1 rin {
1119 1.1 rin struct mue_cdata *cd;
1120 1.1 rin struct mue_chain *c;
1121 1.1 rin size_t i;
1122 1.1 rin int err;
1123 1.1 rin
1124 1.1 rin cd = &sc->mue_cdata;
1125 1.1 rin for (i = 0; i < __arraycount(cd->mue_rx_chain); i++) {
1126 1.1 rin c = &cd->mue_rx_chain[i];
1127 1.1 rin c->mue_sc = sc;
1128 1.1 rin c->mue_idx = i;
1129 1.1 rin if (c->mue_xfer == NULL) {
1130 1.1 rin err = usbd_create_xfer(sc->mue_ep[MUE_ENDPT_RX],
1131 1.3 rin sc->mue_rxbufsz, 0, 0, &c->mue_xfer);
1132 1.1 rin if (err)
1133 1.1 rin return err;
1134 1.1 rin c->mue_buf = usbd_get_buffer(c->mue_xfer);
1135 1.1 rin }
1136 1.1 rin }
1137 1.1 rin
1138 1.1 rin return 0;
1139 1.1 rin }
1140 1.1 rin
1141 1.1 rin static int
1142 1.1 rin mue_tx_list_init(struct mue_softc *sc)
1143 1.1 rin {
1144 1.1 rin struct mue_cdata *cd;
1145 1.1 rin struct mue_chain *c;
1146 1.1 rin size_t i;
1147 1.1 rin int err;
1148 1.1 rin
1149 1.1 rin cd = &sc->mue_cdata;
1150 1.1 rin for (i = 0; i < __arraycount(cd->mue_tx_chain); i++) {
1151 1.1 rin c = &cd->mue_tx_chain[i];
1152 1.1 rin c->mue_sc = sc;
1153 1.1 rin c->mue_idx = i;
1154 1.1 rin if (c->mue_xfer == NULL) {
1155 1.1 rin err = usbd_create_xfer(sc->mue_ep[MUE_ENDPT_TX],
1156 1.3 rin sc->mue_txbufsz, USBD_FORCE_SHORT_XFER, 0,
1157 1.1 rin &c->mue_xfer);
1158 1.1 rin if (err)
1159 1.1 rin return err;
1160 1.1 rin c->mue_buf = usbd_get_buffer(c->mue_xfer);
1161 1.1 rin }
1162 1.1 rin }
1163 1.1 rin
1164 1.1 rin return 0;
1165 1.1 rin }
1166 1.1 rin
1167 1.1 rin static int
1168 1.1 rin mue_open_pipes(struct mue_softc *sc)
1169 1.1 rin {
1170 1.1 rin usbd_status err;
1171 1.1 rin
1172 1.1 rin /* Open RX and TX pipes. */
1173 1.1 rin err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_RX],
1174 1.1 rin USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_RX]);
1175 1.1 rin if (err) {
1176 1.1 rin MUE_PRINTF(sc, "rx pipe: %s\n", usbd_errstr(err));
1177 1.1 rin return EIO;
1178 1.1 rin }
1179 1.1 rin err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_TX],
1180 1.1 rin USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_TX]);
1181 1.1 rin if (err) {
1182 1.1 rin MUE_PRINTF(sc, "tx pipe: %s\n", usbd_errstr(err));
1183 1.1 rin return EIO;
1184 1.1 rin }
1185 1.1 rin return 0;
1186 1.1 rin }
1187 1.1 rin
1188 1.1 rin static void
1189 1.1 rin mue_start_rx(struct mue_softc *sc)
1190 1.1 rin {
1191 1.1 rin struct mue_chain *c;
1192 1.1 rin size_t i;
1193 1.1 rin
1194 1.1 rin /* Start up the receive pipe. */
1195 1.1 rin for (i = 0; i < __arraycount(sc->mue_cdata.mue_rx_chain); i++) {
1196 1.1 rin c = &sc->mue_cdata.mue_rx_chain[i];
1197 1.3 rin usbd_setup_xfer(c->mue_xfer, c, c->mue_buf, sc->mue_rxbufsz,
1198 1.1 rin USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, mue_rxeof);
1199 1.1 rin usbd_transfer(c->mue_xfer);
1200 1.1 rin }
1201 1.1 rin }
1202 1.1 rin
1203 1.1 rin static int
1204 1.1 rin mue_encap(struct mue_softc *sc, struct mbuf *m, int idx)
1205 1.1 rin {
1206 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1207 1.1 rin struct mue_chain *c;
1208 1.1 rin usbd_status err;
1209 1.1 rin struct mue_txbuf_hdr hdr;
1210 1.1 rin int len;
1211 1.1 rin
1212 1.1 rin c = &sc->mue_cdata.mue_tx_chain[idx];
1213 1.1 rin
1214 1.1 rin hdr.tx_cmd_a = htole32((m->m_pkthdr.len & MUE_TX_CMD_A_LEN_MASK) |
1215 1.1 rin MUE_TX_CMD_A_FCS);
1216 1.3 rin
1217 1.3 rin if (m->m_pkthdr.csum_flags & (M_CSUM_TSOv4 | M_CSUM_TSOv6)) {
1218 1.3 rin hdr.tx_cmd_a |= htole32(MUE_TX_CMD_A_LSO);
1219 1.3 rin if (__predict_true(m->m_pkthdr.segsz > MUE_TX_MSS_MIN))
1220 1.3 rin hdr.tx_cmd_b = htole32(m->m_pkthdr.segsz <<
1221 1.3 rin MUE_TX_CMD_B_MSS_SHIFT);
1222 1.3 rin else
1223 1.3 rin hdr.tx_cmd_b = htole32(MUE_TX_MSS_MIN <<
1224 1.3 rin MUE_TX_CMD_B_MSS_SHIFT);
1225 1.3 rin hdr.tx_cmd_b &= htole32(MUE_TX_CMD_B_MSS_MASK);
1226 1.3 rin mue_tx_offload(sc, m);
1227 1.3 rin } else
1228 1.3 rin hdr.tx_cmd_b = 0;
1229 1.3 rin
1230 1.1 rin memcpy(c->mue_buf, &hdr, sizeof(hdr));
1231 1.1 rin len = sizeof(hdr);
1232 1.1 rin
1233 1.6 mlelstv KASSERTMSG((unsigned)(len + m->m_pkthdr.len) <= sc->mue_txbufsz,
1234 1.6 mlelstv "%d <= %u", len + m->m_pkthdr.len, sc->mue_txbufsz);
1235 1.4 rin
1236 1.1 rin m_copydata(m, 0, m->m_pkthdr.len, c->mue_buf + len);
1237 1.1 rin len += m->m_pkthdr.len;
1238 1.1 rin
1239 1.1 rin usbd_setup_xfer(c->mue_xfer, c, c->mue_buf, len,
1240 1.1 rin USBD_FORCE_SHORT_XFER, 10000, mue_txeof);
1241 1.1 rin
1242 1.1 rin /* Transmit */
1243 1.1 rin err = usbd_transfer(c->mue_xfer);
1244 1.1 rin if (__predict_false(err != USBD_IN_PROGRESS)) {
1245 1.1 rin DPRINTF(sc, "%s\n", usbd_errstr(err));
1246 1.1 rin mue_stop(ifp, 0);
1247 1.1 rin return EIO;
1248 1.1 rin }
1249 1.1 rin
1250 1.1 rin sc->mue_cdata.mue_tx_cnt++;
1251 1.1 rin
1252 1.1 rin return 0;
1253 1.1 rin }
1254 1.1 rin
1255 1.1 rin static void
1256 1.3 rin mue_tx_offload(struct mue_softc *sc, struct mbuf *m)
1257 1.3 rin {
1258 1.3 rin struct ether_header *eh;
1259 1.3 rin struct ip *ip;
1260 1.3 rin struct ip6_hdr *ip6;
1261 1.3 rin int offset;
1262 1.3 rin bool v4;
1263 1.3 rin
1264 1.3 rin eh = mtod(m, struct ether_header *);
1265 1.3 rin switch (htons(eh->ether_type)) {
1266 1.3 rin case ETHERTYPE_IP:
1267 1.3 rin case ETHERTYPE_IPV6:
1268 1.3 rin offset = ETHER_HDR_LEN;
1269 1.3 rin break;
1270 1.3 rin case ETHERTYPE_VLAN:
1271 1.3 rin /* XXX not yet supported */
1272 1.3 rin offset = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
1273 1.3 rin break;
1274 1.3 rin default:
1275 1.3 rin /* XXX */
1276 1.3 rin panic("%s: unsupported ethertype\n", __func__);
1277 1.3 rin /* NOTREACHED */
1278 1.3 rin }
1279 1.3 rin
1280 1.3 rin v4 = (m->m_pkthdr.csum_flags & M_CSUM_TSOv4) != 0;
1281 1.3 rin
1282 1.3 rin #ifdef DIAGNOSTIC /* XXX */
1283 1.3 rin int hlen = offset;
1284 1.3 rin if (v4)
1285 1.3 rin hlen += M_CSUM_DATA_IPv4_IPHL(m->m_pkthdr.csum_data);
1286 1.3 rin else
1287 1.3 rin hlen += M_CSUM_DATA_IPv6_IPHL(m->m_pkthdr.csum_data);
1288 1.6 mlelstv KASSERT(m->m_len >= (int)(hlen + sizeof(struct tcphdr)));
1289 1.3 rin #endif
1290 1.3 rin
1291 1.3 rin /* Packet length should be cleared. */
1292 1.3 rin if (v4) {
1293 1.3 rin ip = (void *)(mtod(m, char *) + offset);
1294 1.3 rin ip->ip_len = 0;
1295 1.3 rin } else {
1296 1.3 rin ip6 = (void *)(mtod(m, char *) + offset);
1297 1.3 rin ip6->ip6_plen = 0;
1298 1.3 rin }
1299 1.3 rin }
1300 1.3 rin
1301 1.3 rin static void
1302 1.1 rin mue_setmulti(struct mue_softc *sc)
1303 1.1 rin {
1304 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1305 1.1 rin const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
1306 1.1 rin struct ether_multi *enm;
1307 1.1 rin struct ether_multistep step;
1308 1.1 rin uint32_t pfiltbl[MUE_NUM_ADDR_FILTX][2];
1309 1.1 rin uint32_t hashtbl[MUE_DP_SEL_VHF_HASH_LEN];
1310 1.1 rin uint32_t reg, rxfilt, h, hireg, loreg;
1311 1.8 rin size_t i;
1312 1.1 rin
1313 1.1 rin if (sc->mue_dying)
1314 1.1 rin return;
1315 1.1 rin
1316 1.1 rin /* Clear perfect filter and hash tables. */
1317 1.1 rin memset(pfiltbl, 0, sizeof(pfiltbl));
1318 1.1 rin memset(hashtbl, 0, sizeof(hashtbl));
1319 1.1 rin
1320 1.1 rin reg = (sc->mue_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
1321 1.1 rin rxfilt = mue_csr_read(sc, reg);
1322 1.1 rin rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH |
1323 1.1 rin MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST);
1324 1.1 rin
1325 1.1 rin /* Always accept broadcast frames. */
1326 1.1 rin rxfilt |= MUE_RFE_CTL_BROADCAST;
1327 1.1 rin
1328 1.1 rin if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
1329 1.1 rin allmulti: rxfilt |= MUE_RFE_CTL_MULTICAST;
1330 1.1 rin if (ifp->if_flags & IFF_PROMISC) {
1331 1.1 rin rxfilt |= MUE_RFE_CTL_UNICAST;
1332 1.1 rin DPRINTF(sc, "promisc\n");
1333 1.1 rin } else {
1334 1.1 rin DPRINTF(sc, "allmulti\n");
1335 1.1 rin }
1336 1.1 rin } else {
1337 1.1 rin /* Now program new ones. */
1338 1.1 rin pfiltbl[0][0] = MUE_ENADDR_HI(enaddr) | MUE_ADDR_FILTX_VALID;
1339 1.1 rin pfiltbl[0][1] = MUE_ENADDR_LO(enaddr);
1340 1.1 rin i = 1;
1341 1.1 rin ETHER_FIRST_MULTI(step, &sc->mue_ec, enm);
1342 1.1 rin while (enm != NULL) {
1343 1.1 rin if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
1344 1.1 rin ETHER_ADDR_LEN)) {
1345 1.1 rin memset(pfiltbl, 0, sizeof(pfiltbl));
1346 1.1 rin memset(hashtbl, 0, sizeof(hashtbl));
1347 1.1 rin rxfilt &= ~MUE_RFE_CTL_MULTICAST_HASH;
1348 1.1 rin goto allmulti;
1349 1.1 rin }
1350 1.1 rin if (i < MUE_NUM_ADDR_FILTX) {
1351 1.1 rin /* Use perfect address table if possible. */
1352 1.1 rin pfiltbl[i][0] = MUE_ENADDR_HI(enm->enm_addrlo) |
1353 1.1 rin MUE_ADDR_FILTX_VALID;
1354 1.1 rin pfiltbl[i][1] = MUE_ENADDR_LO(enm->enm_addrlo);
1355 1.1 rin } else {
1356 1.1 rin /* Otherwise, use hash table. */
1357 1.1 rin rxfilt |= MUE_RFE_CTL_MULTICAST_HASH;
1358 1.1 rin h = (ether_crc32_be(enm->enm_addrlo,
1359 1.1 rin ETHER_ADDR_LEN) >> 23) & 0x1ff;
1360 1.1 rin hashtbl[h / 32] |= 1 << (h % 32);
1361 1.1 rin }
1362 1.1 rin i++;
1363 1.1 rin ETHER_NEXT_MULTI(step, enm);
1364 1.1 rin }
1365 1.1 rin rxfilt |= MUE_RFE_CTL_PERFECT;
1366 1.1 rin if (rxfilt & MUE_RFE_CTL_MULTICAST_HASH) {
1367 1.1 rin DPRINTF(sc, "perfect filter and hash tables\n");
1368 1.1 rin } else {
1369 1.1 rin DPRINTF(sc, "perfect filter\n");
1370 1.1 rin }
1371 1.1 rin }
1372 1.1 rin
1373 1.1 rin for (i = 0; i < MUE_NUM_ADDR_FILTX; i++) {
1374 1.1 rin hireg = (sc->mue_flags & LAN7500) ?
1375 1.1 rin MUE_7500_ADDR_FILTX(i) : MUE_7800_ADDR_FILTX(i);
1376 1.1 rin loreg = hireg + 4;
1377 1.1 rin mue_csr_write(sc, hireg, 0);
1378 1.1 rin mue_csr_write(sc, loreg, pfiltbl[i][1]);
1379 1.1 rin mue_csr_write(sc, hireg, pfiltbl[i][0]);
1380 1.1 rin }
1381 1.1 rin
1382 1.1 rin mue_dataport_write(sc, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN,
1383 1.1 rin MUE_DP_SEL_VHF_HASH_LEN, hashtbl);
1384 1.1 rin
1385 1.1 rin mue_csr_write(sc, reg, rxfilt);
1386 1.1 rin }
1387 1.1 rin
1388 1.1 rin static void
1389 1.1 rin mue_sethwcsum(struct mue_softc *sc)
1390 1.1 rin {
1391 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1392 1.1 rin uint32_t reg, val;
1393 1.1 rin
1394 1.1 rin reg = (sc->mue_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
1395 1.1 rin val = mue_csr_read(sc, reg);
1396 1.1 rin
1397 1.2 rin if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx)) {
1398 1.1 rin DPRINTF(sc, "enabled\n");;
1399 1.1 rin val |= MUE_RFE_CTL_IGMP_COE | MUE_RFE_CTL_ICMP_COE;
1400 1.1 rin val |= MUE_RFE_CTL_TCPUDP_COE | MUE_RFE_CTL_IP_COE;
1401 1.1 rin } else {
1402 1.1 rin DPRINTF(sc, "disabled\n");;
1403 1.1 rin val &=
1404 1.1 rin ~(MUE_RFE_CTL_IGMP_COE | MUE_RFE_CTL_ICMP_COE);
1405 1.1 rin val &=
1406 1.1 rin ~(MUE_RFE_CTL_TCPUDP_COE | MUE_RFE_CTL_IP_COE);
1407 1.1 rin }
1408 1.1 rin
1409 1.1 rin val &= ~MUE_RFE_CTL_VLAN_FILTER;
1410 1.1 rin
1411 1.1 rin mue_csr_write(sc, reg, val);
1412 1.1 rin }
1413 1.1 rin
1414 1.1 rin
1415 1.1 rin static void
1416 1.1 rin mue_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1417 1.1 rin {
1418 1.1 rin struct mue_chain *c = (struct mue_chain *)priv;
1419 1.1 rin struct mue_softc *sc = c->mue_sc;
1420 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1421 1.1 rin struct mbuf *m;
1422 1.1 rin struct mue_rxbuf_hdr *hdrp;
1423 1.1 rin uint32_t rx_cmd_a, total_len;
1424 1.1 rin uint16_t pktlen;
1425 1.1 rin int s;
1426 1.1 rin char *buf = c->mue_buf;
1427 1.1 rin
1428 1.1 rin if (__predict_false(sc->mue_dying)) {
1429 1.1 rin DPRINTF(sc, "dying\n");
1430 1.1 rin return;
1431 1.1 rin }
1432 1.1 rin
1433 1.1 rin if (__predict_false(!(ifp->if_flags & IFF_RUNNING))) {
1434 1.1 rin DPRINTF(sc, "not running\n");
1435 1.1 rin return;
1436 1.1 rin }
1437 1.1 rin
1438 1.1 rin if (__predict_false(status != USBD_NORMAL_COMPLETION)) {
1439 1.1 rin DPRINTF(sc, "%s\n", usbd_errstr(status));
1440 1.1 rin if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
1441 1.1 rin return;
1442 1.1 rin if (usbd_ratecheck(&sc->mue_rx_notice))
1443 1.1 rin MUE_PRINTF(sc, "%s\n", usbd_errstr(status));
1444 1.1 rin if (status == USBD_STALLED)
1445 1.1 rin usbd_clear_endpoint_stall_async(
1446 1.1 rin sc->mue_ep[MUE_ENDPT_RX]);
1447 1.1 rin goto done;
1448 1.1 rin }
1449 1.1 rin
1450 1.1 rin usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
1451 1.1 rin
1452 1.5 rin KASSERTMSG(total_len <= sc->mue_rxbufsz, "%d <= %u",
1453 1.5 rin total_len, sc->mue_rxbufsz);
1454 1.1 rin
1455 1.1 rin do {
1456 1.1 rin if (__predict_false(total_len < sizeof(*hdrp))) {
1457 1.9 rin MUE_PRINTF(sc, "packet length %u too short\n",
1458 1.9 rin total_len);
1459 1.1 rin ifp->if_ierrors++;
1460 1.1 rin goto done;
1461 1.1 rin }
1462 1.1 rin
1463 1.1 rin hdrp = (struct mue_rxbuf_hdr *)buf;
1464 1.1 rin rx_cmd_a = le32toh(hdrp->rx_cmd_a);
1465 1.1 rin
1466 1.1 rin if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_RED)) {
1467 1.9 rin MUE_PRINTF(sc, "rx_cmd_a: 0x%x\n", rx_cmd_a);
1468 1.1 rin ifp->if_ierrors++;
1469 1.1 rin goto done;
1470 1.1 rin }
1471 1.1 rin
1472 1.1 rin /* XXX not yet */
1473 1.1 rin KASSERT((rx_cmd_a & MUE_RX_CMD_A_ICSM) == 0);
1474 1.1 rin
1475 1.1 rin pktlen = (uint16_t)(rx_cmd_a & MUE_RX_CMD_A_LEN_MASK);
1476 1.1 rin if (sc->mue_flags & LAN7500)
1477 1.1 rin pktlen -= 2;
1478 1.1 rin
1479 1.1 rin if (__predict_false(pktlen < ETHER_HDR_LEN ||
1480 1.1 rin pktlen > MCLBYTES - ETHER_ALIGN ||
1481 1.1 rin pktlen + sizeof(*hdrp) > total_len)) {
1482 1.9 rin MUE_PRINTF(sc, "invalid packet length %d\n", pktlen);
1483 1.1 rin ifp->if_ierrors++;
1484 1.1 rin goto done;
1485 1.1 rin }
1486 1.1 rin
1487 1.1 rin m = mue_newbuf();
1488 1.1 rin if (__predict_false(m == NULL)) {
1489 1.9 rin MUE_PRINTF(sc, "failed to allocate mbuf\n");
1490 1.1 rin ifp->if_ierrors++;
1491 1.1 rin goto done;
1492 1.1 rin }
1493 1.1 rin
1494 1.1 rin m_set_rcvif(m, ifp);
1495 1.1 rin m->m_pkthdr.len = m->m_len = pktlen;
1496 1.1 rin m->m_flags |= M_HASFCS;
1497 1.1 rin memcpy(mtod(m, char *), buf + sizeof(*hdrp), pktlen);
1498 1.1 rin
1499 1.1 rin /* Attention: sizeof(hdr) = 10 */
1500 1.1 rin pktlen = roundup(pktlen + sizeof(*hdrp), 4);
1501 1.1 rin if (pktlen > total_len)
1502 1.1 rin pktlen = total_len;
1503 1.1 rin total_len -= pktlen;
1504 1.1 rin buf += pktlen;
1505 1.1 rin
1506 1.1 rin s = splnet();
1507 1.1 rin if_percpuq_enqueue(ifp->if_percpuq, m);
1508 1.1 rin splx(s);
1509 1.1 rin } while (total_len > 0);
1510 1.1 rin
1511 1.1 rin done:
1512 1.1 rin /* Setup new transfer. */
1513 1.3 rin usbd_setup_xfer(xfer, c, c->mue_buf, sc->mue_rxbufsz,
1514 1.1 rin USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, mue_rxeof);
1515 1.1 rin usbd_transfer(xfer);
1516 1.1 rin }
1517 1.1 rin
1518 1.1 rin static void
1519 1.1 rin mue_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1520 1.1 rin {
1521 1.1 rin struct mue_chain *c = priv;
1522 1.1 rin struct mue_softc *sc = c->mue_sc;
1523 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1524 1.1 rin int s;
1525 1.1 rin
1526 1.1 rin if (__predict_false(sc->mue_dying))
1527 1.1 rin return;
1528 1.1 rin
1529 1.1 rin s = splnet();
1530 1.1 rin
1531 1.1 rin if (__predict_false(status != USBD_NORMAL_COMPLETION)) {
1532 1.1 rin if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
1533 1.1 rin splx(s);
1534 1.1 rin return;
1535 1.1 rin }
1536 1.1 rin ifp->if_oerrors++;
1537 1.1 rin MUE_PRINTF(sc, "%s\n", usbd_errstr(status));
1538 1.1 rin if (status == USBD_STALLED)
1539 1.1 rin usbd_clear_endpoint_stall_async(
1540 1.1 rin sc->mue_ep[MUE_ENDPT_TX]);
1541 1.1 rin splx(s);
1542 1.1 rin return;
1543 1.1 rin }
1544 1.1 rin
1545 1.1 rin ifp->if_timer = 0;
1546 1.1 rin ifp->if_flags &= ~IFF_OACTIVE;
1547 1.1 rin
1548 1.1 rin if (!IFQ_IS_EMPTY(&ifp->if_snd))
1549 1.1 rin mue_start(ifp);
1550 1.1 rin
1551 1.1 rin ifp->if_opackets++;
1552 1.1 rin splx(s);
1553 1.1 rin }
1554 1.1 rin
1555 1.1 rin static int
1556 1.1 rin mue_init(struct ifnet *ifp)
1557 1.1 rin {
1558 1.1 rin struct mue_softc *sc = ifp->if_softc;
1559 1.1 rin int s;
1560 1.1 rin
1561 1.1 rin if (sc->mue_dying) {
1562 1.1 rin DPRINTF(sc, "dying\n");
1563 1.1 rin return EIO;
1564 1.1 rin }
1565 1.1 rin
1566 1.1 rin s = splnet();
1567 1.1 rin
1568 1.1 rin /* Cancel pending I/O and free all TX/RX buffers. */
1569 1.1 rin if (ifp->if_flags & IFF_RUNNING)
1570 1.1 rin mue_stop(ifp, 1);
1571 1.1 rin
1572 1.1 rin mue_reset(sc);
1573 1.1 rin
1574 1.1 rin /* Set MAC address. */
1575 1.1 rin mue_set_macaddr(sc);
1576 1.1 rin
1577 1.1 rin /* Load the multicast filter. */
1578 1.1 rin mue_setmulti(sc);
1579 1.1 rin
1580 1.1 rin /* TCP/UDP checksum offload engines. */
1581 1.1 rin mue_sethwcsum(sc);
1582 1.1 rin
1583 1.1 rin if (mue_open_pipes(sc)) {
1584 1.1 rin splx(s);
1585 1.1 rin return EIO;
1586 1.1 rin }
1587 1.1 rin
1588 1.1 rin /* Init RX ring. */
1589 1.1 rin if (mue_rx_list_init(sc)) {
1590 1.9 rin MUE_PRINTF(sc, "failed to init rx list\n");
1591 1.1 rin splx(s);
1592 1.1 rin return ENOBUFS;
1593 1.1 rin }
1594 1.1 rin
1595 1.1 rin /* Init TX ring. */
1596 1.1 rin if (mue_tx_list_init(sc)) {
1597 1.9 rin MUE_PRINTF(sc, "failed to init tx list\n");
1598 1.1 rin splx(s);
1599 1.1 rin return ENOBUFS;
1600 1.1 rin }
1601 1.1 rin
1602 1.1 rin mue_start_rx(sc);
1603 1.1 rin
1604 1.1 rin ifp->if_flags |= IFF_RUNNING;
1605 1.1 rin ifp->if_flags &= ~IFF_OACTIVE;
1606 1.1 rin
1607 1.1 rin splx(s);
1608 1.1 rin
1609 1.1 rin callout_reset(&sc->mue_stat_ch, hz, mue_tick, sc);
1610 1.1 rin
1611 1.1 rin return 0;
1612 1.1 rin }
1613 1.1 rin
1614 1.1 rin static int
1615 1.1 rin mue_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1616 1.1 rin {
1617 1.1 rin struct mue_softc *sc = ifp->if_softc;
1618 1.1 rin struct ifreq /*const*/ *ifr = data;
1619 1.1 rin int s, error = 0;
1620 1.1 rin
1621 1.1 rin s = splnet();
1622 1.1 rin
1623 1.1 rin switch(cmd) {
1624 1.1 rin case SIOCSIFFLAGS:
1625 1.1 rin if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1626 1.1 rin break;
1627 1.1 rin
1628 1.1 rin switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
1629 1.1 rin case IFF_RUNNING:
1630 1.1 rin mue_stop(ifp, 1);
1631 1.1 rin break;
1632 1.1 rin case IFF_UP:
1633 1.1 rin mue_init(ifp);
1634 1.1 rin break;
1635 1.1 rin case IFF_UP | IFF_RUNNING:
1636 1.1 rin if ((ifp->if_flags ^ sc->mue_if_flags) == IFF_PROMISC)
1637 1.1 rin mue_setmulti(sc);
1638 1.1 rin else
1639 1.1 rin mue_init(ifp);
1640 1.1 rin break;
1641 1.1 rin }
1642 1.1 rin sc->mue_if_flags = ifp->if_flags;
1643 1.1 rin break;
1644 1.1 rin case SIOCGIFMEDIA:
1645 1.1 rin case SIOCSIFMEDIA:
1646 1.1 rin error = ifmedia_ioctl(ifp, ifr, &sc->mue_mii.mii_media, cmd);
1647 1.1 rin break;
1648 1.1 rin default:
1649 1.1 rin if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET)
1650 1.1 rin break;
1651 1.1 rin error = 0;
1652 1.1 rin if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI)
1653 1.1 rin mue_setmulti(sc);
1654 1.1 rin break;
1655 1.1 rin }
1656 1.1 rin splx(s);
1657 1.1 rin
1658 1.1 rin return error;
1659 1.1 rin }
1660 1.1 rin
1661 1.1 rin static void
1662 1.1 rin mue_watchdog(struct ifnet *ifp)
1663 1.1 rin {
1664 1.1 rin struct mue_softc *sc = ifp->if_softc;
1665 1.1 rin struct mue_chain *c;
1666 1.1 rin usbd_status stat;
1667 1.1 rin int s;
1668 1.1 rin
1669 1.1 rin ifp->if_oerrors++;
1670 1.1 rin MUE_PRINTF(sc, "timed out\n");
1671 1.1 rin
1672 1.1 rin s = splusb();
1673 1.1 rin c = &sc->mue_cdata.mue_tx_chain[0];
1674 1.1 rin usbd_get_xfer_status(c->mue_xfer, NULL, NULL, NULL, &stat);
1675 1.1 rin mue_txeof(c->mue_xfer, c, stat);
1676 1.1 rin
1677 1.1 rin if (!IFQ_IS_EMPTY(&ifp->if_snd))
1678 1.1 rin mue_start(ifp);
1679 1.1 rin splx(s);
1680 1.1 rin }
1681 1.1 rin
1682 1.1 rin static void
1683 1.1 rin mue_reset(struct mue_softc *sc)
1684 1.1 rin {
1685 1.1 rin if (sc->mue_dying)
1686 1.1 rin return;
1687 1.1 rin
1688 1.1 rin /* Wait a little while for the chip to get its brains in order. */
1689 1.1 rin usbd_delay_ms(sc->mue_udev, 1);
1690 1.1 rin
1691 1.1 rin // mue_chip_init(sc); /* XXX */
1692 1.1 rin }
1693 1.1 rin
1694 1.1 rin static void
1695 1.1 rin mue_start(struct ifnet *ifp)
1696 1.1 rin {
1697 1.1 rin struct mue_softc *sc = ifp->if_softc;
1698 1.1 rin struct mbuf *m;
1699 1.1 rin
1700 1.1 rin if (__predict_false(!sc->mue_link)) {
1701 1.1 rin DPRINTF(sc, "no link\n");
1702 1.1 rin return;
1703 1.1 rin }
1704 1.1 rin
1705 1.1 rin if (__predict_false((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING))
1706 1.1 rin != IFF_RUNNING)) {
1707 1.1 rin DPRINTF(sc, "not ready\n");
1708 1.1 rin return;
1709 1.1 rin }
1710 1.1 rin
1711 1.1 rin IFQ_POLL(&ifp->if_snd, m);
1712 1.1 rin if (m == NULL)
1713 1.1 rin return;
1714 1.1 rin
1715 1.1 rin if (__predict_false(mue_encap(sc, m, 0))) {
1716 1.1 rin DPRINTF(sc, "encap failed\n");
1717 1.1 rin ifp->if_flags |= IFF_OACTIVE;
1718 1.1 rin return;
1719 1.1 rin }
1720 1.1 rin IFQ_DEQUEUE(&ifp->if_snd, m);
1721 1.1 rin
1722 1.1 rin bpf_mtap(ifp, m, BPF_D_OUT);
1723 1.1 rin m_freem(m);
1724 1.1 rin
1725 1.1 rin ifp->if_flags |= IFF_OACTIVE;
1726 1.1 rin
1727 1.1 rin /* Set a timeout in case the chip goes out to lunch. */
1728 1.1 rin ifp->if_timer = 5;
1729 1.1 rin }
1730 1.1 rin
1731 1.1 rin static void
1732 1.1 rin mue_stop(struct ifnet *ifp, int disable __unused)
1733 1.1 rin {
1734 1.1 rin struct mue_softc *sc = ifp->if_softc;
1735 1.1 rin usbd_status err;
1736 1.1 rin size_t i;
1737 1.1 rin
1738 1.1 rin mue_reset(sc);
1739 1.1 rin
1740 1.1 rin ifp->if_timer = 0;
1741 1.1 rin ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1742 1.1 rin
1743 1.1 rin callout_stop(&sc->mue_stat_ch);
1744 1.1 rin
1745 1.1 rin /* Stop transfers. */
1746 1.1 rin for (i = 0; i < __arraycount(sc->mue_ep); i++)
1747 1.1 rin if (sc->mue_ep[i] != NULL) {
1748 1.1 rin err = usbd_abort_pipe(sc->mue_ep[i]);
1749 1.1 rin if (err)
1750 1.1 rin MUE_PRINTF(sc, "abort pipe %zu: %s\n",
1751 1.1 rin i, usbd_errstr(err));
1752 1.1 rin }
1753 1.1 rin
1754 1.1 rin /* Free RX resources. */
1755 1.1 rin for (i = 0; i < __arraycount(sc->mue_cdata.mue_rx_chain); i++)
1756 1.1 rin if (sc->mue_cdata.mue_rx_chain[i].mue_xfer != NULL) {
1757 1.1 rin usbd_destroy_xfer(
1758 1.1 rin sc->mue_cdata.mue_rx_chain[i].mue_xfer);
1759 1.1 rin sc->mue_cdata.mue_rx_chain[i].mue_xfer = NULL;
1760 1.1 rin }
1761 1.1 rin
1762 1.1 rin /* Free TX resources. */
1763 1.1 rin for (i = 0; i < __arraycount(sc->mue_cdata.mue_tx_chain); i++)
1764 1.1 rin if (sc->mue_cdata.mue_tx_chain[i].mue_xfer != NULL) {
1765 1.1 rin usbd_destroy_xfer(
1766 1.1 rin sc->mue_cdata.mue_tx_chain[i].mue_xfer);
1767 1.1 rin sc->mue_cdata.mue_tx_chain[i].mue_xfer = NULL;
1768 1.1 rin }
1769 1.1 rin
1770 1.1 rin /* Close pipes */
1771 1.1 rin for (i = 0; i < __arraycount(sc->mue_ep); i++)
1772 1.1 rin if (sc->mue_ep[i] != NULL) {
1773 1.1 rin err = usbd_close_pipe(sc->mue_ep[i]);
1774 1.1 rin if (err)
1775 1.1 rin MUE_PRINTF(sc, "close pipe %zu: %s\n",
1776 1.1 rin i, usbd_errstr(err));
1777 1.1 rin sc->mue_ep[i] = NULL;
1778 1.1 rin }
1779 1.1 rin
1780 1.1 rin sc->mue_link = 0; /* XXX */
1781 1.1 rin
1782 1.1 rin DPRINTF(sc, "done\n");
1783 1.1 rin }
1784 1.1 rin
1785 1.1 rin static void
1786 1.1 rin mue_tick(void *xsc)
1787 1.1 rin {
1788 1.1 rin struct mue_softc *sc = xsc;
1789 1.1 rin
1790 1.1 rin if (sc == NULL)
1791 1.1 rin return;
1792 1.1 rin
1793 1.1 rin if (sc->mue_dying)
1794 1.1 rin return;
1795 1.1 rin
1796 1.1 rin /* Perform periodic stuff in process context. */
1797 1.1 rin usb_add_task(sc->mue_udev, &sc->mue_tick_task, USB_TASKQ_DRIVER);
1798 1.1 rin }
1799 1.1 rin
1800 1.1 rin static void
1801 1.1 rin mue_tick_task(void *xsc)
1802 1.1 rin {
1803 1.1 rin struct mue_softc *sc = xsc;
1804 1.1 rin struct ifnet *ifp = GET_IFP(sc);
1805 1.1 rin struct mii_data *mii = GET_MII(sc);
1806 1.1 rin int s;
1807 1.1 rin
1808 1.1 rin if (sc == NULL)
1809 1.1 rin return;
1810 1.1 rin
1811 1.1 rin if (sc->mue_dying)
1812 1.1 rin return;
1813 1.1 rin
1814 1.1 rin s = splnet();
1815 1.1 rin mii_tick(mii);
1816 1.1 rin if (sc->mue_link == 0)
1817 1.1 rin mue_miibus_statchg(ifp);
1818 1.1 rin callout_reset(&sc->mue_stat_ch, hz, mue_tick, sc);
1819 1.1 rin splx(s);
1820 1.1 rin }
1821 1.1 rin
1822 1.1 rin static struct mbuf *
1823 1.1 rin mue_newbuf(void)
1824 1.1 rin {
1825 1.1 rin struct mbuf *m;
1826 1.1 rin
1827 1.1 rin MGETHDR(m, M_DONTWAIT, MT_DATA);
1828 1.1 rin if (__predict_false(m == NULL))
1829 1.1 rin return NULL;
1830 1.1 rin
1831 1.1 rin MCLGET(m, M_DONTWAIT);
1832 1.1 rin if (__predict_false(!(m->m_flags & M_EXT))) {
1833 1.1 rin m_freem(m);
1834 1.1 rin return NULL;
1835 1.1 rin }
1836 1.1 rin
1837 1.1 rin m_adj(m, ETHER_ALIGN);
1838 1.1 rin
1839 1.1 rin return m;
1840 1.1 rin }
1841