if_mue.c revision 1.56 1 /* $NetBSD: if_mue.c,v 1.56 2020/01/07 06:42:26 maxv Exp $ */
2 /* $OpenBSD: if_mue.c,v 1.3 2018/08/04 16:42:46 jsg Exp $ */
3
4 /*
5 * Copyright (c) 2018 Kevin Lo <kevlo (at) openbsd.org>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 /* Driver for Microchip LAN7500/LAN7800 chipsets. */
21
22 #include <sys/cdefs.h>
23 __KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.56 2020/01/07 06:42:26 maxv Exp $");
24
25 #ifdef _KERNEL_OPT
26 #include "opt_usb.h"
27 #include "opt_inet.h"
28 #endif
29
30 #include <sys/param.h>
31
32 #include <dev/usb/usbnet.h>
33
34 #include <dev/usb/if_muereg.h>
35 #include <dev/usb/if_muevar.h>
36
37 #define MUE_PRINTF(un, fmt, args...) \
38 device_printf((un)->un_dev, "%s: " fmt, __func__, ##args);
39
40 #ifdef USB_DEBUG
41 int muedebug = 0;
42 #define DPRINTF(un, fmt, args...) \
43 do { \
44 if (muedebug) \
45 MUE_PRINTF(un, fmt, ##args); \
46 } while (0 /* CONSTCOND */)
47 #else
48 #define DPRINTF(un, fmt, args...) __nothing
49 #endif
50
51 /*
52 * Various supported device vendors/products.
53 */
54 struct mue_type {
55 struct usb_devno mue_dev;
56 uint16_t mue_flags;
57 #define LAN7500 0x0001 /* LAN7500 */
58 #define LAN7800 0x0002 /* LAN7800 */
59 #define LAN7801 0x0004 /* LAN7801 */
60 #define LAN7850 0x0008 /* LAN7850 */
61 };
62
63 static const struct mue_type mue_devs[] = {
64 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7500 }, LAN7500 },
65 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7505 }, LAN7500 },
66 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7800 }, LAN7800 },
67 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7801 }, LAN7801 },
68 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7850 }, LAN7850 }
69 };
70
71 #define MUE_LOOKUP(uaa) ((const struct mue_type *)usb_lookup(mue_devs, \
72 uaa->uaa_vendor, uaa->uaa_product))
73
74 #define MUE_ENADDR_LO(enaddr) \
75 ((enaddr[3] << 24) | (enaddr[2] << 16) | (enaddr[1] << 8) | enaddr[0])
76 #define MUE_ENADDR_HI(enaddr) \
77 ((enaddr[5] << 8) | enaddr[4])
78
79 static int mue_match(device_t, cfdata_t, void *);
80 static void mue_attach(device_t, device_t, void *);
81
82 static uint32_t mue_csr_read(struct usbnet *, uint32_t);
83 static int mue_csr_write(struct usbnet *, uint32_t, uint32_t);
84 static int mue_wait_for_bits(struct usbnet *, uint32_t, uint32_t,
85 uint32_t, uint32_t);
86 static uint8_t mue_eeprom_getbyte(struct usbnet *, int, uint8_t *);
87 static bool mue_eeprom_present(struct usbnet *);
88 static void mue_dataport_write(struct usbnet *, uint32_t, uint32_t,
89 uint32_t, uint32_t *);
90 static void mue_init_ltm(struct usbnet *);
91 static int mue_chip_init(struct usbnet *);
92 static void mue_set_macaddr(struct usbnet *);
93 static int mue_get_macaddr(struct usbnet *, prop_dictionary_t);
94 static int mue_prepare_tso(struct usbnet *, struct mbuf *);
95 static void mue_setiff(struct usbnet *);
96 static void mue_sethwcsum(struct usbnet *);
97 static void mue_setmtu(struct usbnet *);
98 static void mue_reset(struct usbnet *);
99
100 static void mue_stop_cb(struct ifnet *, int);
101 static int mue_ioctl_cb(struct ifnet *, u_long, void *);
102 static int mue_mii_read_reg(struct usbnet *, int, int, uint16_t *);
103 static int mue_mii_write_reg(struct usbnet *, int, int, uint16_t);
104 static void mue_mii_statchg(struct ifnet *);
105 static void mue_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t);
106 static unsigned mue_tx_prepare(struct usbnet *, struct mbuf *,
107 struct usbnet_chain *);
108 static int mue_init(struct ifnet *);
109
110 static const struct usbnet_ops mue_ops = {
111 .uno_stop = mue_stop_cb,
112 .uno_ioctl = mue_ioctl_cb,
113 .uno_read_reg = mue_mii_read_reg,
114 .uno_write_reg = mue_mii_write_reg,
115 .uno_statchg = mue_mii_statchg,
116 .uno_tx_prepare = mue_tx_prepare,
117 .uno_rx_loop = mue_rx_loop,
118 .uno_init = mue_init,
119 };
120
121 #define MUE_SETBIT(un, reg, x) \
122 mue_csr_write(un, reg, mue_csr_read(un, reg) | (x))
123
124 #define MUE_CLRBIT(un, reg, x) \
125 mue_csr_write(un, reg, mue_csr_read(un, reg) & ~(x))
126
127 #define MUE_WAIT_SET(un, reg, set, fail) \
128 mue_wait_for_bits(un, reg, set, ~0, fail)
129
130 #define MUE_WAIT_CLR(un, reg, clear, fail) \
131 mue_wait_for_bits(un, reg, 0, clear, fail)
132
133 #define ETHER_IS_VALID(addr) \
134 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
135
136 #define ETHER_IS_ZERO(addr) \
137 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
138
139 CFATTACH_DECL_NEW(mue, sizeof(struct usbnet), mue_match, mue_attach,
140 usbnet_detach, usbnet_activate);
141
142 static uint32_t
143 mue_csr_read(struct usbnet *un, uint32_t reg)
144 {
145 usb_device_request_t req;
146 usbd_status err;
147 uDWord val;
148
149 if (usbnet_isdying(un))
150 return 0;
151
152 USETDW(val, 0);
153 req.bmRequestType = UT_READ_VENDOR_DEVICE;
154 req.bRequest = MUE_UR_READREG;
155 USETW(req.wValue, 0);
156 USETW(req.wIndex, reg);
157 USETW(req.wLength, 4);
158
159 err = usbd_do_request(un->un_udev, &req, &val);
160 if (err) {
161 MUE_PRINTF(un, "reg = 0x%x: %s\n", reg, usbd_errstr(err));
162 return 0;
163 }
164
165 return UGETDW(val);
166 }
167
168 static int
169 mue_csr_write(struct usbnet *un, uint32_t reg, uint32_t aval)
170 {
171 usb_device_request_t req;
172 usbd_status err;
173 uDWord val;
174
175 if (usbnet_isdying(un))
176 return 0;
177
178 USETDW(val, aval);
179 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
180 req.bRequest = MUE_UR_WRITEREG;
181 USETW(req.wValue, 0);
182 USETW(req.wIndex, reg);
183 USETW(req.wLength, 4);
184
185 err = usbd_do_request(un->un_udev, &req, &val);
186 if (err) {
187 MUE_PRINTF(un, "reg = 0x%x: %s\n", reg, usbd_errstr(err));
188 return -1;
189 }
190
191 return 0;
192 }
193
194 static int
195 mue_wait_for_bits(struct usbnet *un, uint32_t reg,
196 uint32_t set, uint32_t clear, uint32_t fail)
197 {
198 uint32_t val;
199 int ntries;
200
201 for (ntries = 0; ntries < 1000; ntries++) {
202 val = mue_csr_read(un, reg);
203 if ((val & set) || !(val & clear))
204 return 0;
205 if (val & fail)
206 return 1;
207 usbd_delay_ms(un->un_udev, 1);
208 }
209
210 return 1;
211 }
212
213 static int
214 mue_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
215 {
216 uint32_t data;
217
218 usbnet_isowned_mii(un);
219
220 if (un->un_phyno != phy)
221 return EINVAL;
222
223 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
224 MUE_PRINTF(un, "not ready\n");
225 return EBUSY;
226 }
227
228 mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_READ |
229 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
230 MUE_MII_ACCESS_PHYADDR(phy));
231
232 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
233 MUE_PRINTF(un, "timed out\n");
234 return ETIMEDOUT;
235 }
236
237 data = mue_csr_read(un, MUE_MII_DATA);
238 *val = data & 0xffff;
239
240 return 0;
241 }
242
243 static int
244 mue_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
245 {
246 usbnet_isowned_mii(un);
247
248 if (un->un_phyno != phy)
249 return EINVAL;
250
251 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
252 MUE_PRINTF(un, "not ready\n");
253 return EBUSY;
254 }
255
256 mue_csr_write(un, MUE_MII_DATA, val);
257 mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE |
258 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
259 MUE_MII_ACCESS_PHYADDR(phy));
260
261 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
262 MUE_PRINTF(un, "timed out\n");
263 return ETIMEDOUT;
264 }
265
266 return 0;
267 }
268
269 static void
270 mue_mii_statchg(struct ifnet *ifp)
271 {
272 struct usbnet * const un = ifp->if_softc;
273 struct mii_data * const mii = usbnet_mii(un);
274 uint32_t flow, threshold;
275
276 if (usbnet_isdying(un))
277 return;
278
279 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
280 (IFM_ACTIVE | IFM_AVALID)) {
281 switch (IFM_SUBTYPE(mii->mii_media_active)) {
282 case IFM_10_T:
283 case IFM_100_TX:
284 case IFM_1000_T:
285 usbnet_set_link(un, true);
286 break;
287 default:
288 break;
289 }
290 }
291
292 /* Lost link, do nothing. */
293 if (!usbnet_havelink(un)) {
294 DPRINTF(un, "mii_media_status = 0x%x\n", mii->mii_media_status);
295 return;
296 }
297
298 if (!(un->un_flags & LAN7500)) {
299 if (un->un_udev->ud_speed == USB_SPEED_SUPER) {
300 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
301 /* Disable U2 and enable U1. */
302 MUE_CLRBIT(un, MUE_USB_CFG1,
303 MUE_USB_CFG1_DEV_U2_INIT_EN);
304 MUE_SETBIT(un, MUE_USB_CFG1,
305 MUE_USB_CFG1_DEV_U1_INIT_EN);
306 } else {
307 /* Enable U1 and U2. */
308 MUE_SETBIT(un, MUE_USB_CFG1,
309 MUE_USB_CFG1_DEV_U1_INIT_EN |
310 MUE_USB_CFG1_DEV_U2_INIT_EN);
311 }
312 }
313 }
314
315 flow = 0;
316 /* XXX Linux does not check IFM_FDX flag for 7800. */
317 if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) {
318 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE)
319 flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME;
320 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE)
321 flow |= MUE_FLOW_RX_FCEN;
322 }
323
324 /* XXX Magic numbers taken from Linux driver. */
325 if (un->un_flags & LAN7500)
326 threshold = 0x820;
327 else
328 switch (un->un_udev->ud_speed) {
329 case USB_SPEED_SUPER:
330 threshold = 0x817;
331 break;
332 case USB_SPEED_HIGH:
333 threshold = 0x211;
334 break;
335 default:
336 threshold = 0;
337 break;
338 }
339
340 /* Threshold value should be set before enabling flow. */
341 mue_csr_write(un, (un->un_flags & LAN7500) ?
342 MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, threshold);
343 mue_csr_write(un, MUE_FLOW, flow);
344
345 DPRINTF(un, "done\n");
346 }
347
348 static uint8_t
349 mue_eeprom_getbyte(struct usbnet *un, int off, uint8_t *dest)
350 {
351 uint32_t val;
352
353 if (MUE_WAIT_CLR(un, MUE_E2P_CMD, MUE_E2P_CMD_BUSY, 0)) {
354 MUE_PRINTF(un, "not ready\n");
355 return ETIMEDOUT;
356 }
357
358 KASSERT((off & ~MUE_E2P_CMD_ADDR_MASK) == 0);
359 mue_csr_write(un, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY |
360 off);
361
362 if (MUE_WAIT_CLR(un, MUE_E2P_CMD, MUE_E2P_CMD_BUSY,
363 MUE_E2P_CMD_TIMEOUT)) {
364 MUE_PRINTF(un, "timed out\n");
365 return ETIMEDOUT;
366 }
367
368 val = mue_csr_read(un, MUE_E2P_DATA);
369 *dest = val & 0xff;
370
371 return 0;
372 }
373
374 static int
375 mue_read_eeprom(struct usbnet *un, uint8_t *dest, int off, int cnt)
376 {
377 uint32_t val = 0; /* XXX gcc */
378 uint8_t byte;
379 int i, err = 0;
380
381 /*
382 * EEPROM pins are muxed with the LED function on LAN7800 device.
383 */
384 if (un->un_flags & LAN7800) {
385 val = mue_csr_read(un, MUE_HW_CFG);
386 mue_csr_write(un, MUE_HW_CFG,
387 val & ~(MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN));
388 }
389
390 for (i = 0; i < cnt; i++) {
391 err = mue_eeprom_getbyte(un, off + i, &byte);
392 if (err)
393 break;
394 *(dest + i) = byte;
395 }
396
397 if (un->un_flags & LAN7800)
398 mue_csr_write(un, MUE_HW_CFG, val);
399
400 return err ? 1 : 0;
401 }
402
403 static bool
404 mue_eeprom_present(struct usbnet *un)
405 {
406 uint32_t val;
407 uint8_t sig;
408 int ret;
409
410 if (un->un_flags & LAN7500) {
411 val = mue_csr_read(un, MUE_E2P_CMD);
412 return val & MUE_E2P_CMD_LOADED;
413 } else {
414 ret = mue_read_eeprom(un, &sig, MUE_E2P_IND_OFFSET, 1);
415 return (ret == 0) && (sig == MUE_E2P_IND);
416 }
417 }
418
419 static int
420 mue_read_otp_raw(struct usbnet *un, uint8_t *dest, int off, int cnt)
421 {
422 uint32_t val;
423 int i, err;
424
425 val = mue_csr_read(un, MUE_OTP_PWR_DN);
426
427 /* Checking if bit is set. */
428 if (val & MUE_OTP_PWR_DN_PWRDN_N) {
429 /* Clear it, then wait for it to be cleared. */
430 mue_csr_write(un, MUE_OTP_PWR_DN, 0);
431 err = MUE_WAIT_CLR(un, MUE_OTP_PWR_DN, MUE_OTP_PWR_DN_PWRDN_N,
432 0);
433 if (err) {
434 MUE_PRINTF(un, "not ready\n");
435 return 1;
436 }
437 }
438
439 /* Start reading the bytes, one at a time. */
440 for (i = 0; i < cnt; i++) {
441 mue_csr_write(un, MUE_OTP_ADDR1,
442 ((off + i) >> 8) & MUE_OTP_ADDR1_MASK);
443 mue_csr_write(un, MUE_OTP_ADDR2,
444 ((off + i) & MUE_OTP_ADDR2_MASK));
445 mue_csr_write(un, MUE_OTP_FUNC_CMD, MUE_OTP_FUNC_CMD_READ);
446 mue_csr_write(un, MUE_OTP_CMD_GO, MUE_OTP_CMD_GO_GO);
447
448 err = MUE_WAIT_CLR(un, MUE_OTP_STATUS, MUE_OTP_STATUS_BUSY, 0);
449 if (err) {
450 MUE_PRINTF(un, "timed out\n");
451 return 1;
452 }
453 val = mue_csr_read(un, MUE_OTP_RD_DATA);
454 *(dest + i) = (uint8_t)(val & 0xff);
455 }
456
457 return 0;
458 }
459
460 static int
461 mue_read_otp(struct usbnet *un, uint8_t *dest, int off, int cnt)
462 {
463 uint8_t sig;
464 int err;
465
466 if (un->un_flags & LAN7500)
467 return 1;
468
469 err = mue_read_otp_raw(un, &sig, MUE_OTP_IND_OFFSET, 1);
470 if (err)
471 return 1;
472 switch (sig) {
473 case MUE_OTP_IND_1:
474 break;
475 case MUE_OTP_IND_2:
476 off += 0x100;
477 break;
478 default:
479 DPRINTF(un, "OTP not found\n");
480 return 1;
481 }
482 err = mue_read_otp_raw(un, dest, off, cnt);
483 return err;
484 }
485
486 static void
487 mue_dataport_write(struct usbnet *un, uint32_t sel, uint32_t addr,
488 uint32_t cnt, uint32_t *data)
489 {
490 uint32_t i;
491
492 if (MUE_WAIT_SET(un, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
493 MUE_PRINTF(un, "not ready\n");
494 return;
495 }
496
497 mue_csr_write(un, MUE_DP_SEL,
498 (mue_csr_read(un, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel);
499
500 for (i = 0; i < cnt; i++) {
501 mue_csr_write(un, MUE_DP_ADDR, addr + i);
502 mue_csr_write(un, MUE_DP_DATA, data[i]);
503 mue_csr_write(un, MUE_DP_CMD, MUE_DP_CMD_WRITE);
504 if (MUE_WAIT_SET(un, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
505 MUE_PRINTF(un, "timed out\n");
506 return;
507 }
508 }
509 }
510
511 static void
512 mue_init_ltm(struct usbnet *un)
513 {
514 uint32_t idx[MUE_NUM_LTM_INDEX] = { 0, 0, 0, 0, 0, 0 };
515 uint8_t temp[2];
516 size_t i;
517
518 if (mue_csr_read(un, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) {
519 if (mue_eeprom_present(un) &&
520 (mue_read_eeprom(un, temp, MUE_E2P_LTM_OFFSET, 2) == 0)) {
521 if (temp[0] != sizeof(idx)) {
522 DPRINTF(un, "EEPROM: unexpected size\n");
523 goto done;
524 }
525 if (mue_read_eeprom(un, (uint8_t *)idx, temp[1] << 1,
526 sizeof(idx))) {
527 DPRINTF(un, "EEPROM: failed to read\n");
528 goto done;
529 }
530 DPRINTF(un, "success\n");
531 } else if (mue_read_otp(un, temp, MUE_E2P_LTM_OFFSET, 2) == 0) {
532 if (temp[0] != sizeof(idx)) {
533 DPRINTF(un, "OTP: unexpected size\n");
534 goto done;
535 }
536 if (mue_read_otp(un, (uint8_t *)idx, temp[1] << 1,
537 sizeof(idx))) {
538 DPRINTF(un, "OTP: failed to read\n");
539 goto done;
540 }
541 DPRINTF(un, "success\n");
542 } else
543 DPRINTF(un, "nothing to do\n");
544 } else
545 DPRINTF(un, "nothing to do\n");
546 done:
547 for (i = 0; i < __arraycount(idx); i++)
548 mue_csr_write(un, MUE_LTM_INDEX(i), idx[i]);
549 }
550
551 static int
552 mue_chip_init(struct usbnet *un)
553 {
554 uint32_t val;
555
556 if ((un->un_flags & LAN7500) &&
557 MUE_WAIT_SET(un, MUE_PMT_CTL, MUE_PMT_CTL_READY, 0)) {
558 MUE_PRINTF(un, "not ready\n");
559 return ETIMEDOUT;
560 }
561
562 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_LRST);
563 if (MUE_WAIT_CLR(un, MUE_HW_CFG, MUE_HW_CFG_LRST, 0)) {
564 MUE_PRINTF(un, "timed out\n");
565 return ETIMEDOUT;
566 }
567
568 /* Respond to the IN token with a NAK. */
569 if (un->un_flags & LAN7500)
570 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_BIR);
571 else
572 MUE_SETBIT(un, MUE_USB_CFG0, MUE_USB_CFG0_BIR);
573
574 if (un->un_flags & LAN7500) {
575 if (un->un_udev->ud_speed == USB_SPEED_HIGH)
576 val = MUE_7500_HS_RX_BUFSIZE /
577 MUE_HS_USB_PKT_SIZE;
578 else
579 val = MUE_7500_FS_RX_BUFSIZE /
580 MUE_FS_USB_PKT_SIZE;
581 mue_csr_write(un, MUE_7500_BURST_CAP, val);
582 mue_csr_write(un, MUE_7500_BULKIN_DELAY,
583 MUE_7500_DEFAULT_BULKIN_DELAY);
584
585 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF);
586
587 /* Set FIFO sizes. */
588 val = (MUE_7500_MAX_RX_FIFO_SIZE - 512) / 512;
589 mue_csr_write(un, MUE_7500_FCT_RX_FIFO_END, val);
590 val = (MUE_7500_MAX_TX_FIFO_SIZE - 512) / 512;
591 mue_csr_write(un, MUE_7500_FCT_TX_FIFO_END, val);
592 } else {
593 /* Init LTM. */
594 mue_init_ltm(un);
595
596 val = MUE_7800_RX_BUFSIZE;
597 switch (un->un_udev->ud_speed) {
598 case USB_SPEED_SUPER:
599 val /= MUE_SS_USB_PKT_SIZE;
600 break;
601 case USB_SPEED_HIGH:
602 val /= MUE_HS_USB_PKT_SIZE;
603 break;
604 default:
605 val /= MUE_FS_USB_PKT_SIZE;
606 break;
607 }
608 mue_csr_write(un, MUE_7800_BURST_CAP, val);
609 mue_csr_write(un, MUE_7800_BULKIN_DELAY,
610 MUE_7800_DEFAULT_BULKIN_DELAY);
611
612 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_MEF);
613 MUE_SETBIT(un, MUE_USB_CFG0, MUE_USB_CFG0_BCE);
614
615 /*
616 * Set FCL's RX and TX FIFO sizes: according to data sheet this
617 * is already the default value. But we initialize it to the
618 * same value anyways, as that's what the Linux driver does.
619 */
620 val = (MUE_7800_MAX_RX_FIFO_SIZE - 512) / 512;
621 mue_csr_write(un, MUE_7800_FCT_RX_FIFO_END, val);
622 val = (MUE_7800_MAX_TX_FIFO_SIZE - 512) / 512;
623 mue_csr_write(un, MUE_7800_FCT_TX_FIFO_END, val);
624 }
625
626 /* Enabling interrupts. */
627 mue_csr_write(un, MUE_INT_STATUS, ~0);
628
629 mue_csr_write(un, (un->un_flags & LAN7500) ?
630 MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, 0);
631 mue_csr_write(un, MUE_FLOW, 0);
632
633 /* Reset PHY. */
634 MUE_SETBIT(un, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST);
635 if (MUE_WAIT_CLR(un, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST, 0)) {
636 MUE_PRINTF(un, "PHY not ready\n");
637 return ETIMEDOUT;
638 }
639
640 /* LAN7801 only has RGMII mode. */
641 if (un->un_flags & LAN7801)
642 MUE_CLRBIT(un, MUE_MAC_CR, MUE_MAC_CR_GMII_EN);
643
644 if ((un->un_flags & (LAN7500 | LAN7800)) ||
645 !mue_eeprom_present(un)) {
646 /* Allow MAC to detect speed and duplex from PHY. */
647 MUE_SETBIT(un, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED |
648 MUE_MAC_CR_AUTO_DUPLEX);
649 }
650
651 MUE_SETBIT(un, MUE_MAC_TX, MUE_MAC_TX_TXEN);
652 MUE_SETBIT(un, (un->un_flags & LAN7500) ?
653 MUE_7500_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN);
654
655 MUE_SETBIT(un, (un->un_flags & LAN7500) ?
656 MUE_7500_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN);
657
658 /* Set default GPIO/LED settings only if no EEPROM is detected. */
659 if ((un->un_flags & LAN7500) && !mue_eeprom_present(un)) {
660 MUE_CLRBIT(un, MUE_LED_CFG, MUE_LED_CFG_LED10_FUN_SEL);
661 MUE_SETBIT(un, MUE_LED_CFG,
662 MUE_LED_CFG_LEDGPIO_EN | MUE_LED_CFG_LED2_FUN_SEL);
663 }
664
665 /* XXX We assume two LEDs at least when EEPROM is missing. */
666 if (un->un_flags & LAN7800 &&
667 !mue_eeprom_present(un))
668 MUE_SETBIT(un, MUE_HW_CFG,
669 MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN);
670
671 return 0;
672 }
673
674 static void
675 mue_set_macaddr(struct usbnet *un)
676 {
677 struct ifnet * const ifp = usbnet_ifp(un);
678 const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
679 uint32_t lo, hi;
680
681 lo = MUE_ENADDR_LO(enaddr);
682 hi = MUE_ENADDR_HI(enaddr);
683
684 mue_csr_write(un, MUE_RX_ADDRL, lo);
685 mue_csr_write(un, MUE_RX_ADDRH, hi);
686 }
687
688 static int
689 mue_get_macaddr(struct usbnet *un, prop_dictionary_t dict)
690 {
691 prop_data_t eaprop;
692 uint32_t low, high;
693
694 if (!(un->un_flags & LAN7500)) {
695 low = mue_csr_read(un, MUE_RX_ADDRL);
696 high = mue_csr_read(un, MUE_RX_ADDRH);
697 un->un_eaddr[5] = (uint8_t)((high >> 8) & 0xff);
698 un->un_eaddr[4] = (uint8_t)((high) & 0xff);
699 un->un_eaddr[3] = (uint8_t)((low >> 24) & 0xff);
700 un->un_eaddr[2] = (uint8_t)((low >> 16) & 0xff);
701 un->un_eaddr[1] = (uint8_t)((low >> 8) & 0xff);
702 un->un_eaddr[0] = (uint8_t)((low) & 0xff);
703 if (ETHER_IS_VALID(un->un_eaddr))
704 return 0;
705 else
706 DPRINTF(un, "registers: %s\n",
707 ether_sprintf(un->un_eaddr));
708 }
709
710 if (mue_eeprom_present(un) && !mue_read_eeprom(un, un->un_eaddr,
711 MUE_E2P_MAC_OFFSET, ETHER_ADDR_LEN)) {
712 if (ETHER_IS_VALID(un->un_eaddr))
713 return 0;
714 else
715 DPRINTF(un, "EEPROM: %s\n",
716 ether_sprintf(un->un_eaddr));
717 }
718
719 if (mue_read_otp(un, un->un_eaddr, MUE_OTP_MAC_OFFSET,
720 ETHER_ADDR_LEN) == 0) {
721 if (ETHER_IS_VALID(un->un_eaddr))
722 return 0;
723 else
724 DPRINTF(un, "OTP: %s\n",
725 ether_sprintf(un->un_eaddr));
726 }
727
728 /*
729 * Other MD methods. This should be tried only if other methods fail.
730 * Otherwise, MAC address for internal device can be assinged to
731 * external devices on Raspberry Pi, for example.
732 */
733 eaprop = prop_dictionary_get(dict, "mac-address");
734 if (eaprop != NULL) {
735 KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
736 KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
737 memcpy(un->un_eaddr, prop_data_data_nocopy(eaprop),
738 ETHER_ADDR_LEN);
739 if (ETHER_IS_VALID(un->un_eaddr))
740 return 0;
741 else
742 DPRINTF(un, "prop_dictionary_get: %s\n",
743 ether_sprintf(un->un_eaddr));
744 }
745
746 return 1;
747 }
748
749
750 /*
751 * Probe for a Microchip chip.
752 */
753 static int
754 mue_match(device_t parent, cfdata_t match, void *aux)
755 {
756 struct usb_attach_arg *uaa = aux;
757
758 return (MUE_LOOKUP(uaa) != NULL) ? UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
759 }
760
761 static void
762 mue_attach(device_t parent, device_t self, void *aux)
763 {
764 USBNET_MII_DECL_DEFAULT(unm);
765 struct usbnet * const un = device_private(self);
766 prop_dictionary_t dict = device_properties(self);
767 struct usb_attach_arg *uaa = aux;
768 struct usbd_device *dev = uaa->uaa_device;
769 usb_interface_descriptor_t *id;
770 usb_endpoint_descriptor_t *ed;
771 char *devinfop;
772 usbd_status err;
773 const char *descr;
774 uint32_t id_rev;
775 uint8_t i;
776 unsigned rx_list_cnt, tx_list_cnt;
777 unsigned rx_bufsz;
778
779 aprint_naive("\n");
780 aprint_normal("\n");
781 devinfop = usbd_devinfo_alloc(dev, 0);
782 aprint_normal_dev(self, "%s\n", devinfop);
783 usbd_devinfo_free(devinfop);
784
785 un->un_dev = self;
786 un->un_udev = dev;
787 un->un_sc = un;
788 un->un_ops = &mue_ops;
789 un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
790 un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
791
792 #define MUE_CONFIG_NO 1
793 err = usbd_set_config_no(dev, MUE_CONFIG_NO, 1);
794 if (err) {
795 aprint_error_dev(self, "failed to set configuration: %s\n",
796 usbd_errstr(err));
797 return;
798 }
799
800 #define MUE_IFACE_IDX 0
801 err = usbd_device2interface_handle(dev, MUE_IFACE_IDX, &un->un_iface);
802 if (err) {
803 aprint_error_dev(self, "failed to get interface handle: %s\n",
804 usbd_errstr(err));
805 return;
806 }
807
808 un->un_flags = MUE_LOOKUP(uaa)->mue_flags;
809
810 /* Decide on what our bufsize will be. */
811 if (un->un_flags & LAN7500) {
812 rx_bufsz = (un->un_udev->ud_speed == USB_SPEED_HIGH) ?
813 MUE_7500_HS_RX_BUFSIZE : MUE_7500_FS_RX_BUFSIZE;
814 rx_list_cnt = 1;
815 tx_list_cnt = 1;
816 } else {
817 rx_bufsz = MUE_7800_RX_BUFSIZE;
818 rx_list_cnt = MUE_RX_LIST_CNT;
819 tx_list_cnt = MUE_TX_LIST_CNT;
820 }
821
822 un->un_rx_list_cnt = rx_list_cnt;
823 un->un_tx_list_cnt = tx_list_cnt;
824 un->un_rx_bufsz = rx_bufsz;
825 un->un_tx_bufsz = MUE_TX_BUFSIZE;
826
827 /* Find endpoints. */
828 id = usbd_get_interface_descriptor(un->un_iface);
829 for (i = 0; i < id->bNumEndpoints; i++) {
830 ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
831 if (ed == NULL) {
832 aprint_error_dev(self, "failed to get ep %hhd\n", i);
833 return;
834 }
835 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
836 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
837 un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
838 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
839 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
840 un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
841 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
842 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
843 un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
844 }
845 }
846 if (un->un_ed[USBNET_ENDPT_RX] == 0 ||
847 un->un_ed[USBNET_ENDPT_TX] == 0 ||
848 un->un_ed[USBNET_ENDPT_INTR] == 0) {
849 aprint_error_dev(self, "failed to find endpoints\n");
850 return;
851 }
852
853 /* Set these up now for mue_cmd(). */
854 usbnet_attach(un, "muedet");
855
856 un->un_phyno = 1;
857
858 if (mue_chip_init(un)) {
859 aprint_error_dev(self, "failed to initialize chip\n");
860 return;
861 }
862
863 /* A Microchip chip was detected. Inform the world. */
864 id_rev = mue_csr_read(un, MUE_ID_REV);
865 descr = (un->un_flags & LAN7500) ? "LAN7500" : "LAN7800";
866 aprint_normal_dev(self, "%s id 0x%x rev 0x%x\n", descr,
867 (unsigned)__SHIFTOUT(id_rev, MUE_ID_REV_ID),
868 (unsigned)__SHIFTOUT(id_rev, MUE_ID_REV_REV));
869
870 if (mue_get_macaddr(un, dict)) {
871 aprint_error_dev(self, "failed to read MAC address\n");
872 return;
873 }
874
875 struct ifnet *ifp = usbnet_ifp(un);
876 ifp->if_capabilities = IFCAP_TSOv4 | IFCAP_TSOv6 |
877 IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
878 IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
879 IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
880 IFCAP_CSUM_TCPv6_Tx | IFCAP_CSUM_TCPv6_Rx |
881 IFCAP_CSUM_UDPv6_Tx | IFCAP_CSUM_UDPv6_Rx;
882
883 struct ethercom *ec = usbnet_ec(un);
884 ec->ec_capabilities = ETHERCAP_VLAN_MTU;
885 #if 0 /* XXX not yet */
886 ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
887 #endif
888
889 usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
890 0, &unm);
891 }
892
893 static unsigned
894 mue_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
895 {
896 struct ifnet * const ifp = usbnet_ifp(un);
897 struct mue_txbuf_hdr hdr;
898 uint32_t tx_cmd_a, tx_cmd_b;
899 int csum, len, rv;
900 bool tso, ipe, tpe;
901
902 usbnet_isowned_tx(un);
903
904 if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz - sizeof(hdr))
905 return 0;
906
907 csum = m->m_pkthdr.csum_flags;
908 tso = csum & (M_CSUM_TSOv4 | M_CSUM_TSOv6);
909 ipe = csum & M_CSUM_IPv4;
910 tpe = csum & (M_CSUM_TCPv4 | M_CSUM_UDPv4 |
911 M_CSUM_TCPv6 | M_CSUM_UDPv6);
912
913 len = m->m_pkthdr.len;
914 if (__predict_false((!tso && len > (int)MUE_FRAME_LEN(ifp->if_mtu)) ||
915 ( tso && len > MUE_TSO_FRAME_LEN))) {
916 MUE_PRINTF(un, "packet length %d\n too long", len);
917 return 0;
918 }
919
920 KASSERT((len & ~MUE_TX_CMD_A_LEN_MASK) == 0);
921 tx_cmd_a = len | MUE_TX_CMD_A_FCS;
922
923 if (tso) {
924 tx_cmd_a |= MUE_TX_CMD_A_LSO;
925 if (__predict_true(m->m_pkthdr.segsz > MUE_TX_MSS_MIN))
926 tx_cmd_b = m->m_pkthdr.segsz;
927 else
928 tx_cmd_b = MUE_TX_MSS_MIN;
929 tx_cmd_b <<= MUE_TX_CMD_B_MSS_SHIFT;
930 KASSERT((tx_cmd_b & ~MUE_TX_CMD_B_MSS_MASK) == 0);
931 rv = mue_prepare_tso(un, m);
932 if (__predict_false(rv))
933 return 0;
934 } else {
935 if (ipe)
936 tx_cmd_a |= MUE_TX_CMD_A_IPE;
937 if (tpe)
938 tx_cmd_a |= MUE_TX_CMD_A_TPE;
939 tx_cmd_b = 0;
940 }
941
942 hdr.tx_cmd_a = htole32(tx_cmd_a);
943 hdr.tx_cmd_b = htole32(tx_cmd_b);
944
945 memcpy(c->unc_buf, &hdr, sizeof(hdr));
946 m_copydata(m, 0, len, c->unc_buf + sizeof(hdr));
947
948 return len + sizeof(hdr);
949 }
950
951 /*
952 * L3 length field should be cleared.
953 */
954 static int
955 mue_prepare_tso(struct usbnet *un, struct mbuf *m)
956 {
957 struct ether_header *eh;
958 struct ip *ip;
959 struct ip6_hdr *ip6;
960 uint16_t type, len = 0;
961 int off;
962
963 if (__predict_true(m->m_len >= (int)sizeof(*eh))) {
964 eh = mtod(m, struct ether_header *);
965 type = eh->ether_type;
966 } else
967 m_copydata(m, offsetof(struct ether_header, ether_type),
968 sizeof(type), &type);
969 switch (type = htons(type)) {
970 case ETHERTYPE_IP:
971 case ETHERTYPE_IPV6:
972 off = ETHER_HDR_LEN;
973 break;
974 case ETHERTYPE_VLAN:
975 off = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
976 break;
977 default:
978 return EINVAL;
979 }
980
981 if (m->m_pkthdr.csum_flags & M_CSUM_TSOv4) {
982 if (__predict_true(m->m_len >= off + (int)sizeof(*ip))) {
983 ip = (void *)(mtod(m, char *) + off);
984 ip->ip_len = 0;
985 } else
986 m_copyback(m, off + offsetof(struct ip, ip_len),
987 sizeof(len), &len);
988 } else {
989 if (__predict_true(m->m_len >= off + (int)sizeof(*ip6))) {
990 ip6 = (void *)(mtod(m, char *) + off);
991 ip6->ip6_plen = 0;
992 } else
993 m_copyback(m, off + offsetof(struct ip6_hdr, ip6_plen),
994 sizeof(len), &len);
995 }
996 return 0;
997 }
998
999 static void
1000 mue_setiff(struct usbnet *un)
1001 {
1002 struct ethercom *ec = usbnet_ec(un);
1003 struct ifnet * const ifp = usbnet_ifp(un);
1004 const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
1005 struct ether_multi *enm;
1006 struct ether_multistep step;
1007 uint32_t pfiltbl[MUE_NUM_ADDR_FILTX][2];
1008 uint32_t hashtbl[MUE_DP_SEL_VHF_HASH_LEN];
1009 uint32_t reg, rxfilt, h, hireg, loreg;
1010 size_t i;
1011
1012 if (usbnet_isdying(un))
1013 return;
1014
1015 /* Clear perfect filter and hash tables. */
1016 memset(pfiltbl, 0, sizeof(pfiltbl));
1017 memset(hashtbl, 0, sizeof(hashtbl));
1018
1019 reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
1020 rxfilt = mue_csr_read(un, reg);
1021 rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH |
1022 MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST);
1023
1024 /* Always accept broadcast frames. */
1025 rxfilt |= MUE_RFE_CTL_BROADCAST;
1026
1027 if (ifp->if_flags & IFF_PROMISC) {
1028 rxfilt |= MUE_RFE_CTL_UNICAST;
1029 allmulti: rxfilt |= MUE_RFE_CTL_MULTICAST;
1030 ifp->if_flags |= IFF_ALLMULTI;
1031 if (ifp->if_flags & IFF_PROMISC)
1032 DPRINTF(un, "promisc\n");
1033 else
1034 DPRINTF(un, "allmulti\n");
1035 } else {
1036 /* Now program new ones. */
1037 pfiltbl[0][0] = MUE_ENADDR_HI(enaddr) | MUE_ADDR_FILTX_VALID;
1038 pfiltbl[0][1] = MUE_ENADDR_LO(enaddr);
1039 i = 1;
1040 ETHER_LOCK(ec);
1041 ETHER_FIRST_MULTI(step, ec, enm);
1042 while (enm != NULL) {
1043 if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
1044 ETHER_ADDR_LEN)) {
1045 memset(pfiltbl, 0, sizeof(pfiltbl));
1046 memset(hashtbl, 0, sizeof(hashtbl));
1047 rxfilt &= ~MUE_RFE_CTL_MULTICAST_HASH;
1048 ETHER_UNLOCK(ec);
1049 goto allmulti;
1050 }
1051 if (i < MUE_NUM_ADDR_FILTX) {
1052 /* Use perfect address table if possible. */
1053 pfiltbl[i][0] = MUE_ENADDR_HI(enm->enm_addrlo) |
1054 MUE_ADDR_FILTX_VALID;
1055 pfiltbl[i][1] = MUE_ENADDR_LO(enm->enm_addrlo);
1056 } else {
1057 /* Otherwise, use hash table. */
1058 rxfilt |= MUE_RFE_CTL_MULTICAST_HASH;
1059 h = (ether_crc32_be(enm->enm_addrlo,
1060 ETHER_ADDR_LEN) >> 23) & 0x1ff;
1061 hashtbl[h / 32] |= 1 << (h % 32);
1062 }
1063 i++;
1064 ETHER_NEXT_MULTI(step, enm);
1065 }
1066 ETHER_UNLOCK(ec);
1067 rxfilt |= MUE_RFE_CTL_PERFECT;
1068 ifp->if_flags &= ~IFF_ALLMULTI;
1069 if (rxfilt & MUE_RFE_CTL_MULTICAST_HASH)
1070 DPRINTF(un, "perfect filter and hash tables\n");
1071 else
1072 DPRINTF(un, "perfect filter\n");
1073 }
1074
1075 for (i = 0; i < MUE_NUM_ADDR_FILTX; i++) {
1076 hireg = (un->un_flags & LAN7500) ?
1077 MUE_7500_ADDR_FILTX(i) : MUE_7800_ADDR_FILTX(i);
1078 loreg = hireg + 4;
1079 mue_csr_write(un, hireg, 0);
1080 mue_csr_write(un, loreg, pfiltbl[i][1]);
1081 mue_csr_write(un, hireg, pfiltbl[i][0]);
1082 }
1083
1084 mue_dataport_write(un, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN,
1085 MUE_DP_SEL_VHF_HASH_LEN, hashtbl);
1086
1087 mue_csr_write(un, reg, rxfilt);
1088 }
1089
1090 static void
1091 mue_sethwcsum(struct usbnet *un)
1092 {
1093 struct ifnet * const ifp = usbnet_ifp(un);
1094 uint32_t reg, val;
1095
1096 reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
1097 val = mue_csr_read(un, reg);
1098
1099 if (ifp->if_capenable & IFCAP_CSUM_IPv4_Rx) {
1100 DPRINTF(un, "RX IPv4 hwcsum enabled\n");
1101 val |= MUE_RFE_CTL_IP_COE;
1102 } else {
1103 DPRINTF(un, "RX IPv4 hwcsum disabled\n");
1104 val &= ~MUE_RFE_CTL_IP_COE;
1105 }
1106
1107 if (ifp->if_capenable &
1108 (IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
1109 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx)) {
1110 DPRINTF(un, "RX L4 hwcsum enabled\n");
1111 val |= MUE_RFE_CTL_TCPUDP_COE;
1112 } else {
1113 DPRINTF(un, "RX L4 hwcsum disabled\n");
1114 val &= ~MUE_RFE_CTL_TCPUDP_COE;
1115 }
1116
1117 val &= ~MUE_RFE_CTL_VLAN_FILTER;
1118
1119 mue_csr_write(un, reg, val);
1120 }
1121
1122 static void
1123 mue_setmtu(struct usbnet *un)
1124 {
1125 struct ifnet * const ifp = usbnet_ifp(un);
1126 uint32_t val;
1127
1128 /* Set the maximum frame size. */
1129 MUE_CLRBIT(un, MUE_MAC_RX, MUE_MAC_RX_RXEN);
1130 val = mue_csr_read(un, MUE_MAC_RX);
1131 val &= ~MUE_MAC_RX_MAX_SIZE_MASK;
1132 val |= MUE_MAC_RX_MAX_LEN(MUE_FRAME_LEN(ifp->if_mtu));
1133 mue_csr_write(un, MUE_MAC_RX, val);
1134 MUE_SETBIT(un, MUE_MAC_RX, MUE_MAC_RX_RXEN);
1135 }
1136
1137 static void
1138 mue_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
1139 {
1140 struct ifnet * const ifp = usbnet_ifp(un);
1141 struct mue_rxbuf_hdr *hdrp;
1142 uint32_t rx_cmd_a;
1143 uint16_t pktlen;
1144 int csum;
1145 uint8_t *buf = c->unc_buf;
1146 bool v6;
1147
1148 usbnet_isowned_rx(un);
1149
1150 KASSERTMSG(total_len <= un->un_rx_bufsz, "%u vs %u",
1151 total_len, un->un_rx_bufsz);
1152
1153 do {
1154 if (__predict_false(total_len < sizeof(*hdrp))) {
1155 MUE_PRINTF(un, "packet length %u too short\n", total_len);
1156 ifp->if_ierrors++;
1157 return;
1158 }
1159
1160 hdrp = (struct mue_rxbuf_hdr *)buf;
1161 rx_cmd_a = le32toh(hdrp->rx_cmd_a);
1162
1163 if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_ERRORS)) {
1164 /*
1165 * We cannot use MUE_RX_CMD_A_RED bit here;
1166 * it is turned on in the cases of L3/L4
1167 * checksum errors which we handle below.
1168 */
1169 MUE_PRINTF(un, "rx_cmd_a: 0x%x\n", rx_cmd_a);
1170 ifp->if_ierrors++;
1171 return;
1172 }
1173
1174 pktlen = (uint16_t)(rx_cmd_a & MUE_RX_CMD_A_LEN_MASK);
1175 if (un->un_flags & LAN7500)
1176 pktlen -= 2;
1177
1178 if (__predict_false(pktlen < ETHER_HDR_LEN + ETHER_CRC_LEN ||
1179 pktlen > MCLBYTES - ETHER_ALIGN || /* XXX */
1180 pktlen + sizeof(*hdrp) > total_len)) {
1181 MUE_PRINTF(un, "invalid packet length %d\n", pktlen);
1182 ifp->if_ierrors++;
1183 return;
1184 }
1185
1186 if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_ICSM)) {
1187 csum = 0;
1188 } else {
1189 v6 = rx_cmd_a & MUE_RX_CMD_A_IPV;
1190 switch (rx_cmd_a & MUE_RX_CMD_A_PID) {
1191 case MUE_RX_CMD_A_PID_TCP:
1192 csum = v6 ?
1193 M_CSUM_TCPv6 : M_CSUM_IPv4 | M_CSUM_TCPv4;
1194 break;
1195 case MUE_RX_CMD_A_PID_UDP:
1196 csum = v6 ?
1197 M_CSUM_UDPv6 : M_CSUM_IPv4 | M_CSUM_UDPv4;
1198 break;
1199 case MUE_RX_CMD_A_PID_IP:
1200 csum = v6 ? 0 : M_CSUM_IPv4;
1201 break;
1202 default:
1203 csum = 0;
1204 break;
1205 }
1206 csum &= ifp->if_csum_flags_rx;
1207 if (__predict_false((csum & M_CSUM_IPv4) &&
1208 (rx_cmd_a & MUE_RX_CMD_A_ICE)))
1209 csum |= M_CSUM_IPv4_BAD;
1210 if (__predict_false((csum & ~M_CSUM_IPv4) &&
1211 (rx_cmd_a & MUE_RX_CMD_A_TCE)))
1212 csum |= M_CSUM_TCP_UDP_BAD;
1213 }
1214
1215 usbnet_enqueue(un, buf + sizeof(*hdrp), pktlen, csum,
1216 0, M_HASFCS);
1217
1218 /* Attention: sizeof(hdr) = 10 */
1219 pktlen = roundup(pktlen + sizeof(*hdrp), 4);
1220 if (pktlen > total_len)
1221 pktlen = total_len;
1222 total_len -= pktlen;
1223 buf += pktlen;
1224 } while (total_len > 0);
1225 }
1226
1227 static int
1228 mue_init_locked(struct ifnet *ifp)
1229 {
1230 struct usbnet * const un = ifp->if_softc;
1231
1232 if (usbnet_isdying(un)) {
1233 DPRINTF(un, "dying\n");
1234 return EIO;
1235 }
1236
1237 /* Cancel pending I/O and free all TX/RX buffers. */
1238 if (ifp->if_flags & IFF_RUNNING)
1239 usbnet_stop(un, ifp, 1);
1240
1241 mue_reset(un);
1242
1243 /* Set MAC address. */
1244 mue_set_macaddr(un);
1245
1246 /* Load the multicast filter. */
1247 mue_setiff(un);
1248
1249 /* TCP/UDP checksum offload engines. */
1250 mue_sethwcsum(un);
1251
1252 /* Set MTU. */
1253 mue_setmtu(un);
1254
1255 return usbnet_init_rx_tx(un);
1256 }
1257
1258 static int
1259 mue_init(struct ifnet *ifp)
1260 {
1261 struct usbnet * const un = ifp->if_softc;
1262 int rv;
1263
1264 usbnet_lock(un);
1265 rv = mue_init_locked(ifp);
1266 usbnet_unlock(un);
1267
1268 return rv;
1269 }
1270
1271 static int
1272 mue_ioctl_cb(struct ifnet *ifp, u_long cmd, void *data)
1273 {
1274 struct usbnet * const un = ifp->if_softc;
1275
1276 switch (cmd) {
1277 case SIOCSIFFLAGS:
1278 case SIOCSETHERCAP:
1279 case SIOCADDMULTI:
1280 case SIOCDELMULTI:
1281 mue_setiff(un);
1282 break;
1283 case SIOCSIFCAP:
1284 mue_sethwcsum(un);
1285 break;
1286 case SIOCSIFMTU:
1287 mue_setmtu(un);
1288 break;
1289 default:
1290 break;
1291 }
1292
1293 return 0;
1294 }
1295
1296 static void
1297 mue_reset(struct usbnet *un)
1298 {
1299 if (usbnet_isdying(un))
1300 return;
1301
1302 /* Wait a little while for the chip to get its brains in order. */
1303 usbd_delay_ms(un->un_udev, 1);
1304
1305 // mue_chip_init(un); /* XXX */
1306 }
1307
1308 static void
1309 mue_stop_cb(struct ifnet *ifp, int disable)
1310 {
1311 struct usbnet * const un = ifp->if_softc;
1312
1313 mue_reset(un);
1314 }
1315
1316 #ifdef _MODULE
1317 #include "ioconf.c"
1318 #endif
1319
1320 USBNET_MODULE(mue)
1321