if_run.c revision 1.3.2.2
1 1.3.2.2 mrg /* $NetBSD: if_run.c,v 1.3.2.2 2012/06/02 11:09:29 mrg Exp $ */ 2 1.3.2.2 mrg /* $OpenBSD: if_run.c,v 1.90 2012/03/24 15:11:04 jsg Exp $ */ 3 1.3.2.2 mrg 4 1.3.2.2 mrg /*- 5 1.3.2.2 mrg * Copyright (c) 2008-2010 Damien Bergamini <damien.bergamini (at) free.fr> 6 1.3.2.2 mrg * 7 1.3.2.2 mrg * Permission to use, copy, modify, and distribute this software for any 8 1.3.2.2 mrg * purpose with or without fee is hereby granted, provided that the above 9 1.3.2.2 mrg * copyright notice and this permission notice appear in all copies. 10 1.3.2.2 mrg * 11 1.3.2.2 mrg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 1.3.2.2 mrg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 1.3.2.2 mrg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 1.3.2.2 mrg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 1.3.2.2 mrg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 1.3.2.2 mrg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 1.3.2.2 mrg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 1.3.2.2 mrg */ 19 1.3.2.2 mrg 20 1.3.2.2 mrg /*- 21 1.3.2.2 mrg * Ralink Technology RT2700U/RT2800U/RT3000U chipset driver. 22 1.3.2.2 mrg * http://www.ralinktech.com/ 23 1.3.2.2 mrg */ 24 1.3.2.2 mrg 25 1.3.2.2 mrg #include <sys/cdefs.h> 26 1.3.2.2 mrg __KERNEL_RCSID(0, "$NetBSD: if_run.c,v 1.3.2.2 2012/06/02 11:09:29 mrg Exp $"); 27 1.3.2.2 mrg 28 1.3.2.2 mrg #include <sys/param.h> 29 1.3.2.2 mrg #include <sys/sockio.h> 30 1.3.2.2 mrg #include <sys/sysctl.h> 31 1.3.2.2 mrg #include <sys/mbuf.h> 32 1.3.2.2 mrg #include <sys/kernel.h> 33 1.3.2.2 mrg #include <sys/socket.h> 34 1.3.2.2 mrg #include <sys/systm.h> 35 1.3.2.2 mrg #include <sys/malloc.h> 36 1.3.2.2 mrg #include <sys/callout.h> 37 1.3.2.2 mrg #include <sys/module.h> 38 1.3.2.2 mrg #include <sys/conf.h> 39 1.3.2.2 mrg #include <sys/device.h> 40 1.3.2.2 mrg 41 1.3.2.2 mrg #include <sys/bus.h> 42 1.3.2.2 mrg #include <machine/endian.h> 43 1.3.2.2 mrg #include <sys/intr.h> 44 1.3.2.2 mrg 45 1.3.2.2 mrg #include <net/bpf.h> 46 1.3.2.2 mrg #include <net/if.h> 47 1.3.2.2 mrg #include <net/if_arp.h> 48 1.3.2.2 mrg #include <net/if_dl.h> 49 1.3.2.2 mrg #include <net/if_ether.h> 50 1.3.2.2 mrg #include <net/if_media.h> 51 1.3.2.2 mrg #include <net/if_types.h> 52 1.3.2.2 mrg 53 1.3.2.2 mrg #include <net80211/ieee80211_var.h> 54 1.3.2.2 mrg #include <net80211/ieee80211_amrr.h> 55 1.3.2.2 mrg #include <net80211/ieee80211_radiotap.h> 56 1.3.2.2 mrg 57 1.3.2.2 mrg #include <dev/firmload.h> 58 1.3.2.2 mrg 59 1.3.2.2 mrg #include <dev/usb/usb.h> 60 1.3.2.2 mrg #include <dev/usb/usbdi.h> 61 1.3.2.2 mrg #include <dev/usb/usbdivar.h> 62 1.3.2.2 mrg #include <dev/usb/usbdi_util.h> 63 1.3.2.2 mrg #include <dev/usb/usbdevs.h> 64 1.3.2.2 mrg 65 1.3.2.2 mrg #include <dev/ic/rt2860reg.h> /* shared with ral(4) */ 66 1.3.2.2 mrg #include <dev/usb/if_runvar.h> 67 1.3.2.2 mrg 68 1.3.2.2 mrg #ifdef USB_DEBUG 69 1.3.2.2 mrg #define RUN_DEBUG 70 1.3.2.2 mrg #endif 71 1.3.2.2 mrg 72 1.3.2.2 mrg #ifdef RUN_DEBUG 73 1.3.2.2 mrg #define DPRINTF(x) do { if (run_debug) printf x; } while (0) 74 1.3.2.2 mrg #define DPRINTFN(n, x) do { if (run_debug >= (n)) printf x; } while (0) 75 1.3.2.2 mrg int run_debug = 0; 76 1.3.2.2 mrg #else 77 1.3.2.2 mrg #define DPRINTF(x) 78 1.3.2.2 mrg #define DPRINTFN(n, x) 79 1.3.2.2 mrg #endif 80 1.3.2.2 mrg 81 1.3.2.2 mrg #define USB_ID(v, p) { USB_VENDOR_##v, USB_PRODUCT_##v##_##p } 82 1.3.2.2 mrg static const struct usb_devno run_devs[] = { 83 1.3.2.2 mrg USB_ID(ABOCOM, RT2770), 84 1.3.2.2 mrg USB_ID(ABOCOM, RT2870), 85 1.3.2.2 mrg USB_ID(ABOCOM, RT3070), 86 1.3.2.2 mrg USB_ID(ABOCOM, RT3071), 87 1.3.2.2 mrg USB_ID(ABOCOM, RT3072), 88 1.3.2.2 mrg USB_ID(ABOCOM2, RT2870_1), 89 1.3.2.2 mrg USB_ID(ACCTON, RT2770), 90 1.3.2.2 mrg USB_ID(ACCTON, RT2870_1), 91 1.3.2.2 mrg USB_ID(ACCTON, RT2870_2), 92 1.3.2.2 mrg USB_ID(ACCTON, RT2870_3), 93 1.3.2.2 mrg USB_ID(ACCTON, RT2870_4), 94 1.3.2.2 mrg USB_ID(ACCTON, RT2870_5), 95 1.3.2.2 mrg USB_ID(ACCTON, RT3070), 96 1.3.2.2 mrg USB_ID(ACCTON, RT3070_1), 97 1.3.2.2 mrg USB_ID(ACCTON, RT3070_2), 98 1.3.2.2 mrg USB_ID(ACCTON, RT3070_3), 99 1.3.2.2 mrg USB_ID(ACCTON, RT3070_4), 100 1.3.2.2 mrg USB_ID(ACCTON, RT3070_5), 101 1.3.2.2 mrg USB_ID(ACCTON, RT3070_6), 102 1.3.2.2 mrg USB_ID(AIRTIES, RT3070), 103 1.3.2.2 mrg USB_ID(AIRTIES, RT3070_2), 104 1.3.2.2 mrg USB_ID(ALLWIN, RT2070), 105 1.3.2.2 mrg USB_ID(ALLWIN, RT2770), 106 1.3.2.2 mrg USB_ID(ALLWIN, RT2870), 107 1.3.2.2 mrg USB_ID(ALLWIN, RT3070), 108 1.3.2.2 mrg USB_ID(ALLWIN, RT3071), 109 1.3.2.2 mrg USB_ID(ALLWIN, RT3072), 110 1.3.2.2 mrg USB_ID(ALLWIN, RT3572), 111 1.3.2.2 mrg USB_ID(AMIGO, RT2870_1), 112 1.3.2.2 mrg USB_ID(AMIGO, RT2870_2), 113 1.3.2.2 mrg USB_ID(AMIT, CGWLUSB2GNR), 114 1.3.2.2 mrg USB_ID(AMIT, RT2870_1), 115 1.3.2.2 mrg USB_ID(AMIT2, RT2870), 116 1.3.2.2 mrg USB_ID(ASUSTEK, RT2870_1), 117 1.3.2.2 mrg USB_ID(ASUSTEK, RT2870_2), 118 1.3.2.2 mrg USB_ID(ASUSTEK, RT2870_3), 119 1.3.2.2 mrg USB_ID(ASUSTEK, RT2870_4), 120 1.3.2.2 mrg USB_ID(ASUSTEK, RT2870_5), 121 1.3.2.2 mrg USB_ID(ASUSTEK, RT3070), 122 1.3.2.2 mrg USB_ID(ASUSTEK, RT3070_1), 123 1.3.2.2 mrg USB_ID(ASUSTEK2, USBN11), 124 1.3.2.2 mrg USB_ID(AZUREWAVE, RT2870_1), 125 1.3.2.2 mrg USB_ID(AZUREWAVE, RT2870_2), 126 1.3.2.2 mrg USB_ID(AZUREWAVE, RT3070), 127 1.3.2.2 mrg USB_ID(AZUREWAVE, RT3070_2), 128 1.3.2.2 mrg USB_ID(AZUREWAVE, RT3070_3), 129 1.3.2.2 mrg USB_ID(AZUREWAVE, RT3070_4), 130 1.3.2.2 mrg USB_ID(AZUREWAVE, RT3070_5), 131 1.3.2.2 mrg USB_ID(BELKIN, F5D8053V3), 132 1.3.2.2 mrg USB_ID(BELKIN, F5D8055), 133 1.3.2.2 mrg USB_ID(BELKIN, F5D8055V2), 134 1.3.2.2 mrg USB_ID(BELKIN, F6D4050V1), 135 1.3.2.2 mrg USB_ID(BELKIN, F6D4050V2), 136 1.3.2.2 mrg USB_ID(BELKIN, F7D1101V2), 137 1.3.2.2 mrg USB_ID(BELKIN, RT2870_1), 138 1.3.2.2 mrg USB_ID(BELKIN, RT2870_2), 139 1.3.2.2 mrg USB_ID(BEWAN, RT3070), 140 1.3.2.2 mrg USB_ID(CISCOLINKSYS, AE1000), 141 1.3.2.2 mrg USB_ID(CISCOLINKSYS, AM10), 142 1.3.2.2 mrg USB_ID(CISCOLINKSYS2, RT3070), 143 1.3.2.2 mrg USB_ID(CISCOLINKSYS3, RT3070), 144 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT2870_1), 145 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT2870_2), 146 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT2870_3), 147 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT2870_4), 148 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT2870_5), 149 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT2870_6), 150 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT2870_7), 151 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT2870_8), 152 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT3070_1), 153 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT3070_2), 154 1.3.2.2 mrg USB_ID(CONCEPTRONIC, RT3070_3), 155 1.3.2.2 mrg USB_ID(COREGA, CGWLUSB300GNM), 156 1.3.2.2 mrg USB_ID(COREGA, RT2870_1), 157 1.3.2.2 mrg USB_ID(COREGA, RT2870_2), 158 1.3.2.2 mrg USB_ID(COREGA, RT2870_3), 159 1.3.2.2 mrg USB_ID(COREGA, RT3070), 160 1.3.2.2 mrg USB_ID(CYBERTAN, RT2870), 161 1.3.2.2 mrg USB_ID(DLINK, RT2870), 162 1.3.2.2 mrg USB_ID(DLINK, RT3072), 163 1.3.2.2 mrg USB_ID(DLINK2, DWA130), 164 1.3.2.2 mrg USB_ID(DLINK2, RT2870_1), 165 1.3.2.2 mrg USB_ID(DLINK2, RT2870_2), 166 1.3.2.2 mrg USB_ID(DLINK2, RT3070_1), 167 1.3.2.2 mrg USB_ID(DLINK2, RT3070_2), 168 1.3.2.2 mrg USB_ID(DLINK2, RT3070_3), 169 1.3.2.2 mrg USB_ID(DLINK2, RT3070_4), 170 1.3.2.2 mrg USB_ID(DLINK2, RT3070_5), 171 1.3.2.2 mrg USB_ID(DLINK2, RT3072), 172 1.3.2.2 mrg USB_ID(DLINK2, RT3072_1), 173 1.3.2.2 mrg USB_ID(DVICO, RT3070), 174 1.3.2.2 mrg USB_ID(EDIMAX, EW7717), 175 1.3.2.2 mrg USB_ID(EDIMAX, EW7718), 176 1.3.2.2 mrg USB_ID(EDIMAX, EW7722UTN), 177 1.3.2.2 mrg USB_ID(EDIMAX, RT2870_1), 178 1.3.2.2 mrg USB_ID(ENCORE, RT3070), 179 1.3.2.2 mrg USB_ID(ENCORE, RT3070_2), 180 1.3.2.2 mrg USB_ID(ENCORE, RT3070_3), 181 1.3.2.2 mrg USB_ID(GIGABYTE, GNWB31N), 182 1.3.2.2 mrg USB_ID(GIGABYTE, GNWB32L), 183 1.3.2.2 mrg USB_ID(GIGABYTE, RT2870_1), 184 1.3.2.2 mrg USB_ID(GIGASET, RT3070_1), 185 1.3.2.2 mrg USB_ID(GIGASET, RT3070_2), 186 1.3.2.2 mrg USB_ID(GUILLEMOT, HWNU300), 187 1.3.2.2 mrg USB_ID(HAWKING, HWUN2), 188 1.3.2.2 mrg USB_ID(HAWKING, RT2870_1), 189 1.3.2.2 mrg USB_ID(HAWKING, RT2870_2), 190 1.3.2.2 mrg USB_ID(HAWKING, RT2870_3), 191 1.3.2.2 mrg USB_ID(HAWKING, RT2870_4), 192 1.3.2.2 mrg USB_ID(HAWKING, RT2870_5), 193 1.3.2.2 mrg USB_ID(HAWKING, RT3070), 194 1.3.2.2 mrg USB_ID(IODATA, RT3072_1), 195 1.3.2.2 mrg USB_ID(IODATA, RT3072_2), 196 1.3.2.2 mrg USB_ID(IODATA, RT3072_3), 197 1.3.2.2 mrg USB_ID(IODATA, RT3072_4), 198 1.3.2.2 mrg USB_ID(LINKSYS4, RT3070), 199 1.3.2.2 mrg USB_ID(LINKSYS4, WUSB100), 200 1.3.2.2 mrg USB_ID(LINKSYS4, WUSB54GC_3), 201 1.3.2.2 mrg USB_ID(LINKSYS4, WUSB600N), 202 1.3.2.2 mrg USB_ID(LINKSYS4, WUSB600NV2), 203 1.3.2.2 mrg USB_ID(LOGITEC, LANW300NU2), 204 1.3.2.2 mrg USB_ID(LOGITEC, RT2870_1), 205 1.3.2.2 mrg USB_ID(LOGITEC, RT2870_2), 206 1.3.2.2 mrg USB_ID(LOGITEC, RT2870_3), 207 1.3.2.2 mrg USB_ID(LOGITEC, RT3020), 208 1.3.2.2 mrg USB_ID(MELCO, RT2870_1), 209 1.3.2.2 mrg USB_ID(MELCO, RT2870_2), 210 1.3.2.2 mrg USB_ID(MELCO, WLIUCAG300N), 211 1.3.2.2 mrg USB_ID(MELCO, WLIUCG300N), 212 1.3.2.2 mrg USB_ID(MELCO, WLIUCG301N), 213 1.3.2.2 mrg USB_ID(MELCO, WLIUCGN), 214 1.3.2.2 mrg USB_ID(MELCO, WLIUCGNHP), 215 1.3.2.2 mrg USB_ID(MELCO, WLIUCGNM), 216 1.3.2.2 mrg USB_ID(MELCO, WLIUCGNM2T), 217 1.3.2.2 mrg USB_ID(MOTOROLA4, RT2770), 218 1.3.2.2 mrg USB_ID(MOTOROLA4, RT3070), 219 1.3.2.2 mrg USB_ID(MSI, RT3070), 220 1.3.2.2 mrg USB_ID(MSI, RT3070_2), 221 1.3.2.2 mrg USB_ID(MSI, RT3070_3), 222 1.3.2.2 mrg USB_ID(MSI, RT3070_4), 223 1.3.2.2 mrg USB_ID(MSI, RT3070_5), 224 1.3.2.2 mrg USB_ID(MSI, RT3070_6), 225 1.3.2.2 mrg USB_ID(MSI, RT3070_7), 226 1.3.2.2 mrg USB_ID(MSI, RT3070_8), 227 1.3.2.2 mrg USB_ID(MSI, RT3070_9), 228 1.3.2.2 mrg USB_ID(MSI, RT3070_10), 229 1.3.2.2 mrg USB_ID(MSI, RT3070_11), 230 1.3.2.2 mrg USB_ID(MSI, RT3070_12), 231 1.3.2.2 mrg USB_ID(MSI, RT3070_13), 232 1.3.2.2 mrg USB_ID(MSI, RT3070_14), 233 1.3.2.2 mrg USB_ID(MSI, RT3070_15), 234 1.3.2.2 mrg USB_ID(OVISLINK, RT3071), 235 1.3.2.2 mrg USB_ID(OVISLINK, RT3072), 236 1.3.2.2 mrg USB_ID(PARA, RT3070), 237 1.3.2.2 mrg USB_ID(PEGATRON, RT2870), 238 1.3.2.2 mrg USB_ID(PEGATRON, RT3070), 239 1.3.2.2 mrg USB_ID(PEGATRON, RT3070_2), 240 1.3.2.2 mrg USB_ID(PEGATRON, RT3070_3), 241 1.3.2.2 mrg USB_ID(PEGATRON, RT3072), 242 1.3.2.2 mrg USB_ID(PHILIPS, RT2870), 243 1.3.2.2 mrg USB_ID(PLANEX2, GWUS300MINIS), 244 1.3.2.2 mrg USB_ID(PLANEX2, GWUSMICRO300), 245 1.3.2.2 mrg USB_ID(PLANEX2, GWUSMICRON), 246 1.3.2.2 mrg USB_ID(PLANEX2, GWUS300MINIX), 247 1.3.2.2 mrg USB_ID(PLANEX2, RT3070), 248 1.3.2.2 mrg USB_ID(QCOM, RT2870), 249 1.3.2.2 mrg USB_ID(QUANTA, RT3070), 250 1.3.2.2 mrg USB_ID(RALINK, RT2070), 251 1.3.2.2 mrg USB_ID(RALINK, RT2770), 252 1.3.2.2 mrg USB_ID(RALINK, RT2870), 253 1.3.2.2 mrg USB_ID(RALINK, RT3070), 254 1.3.2.2 mrg USB_ID(RALINK, RT3071), 255 1.3.2.2 mrg USB_ID(RALINK, RT3072), 256 1.3.2.2 mrg USB_ID(RALINK, RT3370), 257 1.3.2.2 mrg USB_ID(RALINK, RT3572), 258 1.3.2.2 mrg USB_ID(RALINK, RT8070), 259 1.3.2.2 mrg USB_ID(SAMSUNG, RT2870_1), 260 1.3.2.2 mrg USB_ID(SENAO, RT2870_1), 261 1.3.2.2 mrg USB_ID(SENAO, RT2870_2), 262 1.3.2.2 mrg USB_ID(SENAO, RT2870_3), 263 1.3.2.2 mrg USB_ID(SENAO, RT2870_4), 264 1.3.2.2 mrg USB_ID(SENAO, RT3070), 265 1.3.2.2 mrg USB_ID(SENAO, RT3071), 266 1.3.2.2 mrg USB_ID(SENAO, RT3072), 267 1.3.2.2 mrg USB_ID(SENAO, RT3072_2), 268 1.3.2.2 mrg USB_ID(SENAO, RT3072_3), 269 1.3.2.2 mrg USB_ID(SENAO, RT3072_4), 270 1.3.2.2 mrg USB_ID(SENAO, RT3072_5), 271 1.3.2.2 mrg USB_ID(SITECOMEU, RT2870_1), 272 1.3.2.2 mrg USB_ID(SITECOMEU, RT2870_2), 273 1.3.2.2 mrg USB_ID(SITECOMEU, RT2870_3), 274 1.3.2.2 mrg USB_ID(SITECOMEU, RT3070_1), 275 1.3.2.2 mrg USB_ID(SITECOMEU, RT3072_3), 276 1.3.2.2 mrg USB_ID(SITECOMEU, RT3072_4), 277 1.3.2.2 mrg USB_ID(SITECOMEU, RT3072_5), 278 1.3.2.2 mrg USB_ID(SITECOMEU, WL302), 279 1.3.2.2 mrg USB_ID(SITECOMEU, WL315), 280 1.3.2.2 mrg USB_ID(SITECOMEU, WL321), 281 1.3.2.2 mrg USB_ID(SITECOMEU, WL324), 282 1.3.2.2 mrg USB_ID(SITECOMEU, WL329), 283 1.3.2.2 mrg USB_ID(SITECOMEU, WL343), 284 1.3.2.2 mrg USB_ID(SITECOMEU, WL344), 285 1.3.2.2 mrg USB_ID(SITECOMEU, WL345), 286 1.3.2.2 mrg USB_ID(SITECOMEU, WL349V4), 287 1.3.2.2 mrg USB_ID(SITECOMEU, WL608), 288 1.3.2.2 mrg USB_ID(SITECOMEU, WLA4000), 289 1.3.2.2 mrg USB_ID(SITECOMEU, WLA5000), 290 1.3.2.2 mrg USB_ID(SPARKLAN, RT2870_1), 291 1.3.2.2 mrg USB_ID(SPARKLAN, RT2870_2), 292 1.3.2.2 mrg USB_ID(SPARKLAN, RT3070), 293 1.3.2.2 mrg USB_ID(SWEEX2, LW153), 294 1.3.2.2 mrg USB_ID(SWEEX2, LW303), 295 1.3.2.2 mrg USB_ID(SWEEX2, LW313), 296 1.3.2.2 mrg USB_ID(TOSHIBA, RT3070), 297 1.3.2.2 mrg USB_ID(UMEDIA, RT2870_1), 298 1.3.2.2 mrg USB_ID(UMEDIA, TEW645UB), 299 1.3.2.2 mrg USB_ID(ZCOM, RT2870_1), 300 1.3.2.2 mrg USB_ID(ZCOM, RT2870_2), 301 1.3.2.2 mrg USB_ID(ZINWELL, RT2870_1), 302 1.3.2.2 mrg USB_ID(ZINWELL, RT2870_2), 303 1.3.2.2 mrg USB_ID(ZINWELL, RT3070), 304 1.3.2.2 mrg USB_ID(ZINWELL, RT3072), 305 1.3.2.2 mrg USB_ID(ZINWELL, RT3072_2), 306 1.3.2.2 mrg USB_ID(ZYXEL, NWD2105), 307 1.3.2.2 mrg USB_ID(ZYXEL, NWD211AN), 308 1.3.2.2 mrg USB_ID(ZYXEL, RT2870_1), 309 1.3.2.2 mrg USB_ID(ZYXEL, RT2870_2), 310 1.3.2.2 mrg USB_ID(ZYXEL, RT3070), 311 1.3.2.2 mrg }; 312 1.3.2.2 mrg 313 1.3.2.2 mrg static int run_match(device_t, cfdata_t, void *); 314 1.3.2.2 mrg static void run_attach(device_t, device_t, void *); 315 1.3.2.2 mrg static int run_detach(device_t, int); 316 1.3.2.2 mrg static int run_activate(device_t, enum devact); 317 1.3.2.2 mrg 318 1.3.2.2 mrg CFATTACH_DECL_NEW(run, sizeof(struct run_softc), 319 1.3.2.2 mrg run_match, run_attach, run_detach, run_activate); 320 1.3.2.2 mrg 321 1.3.2.2 mrg static int run_alloc_rx_ring(struct run_softc *); 322 1.3.2.2 mrg static void run_free_rx_ring(struct run_softc *); 323 1.3.2.2 mrg static int run_alloc_tx_ring(struct run_softc *, int); 324 1.3.2.2 mrg static void run_free_tx_ring(struct run_softc *, int); 325 1.3.2.2 mrg static int run_load_microcode(struct run_softc *); 326 1.3.2.2 mrg static int run_reset(struct run_softc *); 327 1.3.2.2 mrg static int run_read(struct run_softc *, uint16_t, uint32_t *); 328 1.3.2.2 mrg static int run_read_region_1(struct run_softc *, uint16_t, 329 1.3.2.2 mrg uint8_t *, int); 330 1.3.2.2 mrg static int run_write_2(struct run_softc *, uint16_t, uint16_t); 331 1.3.2.2 mrg static int run_write(struct run_softc *, uint16_t, uint32_t); 332 1.3.2.2 mrg static int run_write_region_1(struct run_softc *, uint16_t, 333 1.3.2.2 mrg const uint8_t *, int); 334 1.3.2.2 mrg static int run_set_region_4(struct run_softc *, uint16_t, 335 1.3.2.2 mrg uint32_t, int); 336 1.3.2.2 mrg static int run_efuse_read_2(struct run_softc *, uint16_t, 337 1.3.2.2 mrg uint16_t *); 338 1.3.2.2 mrg static int run_eeprom_read_2(struct run_softc *, uint16_t, 339 1.3.2.2 mrg uint16_t *); 340 1.3.2.2 mrg static int run_rt2870_rf_write(struct run_softc *, uint8_t, 341 1.3.2.2 mrg uint32_t); 342 1.3.2.2 mrg static int run_rt3070_rf_read(struct run_softc *, uint8_t, 343 1.3.2.2 mrg uint8_t *); 344 1.3.2.2 mrg static int run_rt3070_rf_write(struct run_softc *, uint8_t, 345 1.3.2.2 mrg uint8_t); 346 1.3.2.2 mrg static int run_bbp_read(struct run_softc *, uint8_t, uint8_t *); 347 1.3.2.2 mrg static int run_bbp_write(struct run_softc *, uint8_t, uint8_t); 348 1.3.2.2 mrg static int run_mcu_cmd(struct run_softc *, uint8_t, uint16_t); 349 1.3.2.2 mrg static const char * run_get_rf(int); 350 1.3.2.2 mrg static int run_read_eeprom(struct run_softc *); 351 1.3.2.2 mrg static struct ieee80211_node * 352 1.3.2.2 mrg run_node_alloc(struct ieee80211_node_table *); 353 1.3.2.2 mrg static int run_media_change(struct ifnet *); 354 1.3.2.2 mrg static void run_next_scan(void *); 355 1.3.2.2 mrg static void run_task(void *); 356 1.3.2.2 mrg static void run_do_async(struct run_softc *, 357 1.3.2.2 mrg void (*)(struct run_softc *, void *), void *, int); 358 1.3.2.2 mrg static int run_newstate(struct ieee80211com *, 359 1.3.2.2 mrg enum ieee80211_state, int); 360 1.3.2.2 mrg static void run_newstate_cb(struct run_softc *, void *); 361 1.3.2.2 mrg static int run_updateedca(struct ieee80211com *); 362 1.3.2.2 mrg static void run_updateedca_cb(struct run_softc *, void *); 363 1.3.2.2 mrg #ifdef RUN_HWCRYPTO 364 1.3.2.2 mrg static int run_set_key(struct ieee80211com *, 365 1.3.2.2 mrg const struct ieee80211_key *, const uint8_t *); 366 1.3.2.2 mrg static void run_set_key_cb(struct run_softc *, void *); 367 1.3.2.2 mrg static int run_delete_key(struct ieee80211com *, 368 1.3.2.2 mrg const struct ieee80211_key *); 369 1.3.2.2 mrg static void run_delete_key_cb(struct run_softc *, void *); 370 1.3.2.2 mrg #endif 371 1.3.2.2 mrg static void run_calibrate_to(void *); 372 1.3.2.2 mrg static void run_calibrate_cb(struct run_softc *, void *); 373 1.3.2.2 mrg static void run_newassoc(struct ieee80211_node *, int); 374 1.3.2.2 mrg static void run_rx_frame(struct run_softc *, uint8_t *, int); 375 1.3.2.2 mrg static void run_rxeof(usbd_xfer_handle, usbd_private_handle, 376 1.3.2.2 mrg usbd_status); 377 1.3.2.2 mrg static void run_txeof(usbd_xfer_handle, usbd_private_handle, 378 1.3.2.2 mrg usbd_status); 379 1.3.2.2 mrg static int run_tx(struct run_softc *, struct mbuf *, 380 1.3.2.2 mrg struct ieee80211_node *); 381 1.3.2.2 mrg static void run_start(struct ifnet *); 382 1.3.2.2 mrg static void run_watchdog(struct ifnet *); 383 1.3.2.2 mrg static int run_ioctl(struct ifnet *, u_long, void *); 384 1.3.2.2 mrg static void run_select_chan_group(struct run_softc *, int); 385 1.3.2.2 mrg static void run_set_agc(struct run_softc *, uint8_t); 386 1.3.2.2 mrg static void run_set_rx_antenna(struct run_softc *, int); 387 1.3.2.2 mrg static void run_rt2870_set_chan(struct run_softc *, u_int); 388 1.3.2.2 mrg static void run_rt3070_set_chan(struct run_softc *, u_int); 389 1.3.2.2 mrg static void run_rt3572_set_chan(struct run_softc *, u_int); 390 1.3.2.2 mrg static int run_set_chan(struct run_softc *, 391 1.3.2.2 mrg struct ieee80211_channel *); 392 1.3.2.2 mrg static void run_enable_tsf_sync(struct run_softc *); 393 1.3.2.2 mrg static void run_enable_mrr(struct run_softc *); 394 1.3.2.2 mrg static void run_set_txpreamble(struct run_softc *); 395 1.3.2.2 mrg static void run_set_basicrates(struct run_softc *); 396 1.3.2.2 mrg static void run_set_leds(struct run_softc *, uint16_t); 397 1.3.2.2 mrg static void run_set_bssid(struct run_softc *, const uint8_t *); 398 1.3.2.2 mrg static void run_set_macaddr(struct run_softc *, const uint8_t *); 399 1.3.2.2 mrg static void run_updateslot(struct ifnet *); 400 1.3.2.2 mrg static void run_updateslot_cb(struct run_softc *, void *); 401 1.3.2.2 mrg static int8_t run_rssi2dbm(struct run_softc *, uint8_t, uint8_t); 402 1.3.2.2 mrg static int run_bbp_init(struct run_softc *); 403 1.3.2.2 mrg static int run_rt3070_rf_init(struct run_softc *); 404 1.3.2.2 mrg static int run_rt3070_filter_calib(struct run_softc *, uint8_t, 405 1.3.2.2 mrg uint8_t, uint8_t *); 406 1.3.2.2 mrg static void run_rt3070_rf_setup(struct run_softc *); 407 1.3.2.2 mrg static int run_txrx_enable(struct run_softc *); 408 1.3.2.2 mrg static int run_init(struct ifnet *); 409 1.3.2.2 mrg static void run_stop(struct ifnet *, int); 410 1.3.2.2 mrg #ifndef IEEE80211_STA_ONLY 411 1.3.2.2 mrg static int run_setup_beacon(struct run_softc *); 412 1.3.2.2 mrg #endif 413 1.3.2.2 mrg 414 1.3.2.2 mrg static const struct { 415 1.3.2.2 mrg uint32_t reg; 416 1.3.2.2 mrg uint32_t val; 417 1.3.2.2 mrg } rt2870_def_mac[] = { 418 1.3.2.2 mrg RT2870_DEF_MAC 419 1.3.2.2 mrg }; 420 1.3.2.2 mrg 421 1.3.2.2 mrg static const struct { 422 1.3.2.2 mrg uint8_t reg; 423 1.3.2.2 mrg uint8_t val; 424 1.3.2.2 mrg } rt2860_def_bbp[] = { 425 1.3.2.2 mrg RT2860_DEF_BBP 426 1.3.2.2 mrg }; 427 1.3.2.2 mrg 428 1.3.2.2 mrg static const struct rfprog { 429 1.3.2.2 mrg uint8_t chan; 430 1.3.2.2 mrg uint32_t r1, r2, r3, r4; 431 1.3.2.2 mrg } rt2860_rf2850[] = { 432 1.3.2.2 mrg RT2860_RF2850 433 1.3.2.2 mrg }; 434 1.3.2.2 mrg 435 1.3.2.2 mrg static const struct { 436 1.3.2.2 mrg uint8_t n, r, k; 437 1.3.2.2 mrg } rt3070_freqs[] = { 438 1.3.2.2 mrg RT3070_RF3052 439 1.3.2.2 mrg }; 440 1.3.2.2 mrg 441 1.3.2.2 mrg static const struct { 442 1.3.2.2 mrg uint8_t reg; 443 1.3.2.2 mrg uint8_t val; 444 1.3.2.2 mrg } rt3070_def_rf[] = { 445 1.3.2.2 mrg RT3070_DEF_RF 446 1.3.2.2 mrg }, rt3572_def_rf[] = { 447 1.3.2.2 mrg RT3572_DEF_RF 448 1.3.2.2 mrg }; 449 1.3.2.2 mrg 450 1.3.2.2 mrg static int 451 1.3.2.2 mrg firmware_load(const char *dname, const char *iname, uint8_t **ucodep, 452 1.3.2.2 mrg size_t *sizep) 453 1.3.2.2 mrg { 454 1.3.2.2 mrg firmware_handle_t fh; 455 1.3.2.2 mrg int error; 456 1.3.2.2 mrg 457 1.3.2.2 mrg if ((error = firmware_open(dname, iname, &fh)) != 0) 458 1.3.2.2 mrg return (error); 459 1.3.2.2 mrg *sizep = firmware_get_size(fh); 460 1.3.2.2 mrg if ((*ucodep = firmware_malloc(*sizep)) == NULL) { 461 1.3.2.2 mrg firmware_close(fh); 462 1.3.2.2 mrg return (ENOMEM); 463 1.3.2.2 mrg } 464 1.3.2.2 mrg if ((error = firmware_read(fh, 0, *ucodep, *sizep)) != 0) 465 1.3.2.2 mrg firmware_free(*ucodep, *sizep); 466 1.3.2.2 mrg firmware_close(fh); 467 1.3.2.2 mrg 468 1.3.2.2 mrg return (error); 469 1.3.2.2 mrg } 470 1.3.2.2 mrg 471 1.3.2.2 mrg static int 472 1.3.2.2 mrg run_match(device_t parent, cfdata_t match, void *aux) 473 1.3.2.2 mrg { 474 1.3.2.2 mrg struct usb_attach_arg *uaa = aux; 475 1.3.2.2 mrg 476 1.3.2.2 mrg return (usb_lookup(run_devs, uaa->vendor, uaa->product) != NULL) ? 477 1.3.2.2 mrg UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 478 1.3.2.2 mrg } 479 1.3.2.2 mrg 480 1.3.2.2 mrg static void 481 1.3.2.2 mrg run_attach(device_t parent, device_t self, void *aux) 482 1.3.2.2 mrg { 483 1.3.2.2 mrg struct run_softc *sc = device_private(self); 484 1.3.2.2 mrg struct usb_attach_arg *uaa = aux; 485 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 486 1.3.2.2 mrg struct ifnet *ifp = &sc->sc_if; 487 1.3.2.2 mrg usb_interface_descriptor_t *id; 488 1.3.2.2 mrg usb_endpoint_descriptor_t *ed; 489 1.3.2.2 mrg char *devinfop; 490 1.3.2.2 mrg int i, nrx, ntx, ntries, error; 491 1.3.2.2 mrg uint32_t ver; 492 1.3.2.2 mrg 493 1.3.2.2 mrg aprint_naive("\n"); 494 1.3.2.2 mrg aprint_normal("\n"); 495 1.3.2.2 mrg 496 1.3.2.2 mrg sc->sc_dev = self; 497 1.3.2.2 mrg sc->sc_udev = uaa->device; 498 1.3.2.2 mrg 499 1.3.2.2 mrg devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 500 1.3.2.2 mrg aprint_normal_dev(sc->sc_dev, "%s\n", devinfop); 501 1.3.2.2 mrg usbd_devinfo_free(devinfop); 502 1.3.2.2 mrg 503 1.3.2.2 mrg if (usbd_set_config_no(sc->sc_udev, 1, 0) != 0) { 504 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 505 1.3.2.2 mrg "could not set configuration no\n"); 506 1.3.2.2 mrg return; 507 1.3.2.2 mrg } 508 1.3.2.2 mrg 509 1.3.2.2 mrg /* get the first interface handle */ 510 1.3.2.2 mrg error = usbd_device2interface_handle(sc->sc_udev, 0, &sc->sc_iface); 511 1.3.2.2 mrg if (error != 0) { 512 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 513 1.3.2.2 mrg "could not get interface handle\n"); 514 1.3.2.2 mrg return; 515 1.3.2.2 mrg } 516 1.3.2.2 mrg 517 1.3.2.2 mrg /* 518 1.3.2.2 mrg * Find all bulk endpoints. There are 7 bulk endpoints: 1 for RX 519 1.3.2.2 mrg * and 6 for TX (4 EDCAs + HCCA + Prio). 520 1.3.2.2 mrg * Update 03-14-2009: some devices like the Planex GW-US300MiniS 521 1.3.2.2 mrg * seem to have only 4 TX bulk endpoints (Fukaumi Naoki). 522 1.3.2.2 mrg */ 523 1.3.2.2 mrg nrx = ntx = 0; 524 1.3.2.2 mrg id = usbd_get_interface_descriptor(sc->sc_iface); 525 1.3.2.2 mrg for (i = 0; i < id->bNumEndpoints; i++) { 526 1.3.2.2 mrg ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 527 1.3.2.2 mrg if (ed == NULL || UE_GET_XFERTYPE(ed->bmAttributes) != UE_BULK) 528 1.3.2.2 mrg continue; 529 1.3.2.2 mrg 530 1.3.2.2 mrg if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) { 531 1.3.2.2 mrg sc->rxq.pipe_no = ed->bEndpointAddress; 532 1.3.2.2 mrg nrx++; 533 1.3.2.2 mrg } else if (ntx < 4) { 534 1.3.2.2 mrg sc->txq[ntx].pipe_no = ed->bEndpointAddress; 535 1.3.2.2 mrg ntx++; 536 1.3.2.2 mrg } 537 1.3.2.2 mrg } 538 1.3.2.2 mrg /* make sure we've got them all */ 539 1.3.2.2 mrg if (nrx < 1 || ntx < 4) { 540 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, "missing endpoint\n"); 541 1.3.2.2 mrg return; 542 1.3.2.2 mrg } 543 1.3.2.2 mrg 544 1.3.2.2 mrg usb_init_task(&sc->sc_task, run_task, sc); 545 1.3.2.2 mrg callout_init(&sc->scan_to, 0); 546 1.3.2.2 mrg callout_setfunc(&sc->scan_to, run_next_scan, sc); 547 1.3.2.2 mrg callout_init(&sc->calib_to, 0); 548 1.3.2.2 mrg callout_setfunc(&sc->calib_to, run_calibrate_to, sc); 549 1.3.2.2 mrg 550 1.3.2.2 mrg sc->amrr.amrr_min_success_threshold = 1; 551 1.3.2.2 mrg sc->amrr.amrr_max_success_threshold = 10; 552 1.3.2.2 mrg 553 1.3.2.2 mrg /* wait for the chip to settle */ 554 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 555 1.3.2.2 mrg if (run_read(sc, RT2860_ASIC_VER_ID, &ver) != 0) 556 1.3.2.2 mrg return; 557 1.3.2.2 mrg if (ver != 0 && ver != 0xffffffff) 558 1.3.2.2 mrg break; 559 1.3.2.2 mrg DELAY(10); 560 1.3.2.2 mrg } 561 1.3.2.2 mrg if (ntries == 100) { 562 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 563 1.3.2.2 mrg "timeout waiting for NIC to initialize\n"); 564 1.3.2.2 mrg return; 565 1.3.2.2 mrg } 566 1.3.2.2 mrg sc->mac_ver = ver >> 16; 567 1.3.2.2 mrg sc->mac_rev = ver & 0xffff; 568 1.3.2.2 mrg 569 1.3.2.2 mrg /* retrieve RF rev. no and various other things from EEPROM */ 570 1.3.2.2 mrg run_read_eeprom(sc); 571 1.3.2.2 mrg 572 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 573 1.3.2.2 mrg "MAC/BBP RT%04X (rev 0x%04X), RF %s (MIMO %dT%dR), address %s\n", 574 1.3.2.2 mrg sc->mac_ver, sc->mac_rev, run_get_rf(sc->rf_rev), sc->ntxchains, 575 1.3.2.2 mrg sc->nrxchains, ether_sprintf(ic->ic_myaddr)); 576 1.3.2.2 mrg 577 1.3.2.2 mrg ic->ic_ifp = ifp; 578 1.3.2.2 mrg ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 579 1.3.2.2 mrg ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 580 1.3.2.2 mrg ic->ic_state = IEEE80211_S_INIT; 581 1.3.2.2 mrg 582 1.3.2.2 mrg /* set device capabilities */ 583 1.3.2.2 mrg ic->ic_caps = 584 1.3.2.2 mrg IEEE80211_C_MONITOR | /* monitor mode supported */ 585 1.3.2.2 mrg #ifndef IEEE80211_STA_ONLY 586 1.3.2.2 mrg IEEE80211_C_IBSS | /* IBSS mode supported */ 587 1.3.2.2 mrg IEEE80211_C_HOSTAP | /* HostAP mode supported */ 588 1.3.2.2 mrg #endif 589 1.3.2.2 mrg IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 590 1.3.2.2 mrg IEEE80211_C_SHSLOT | /* short slot time supported */ 591 1.3.2.2 mrg #ifdef RUN_HWCRYPTO 592 1.3.2.2 mrg IEEE80211_C_WEP | /* WEP */ 593 1.3.2.2 mrg IEEE80211_C_TKIP | /* TKIP */ 594 1.3.2.2 mrg IEEE80211_C_AES_CCM | /* AES CCMP */ 595 1.3.2.2 mrg IEEE80211_C_TKIPMIC | /* TKIPMIC */ 596 1.3.2.2 mrg #endif 597 1.3.2.2 mrg IEEE80211_C_WME | /* WME */ 598 1.3.2.2 mrg IEEE80211_C_WPA; /* WPA/RSN */ 599 1.3.2.2 mrg 600 1.3.2.2 mrg if (sc->rf_rev == RT2860_RF_2750 || 601 1.3.2.2 mrg sc->rf_rev == RT2860_RF_2850 || 602 1.3.2.2 mrg sc->rf_rev == RT3070_RF_3052) { 603 1.3.2.2 mrg /* set supported .11a rates */ 604 1.3.2.2 mrg ic->ic_sup_rates[IEEE80211_MODE_11A] = 605 1.3.2.2 mrg ieee80211_std_rateset_11a; 606 1.3.2.2 mrg 607 1.3.2.2 mrg /* set supported .11a channels */ 608 1.3.2.2 mrg for (i = 14; i < (int)__arraycount(rt2860_rf2850); i++) { 609 1.3.2.2 mrg uint8_t chan = rt2860_rf2850[i].chan; 610 1.3.2.2 mrg ic->ic_channels[chan].ic_freq = 611 1.3.2.2 mrg ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ); 612 1.3.2.2 mrg ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A; 613 1.3.2.2 mrg } 614 1.3.2.2 mrg } 615 1.3.2.2 mrg 616 1.3.2.2 mrg /* set supported .11b and .11g rates */ 617 1.3.2.2 mrg ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 618 1.3.2.2 mrg ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 619 1.3.2.2 mrg 620 1.3.2.2 mrg /* set supported .11b and .11g channels (1 through 14) */ 621 1.3.2.2 mrg for (i = 1; i <= 14; i++) { 622 1.3.2.2 mrg ic->ic_channels[i].ic_freq = 623 1.3.2.2 mrg ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 624 1.3.2.2 mrg ic->ic_channels[i].ic_flags = 625 1.3.2.2 mrg IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 626 1.3.2.2 mrg IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 627 1.3.2.2 mrg } 628 1.3.2.2 mrg 629 1.3.2.2 mrg ifp->if_softc = sc; 630 1.3.2.2 mrg ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 631 1.3.2.2 mrg ifp->if_init = run_init; 632 1.3.2.2 mrg ifp->if_ioctl = run_ioctl; 633 1.3.2.2 mrg ifp->if_start = run_start; 634 1.3.2.2 mrg ifp->if_watchdog = run_watchdog; 635 1.3.2.2 mrg IFQ_SET_READY(&ifp->if_snd); 636 1.3.2.2 mrg memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 637 1.3.2.2 mrg 638 1.3.2.2 mrg if_attach(ifp); 639 1.3.2.2 mrg ieee80211_ifattach(ic); 640 1.3.2.2 mrg ic->ic_node_alloc = run_node_alloc; 641 1.3.2.2 mrg ic->ic_newassoc = run_newassoc; 642 1.3.2.2 mrg ic->ic_updateslot = run_updateslot; 643 1.3.2.2 mrg ic->ic_wme.wme_update = run_updateedca; 644 1.3.2.2 mrg #ifdef RUN_HWCRYPTO 645 1.3.2.2 mrg ic->ic_crypto.cs_key_set = run_set_key; 646 1.3.2.2 mrg ic->ic_crypto.cs_key_delete = run_delete_key; 647 1.3.2.2 mrg #endif 648 1.3.2.2 mrg /* override state transition machine */ 649 1.3.2.2 mrg sc->sc_newstate = ic->ic_newstate; 650 1.3.2.2 mrg ic->ic_newstate = run_newstate; 651 1.3.2.2 mrg ieee80211_media_init(ic, run_media_change, ieee80211_media_status); 652 1.3.2.2 mrg 653 1.3.2.2 mrg bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 654 1.3.2.2 mrg sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 655 1.3.2.2 mrg &sc->sc_drvbpf); 656 1.3.2.2 mrg 657 1.3.2.2 mrg sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 658 1.3.2.2 mrg sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 659 1.3.2.2 mrg sc->sc_rxtap.wr_ihdr.it_present = htole32(RUN_RX_RADIOTAP_PRESENT); 660 1.3.2.2 mrg 661 1.3.2.2 mrg sc->sc_txtap_len = sizeof(sc->sc_txtapu); 662 1.3.2.2 mrg sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 663 1.3.2.2 mrg sc->sc_txtap.wt_ihdr.it_present = htole32(RUN_TX_RADIOTAP_PRESENT); 664 1.3.2.2 mrg 665 1.3.2.2 mrg ieee80211_announce(ic); 666 1.3.2.2 mrg 667 1.3.2.2 mrg usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 668 1.3.2.2 mrg } 669 1.3.2.2 mrg 670 1.3.2.2 mrg static int 671 1.3.2.2 mrg run_detach(device_t self, int flags) 672 1.3.2.2 mrg { 673 1.3.2.2 mrg struct run_softc *sc = device_private(self); 674 1.3.2.2 mrg struct ifnet *ifp = &sc->sc_if; 675 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 676 1.3.2.2 mrg int s; 677 1.3.2.2 mrg 678 1.3.2.2 mrg if (ifp->if_softc == NULL) 679 1.3.2.2 mrg return (0); 680 1.3.2.2 mrg 681 1.3.2.2 mrg s = splnet(); 682 1.3.2.2 mrg 683 1.3.2.2 mrg sc->sc_flags |= RUN_DETACHING; 684 1.3.2.2 mrg 685 1.3.2.2 mrg if (ifp->if_flags & IFF_RUNNING) { 686 1.3.2.2 mrg usb_rem_task(sc->sc_udev, &sc->sc_task); 687 1.3.2.2 mrg run_stop(ifp, 0); 688 1.3.2.2 mrg } 689 1.3.2.2 mrg 690 1.3.2.2 mrg ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 691 1.3.2.2 mrg bpf_detach(ifp); 692 1.3.2.2 mrg ieee80211_ifdetach(ic); 693 1.3.2.2 mrg if_detach(ifp); 694 1.3.2.2 mrg 695 1.3.2.2 mrg splx(s); 696 1.3.2.2 mrg 697 1.3.2.2 mrg usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 698 1.3.2.2 mrg 699 1.3.2.2 mrg callout_destroy(&sc->scan_to); 700 1.3.2.2 mrg callout_destroy(&sc->calib_to); 701 1.3.2.2 mrg 702 1.3.2.2 mrg return (0); 703 1.3.2.2 mrg } 704 1.3.2.2 mrg 705 1.3.2.2 mrg static int 706 1.3.2.2 mrg run_activate(device_t self, enum devact act) 707 1.3.2.2 mrg { 708 1.3.2.2 mrg struct run_softc *sc = device_private(self); 709 1.3.2.2 mrg 710 1.3.2.2 mrg switch (act) { 711 1.3.2.2 mrg case DVACT_DEACTIVATE: 712 1.3.2.2 mrg if_deactivate(sc->sc_ic.ic_ifp); 713 1.3.2.2 mrg return (0); 714 1.3.2.2 mrg default: 715 1.3.2.2 mrg return (EOPNOTSUPP); 716 1.3.2.2 mrg } 717 1.3.2.2 mrg } 718 1.3.2.2 mrg 719 1.3.2.2 mrg static int 720 1.3.2.2 mrg run_alloc_rx_ring(struct run_softc *sc) 721 1.3.2.2 mrg { 722 1.3.2.2 mrg struct run_rx_ring *rxq = &sc->rxq; 723 1.3.2.2 mrg int i, error; 724 1.3.2.2 mrg 725 1.3.2.2 mrg error = usbd_open_pipe(sc->sc_iface, rxq->pipe_no, 0, &rxq->pipeh); 726 1.3.2.2 mrg if (error != 0) 727 1.3.2.2 mrg goto fail; 728 1.3.2.2 mrg 729 1.3.2.2 mrg for (i = 0; i < RUN_RX_RING_COUNT; i++) { 730 1.3.2.2 mrg struct run_rx_data *data = &rxq->data[i]; 731 1.3.2.2 mrg 732 1.3.2.2 mrg data->sc = sc; /* backpointer for callbacks */ 733 1.3.2.2 mrg 734 1.3.2.2 mrg data->xfer = usbd_alloc_xfer(sc->sc_udev); 735 1.3.2.2 mrg if (data->xfer == NULL) { 736 1.3.2.2 mrg error = ENOMEM; 737 1.3.2.2 mrg goto fail; 738 1.3.2.2 mrg } 739 1.3.2.2 mrg data->buf = usbd_alloc_buffer(data->xfer, RUN_MAX_RXSZ); 740 1.3.2.2 mrg if (data->buf == NULL) { 741 1.3.2.2 mrg error = ENOMEM; 742 1.3.2.2 mrg goto fail; 743 1.3.2.2 mrg } 744 1.3.2.2 mrg } 745 1.3.2.2 mrg if (error != 0) 746 1.3.2.2 mrg fail: run_free_rx_ring(sc); 747 1.3.2.2 mrg return (error); 748 1.3.2.2 mrg } 749 1.3.2.2 mrg 750 1.3.2.2 mrg static void 751 1.3.2.2 mrg run_free_rx_ring(struct run_softc *sc) 752 1.3.2.2 mrg { 753 1.3.2.2 mrg struct run_rx_ring *rxq = &sc->rxq; 754 1.3.2.2 mrg int i; 755 1.3.2.2 mrg 756 1.3.2.2 mrg if (rxq->pipeh != NULL) { 757 1.3.2.2 mrg usbd_abort_pipe(rxq->pipeh); 758 1.3.2.2 mrg usbd_close_pipe(rxq->pipeh); 759 1.3.2.2 mrg rxq->pipeh = NULL; 760 1.3.2.2 mrg } 761 1.3.2.2 mrg for (i = 0; i < RUN_RX_RING_COUNT; i++) { 762 1.3.2.2 mrg if (rxq->data[i].xfer != NULL) 763 1.3.2.2 mrg usbd_free_xfer(rxq->data[i].xfer); 764 1.3.2.2 mrg rxq->data[i].xfer = NULL; 765 1.3.2.2 mrg } 766 1.3.2.2 mrg } 767 1.3.2.2 mrg 768 1.3.2.2 mrg static int 769 1.3.2.2 mrg run_alloc_tx_ring(struct run_softc *sc, int qid) 770 1.3.2.2 mrg { 771 1.3.2.2 mrg struct run_tx_ring *txq = &sc->txq[qid]; 772 1.3.2.2 mrg int i, error; 773 1.3.2.2 mrg 774 1.3.2.2 mrg txq->cur = txq->queued = 0; 775 1.3.2.2 mrg 776 1.3.2.2 mrg error = usbd_open_pipe(sc->sc_iface, txq->pipe_no, 0, &txq->pipeh); 777 1.3.2.2 mrg if (error != 0) 778 1.3.2.2 mrg goto fail; 779 1.3.2.2 mrg 780 1.3.2.2 mrg for (i = 0; i < RUN_TX_RING_COUNT; i++) { 781 1.3.2.2 mrg struct run_tx_data *data = &txq->data[i]; 782 1.3.2.2 mrg 783 1.3.2.2 mrg data->sc = sc; /* backpointer for callbacks */ 784 1.3.2.2 mrg data->qid = qid; 785 1.3.2.2 mrg 786 1.3.2.2 mrg data->xfer = usbd_alloc_xfer(sc->sc_udev); 787 1.3.2.2 mrg if (data->xfer == NULL) { 788 1.3.2.2 mrg error = ENOMEM; 789 1.3.2.2 mrg goto fail; 790 1.3.2.2 mrg } 791 1.3.2.2 mrg data->buf = usbd_alloc_buffer(data->xfer, RUN_MAX_TXSZ); 792 1.3.2.2 mrg if (data->buf == NULL) { 793 1.3.2.2 mrg error = ENOMEM; 794 1.3.2.2 mrg goto fail; 795 1.3.2.2 mrg } 796 1.3.2.2 mrg /* zeroize the TXD + TXWI part */ 797 1.3.2.2 mrg memset(data->buf, 0, sizeof (struct rt2870_txd) + 798 1.3.2.2 mrg sizeof (struct rt2860_txwi)); 799 1.3.2.2 mrg } 800 1.3.2.2 mrg if (error != 0) 801 1.3.2.2 mrg fail: run_free_tx_ring(sc, qid); 802 1.3.2.2 mrg return (error); 803 1.3.2.2 mrg } 804 1.3.2.2 mrg 805 1.3.2.2 mrg static void 806 1.3.2.2 mrg run_free_tx_ring(struct run_softc *sc, int qid) 807 1.3.2.2 mrg { 808 1.3.2.2 mrg struct run_tx_ring *txq = &sc->txq[qid]; 809 1.3.2.2 mrg int i; 810 1.3.2.2 mrg 811 1.3.2.2 mrg if (txq->pipeh != NULL) { 812 1.3.2.2 mrg usbd_abort_pipe(txq->pipeh); 813 1.3.2.2 mrg usbd_close_pipe(txq->pipeh); 814 1.3.2.2 mrg txq->pipeh = NULL; 815 1.3.2.2 mrg } 816 1.3.2.2 mrg for (i = 0; i < RUN_TX_RING_COUNT; i++) { 817 1.3.2.2 mrg if (txq->data[i].xfer != NULL) 818 1.3.2.2 mrg usbd_free_xfer(txq->data[i].xfer); 819 1.3.2.2 mrg txq->data[i].xfer = NULL; 820 1.3.2.2 mrg } 821 1.3.2.2 mrg } 822 1.3.2.2 mrg 823 1.3.2.2 mrg static int 824 1.3.2.2 mrg run_load_microcode(struct run_softc *sc) 825 1.3.2.2 mrg { 826 1.3.2.2 mrg usb_device_request_t req; 827 1.3.2.2 mrg const char *fwname; 828 1.3.2.2 mrg u_char *ucode; 829 1.3.2.2 mrg size_t size; 830 1.3.2.2 mrg uint32_t tmp; 831 1.3.2.2 mrg int ntries, error; 832 1.3.2.2 mrg 833 1.3.2.2 mrg /* RT3071/RT3072 use a different firmware */ 834 1.3.2.2 mrg if (sc->mac_ver != 0x2860 && 835 1.3.2.2 mrg sc->mac_ver != 0x2872 && 836 1.3.2.2 mrg sc->mac_ver != 0x3070) 837 1.3.2.2 mrg fwname = "run-rt3071"; 838 1.3.2.2 mrg else 839 1.3.2.2 mrg fwname = "run-rt2870"; 840 1.3.2.2 mrg 841 1.3.2.2 mrg if ((error = firmware_load("run", fwname, &ucode, &size)) != 0) { 842 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 843 1.3.2.2 mrg "error %d, could not read firmware %s\n", error, fwname); 844 1.3.2.2 mrg return (error); 845 1.3.2.2 mrg } 846 1.3.2.2 mrg if (size != 4096) { 847 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 848 1.3.2.2 mrg "invalid firmware size (should be 4KB)\n"); 849 1.3.2.2 mrg firmware_free(ucode, size); 850 1.3.2.2 mrg return (EINVAL); 851 1.3.2.2 mrg } 852 1.3.2.2 mrg 853 1.3.2.2 mrg run_read(sc, RT2860_ASIC_VER_ID, &tmp); 854 1.3.2.2 mrg /* write microcode image */ 855 1.3.2.2 mrg run_write_region_1(sc, RT2870_FW_BASE, ucode, size); 856 1.3.2.2 mrg firmware_free(ucode, size); 857 1.3.2.2 mrg run_write(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff); 858 1.3.2.2 mrg run_write(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff); 859 1.3.2.2 mrg 860 1.3.2.2 mrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 861 1.3.2.2 mrg req.bRequest = RT2870_RESET; 862 1.3.2.2 mrg USETW(req.wValue, 8); 863 1.3.2.2 mrg USETW(req.wIndex, 0); 864 1.3.2.2 mrg USETW(req.wLength, 0); 865 1.3.2.2 mrg if ((error = usbd_do_request(sc->sc_udev, &req, NULL)) != 0) 866 1.3.2.2 mrg return (error); 867 1.3.2.2 mrg 868 1.3.2.2 mrg usbd_delay_ms(sc->sc_udev, 10); 869 1.3.2.2 mrg run_write(sc, RT2860_H2M_MAILBOX, 0); 870 1.3.2.2 mrg if ((error = run_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0)) != 0) 871 1.3.2.2 mrg return (error); 872 1.3.2.2 mrg 873 1.3.2.2 mrg /* wait until microcontroller is ready */ 874 1.3.2.2 mrg for (ntries = 0; ntries < 1000; ntries++) { 875 1.3.2.2 mrg if ((error = run_read(sc, RT2860_SYS_CTRL, &tmp)) != 0) 876 1.3.2.2 mrg return (error); 877 1.3.2.2 mrg if (tmp & RT2860_MCU_READY) 878 1.3.2.2 mrg break; 879 1.3.2.2 mrg DELAY(1000); 880 1.3.2.2 mrg } 881 1.3.2.2 mrg if (ntries == 1000) { 882 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 883 1.3.2.2 mrg "timeout waiting for MCU to initialize\n"); 884 1.3.2.2 mrg return (ETIMEDOUT); 885 1.3.2.2 mrg } 886 1.3.2.2 mrg 887 1.3.2.2 mrg sc->sc_flags |= RUN_FWLOADED; 888 1.3.2.2 mrg 889 1.3.2.2 mrg DPRINTF(("microcode successfully loaded after %d tries\n", ntries)); 890 1.3.2.2 mrg return (0); 891 1.3.2.2 mrg } 892 1.3.2.2 mrg 893 1.3.2.2 mrg static int 894 1.3.2.2 mrg run_reset(struct run_softc *sc) 895 1.3.2.2 mrg { 896 1.3.2.2 mrg usb_device_request_t req; 897 1.3.2.2 mrg 898 1.3.2.2 mrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 899 1.3.2.2 mrg req.bRequest = RT2870_RESET; 900 1.3.2.2 mrg USETW(req.wValue, 1); 901 1.3.2.2 mrg USETW(req.wIndex, 0); 902 1.3.2.2 mrg USETW(req.wLength, 0); 903 1.3.2.2 mrg return usbd_do_request(sc->sc_udev, &req, NULL); 904 1.3.2.2 mrg } 905 1.3.2.2 mrg 906 1.3.2.2 mrg static int 907 1.3.2.2 mrg run_read(struct run_softc *sc, uint16_t reg, uint32_t *val) 908 1.3.2.2 mrg { 909 1.3.2.2 mrg uint32_t tmp; 910 1.3.2.2 mrg int error; 911 1.3.2.2 mrg 912 1.3.2.2 mrg error = run_read_region_1(sc, reg, (uint8_t *)&tmp, sizeof tmp); 913 1.3.2.2 mrg if (error == 0) 914 1.3.2.2 mrg *val = le32toh(tmp); 915 1.3.2.2 mrg else 916 1.3.2.2 mrg *val = 0xffffffff; 917 1.3.2.2 mrg return (error); 918 1.3.2.2 mrg } 919 1.3.2.2 mrg 920 1.3.2.2 mrg static int 921 1.3.2.2 mrg run_read_region_1(struct run_softc *sc, uint16_t reg, uint8_t *buf, int len) 922 1.3.2.2 mrg { 923 1.3.2.2 mrg usb_device_request_t req; 924 1.3.2.2 mrg 925 1.3.2.2 mrg req.bmRequestType = UT_READ_VENDOR_DEVICE; 926 1.3.2.2 mrg req.bRequest = RT2870_READ_REGION_1; 927 1.3.2.2 mrg USETW(req.wValue, 0); 928 1.3.2.2 mrg USETW(req.wIndex, reg); 929 1.3.2.2 mrg USETW(req.wLength, len); 930 1.3.2.2 mrg return usbd_do_request(sc->sc_udev, &req, buf); 931 1.3.2.2 mrg } 932 1.3.2.2 mrg 933 1.3.2.2 mrg static int 934 1.3.2.2 mrg run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val) 935 1.3.2.2 mrg { 936 1.3.2.2 mrg usb_device_request_t req; 937 1.3.2.2 mrg 938 1.3.2.2 mrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 939 1.3.2.2 mrg req.bRequest = RT2870_WRITE_2; 940 1.3.2.2 mrg USETW(req.wValue, val); 941 1.3.2.2 mrg USETW(req.wIndex, reg); 942 1.3.2.2 mrg USETW(req.wLength, 0); 943 1.3.2.2 mrg return usbd_do_request(sc->sc_udev, &req, NULL); 944 1.3.2.2 mrg } 945 1.3.2.2 mrg 946 1.3.2.2 mrg static int 947 1.3.2.2 mrg run_write(struct run_softc *sc, uint16_t reg, uint32_t val) 948 1.3.2.2 mrg { 949 1.3.2.2 mrg int error; 950 1.3.2.2 mrg 951 1.3.2.2 mrg if ((error = run_write_2(sc, reg, val & 0xffff)) == 0) 952 1.3.2.2 mrg error = run_write_2(sc, reg + 2, val >> 16); 953 1.3.2.2 mrg return (error); 954 1.3.2.2 mrg } 955 1.3.2.2 mrg 956 1.3.2.2 mrg static int 957 1.3.2.2 mrg run_write_region_1(struct run_softc *sc, uint16_t reg, const uint8_t *buf, 958 1.3.2.2 mrg int len) 959 1.3.2.2 mrg { 960 1.3.2.2 mrg #if 1 961 1.3.2.2 mrg int i, error = 0; 962 1.3.2.2 mrg /* 963 1.3.2.2 mrg * NB: the WRITE_REGION_1 command is not stable on RT2860. 964 1.3.2.2 mrg * We thus issue multiple WRITE_2 commands instead. 965 1.3.2.2 mrg */ 966 1.3.2.2 mrg KASSERT((len & 1) == 0); 967 1.3.2.2 mrg for (i = 0; i < len && error == 0; i += 2) 968 1.3.2.2 mrg error = run_write_2(sc, reg + i, buf[i] | buf[i + 1] << 8); 969 1.3.2.2 mrg return (error); 970 1.3.2.2 mrg #else 971 1.3.2.2 mrg usb_device_request_t req; 972 1.3.2.2 mrg 973 1.3.2.2 mrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 974 1.3.2.2 mrg req.bRequest = RT2870_WRITE_REGION_1; 975 1.3.2.2 mrg USETW(req.wValue, 0); 976 1.3.2.2 mrg USETW(req.wIndex, reg); 977 1.3.2.2 mrg USETW(req.wLength, len); 978 1.3.2.2 mrg return usbd_do_request(sc->sc_udev, &req, buf); 979 1.3.2.2 mrg #endif 980 1.3.2.2 mrg } 981 1.3.2.2 mrg 982 1.3.2.2 mrg static int 983 1.3.2.2 mrg run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int count) 984 1.3.2.2 mrg { 985 1.3.2.2 mrg int error = 0; 986 1.3.2.2 mrg 987 1.3.2.2 mrg for (; count > 0 && error == 0; count--, reg += 4) 988 1.3.2.2 mrg error = run_write(sc, reg, val); 989 1.3.2.2 mrg return (error); 990 1.3.2.2 mrg } 991 1.3.2.2 mrg 992 1.3.2.2 mrg /* Read 16-bit from eFUSE ROM (RT3070 only.) */ 993 1.3.2.2 mrg static int 994 1.3.2.2 mrg run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 995 1.3.2.2 mrg { 996 1.3.2.2 mrg uint32_t tmp; 997 1.3.2.2 mrg uint16_t reg; 998 1.3.2.2 mrg int error, ntries; 999 1.3.2.2 mrg 1000 1.3.2.2 mrg if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1001 1.3.2.2 mrg return (error); 1002 1.3.2.2 mrg 1003 1.3.2.2 mrg addr *= 2; 1004 1.3.2.2 mrg /*- 1005 1.3.2.2 mrg * Read one 16-byte block into registers EFUSE_DATA[0-3]: 1006 1.3.2.2 mrg * DATA0: F E D C 1007 1.3.2.2 mrg * DATA1: B A 9 8 1008 1.3.2.2 mrg * DATA2: 7 6 5 4 1009 1.3.2.2 mrg * DATA3: 3 2 1 0 1010 1.3.2.2 mrg */ 1011 1.3.2.2 mrg tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK); 1012 1.3.2.2 mrg tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK; 1013 1.3.2.2 mrg run_write(sc, RT3070_EFUSE_CTRL, tmp); 1014 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 1015 1.3.2.2 mrg if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1016 1.3.2.2 mrg return (error); 1017 1.3.2.2 mrg if (!(tmp & RT3070_EFSROM_KICK)) 1018 1.3.2.2 mrg break; 1019 1.3.2.2 mrg DELAY(2); 1020 1.3.2.2 mrg } 1021 1.3.2.2 mrg if (ntries == 100) 1022 1.3.2.2 mrg return (ETIMEDOUT); 1023 1.3.2.2 mrg 1024 1.3.2.2 mrg if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK) { 1025 1.3.2.2 mrg *val = 0xffff; /* address not found */ 1026 1.3.2.2 mrg return (0); 1027 1.3.2.2 mrg } 1028 1.3.2.2 mrg /* determine to which 32-bit register our 16-bit word belongs */ 1029 1.3.2.2 mrg reg = RT3070_EFUSE_DATA3 - (addr & 0xc); 1030 1.3.2.2 mrg if ((error = run_read(sc, reg, &tmp)) != 0) 1031 1.3.2.2 mrg return (error); 1032 1.3.2.2 mrg 1033 1.3.2.2 mrg *val = (addr & 2) ? tmp >> 16 : tmp & 0xffff; 1034 1.3.2.2 mrg return (0); 1035 1.3.2.2 mrg } 1036 1.3.2.2 mrg 1037 1.3.2.2 mrg static int 1038 1.3.2.2 mrg run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 1039 1.3.2.2 mrg { 1040 1.3.2.2 mrg usb_device_request_t req; 1041 1.3.2.2 mrg uint16_t tmp; 1042 1.3.2.2 mrg int error; 1043 1.3.2.2 mrg 1044 1.3.2.2 mrg addr *= 2; 1045 1.3.2.2 mrg req.bmRequestType = UT_READ_VENDOR_DEVICE; 1046 1.3.2.2 mrg req.bRequest = RT2870_EEPROM_READ; 1047 1.3.2.2 mrg USETW(req.wValue, 0); 1048 1.3.2.2 mrg USETW(req.wIndex, addr); 1049 1.3.2.2 mrg USETW(req.wLength, sizeof tmp); 1050 1.3.2.2 mrg error = usbd_do_request(sc->sc_udev, &req, &tmp); 1051 1.3.2.2 mrg if (error == 0) 1052 1.3.2.2 mrg *val = le16toh(tmp); 1053 1.3.2.2 mrg else 1054 1.3.2.2 mrg *val = 0xffff; 1055 1.3.2.2 mrg return (error); 1056 1.3.2.2 mrg } 1057 1.3.2.2 mrg 1058 1.3.2.2 mrg static __inline int 1059 1.3.2.2 mrg run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val) 1060 1.3.2.2 mrg { 1061 1.3.2.2 mrg 1062 1.3.2.2 mrg /* either eFUSE ROM or EEPROM */ 1063 1.3.2.2 mrg return sc->sc_srom_read(sc, addr, val); 1064 1.3.2.2 mrg } 1065 1.3.2.2 mrg 1066 1.3.2.2 mrg static int 1067 1.3.2.2 mrg run_rt2870_rf_write(struct run_softc *sc, uint8_t reg, uint32_t val) 1068 1.3.2.2 mrg { 1069 1.3.2.2 mrg uint32_t tmp; 1070 1.3.2.2 mrg int error, ntries; 1071 1.3.2.2 mrg 1072 1.3.2.2 mrg for (ntries = 0; ntries < 10; ntries++) { 1073 1.3.2.2 mrg if ((error = run_read(sc, RT2860_RF_CSR_CFG0, &tmp)) != 0) 1074 1.3.2.2 mrg return (error); 1075 1.3.2.2 mrg if (!(tmp & RT2860_RF_REG_CTRL)) 1076 1.3.2.2 mrg break; 1077 1.3.2.2 mrg } 1078 1.3.2.2 mrg if (ntries == 10) 1079 1.3.2.2 mrg return (ETIMEDOUT); 1080 1.3.2.2 mrg 1081 1.3.2.2 mrg /* RF registers are 24-bit on the RT2860 */ 1082 1.3.2.2 mrg tmp = RT2860_RF_REG_CTRL | 24 << RT2860_RF_REG_WIDTH_SHIFT | 1083 1.3.2.2 mrg (val & 0x3fffff) << 2 | (reg & 3); 1084 1.3.2.2 mrg return run_write(sc, RT2860_RF_CSR_CFG0, tmp); 1085 1.3.2.2 mrg } 1086 1.3.2.2 mrg 1087 1.3.2.2 mrg static int 1088 1.3.2.2 mrg run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1089 1.3.2.2 mrg { 1090 1.3.2.2 mrg uint32_t tmp; 1091 1.3.2.2 mrg int error, ntries; 1092 1.3.2.2 mrg 1093 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 1094 1.3.2.2 mrg if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1095 1.3.2.2 mrg return (error); 1096 1.3.2.2 mrg if (!(tmp & RT3070_RF_KICK)) 1097 1.3.2.2 mrg break; 1098 1.3.2.2 mrg } 1099 1.3.2.2 mrg if (ntries == 100) 1100 1.3.2.2 mrg return (ETIMEDOUT); 1101 1.3.2.2 mrg 1102 1.3.2.2 mrg tmp = RT3070_RF_KICK | reg << 8; 1103 1.3.2.2 mrg if ((error = run_write(sc, RT3070_RF_CSR_CFG, tmp)) != 0) 1104 1.3.2.2 mrg return (error); 1105 1.3.2.2 mrg 1106 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 1107 1.3.2.2 mrg if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1108 1.3.2.2 mrg return (error); 1109 1.3.2.2 mrg if (!(tmp & RT3070_RF_KICK)) 1110 1.3.2.2 mrg break; 1111 1.3.2.2 mrg } 1112 1.3.2.2 mrg if (ntries == 100) 1113 1.3.2.2 mrg return (ETIMEDOUT); 1114 1.3.2.2 mrg 1115 1.3.2.2 mrg *val = tmp & 0xff; 1116 1.3.2.2 mrg return (0); 1117 1.3.2.2 mrg } 1118 1.3.2.2 mrg 1119 1.3.2.2 mrg static int 1120 1.3.2.2 mrg run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1121 1.3.2.2 mrg { 1122 1.3.2.2 mrg uint32_t tmp; 1123 1.3.2.2 mrg int error, ntries; 1124 1.3.2.2 mrg 1125 1.3.2.2 mrg for (ntries = 0; ntries < 10; ntries++) { 1126 1.3.2.2 mrg if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1127 1.3.2.2 mrg return (error); 1128 1.3.2.2 mrg if (!(tmp & RT3070_RF_KICK)) 1129 1.3.2.2 mrg break; 1130 1.3.2.2 mrg } 1131 1.3.2.2 mrg if (ntries == 10) 1132 1.3.2.2 mrg return (ETIMEDOUT); 1133 1.3.2.2 mrg 1134 1.3.2.2 mrg tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val; 1135 1.3.2.2 mrg return run_write(sc, RT3070_RF_CSR_CFG, tmp); 1136 1.3.2.2 mrg } 1137 1.3.2.2 mrg 1138 1.3.2.2 mrg static int 1139 1.3.2.2 mrg run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1140 1.3.2.2 mrg { 1141 1.3.2.2 mrg uint32_t tmp; 1142 1.3.2.2 mrg int ntries, error; 1143 1.3.2.2 mrg 1144 1.3.2.2 mrg for (ntries = 0; ntries < 10; ntries++) { 1145 1.3.2.2 mrg if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1146 1.3.2.2 mrg return (error); 1147 1.3.2.2 mrg if (!(tmp & RT2860_BBP_CSR_KICK)) 1148 1.3.2.2 mrg break; 1149 1.3.2.2 mrg } 1150 1.3.2.2 mrg if (ntries == 10) 1151 1.3.2.2 mrg return (ETIMEDOUT); 1152 1.3.2.2 mrg 1153 1.3.2.2 mrg tmp = RT2860_BBP_CSR_READ | RT2860_BBP_CSR_KICK | reg << 8; 1154 1.3.2.2 mrg if ((error = run_write(sc, RT2860_BBP_CSR_CFG, tmp)) != 0) 1155 1.3.2.2 mrg return (error); 1156 1.3.2.2 mrg 1157 1.3.2.2 mrg for (ntries = 0; ntries < 10; ntries++) { 1158 1.3.2.2 mrg if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1159 1.3.2.2 mrg return (error); 1160 1.3.2.2 mrg if (!(tmp & RT2860_BBP_CSR_KICK)) 1161 1.3.2.2 mrg break; 1162 1.3.2.2 mrg } 1163 1.3.2.2 mrg if (ntries == 10) 1164 1.3.2.2 mrg return (ETIMEDOUT); 1165 1.3.2.2 mrg 1166 1.3.2.2 mrg *val = tmp & 0xff; 1167 1.3.2.2 mrg return (0); 1168 1.3.2.2 mrg } 1169 1.3.2.2 mrg 1170 1.3.2.2 mrg static int 1171 1.3.2.2 mrg run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1172 1.3.2.2 mrg { 1173 1.3.2.2 mrg uint32_t tmp; 1174 1.3.2.2 mrg int ntries, error; 1175 1.3.2.2 mrg 1176 1.3.2.2 mrg for (ntries = 0; ntries < 10; ntries++) { 1177 1.3.2.2 mrg if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1178 1.3.2.2 mrg return (error); 1179 1.3.2.2 mrg if (!(tmp & RT2860_BBP_CSR_KICK)) 1180 1.3.2.2 mrg break; 1181 1.3.2.2 mrg } 1182 1.3.2.2 mrg if (ntries == 10) 1183 1.3.2.2 mrg return (ETIMEDOUT); 1184 1.3.2.2 mrg 1185 1.3.2.2 mrg tmp = RT2860_BBP_CSR_KICK | reg << 8 | val; 1186 1.3.2.2 mrg return run_write(sc, RT2860_BBP_CSR_CFG, tmp); 1187 1.3.2.2 mrg } 1188 1.3.2.2 mrg 1189 1.3.2.2 mrg /* 1190 1.3.2.2 mrg * Send a command to the 8051 microcontroller unit. 1191 1.3.2.2 mrg */ 1192 1.3.2.2 mrg static int 1193 1.3.2.2 mrg run_mcu_cmd(struct run_softc *sc, uint8_t cmd, uint16_t arg) 1194 1.3.2.2 mrg { 1195 1.3.2.2 mrg uint32_t tmp; 1196 1.3.2.2 mrg int error, ntries; 1197 1.3.2.2 mrg 1198 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 1199 1.3.2.2 mrg if ((error = run_read(sc, RT2860_H2M_MAILBOX, &tmp)) != 0) 1200 1.3.2.2 mrg return (error); 1201 1.3.2.2 mrg if (!(tmp & RT2860_H2M_BUSY)) 1202 1.3.2.2 mrg break; 1203 1.3.2.2 mrg } 1204 1.3.2.2 mrg if (ntries == 100) 1205 1.3.2.2 mrg return (ETIMEDOUT); 1206 1.3.2.2 mrg 1207 1.3.2.2 mrg tmp = RT2860_H2M_BUSY | RT2860_TOKEN_NO_INTR << 16 | arg; 1208 1.3.2.2 mrg if ((error = run_write(sc, RT2860_H2M_MAILBOX, tmp)) == 0) 1209 1.3.2.2 mrg error = run_write(sc, RT2860_HOST_CMD, cmd); 1210 1.3.2.2 mrg return (error); 1211 1.3.2.2 mrg } 1212 1.3.2.2 mrg 1213 1.3.2.2 mrg /* 1214 1.3.2.2 mrg * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word. 1215 1.3.2.2 mrg * Used to adjust per-rate Tx power registers. 1216 1.3.2.2 mrg */ 1217 1.3.2.2 mrg static __inline uint32_t 1218 1.3.2.2 mrg b4inc(uint32_t b32, int8_t delta) 1219 1.3.2.2 mrg { 1220 1.3.2.2 mrg int8_t i, b4; 1221 1.3.2.2 mrg 1222 1.3.2.2 mrg for (i = 0; i < 8; i++) { 1223 1.3.2.2 mrg b4 = b32 & 0xf; 1224 1.3.2.2 mrg b4 += delta; 1225 1.3.2.2 mrg if (b4 < 0) 1226 1.3.2.2 mrg b4 = 0; 1227 1.3.2.2 mrg else if (b4 > 0xf) 1228 1.3.2.2 mrg b4 = 0xf; 1229 1.3.2.2 mrg b32 = b32 >> 4 | b4 << 28; 1230 1.3.2.2 mrg } 1231 1.3.2.2 mrg return (b32); 1232 1.3.2.2 mrg } 1233 1.3.2.2 mrg 1234 1.3.2.2 mrg static const char * 1235 1.3.2.2 mrg run_get_rf(int rev) 1236 1.3.2.2 mrg { 1237 1.3.2.2 mrg switch (rev) { 1238 1.3.2.2 mrg case RT2860_RF_2820: return "RT2820"; 1239 1.3.2.2 mrg case RT2860_RF_2850: return "RT2850"; 1240 1.3.2.2 mrg case RT2860_RF_2720: return "RT2720"; 1241 1.3.2.2 mrg case RT2860_RF_2750: return "RT2750"; 1242 1.3.2.2 mrg case RT3070_RF_3020: return "RT3020"; 1243 1.3.2.2 mrg case RT3070_RF_2020: return "RT2020"; 1244 1.3.2.2 mrg case RT3070_RF_3021: return "RT3021"; 1245 1.3.2.2 mrg case RT3070_RF_3022: return "RT3022"; 1246 1.3.2.2 mrg case RT3070_RF_3052: return "RT3052"; 1247 1.3.2.2 mrg } 1248 1.3.2.2 mrg return "unknown"; 1249 1.3.2.2 mrg } 1250 1.3.2.2 mrg 1251 1.3.2.2 mrg static int 1252 1.3.2.2 mrg run_read_eeprom(struct run_softc *sc) 1253 1.3.2.2 mrg { 1254 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 1255 1.3.2.2 mrg int8_t delta_2ghz, delta_5ghz; 1256 1.3.2.2 mrg uint32_t tmp; 1257 1.3.2.2 mrg uint16_t val; 1258 1.3.2.2 mrg int ridx, ant, i; 1259 1.3.2.2 mrg 1260 1.3.2.2 mrg /* check whether the ROM is eFUSE ROM or EEPROM */ 1261 1.3.2.2 mrg sc->sc_srom_read = run_eeprom_read_2; 1262 1.3.2.2 mrg if (sc->mac_ver >= 0x3070) { 1263 1.3.2.2 mrg run_read(sc, RT3070_EFUSE_CTRL, &tmp); 1264 1.3.2.2 mrg DPRINTF(("EFUSE_CTRL=0x%08x\n", tmp)); 1265 1.3.2.2 mrg if (tmp & RT3070_SEL_EFUSE) 1266 1.3.2.2 mrg sc->sc_srom_read = run_efuse_read_2; 1267 1.3.2.2 mrg } 1268 1.3.2.2 mrg 1269 1.3.2.2 mrg /* read ROM version */ 1270 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_VERSION, &val); 1271 1.3.2.2 mrg DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8)); 1272 1.3.2.2 mrg 1273 1.3.2.2 mrg /* read MAC address */ 1274 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_MAC01, &val); 1275 1.3.2.2 mrg ic->ic_myaddr[0] = val & 0xff; 1276 1.3.2.2 mrg ic->ic_myaddr[1] = val >> 8; 1277 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_MAC23, &val); 1278 1.3.2.2 mrg ic->ic_myaddr[2] = val & 0xff; 1279 1.3.2.2 mrg ic->ic_myaddr[3] = val >> 8; 1280 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_MAC45, &val); 1281 1.3.2.2 mrg ic->ic_myaddr[4] = val & 0xff; 1282 1.3.2.2 mrg ic->ic_myaddr[5] = val >> 8; 1283 1.3.2.2 mrg 1284 1.3.2.2 mrg /* read vendor BBP settings */ 1285 1.3.2.2 mrg for (i = 0; i < 10; i++) { 1286 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val); 1287 1.3.2.2 mrg sc->bbp[i].val = val & 0xff; 1288 1.3.2.2 mrg sc->bbp[i].reg = val >> 8; 1289 1.3.2.2 mrg DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val)); 1290 1.3.2.2 mrg } 1291 1.3.2.2 mrg if (sc->mac_ver >= 0x3071) { 1292 1.3.2.2 mrg /* read vendor RF settings */ 1293 1.3.2.2 mrg for (i = 0; i < 10; i++) { 1294 1.3.2.2 mrg run_srom_read(sc, RT3071_EEPROM_RF_BASE + i, &val); 1295 1.3.2.2 mrg sc->rf[i].val = val & 0xff; 1296 1.3.2.2 mrg sc->rf[i].reg = val >> 8; 1297 1.3.2.2 mrg DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg, 1298 1.3.2.2 mrg sc->rf[i].val)); 1299 1.3.2.2 mrg } 1300 1.3.2.2 mrg } 1301 1.3.2.2 mrg 1302 1.3.2.2 mrg /* read RF frequency offset from EEPROM */ 1303 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_FREQ_LEDS, &val); 1304 1.3.2.2 mrg sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0; 1305 1.3.2.2 mrg DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff)); 1306 1.3.2.2 mrg 1307 1.3.2.2 mrg if ((val >> 8) != 0xff) { 1308 1.3.2.2 mrg /* read LEDs operating mode */ 1309 1.3.2.2 mrg sc->leds = val >> 8; 1310 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_LED1, &sc->led[0]); 1311 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_LED2, &sc->led[1]); 1312 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_LED3, &sc->led[2]); 1313 1.3.2.2 mrg } else { 1314 1.3.2.2 mrg /* broken EEPROM, use default settings */ 1315 1.3.2.2 mrg sc->leds = 0x01; 1316 1.3.2.2 mrg sc->led[0] = 0x5555; 1317 1.3.2.2 mrg sc->led[1] = 0x2221; 1318 1.3.2.2 mrg sc->led[2] = 0x5627; /* differs from RT2860 */ 1319 1.3.2.2 mrg } 1320 1.3.2.2 mrg DPRINTF(("EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n", 1321 1.3.2.2 mrg sc->leds, sc->led[0], sc->led[1], sc->led[2])); 1322 1.3.2.2 mrg 1323 1.3.2.2 mrg /* read RF information */ 1324 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val); 1325 1.3.2.2 mrg if (val == 0xffff) { 1326 1.3.2.2 mrg DPRINTF(("invalid EEPROM antenna info, using default\n")); 1327 1.3.2.2 mrg if (sc->mac_ver == 0x3572) { 1328 1.3.2.2 mrg /* default to RF3052 2T2R */ 1329 1.3.2.2 mrg sc->rf_rev = RT3070_RF_3052; 1330 1.3.2.2 mrg sc->ntxchains = 2; 1331 1.3.2.2 mrg sc->nrxchains = 2; 1332 1.3.2.2 mrg } else if (sc->mac_ver >= 0x3070) { 1333 1.3.2.2 mrg /* default to RF3020 1T1R */ 1334 1.3.2.2 mrg sc->rf_rev = RT3070_RF_3020; 1335 1.3.2.2 mrg sc->ntxchains = 1; 1336 1.3.2.2 mrg sc->nrxchains = 1; 1337 1.3.2.2 mrg } else { 1338 1.3.2.2 mrg /* default to RF2820 1T2R */ 1339 1.3.2.2 mrg sc->rf_rev = RT2860_RF_2820; 1340 1.3.2.2 mrg sc->ntxchains = 1; 1341 1.3.2.2 mrg sc->nrxchains = 2; 1342 1.3.2.2 mrg } 1343 1.3.2.2 mrg } else { 1344 1.3.2.2 mrg sc->rf_rev = (val >> 8) & 0xf; 1345 1.3.2.2 mrg sc->ntxchains = (val >> 4) & 0xf; 1346 1.3.2.2 mrg sc->nrxchains = val & 0xf; 1347 1.3.2.2 mrg } 1348 1.3.2.2 mrg DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n", 1349 1.3.2.2 mrg sc->rf_rev, sc->ntxchains, sc->nrxchains)); 1350 1.3.2.2 mrg 1351 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_CONFIG, &val); 1352 1.3.2.2 mrg DPRINTF(("EEPROM CFG 0x%04x\n", val)); 1353 1.3.2.2 mrg /* check if driver should patch the DAC issue */ 1354 1.3.2.2 mrg if ((val >> 8) != 0xff) 1355 1.3.2.2 mrg sc->patch_dac = (val >> 15) & 1; 1356 1.3.2.2 mrg if ((val & 0xff) != 0xff) { 1357 1.3.2.2 mrg sc->ext_5ghz_lna = (val >> 3) & 1; 1358 1.3.2.2 mrg sc->ext_2ghz_lna = (val >> 2) & 1; 1359 1.3.2.2 mrg /* check if RF supports automatic Tx access gain control */ 1360 1.3.2.2 mrg sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1; 1361 1.3.2.2 mrg /* check if we have a hardware radio switch */ 1362 1.3.2.2 mrg sc->rfswitch = val & 1; 1363 1.3.2.2 mrg } 1364 1.3.2.2 mrg 1365 1.3.2.2 mrg /* read power settings for 2GHz channels */ 1366 1.3.2.2 mrg for (i = 0; i < 14; i += 2) { 1367 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val); 1368 1.3.2.2 mrg sc->txpow1[i + 0] = (int8_t)(val & 0xff); 1369 1.3.2.2 mrg sc->txpow1[i + 1] = (int8_t)(val >> 8); 1370 1.3.2.2 mrg 1371 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val); 1372 1.3.2.2 mrg sc->txpow2[i + 0] = (int8_t)(val & 0xff); 1373 1.3.2.2 mrg sc->txpow2[i + 1] = (int8_t)(val >> 8); 1374 1.3.2.2 mrg } 1375 1.3.2.2 mrg /* fix broken Tx power entries */ 1376 1.3.2.2 mrg for (i = 0; i < 14; i++) { 1377 1.3.2.2 mrg if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31) 1378 1.3.2.2 mrg sc->txpow1[i] = 5; 1379 1.3.2.2 mrg if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31) 1380 1.3.2.2 mrg sc->txpow2[i] = 5; 1381 1.3.2.2 mrg DPRINTF(("chan %d: power1=%d, power2=%d\n", 1382 1.3.2.2 mrg rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i])); 1383 1.3.2.2 mrg } 1384 1.3.2.2 mrg /* read power settings for 5GHz channels */ 1385 1.3.2.2 mrg for (i = 0; i < 40; i += 2) { 1386 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val); 1387 1.3.2.2 mrg sc->txpow1[i + 14] = (int8_t)(val & 0xff); 1388 1.3.2.2 mrg sc->txpow1[i + 15] = (int8_t)(val >> 8); 1389 1.3.2.2 mrg 1390 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val); 1391 1.3.2.2 mrg sc->txpow2[i + 14] = (int8_t)(val & 0xff); 1392 1.3.2.2 mrg sc->txpow2[i + 15] = (int8_t)(val >> 8); 1393 1.3.2.2 mrg } 1394 1.3.2.2 mrg /* fix broken Tx power entries */ 1395 1.3.2.2 mrg for (i = 0; i < 40; i++) { 1396 1.3.2.2 mrg if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15) 1397 1.3.2.2 mrg sc->txpow1[14 + i] = 5; 1398 1.3.2.2 mrg if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15) 1399 1.3.2.2 mrg sc->txpow2[14 + i] = 5; 1400 1.3.2.2 mrg DPRINTF(("chan %d: power1=%d, power2=%d\n", 1401 1.3.2.2 mrg rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i], 1402 1.3.2.2 mrg sc->txpow2[14 + i])); 1403 1.3.2.2 mrg } 1404 1.3.2.2 mrg 1405 1.3.2.2 mrg /* read Tx power compensation for each Tx rate */ 1406 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val); 1407 1.3.2.2 mrg delta_2ghz = delta_5ghz = 0; 1408 1.3.2.2 mrg if ((val & 0xff) != 0xff && (val & 0x80)) { 1409 1.3.2.2 mrg delta_2ghz = val & 0xf; 1410 1.3.2.2 mrg if (!(val & 0x40)) /* negative number */ 1411 1.3.2.2 mrg delta_2ghz = -delta_2ghz; 1412 1.3.2.2 mrg } 1413 1.3.2.2 mrg val >>= 8; 1414 1.3.2.2 mrg if ((val & 0xff) != 0xff && (val & 0x80)) { 1415 1.3.2.2 mrg delta_5ghz = val & 0xf; 1416 1.3.2.2 mrg if (!(val & 0x40)) /* negative number */ 1417 1.3.2.2 mrg delta_5ghz = -delta_5ghz; 1418 1.3.2.2 mrg } 1419 1.3.2.2 mrg DPRINTF(("power compensation=%d (2GHz), %d (5GHz)\n", 1420 1.3.2.2 mrg delta_2ghz, delta_5ghz)); 1421 1.3.2.2 mrg 1422 1.3.2.2 mrg for (ridx = 0; ridx < 5; ridx++) { 1423 1.3.2.2 mrg uint32_t reg; 1424 1.3.2.2 mrg 1425 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val); 1426 1.3.2.2 mrg reg = val; 1427 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val); 1428 1.3.2.2 mrg reg |= (uint32_t)val << 16; 1429 1.3.2.2 mrg 1430 1.3.2.2 mrg sc->txpow20mhz[ridx] = reg; 1431 1.3.2.2 mrg sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz); 1432 1.3.2.2 mrg sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz); 1433 1.3.2.2 mrg 1434 1.3.2.2 mrg DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, " 1435 1.3.2.2 mrg "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx], 1436 1.3.2.2 mrg sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx])); 1437 1.3.2.2 mrg } 1438 1.3.2.2 mrg 1439 1.3.2.2 mrg /* read RSSI offsets and LNA gains from EEPROM */ 1440 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ, &val); 1441 1.3.2.2 mrg sc->rssi_2ghz[0] = val & 0xff; /* Ant A */ 1442 1.3.2.2 mrg sc->rssi_2ghz[1] = val >> 8; /* Ant B */ 1443 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ, &val); 1444 1.3.2.2 mrg if (sc->mac_ver >= 0x3070) { 1445 1.3.2.2 mrg /* 1446 1.3.2.2 mrg * On RT3070 chips (limited to 2 Rx chains), this ROM 1447 1.3.2.2 mrg * field contains the Tx mixer gain for the 2GHz band. 1448 1.3.2.2 mrg */ 1449 1.3.2.2 mrg if ((val & 0xff) != 0xff) 1450 1.3.2.2 mrg sc->txmixgain_2ghz = val & 0x7; 1451 1.3.2.2 mrg DPRINTF(("tx mixer gain=%u (2GHz)\n", sc->txmixgain_2ghz)); 1452 1.3.2.2 mrg } else { 1453 1.3.2.2 mrg sc->rssi_2ghz[2] = val & 0xff; /* Ant C */ 1454 1.3.2.2 mrg } 1455 1.3.2.2 mrg sc->lna[2] = val >> 8; /* channel group 2 */ 1456 1.3.2.2 mrg 1457 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ, &val); 1458 1.3.2.2 mrg sc->rssi_5ghz[0] = val & 0xff; /* Ant A */ 1459 1.3.2.2 mrg sc->rssi_5ghz[1] = val >> 8; /* Ant B */ 1460 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ, &val); 1461 1.3.2.2 mrg if (sc->mac_ver == 0x3572) { 1462 1.3.2.2 mrg /* 1463 1.3.2.2 mrg * On RT3572 chips (limited to 2 Rx chains), this ROM 1464 1.3.2.2 mrg * field contains the Tx mixer gain for the 5GHz band. 1465 1.3.2.2 mrg */ 1466 1.3.2.2 mrg if ((val & 0xff) != 0xff) 1467 1.3.2.2 mrg sc->txmixgain_5ghz = val & 0x7; 1468 1.3.2.2 mrg DPRINTF(("tx mixer gain=%u (5GHz)\n", sc->txmixgain_5ghz)); 1469 1.3.2.2 mrg } else { 1470 1.3.2.2 mrg sc->rssi_5ghz[2] = val & 0xff; /* Ant C */ 1471 1.3.2.2 mrg } 1472 1.3.2.2 mrg sc->lna[3] = val >> 8; /* channel group 3 */ 1473 1.3.2.2 mrg 1474 1.3.2.2 mrg run_srom_read(sc, RT2860_EEPROM_LNA, &val); 1475 1.3.2.2 mrg sc->lna[0] = val & 0xff; /* channel group 0 */ 1476 1.3.2.2 mrg sc->lna[1] = val >> 8; /* channel group 1 */ 1477 1.3.2.2 mrg 1478 1.3.2.2 mrg /* fix broken 5GHz LNA entries */ 1479 1.3.2.2 mrg if (sc->lna[2] == 0 || sc->lna[2] == 0xff) { 1480 1.3.2.2 mrg DPRINTF(("invalid LNA for channel group %d\n", 2)); 1481 1.3.2.2 mrg sc->lna[2] = sc->lna[1]; 1482 1.3.2.2 mrg } 1483 1.3.2.2 mrg if (sc->lna[3] == 0 || sc->lna[3] == 0xff) { 1484 1.3.2.2 mrg DPRINTF(("invalid LNA for channel group %d\n", 3)); 1485 1.3.2.2 mrg sc->lna[3] = sc->lna[1]; 1486 1.3.2.2 mrg } 1487 1.3.2.2 mrg 1488 1.3.2.2 mrg /* fix broken RSSI offset entries */ 1489 1.3.2.2 mrg for (ant = 0; ant < 3; ant++) { 1490 1.3.2.2 mrg if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) { 1491 1.3.2.2 mrg DPRINTF(("invalid RSSI%d offset: %d (2GHz)\n", 1492 1.3.2.2 mrg ant + 1, sc->rssi_2ghz[ant])); 1493 1.3.2.2 mrg sc->rssi_2ghz[ant] = 0; 1494 1.3.2.2 mrg } 1495 1.3.2.2 mrg if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) { 1496 1.3.2.2 mrg DPRINTF(("invalid RSSI%d offset: %d (5GHz)\n", 1497 1.3.2.2 mrg ant + 1, sc->rssi_5ghz[ant])); 1498 1.3.2.2 mrg sc->rssi_5ghz[ant] = 0; 1499 1.3.2.2 mrg } 1500 1.3.2.2 mrg } 1501 1.3.2.2 mrg return (0); 1502 1.3.2.2 mrg } 1503 1.3.2.2 mrg 1504 1.3.2.2 mrg static struct ieee80211_node * 1505 1.3.2.2 mrg run_node_alloc(struct ieee80211_node_table *nt) 1506 1.3.2.2 mrg { 1507 1.3.2.2 mrg struct run_node *rn = 1508 1.3.2.2 mrg malloc(sizeof (struct run_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1509 1.3.2.2 mrg return (rn) ? &rn->ni : NULL; 1510 1.3.2.2 mrg } 1511 1.3.2.2 mrg 1512 1.3.2.2 mrg static int 1513 1.3.2.2 mrg run_media_change(struct ifnet *ifp) 1514 1.3.2.2 mrg { 1515 1.3.2.2 mrg struct run_softc *sc = ifp->if_softc; 1516 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 1517 1.3.2.2 mrg uint8_t rate, ridx; 1518 1.3.2.2 mrg int error; 1519 1.3.2.2 mrg 1520 1.3.2.2 mrg error = ieee80211_media_change(ifp); 1521 1.3.2.2 mrg if (error != ENETRESET) 1522 1.3.2.2 mrg return (error); 1523 1.3.2.2 mrg 1524 1.3.2.2 mrg if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1525 1.3.2.2 mrg rate = ic->ic_sup_rates[ic->ic_curmode]. 1526 1.3.2.2 mrg rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL; 1527 1.3.2.2 mrg for (ridx = 0; ridx <= RT2860_RIDX_MAX; ridx++) 1528 1.3.2.2 mrg if (rt2860_rates[ridx].rate == rate) 1529 1.3.2.2 mrg break; 1530 1.3.2.2 mrg sc->fixed_ridx = ridx; 1531 1.3.2.2 mrg } 1532 1.3.2.2 mrg 1533 1.3.2.2 mrg if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1534 1.3.2.2 mrg run_init(ifp); 1535 1.3.2.2 mrg 1536 1.3.2.2 mrg return (0); 1537 1.3.2.2 mrg } 1538 1.3.2.2 mrg 1539 1.3.2.2 mrg static void 1540 1.3.2.2 mrg run_next_scan(void *arg) 1541 1.3.2.2 mrg { 1542 1.3.2.2 mrg struct run_softc *sc = arg; 1543 1.3.2.2 mrg 1544 1.3.2.2 mrg if (sc->sc_ic.ic_state == IEEE80211_S_SCAN) 1545 1.3.2.2 mrg ieee80211_next_scan(&sc->sc_ic); 1546 1.3.2.2 mrg } 1547 1.3.2.2 mrg 1548 1.3.2.2 mrg static void 1549 1.3.2.2 mrg run_task(void *arg) 1550 1.3.2.2 mrg { 1551 1.3.2.2 mrg struct run_softc *sc = arg; 1552 1.3.2.2 mrg struct run_host_cmd_ring *ring = &sc->cmdq; 1553 1.3.2.2 mrg struct run_host_cmd *cmd; 1554 1.3.2.2 mrg int s; 1555 1.3.2.2 mrg 1556 1.3.2.2 mrg /* process host commands */ 1557 1.3.2.2 mrg s = splusb(); 1558 1.3.2.2 mrg while (ring->next != ring->cur) { 1559 1.3.2.2 mrg cmd = &ring->cmd[ring->next]; 1560 1.3.2.2 mrg splx(s); 1561 1.3.2.2 mrg /* callback */ 1562 1.3.2.2 mrg cmd->cb(sc, cmd->data); 1563 1.3.2.2 mrg s = splusb(); 1564 1.3.2.2 mrg ring->queued--; 1565 1.3.2.2 mrg ring->next = (ring->next + 1) % RUN_HOST_CMD_RING_COUNT; 1566 1.3.2.2 mrg } 1567 1.3.2.2 mrg wakeup(ring); 1568 1.3.2.2 mrg splx(s); 1569 1.3.2.2 mrg } 1570 1.3.2.2 mrg 1571 1.3.2.2 mrg static void 1572 1.3.2.2 mrg run_do_async(struct run_softc *sc, void (*cb)(struct run_softc *, void *), 1573 1.3.2.2 mrg void *arg, int len) 1574 1.3.2.2 mrg { 1575 1.3.2.2 mrg struct run_host_cmd_ring *ring = &sc->cmdq; 1576 1.3.2.2 mrg struct run_host_cmd *cmd; 1577 1.3.2.2 mrg int s; 1578 1.3.2.2 mrg 1579 1.3.2.2 mrg if (sc->sc_flags & RUN_DETACHING) 1580 1.3.2.2 mrg return; 1581 1.3.2.2 mrg 1582 1.3.2.2 mrg s = splusb(); 1583 1.3.2.2 mrg cmd = &ring->cmd[ring->cur]; 1584 1.3.2.2 mrg cmd->cb = cb; 1585 1.3.2.2 mrg KASSERT(len <= sizeof (cmd->data)); 1586 1.3.2.2 mrg memcpy(cmd->data, arg, len); 1587 1.3.2.2 mrg ring->cur = (ring->cur + 1) % RUN_HOST_CMD_RING_COUNT; 1588 1.3.2.2 mrg 1589 1.3.2.2 mrg /* if there is no pending command already, schedule a task */ 1590 1.3.2.2 mrg if (++ring->queued == 1) 1591 1.3.2.2 mrg usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 1592 1.3.2.2 mrg splx(s); 1593 1.3.2.2 mrg } 1594 1.3.2.2 mrg 1595 1.3.2.2 mrg static int 1596 1.3.2.2 mrg run_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1597 1.3.2.2 mrg { 1598 1.3.2.2 mrg struct run_softc *sc = ic->ic_ifp->if_softc; 1599 1.3.2.2 mrg struct run_cmd_newstate cmd; 1600 1.3.2.2 mrg 1601 1.3.2.2 mrg callout_stop(&sc->scan_to); 1602 1.3.2.2 mrg callout_stop(&sc->calib_to); 1603 1.3.2.2 mrg 1604 1.3.2.2 mrg /* do it in a process context */ 1605 1.3.2.2 mrg cmd.state = nstate; 1606 1.3.2.2 mrg cmd.arg = arg; 1607 1.3.2.2 mrg run_do_async(sc, run_newstate_cb, &cmd, sizeof cmd); 1608 1.3.2.2 mrg return (0); 1609 1.3.2.2 mrg } 1610 1.3.2.2 mrg 1611 1.3.2.2 mrg static void 1612 1.3.2.2 mrg run_newstate_cb(struct run_softc *sc, void *arg) 1613 1.3.2.2 mrg { 1614 1.3.2.2 mrg struct run_cmd_newstate *cmd = arg; 1615 1.3.2.2 mrg struct ifnet *ifp = &sc->sc_if; 1616 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 1617 1.3.2.2 mrg enum ieee80211_state ostate; 1618 1.3.2.2 mrg struct ieee80211_node *ni; 1619 1.3.2.2 mrg uint32_t tmp, sta[3]; 1620 1.3.2.2 mrg uint8_t wcid; 1621 1.3.2.2 mrg int s; 1622 1.3.2.2 mrg 1623 1.3.2.2 mrg s = splnet(); 1624 1.3.2.2 mrg ostate = ic->ic_state; 1625 1.3.2.2 mrg 1626 1.3.2.2 mrg if (ostate == IEEE80211_S_RUN) { 1627 1.3.2.2 mrg /* turn link LED off */ 1628 1.3.2.2 mrg run_set_leds(sc, RT2860_LED_RADIO); 1629 1.3.2.2 mrg } 1630 1.3.2.2 mrg 1631 1.3.2.2 mrg switch (cmd->state) { 1632 1.3.2.2 mrg case IEEE80211_S_INIT: 1633 1.3.2.2 mrg if (ostate == IEEE80211_S_RUN) { 1634 1.3.2.2 mrg /* abort TSF synchronization */ 1635 1.3.2.2 mrg run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 1636 1.3.2.2 mrg run_write(sc, RT2860_BCN_TIME_CFG, 1637 1.3.2.2 mrg tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 1638 1.3.2.2 mrg RT2860_TBTT_TIMER_EN)); 1639 1.3.2.2 mrg } 1640 1.3.2.2 mrg break; 1641 1.3.2.2 mrg 1642 1.3.2.2 mrg case IEEE80211_S_SCAN: 1643 1.3.2.2 mrg run_set_chan(sc, ic->ic_curchan); 1644 1.3.2.2 mrg callout_schedule(&sc->scan_to, hz / 5); 1645 1.3.2.2 mrg break; 1646 1.3.2.2 mrg 1647 1.3.2.2 mrg case IEEE80211_S_AUTH: 1648 1.3.2.2 mrg case IEEE80211_S_ASSOC: 1649 1.3.2.2 mrg run_set_chan(sc, ic->ic_curchan); 1650 1.3.2.2 mrg break; 1651 1.3.2.2 mrg 1652 1.3.2.2 mrg case IEEE80211_S_RUN: 1653 1.3.2.2 mrg run_set_chan(sc, ic->ic_curchan); 1654 1.3.2.2 mrg 1655 1.3.2.2 mrg ni = ic->ic_bss; 1656 1.3.2.2 mrg 1657 1.3.2.2 mrg if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1658 1.3.2.2 mrg run_updateslot(ifp); 1659 1.3.2.2 mrg run_enable_mrr(sc); 1660 1.3.2.2 mrg run_set_txpreamble(sc); 1661 1.3.2.2 mrg run_set_basicrates(sc); 1662 1.3.2.2 mrg run_set_bssid(sc, ni->ni_bssid); 1663 1.3.2.2 mrg } 1664 1.3.2.2 mrg #ifndef IEEE80211_STA_ONLY 1665 1.3.2.2 mrg if (ic->ic_opmode == IEEE80211_M_HOSTAP || 1666 1.3.2.2 mrg ic->ic_opmode == IEEE80211_M_IBSS) 1667 1.3.2.2 mrg (void)run_setup_beacon(sc); 1668 1.3.2.2 mrg #endif 1669 1.3.2.2 mrg if (ic->ic_opmode == IEEE80211_M_STA) { 1670 1.3.2.2 mrg /* add BSS entry to the WCID table */ 1671 1.3.2.2 mrg wcid = RUN_AID2WCID(ni->ni_associd); 1672 1.3.2.2 mrg run_write_region_1(sc, RT2860_WCID_ENTRY(wcid), 1673 1.3.2.2 mrg ni->ni_macaddr, IEEE80211_ADDR_LEN); 1674 1.3.2.2 mrg 1675 1.3.2.2 mrg /* fake a join to init the tx rate */ 1676 1.3.2.2 mrg run_newassoc(ni, 1); 1677 1.3.2.2 mrg } 1678 1.3.2.2 mrg if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1679 1.3.2.2 mrg run_enable_tsf_sync(sc); 1680 1.3.2.2 mrg 1681 1.3.2.2 mrg /* clear statistic registers used by AMRR */ 1682 1.3.2.2 mrg run_read_region_1(sc, RT2860_TX_STA_CNT0, 1683 1.3.2.2 mrg (uint8_t *)sta, sizeof sta); 1684 1.3.2.2 mrg /* start calibration timer */ 1685 1.3.2.2 mrg callout_schedule(&sc->calib_to, hz); 1686 1.3.2.2 mrg } 1687 1.3.2.2 mrg 1688 1.3.2.2 mrg /* turn link LED on */ 1689 1.3.2.2 mrg run_set_leds(sc, RT2860_LED_RADIO | 1690 1.3.2.2 mrg (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan) ? 1691 1.3.2.2 mrg RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ)); 1692 1.3.2.2 mrg break; 1693 1.3.2.2 mrg } 1694 1.3.2.2 mrg (void)sc->sc_newstate(ic, cmd->state, cmd->arg); 1695 1.3.2.2 mrg splx(s); 1696 1.3.2.2 mrg } 1697 1.3.2.2 mrg 1698 1.3.2.2 mrg static int 1699 1.3.2.2 mrg run_updateedca(struct ieee80211com *ic) 1700 1.3.2.2 mrg { 1701 1.3.2.2 mrg 1702 1.3.2.2 mrg /* do it in a process context */ 1703 1.3.2.2 mrg run_do_async(ic->ic_ifp->if_softc, run_updateedca_cb, NULL, 0); 1704 1.3.2.2 mrg return (0); 1705 1.3.2.2 mrg } 1706 1.3.2.2 mrg 1707 1.3.2.2 mrg /* ARGSUSED */ 1708 1.3.2.2 mrg static void 1709 1.3.2.2 mrg run_updateedca_cb(struct run_softc *sc, void *arg) 1710 1.3.2.2 mrg { 1711 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 1712 1.3.2.2 mrg int s, aci; 1713 1.3.2.2 mrg 1714 1.3.2.2 mrg s = splnet(); 1715 1.3.2.2 mrg /* update MAC TX configuration registers */ 1716 1.3.2.2 mrg for (aci = 0; aci < WME_NUM_AC; aci++) { 1717 1.3.2.2 mrg run_write(sc, RT2860_EDCA_AC_CFG(aci), 1718 1.3.2.2 mrg ic->ic_wme.wme_params[aci].wmep_logcwmax << 16 | 1719 1.3.2.2 mrg ic->ic_wme.wme_params[aci].wmep_logcwmin << 12 | 1720 1.3.2.2 mrg ic->ic_wme.wme_params[aci].wmep_aifsn << 8 | 1721 1.3.2.2 mrg ic->ic_wme.wme_params[aci].wmep_txopLimit); 1722 1.3.2.2 mrg } 1723 1.3.2.2 mrg 1724 1.3.2.2 mrg /* update SCH/DMA registers too */ 1725 1.3.2.2 mrg run_write(sc, RT2860_WMM_AIFSN_CFG, 1726 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_VO].wmep_aifsn << 12 | 1727 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_VI].wmep_aifsn << 8 | 1728 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_BK].wmep_aifsn << 4 | 1729 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_BE].wmep_aifsn); 1730 1.3.2.2 mrg run_write(sc, RT2860_WMM_CWMIN_CFG, 1731 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmin << 12 | 1732 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmin << 8 | 1733 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmin << 4 | 1734 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmin); 1735 1.3.2.2 mrg run_write(sc, RT2860_WMM_CWMAX_CFG, 1736 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmax << 12 | 1737 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmax << 8 | 1738 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmax << 4 | 1739 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmax); 1740 1.3.2.2 mrg run_write(sc, RT2860_WMM_TXOP0_CFG, 1741 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_BK].wmep_txopLimit << 16 | 1742 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_BE].wmep_txopLimit); 1743 1.3.2.2 mrg run_write(sc, RT2860_WMM_TXOP1_CFG, 1744 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_VO].wmep_txopLimit << 16 | 1745 1.3.2.2 mrg ic->ic_wme.wme_params[WME_AC_VI].wmep_txopLimit); 1746 1.3.2.2 mrg splx(s); 1747 1.3.2.2 mrg } 1748 1.3.2.2 mrg 1749 1.3.2.2 mrg #ifdef RUN_HWCRYPTO 1750 1.3.2.2 mrg static int 1751 1.3.2.2 mrg run_set_key(struct ieee80211com *ic, const struct ieee80211_key *k, 1752 1.3.2.2 mrg const uint8_t *mac) 1753 1.3.2.2 mrg { 1754 1.3.2.2 mrg struct run_softc *sc = ic->ic_ifp->if_softc; 1755 1.3.2.2 mrg struct ieee80211_node *ni = ic->ic_bss; 1756 1.3.2.2 mrg struct run_cmd_key cmd; 1757 1.3.2.2 mrg 1758 1.3.2.2 mrg /* do it in a process context */ 1759 1.3.2.2 mrg cmd.key = *k; 1760 1.3.2.2 mrg cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1761 1.3.2.2 mrg run_do_async(sc, run_set_key_cb, &cmd, sizeof cmd); 1762 1.3.2.2 mrg return 1; 1763 1.3.2.2 mrg } 1764 1.3.2.2 mrg 1765 1.3.2.2 mrg static void 1766 1.3.2.2 mrg run_set_key_cb(struct run_softc *sc, void *arg) 1767 1.3.2.2 mrg { 1768 1.3.2.2 mrg #ifndef IEEE80211_STA_ONLY 1769 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 1770 1.3.2.2 mrg #endif 1771 1.3.2.2 mrg struct run_cmd_key *cmd = arg; 1772 1.3.2.2 mrg struct ieee80211_key *k = &cmd->key; 1773 1.3.2.2 mrg uint32_t attr; 1774 1.3.2.2 mrg uint16_t base; 1775 1.3.2.2 mrg uint8_t mode, wcid, iv[8]; 1776 1.3.2.2 mrg 1777 1.3.2.2 mrg /* map net80211 cipher to RT2860 security mode */ 1778 1.3.2.2 mrg switch (k->wk_cipher->ic_cipher) { 1779 1.3.2.2 mrg case IEEE80211_CIPHER_WEP: 1780 1.3.2.2 mrg k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1781 1.3.2.2 mrg if (k->wk_keylen == 5) 1782 1.3.2.2 mrg mode = RT2860_MODE_WEP40; 1783 1.3.2.2 mrg else 1784 1.3.2.2 mrg mode = RT2860_MODE_WEP104; 1785 1.3.2.2 mrg break; 1786 1.3.2.2 mrg case IEEE80211_CIPHER_TKIP: 1787 1.3.2.2 mrg mode = RT2860_MODE_TKIP; 1788 1.3.2.2 mrg break; 1789 1.3.2.2 mrg case IEEE80211_CIPHER_AES_CCM: 1790 1.3.2.2 mrg mode = RT2860_MODE_AES_CCMP; 1791 1.3.2.2 mrg break; 1792 1.3.2.2 mrg default: 1793 1.3.2.2 mrg return; 1794 1.3.2.2 mrg } 1795 1.3.2.2 mrg 1796 1.3.2.2 mrg if (k->wk_flags & IEEE80211_KEY_GROUP) { 1797 1.3.2.2 mrg wcid = 0; /* NB: update WCID0 for group keys */ 1798 1.3.2.2 mrg base = RT2860_SKEY(0, k->wk_keyix); 1799 1.3.2.2 mrg } else { 1800 1.3.2.2 mrg wcid = RUN_AID2WCID(cmd->associd); 1801 1.3.2.2 mrg base = RT2860_PKEY(wcid); 1802 1.3.2.2 mrg } 1803 1.3.2.2 mrg 1804 1.3.2.2 mrg if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1805 1.3.2.2 mrg run_write_region_1(sc, base, k->wk_key, 16); 1806 1.3.2.2 mrg #ifndef IEEE80211_STA_ONLY 1807 1.3.2.2 mrg if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1808 1.3.2.2 mrg run_write_region_1(sc, base + 16, &k->wk_key[16], 8); 1809 1.3.2.2 mrg run_write_region_1(sc, base + 24, &k->wk_key[24], 8); 1810 1.3.2.2 mrg } else 1811 1.3.2.2 mrg #endif 1812 1.3.2.2 mrg { 1813 1.3.2.2 mrg run_write_region_1(sc, base + 16, &k->wk_key[24], 8); 1814 1.3.2.2 mrg run_write_region_1(sc, base + 24, &k->wk_key[16], 8); 1815 1.3.2.2 mrg } 1816 1.3.2.2 mrg } else { 1817 1.3.2.2 mrg /* roundup len to 16-bit: XXX fix write_region_1() instead */ 1818 1.3.2.2 mrg run_write_region_1(sc, base, k->wk_key, 1819 1.3.2.2 mrg (k->wk_keylen + 1) & ~1); 1820 1.3.2.2 mrg } 1821 1.3.2.2 mrg 1822 1.3.2.2 mrg if (!(k->wk_flags & IEEE80211_KEY_GROUP) || 1823 1.3.2.2 mrg (k->wk_flags & IEEE80211_KEY_XMIT)) { 1824 1.3.2.2 mrg /* set initial packet number in IV+EIV */ 1825 1.3.2.2 mrg if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) { 1826 1.3.2.2 mrg memset(iv, 0, sizeof iv); 1827 1.3.2.2 mrg iv[3] = sc->sc_ic.ic_crypto.cs_def_txkey << 6; 1828 1.3.2.2 mrg } else { 1829 1.3.2.2 mrg if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1830 1.3.2.2 mrg iv[0] = k->wk_keytsc >> 8; 1831 1.3.2.2 mrg iv[1] = (iv[0] | 0x20) & 0x7f; 1832 1.3.2.2 mrg iv[2] = k->wk_keytsc; 1833 1.3.2.2 mrg } else /* CCMP */ { 1834 1.3.2.2 mrg iv[0] = k->wk_keytsc; 1835 1.3.2.2 mrg iv[1] = k->wk_keytsc >> 8; 1836 1.3.2.2 mrg iv[2] = 0; 1837 1.3.2.2 mrg } 1838 1.3.2.2 mrg iv[3] = k->wk_keyix << 6 | IEEE80211_WEP_EXTIV; 1839 1.3.2.2 mrg iv[4] = k->wk_keytsc >> 16; 1840 1.3.2.2 mrg iv[5] = k->wk_keytsc >> 24; 1841 1.3.2.2 mrg iv[6] = k->wk_keytsc >> 32; 1842 1.3.2.2 mrg iv[7] = k->wk_keytsc >> 40; 1843 1.3.2.2 mrg } 1844 1.3.2.2 mrg run_write_region_1(sc, RT2860_IVEIV(wcid), iv, 8); 1845 1.3.2.2 mrg } 1846 1.3.2.2 mrg 1847 1.3.2.2 mrg if (k->wk_flags & IEEE80211_KEY_GROUP) { 1848 1.3.2.2 mrg /* install group key */ 1849 1.3.2.2 mrg run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1850 1.3.2.2 mrg attr &= ~(0xf << (k->wk_keyix * 4)); 1851 1.3.2.2 mrg attr |= mode << (k->wk_keyix * 4); 1852 1.3.2.2 mrg run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1853 1.3.2.2 mrg } else { 1854 1.3.2.2 mrg /* install pairwise key */ 1855 1.3.2.2 mrg run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1856 1.3.2.2 mrg attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN; 1857 1.3.2.2 mrg run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1858 1.3.2.2 mrg } 1859 1.3.2.2 mrg } 1860 1.3.2.2 mrg 1861 1.3.2.2 mrg static int 1862 1.3.2.2 mrg run_delete_key(struct ieee80211com *ic, const struct ieee80211_key *k) 1863 1.3.2.2 mrg { 1864 1.3.2.2 mrg struct run_softc *sc = ic->ic_ifp->if_softc; 1865 1.3.2.2 mrg struct ieee80211_node *ni = ic->ic_bss; 1866 1.3.2.2 mrg struct run_cmd_key cmd; 1867 1.3.2.2 mrg 1868 1.3.2.2 mrg /* do it in a process context */ 1869 1.3.2.2 mrg cmd.key = *k; 1870 1.3.2.2 mrg cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1871 1.3.2.2 mrg run_do_async(sc, run_delete_key_cb, &cmd, sizeof cmd); 1872 1.3.2.2 mrg return 1; 1873 1.3.2.2 mrg } 1874 1.3.2.2 mrg 1875 1.3.2.2 mrg static void 1876 1.3.2.2 mrg run_delete_key_cb(struct run_softc *sc, void *arg) 1877 1.3.2.2 mrg { 1878 1.3.2.2 mrg struct run_cmd_key *cmd = arg; 1879 1.3.2.2 mrg struct ieee80211_key *k = &cmd->key; 1880 1.3.2.2 mrg uint32_t attr; 1881 1.3.2.2 mrg uint8_t wcid; 1882 1.3.2.2 mrg 1883 1.3.2.2 mrg if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) 1884 1.3.2.2 mrg k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1885 1.3.2.2 mrg 1886 1.3.2.2 mrg if (k->wk_flags & IEEE80211_KEY_GROUP) { 1887 1.3.2.2 mrg /* remove group key */ 1888 1.3.2.2 mrg run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1889 1.3.2.2 mrg attr &= ~(0xf << (k->wk_keyix * 4)); 1890 1.3.2.2 mrg run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1891 1.3.2.2 mrg 1892 1.3.2.2 mrg } else { 1893 1.3.2.2 mrg /* remove pairwise key */ 1894 1.3.2.2 mrg wcid = RUN_AID2WCID(cmd->associd); 1895 1.3.2.2 mrg run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1896 1.3.2.2 mrg attr &= ~0xf; 1897 1.3.2.2 mrg run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1898 1.3.2.2 mrg } 1899 1.3.2.2 mrg } 1900 1.3.2.2 mrg #endif 1901 1.3.2.2 mrg 1902 1.3.2.2 mrg static void 1903 1.3.2.2 mrg run_calibrate_to(void *arg) 1904 1.3.2.2 mrg { 1905 1.3.2.2 mrg 1906 1.3.2.2 mrg /* do it in a process context */ 1907 1.3.2.2 mrg run_do_async(arg, run_calibrate_cb, NULL, 0); 1908 1.3.2.2 mrg /* next timeout will be rescheduled in the calibration task */ 1909 1.3.2.2 mrg } 1910 1.3.2.2 mrg 1911 1.3.2.2 mrg /* ARGSUSED */ 1912 1.3.2.2 mrg static void 1913 1.3.2.2 mrg run_calibrate_cb(struct run_softc *sc, void *arg) 1914 1.3.2.2 mrg { 1915 1.3.2.2 mrg struct ifnet *ifp = &sc->sc_if; 1916 1.3.2.2 mrg uint32_t sta[3]; 1917 1.3.2.2 mrg int s, error; 1918 1.3.2.2 mrg 1919 1.3.2.2 mrg /* read statistic counters (clear on read) and update AMRR state */ 1920 1.3.2.2 mrg error = run_read_region_1(sc, RT2860_TX_STA_CNT0, (uint8_t *)sta, 1921 1.3.2.2 mrg sizeof sta); 1922 1.3.2.2 mrg if (error != 0) 1923 1.3.2.2 mrg goto skip; 1924 1.3.2.2 mrg 1925 1.3.2.2 mrg DPRINTF(("retrycnt=%d txcnt=%d failcnt=%d\n", 1926 1.3.2.2 mrg le32toh(sta[1]) >> 16, le32toh(sta[1]) & 0xffff, 1927 1.3.2.2 mrg le32toh(sta[0]) & 0xffff)); 1928 1.3.2.2 mrg 1929 1.3.2.2 mrg s = splnet(); 1930 1.3.2.2 mrg /* count failed TX as errors */ 1931 1.3.2.2 mrg ifp->if_oerrors += le32toh(sta[0]) & 0xffff; 1932 1.3.2.2 mrg 1933 1.3.2.2 mrg sc->amn.amn_retrycnt = 1934 1.3.2.2 mrg (le32toh(sta[0]) & 0xffff) + /* failed TX count */ 1935 1.3.2.2 mrg (le32toh(sta[1]) >> 16); /* TX retransmission count */ 1936 1.3.2.2 mrg 1937 1.3.2.2 mrg sc->amn.amn_txcnt = 1938 1.3.2.2 mrg sc->amn.amn_retrycnt + 1939 1.3.2.2 mrg (le32toh(sta[1]) & 0xffff); /* successful TX count */ 1940 1.3.2.2 mrg 1941 1.3.2.2 mrg ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 1942 1.3.2.2 mrg splx(s); 1943 1.3.2.2 mrg 1944 1.3.2.2 mrg skip: callout_schedule(&sc->calib_to, hz); 1945 1.3.2.2 mrg } 1946 1.3.2.2 mrg 1947 1.3.2.2 mrg static void 1948 1.3.2.2 mrg run_newassoc(struct ieee80211_node *ni, int isnew) 1949 1.3.2.2 mrg { 1950 1.3.2.2 mrg struct run_softc *sc = ni->ni_ic->ic_ifp->if_softc; 1951 1.3.2.2 mrg struct run_node *rn = (void *)ni; 1952 1.3.2.2 mrg struct ieee80211_rateset *rs = &ni->ni_rates; 1953 1.3.2.2 mrg uint8_t rate; 1954 1.3.2.2 mrg int ridx, i, j; 1955 1.3.2.2 mrg 1956 1.3.2.2 mrg DPRINTF(("new assoc isnew=%d addr=%s\n", 1957 1.3.2.2 mrg isnew, ether_sprintf(ni->ni_macaddr))); 1958 1.3.2.2 mrg 1959 1.3.2.2 mrg ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 1960 1.3.2.2 mrg /* start at lowest available bit-rate, AMRR will raise */ 1961 1.3.2.2 mrg ni->ni_txrate = 0; 1962 1.3.2.2 mrg 1963 1.3.2.2 mrg for (i = 0; i < rs->rs_nrates; i++) { 1964 1.3.2.2 mrg rate = rs->rs_rates[i] & IEEE80211_RATE_VAL; 1965 1.3.2.2 mrg /* convert 802.11 rate to hardware rate index */ 1966 1.3.2.2 mrg for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 1967 1.3.2.2 mrg if (rt2860_rates[ridx].rate == rate) 1968 1.3.2.2 mrg break; 1969 1.3.2.2 mrg rn->ridx[i] = ridx; 1970 1.3.2.2 mrg /* determine rate of control response frames */ 1971 1.3.2.2 mrg for (j = i; j >= 0; j--) { 1972 1.3.2.2 mrg if ((rs->rs_rates[j] & IEEE80211_RATE_BASIC) && 1973 1.3.2.2 mrg rt2860_rates[rn->ridx[i]].phy == 1974 1.3.2.2 mrg rt2860_rates[rn->ridx[j]].phy) 1975 1.3.2.2 mrg break; 1976 1.3.2.2 mrg } 1977 1.3.2.2 mrg if (j >= 0) { 1978 1.3.2.2 mrg rn->ctl_ridx[i] = rn->ridx[j]; 1979 1.3.2.2 mrg } else { 1980 1.3.2.2 mrg /* no basic rate found, use mandatory one */ 1981 1.3.2.2 mrg rn->ctl_ridx[i] = rt2860_rates[ridx].ctl_ridx; 1982 1.3.2.2 mrg } 1983 1.3.2.2 mrg DPRINTF(("rate=0x%02x ridx=%d ctl_ridx=%d\n", 1984 1.3.2.2 mrg rs->rs_rates[i], rn->ridx[i], rn->ctl_ridx[i])); 1985 1.3.2.2 mrg } 1986 1.3.2.2 mrg } 1987 1.3.2.2 mrg 1988 1.3.2.2 mrg /* 1989 1.3.2.2 mrg * Return the Rx chain with the highest RSSI for a given frame. 1990 1.3.2.2 mrg */ 1991 1.3.2.2 mrg static __inline uint8_t 1992 1.3.2.2 mrg run_maxrssi_chain(struct run_softc *sc, const struct rt2860_rxwi *rxwi) 1993 1.3.2.2 mrg { 1994 1.3.2.2 mrg uint8_t rxchain = 0; 1995 1.3.2.2 mrg 1996 1.3.2.2 mrg if (sc->nrxchains > 1) { 1997 1.3.2.2 mrg if (rxwi->rssi[1] > rxwi->rssi[rxchain]) 1998 1.3.2.2 mrg rxchain = 1; 1999 1.3.2.2 mrg if (sc->nrxchains > 2) 2000 1.3.2.2 mrg if (rxwi->rssi[2] > rxwi->rssi[rxchain]) 2001 1.3.2.2 mrg rxchain = 2; 2002 1.3.2.2 mrg } 2003 1.3.2.2 mrg return (rxchain); 2004 1.3.2.2 mrg } 2005 1.3.2.2 mrg 2006 1.3.2.2 mrg static void 2007 1.3.2.2 mrg run_rx_frame(struct run_softc *sc, uint8_t *buf, int dmalen) 2008 1.3.2.2 mrg { 2009 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 2010 1.3.2.2 mrg struct ifnet *ifp = &sc->sc_if; 2011 1.3.2.2 mrg struct ieee80211_frame *wh; 2012 1.3.2.2 mrg struct ieee80211_node *ni; 2013 1.3.2.2 mrg struct rt2870_rxd *rxd; 2014 1.3.2.2 mrg struct rt2860_rxwi *rxwi; 2015 1.3.2.2 mrg struct mbuf *m; 2016 1.3.2.2 mrg uint32_t flags; 2017 1.3.2.2 mrg uint16_t len, phy; 2018 1.3.2.2 mrg uint8_t ant, rssi; 2019 1.3.2.2 mrg int s; 2020 1.3.2.2 mrg #ifdef RUN_HWCRYPTO 2021 1.3.2.2 mrg int decrypted = 0; 2022 1.3.2.2 mrg #endif 2023 1.3.2.2 mrg 2024 1.3.2.2 mrg rxwi = (struct rt2860_rxwi *)buf; 2025 1.3.2.2 mrg len = le16toh(rxwi->len) & 0xfff; 2026 1.3.2.2 mrg if (__predict_false(len > dmalen)) { 2027 1.3.2.2 mrg DPRINTF(("bad RXWI length %u > %u\n", len, dmalen)); 2028 1.3.2.2 mrg return; 2029 1.3.2.2 mrg } 2030 1.3.2.2 mrg /* Rx descriptor is located at the end */ 2031 1.3.2.2 mrg rxd = (struct rt2870_rxd *)(buf + dmalen); 2032 1.3.2.2 mrg flags = le32toh(rxd->flags); 2033 1.3.2.2 mrg 2034 1.3.2.2 mrg if (__predict_false(flags & (RT2860_RX_CRCERR | RT2860_RX_ICVERR))) { 2035 1.3.2.2 mrg ifp->if_ierrors++; 2036 1.3.2.2 mrg return; 2037 1.3.2.2 mrg } 2038 1.3.2.2 mrg 2039 1.3.2.2 mrg wh = (struct ieee80211_frame *)(rxwi + 1); 2040 1.3.2.2 mrg #ifdef RUN_HWCRYPTO 2041 1.3.2.2 mrg if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2042 1.3.2.2 mrg wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2043 1.3.2.2 mrg decrypted = 1; 2044 1.3.2.2 mrg } 2045 1.3.2.2 mrg #endif 2046 1.3.2.2 mrg 2047 1.3.2.2 mrg if (__predict_false((flags & RT2860_RX_MICERR))) { 2048 1.3.2.2 mrg /* report MIC failures to net80211 for TKIP */ 2049 1.3.2.2 mrg ieee80211_notify_michael_failure(ic, wh, 0/* XXX */); 2050 1.3.2.2 mrg ifp->if_ierrors++; 2051 1.3.2.2 mrg return; 2052 1.3.2.2 mrg } 2053 1.3.2.2 mrg 2054 1.3.2.2 mrg if (flags & RT2860_RX_L2PAD) { 2055 1.3.2.2 mrg u_int hdrlen = ieee80211_hdrspace(ic, wh); 2056 1.3.2.2 mrg ovbcopy(wh, (uint8_t *)wh + 2, hdrlen); 2057 1.3.2.2 mrg wh = (struct ieee80211_frame *)((uint8_t *)wh + 2); 2058 1.3.2.2 mrg } 2059 1.3.2.2 mrg 2060 1.3.2.2 mrg /* could use m_devget but net80211 wants contig mgmt frames */ 2061 1.3.2.2 mrg MGETHDR(m, M_DONTWAIT, MT_DATA); 2062 1.3.2.2 mrg if (__predict_false(m == NULL)) { 2063 1.3.2.2 mrg ifp->if_ierrors++; 2064 1.3.2.2 mrg return; 2065 1.3.2.2 mrg } 2066 1.3.2.2 mrg if (len > MHLEN) { 2067 1.3.2.2 mrg MCLGET(m, M_DONTWAIT); 2068 1.3.2.2 mrg if (__predict_false(!(m->m_flags & M_EXT))) { 2069 1.3.2.2 mrg ifp->if_ierrors++; 2070 1.3.2.2 mrg m_freem(m); 2071 1.3.2.2 mrg return; 2072 1.3.2.2 mrg } 2073 1.3.2.2 mrg } 2074 1.3.2.2 mrg /* finalize mbuf */ 2075 1.3.2.2 mrg m->m_pkthdr.rcvif = ifp; 2076 1.3.2.2 mrg memcpy(mtod(m, void *), wh, len); 2077 1.3.2.2 mrg m->m_pkthdr.len = m->m_len = len; 2078 1.3.2.2 mrg 2079 1.3.2.2 mrg ant = run_maxrssi_chain(sc, rxwi); 2080 1.3.2.2 mrg rssi = rxwi->rssi[ant]; 2081 1.3.2.2 mrg 2082 1.3.2.2 mrg if (__predict_false(sc->sc_drvbpf != NULL)) { 2083 1.3.2.2 mrg struct run_rx_radiotap_header *tap = &sc->sc_rxtap; 2084 1.3.2.2 mrg 2085 1.3.2.2 mrg tap->wr_flags = 0; 2086 1.3.2.2 mrg tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 2087 1.3.2.2 mrg tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2088 1.3.2.2 mrg tap->wr_antsignal = rssi; 2089 1.3.2.2 mrg tap->wr_antenna = ant; 2090 1.3.2.2 mrg tap->wr_dbm_antsignal = run_rssi2dbm(sc, rssi, ant); 2091 1.3.2.2 mrg tap->wr_rate = 2; /* in case it can't be found below */ 2092 1.3.2.2 mrg phy = le16toh(rxwi->phy); 2093 1.3.2.2 mrg switch (phy & RT2860_PHY_MODE) { 2094 1.3.2.2 mrg case RT2860_PHY_CCK: 2095 1.3.2.2 mrg switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) { 2096 1.3.2.2 mrg case 0: tap->wr_rate = 2; break; 2097 1.3.2.2 mrg case 1: tap->wr_rate = 4; break; 2098 1.3.2.2 mrg case 2: tap->wr_rate = 11; break; 2099 1.3.2.2 mrg case 3: tap->wr_rate = 22; break; 2100 1.3.2.2 mrg } 2101 1.3.2.2 mrg if (phy & RT2860_PHY_SHPRE) 2102 1.3.2.2 mrg tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2103 1.3.2.2 mrg break; 2104 1.3.2.2 mrg case RT2860_PHY_OFDM: 2105 1.3.2.2 mrg switch (phy & RT2860_PHY_MCS) { 2106 1.3.2.2 mrg case 0: tap->wr_rate = 12; break; 2107 1.3.2.2 mrg case 1: tap->wr_rate = 18; break; 2108 1.3.2.2 mrg case 2: tap->wr_rate = 24; break; 2109 1.3.2.2 mrg case 3: tap->wr_rate = 36; break; 2110 1.3.2.2 mrg case 4: tap->wr_rate = 48; break; 2111 1.3.2.2 mrg case 5: tap->wr_rate = 72; break; 2112 1.3.2.2 mrg case 6: tap->wr_rate = 96; break; 2113 1.3.2.2 mrg case 7: tap->wr_rate = 108; break; 2114 1.3.2.2 mrg } 2115 1.3.2.2 mrg break; 2116 1.3.2.2 mrg } 2117 1.3.2.2 mrg bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 2118 1.3.2.2 mrg } 2119 1.3.2.2 mrg 2120 1.3.2.2 mrg s = splnet(); 2121 1.3.2.2 mrg ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2122 1.3.2.2 mrg #ifdef RUN_HWCRYPTO 2123 1.3.2.2 mrg if (decrypted) { 2124 1.3.2.2 mrg uint32_t icflags = ic->ic_flags; 2125 1.3.2.2 mrg 2126 1.3.2.2 mrg ic->ic_flags &= ~IEEE80211_F_DROPUNENC; /* XXX */ 2127 1.3.2.2 mrg ieee80211_input(ic, m, ni, rssi, 0); 2128 1.3.2.2 mrg ic->ic_flags = icflags; 2129 1.3.2.2 mrg } else 2130 1.3.2.2 mrg #endif 2131 1.3.2.2 mrg ieee80211_input(ic, m, ni, rssi, 0); 2132 1.3.2.2 mrg 2133 1.3.2.2 mrg /* node is no longer needed */ 2134 1.3.2.2 mrg ieee80211_free_node(ni); 2135 1.3.2.2 mrg 2136 1.3.2.2 mrg /* 2137 1.3.2.2 mrg * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 2138 1.3.2.2 mrg * without calling if_start(). 2139 1.3.2.2 mrg */ 2140 1.3.2.2 mrg if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 2141 1.3.2.2 mrg run_start(ifp); 2142 1.3.2.2 mrg 2143 1.3.2.2 mrg splx(s); 2144 1.3.2.2 mrg } 2145 1.3.2.2 mrg 2146 1.3.2.2 mrg static void 2147 1.3.2.2 mrg run_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 2148 1.3.2.2 mrg { 2149 1.3.2.2 mrg struct run_rx_data *data = priv; 2150 1.3.2.2 mrg struct run_softc *sc = data->sc; 2151 1.3.2.2 mrg uint8_t *buf; 2152 1.3.2.2 mrg uint32_t dmalen; 2153 1.3.2.2 mrg int xferlen; 2154 1.3.2.2 mrg 2155 1.3.2.2 mrg if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2156 1.3.2.2 mrg DPRINTF(("RX status=%d\n", status)); 2157 1.3.2.2 mrg if (status == USBD_STALLED) 2158 1.3.2.2 mrg usbd_clear_endpoint_stall_async(sc->rxq.pipeh); 2159 1.3.2.2 mrg if (status != USBD_CANCELLED) 2160 1.3.2.2 mrg goto skip; 2161 1.3.2.2 mrg return; 2162 1.3.2.2 mrg } 2163 1.3.2.2 mrg usbd_get_xfer_status(xfer, NULL, NULL, &xferlen, NULL); 2164 1.3.2.2 mrg 2165 1.3.2.2 mrg if (__predict_false(xferlen < (int)(sizeof(uint32_t) + 2166 1.3.2.2 mrg sizeof(struct rt2860_rxwi) + sizeof(struct rt2870_rxd)))) { 2167 1.3.2.2 mrg DPRINTF(("xfer too short %d\n", xferlen)); 2168 1.3.2.2 mrg goto skip; 2169 1.3.2.2 mrg } 2170 1.3.2.2 mrg 2171 1.3.2.2 mrg /* HW can aggregate multiple 802.11 frames in a single USB xfer */ 2172 1.3.2.2 mrg buf = data->buf; 2173 1.3.2.2 mrg while (xferlen > 8) { 2174 1.3.2.2 mrg dmalen = le32toh(*(uint32_t *)buf) & 0xffff; 2175 1.3.2.2 mrg 2176 1.3.2.2 mrg if (__predict_false(dmalen == 0 || (dmalen & 3) != 0)) { 2177 1.3.2.2 mrg DPRINTF(("bad DMA length %u (%x)\n", dmalen, dmalen)); 2178 1.3.2.2 mrg break; 2179 1.3.2.2 mrg } 2180 1.3.2.2 mrg if (__predict_false(dmalen + 8 > (uint32_t)xferlen)) { 2181 1.3.2.2 mrg DPRINTF(("bad DMA length %u > %d\n", 2182 1.3.2.2 mrg dmalen + 8, xferlen)); 2183 1.3.2.2 mrg break; 2184 1.3.2.2 mrg } 2185 1.3.2.2 mrg run_rx_frame(sc, buf + sizeof (uint32_t), dmalen); 2186 1.3.2.2 mrg buf += dmalen + 8; 2187 1.3.2.2 mrg xferlen -= dmalen + 8; 2188 1.3.2.2 mrg } 2189 1.3.2.2 mrg 2190 1.3.2.2 mrg skip: /* setup a new transfer */ 2191 1.3.2.2 mrg usbd_setup_xfer(xfer, sc->rxq.pipeh, data, data->buf, RUN_MAX_RXSZ, 2192 1.3.2.2 mrg USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT, run_rxeof); 2193 1.3.2.2 mrg (void)usbd_transfer(data->xfer); 2194 1.3.2.2 mrg } 2195 1.3.2.2 mrg 2196 1.3.2.2 mrg static void 2197 1.3.2.2 mrg run_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 2198 1.3.2.2 mrg { 2199 1.3.2.2 mrg struct run_tx_data *data = priv; 2200 1.3.2.2 mrg struct run_softc *sc = data->sc; 2201 1.3.2.2 mrg struct run_tx_ring *txq = &sc->txq[data->qid]; 2202 1.3.2.2 mrg struct ifnet *ifp = &sc->sc_if; 2203 1.3.2.2 mrg int s; 2204 1.3.2.2 mrg 2205 1.3.2.2 mrg if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2206 1.3.2.2 mrg DPRINTF(("TX status=%d\n", status)); 2207 1.3.2.2 mrg if (status == USBD_STALLED) 2208 1.3.2.2 mrg usbd_clear_endpoint_stall_async(txq->pipeh); 2209 1.3.2.2 mrg ifp->if_oerrors++; 2210 1.3.2.2 mrg return; 2211 1.3.2.2 mrg } 2212 1.3.2.2 mrg 2213 1.3.2.2 mrg s = splnet(); 2214 1.3.2.2 mrg sc->sc_tx_timer = 0; 2215 1.3.2.2 mrg ifp->if_opackets++; 2216 1.3.2.2 mrg if (--txq->queued < RUN_TX_RING_COUNT) { 2217 1.3.2.2 mrg sc->qfullmsk &= ~(1 << data->qid); 2218 1.3.2.2 mrg ifp->if_flags &= ~IFF_OACTIVE; 2219 1.3.2.2 mrg run_start(ifp); 2220 1.3.2.2 mrg } 2221 1.3.2.2 mrg splx(s); 2222 1.3.2.2 mrg } 2223 1.3.2.2 mrg 2224 1.3.2.2 mrg static int 2225 1.3.2.2 mrg run_tx(struct run_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 2226 1.3.2.2 mrg { 2227 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 2228 1.3.2.2 mrg struct run_node *rn = (void *)ni; 2229 1.3.2.2 mrg struct ieee80211_frame *wh; 2230 1.3.2.2 mrg #ifndef RUN_HWCRYPTO 2231 1.3.2.2 mrg struct ieee80211_key *k; 2232 1.3.2.2 mrg #endif 2233 1.3.2.2 mrg struct run_tx_ring *ring; 2234 1.3.2.2 mrg struct run_tx_data *data; 2235 1.3.2.2 mrg struct rt2870_txd *txd; 2236 1.3.2.2 mrg struct rt2860_txwi *txwi; 2237 1.3.2.2 mrg uint16_t dur; 2238 1.3.2.2 mrg uint8_t type, mcs, tid, qid, qos = 0; 2239 1.3.2.2 mrg int error, hasqos, ridx, ctl_ridx, xferlen; 2240 1.3.2.2 mrg 2241 1.3.2.2 mrg wh = mtod(m, struct ieee80211_frame *); 2242 1.3.2.2 mrg 2243 1.3.2.2 mrg #ifndef RUN_HWCRYPTO 2244 1.3.2.2 mrg if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2245 1.3.2.2 mrg k = ieee80211_crypto_encap(ic, ni, m); 2246 1.3.2.2 mrg if (k == NULL) { 2247 1.3.2.2 mrg m_freem(m); 2248 1.3.2.2 mrg return (ENOBUFS); 2249 1.3.2.2 mrg } 2250 1.3.2.2 mrg 2251 1.3.2.2 mrg /* packet header may have moved, reset our local pointer */ 2252 1.3.2.2 mrg wh = mtod(m, struct ieee80211_frame *); 2253 1.3.2.2 mrg } 2254 1.3.2.2 mrg #endif 2255 1.3.2.2 mrg type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2256 1.3.2.2 mrg 2257 1.3.2.2 mrg if ((hasqos = IEEE80211_QOS_HAS_SEQ(wh))) { 2258 1.3.2.2 mrg qos = ((struct ieee80211_qosframe *)wh)->i_qos[0]; 2259 1.3.2.2 mrg tid = qos & IEEE80211_QOS_TID; 2260 1.3.2.2 mrg qid = TID_TO_WME_AC(tid); 2261 1.3.2.2 mrg } else { 2262 1.3.2.2 mrg tid = 0; 2263 1.3.2.2 mrg qid = WME_AC_BE; 2264 1.3.2.2 mrg } 2265 1.3.2.2 mrg ring = &sc->txq[qid]; 2266 1.3.2.2 mrg data = &ring->data[ring->cur]; 2267 1.3.2.2 mrg 2268 1.3.2.2 mrg /* pickup a rate index */ 2269 1.3.2.2 mrg if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 2270 1.3.2.2 mrg type != IEEE80211_FC0_TYPE_DATA) { 2271 1.3.2.2 mrg ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 2272 1.3.2.2 mrg RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 2273 1.3.2.2 mrg ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2274 1.3.2.2 mrg } else if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 2275 1.3.2.2 mrg ridx = sc->fixed_ridx; 2276 1.3.2.2 mrg ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2277 1.3.2.2 mrg } else { 2278 1.3.2.2 mrg ridx = rn->ridx[ni->ni_txrate]; 2279 1.3.2.2 mrg ctl_ridx = rn->ctl_ridx[ni->ni_txrate]; 2280 1.3.2.2 mrg } 2281 1.3.2.2 mrg 2282 1.3.2.2 mrg /* get MCS code from rate index */ 2283 1.3.2.2 mrg mcs = rt2860_rates[ridx].mcs; 2284 1.3.2.2 mrg 2285 1.3.2.2 mrg xferlen = sizeof (*txwi) + m->m_pkthdr.len; 2286 1.3.2.2 mrg /* roundup to 32-bit alignment */ 2287 1.3.2.2 mrg xferlen = (xferlen + 3) & ~3; 2288 1.3.2.2 mrg 2289 1.3.2.2 mrg txd = (struct rt2870_txd *)data->buf; 2290 1.3.2.2 mrg txd->flags = RT2860_TX_QSEL_EDCA; 2291 1.3.2.2 mrg txd->len = htole16(xferlen); 2292 1.3.2.2 mrg 2293 1.3.2.2 mrg /* setup TX Wireless Information */ 2294 1.3.2.2 mrg txwi = (struct rt2860_txwi *)(txd + 1); 2295 1.3.2.2 mrg txwi->flags = 0; 2296 1.3.2.2 mrg txwi->xflags = hasqos ? 0 : RT2860_TX_NSEQ; 2297 1.3.2.2 mrg txwi->wcid = (type == IEEE80211_FC0_TYPE_DATA) ? 2298 1.3.2.2 mrg RUN_AID2WCID(ni->ni_associd) : 0xff; 2299 1.3.2.2 mrg txwi->len = htole16(m->m_pkthdr.len); 2300 1.3.2.2 mrg if (rt2860_rates[ridx].phy == IEEE80211_T_DS) { 2301 1.3.2.2 mrg txwi->phy = htole16(RT2860_PHY_CCK); 2302 1.3.2.2 mrg if (ridx != RT2860_RIDX_CCK1 && 2303 1.3.2.2 mrg (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 2304 1.3.2.2 mrg mcs |= RT2860_PHY_SHPRE; 2305 1.3.2.2 mrg } else 2306 1.3.2.2 mrg txwi->phy = htole16(RT2860_PHY_OFDM); 2307 1.3.2.2 mrg txwi->phy |= htole16(mcs); 2308 1.3.2.2 mrg 2309 1.3.2.2 mrg txwi->txop = RT2860_TX_TXOP_BACKOFF; 2310 1.3.2.2 mrg 2311 1.3.2.2 mrg #define IEEE80211_QOS_ACKPOLICY_NOACK 0x20 2312 1.3.2.2 mrg if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 2313 1.3.2.2 mrg (!hasqos || (qos & IEEE80211_QOS_ACKPOLICY) != 2314 1.3.2.2 mrg IEEE80211_QOS_ACKPOLICY_NOACK)) { 2315 1.3.2.2 mrg txwi->xflags |= RT2860_TX_ACK; 2316 1.3.2.2 mrg if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 2317 1.3.2.2 mrg dur = rt2860_rates[ctl_ridx].sp_ack_dur; 2318 1.3.2.2 mrg else 2319 1.3.2.2 mrg dur = rt2860_rates[ctl_ridx].lp_ack_dur; 2320 1.3.2.2 mrg *(uint16_t *)wh->i_dur = htole16(dur); 2321 1.3.2.2 mrg } 2322 1.3.2.2 mrg 2323 1.3.2.2 mrg #ifndef IEEE80211_STA_ONLY 2324 1.3.2.2 mrg /* ask MAC to insert timestamp into probe responses */ 2325 1.3.2.2 mrg if ((wh->i_fc[0] & 2326 1.3.2.2 mrg (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 2327 1.3.2.2 mrg (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 2328 1.3.2.2 mrg /* NOTE: beacons do not pass through tx_data() */ 2329 1.3.2.2 mrg txwi->flags |= RT2860_TX_TS; 2330 1.3.2.2 mrg #endif 2331 1.3.2.2 mrg 2332 1.3.2.2 mrg if (__predict_false(sc->sc_drvbpf != NULL)) { 2333 1.3.2.2 mrg struct run_tx_radiotap_header *tap = &sc->sc_txtap; 2334 1.3.2.2 mrg 2335 1.3.2.2 mrg tap->wt_flags = 0; 2336 1.3.2.2 mrg tap->wt_rate = rt2860_rates[ridx].rate; 2337 1.3.2.2 mrg tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2338 1.3.2.2 mrg tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2339 1.3.2.2 mrg tap->wt_hwqueue = qid; 2340 1.3.2.2 mrg if (mcs & RT2860_PHY_SHPRE) 2341 1.3.2.2 mrg tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2342 1.3.2.2 mrg 2343 1.3.2.2 mrg bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 2344 1.3.2.2 mrg } 2345 1.3.2.2 mrg 2346 1.3.2.2 mrg m_copydata(m, 0, m->m_pkthdr.len, (void *)(txwi + 1)); 2347 1.3.2.2 mrg m_freem(m); 2348 1.3.2.2 mrg 2349 1.3.2.2 mrg xferlen += sizeof (*txd) + 4; 2350 1.3.2.2 mrg 2351 1.3.2.2 mrg usbd_setup_xfer(data->xfer, ring->pipeh, data, data->buf, xferlen, 2352 1.3.2.2 mrg USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RUN_TX_TIMEOUT, run_txeof); 2353 1.3.2.2 mrg error = usbd_transfer(data->xfer); 2354 1.3.2.2 mrg if (__predict_false(error != USBD_IN_PROGRESS && 2355 1.3.2.2 mrg error != USBD_NORMAL_COMPLETION)) 2356 1.3.2.2 mrg return (error); 2357 1.3.2.2 mrg 2358 1.3.2.2 mrg ieee80211_free_node(ni); 2359 1.3.2.2 mrg 2360 1.3.2.2 mrg ring->cur = (ring->cur + 1) % RUN_TX_RING_COUNT; 2361 1.3.2.2 mrg if (++ring->queued >= RUN_TX_RING_COUNT) 2362 1.3.2.2 mrg sc->qfullmsk |= 1 << qid; 2363 1.3.2.2 mrg 2364 1.3.2.2 mrg return (0); 2365 1.3.2.2 mrg } 2366 1.3.2.2 mrg 2367 1.3.2.2 mrg static void 2368 1.3.2.2 mrg run_start(struct ifnet *ifp) 2369 1.3.2.2 mrg { 2370 1.3.2.2 mrg struct run_softc *sc = ifp->if_softc; 2371 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 2372 1.3.2.2 mrg struct ether_header *eh; 2373 1.3.2.2 mrg struct ieee80211_node *ni; 2374 1.3.2.2 mrg struct mbuf *m; 2375 1.3.2.2 mrg 2376 1.3.2.2 mrg if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2377 1.3.2.2 mrg return; 2378 1.3.2.2 mrg 2379 1.3.2.2 mrg for (;;) { 2380 1.3.2.2 mrg if (sc->qfullmsk != 0) { 2381 1.3.2.2 mrg ifp->if_flags |= IFF_OACTIVE; 2382 1.3.2.2 mrg break; 2383 1.3.2.2 mrg } 2384 1.3.2.2 mrg /* send pending management frames first */ 2385 1.3.2.2 mrg IF_DEQUEUE(&ic->ic_mgtq, m); 2386 1.3.2.2 mrg if (m != NULL) { 2387 1.3.2.2 mrg ni = (void *)m->m_pkthdr.rcvif; 2388 1.3.2.2 mrg m->m_pkthdr.rcvif = NULL; 2389 1.3.2.2 mrg goto sendit; 2390 1.3.2.2 mrg } 2391 1.3.2.2 mrg if (ic->ic_state != IEEE80211_S_RUN) 2392 1.3.2.2 mrg break; 2393 1.3.2.2 mrg 2394 1.3.2.2 mrg /* encapsulate and send data frames */ 2395 1.3.2.2 mrg IFQ_DEQUEUE(&ifp->if_snd, m); 2396 1.3.2.2 mrg if (m == NULL) 2397 1.3.2.2 mrg break; 2398 1.3.2.2 mrg if (m->m_len < (int)sizeof(*eh) && 2399 1.3.2.2 mrg (m = m_pullup(m, sizeof(*eh))) == NULL) { 2400 1.3.2.2 mrg ifp->if_oerrors++; 2401 1.3.2.2 mrg continue; 2402 1.3.2.2 mrg } 2403 1.3.2.2 mrg 2404 1.3.2.2 mrg eh = mtod(m, struct ether_header *); 2405 1.3.2.2 mrg ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2406 1.3.2.2 mrg if (ni == NULL) { 2407 1.3.2.2 mrg m_freem(m); 2408 1.3.2.2 mrg ifp->if_oerrors++; 2409 1.3.2.2 mrg continue; 2410 1.3.2.2 mrg } 2411 1.3.2.2 mrg 2412 1.3.2.2 mrg bpf_mtap(ifp, m); 2413 1.3.2.2 mrg 2414 1.3.2.2 mrg if ((m = ieee80211_encap(ic, m, ni)) == NULL) { 2415 1.3.2.2 mrg ieee80211_free_node(ni); 2416 1.3.2.2 mrg ifp->if_oerrors++; 2417 1.3.2.2 mrg continue; 2418 1.3.2.2 mrg } 2419 1.3.2.2 mrg sendit: 2420 1.3.2.2 mrg bpf_mtap3(ic->ic_rawbpf, m); 2421 1.3.2.2 mrg 2422 1.3.2.2 mrg if (run_tx(sc, m, ni) != 0) { 2423 1.3.2.2 mrg ieee80211_free_node(ni); 2424 1.3.2.2 mrg ifp->if_oerrors++; 2425 1.3.2.2 mrg continue; 2426 1.3.2.2 mrg } 2427 1.3.2.2 mrg 2428 1.3.2.2 mrg sc->sc_tx_timer = 5; 2429 1.3.2.2 mrg ifp->if_timer = 1; 2430 1.3.2.2 mrg } 2431 1.3.2.2 mrg } 2432 1.3.2.2 mrg 2433 1.3.2.2 mrg static void 2434 1.3.2.2 mrg run_watchdog(struct ifnet *ifp) 2435 1.3.2.2 mrg { 2436 1.3.2.2 mrg struct run_softc *sc = ifp->if_softc; 2437 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 2438 1.3.2.2 mrg 2439 1.3.2.2 mrg ifp->if_timer = 0; 2440 1.3.2.2 mrg 2441 1.3.2.2 mrg if (sc->sc_tx_timer > 0) { 2442 1.3.2.2 mrg if (--sc->sc_tx_timer == 0) { 2443 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, "device timeout\n"); 2444 1.3.2.2 mrg /* run_init(ifp); XXX needs a process context! */ 2445 1.3.2.2 mrg ifp->if_oerrors++; 2446 1.3.2.2 mrg return; 2447 1.3.2.2 mrg } 2448 1.3.2.2 mrg ifp->if_timer = 1; 2449 1.3.2.2 mrg } 2450 1.3.2.2 mrg 2451 1.3.2.2 mrg ieee80211_watchdog(ic); 2452 1.3.2.2 mrg } 2453 1.3.2.2 mrg 2454 1.3.2.2 mrg static int 2455 1.3.2.2 mrg run_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2456 1.3.2.2 mrg { 2457 1.3.2.2 mrg struct run_softc *sc = ifp->if_softc; 2458 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 2459 1.3.2.2 mrg int s, error = 0; 2460 1.3.2.2 mrg 2461 1.3.2.2 mrg s = splnet(); 2462 1.3.2.2 mrg 2463 1.3.2.2 mrg switch (cmd) { 2464 1.3.2.2 mrg case SIOCSIFFLAGS: 2465 1.3.2.2 mrg if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2466 1.3.2.2 mrg break; 2467 1.3.2.2 mrg switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 2468 1.3.2.2 mrg case IFF_UP|IFF_RUNNING: 2469 1.3.2.2 mrg break; 2470 1.3.2.2 mrg case IFF_UP: 2471 1.3.2.2 mrg run_init(ifp); 2472 1.3.2.2 mrg break; 2473 1.3.2.2 mrg case IFF_RUNNING: 2474 1.3.2.2 mrg run_stop(ifp, 1); 2475 1.3.2.2 mrg break; 2476 1.3.2.2 mrg case 0: 2477 1.3.2.2 mrg break; 2478 1.3.2.2 mrg } 2479 1.3.2.2 mrg break; 2480 1.3.2.2 mrg 2481 1.3.2.2 mrg case SIOCADDMULTI: 2482 1.3.2.2 mrg case SIOCDELMULTI: 2483 1.3.2.2 mrg if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 2484 1.3.2.2 mrg /* setup multicast filter, etc */ 2485 1.3.2.2 mrg error = 0; 2486 1.3.2.2 mrg } 2487 1.3.2.2 mrg break; 2488 1.3.2.2 mrg 2489 1.3.2.2 mrg default: 2490 1.3.2.2 mrg error = ieee80211_ioctl(ic, cmd, data); 2491 1.3.2.2 mrg break; 2492 1.3.2.2 mrg } 2493 1.3.2.2 mrg 2494 1.3.2.2 mrg if (error == ENETRESET) { 2495 1.3.2.2 mrg if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2496 1.3.2.2 mrg (IFF_UP | IFF_RUNNING)) { 2497 1.3.2.2 mrg run_init(ifp); 2498 1.3.2.2 mrg } 2499 1.3.2.2 mrg error = 0; 2500 1.3.2.2 mrg } 2501 1.3.2.2 mrg 2502 1.3.2.2 mrg splx(s); 2503 1.3.2.2 mrg 2504 1.3.2.2 mrg return (error); 2505 1.3.2.2 mrg } 2506 1.3.2.2 mrg 2507 1.3.2.2 mrg static void 2508 1.3.2.2 mrg run_select_chan_group(struct run_softc *sc, int group) 2509 1.3.2.2 mrg { 2510 1.3.2.2 mrg uint32_t tmp; 2511 1.3.2.2 mrg uint8_t agc; 2512 1.3.2.2 mrg 2513 1.3.2.2 mrg run_bbp_write(sc, 62, 0x37 - sc->lna[group]); 2514 1.3.2.2 mrg run_bbp_write(sc, 63, 0x37 - sc->lna[group]); 2515 1.3.2.2 mrg run_bbp_write(sc, 64, 0x37 - sc->lna[group]); 2516 1.3.2.2 mrg run_bbp_write(sc, 86, 0x00); 2517 1.3.2.2 mrg 2518 1.3.2.2 mrg if (group == 0) { 2519 1.3.2.2 mrg if (sc->ext_2ghz_lna) { 2520 1.3.2.2 mrg run_bbp_write(sc, 82, 0x62); 2521 1.3.2.2 mrg run_bbp_write(sc, 75, 0x46); 2522 1.3.2.2 mrg } else { 2523 1.3.2.2 mrg run_bbp_write(sc, 82, 0x84); 2524 1.3.2.2 mrg run_bbp_write(sc, 75, 0x50); 2525 1.3.2.2 mrg } 2526 1.3.2.2 mrg } else { 2527 1.3.2.2 mrg if (sc->mac_ver == 0x3572) 2528 1.3.2.2 mrg run_bbp_write(sc, 82, 0x94); 2529 1.3.2.2 mrg else 2530 1.3.2.2 mrg run_bbp_write(sc, 82, 0xf2); 2531 1.3.2.2 mrg if (sc->ext_5ghz_lna) 2532 1.3.2.2 mrg run_bbp_write(sc, 75, 0x46); 2533 1.3.2.2 mrg else 2534 1.3.2.2 mrg run_bbp_write(sc, 75, 0x50); 2535 1.3.2.2 mrg } 2536 1.3.2.2 mrg 2537 1.3.2.2 mrg run_read(sc, RT2860_TX_BAND_CFG, &tmp); 2538 1.3.2.2 mrg tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P); 2539 1.3.2.2 mrg tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P; 2540 1.3.2.2 mrg run_write(sc, RT2860_TX_BAND_CFG, tmp); 2541 1.3.2.2 mrg 2542 1.3.2.2 mrg /* enable appropriate Power Amplifiers and Low Noise Amplifiers */ 2543 1.3.2.2 mrg tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN; 2544 1.3.2.2 mrg if (sc->nrxchains > 1) 2545 1.3.2.2 mrg tmp |= RT2860_LNA_PE1_EN; 2546 1.3.2.2 mrg if (group == 0) { /* 2GHz */ 2547 1.3.2.2 mrg tmp |= RT2860_PA_PE_G0_EN; 2548 1.3.2.2 mrg if (sc->ntxchains > 1) 2549 1.3.2.2 mrg tmp |= RT2860_PA_PE_G1_EN; 2550 1.3.2.2 mrg } else { /* 5GHz */ 2551 1.3.2.2 mrg tmp |= RT2860_PA_PE_A0_EN; 2552 1.3.2.2 mrg if (sc->ntxchains > 1) 2553 1.3.2.2 mrg tmp |= RT2860_PA_PE_A1_EN; 2554 1.3.2.2 mrg } 2555 1.3.2.2 mrg if (sc->mac_ver == 0x3572) { 2556 1.3.2.2 mrg run_rt3070_rf_write(sc, 8, 0x00); 2557 1.3.2.2 mrg run_write(sc, RT2860_TX_PIN_CFG, tmp); 2558 1.3.2.2 mrg run_rt3070_rf_write(sc, 8, 0x80); 2559 1.3.2.2 mrg } else 2560 1.3.2.2 mrg run_write(sc, RT2860_TX_PIN_CFG, tmp); 2561 1.3.2.2 mrg 2562 1.3.2.2 mrg /* set initial AGC value */ 2563 1.3.2.2 mrg if (group == 0) { /* 2GHz band */ 2564 1.3.2.2 mrg if (sc->mac_ver >= 0x3070) 2565 1.3.2.2 mrg agc = 0x1c + sc->lna[0] * 2; 2566 1.3.2.2 mrg else 2567 1.3.2.2 mrg agc = 0x2e + sc->lna[0]; 2568 1.3.2.2 mrg } else { /* 5GHz band */ 2569 1.3.2.2 mrg if (sc->mac_ver == 0x3572) 2570 1.3.2.2 mrg agc = 0x22 + (sc->lna[group] * 5) / 3; 2571 1.3.2.2 mrg else 2572 1.3.2.2 mrg agc = 0x32 + (sc->lna[group] * 5) / 3; 2573 1.3.2.2 mrg } 2574 1.3.2.2 mrg run_set_agc(sc, agc); 2575 1.3.2.2 mrg } 2576 1.3.2.2 mrg 2577 1.3.2.2 mrg static void 2578 1.3.2.2 mrg run_rt2870_set_chan(struct run_softc *sc, u_int chan) 2579 1.3.2.2 mrg { 2580 1.3.2.2 mrg const struct rfprog *rfprog = rt2860_rf2850; 2581 1.3.2.2 mrg uint32_t r2, r3, r4; 2582 1.3.2.2 mrg int8_t txpow1, txpow2; 2583 1.3.2.2 mrg int i; 2584 1.3.2.2 mrg 2585 1.3.2.2 mrg /* find the settings for this channel (we know it exists) */ 2586 1.3.2.2 mrg for (i = 0; rfprog[i].chan != chan; i++); 2587 1.3.2.2 mrg 2588 1.3.2.2 mrg r2 = rfprog[i].r2; 2589 1.3.2.2 mrg if (sc->ntxchains == 1) 2590 1.3.2.2 mrg r2 |= 1 << 12; /* 1T: disable Tx chain 2 */ 2591 1.3.2.2 mrg if (sc->nrxchains == 1) 2592 1.3.2.2 mrg r2 |= 1 << 15 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2593 1.3.2.2 mrg else if (sc->nrxchains == 2) 2594 1.3.2.2 mrg r2 |= 1 << 4; /* 2R: disable Rx chain 3 */ 2595 1.3.2.2 mrg 2596 1.3.2.2 mrg /* use Tx power values from EEPROM */ 2597 1.3.2.2 mrg txpow1 = sc->txpow1[i]; 2598 1.3.2.2 mrg txpow2 = sc->txpow2[i]; 2599 1.3.2.2 mrg if (chan > 14) { 2600 1.3.2.2 mrg if (txpow1 >= 0) 2601 1.3.2.2 mrg txpow1 = txpow1 << 1 | 1; 2602 1.3.2.2 mrg else 2603 1.3.2.2 mrg txpow1 = (7 + txpow1) << 1; 2604 1.3.2.2 mrg if (txpow2 >= 0) 2605 1.3.2.2 mrg txpow2 = txpow2 << 1 | 1; 2606 1.3.2.2 mrg else 2607 1.3.2.2 mrg txpow2 = (7 + txpow2) << 1; 2608 1.3.2.2 mrg } 2609 1.3.2.2 mrg r3 = rfprog[i].r3 | txpow1 << 7; 2610 1.3.2.2 mrg r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4; 2611 1.3.2.2 mrg 2612 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2613 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF2, r2); 2614 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF3, r3); 2615 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF4, r4); 2616 1.3.2.2 mrg 2617 1.3.2.2 mrg DELAY(200); 2618 1.3.2.2 mrg 2619 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2620 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF2, r2); 2621 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF3, r3 | 1); 2622 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF4, r4); 2623 1.3.2.2 mrg 2624 1.3.2.2 mrg DELAY(200); 2625 1.3.2.2 mrg 2626 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2627 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF2, r2); 2628 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF3, r3); 2629 1.3.2.2 mrg run_rt2870_rf_write(sc, RT2860_RF4, r4); 2630 1.3.2.2 mrg } 2631 1.3.2.2 mrg 2632 1.3.2.2 mrg static void 2633 1.3.2.2 mrg run_rt3070_set_chan(struct run_softc *sc, u_int chan) 2634 1.3.2.2 mrg { 2635 1.3.2.2 mrg int8_t txpow1, txpow2; 2636 1.3.2.2 mrg uint8_t rf; 2637 1.3.2.2 mrg int i; 2638 1.3.2.2 mrg 2639 1.3.2.2 mrg KASSERT(chan >= 1 && chan <= 14); /* RT3070 is 2GHz only */ 2640 1.3.2.2 mrg 2641 1.3.2.2 mrg /* find the settings for this channel (we know it exists) */ 2642 1.3.2.2 mrg for (i = 0; rt2860_rf2850[i].chan != chan; i++) 2643 1.3.2.2 mrg continue; 2644 1.3.2.2 mrg 2645 1.3.2.2 mrg /* use Tx power values from EEPROM */ 2646 1.3.2.2 mrg txpow1 = sc->txpow1[i]; 2647 1.3.2.2 mrg txpow2 = sc->txpow2[i]; 2648 1.3.2.2 mrg 2649 1.3.2.2 mrg run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2650 1.3.2.2 mrg run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2651 1.3.2.2 mrg run_rt3070_rf_read(sc, 6, &rf); 2652 1.3.2.2 mrg rf = (rf & ~0x03) | rt3070_freqs[i].r; 2653 1.3.2.2 mrg run_rt3070_rf_write(sc, 6, rf); 2654 1.3.2.2 mrg 2655 1.3.2.2 mrg /* set Tx0 power */ 2656 1.3.2.2 mrg run_rt3070_rf_read(sc, 12, &rf); 2657 1.3.2.2 mrg rf = (rf & ~0x1f) | txpow1; 2658 1.3.2.2 mrg run_rt3070_rf_write(sc, 12, rf); 2659 1.3.2.2 mrg 2660 1.3.2.2 mrg /* set Tx1 power */ 2661 1.3.2.2 mrg run_rt3070_rf_read(sc, 13, &rf); 2662 1.3.2.2 mrg rf = (rf & ~0x1f) | txpow2; 2663 1.3.2.2 mrg run_rt3070_rf_write(sc, 13, rf); 2664 1.3.2.2 mrg 2665 1.3.2.2 mrg run_rt3070_rf_read(sc, 1, &rf); 2666 1.3.2.2 mrg rf &= ~0xfc; 2667 1.3.2.2 mrg if (sc->ntxchains == 1) 2668 1.3.2.2 mrg rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2669 1.3.2.2 mrg else if (sc->ntxchains == 2) 2670 1.3.2.2 mrg rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2671 1.3.2.2 mrg if (sc->nrxchains == 1) 2672 1.3.2.2 mrg rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2673 1.3.2.2 mrg else if (sc->nrxchains == 2) 2674 1.3.2.2 mrg rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2675 1.3.2.2 mrg run_rt3070_rf_write(sc, 1, rf); 2676 1.3.2.2 mrg 2677 1.3.2.2 mrg /* set RF offset */ 2678 1.3.2.2 mrg run_rt3070_rf_read(sc, 23, &rf); 2679 1.3.2.2 mrg rf = (rf & ~0x7f) | sc->freq; 2680 1.3.2.2 mrg run_rt3070_rf_write(sc, 23, rf); 2681 1.3.2.2 mrg 2682 1.3.2.2 mrg /* program RF filter */ 2683 1.3.2.2 mrg run_rt3070_rf_read(sc, 24, &rf); /* Tx */ 2684 1.3.2.2 mrg rf = (rf & ~0x3f) | sc->rf24_20mhz; 2685 1.3.2.2 mrg run_rt3070_rf_write(sc, 24, rf); 2686 1.3.2.2 mrg run_rt3070_rf_read(sc, 31, &rf); /* Rx */ 2687 1.3.2.2 mrg rf = (rf & ~0x3f) | sc->rf24_20mhz; 2688 1.3.2.2 mrg run_rt3070_rf_write(sc, 31, rf); 2689 1.3.2.2 mrg 2690 1.3.2.2 mrg /* enable RF tuning */ 2691 1.3.2.2 mrg run_rt3070_rf_read(sc, 7, &rf); 2692 1.3.2.2 mrg run_rt3070_rf_write(sc, 7, rf | 0x01); 2693 1.3.2.2 mrg } 2694 1.3.2.2 mrg 2695 1.3.2.2 mrg static void 2696 1.3.2.2 mrg run_rt3572_set_chan(struct run_softc *sc, u_int chan) 2697 1.3.2.2 mrg { 2698 1.3.2.2 mrg int8_t txpow1, txpow2; 2699 1.3.2.2 mrg uint32_t tmp; 2700 1.3.2.2 mrg uint8_t rf; 2701 1.3.2.2 mrg int i; 2702 1.3.2.2 mrg 2703 1.3.2.2 mrg /* find the settings for this channel (we know it exists) */ 2704 1.3.2.2 mrg for (i = 0; rt2860_rf2850[i].chan != chan; i++); 2705 1.3.2.2 mrg 2706 1.3.2.2 mrg /* use Tx power values from EEPROM */ 2707 1.3.2.2 mrg txpow1 = sc->txpow1[i]; 2708 1.3.2.2 mrg txpow2 = sc->txpow2[i]; 2709 1.3.2.2 mrg 2710 1.3.2.2 mrg if (chan <= 14) { 2711 1.3.2.2 mrg run_bbp_write(sc, 25, sc->bbp25); 2712 1.3.2.2 mrg run_bbp_write(sc, 26, sc->bbp26); 2713 1.3.2.2 mrg } else { 2714 1.3.2.2 mrg /* enable IQ phase correction */ 2715 1.3.2.2 mrg run_bbp_write(sc, 25, 0x09); 2716 1.3.2.2 mrg run_bbp_write(sc, 26, 0xff); 2717 1.3.2.2 mrg } 2718 1.3.2.2 mrg 2719 1.3.2.2 mrg run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2720 1.3.2.2 mrg run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2721 1.3.2.2 mrg run_rt3070_rf_read(sc, 6, &rf); 2722 1.3.2.2 mrg rf = (rf & ~0x0f) | rt3070_freqs[i].r; 2723 1.3.2.2 mrg rf |= (chan <= 14) ? 0x08 : 0x04; 2724 1.3.2.2 mrg run_rt3070_rf_write(sc, 6, rf); 2725 1.3.2.2 mrg 2726 1.3.2.2 mrg /* set PLL mode */ 2727 1.3.2.2 mrg run_rt3070_rf_read(sc, 5, &rf); 2728 1.3.2.2 mrg rf &= ~(0x08 | 0x04); 2729 1.3.2.2 mrg rf |= (chan <= 14) ? 0x04 : 0x08; 2730 1.3.2.2 mrg run_rt3070_rf_write(sc, 5, rf); 2731 1.3.2.2 mrg 2732 1.3.2.2 mrg /* set Tx power for chain 0 */ 2733 1.3.2.2 mrg if (chan <= 14) 2734 1.3.2.2 mrg rf = 0x60 | txpow1; 2735 1.3.2.2 mrg else 2736 1.3.2.2 mrg rf = 0xe0 | (txpow1 & 0xc) << 1 | (txpow1 & 0x3); 2737 1.3.2.2 mrg run_rt3070_rf_write(sc, 12, rf); 2738 1.3.2.2 mrg 2739 1.3.2.2 mrg /* set Tx power for chain 1 */ 2740 1.3.2.2 mrg if (chan <= 14) 2741 1.3.2.2 mrg rf = 0x60 | txpow2; 2742 1.3.2.2 mrg else 2743 1.3.2.2 mrg rf = 0xe0 | (txpow2 & 0xc) << 1 | (txpow2 & 0x3); 2744 1.3.2.2 mrg run_rt3070_rf_write(sc, 13, rf); 2745 1.3.2.2 mrg 2746 1.3.2.2 mrg /* set Tx/Rx streams */ 2747 1.3.2.2 mrg run_rt3070_rf_read(sc, 1, &rf); 2748 1.3.2.2 mrg rf &= ~0xfc; 2749 1.3.2.2 mrg if (sc->ntxchains == 1) 2750 1.3.2.2 mrg rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2751 1.3.2.2 mrg else if (sc->ntxchains == 2) 2752 1.3.2.2 mrg rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2753 1.3.2.2 mrg if (sc->nrxchains == 1) 2754 1.3.2.2 mrg rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2755 1.3.2.2 mrg else if (sc->nrxchains == 2) 2756 1.3.2.2 mrg rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2757 1.3.2.2 mrg run_rt3070_rf_write(sc, 1, rf); 2758 1.3.2.2 mrg 2759 1.3.2.2 mrg /* set RF offset */ 2760 1.3.2.2 mrg run_rt3070_rf_read(sc, 23, &rf); 2761 1.3.2.2 mrg rf = (rf & ~0x7f) | sc->freq; 2762 1.3.2.2 mrg run_rt3070_rf_write(sc, 23, rf); 2763 1.3.2.2 mrg 2764 1.3.2.2 mrg /* program RF filter */ 2765 1.3.2.2 mrg rf = sc->rf24_20mhz; 2766 1.3.2.2 mrg run_rt3070_rf_write(sc, 24, rf); /* Tx */ 2767 1.3.2.2 mrg run_rt3070_rf_write(sc, 31, rf); /* Rx */ 2768 1.3.2.2 mrg 2769 1.3.2.2 mrg /* enable RF tuning */ 2770 1.3.2.2 mrg run_rt3070_rf_read(sc, 7, &rf); 2771 1.3.2.2 mrg rf = (chan <= 14) ? 0xd8 : ((rf & ~0xc8) | 0x14); 2772 1.3.2.2 mrg run_rt3070_rf_write(sc, 7, rf); 2773 1.3.2.2 mrg 2774 1.3.2.2 mrg /* TSSI */ 2775 1.3.2.2 mrg rf = (chan <= 14) ? 0xc3 : 0xc0; 2776 1.3.2.2 mrg run_rt3070_rf_write(sc, 9, rf); 2777 1.3.2.2 mrg 2778 1.3.2.2 mrg /* set loop filter 1 */ 2779 1.3.2.2 mrg run_rt3070_rf_write(sc, 10, 0xf1); 2780 1.3.2.2 mrg /* set loop filter 2 */ 2781 1.3.2.2 mrg run_rt3070_rf_write(sc, 11, (chan <= 14) ? 0xb9 : 0x00); 2782 1.3.2.2 mrg 2783 1.3.2.2 mrg /* set tx_mx2_ic */ 2784 1.3.2.2 mrg run_rt3070_rf_write(sc, 15, (chan <= 14) ? 0x53 : 0x43); 2785 1.3.2.2 mrg /* set tx_mx1_ic */ 2786 1.3.2.2 mrg if (chan <= 14) 2787 1.3.2.2 mrg rf = 0x48 | sc->txmixgain_2ghz; 2788 1.3.2.2 mrg else 2789 1.3.2.2 mrg rf = 0x78 | sc->txmixgain_5ghz; 2790 1.3.2.2 mrg run_rt3070_rf_write(sc, 16, rf); 2791 1.3.2.2 mrg 2792 1.3.2.2 mrg /* set tx_lo1 */ 2793 1.3.2.2 mrg run_rt3070_rf_write(sc, 17, 0x23); 2794 1.3.2.2 mrg /* set tx_lo2 */ 2795 1.3.2.2 mrg if (chan <= 14) 2796 1.3.2.2 mrg rf = 0x93; 2797 1.3.2.2 mrg else if (chan <= 64) 2798 1.3.2.2 mrg rf = 0xb7; 2799 1.3.2.2 mrg else if (chan <= 128) 2800 1.3.2.2 mrg rf = 0x74; 2801 1.3.2.2 mrg else 2802 1.3.2.2 mrg rf = 0x72; 2803 1.3.2.2 mrg run_rt3070_rf_write(sc, 19, rf); 2804 1.3.2.2 mrg 2805 1.3.2.2 mrg /* set rx_lo1 */ 2806 1.3.2.2 mrg if (chan <= 14) 2807 1.3.2.2 mrg rf = 0xb3; 2808 1.3.2.2 mrg else if (chan <= 64) 2809 1.3.2.2 mrg rf = 0xf6; 2810 1.3.2.2 mrg else if (chan <= 128) 2811 1.3.2.2 mrg rf = 0xf4; 2812 1.3.2.2 mrg else 2813 1.3.2.2 mrg rf = 0xf3; 2814 1.3.2.2 mrg run_rt3070_rf_write(sc, 20, rf); 2815 1.3.2.2 mrg 2816 1.3.2.2 mrg /* set pfd_delay */ 2817 1.3.2.2 mrg if (chan <= 14) 2818 1.3.2.2 mrg rf = 0x15; 2819 1.3.2.2 mrg else if (chan <= 64) 2820 1.3.2.2 mrg rf = 0x3d; 2821 1.3.2.2 mrg else 2822 1.3.2.2 mrg rf = 0x01; 2823 1.3.2.2 mrg run_rt3070_rf_write(sc, 25, rf); 2824 1.3.2.2 mrg 2825 1.3.2.2 mrg /* set rx_lo2 */ 2826 1.3.2.2 mrg run_rt3070_rf_write(sc, 26, (chan <= 14) ? 0x85 : 0x87); 2827 1.3.2.2 mrg /* set ldo_rf_vc */ 2828 1.3.2.2 mrg run_rt3070_rf_write(sc, 27, (chan <= 14) ? 0x00 : 0x01); 2829 1.3.2.2 mrg /* set drv_cc */ 2830 1.3.2.2 mrg run_rt3070_rf_write(sc, 29, (chan <= 14) ? 0x9b : 0x9f); 2831 1.3.2.2 mrg 2832 1.3.2.2 mrg run_read(sc, RT2860_GPIO_CTRL, &tmp); 2833 1.3.2.2 mrg tmp &= ~0x8080; 2834 1.3.2.2 mrg if (chan <= 14) 2835 1.3.2.2 mrg tmp |= 0x80; 2836 1.3.2.2 mrg run_write(sc, RT2860_GPIO_CTRL, tmp); 2837 1.3.2.2 mrg 2838 1.3.2.2 mrg /* enable RF tuning */ 2839 1.3.2.2 mrg run_rt3070_rf_read(sc, 7, &rf); 2840 1.3.2.2 mrg run_rt3070_rf_write(sc, 7, rf | 0x01); 2841 1.3.2.2 mrg 2842 1.3.2.2 mrg DELAY(2000); 2843 1.3.2.2 mrg } 2844 1.3.2.2 mrg 2845 1.3.2.2 mrg static void 2846 1.3.2.2 mrg run_set_agc(struct run_softc *sc, uint8_t agc) 2847 1.3.2.2 mrg { 2848 1.3.2.2 mrg uint8_t bbp; 2849 1.3.2.2 mrg 2850 1.3.2.2 mrg if (sc->mac_ver == 0x3572) { 2851 1.3.2.2 mrg run_bbp_read(sc, 27, &bbp); 2852 1.3.2.2 mrg bbp &= ~(0x3 << 5); 2853 1.3.2.2 mrg run_bbp_write(sc, 27, bbp | 0 << 5); /* select Rx0 */ 2854 1.3.2.2 mrg run_bbp_write(sc, 66, agc); 2855 1.3.2.2 mrg run_bbp_write(sc, 27, bbp | 1 << 5); /* select Rx1 */ 2856 1.3.2.2 mrg run_bbp_write(sc, 66, agc); 2857 1.3.2.2 mrg } else 2858 1.3.2.2 mrg run_bbp_write(sc, 66, agc); 2859 1.3.2.2 mrg } 2860 1.3.2.2 mrg 2861 1.3.2.2 mrg static void 2862 1.3.2.2 mrg run_set_rx_antenna(struct run_softc *sc, int aux) 2863 1.3.2.2 mrg { 2864 1.3.2.2 mrg uint32_t tmp; 2865 1.3.2.2 mrg 2866 1.3.2.2 mrg run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, !aux); 2867 1.3.2.2 mrg run_read(sc, RT2860_GPIO_CTRL, &tmp); 2868 1.3.2.2 mrg tmp &= ~0x0808; 2869 1.3.2.2 mrg if (aux) 2870 1.3.2.2 mrg tmp |= 0x08; 2871 1.3.2.2 mrg run_write(sc, RT2860_GPIO_CTRL, tmp); 2872 1.3.2.2 mrg } 2873 1.3.2.2 mrg 2874 1.3.2.2 mrg static int 2875 1.3.2.2 mrg run_set_chan(struct run_softc *sc, struct ieee80211_channel *c) 2876 1.3.2.2 mrg { 2877 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 2878 1.3.2.2 mrg u_int chan, group; 2879 1.3.2.2 mrg 2880 1.3.2.2 mrg chan = ieee80211_chan2ieee(ic, c); 2881 1.3.2.2 mrg if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2882 1.3.2.2 mrg return (EINVAL); 2883 1.3.2.2 mrg 2884 1.3.2.2 mrg if (sc->mac_ver == 0x3572) 2885 1.3.2.2 mrg run_rt3572_set_chan(sc, chan); 2886 1.3.2.2 mrg else if (sc->mac_ver >= 0x3070) 2887 1.3.2.2 mrg run_rt3070_set_chan(sc, chan); 2888 1.3.2.2 mrg else 2889 1.3.2.2 mrg run_rt2870_set_chan(sc, chan); 2890 1.3.2.2 mrg 2891 1.3.2.2 mrg /* determine channel group */ 2892 1.3.2.2 mrg if (chan <= 14) 2893 1.3.2.2 mrg group = 0; 2894 1.3.2.2 mrg else if (chan <= 64) 2895 1.3.2.2 mrg group = 1; 2896 1.3.2.2 mrg else if (chan <= 128) 2897 1.3.2.2 mrg group = 2; 2898 1.3.2.2 mrg else 2899 1.3.2.2 mrg group = 3; 2900 1.3.2.2 mrg 2901 1.3.2.2 mrg /* XXX necessary only when group has changed! */ 2902 1.3.2.2 mrg run_select_chan_group(sc, group); 2903 1.3.2.2 mrg 2904 1.3.2.2 mrg DELAY(1000); 2905 1.3.2.2 mrg return (0); 2906 1.3.2.2 mrg } 2907 1.3.2.2 mrg 2908 1.3.2.2 mrg static void 2909 1.3.2.2 mrg run_enable_tsf_sync(struct run_softc *sc) 2910 1.3.2.2 mrg { 2911 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 2912 1.3.2.2 mrg uint32_t tmp; 2913 1.3.2.2 mrg 2914 1.3.2.2 mrg run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 2915 1.3.2.2 mrg tmp &= ~0x1fffff; 2916 1.3.2.2 mrg tmp |= ic->ic_bss->ni_intval * 16; 2917 1.3.2.2 mrg tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN; 2918 1.3.2.2 mrg if (ic->ic_opmode == IEEE80211_M_STA) { 2919 1.3.2.2 mrg /* 2920 1.3.2.2 mrg * Local TSF is always updated with remote TSF on beacon 2921 1.3.2.2 mrg * reception. 2922 1.3.2.2 mrg */ 2923 1.3.2.2 mrg tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT; 2924 1.3.2.2 mrg } 2925 1.3.2.2 mrg #ifndef IEEE80211_STA_ONLY 2926 1.3.2.2 mrg else if (ic->ic_opmode == IEEE80211_M_IBSS) { 2927 1.3.2.2 mrg tmp |= RT2860_BCN_TX_EN; 2928 1.3.2.2 mrg /* 2929 1.3.2.2 mrg * Local TSF is updated with remote TSF on beacon reception 2930 1.3.2.2 mrg * only if the remote TSF is greater than local TSF. 2931 1.3.2.2 mrg */ 2932 1.3.2.2 mrg tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT; 2933 1.3.2.2 mrg } else if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2934 1.3.2.2 mrg tmp |= RT2860_BCN_TX_EN; 2935 1.3.2.2 mrg /* SYNC with nobody */ 2936 1.3.2.2 mrg tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT; 2937 1.3.2.2 mrg } 2938 1.3.2.2 mrg #endif 2939 1.3.2.2 mrg run_write(sc, RT2860_BCN_TIME_CFG, tmp); 2940 1.3.2.2 mrg } 2941 1.3.2.2 mrg 2942 1.3.2.2 mrg static void 2943 1.3.2.2 mrg run_enable_mrr(struct run_softc *sc) 2944 1.3.2.2 mrg { 2945 1.3.2.2 mrg #define CCK(mcs) (mcs) 2946 1.3.2.2 mrg #define OFDM(mcs) (1 << 3 | (mcs)) 2947 1.3.2.2 mrg run_write(sc, RT2860_LG_FBK_CFG0, 2948 1.3.2.2 mrg OFDM(6) << 28 | /* 54->48 */ 2949 1.3.2.2 mrg OFDM(5) << 24 | /* 48->36 */ 2950 1.3.2.2 mrg OFDM(4) << 20 | /* 36->24 */ 2951 1.3.2.2 mrg OFDM(3) << 16 | /* 24->18 */ 2952 1.3.2.2 mrg OFDM(2) << 12 | /* 18->12 */ 2953 1.3.2.2 mrg OFDM(1) << 8 | /* 12-> 9 */ 2954 1.3.2.2 mrg OFDM(0) << 4 | /* 9-> 6 */ 2955 1.3.2.2 mrg OFDM(0)); /* 6-> 6 */ 2956 1.3.2.2 mrg 2957 1.3.2.2 mrg run_write(sc, RT2860_LG_FBK_CFG1, 2958 1.3.2.2 mrg CCK(2) << 12 | /* 11->5.5 */ 2959 1.3.2.2 mrg CCK(1) << 8 | /* 5.5-> 2 */ 2960 1.3.2.2 mrg CCK(0) << 4 | /* 2-> 1 */ 2961 1.3.2.2 mrg CCK(0)); /* 1-> 1 */ 2962 1.3.2.2 mrg #undef OFDM 2963 1.3.2.2 mrg #undef CCK 2964 1.3.2.2 mrg } 2965 1.3.2.2 mrg 2966 1.3.2.2 mrg static void 2967 1.3.2.2 mrg run_set_txpreamble(struct run_softc *sc) 2968 1.3.2.2 mrg { 2969 1.3.2.2 mrg uint32_t tmp; 2970 1.3.2.2 mrg 2971 1.3.2.2 mrg run_read(sc, RT2860_AUTO_RSP_CFG, &tmp); 2972 1.3.2.2 mrg if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 2973 1.3.2.2 mrg tmp |= RT2860_CCK_SHORT_EN; 2974 1.3.2.2 mrg else 2975 1.3.2.2 mrg tmp &= ~RT2860_CCK_SHORT_EN; 2976 1.3.2.2 mrg run_write(sc, RT2860_AUTO_RSP_CFG, tmp); 2977 1.3.2.2 mrg } 2978 1.3.2.2 mrg 2979 1.3.2.2 mrg static void 2980 1.3.2.2 mrg run_set_basicrates(struct run_softc *sc) 2981 1.3.2.2 mrg { 2982 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 2983 1.3.2.2 mrg 2984 1.3.2.2 mrg /* set basic rates mask */ 2985 1.3.2.2 mrg if (ic->ic_curmode == IEEE80211_MODE_11B) 2986 1.3.2.2 mrg run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x003); 2987 1.3.2.2 mrg else if (ic->ic_curmode == IEEE80211_MODE_11A) 2988 1.3.2.2 mrg run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x150); 2989 1.3.2.2 mrg else /* 11g */ 2990 1.3.2.2 mrg run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x15f); 2991 1.3.2.2 mrg } 2992 1.3.2.2 mrg 2993 1.3.2.2 mrg static void 2994 1.3.2.2 mrg run_set_leds(struct run_softc *sc, uint16_t which) 2995 1.3.2.2 mrg { 2996 1.3.2.2 mrg 2997 1.3.2.2 mrg (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LEDS, 2998 1.3.2.2 mrg which | (sc->leds & 0x7f)); 2999 1.3.2.2 mrg } 3000 1.3.2.2 mrg 3001 1.3.2.2 mrg static void 3002 1.3.2.2 mrg run_set_bssid(struct run_softc *sc, const uint8_t *bssid) 3003 1.3.2.2 mrg { 3004 1.3.2.2 mrg 3005 1.3.2.2 mrg run_write(sc, RT2860_MAC_BSSID_DW0, 3006 1.3.2.2 mrg bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24); 3007 1.3.2.2 mrg run_write(sc, RT2860_MAC_BSSID_DW1, 3008 1.3.2.2 mrg bssid[4] | bssid[5] << 8); 3009 1.3.2.2 mrg } 3010 1.3.2.2 mrg 3011 1.3.2.2 mrg static void 3012 1.3.2.2 mrg run_set_macaddr(struct run_softc *sc, const uint8_t *addr) 3013 1.3.2.2 mrg { 3014 1.3.2.2 mrg 3015 1.3.2.2 mrg run_write(sc, RT2860_MAC_ADDR_DW0, 3016 1.3.2.2 mrg addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24); 3017 1.3.2.2 mrg run_write(sc, RT2860_MAC_ADDR_DW1, 3018 1.3.2.2 mrg addr[4] | addr[5] << 8 | 0xff << 16); 3019 1.3.2.2 mrg } 3020 1.3.2.2 mrg 3021 1.3.2.2 mrg static void 3022 1.3.2.2 mrg run_updateslot(struct ifnet *ifp) 3023 1.3.2.2 mrg { 3024 1.3.2.2 mrg 3025 1.3.2.2 mrg /* do it in a process context */ 3026 1.3.2.2 mrg run_do_async(ifp->if_softc, run_updateslot_cb, NULL, 0); 3027 1.3.2.2 mrg } 3028 1.3.2.2 mrg 3029 1.3.2.2 mrg /* ARGSUSED */ 3030 1.3.2.2 mrg static void 3031 1.3.2.2 mrg run_updateslot_cb(struct run_softc *sc, void *arg) 3032 1.3.2.2 mrg { 3033 1.3.2.2 mrg uint32_t tmp; 3034 1.3.2.2 mrg 3035 1.3.2.2 mrg run_read(sc, RT2860_BKOFF_SLOT_CFG, &tmp); 3036 1.3.2.2 mrg tmp &= ~0xff; 3037 1.3.2.2 mrg tmp |= (sc->sc_ic.ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 3038 1.3.2.2 mrg run_write(sc, RT2860_BKOFF_SLOT_CFG, tmp); 3039 1.3.2.2 mrg } 3040 1.3.2.2 mrg 3041 1.3.2.2 mrg static int8_t 3042 1.3.2.2 mrg run_rssi2dbm(struct run_softc *sc, uint8_t rssi, uint8_t rxchain) 3043 1.3.2.2 mrg { 3044 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 3045 1.3.2.2 mrg struct ieee80211_channel *c = ic->ic_curchan; 3046 1.3.2.2 mrg int delta; 3047 1.3.2.2 mrg 3048 1.3.2.2 mrg if (IEEE80211_IS_CHAN_5GHZ(c)) { 3049 1.3.2.2 mrg u_int chan = ieee80211_chan2ieee(ic, c); 3050 1.3.2.2 mrg delta = sc->rssi_5ghz[rxchain]; 3051 1.3.2.2 mrg 3052 1.3.2.2 mrg /* determine channel group */ 3053 1.3.2.2 mrg if (chan <= 64) 3054 1.3.2.2 mrg delta -= sc->lna[1]; 3055 1.3.2.2 mrg else if (chan <= 128) 3056 1.3.2.2 mrg delta -= sc->lna[2]; 3057 1.3.2.2 mrg else 3058 1.3.2.2 mrg delta -= sc->lna[3]; 3059 1.3.2.2 mrg } else 3060 1.3.2.2 mrg delta = sc->rssi_2ghz[rxchain] - sc->lna[0]; 3061 1.3.2.2 mrg 3062 1.3.2.2 mrg return (-12 - delta - rssi); 3063 1.3.2.2 mrg } 3064 1.3.2.2 mrg 3065 1.3.2.2 mrg static int 3066 1.3.2.2 mrg run_bbp_init(struct run_softc *sc) 3067 1.3.2.2 mrg { 3068 1.3.2.2 mrg int i, error, ntries; 3069 1.3.2.2 mrg uint8_t bbp0; 3070 1.3.2.2 mrg 3071 1.3.2.2 mrg /* wait for BBP to wake up */ 3072 1.3.2.2 mrg for (ntries = 0; ntries < 20; ntries++) { 3073 1.3.2.2 mrg if ((error = run_bbp_read(sc, 0, &bbp0)) != 0) 3074 1.3.2.2 mrg return (error); 3075 1.3.2.2 mrg if (bbp0 != 0 && bbp0 != 0xff) 3076 1.3.2.2 mrg break; 3077 1.3.2.2 mrg } 3078 1.3.2.2 mrg if (ntries == 20) 3079 1.3.2.2 mrg return (ETIMEDOUT); 3080 1.3.2.2 mrg 3081 1.3.2.2 mrg /* initialize BBP registers to default values */ 3082 1.3.2.2 mrg for (i = 0; i < (int)__arraycount(rt2860_def_bbp); i++) { 3083 1.3.2.2 mrg run_bbp_write(sc, rt2860_def_bbp[i].reg, 3084 1.3.2.2 mrg rt2860_def_bbp[i].val); 3085 1.3.2.2 mrg } 3086 1.3.2.2 mrg 3087 1.3.2.2 mrg /* fix BBP84 for RT2860E */ 3088 1.3.2.2 mrg if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101) 3089 1.3.2.2 mrg run_bbp_write(sc, 84, 0x19); 3090 1.3.2.2 mrg 3091 1.3.2.2 mrg if (sc->mac_ver >= 0x3070) { 3092 1.3.2.2 mrg run_bbp_write(sc, 79, 0x13); 3093 1.3.2.2 mrg run_bbp_write(sc, 80, 0x05); 3094 1.3.2.2 mrg run_bbp_write(sc, 81, 0x33); 3095 1.3.2.2 mrg } else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) { 3096 1.3.2.2 mrg run_bbp_write(sc, 69, 0x16); 3097 1.3.2.2 mrg run_bbp_write(sc, 73, 0x12); 3098 1.3.2.2 mrg } 3099 1.3.2.2 mrg return (0); 3100 1.3.2.2 mrg } 3101 1.3.2.2 mrg 3102 1.3.2.2 mrg static int 3103 1.3.2.2 mrg run_rt3070_rf_init(struct run_softc *sc) 3104 1.3.2.2 mrg { 3105 1.3.2.2 mrg uint32_t tmp; 3106 1.3.2.2 mrg uint8_t rf, target, bbp4; 3107 1.3.2.2 mrg int i; 3108 1.3.2.2 mrg 3109 1.3.2.2 mrg run_rt3070_rf_read(sc, 30, &rf); 3110 1.3.2.2 mrg /* toggle RF R30 bit 7 */ 3111 1.3.2.2 mrg run_rt3070_rf_write(sc, 30, rf | 0x80); 3112 1.3.2.2 mrg DELAY(1000); 3113 1.3.2.2 mrg run_rt3070_rf_write(sc, 30, rf & ~0x80); 3114 1.3.2.2 mrg 3115 1.3.2.2 mrg /* initialize RF registers to default value */ 3116 1.3.2.2 mrg if (sc->mac_ver == 0x3572) { 3117 1.3.2.2 mrg for (i = 0; i < (int)__arraycount(rt3572_def_rf); i++) { 3118 1.3.2.2 mrg run_rt3070_rf_write(sc, rt3572_def_rf[i].reg, 3119 1.3.2.2 mrg rt3572_def_rf[i].val); 3120 1.3.2.2 mrg } 3121 1.3.2.2 mrg } else { 3122 1.3.2.2 mrg for (i = 0; i < (int)__arraycount(rt3070_def_rf); i++) { 3123 1.3.2.2 mrg run_rt3070_rf_write(sc, rt3070_def_rf[i].reg, 3124 1.3.2.2 mrg rt3070_def_rf[i].val); 3125 1.3.2.2 mrg } 3126 1.3.2.2 mrg } 3127 1.3.2.2 mrg if (sc->mac_ver == 0x3572) { 3128 1.3.2.2 mrg run_rt3070_rf_read(sc, 6, &rf); 3129 1.3.2.2 mrg run_rt3070_rf_write(sc, 6, rf | 0x40); 3130 1.3.2.2 mrg 3131 1.3.2.2 mrg /* increase voltage from 1.2V to 1.35V */ 3132 1.3.2.2 mrg run_read(sc, RT3070_LDO_CFG0, &tmp); 3133 1.3.2.2 mrg tmp = (tmp & ~0x1f000000) | 0x0d000000; 3134 1.3.2.2 mrg run_write(sc, RT3070_LDO_CFG0, tmp); 3135 1.3.2.2 mrg if (sc->mac_rev >= 0x0211 || !sc->patch_dac) { 3136 1.3.2.2 mrg /* decrease voltage back to 1.2V */ 3137 1.3.2.2 mrg DELAY(1000); 3138 1.3.2.2 mrg tmp = (tmp & ~0x1f000000) | 0x01000000; 3139 1.3.2.2 mrg run_write(sc, RT3070_LDO_CFG0, tmp); 3140 1.3.2.2 mrg } 3141 1.3.2.2 mrg } else if (sc->mac_ver == 0x3071) { 3142 1.3.2.2 mrg run_rt3070_rf_read(sc, 6, &rf); 3143 1.3.2.2 mrg run_rt3070_rf_write(sc, 6, rf | 0x40); 3144 1.3.2.2 mrg run_rt3070_rf_write(sc, 31, 0x14); 3145 1.3.2.2 mrg 3146 1.3.2.2 mrg run_read(sc, RT3070_LDO_CFG0, &tmp); 3147 1.3.2.2 mrg tmp &= ~0x1f000000; 3148 1.3.2.2 mrg if (sc->mac_rev < 0x0211) 3149 1.3.2.2 mrg tmp |= 0x0d000000; /* 1.35V */ 3150 1.3.2.2 mrg else 3151 1.3.2.2 mrg tmp |= 0x01000000; /* 1.2V */ 3152 1.3.2.2 mrg run_write(sc, RT3070_LDO_CFG0, tmp); 3153 1.3.2.2 mrg 3154 1.3.2.2 mrg /* patch LNA_PE_G1 */ 3155 1.3.2.2 mrg run_read(sc, RT3070_GPIO_SWITCH, &tmp); 3156 1.3.2.2 mrg run_write(sc, RT3070_GPIO_SWITCH, tmp & ~0x20); 3157 1.3.2.2 mrg } else if (sc->mac_ver == 0x3070) { 3158 1.3.2.2 mrg /* increase voltage from 1.2V to 1.35V */ 3159 1.3.2.2 mrg run_read(sc, RT3070_LDO_CFG0, &tmp); 3160 1.3.2.2 mrg tmp = (tmp & ~0x0f000000) | 0x0d000000; 3161 1.3.2.2 mrg run_write(sc, RT3070_LDO_CFG0, tmp); 3162 1.3.2.2 mrg } 3163 1.3.2.2 mrg 3164 1.3.2.2 mrg /* select 20MHz bandwidth */ 3165 1.3.2.2 mrg run_rt3070_rf_read(sc, 31, &rf); 3166 1.3.2.2 mrg run_rt3070_rf_write(sc, 31, rf & ~0x20); 3167 1.3.2.2 mrg 3168 1.3.2.2 mrg /* calibrate filter for 20MHz bandwidth */ 3169 1.3.2.2 mrg sc->rf24_20mhz = 0x1f; /* default value */ 3170 1.3.2.2 mrg target = (sc->mac_ver < 0x3071) ? 0x16 : 0x13; 3171 1.3.2.2 mrg run_rt3070_filter_calib(sc, 0x07, target, &sc->rf24_20mhz); 3172 1.3.2.2 mrg 3173 1.3.2.2 mrg /* select 40MHz bandwidth */ 3174 1.3.2.2 mrg run_bbp_read(sc, 4, &bbp4); 3175 1.3.2.2 mrg run_bbp_write(sc, 4, (bbp4 & ~0x08) | 0x10); 3176 1.3.2.2 mrg run_rt3070_rf_read(sc, 31, &rf); 3177 1.3.2.2 mrg run_rt3070_rf_write(sc, 31, rf | 0x20); 3178 1.3.2.2 mrg 3179 1.3.2.2 mrg /* calibrate filter for 40MHz bandwidth */ 3180 1.3.2.2 mrg sc->rf24_40mhz = 0x2f; /* default value */ 3181 1.3.2.2 mrg target = (sc->mac_ver < 0x3071) ? 0x19 : 0x15; 3182 1.3.2.2 mrg run_rt3070_filter_calib(sc, 0x27, target, &sc->rf24_40mhz); 3183 1.3.2.2 mrg 3184 1.3.2.2 mrg /* go back to 20MHz bandwidth */ 3185 1.3.2.2 mrg run_bbp_read(sc, 4, &bbp4); 3186 1.3.2.2 mrg run_bbp_write(sc, 4, bbp4 & ~0x18); 3187 1.3.2.2 mrg 3188 1.3.2.2 mrg if (sc->mac_ver == 0x3572) { 3189 1.3.2.2 mrg /* save default BBP registers 25 and 26 values */ 3190 1.3.2.2 mrg run_bbp_read(sc, 25, &sc->bbp25); 3191 1.3.2.2 mrg run_bbp_read(sc, 26, &sc->bbp26); 3192 1.3.2.2 mrg } else if (sc->mac_rev < 0x0211) 3193 1.3.2.2 mrg run_rt3070_rf_write(sc, 27, 0x03); 3194 1.3.2.2 mrg 3195 1.3.2.2 mrg run_read(sc, RT3070_OPT_14, &tmp); 3196 1.3.2.2 mrg run_write(sc, RT3070_OPT_14, tmp | 1); 3197 1.3.2.2 mrg 3198 1.3.2.2 mrg if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3199 1.3.2.2 mrg run_rt3070_rf_read(sc, 17, &rf); 3200 1.3.2.2 mrg rf &= ~RT3070_TX_LO1; 3201 1.3.2.2 mrg if ((sc->mac_ver == 0x3070 || 3202 1.3.2.2 mrg (sc->mac_ver == 0x3071 && sc->mac_rev >= 0x0211)) && 3203 1.3.2.2 mrg !sc->ext_2ghz_lna) 3204 1.3.2.2 mrg rf |= 0x20; /* fix for long range Rx issue */ 3205 1.3.2.2 mrg if (sc->txmixgain_2ghz >= 1) 3206 1.3.2.2 mrg rf = (rf & ~0x7) | sc->txmixgain_2ghz; 3207 1.3.2.2 mrg run_rt3070_rf_write(sc, 17, rf); 3208 1.3.2.2 mrg } 3209 1.3.2.2 mrg if (sc->mac_ver == 0x3071) { 3210 1.3.2.2 mrg run_rt3070_rf_read(sc, 1, &rf); 3211 1.3.2.2 mrg rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD); 3212 1.3.2.2 mrg rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD; 3213 1.3.2.2 mrg run_rt3070_rf_write(sc, 1, rf); 3214 1.3.2.2 mrg 3215 1.3.2.2 mrg run_rt3070_rf_read(sc, 15, &rf); 3216 1.3.2.2 mrg run_rt3070_rf_write(sc, 15, rf & ~RT3070_TX_LO2); 3217 1.3.2.2 mrg 3218 1.3.2.2 mrg run_rt3070_rf_read(sc, 20, &rf); 3219 1.3.2.2 mrg run_rt3070_rf_write(sc, 20, rf & ~RT3070_RX_LO1); 3220 1.3.2.2 mrg 3221 1.3.2.2 mrg run_rt3070_rf_read(sc, 21, &rf); 3222 1.3.2.2 mrg run_rt3070_rf_write(sc, 21, rf & ~RT3070_RX_LO2); 3223 1.3.2.2 mrg } 3224 1.3.2.2 mrg if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3225 1.3.2.2 mrg /* fix Tx to Rx IQ glitch by raising RF voltage */ 3226 1.3.2.2 mrg run_rt3070_rf_read(sc, 27, &rf); 3227 1.3.2.2 mrg rf &= ~0x77; 3228 1.3.2.2 mrg if (sc->mac_rev < 0x0211) 3229 1.3.2.2 mrg rf |= 0x03; 3230 1.3.2.2 mrg run_rt3070_rf_write(sc, 27, rf); 3231 1.3.2.2 mrg } 3232 1.3.2.2 mrg return (0); 3233 1.3.2.2 mrg } 3234 1.3.2.2 mrg 3235 1.3.2.2 mrg static int 3236 1.3.2.2 mrg run_rt3070_filter_calib(struct run_softc *sc, uint8_t init, uint8_t target, 3237 1.3.2.2 mrg uint8_t *val) 3238 1.3.2.2 mrg { 3239 1.3.2.2 mrg uint8_t rf22, rf24; 3240 1.3.2.2 mrg uint8_t bbp55_pb, bbp55_sb, delta; 3241 1.3.2.2 mrg int ntries; 3242 1.3.2.2 mrg 3243 1.3.2.2 mrg /* program filter */ 3244 1.3.2.2 mrg run_rt3070_rf_read(sc, 24, &rf24); 3245 1.3.2.2 mrg rf24 = (rf24 & 0xc0) | init; /* initial filter value */ 3246 1.3.2.2 mrg run_rt3070_rf_write(sc, 24, rf24); 3247 1.3.2.2 mrg 3248 1.3.2.2 mrg /* enable baseband loopback mode */ 3249 1.3.2.2 mrg run_rt3070_rf_read(sc, 22, &rf22); 3250 1.3.2.2 mrg run_rt3070_rf_write(sc, 22, rf22 | 0x01); 3251 1.3.2.2 mrg 3252 1.3.2.2 mrg /* set power and frequency of passband test tone */ 3253 1.3.2.2 mrg run_bbp_write(sc, 24, 0x00); 3254 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 3255 1.3.2.2 mrg /* transmit test tone */ 3256 1.3.2.2 mrg run_bbp_write(sc, 25, 0x90); 3257 1.3.2.2 mrg DELAY(1000); 3258 1.3.2.2 mrg /* read received power */ 3259 1.3.2.2 mrg run_bbp_read(sc, 55, &bbp55_pb); 3260 1.3.2.2 mrg if (bbp55_pb != 0) 3261 1.3.2.2 mrg break; 3262 1.3.2.2 mrg } 3263 1.3.2.2 mrg if (ntries == 100) 3264 1.3.2.2 mrg return (ETIMEDOUT); 3265 1.3.2.2 mrg 3266 1.3.2.2 mrg /* set power and frequency of stopband test tone */ 3267 1.3.2.2 mrg run_bbp_write(sc, 24, 0x06); 3268 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 3269 1.3.2.2 mrg /* transmit test tone */ 3270 1.3.2.2 mrg run_bbp_write(sc, 25, 0x90); 3271 1.3.2.2 mrg DELAY(1000); 3272 1.3.2.2 mrg /* read received power */ 3273 1.3.2.2 mrg run_bbp_read(sc, 55, &bbp55_sb); 3274 1.3.2.2 mrg 3275 1.3.2.2 mrg delta = bbp55_pb - bbp55_sb; 3276 1.3.2.2 mrg if (delta > target) 3277 1.3.2.2 mrg break; 3278 1.3.2.2 mrg 3279 1.3.2.2 mrg /* reprogram filter */ 3280 1.3.2.2 mrg rf24++; 3281 1.3.2.2 mrg run_rt3070_rf_write(sc, 24, rf24); 3282 1.3.2.2 mrg } 3283 1.3.2.2 mrg if (ntries < 100) { 3284 1.3.2.2 mrg if (rf24 != init) 3285 1.3.2.2 mrg rf24--; /* backtrack */ 3286 1.3.2.2 mrg *val = rf24; 3287 1.3.2.2 mrg run_rt3070_rf_write(sc, 24, rf24); 3288 1.3.2.2 mrg } 3289 1.3.2.2 mrg 3290 1.3.2.2 mrg /* restore initial state */ 3291 1.3.2.2 mrg run_bbp_write(sc, 24, 0x00); 3292 1.3.2.2 mrg 3293 1.3.2.2 mrg /* disable baseband loopback mode */ 3294 1.3.2.2 mrg run_rt3070_rf_read(sc, 22, &rf22); 3295 1.3.2.2 mrg run_rt3070_rf_write(sc, 22, rf22 & ~0x01); 3296 1.3.2.2 mrg 3297 1.3.2.2 mrg return (0); 3298 1.3.2.2 mrg } 3299 1.3.2.2 mrg 3300 1.3.2.2 mrg static void 3301 1.3.2.2 mrg run_rt3070_rf_setup(struct run_softc *sc) 3302 1.3.2.2 mrg { 3303 1.3.2.2 mrg uint8_t bbp, rf; 3304 1.3.2.2 mrg int i; 3305 1.3.2.2 mrg 3306 1.3.2.2 mrg if (sc->mac_ver == 0x3572) { 3307 1.3.2.2 mrg /* enable DC filter */ 3308 1.3.2.2 mrg if (sc->mac_rev >= 0x0201) 3309 1.3.2.2 mrg run_bbp_write(sc, 103, 0xc0); 3310 1.3.2.2 mrg 3311 1.3.2.2 mrg run_bbp_read(sc, 138, &bbp); 3312 1.3.2.2 mrg if (sc->ntxchains == 1) 3313 1.3.2.2 mrg bbp |= 0x20; /* turn off DAC1 */ 3314 1.3.2.2 mrg if (sc->nrxchains == 1) 3315 1.3.2.2 mrg bbp &= ~0x02; /* turn off ADC1 */ 3316 1.3.2.2 mrg run_bbp_write(sc, 138, bbp); 3317 1.3.2.2 mrg 3318 1.3.2.2 mrg if (sc->mac_rev >= 0x0211) { 3319 1.3.2.2 mrg /* improve power consumption */ 3320 1.3.2.2 mrg run_bbp_read(sc, 31, &bbp); 3321 1.3.2.2 mrg run_bbp_write(sc, 31, bbp & ~0x03); 3322 1.3.2.2 mrg } 3323 1.3.2.2 mrg 3324 1.3.2.2 mrg run_rt3070_rf_read(sc, 16, &rf); 3325 1.3.2.2 mrg rf = (rf & ~0x07) | sc->txmixgain_2ghz; 3326 1.3.2.2 mrg run_rt3070_rf_write(sc, 16, rf); 3327 1.3.2.2 mrg } else if (sc->mac_ver == 0x3071) { 3328 1.3.2.2 mrg /* enable DC filter */ 3329 1.3.2.2 mrg if (sc->mac_rev >= 0x0201) 3330 1.3.2.2 mrg run_bbp_write(sc, 103, 0xc0); 3331 1.3.2.2 mrg 3332 1.3.2.2 mrg run_bbp_read(sc, 138, &bbp); 3333 1.3.2.2 mrg if (sc->ntxchains == 1) 3334 1.3.2.2 mrg bbp |= 0x20; /* turn off DAC1 */ 3335 1.3.2.2 mrg if (sc->nrxchains == 1) 3336 1.3.2.2 mrg bbp &= ~0x02; /* turn off ADC1 */ 3337 1.3.2.2 mrg run_bbp_write(sc, 138, bbp); 3338 1.3.2.2 mrg 3339 1.3.2.2 mrg if (sc->mac_rev >= 0x0211) { 3340 1.3.2.2 mrg /* improve power consumption */ 3341 1.3.2.2 mrg run_bbp_read(sc, 31, &bbp); 3342 1.3.2.2 mrg run_bbp_write(sc, 31, bbp & ~0x03); 3343 1.3.2.2 mrg } 3344 1.3.2.2 mrg 3345 1.3.2.2 mrg run_write(sc, RT2860_TX_SW_CFG1, 0); 3346 1.3.2.2 mrg if (sc->mac_rev < 0x0211) { 3347 1.3.2.2 mrg run_write(sc, RT2860_TX_SW_CFG2, 3348 1.3.2.2 mrg sc->patch_dac ? 0x2c : 0x0f); 3349 1.3.2.2 mrg } else 3350 1.3.2.2 mrg run_write(sc, RT2860_TX_SW_CFG2, 0); 3351 1.3.2.2 mrg } else if (sc->mac_ver == 0x3070) { 3352 1.3.2.2 mrg if (sc->mac_rev >= 0x0201) { 3353 1.3.2.2 mrg /* enable DC filter */ 3354 1.3.2.2 mrg run_bbp_write(sc, 103, 0xc0); 3355 1.3.2.2 mrg 3356 1.3.2.2 mrg /* improve power consumption */ 3357 1.3.2.2 mrg run_bbp_read(sc, 31, &bbp); 3358 1.3.2.2 mrg run_bbp_write(sc, 31, bbp & ~0x03); 3359 1.3.2.2 mrg } 3360 1.3.2.2 mrg 3361 1.3.2.2 mrg if (sc->mac_rev < 0x0211) { 3362 1.3.2.2 mrg run_write(sc, RT2860_TX_SW_CFG1, 0); 3363 1.3.2.2 mrg run_write(sc, RT2860_TX_SW_CFG2, 0x2c); 3364 1.3.2.2 mrg } else 3365 1.3.2.2 mrg run_write(sc, RT2860_TX_SW_CFG2, 0); 3366 1.3.2.2 mrg } 3367 1.3.2.2 mrg 3368 1.3.2.2 mrg /* initialize RF registers from ROM for >=RT3071*/ 3369 1.3.2.2 mrg if (sc->mac_ver >= 0x3071) { 3370 1.3.2.2 mrg for (i = 0; i < 10; i++) { 3371 1.3.2.2 mrg if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff) 3372 1.3.2.2 mrg continue; 3373 1.3.2.2 mrg run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val); 3374 1.3.2.2 mrg } 3375 1.3.2.2 mrg } 3376 1.3.2.2 mrg } 3377 1.3.2.2 mrg 3378 1.3.2.2 mrg static int 3379 1.3.2.2 mrg run_txrx_enable(struct run_softc *sc) 3380 1.3.2.2 mrg { 3381 1.3.2.2 mrg uint32_t tmp; 3382 1.3.2.2 mrg int error, ntries; 3383 1.3.2.2 mrg 3384 1.3.2.2 mrg run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN); 3385 1.3.2.2 mrg for (ntries = 0; ntries < 200; ntries++) { 3386 1.3.2.2 mrg if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3387 1.3.2.2 mrg return (error); 3388 1.3.2.2 mrg if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3389 1.3.2.2 mrg break; 3390 1.3.2.2 mrg DELAY(1000); 3391 1.3.2.2 mrg } 3392 1.3.2.2 mrg if (ntries == 200) 3393 1.3.2.2 mrg return (ETIMEDOUT); 3394 1.3.2.2 mrg 3395 1.3.2.2 mrg DELAY(50); 3396 1.3.2.2 mrg 3397 1.3.2.2 mrg tmp |= RT2860_RX_DMA_EN | RT2860_TX_DMA_EN | RT2860_TX_WB_DDONE; 3398 1.3.2.2 mrg run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3399 1.3.2.2 mrg 3400 1.3.2.2 mrg /* enable Rx bulk aggregation (set timeout and limit) */ 3401 1.3.2.2 mrg tmp = RT2860_USB_TX_EN | RT2860_USB_RX_EN | RT2860_USB_RX_AGG_EN | 3402 1.3.2.2 mrg RT2860_USB_RX_AGG_TO(128) | RT2860_USB_RX_AGG_LMT(2); 3403 1.3.2.2 mrg run_write(sc, RT2860_USB_DMA_CFG, tmp); 3404 1.3.2.2 mrg 3405 1.3.2.2 mrg /* set Rx filter */ 3406 1.3.2.2 mrg tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR; 3407 1.3.2.2 mrg if (sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR) { 3408 1.3.2.2 mrg tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL | 3409 1.3.2.2 mrg RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK | 3410 1.3.2.2 mrg RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV | 3411 1.3.2.2 mrg RT2860_DROP_CFACK | RT2860_DROP_CFEND; 3412 1.3.2.2 mrg if (sc->sc_ic.ic_opmode == IEEE80211_M_STA) 3413 1.3.2.2 mrg tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL; 3414 1.3.2.2 mrg } 3415 1.3.2.2 mrg run_write(sc, RT2860_RX_FILTR_CFG, tmp); 3416 1.3.2.2 mrg 3417 1.3.2.2 mrg run_write(sc, RT2860_MAC_SYS_CTRL, 3418 1.3.2.2 mrg RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3419 1.3.2.2 mrg 3420 1.3.2.2 mrg return (0); 3421 1.3.2.2 mrg } 3422 1.3.2.2 mrg 3423 1.3.2.2 mrg static int 3424 1.3.2.2 mrg run_init(struct ifnet *ifp) 3425 1.3.2.2 mrg { 3426 1.3.2.2 mrg struct run_softc *sc = ifp->if_softc; 3427 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 3428 1.3.2.2 mrg uint32_t tmp; 3429 1.3.2.2 mrg uint8_t bbp1, bbp3; 3430 1.3.2.2 mrg int i, error, qid, ridx, ntries; 3431 1.3.2.2 mrg 3432 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 3433 1.3.2.2 mrg if ((error = run_read(sc, RT2860_ASIC_VER_ID, &tmp)) != 0) 3434 1.3.2.2 mrg goto fail; 3435 1.3.2.2 mrg if (tmp != 0 && tmp != 0xffffffff) 3436 1.3.2.2 mrg break; 3437 1.3.2.2 mrg DELAY(10); 3438 1.3.2.2 mrg } 3439 1.3.2.2 mrg if (ntries == 100) { 3440 1.3.2.2 mrg error = ETIMEDOUT; 3441 1.3.2.2 mrg goto fail; 3442 1.3.2.2 mrg } 3443 1.3.2.2 mrg 3444 1.3.2.2 mrg if ((sc->sc_flags & RUN_FWLOADED) == 0 && 3445 1.3.2.2 mrg (error = run_load_microcode(sc)) != 0) { 3446 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 3447 1.3.2.2 mrg "could not load 8051 microcode\n"); 3448 1.3.2.2 mrg goto fail; 3449 1.3.2.2 mrg } 3450 1.3.2.2 mrg 3451 1.3.2.2 mrg if (ifp->if_flags & IFF_RUNNING) 3452 1.3.2.2 mrg run_stop(ifp, 0); 3453 1.3.2.2 mrg 3454 1.3.2.2 mrg /* init host command ring */ 3455 1.3.2.2 mrg sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 3456 1.3.2.2 mrg 3457 1.3.2.2 mrg /* init Tx rings (4 EDCAs) */ 3458 1.3.2.2 mrg for (qid = 0; qid < 4; qid++) { 3459 1.3.2.2 mrg if ((error = run_alloc_tx_ring(sc, qid)) != 0) 3460 1.3.2.2 mrg goto fail; 3461 1.3.2.2 mrg } 3462 1.3.2.2 mrg /* init Rx ring */ 3463 1.3.2.2 mrg if ((error = run_alloc_rx_ring(sc)) != 0) 3464 1.3.2.2 mrg goto fail; 3465 1.3.2.2 mrg 3466 1.3.2.2 mrg IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 3467 1.3.2.2 mrg run_set_macaddr(sc, ic->ic_myaddr); 3468 1.3.2.2 mrg 3469 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 3470 1.3.2.2 mrg if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3471 1.3.2.2 mrg goto fail; 3472 1.3.2.2 mrg if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3473 1.3.2.2 mrg break; 3474 1.3.2.2 mrg DELAY(1000); 3475 1.3.2.2 mrg } 3476 1.3.2.2 mrg if (ntries == 100) { 3477 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, 3478 1.3.2.2 mrg "timeout waiting for DMA engine\n"); 3479 1.3.2.2 mrg error = ETIMEDOUT; 3480 1.3.2.2 mrg goto fail; 3481 1.3.2.2 mrg } 3482 1.3.2.2 mrg tmp &= 0xff0; 3483 1.3.2.2 mrg tmp |= RT2860_TX_WB_DDONE; 3484 1.3.2.2 mrg run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3485 1.3.2.2 mrg 3486 1.3.2.2 mrg /* turn off PME_OEN to solve high-current issue */ 3487 1.3.2.2 mrg run_read(sc, RT2860_SYS_CTRL, &tmp); 3488 1.3.2.2 mrg run_write(sc, RT2860_SYS_CTRL, tmp & ~RT2860_PME_OEN); 3489 1.3.2.2 mrg 3490 1.3.2.2 mrg run_write(sc, RT2860_MAC_SYS_CTRL, 3491 1.3.2.2 mrg RT2860_BBP_HRST | RT2860_MAC_SRST); 3492 1.3.2.2 mrg run_write(sc, RT2860_USB_DMA_CFG, 0); 3493 1.3.2.2 mrg 3494 1.3.2.2 mrg if ((error = run_reset(sc)) != 0) { 3495 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, "could not reset chipset\n"); 3496 1.3.2.2 mrg goto fail; 3497 1.3.2.2 mrg } 3498 1.3.2.2 mrg 3499 1.3.2.2 mrg run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3500 1.3.2.2 mrg 3501 1.3.2.2 mrg /* init Tx power for all Tx rates (from EEPROM) */ 3502 1.3.2.2 mrg for (ridx = 0; ridx < 5; ridx++) { 3503 1.3.2.2 mrg if (sc->txpow20mhz[ridx] == 0xffffffff) 3504 1.3.2.2 mrg continue; 3505 1.3.2.2 mrg run_write(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]); 3506 1.3.2.2 mrg } 3507 1.3.2.2 mrg 3508 1.3.2.2 mrg for (i = 0; i < (int)__arraycount(rt2870_def_mac); i++) 3509 1.3.2.2 mrg run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val); 3510 1.3.2.2 mrg run_write(sc, RT2860_WMM_AIFSN_CFG, 0x00002273); 3511 1.3.2.2 mrg run_write(sc, RT2860_WMM_CWMIN_CFG, 0x00002344); 3512 1.3.2.2 mrg run_write(sc, RT2860_WMM_CWMAX_CFG, 0x000034aa); 3513 1.3.2.2 mrg 3514 1.3.2.2 mrg if (sc->mac_ver >= 0x3070) { 3515 1.3.2.2 mrg /* set delay of PA_PE assertion to 1us (unit of 0.25us) */ 3516 1.3.2.2 mrg run_write(sc, RT2860_TX_SW_CFG0, 3517 1.3.2.2 mrg 4 << RT2860_DLY_PAPE_EN_SHIFT); 3518 1.3.2.2 mrg } 3519 1.3.2.2 mrg 3520 1.3.2.2 mrg /* wait while MAC is busy */ 3521 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 3522 1.3.2.2 mrg if ((error = run_read(sc, RT2860_MAC_STATUS_REG, &tmp)) != 0) 3523 1.3.2.2 mrg goto fail; 3524 1.3.2.2 mrg if (!(tmp & (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY))) 3525 1.3.2.2 mrg break; 3526 1.3.2.2 mrg DELAY(1000); 3527 1.3.2.2 mrg } 3528 1.3.2.2 mrg if (ntries == 100) { 3529 1.3.2.2 mrg error = ETIMEDOUT; 3530 1.3.2.2 mrg goto fail; 3531 1.3.2.2 mrg } 3532 1.3.2.2 mrg 3533 1.3.2.2 mrg /* clear Host to MCU mailbox */ 3534 1.3.2.2 mrg run_write(sc, RT2860_H2M_BBPAGENT, 0); 3535 1.3.2.2 mrg run_write(sc, RT2860_H2M_MAILBOX, 0); 3536 1.3.2.2 mrg DELAY(1000); 3537 1.3.2.2 mrg 3538 1.3.2.2 mrg if ((error = run_bbp_init(sc)) != 0) { 3539 1.3.2.2 mrg aprint_error_dev(sc->sc_dev, "could not initialize BBP\n"); 3540 1.3.2.2 mrg goto fail; 3541 1.3.2.2 mrg } 3542 1.3.2.2 mrg 3543 1.3.2.2 mrg run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 3544 1.3.2.2 mrg tmp &= ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 3545 1.3.2.2 mrg RT2860_TBTT_TIMER_EN); 3546 1.3.2.2 mrg run_write(sc, RT2860_BCN_TIME_CFG, tmp); 3547 1.3.2.2 mrg 3548 1.3.2.2 mrg /* clear RX WCID search table */ 3549 1.3.2.2 mrg run_set_region_4(sc, RT2860_WCID_ENTRY(0), 0, 512); 3550 1.3.2.2 mrg /* clear Pair-wise key table */ 3551 1.3.2.2 mrg run_set_region_4(sc, RT2860_PKEY(0), 0, 2048); 3552 1.3.2.2 mrg /* clear IV/EIV table */ 3553 1.3.2.2 mrg run_set_region_4(sc, RT2860_IVEIV(0), 0, 512); 3554 1.3.2.2 mrg /* clear WCID attribute table */ 3555 1.3.2.2 mrg run_set_region_4(sc, RT2860_WCID_ATTR(0), 0, 8 * 32); 3556 1.3.2.2 mrg /* clear shared key table */ 3557 1.3.2.2 mrg run_set_region_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32); 3558 1.3.2.2 mrg /* clear shared key mode */ 3559 1.3.2.2 mrg run_set_region_4(sc, RT2860_SKEY_MODE_0_7, 0, 4); 3560 1.3.2.2 mrg 3561 1.3.2.2 mrg run_read(sc, RT2860_US_CYC_CNT, &tmp); 3562 1.3.2.2 mrg tmp = (tmp & ~0xff) | 0x1e; 3563 1.3.2.2 mrg run_write(sc, RT2860_US_CYC_CNT, tmp); 3564 1.3.2.2 mrg 3565 1.3.2.2 mrg if (sc->mac_rev != 0x0101) 3566 1.3.2.2 mrg run_write(sc, RT2860_TXOP_CTRL_CFG, 0x0000583f); 3567 1.3.2.2 mrg 3568 1.3.2.2 mrg run_write(sc, RT2860_WMM_TXOP0_CFG, 0); 3569 1.3.2.2 mrg run_write(sc, RT2860_WMM_TXOP1_CFG, 48 << 16 | 96); 3570 1.3.2.2 mrg 3571 1.3.2.2 mrg /* write vendor-specific BBP values (from EEPROM) */ 3572 1.3.2.2 mrg for (i = 0; i < 8; i++) { 3573 1.3.2.2 mrg if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff) 3574 1.3.2.2 mrg continue; 3575 1.3.2.2 mrg run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val); 3576 1.3.2.2 mrg } 3577 1.3.2.2 mrg 3578 1.3.2.2 mrg /* select Main antenna for 1T1R devices */ 3579 1.3.2.2 mrg if (sc->rf_rev == RT3070_RF_3020) 3580 1.3.2.2 mrg run_set_rx_antenna(sc, 0); 3581 1.3.2.2 mrg 3582 1.3.2.2 mrg /* send LEDs operating mode to microcontroller */ 3583 1.3.2.2 mrg (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0]); 3584 1.3.2.2 mrg (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1]); 3585 1.3.2.2 mrg (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2]); 3586 1.3.2.2 mrg 3587 1.3.2.2 mrg if (sc->mac_ver >= 0x3070) 3588 1.3.2.2 mrg run_rt3070_rf_init(sc); 3589 1.3.2.2 mrg 3590 1.3.2.2 mrg /* disable non-existing Rx chains */ 3591 1.3.2.2 mrg run_bbp_read(sc, 3, &bbp3); 3592 1.3.2.2 mrg bbp3 &= ~(1 << 3 | 1 << 4); 3593 1.3.2.2 mrg if (sc->nrxchains == 2) 3594 1.3.2.2 mrg bbp3 |= 1 << 3; 3595 1.3.2.2 mrg else if (sc->nrxchains == 3) 3596 1.3.2.2 mrg bbp3 |= 1 << 4; 3597 1.3.2.2 mrg run_bbp_write(sc, 3, bbp3); 3598 1.3.2.2 mrg 3599 1.3.2.2 mrg /* disable non-existing Tx chains */ 3600 1.3.2.2 mrg run_bbp_read(sc, 1, &bbp1); 3601 1.3.2.2 mrg if (sc->ntxchains == 1) 3602 1.3.2.2 mrg bbp1 &= ~(1 << 3 | 1 << 4); 3603 1.3.2.2 mrg run_bbp_write(sc, 1, bbp1); 3604 1.3.2.2 mrg 3605 1.3.2.2 mrg if (sc->mac_ver >= 0x3070) 3606 1.3.2.2 mrg run_rt3070_rf_setup(sc); 3607 1.3.2.2 mrg 3608 1.3.2.2 mrg /* select default channel */ 3609 1.3.2.2 mrg run_set_chan(sc, ic->ic_curchan); 3610 1.3.2.2 mrg 3611 1.3.2.2 mrg /* turn radio LED on */ 3612 1.3.2.2 mrg run_set_leds(sc, RT2860_LED_RADIO); 3613 1.3.2.2 mrg 3614 1.3.2.2 mrg #ifdef RUN_HWCRYPTO 3615 1.3.2.2 mrg if (ic->ic_flags & IEEE80211_F_PRIVACY) { 3616 1.3.2.2 mrg /* install WEP keys */ 3617 1.3.2.2 mrg for (i = 0; i < IEEE80211_WEP_NKID; i++) 3618 1.3.2.2 mrg (void)run_set_key(ic, &ic->ic_crypto.cs_nw_keys[i], 3619 1.3.2.2 mrg NULL); 3620 1.3.2.2 mrg } 3621 1.3.2.2 mrg #endif 3622 1.3.2.2 mrg 3623 1.3.2.2 mrg for (i = 0; i < RUN_RX_RING_COUNT; i++) { 3624 1.3.2.2 mrg struct run_rx_data *data = &sc->rxq.data[i]; 3625 1.3.2.2 mrg 3626 1.3.2.2 mrg usbd_setup_xfer(data->xfer, sc->rxq.pipeh, data, data->buf, 3627 1.3.2.2 mrg RUN_MAX_RXSZ, USBD_SHORT_XFER_OK | USBD_NO_COPY, 3628 1.3.2.2 mrg USBD_NO_TIMEOUT, run_rxeof); 3629 1.3.2.2 mrg error = usbd_transfer(data->xfer); 3630 1.3.2.2 mrg if (error != USBD_NORMAL_COMPLETION && 3631 1.3.2.2 mrg error != USBD_IN_PROGRESS) 3632 1.3.2.2 mrg goto fail; 3633 1.3.2.2 mrg } 3634 1.3.2.2 mrg 3635 1.3.2.2 mrg if ((error = run_txrx_enable(sc)) != 0) 3636 1.3.2.2 mrg goto fail; 3637 1.3.2.2 mrg 3638 1.3.2.2 mrg ifp->if_flags &= ~IFF_OACTIVE; 3639 1.3.2.2 mrg ifp->if_flags |= IFF_RUNNING; 3640 1.3.2.2 mrg 3641 1.3.2.2 mrg if (ic->ic_opmode == IEEE80211_M_MONITOR) 3642 1.3.2.2 mrg ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 3643 1.3.2.2 mrg else 3644 1.3.2.2 mrg ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 3645 1.3.2.2 mrg 3646 1.3.2.2 mrg if (error != 0) 3647 1.3.2.2 mrg fail: run_stop(ifp, 1); 3648 1.3.2.2 mrg return (error); 3649 1.3.2.2 mrg } 3650 1.3.2.2 mrg 3651 1.3.2.2 mrg static void 3652 1.3.2.2 mrg run_stop(struct ifnet *ifp, int disable) 3653 1.3.2.2 mrg { 3654 1.3.2.2 mrg struct run_softc *sc = ifp->if_softc; 3655 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 3656 1.3.2.2 mrg uint32_t tmp; 3657 1.3.2.2 mrg int ntries, qid; 3658 1.3.2.2 mrg 3659 1.3.2.2 mrg if (ifp->if_flags & IFF_RUNNING) 3660 1.3.2.2 mrg run_set_leds(sc, 0); /* turn all LEDs off */ 3661 1.3.2.2 mrg 3662 1.3.2.2 mrg sc->sc_tx_timer = 0; 3663 1.3.2.2 mrg ifp->if_timer = 0; 3664 1.3.2.2 mrg ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 3665 1.3.2.2 mrg 3666 1.3.2.2 mrg callout_stop(&sc->scan_to); 3667 1.3.2.2 mrg callout_stop(&sc->calib_to); 3668 1.3.2.2 mrg 3669 1.3.2.2 mrg ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 3670 1.3.2.2 mrg /* wait for all queued asynchronous commands to complete */ 3671 1.3.2.2 mrg while (sc->cmdq.queued > 0) 3672 1.3.2.2 mrg tsleep(&sc->cmdq, 0, "cmdq", 0); 3673 1.3.2.2 mrg 3674 1.3.2.2 mrg /* disable Tx/Rx */ 3675 1.3.2.2 mrg run_read(sc, RT2860_MAC_SYS_CTRL, &tmp); 3676 1.3.2.2 mrg tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3677 1.3.2.2 mrg run_write(sc, RT2860_MAC_SYS_CTRL, tmp); 3678 1.3.2.2 mrg 3679 1.3.2.2 mrg /* wait for pending Tx to complete */ 3680 1.3.2.2 mrg for (ntries = 0; ntries < 100; ntries++) { 3681 1.3.2.2 mrg if (run_read(sc, RT2860_TXRXQ_PCNT, &tmp) != 0) 3682 1.3.2.2 mrg break; 3683 1.3.2.2 mrg if ((tmp & RT2860_TX2Q_PCNT_MASK) == 0) 3684 1.3.2.2 mrg break; 3685 1.3.2.2 mrg } 3686 1.3.2.2 mrg DELAY(1000); 3687 1.3.2.2 mrg run_write(sc, RT2860_USB_DMA_CFG, 0); 3688 1.3.2.2 mrg 3689 1.3.2.2 mrg /* reset adapter */ 3690 1.3.2.2 mrg run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST); 3691 1.3.2.2 mrg run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3692 1.3.2.2 mrg 3693 1.3.2.2 mrg /* reset Tx and Rx rings */ 3694 1.3.2.2 mrg sc->qfullmsk = 0; 3695 1.3.2.2 mrg for (qid = 0; qid < 4; qid++) 3696 1.3.2.2 mrg run_free_tx_ring(sc, qid); 3697 1.3.2.2 mrg run_free_rx_ring(sc); 3698 1.3.2.2 mrg } 3699 1.3.2.2 mrg 3700 1.3.2.2 mrg #ifndef IEEE80211_STA_ONLY 3701 1.3.2.2 mrg static int 3702 1.3.2.2 mrg run_setup_beacon(struct run_softc *sc) 3703 1.3.2.2 mrg { 3704 1.3.2.2 mrg struct ieee80211com *ic = &sc->sc_ic; 3705 1.3.2.2 mrg struct rt2860_txwi txwi; 3706 1.3.2.2 mrg struct mbuf *m; 3707 1.3.2.2 mrg int ridx; 3708 1.3.2.2 mrg 3709 1.3.2.2 mrg if ((m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo)) == NULL) 3710 1.3.2.2 mrg return (ENOBUFS); 3711 1.3.2.2 mrg 3712 1.3.2.2 mrg memset(&txwi, 0, sizeof txwi); 3713 1.3.2.2 mrg txwi.wcid = 0xff; 3714 1.3.2.2 mrg txwi.len = htole16(m->m_pkthdr.len); 3715 1.3.2.2 mrg /* send beacons at the lowest available rate */ 3716 1.3.2.2 mrg ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 3717 1.3.2.2 mrg RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 3718 1.3.2.2 mrg txwi.phy = htole16(rt2860_rates[ridx].mcs); 3719 1.3.2.2 mrg if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM) 3720 1.3.2.2 mrg txwi.phy |= htole16(RT2860_PHY_OFDM); 3721 1.3.2.2 mrg txwi.txop = RT2860_TX_TXOP_HT; 3722 1.3.2.2 mrg txwi.flags = RT2860_TX_TS; 3723 1.3.2.2 mrg 3724 1.3.2.2 mrg run_write_region_1(sc, RT2860_BCN_BASE(0), 3725 1.3.2.2 mrg (uint8_t *)&txwi, sizeof txwi); 3726 1.3.2.2 mrg run_write_region_1(sc, RT2860_BCN_BASE(0) + sizeof txwi, 3727 1.3.2.2 mrg mtod(m, uint8_t *), m->m_pkthdr.len); 3728 1.3.2.2 mrg 3729 1.3.2.2 mrg m_freem(m); 3730 1.3.2.2 mrg 3731 1.3.2.2 mrg return (0); 3732 1.3.2.2 mrg } 3733 1.3.2.2 mrg #endif 3734 1.3.2.2 mrg 3735 1.3.2.2 mrg MODULE(MODULE_CLASS_DRIVER, if_run, "bpf"); 3736 1.3.2.2 mrg 3737 1.3.2.2 mrg #ifdef _MODULE 3738 1.3.2.2 mrg #include "ioconf.c" 3739 1.3.2.2 mrg #endif 3740 1.3.2.2 mrg 3741 1.3.2.2 mrg static int 3742 1.3.2.2 mrg if_run_modcmd(modcmd_t cmd, void *arg) 3743 1.3.2.2 mrg { 3744 1.3.2.2 mrg int error = 0; 3745 1.3.2.2 mrg 3746 1.3.2.2 mrg switch (cmd) { 3747 1.3.2.2 mrg case MODULE_CMD_INIT: 3748 1.3.2.2 mrg #ifdef _MODULE 3749 1.3.2.2 mrg error = config_init_component(cfdriver_ioconf_run, 3750 1.3.2.2 mrg cfattach_ioconf_run, cfdata_ioconf_run); 3751 1.3.2.2 mrg #endif 3752 1.3.2.2 mrg return (error); 3753 1.3.2.2 mrg case MODULE_CMD_FINI: 3754 1.3.2.2 mrg #ifdef _MODULE 3755 1.3.2.2 mrg error = config_fini_component(cfdriver_ioconf_run, 3756 1.3.2.2 mrg cfattach_ioconf_run, cfdata_ioconf_run); 3757 1.3.2.2 mrg #endif 3758 1.3.2.2 mrg return (error); 3759 1.3.2.2 mrg default: 3760 1.3.2.2 mrg return (ENOTTY); 3761 1.3.2.2 mrg } 3762 1.3.2.2 mrg } 3763
Indexes created Thu Oct 02 14:10:14 GMT 2025