if_run.c revision 1.10.4.1.4.1
1 /* $NetBSD: if_run.c,v 1.10.4.1.4.1 2016/09/06 20:33:08 skrll Exp $ */ 2 /* $OpenBSD: if_run.c,v 1.90 2012/03/24 15:11:04 jsg Exp $ */ 3 4 /*- 5 * Copyright (c) 2008-2010 Damien Bergamini <damien.bergamini (at) free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Ralink Technology RT2700U/RT2800U/RT3000U chipset driver. 22 * http://www.ralinktech.com/ 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: if_run.c,v 1.10.4.1.4.1 2016/09/06 20:33:08 skrll Exp $"); 27 28 #include <sys/param.h> 29 #include <sys/sockio.h> 30 #include <sys/sysctl.h> 31 #include <sys/mbuf.h> 32 #include <sys/kernel.h> 33 #include <sys/socket.h> 34 #include <sys/systm.h> 35 #include <sys/malloc.h> 36 #include <sys/callout.h> 37 #include <sys/module.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_ether.h> 50 #include <net/if_media.h> 51 #include <net/if_types.h> 52 53 #include <net80211/ieee80211_var.h> 54 #include <net80211/ieee80211_amrr.h> 55 #include <net80211/ieee80211_radiotap.h> 56 57 #include <dev/firmload.h> 58 59 #include <dev/usb/usb.h> 60 #include <dev/usb/usbdi.h> 61 #include <dev/usb/usbdivar.h> 62 #include <dev/usb/usbdi_util.h> 63 #include <dev/usb/usbdevs.h> 64 65 #include <dev/ic/rt2860reg.h> /* shared with ral(4) */ 66 #include <dev/usb/if_runvar.h> 67 68 #ifdef RUN_DEBUG 69 #define DPRINTF(x) do { if (run_debug) printf x; } while (0) 70 #define DPRINTFN(n, x) do { if (run_debug >= (n)) printf x; } while (0) 71 int run_debug = 0; 72 #else 73 #define DPRINTF(x) 74 #define DPRINTFN(n, x) 75 #endif 76 77 #define USB_ID(v, p) { USB_VENDOR_##v, USB_PRODUCT_##v##_##p } 78 static const struct usb_devno run_devs[] = { 79 USB_ID(ABOCOM, RT2770), 80 USB_ID(ABOCOM, RT2870), 81 USB_ID(ABOCOM, RT3070), 82 USB_ID(ABOCOM, RT3071), 83 USB_ID(ABOCOM, RT3072), 84 USB_ID(ABOCOM2, RT2870_1), 85 USB_ID(ACCTON, RT2770), 86 USB_ID(ACCTON, RT2870_1), 87 USB_ID(ACCTON, RT2870_2), 88 USB_ID(ACCTON, RT2870_3), 89 USB_ID(ACCTON, RT2870_4), 90 USB_ID(ACCTON, RT2870_5), 91 USB_ID(ACCTON, RT3070), 92 USB_ID(ACCTON, RT3070_1), 93 USB_ID(ACCTON, RT3070_2), 94 USB_ID(ACCTON, RT3070_3), 95 USB_ID(ACCTON, RT3070_4), 96 USB_ID(ACCTON, RT3070_5), 97 USB_ID(ACCTON, RT3070_6), 98 USB_ID(AIRTIES, RT3070), 99 USB_ID(AIRTIES, RT3070_2), 100 USB_ID(ALLWIN, RT2070), 101 USB_ID(ALLWIN, RT2770), 102 USB_ID(ALLWIN, RT2870), 103 USB_ID(ALLWIN, RT3070), 104 USB_ID(ALLWIN, RT3071), 105 USB_ID(ALLWIN, RT3072), 106 USB_ID(ALLWIN, RT3572), 107 USB_ID(AMIGO, RT2870_1), 108 USB_ID(AMIGO, RT2870_2), 109 USB_ID(AMIT, CGWLUSB2GNR), 110 USB_ID(AMIT, RT2870_1), 111 USB_ID(AMIT2, RT2870), 112 USB_ID(ASUSTEK, RT2870_1), 113 USB_ID(ASUSTEK, RT2870_2), 114 USB_ID(ASUSTEK, RT2870_3), 115 USB_ID(ASUSTEK, RT2870_4), 116 USB_ID(ASUSTEK, RT2870_5), 117 USB_ID(ASUSTEK, RT3070), 118 USB_ID(ASUSTEK, RT3070_1), 119 USB_ID(ASUSTEK2, USBN11), 120 USB_ID(AZUREWAVE, RT2870_1), 121 USB_ID(AZUREWAVE, RT2870_2), 122 USB_ID(AZUREWAVE, RT3070), 123 USB_ID(AZUREWAVE, RT3070_2), 124 USB_ID(AZUREWAVE, RT3070_3), 125 USB_ID(AZUREWAVE, RT3070_4), 126 USB_ID(AZUREWAVE, RT3070_5), 127 USB_ID(BELKIN, F5D8053V3), 128 USB_ID(BELKIN, F5D8055), 129 USB_ID(BELKIN, F5D8055V2), 130 USB_ID(BELKIN, F6D4050V1), 131 USB_ID(BELKIN, F6D4050V2), 132 USB_ID(BELKIN, F7D1101V2), 133 USB_ID(BELKIN, RT2870_1), 134 USB_ID(BELKIN, RT2870_2), 135 USB_ID(BEWAN, RT3070), 136 USB_ID(CISCOLINKSYS, AE1000), 137 USB_ID(CISCOLINKSYS, AM10), 138 USB_ID(CISCOLINKSYS2, RT3070), 139 USB_ID(CISCOLINKSYS3, RT3070), 140 USB_ID(CONCEPTRONIC, RT2870_1), 141 USB_ID(CONCEPTRONIC, RT2870_2), 142 USB_ID(CONCEPTRONIC, RT2870_3), 143 USB_ID(CONCEPTRONIC, RT2870_4), 144 USB_ID(CONCEPTRONIC, RT2870_5), 145 USB_ID(CONCEPTRONIC, RT2870_6), 146 USB_ID(CONCEPTRONIC, RT2870_7), 147 USB_ID(CONCEPTRONIC, RT2870_8), 148 USB_ID(CONCEPTRONIC, RT3070_1), 149 USB_ID(CONCEPTRONIC, RT3070_2), 150 USB_ID(CONCEPTRONIC, RT3070_3), 151 USB_ID(COREGA, CGWLUSB300GNM), 152 USB_ID(COREGA, RT2870_1), 153 USB_ID(COREGA, RT2870_2), 154 USB_ID(COREGA, RT2870_3), 155 USB_ID(COREGA, RT3070), 156 USB_ID(CYBERTAN, RT2870), 157 USB_ID(DLINK, RT2870), 158 USB_ID(DLINK, RT3072), 159 USB_ID(DLINK2, DWA130), 160 USB_ID(DLINK2, RT2870_1), 161 USB_ID(DLINK2, RT2870_2), 162 USB_ID(DLINK2, RT3070_1), 163 USB_ID(DLINK2, RT3070_2), 164 USB_ID(DLINK2, RT3070_3), 165 USB_ID(DLINK2, RT3070_4), 166 USB_ID(DLINK2, RT3070_5), 167 USB_ID(DLINK2, RT3072), 168 USB_ID(DLINK2, RT3072_1), 169 USB_ID(DVICO, RT3070), 170 USB_ID(EDIMAX, EW7717), 171 USB_ID(EDIMAX, EW7718), 172 USB_ID(EDIMAX, EW7722UTN), 173 USB_ID(EDIMAX, RT2870_1), 174 USB_ID(ENCORE, RT3070), 175 USB_ID(ENCORE, RT3070_2), 176 USB_ID(ENCORE, RT3070_3), 177 USB_ID(GIGABYTE, GNWB31N), 178 USB_ID(GIGABYTE, GNWB32L), 179 USB_ID(GIGABYTE, RT2870_1), 180 USB_ID(GIGASET, RT3070_1), 181 USB_ID(GIGASET, RT3070_2), 182 USB_ID(GUILLEMOT, HWNU300), 183 USB_ID(HAWKING, HWUN2), 184 USB_ID(HAWKING, RT2870_1), 185 USB_ID(HAWKING, RT2870_2), 186 USB_ID(HAWKING, RT2870_3), 187 USB_ID(HAWKING, RT2870_4), 188 USB_ID(HAWKING, RT2870_5), 189 USB_ID(HAWKING, RT3070), 190 USB_ID(IODATA, RT3072_1), 191 USB_ID(IODATA, RT3072_2), 192 USB_ID(IODATA, RT3072_3), 193 USB_ID(IODATA, RT3072_4), 194 USB_ID(LINKSYS4, RT3070), 195 USB_ID(LINKSYS4, WUSB100), 196 USB_ID(LINKSYS4, WUSB54GC_3), 197 USB_ID(LINKSYS4, WUSB600N), 198 USB_ID(LINKSYS4, WUSB600NV2), 199 USB_ID(LOGITEC, LANW300NU2), 200 USB_ID(LOGITEC, RT2870_1), 201 USB_ID(LOGITEC, RT2870_2), 202 USB_ID(LOGITEC, RT2870_3), 203 USB_ID(LOGITEC, RT3020), 204 USB_ID(MELCO, RT2870_1), 205 USB_ID(MELCO, RT2870_2), 206 USB_ID(MELCO, WLIUCAG300N), 207 USB_ID(MELCO, WLIUCG300N), 208 USB_ID(MELCO, WLIUCG301N), 209 USB_ID(MELCO, WLIUCGN), 210 USB_ID(MELCO, WLIUCGNHP), 211 USB_ID(MELCO, WLIUCGNM), 212 USB_ID(MELCO, WLIUCGNM2T), 213 USB_ID(MOTOROLA4, RT2770), 214 USB_ID(MOTOROLA4, RT3070), 215 USB_ID(MSI, RT3070), 216 USB_ID(MSI, RT3070_2), 217 USB_ID(MSI, RT3070_3), 218 USB_ID(MSI, RT3070_4), 219 USB_ID(MSI, RT3070_5), 220 USB_ID(MSI, RT3070_6), 221 USB_ID(MSI, RT3070_7), 222 USB_ID(MSI, RT3070_8), 223 USB_ID(MSI, RT3070_9), 224 USB_ID(MSI, RT3070_10), 225 USB_ID(MSI, RT3070_11), 226 USB_ID(MSI, RT3070_12), 227 USB_ID(MSI, RT3070_13), 228 USB_ID(MSI, RT3070_14), 229 USB_ID(MSI, RT3070_15), 230 USB_ID(OVISLINK, RT3071), 231 USB_ID(OVISLINK, RT3072), 232 USB_ID(PARA, RT3070), 233 USB_ID(PEGATRON, RT2870), 234 USB_ID(PEGATRON, RT3070), 235 USB_ID(PEGATRON, RT3070_2), 236 USB_ID(PEGATRON, RT3070_3), 237 USB_ID(PEGATRON, RT3072), 238 USB_ID(PHILIPS, RT2870), 239 USB_ID(PLANEX2, GWUS300MINIS), 240 USB_ID(PLANEX2, GWUSMICRO300), 241 USB_ID(PLANEX2, GWUSMICRON), 242 USB_ID(PLANEX2, GWUS300MINIX), 243 USB_ID(PLANEX2, RT3070), 244 USB_ID(QCOM, RT2870), 245 USB_ID(QUANTA, RT3070), 246 USB_ID(RALINK, RT2070), 247 USB_ID(RALINK, RT2770), 248 USB_ID(RALINK, RT2870), 249 USB_ID(RALINK, RT3070), 250 USB_ID(RALINK, RT3071), 251 USB_ID(RALINK, RT3072), 252 USB_ID(RALINK, RT3370), 253 USB_ID(RALINK, RT3572), 254 USB_ID(RALINK, RT8070), 255 USB_ID(SAMSUNG, RT2870_1), 256 USB_ID(SENAO, RT2870_1), 257 USB_ID(SENAO, RT2870_2), 258 USB_ID(SENAO, RT2870_3), 259 USB_ID(SENAO, RT2870_4), 260 USB_ID(SENAO, RT3070), 261 USB_ID(SENAO, RT3071), 262 USB_ID(SENAO, RT3072), 263 USB_ID(SENAO, RT3072_2), 264 USB_ID(SENAO, RT3072_3), 265 USB_ID(SENAO, RT3072_4), 266 USB_ID(SENAO, RT3072_5), 267 USB_ID(SITECOMEU, RT2870_1), 268 USB_ID(SITECOMEU, RT2870_2), 269 USB_ID(SITECOMEU, RT2870_3), 270 USB_ID(SITECOMEU, RT3070_1), 271 USB_ID(SITECOMEU, RT3072_3), 272 USB_ID(SITECOMEU, RT3072_4), 273 USB_ID(SITECOMEU, RT3072_5), 274 USB_ID(SITECOMEU, WL302), 275 USB_ID(SITECOMEU, WL315), 276 USB_ID(SITECOMEU, WL321), 277 USB_ID(SITECOMEU, WL324), 278 USB_ID(SITECOMEU, WL329), 279 USB_ID(SITECOMEU, WL343), 280 USB_ID(SITECOMEU, WL344), 281 USB_ID(SITECOMEU, WL345), 282 USB_ID(SITECOMEU, WL349V4), 283 USB_ID(SITECOMEU, WL608), 284 USB_ID(SITECOMEU, WLA4000), 285 USB_ID(SITECOMEU, WLA5000), 286 USB_ID(SPARKLAN, RT2870_1), 287 USB_ID(SPARKLAN, RT2870_2), 288 USB_ID(SPARKLAN, RT3070), 289 USB_ID(SWEEX2, LW153), 290 USB_ID(SWEEX2, LW303), 291 USB_ID(SWEEX2, LW313), 292 USB_ID(TOSHIBA, RT3070), 293 USB_ID(UMEDIA, RT2870_1), 294 USB_ID(UMEDIA, TEW645UB), 295 USB_ID(ZCOM, RT2870_1), 296 USB_ID(ZCOM, RT2870_2), 297 USB_ID(ZINWELL, RT2870_1), 298 USB_ID(ZINWELL, RT2870_2), 299 USB_ID(ZINWELL, RT3070), 300 USB_ID(ZINWELL, RT3072), 301 USB_ID(ZINWELL, RT3072_2), 302 USB_ID(ZYXEL, NWD2105), 303 USB_ID(ZYXEL, NWD211AN), 304 USB_ID(ZYXEL, RT2870_1), 305 USB_ID(ZYXEL, RT2870_2), 306 USB_ID(ZYXEL, RT3070), 307 }; 308 309 static int run_match(device_t, cfdata_t, void *); 310 static void run_attach(device_t, device_t, void *); 311 static int run_detach(device_t, int); 312 static int run_activate(device_t, enum devact); 313 314 CFATTACH_DECL_NEW(run, sizeof(struct run_softc), 315 run_match, run_attach, run_detach, run_activate); 316 317 static int run_alloc_rx_ring(struct run_softc *); 318 static void run_free_rx_ring(struct run_softc *); 319 static int run_alloc_tx_ring(struct run_softc *, int); 320 static void run_free_tx_ring(struct run_softc *, int); 321 static int run_load_microcode(struct run_softc *); 322 static int run_reset(struct run_softc *); 323 static int run_read(struct run_softc *, uint16_t, uint32_t *); 324 static int run_read_region_1(struct run_softc *, uint16_t, 325 uint8_t *, int); 326 static int run_write_2(struct run_softc *, uint16_t, uint16_t); 327 static int run_write(struct run_softc *, uint16_t, uint32_t); 328 static int run_write_region_1(struct run_softc *, uint16_t, 329 const uint8_t *, int); 330 static int run_set_region_4(struct run_softc *, uint16_t, 331 uint32_t, int); 332 static int run_efuse_read_2(struct run_softc *, uint16_t, 333 uint16_t *); 334 static int run_eeprom_read_2(struct run_softc *, uint16_t, 335 uint16_t *); 336 static int run_rt2870_rf_write(struct run_softc *, uint8_t, 337 uint32_t); 338 static int run_rt3070_rf_read(struct run_softc *, uint8_t, 339 uint8_t *); 340 static int run_rt3070_rf_write(struct run_softc *, uint8_t, 341 uint8_t); 342 static int run_bbp_read(struct run_softc *, uint8_t, uint8_t *); 343 static int run_bbp_write(struct run_softc *, uint8_t, uint8_t); 344 static int run_mcu_cmd(struct run_softc *, uint8_t, uint16_t); 345 static const char * run_get_rf(int); 346 static int run_read_eeprom(struct run_softc *); 347 static struct ieee80211_node * 348 run_node_alloc(struct ieee80211_node_table *); 349 static int run_media_change(struct ifnet *); 350 static void run_next_scan(void *); 351 static void run_task(void *); 352 static void run_do_async(struct run_softc *, 353 void (*)(struct run_softc *, void *), void *, int); 354 static int run_newstate(struct ieee80211com *, 355 enum ieee80211_state, int); 356 static void run_newstate_cb(struct run_softc *, void *); 357 static int run_updateedca(struct ieee80211com *); 358 static void run_updateedca_cb(struct run_softc *, void *); 359 #ifdef RUN_HWCRYPTO 360 static int run_set_key(struct ieee80211com *, 361 const struct ieee80211_key *, const uint8_t *); 362 static void run_set_key_cb(struct run_softc *, void *); 363 static int run_delete_key(struct ieee80211com *, 364 const struct ieee80211_key *); 365 static void run_delete_key_cb(struct run_softc *, void *); 366 #endif 367 static void run_calibrate_to(void *); 368 static void run_calibrate_cb(struct run_softc *, void *); 369 static void run_newassoc(struct ieee80211_node *, int); 370 static void run_rx_frame(struct run_softc *, uint8_t *, int); 371 static void run_rxeof(struct usbd_xfer *, void *, 372 usbd_status); 373 static void run_txeof(struct usbd_xfer *, void *, 374 usbd_status); 375 static int run_tx(struct run_softc *, struct mbuf *, 376 struct ieee80211_node *); 377 static void run_start(struct ifnet *); 378 static void run_watchdog(struct ifnet *); 379 static int run_ioctl(struct ifnet *, u_long, void *); 380 static void run_select_chan_group(struct run_softc *, int); 381 static void run_set_agc(struct run_softc *, uint8_t); 382 static void run_set_rx_antenna(struct run_softc *, int); 383 static void run_rt2870_set_chan(struct run_softc *, u_int); 384 static void run_rt3070_set_chan(struct run_softc *, u_int); 385 static void run_rt3572_set_chan(struct run_softc *, u_int); 386 static int run_set_chan(struct run_softc *, 387 struct ieee80211_channel *); 388 static void run_enable_tsf_sync(struct run_softc *); 389 static void run_enable_mrr(struct run_softc *); 390 static void run_set_txpreamble(struct run_softc *); 391 static void run_set_basicrates(struct run_softc *); 392 static void run_set_leds(struct run_softc *, uint16_t); 393 static void run_set_bssid(struct run_softc *, const uint8_t *); 394 static void run_set_macaddr(struct run_softc *, const uint8_t *); 395 static void run_updateslot(struct ifnet *); 396 static void run_updateslot_cb(struct run_softc *, void *); 397 static int8_t run_rssi2dbm(struct run_softc *, uint8_t, uint8_t); 398 static int run_bbp_init(struct run_softc *); 399 static int run_rt3070_rf_init(struct run_softc *); 400 static int run_rt3070_filter_calib(struct run_softc *, uint8_t, 401 uint8_t, uint8_t *); 402 static void run_rt3070_rf_setup(struct run_softc *); 403 static int run_txrx_enable(struct run_softc *); 404 static int run_init(struct ifnet *); 405 static void run_stop(struct ifnet *, int); 406 #ifndef IEEE80211_STA_ONLY 407 static int run_setup_beacon(struct run_softc *); 408 #endif 409 410 static const struct { 411 uint32_t reg; 412 uint32_t val; 413 } rt2870_def_mac[] = { 414 RT2870_DEF_MAC 415 }; 416 417 static const struct { 418 uint8_t reg; 419 uint8_t val; 420 } rt2860_def_bbp[] = { 421 RT2860_DEF_BBP 422 }; 423 424 static const struct rfprog { 425 uint8_t chan; 426 uint32_t r1, r2, r3, r4; 427 } rt2860_rf2850[] = { 428 RT2860_RF2850 429 }; 430 431 static const struct { 432 uint8_t n, r, k; 433 } rt3070_freqs[] = { 434 RT3070_RF3052 435 }; 436 437 static const struct { 438 uint8_t reg; 439 uint8_t val; 440 } rt3070_def_rf[] = { 441 RT3070_DEF_RF 442 }, rt3572_def_rf[] = { 443 RT3572_DEF_RF 444 }; 445 446 static int 447 firmware_load(const char *dname, const char *iname, uint8_t **ucodep, 448 size_t *sizep) 449 { 450 firmware_handle_t fh; 451 int error; 452 453 if ((error = firmware_open(dname, iname, &fh)) != 0) 454 return error; 455 *sizep = firmware_get_size(fh); 456 if ((*ucodep = firmware_malloc(*sizep)) == NULL) { 457 firmware_close(fh); 458 return ENOMEM; 459 } 460 if ((error = firmware_read(fh, 0, *ucodep, *sizep)) != 0) 461 firmware_free(*ucodep, *sizep); 462 firmware_close(fh); 463 464 return error; 465 } 466 467 static int 468 run_match(device_t parent, cfdata_t match, void *aux) 469 { 470 struct usb_attach_arg *uaa = aux; 471 472 return (usb_lookup(run_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 473 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 474 } 475 476 static void 477 run_attach(device_t parent, device_t self, void *aux) 478 { 479 struct run_softc *sc = device_private(self); 480 struct usb_attach_arg *uaa = aux; 481 struct ieee80211com *ic = &sc->sc_ic; 482 struct ifnet *ifp = &sc->sc_if; 483 usb_interface_descriptor_t *id; 484 usb_endpoint_descriptor_t *ed; 485 char *devinfop; 486 int i, nrx, ntx, ntries, error; 487 uint32_t ver; 488 489 aprint_naive("\n"); 490 aprint_normal("\n"); 491 492 sc->sc_dev = self; 493 sc->sc_udev = uaa->uaa_device; 494 495 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 496 aprint_normal_dev(sc->sc_dev, "%s\n", devinfop); 497 usbd_devinfo_free(devinfop); 498 499 error = usbd_set_config_no(sc->sc_udev, 1, 0); 500 if (error != 0) { 501 aprint_error_dev(sc->sc_dev, "failed to set configuration" 502 ", err=%s\n", usbd_errstr(error)); 503 return; 504 } 505 506 /* get the first interface handle */ 507 error = usbd_device2interface_handle(sc->sc_udev, 0, &sc->sc_iface); 508 if (error != 0) { 509 aprint_error_dev(sc->sc_dev, 510 "could not get interface handle\n"); 511 return; 512 } 513 514 /* 515 * Find all bulk endpoints. There are 7 bulk endpoints: 1 for RX 516 * and 6 for TX (4 EDCAs + HCCA + Prio). 517 * Update 03-14-2009: some devices like the Planex GW-US300MiniS 518 * seem to have only 4 TX bulk endpoints (Fukaumi Naoki). 519 */ 520 nrx = ntx = 0; 521 id = usbd_get_interface_descriptor(sc->sc_iface); 522 for (i = 0; i < id->bNumEndpoints; i++) { 523 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 524 if (ed == NULL || UE_GET_XFERTYPE(ed->bmAttributes) != UE_BULK) 525 continue; 526 527 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) { 528 sc->rxq.pipe_no = ed->bEndpointAddress; 529 nrx++; 530 } else if (ntx < 4) { 531 sc->txq[ntx].pipe_no = ed->bEndpointAddress; 532 ntx++; 533 } 534 } 535 /* make sure we've got them all */ 536 if (nrx < 1 || ntx < 4) { 537 aprint_error_dev(sc->sc_dev, "missing endpoint\n"); 538 return; 539 } 540 541 usb_init_task(&sc->sc_task, run_task, sc, 0); 542 callout_init(&sc->scan_to, 0); 543 callout_setfunc(&sc->scan_to, run_next_scan, sc); 544 callout_init(&sc->calib_to, 0); 545 callout_setfunc(&sc->calib_to, run_calibrate_to, sc); 546 547 sc->amrr.amrr_min_success_threshold = 1; 548 sc->amrr.amrr_max_success_threshold = 10; 549 550 /* wait for the chip to settle */ 551 for (ntries = 0; ntries < 100; ntries++) { 552 if (run_read(sc, RT2860_ASIC_VER_ID, &ver) != 0) 553 return; 554 if (ver != 0 && ver != 0xffffffff) 555 break; 556 DELAY(10); 557 } 558 if (ntries == 100) { 559 aprint_error_dev(sc->sc_dev, 560 "timeout waiting for NIC to initialize\n"); 561 return; 562 } 563 sc->mac_ver = ver >> 16; 564 sc->mac_rev = ver & 0xffff; 565 566 /* retrieve RF rev. no and various other things from EEPROM */ 567 run_read_eeprom(sc); 568 569 aprint_error_dev(sc->sc_dev, 570 "MAC/BBP RT%04X (rev 0x%04X), RF %s (MIMO %dT%dR), address %s\n", 571 sc->mac_ver, sc->mac_rev, run_get_rf(sc->rf_rev), sc->ntxchains, 572 sc->nrxchains, ether_sprintf(ic->ic_myaddr)); 573 574 ic->ic_ifp = ifp; 575 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 576 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 577 ic->ic_state = IEEE80211_S_INIT; 578 579 /* set device capabilities */ 580 ic->ic_caps = 581 IEEE80211_C_MONITOR | /* monitor mode supported */ 582 #ifndef IEEE80211_STA_ONLY 583 IEEE80211_C_IBSS | /* IBSS mode supported */ 584 IEEE80211_C_HOSTAP | /* HostAP mode supported */ 585 #endif 586 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 587 IEEE80211_C_SHSLOT | /* short slot time supported */ 588 #ifdef RUN_HWCRYPTO 589 IEEE80211_C_WEP | /* WEP */ 590 IEEE80211_C_TKIP | /* TKIP */ 591 IEEE80211_C_AES_CCM | /* AES CCMP */ 592 IEEE80211_C_TKIPMIC | /* TKIPMIC */ 593 #endif 594 IEEE80211_C_WME | /* WME */ 595 IEEE80211_C_WPA; /* WPA/RSN */ 596 597 if (sc->rf_rev == RT2860_RF_2750 || 598 sc->rf_rev == RT2860_RF_2850 || 599 sc->rf_rev == RT3070_RF_3052) { 600 /* set supported .11a rates */ 601 ic->ic_sup_rates[IEEE80211_MODE_11A] = 602 ieee80211_std_rateset_11a; 603 604 /* set supported .11a channels */ 605 for (i = 14; i < (int)__arraycount(rt2860_rf2850); i++) { 606 uint8_t chan = rt2860_rf2850[i].chan; 607 ic->ic_channels[chan].ic_freq = 608 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ); 609 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A; 610 } 611 } 612 613 /* set supported .11b and .11g rates */ 614 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 615 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 616 617 /* set supported .11b and .11g channels (1 through 14) */ 618 for (i = 1; i <= 14; i++) { 619 ic->ic_channels[i].ic_freq = 620 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 621 ic->ic_channels[i].ic_flags = 622 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 623 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 624 } 625 626 ifp->if_softc = sc; 627 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 628 ifp->if_init = run_init; 629 ifp->if_ioctl = run_ioctl; 630 ifp->if_start = run_start; 631 ifp->if_watchdog = run_watchdog; 632 IFQ_SET_READY(&ifp->if_snd); 633 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 634 635 if_attach(ifp); 636 ieee80211_ifattach(ic); 637 ic->ic_node_alloc = run_node_alloc; 638 ic->ic_newassoc = run_newassoc; 639 ic->ic_updateslot = run_updateslot; 640 ic->ic_wme.wme_update = run_updateedca; 641 #ifdef RUN_HWCRYPTO 642 ic->ic_crypto.cs_key_set = run_set_key; 643 ic->ic_crypto.cs_key_delete = run_delete_key; 644 #endif 645 /* override state transition machine */ 646 sc->sc_newstate = ic->ic_newstate; 647 ic->ic_newstate = run_newstate; 648 ieee80211_media_init(ic, run_media_change, ieee80211_media_status); 649 650 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 651 sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 652 &sc->sc_drvbpf); 653 654 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 655 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 656 sc->sc_rxtap.wr_ihdr.it_present = htole32(RUN_RX_RADIOTAP_PRESENT); 657 658 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 659 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 660 sc->sc_txtap.wt_ihdr.it_present = htole32(RUN_TX_RADIOTAP_PRESENT); 661 662 ieee80211_announce(ic); 663 664 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 665 666 if (!pmf_device_register(self, NULL, NULL)) 667 aprint_error_dev(self, "couldn't establish power handler\n"); 668 } 669 670 static int 671 run_detach(device_t self, int flags) 672 { 673 struct run_softc *sc = device_private(self); 674 struct ifnet *ifp = &sc->sc_if; 675 struct ieee80211com *ic = &sc->sc_ic; 676 int s; 677 678 if (ifp->if_softc == NULL) 679 return 0; 680 681 pmf_device_deregister(self); 682 683 s = splnet(); 684 685 sc->sc_flags |= RUN_DETACHING; 686 687 if (ifp->if_flags & IFF_RUNNING) { 688 usb_rem_task(sc->sc_udev, &sc->sc_task); 689 run_stop(ifp, 0); 690 } 691 692 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 693 bpf_detach(ifp); 694 ieee80211_ifdetach(ic); 695 if_detach(ifp); 696 697 splx(s); 698 699 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 700 701 callout_destroy(&sc->scan_to); 702 callout_destroy(&sc->calib_to); 703 704 return 0; 705 } 706 707 static int 708 run_activate(device_t self, enum devact act) 709 { 710 struct run_softc *sc = device_private(self); 711 712 switch (act) { 713 case DVACT_DEACTIVATE: 714 if_deactivate(sc->sc_ic.ic_ifp); 715 return 0; 716 default: 717 return EOPNOTSUPP; 718 } 719 } 720 721 static int 722 run_alloc_rx_ring(struct run_softc *sc) 723 { 724 struct run_rx_ring *rxq = &sc->rxq; 725 int i, error; 726 727 error = usbd_open_pipe(sc->sc_iface, rxq->pipe_no, 0, &rxq->pipeh); 728 if (error != 0) 729 goto fail; 730 731 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 732 struct run_rx_data *data = &rxq->data[i]; 733 734 data->sc = sc; /* backpointer for callbacks */ 735 736 error = usbd_create_xfer(sc->rxq.pipeh, RUN_MAX_RXSZ, 737 USBD_SHORT_XFER_OK, 0, &data->xfer); 738 if (error) 739 goto fail; 740 741 data->buf = usbd_get_buffer(data->xfer); 742 } 743 if (error != 0) 744 fail: run_free_rx_ring(sc); 745 return error; 746 } 747 748 static void 749 run_free_rx_ring(struct run_softc *sc) 750 { 751 struct run_rx_ring *rxq = &sc->rxq; 752 int i; 753 754 if (rxq->pipeh != NULL) { 755 usbd_abort_pipe(rxq->pipeh); 756 } 757 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 758 if (rxq->data[i].xfer != NULL) 759 usbd_destroy_xfer(rxq->data[i].xfer); 760 rxq->data[i].xfer = NULL; 761 } 762 if (rxq->pipeh != NULL) { 763 usbd_close_pipe(rxq->pipeh); 764 rxq->pipeh = NULL; 765 } 766 } 767 768 static int 769 run_alloc_tx_ring(struct run_softc *sc, int qid) 770 { 771 struct run_tx_ring *txq = &sc->txq[qid]; 772 int i, error; 773 774 txq->cur = txq->queued = 0; 775 776 error = usbd_open_pipe(sc->sc_iface, txq->pipe_no, 0, &txq->pipeh); 777 if (error != 0) 778 goto fail; 779 780 for (i = 0; i < RUN_TX_RING_COUNT; i++) { 781 struct run_tx_data *data = &txq->data[i]; 782 783 data->sc = sc; /* backpointer for callbacks */ 784 data->qid = qid; 785 786 error = usbd_create_xfer(txq->pipeh, RUN_MAX_TXSZ, 787 USBD_FORCE_SHORT_XFER, 0, &data->xfer); 788 if (error) 789 goto fail; 790 791 data->buf = usbd_get_buffer(data->xfer); 792 /* zeroize the TXD + TXWI part */ 793 memset(data->buf, 0, sizeof(struct rt2870_txd) + 794 sizeof(struct rt2860_txwi)); 795 } 796 if (error != 0) 797 fail: run_free_tx_ring(sc, qid); 798 return error; 799 } 800 801 static void 802 run_free_tx_ring(struct run_softc *sc, int qid) 803 { 804 struct run_tx_ring *txq = &sc->txq[qid]; 805 int i; 806 807 if (txq->pipeh != NULL) { 808 usbd_abort_pipe(txq->pipeh); 809 usbd_close_pipe(txq->pipeh); 810 txq->pipeh = NULL; 811 } 812 for (i = 0; i < RUN_TX_RING_COUNT; i++) { 813 if (txq->data[i].xfer != NULL) 814 usbd_destroy_xfer(txq->data[i].xfer); 815 txq->data[i].xfer = NULL; 816 } 817 } 818 819 static int 820 run_load_microcode(struct run_softc *sc) 821 { 822 usb_device_request_t req; 823 const char *fwname; 824 u_char *ucode = NULL; /* XXX gcc 4.8.3: maybe-uninitialized */ 825 size_t size = 0; /* XXX gcc 4.8.3: maybe-uninitialized */ 826 uint32_t tmp; 827 int ntries, error; 828 829 /* RT3071/RT3072 use a different firmware */ 830 if (sc->mac_ver != 0x2860 && 831 sc->mac_ver != 0x2872 && 832 sc->mac_ver != 0x3070) 833 fwname = "run-rt3071"; 834 else 835 fwname = "run-rt2870"; 836 837 if ((error = firmware_load("run", fwname, &ucode, &size)) != 0) { 838 aprint_error_dev(sc->sc_dev, 839 "error %d, could not read firmware %s\n", error, fwname); 840 return error; 841 } 842 if (size != 4096) { 843 aprint_error_dev(sc->sc_dev, 844 "invalid firmware size (should be 4KB)\n"); 845 firmware_free(ucode, size); 846 return EINVAL; 847 } 848 849 run_read(sc, RT2860_ASIC_VER_ID, &tmp); 850 /* write microcode image */ 851 run_write_region_1(sc, RT2870_FW_BASE, ucode, size); 852 firmware_free(ucode, size); 853 run_write(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff); 854 run_write(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff); 855 856 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 857 req.bRequest = RT2870_RESET; 858 USETW(req.wValue, 8); 859 USETW(req.wIndex, 0); 860 USETW(req.wLength, 0); 861 if ((error = usbd_do_request(sc->sc_udev, &req, NULL)) != 0) 862 return error; 863 864 usbd_delay_ms(sc->sc_udev, 10); 865 run_write(sc, RT2860_H2M_MAILBOX, 0); 866 if ((error = run_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0)) != 0) 867 return error; 868 869 /* wait until microcontroller is ready */ 870 for (ntries = 0; ntries < 1000; ntries++) { 871 if ((error = run_read(sc, RT2860_SYS_CTRL, &tmp)) != 0) 872 return error; 873 if (tmp & RT2860_MCU_READY) 874 break; 875 DELAY(1000); 876 } 877 if (ntries == 1000) { 878 aprint_error_dev(sc->sc_dev, 879 "timeout waiting for MCU to initialize\n"); 880 return ETIMEDOUT; 881 } 882 883 sc->sc_flags |= RUN_FWLOADED; 884 885 DPRINTF(("microcode successfully loaded after %d tries\n", ntries)); 886 return 0; 887 } 888 889 static int 890 run_reset(struct run_softc *sc) 891 { 892 usb_device_request_t req; 893 894 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 895 req.bRequest = RT2870_RESET; 896 USETW(req.wValue, 1); 897 USETW(req.wIndex, 0); 898 USETW(req.wLength, 0); 899 return usbd_do_request(sc->sc_udev, &req, NULL); 900 } 901 902 static int 903 run_read(struct run_softc *sc, uint16_t reg, uint32_t *val) 904 { 905 uint32_t tmp; 906 int error; 907 908 error = run_read_region_1(sc, reg, (uint8_t *)&tmp, sizeof(tmp)); 909 if (error == 0) 910 *val = le32toh(tmp); 911 else 912 *val = 0xffffffff; 913 return error; 914 } 915 916 static int 917 run_read_region_1(struct run_softc *sc, uint16_t reg, uint8_t *buf, int len) 918 { 919 usb_device_request_t req; 920 921 req.bmRequestType = UT_READ_VENDOR_DEVICE; 922 req.bRequest = RT2870_READ_REGION_1; 923 USETW(req.wValue, 0); 924 USETW(req.wIndex, reg); 925 USETW(req.wLength, len); 926 return usbd_do_request(sc->sc_udev, &req, buf); 927 } 928 929 static int 930 run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val) 931 { 932 usb_device_request_t req; 933 934 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 935 req.bRequest = RT2870_WRITE_2; 936 USETW(req.wValue, val); 937 USETW(req.wIndex, reg); 938 USETW(req.wLength, 0); 939 return usbd_do_request(sc->sc_udev, &req, NULL); 940 } 941 942 static int 943 run_write(struct run_softc *sc, uint16_t reg, uint32_t val) 944 { 945 int error; 946 947 if ((error = run_write_2(sc, reg, val & 0xffff)) == 0) 948 error = run_write_2(sc, reg + 2, val >> 16); 949 return error; 950 } 951 952 static int 953 run_write_region_1(struct run_softc *sc, uint16_t reg, const uint8_t *buf, 954 int len) 955 { 956 #if 1 957 int i, error = 0; 958 /* 959 * NB: the WRITE_REGION_1 command is not stable on RT2860. 960 * We thus issue multiple WRITE_2 commands instead. 961 */ 962 KASSERT((len & 1) == 0); 963 for (i = 0; i < len && error == 0; i += 2) 964 error = run_write_2(sc, reg + i, buf[i] | buf[i + 1] << 8); 965 return error; 966 #else 967 usb_device_request_t req; 968 969 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 970 req.bRequest = RT2870_WRITE_REGION_1; 971 USETW(req.wValue, 0); 972 USETW(req.wIndex, reg); 973 USETW(req.wLength, len); 974 return usbd_do_request(sc->sc_udev, &req, buf); 975 #endif 976 } 977 978 static int 979 run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int count) 980 { 981 int error = 0; 982 983 for (; count > 0 && error == 0; count--, reg += 4) 984 error = run_write(sc, reg, val); 985 return error; 986 } 987 988 /* Read 16-bit from eFUSE ROM (RT3070 only.) */ 989 static int 990 run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 991 { 992 uint32_t tmp; 993 uint16_t reg; 994 int error, ntries; 995 996 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 997 return error; 998 999 addr *= 2; 1000 /*- 1001 * Read one 16-byte block into registers EFUSE_DATA[0-3]: 1002 * DATA0: F E D C 1003 * DATA1: B A 9 8 1004 * DATA2: 7 6 5 4 1005 * DATA3: 3 2 1 0 1006 */ 1007 tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK); 1008 tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK; 1009 run_write(sc, RT3070_EFUSE_CTRL, tmp); 1010 for (ntries = 0; ntries < 100; ntries++) { 1011 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1012 return error; 1013 if (!(tmp & RT3070_EFSROM_KICK)) 1014 break; 1015 DELAY(2); 1016 } 1017 if (ntries == 100) 1018 return ETIMEDOUT; 1019 1020 if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK) { 1021 *val = 0xffff; /* address not found */ 1022 return 0; 1023 } 1024 /* determine to which 32-bit register our 16-bit word belongs */ 1025 reg = RT3070_EFUSE_DATA3 - (addr & 0xc); 1026 if ((error = run_read(sc, reg, &tmp)) != 0) 1027 return error; 1028 1029 *val = (addr & 2) ? tmp >> 16 : tmp & 0xffff; 1030 return 0; 1031 } 1032 1033 static int 1034 run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 1035 { 1036 usb_device_request_t req; 1037 uint16_t tmp; 1038 int error; 1039 1040 addr *= 2; 1041 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1042 req.bRequest = RT2870_EEPROM_READ; 1043 USETW(req.wValue, 0); 1044 USETW(req.wIndex, addr); 1045 USETW(req.wLength, sizeof(tmp)); 1046 error = usbd_do_request(sc->sc_udev, &req, &tmp); 1047 if (error == 0) 1048 *val = le16toh(tmp); 1049 else 1050 *val = 0xffff; 1051 return error; 1052 } 1053 1054 static __inline int 1055 run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val) 1056 { 1057 1058 /* either eFUSE ROM or EEPROM */ 1059 return sc->sc_srom_read(sc, addr, val); 1060 } 1061 1062 static int 1063 run_rt2870_rf_write(struct run_softc *sc, uint8_t reg, uint32_t val) 1064 { 1065 uint32_t tmp; 1066 int error, ntries; 1067 1068 for (ntries = 0; ntries < 10; ntries++) { 1069 if ((error = run_read(sc, RT2860_RF_CSR_CFG0, &tmp)) != 0) 1070 return error; 1071 if (!(tmp & RT2860_RF_REG_CTRL)) 1072 break; 1073 } 1074 if (ntries == 10) 1075 return ETIMEDOUT; 1076 1077 /* RF registers are 24-bit on the RT2860 */ 1078 tmp = RT2860_RF_REG_CTRL | 24 << RT2860_RF_REG_WIDTH_SHIFT | 1079 (val & 0x3fffff) << 2 | (reg & 3); 1080 return run_write(sc, RT2860_RF_CSR_CFG0, tmp); 1081 } 1082 1083 static int 1084 run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1085 { 1086 uint32_t tmp; 1087 int error, ntries; 1088 1089 for (ntries = 0; ntries < 100; ntries++) { 1090 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1091 return error; 1092 if (!(tmp & RT3070_RF_KICK)) 1093 break; 1094 } 1095 if (ntries == 100) 1096 return ETIMEDOUT; 1097 1098 tmp = RT3070_RF_KICK | reg << 8; 1099 if ((error = run_write(sc, RT3070_RF_CSR_CFG, tmp)) != 0) 1100 return error; 1101 1102 for (ntries = 0; ntries < 100; ntries++) { 1103 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1104 return error; 1105 if (!(tmp & RT3070_RF_KICK)) 1106 break; 1107 } 1108 if (ntries == 100) 1109 return ETIMEDOUT; 1110 1111 *val = tmp & 0xff; 1112 return 0; 1113 } 1114 1115 static int 1116 run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1117 { 1118 uint32_t tmp; 1119 int error, ntries; 1120 1121 for (ntries = 0; ntries < 10; ntries++) { 1122 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1123 return error; 1124 if (!(tmp & RT3070_RF_KICK)) 1125 break; 1126 } 1127 if (ntries == 10) 1128 return ETIMEDOUT; 1129 1130 tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val; 1131 return run_write(sc, RT3070_RF_CSR_CFG, tmp); 1132 } 1133 1134 static int 1135 run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1136 { 1137 uint32_t tmp; 1138 int ntries, error; 1139 1140 for (ntries = 0; ntries < 10; ntries++) { 1141 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1142 return error; 1143 if (!(tmp & RT2860_BBP_CSR_KICK)) 1144 break; 1145 } 1146 if (ntries == 10) 1147 return ETIMEDOUT; 1148 1149 tmp = RT2860_BBP_CSR_READ | RT2860_BBP_CSR_KICK | reg << 8; 1150 if ((error = run_write(sc, RT2860_BBP_CSR_CFG, tmp)) != 0) 1151 return error; 1152 1153 for (ntries = 0; ntries < 10; ntries++) { 1154 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1155 return error; 1156 if (!(tmp & RT2860_BBP_CSR_KICK)) 1157 break; 1158 } 1159 if (ntries == 10) 1160 return ETIMEDOUT; 1161 1162 *val = tmp & 0xff; 1163 return 0; 1164 } 1165 1166 static int 1167 run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1168 { 1169 uint32_t tmp; 1170 int ntries, error; 1171 1172 for (ntries = 0; ntries < 10; ntries++) { 1173 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1174 return error; 1175 if (!(tmp & RT2860_BBP_CSR_KICK)) 1176 break; 1177 } 1178 if (ntries == 10) 1179 return ETIMEDOUT; 1180 1181 tmp = RT2860_BBP_CSR_KICK | reg << 8 | val; 1182 return run_write(sc, RT2860_BBP_CSR_CFG, tmp); 1183 } 1184 1185 /* 1186 * Send a command to the 8051 microcontroller unit. 1187 */ 1188 static int 1189 run_mcu_cmd(struct run_softc *sc, uint8_t cmd, uint16_t arg) 1190 { 1191 uint32_t tmp; 1192 int error, ntries; 1193 1194 for (ntries = 0; ntries < 100; ntries++) { 1195 if ((error = run_read(sc, RT2860_H2M_MAILBOX, &tmp)) != 0) 1196 return error; 1197 if (!(tmp & RT2860_H2M_BUSY)) 1198 break; 1199 } 1200 if (ntries == 100) 1201 return ETIMEDOUT; 1202 1203 tmp = RT2860_H2M_BUSY | RT2860_TOKEN_NO_INTR << 16 | arg; 1204 if ((error = run_write(sc, RT2860_H2M_MAILBOX, tmp)) == 0) 1205 error = run_write(sc, RT2860_HOST_CMD, cmd); 1206 return error; 1207 } 1208 1209 /* 1210 * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word. 1211 * Used to adjust per-rate Tx power registers. 1212 */ 1213 static __inline uint32_t 1214 b4inc(uint32_t b32, int8_t delta) 1215 { 1216 int8_t i, b4; 1217 1218 for (i = 0; i < 8; i++) { 1219 b4 = b32 & 0xf; 1220 b4 += delta; 1221 if (b4 < 0) 1222 b4 = 0; 1223 else if (b4 > 0xf) 1224 b4 = 0xf; 1225 b32 = b32 >> 4 | b4 << 28; 1226 } 1227 return b32; 1228 } 1229 1230 static const char * 1231 run_get_rf(int rev) 1232 { 1233 switch (rev) { 1234 case RT2860_RF_2820: return "RT2820"; 1235 case RT2860_RF_2850: return "RT2850"; 1236 case RT2860_RF_2720: return "RT2720"; 1237 case RT2860_RF_2750: return "RT2750"; 1238 case RT3070_RF_3020: return "RT3020"; 1239 case RT3070_RF_2020: return "RT2020"; 1240 case RT3070_RF_3021: return "RT3021"; 1241 case RT3070_RF_3022: return "RT3022"; 1242 case RT3070_RF_3052: return "RT3052"; 1243 } 1244 return "unknown"; 1245 } 1246 1247 static int 1248 run_read_eeprom(struct run_softc *sc) 1249 { 1250 struct ieee80211com *ic = &sc->sc_ic; 1251 int8_t delta_2ghz, delta_5ghz; 1252 uint32_t tmp; 1253 uint16_t val; 1254 int ridx, ant, i; 1255 1256 /* check whether the ROM is eFUSE ROM or EEPROM */ 1257 sc->sc_srom_read = run_eeprom_read_2; 1258 if (sc->mac_ver >= 0x3070) { 1259 run_read(sc, RT3070_EFUSE_CTRL, &tmp); 1260 DPRINTF(("EFUSE_CTRL=0x%08x\n", tmp)); 1261 if (tmp & RT3070_SEL_EFUSE) 1262 sc->sc_srom_read = run_efuse_read_2; 1263 } 1264 1265 /* read ROM version */ 1266 run_srom_read(sc, RT2860_EEPROM_VERSION, &val); 1267 DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8)); 1268 1269 /* read MAC address */ 1270 run_srom_read(sc, RT2860_EEPROM_MAC01, &val); 1271 ic->ic_myaddr[0] = val & 0xff; 1272 ic->ic_myaddr[1] = val >> 8; 1273 run_srom_read(sc, RT2860_EEPROM_MAC23, &val); 1274 ic->ic_myaddr[2] = val & 0xff; 1275 ic->ic_myaddr[3] = val >> 8; 1276 run_srom_read(sc, RT2860_EEPROM_MAC45, &val); 1277 ic->ic_myaddr[4] = val & 0xff; 1278 ic->ic_myaddr[5] = val >> 8; 1279 1280 /* read vendor BBP settings */ 1281 for (i = 0; i < 10; i++) { 1282 run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val); 1283 sc->bbp[i].val = val & 0xff; 1284 sc->bbp[i].reg = val >> 8; 1285 DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val)); 1286 } 1287 if (sc->mac_ver >= 0x3071) { 1288 /* read vendor RF settings */ 1289 for (i = 0; i < 10; i++) { 1290 run_srom_read(sc, RT3071_EEPROM_RF_BASE + i, &val); 1291 sc->rf[i].val = val & 0xff; 1292 sc->rf[i].reg = val >> 8; 1293 DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg, 1294 sc->rf[i].val)); 1295 } 1296 } 1297 1298 /* read RF frequency offset from EEPROM */ 1299 run_srom_read(sc, RT2860_EEPROM_FREQ_LEDS, &val); 1300 sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0; 1301 DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff)); 1302 1303 if ((val >> 8) != 0xff) { 1304 /* read LEDs operating mode */ 1305 sc->leds = val >> 8; 1306 run_srom_read(sc, RT2860_EEPROM_LED1, &sc->led[0]); 1307 run_srom_read(sc, RT2860_EEPROM_LED2, &sc->led[1]); 1308 run_srom_read(sc, RT2860_EEPROM_LED3, &sc->led[2]); 1309 } else { 1310 /* broken EEPROM, use default settings */ 1311 sc->leds = 0x01; 1312 sc->led[0] = 0x5555; 1313 sc->led[1] = 0x2221; 1314 sc->led[2] = 0x5627; /* differs from RT2860 */ 1315 } 1316 DPRINTF(("EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n", 1317 sc->leds, sc->led[0], sc->led[1], sc->led[2])); 1318 1319 /* read RF information */ 1320 run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val); 1321 if (val == 0xffff) { 1322 DPRINTF(("invalid EEPROM antenna info, using default\n")); 1323 if (sc->mac_ver == 0x3572) { 1324 /* default to RF3052 2T2R */ 1325 sc->rf_rev = RT3070_RF_3052; 1326 sc->ntxchains = 2; 1327 sc->nrxchains = 2; 1328 } else if (sc->mac_ver >= 0x3070) { 1329 /* default to RF3020 1T1R */ 1330 sc->rf_rev = RT3070_RF_3020; 1331 sc->ntxchains = 1; 1332 sc->nrxchains = 1; 1333 } else { 1334 /* default to RF2820 1T2R */ 1335 sc->rf_rev = RT2860_RF_2820; 1336 sc->ntxchains = 1; 1337 sc->nrxchains = 2; 1338 } 1339 } else { 1340 sc->rf_rev = (val >> 8) & 0xf; 1341 sc->ntxchains = (val >> 4) & 0xf; 1342 sc->nrxchains = val & 0xf; 1343 } 1344 DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n", 1345 sc->rf_rev, sc->ntxchains, sc->nrxchains)); 1346 1347 run_srom_read(sc, RT2860_EEPROM_CONFIG, &val); 1348 DPRINTF(("EEPROM CFG 0x%04x\n", val)); 1349 /* check if driver should patch the DAC issue */ 1350 if ((val >> 8) != 0xff) 1351 sc->patch_dac = (val >> 15) & 1; 1352 if ((val & 0xff) != 0xff) { 1353 sc->ext_5ghz_lna = (val >> 3) & 1; 1354 sc->ext_2ghz_lna = (val >> 2) & 1; 1355 /* check if RF supports automatic Tx access gain control */ 1356 sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1; 1357 /* check if we have a hardware radio switch */ 1358 sc->rfswitch = val & 1; 1359 } 1360 1361 /* read power settings for 2GHz channels */ 1362 for (i = 0; i < 14; i += 2) { 1363 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val); 1364 sc->txpow1[i + 0] = (int8_t)(val & 0xff); 1365 sc->txpow1[i + 1] = (int8_t)(val >> 8); 1366 1367 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val); 1368 sc->txpow2[i + 0] = (int8_t)(val & 0xff); 1369 sc->txpow2[i + 1] = (int8_t)(val >> 8); 1370 } 1371 /* fix broken Tx power entries */ 1372 for (i = 0; i < 14; i++) { 1373 if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31) 1374 sc->txpow1[i] = 5; 1375 if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31) 1376 sc->txpow2[i] = 5; 1377 DPRINTF(("chan %d: power1=%d, power2=%d\n", 1378 rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i])); 1379 } 1380 /* read power settings for 5GHz channels */ 1381 for (i = 0; i < 40; i += 2) { 1382 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val); 1383 sc->txpow1[i + 14] = (int8_t)(val & 0xff); 1384 sc->txpow1[i + 15] = (int8_t)(val >> 8); 1385 1386 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val); 1387 sc->txpow2[i + 14] = (int8_t)(val & 0xff); 1388 sc->txpow2[i + 15] = (int8_t)(val >> 8); 1389 } 1390 /* fix broken Tx power entries */ 1391 for (i = 0; i < 40; i++) { 1392 if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15) 1393 sc->txpow1[14 + i] = 5; 1394 if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15) 1395 sc->txpow2[14 + i] = 5; 1396 DPRINTF(("chan %d: power1=%d, power2=%d\n", 1397 rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i], 1398 sc->txpow2[14 + i])); 1399 } 1400 1401 /* read Tx power compensation for each Tx rate */ 1402 run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val); 1403 delta_2ghz = delta_5ghz = 0; 1404 if ((val & 0xff) != 0xff && (val & 0x80)) { 1405 delta_2ghz = val & 0xf; 1406 if (!(val & 0x40)) /* negative number */ 1407 delta_2ghz = -delta_2ghz; 1408 } 1409 val >>= 8; 1410 if ((val & 0xff) != 0xff && (val & 0x80)) { 1411 delta_5ghz = val & 0xf; 1412 if (!(val & 0x40)) /* negative number */ 1413 delta_5ghz = -delta_5ghz; 1414 } 1415 DPRINTF(("power compensation=%d (2GHz), %d (5GHz)\n", 1416 delta_2ghz, delta_5ghz)); 1417 1418 for (ridx = 0; ridx < 5; ridx++) { 1419 uint32_t reg; 1420 1421 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val); 1422 reg = val; 1423 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val); 1424 reg |= (uint32_t)val << 16; 1425 1426 sc->txpow20mhz[ridx] = reg; 1427 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz); 1428 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz); 1429 1430 DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, " 1431 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx], 1432 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx])); 1433 } 1434 1435 /* read RSSI offsets and LNA gains from EEPROM */ 1436 run_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ, &val); 1437 sc->rssi_2ghz[0] = val & 0xff; /* Ant A */ 1438 sc->rssi_2ghz[1] = val >> 8; /* Ant B */ 1439 run_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ, &val); 1440 if (sc->mac_ver >= 0x3070) { 1441 /* 1442 * On RT3070 chips (limited to 2 Rx chains), this ROM 1443 * field contains the Tx mixer gain for the 2GHz band. 1444 */ 1445 if ((val & 0xff) != 0xff) 1446 sc->txmixgain_2ghz = val & 0x7; 1447 DPRINTF(("tx mixer gain=%u (2GHz)\n", sc->txmixgain_2ghz)); 1448 } else { 1449 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */ 1450 } 1451 sc->lna[2] = val >> 8; /* channel group 2 */ 1452 1453 run_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ, &val); 1454 sc->rssi_5ghz[0] = val & 0xff; /* Ant A */ 1455 sc->rssi_5ghz[1] = val >> 8; /* Ant B */ 1456 run_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ, &val); 1457 if (sc->mac_ver == 0x3572) { 1458 /* 1459 * On RT3572 chips (limited to 2 Rx chains), this ROM 1460 * field contains the Tx mixer gain for the 5GHz band. 1461 */ 1462 if ((val & 0xff) != 0xff) 1463 sc->txmixgain_5ghz = val & 0x7; 1464 DPRINTF(("tx mixer gain=%u (5GHz)\n", sc->txmixgain_5ghz)); 1465 } else { 1466 sc->rssi_5ghz[2] = val & 0xff; /* Ant C */ 1467 } 1468 sc->lna[3] = val >> 8; /* channel group 3 */ 1469 1470 run_srom_read(sc, RT2860_EEPROM_LNA, &val); 1471 sc->lna[0] = val & 0xff; /* channel group 0 */ 1472 sc->lna[1] = val >> 8; /* channel group 1 */ 1473 1474 /* fix broken 5GHz LNA entries */ 1475 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) { 1476 DPRINTF(("invalid LNA for channel group %d\n", 2)); 1477 sc->lna[2] = sc->lna[1]; 1478 } 1479 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) { 1480 DPRINTF(("invalid LNA for channel group %d\n", 3)); 1481 sc->lna[3] = sc->lna[1]; 1482 } 1483 1484 /* fix broken RSSI offset entries */ 1485 for (ant = 0; ant < 3; ant++) { 1486 if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) { 1487 DPRINTF(("invalid RSSI%d offset: %d (2GHz)\n", 1488 ant + 1, sc->rssi_2ghz[ant])); 1489 sc->rssi_2ghz[ant] = 0; 1490 } 1491 if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) { 1492 DPRINTF(("invalid RSSI%d offset: %d (5GHz)\n", 1493 ant + 1, sc->rssi_5ghz[ant])); 1494 sc->rssi_5ghz[ant] = 0; 1495 } 1496 } 1497 return 0; 1498 } 1499 1500 static struct ieee80211_node * 1501 run_node_alloc(struct ieee80211_node_table *nt) 1502 { 1503 struct run_node *rn = 1504 malloc(sizeof(struct run_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1505 return rn ? &rn->ni : NULL; 1506 } 1507 1508 static int 1509 run_media_change(struct ifnet *ifp) 1510 { 1511 struct run_softc *sc = ifp->if_softc; 1512 struct ieee80211com *ic = &sc->sc_ic; 1513 uint8_t rate, ridx; 1514 int error; 1515 1516 error = ieee80211_media_change(ifp); 1517 if (error != ENETRESET) 1518 return error; 1519 1520 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1521 rate = ic->ic_sup_rates[ic->ic_curmode]. 1522 rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL; 1523 for (ridx = 0; ridx <= RT2860_RIDX_MAX; ridx++) 1524 if (rt2860_rates[ridx].rate == rate) 1525 break; 1526 sc->fixed_ridx = ridx; 1527 } 1528 1529 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1530 run_init(ifp); 1531 1532 return 0; 1533 } 1534 1535 static void 1536 run_next_scan(void *arg) 1537 { 1538 struct run_softc *sc = arg; 1539 1540 if (sc->sc_ic.ic_state == IEEE80211_S_SCAN) 1541 ieee80211_next_scan(&sc->sc_ic); 1542 } 1543 1544 static void 1545 run_task(void *arg) 1546 { 1547 struct run_softc *sc = arg; 1548 struct run_host_cmd_ring *ring = &sc->cmdq; 1549 struct run_host_cmd *cmd; 1550 int s; 1551 1552 /* process host commands */ 1553 s = splusb(); 1554 while (ring->next != ring->cur) { 1555 cmd = &ring->cmd[ring->next]; 1556 splx(s); 1557 /* callback */ 1558 cmd->cb(sc, cmd->data); 1559 s = splusb(); 1560 ring->queued--; 1561 ring->next = (ring->next + 1) % RUN_HOST_CMD_RING_COUNT; 1562 } 1563 wakeup(ring); 1564 splx(s); 1565 } 1566 1567 static void 1568 run_do_async(struct run_softc *sc, void (*cb)(struct run_softc *, void *), 1569 void *arg, int len) 1570 { 1571 struct run_host_cmd_ring *ring = &sc->cmdq; 1572 struct run_host_cmd *cmd; 1573 int s; 1574 1575 if (sc->sc_flags & RUN_DETACHING) 1576 return; 1577 1578 s = splusb(); 1579 cmd = &ring->cmd[ring->cur]; 1580 cmd->cb = cb; 1581 KASSERT(len <= sizeof(cmd->data)); 1582 memcpy(cmd->data, arg, len); 1583 ring->cur = (ring->cur + 1) % RUN_HOST_CMD_RING_COUNT; 1584 1585 /* if there is no pending command already, schedule a task */ 1586 if (++ring->queued == 1) 1587 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 1588 splx(s); 1589 } 1590 1591 static int 1592 run_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1593 { 1594 struct run_softc *sc = ic->ic_ifp->if_softc; 1595 struct run_cmd_newstate cmd; 1596 1597 callout_stop(&sc->scan_to); 1598 callout_stop(&sc->calib_to); 1599 1600 /* do it in a process context */ 1601 cmd.state = nstate; 1602 cmd.arg = arg; 1603 run_do_async(sc, run_newstate_cb, &cmd, sizeof(cmd)); 1604 return 0; 1605 } 1606 1607 static void 1608 run_newstate_cb(struct run_softc *sc, void *arg) 1609 { 1610 struct run_cmd_newstate *cmd = arg; 1611 struct ifnet *ifp = &sc->sc_if; 1612 struct ieee80211com *ic = &sc->sc_ic; 1613 enum ieee80211_state ostate; 1614 struct ieee80211_node *ni; 1615 uint32_t tmp, sta[3]; 1616 uint8_t wcid; 1617 int s; 1618 1619 s = splnet(); 1620 ostate = ic->ic_state; 1621 1622 if (ostate == IEEE80211_S_RUN) { 1623 /* turn link LED off */ 1624 run_set_leds(sc, RT2860_LED_RADIO); 1625 } 1626 1627 switch (cmd->state) { 1628 case IEEE80211_S_INIT: 1629 if (ostate == IEEE80211_S_RUN) { 1630 /* abort TSF synchronization */ 1631 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 1632 run_write(sc, RT2860_BCN_TIME_CFG, 1633 tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 1634 RT2860_TBTT_TIMER_EN)); 1635 } 1636 break; 1637 1638 case IEEE80211_S_SCAN: 1639 run_set_chan(sc, ic->ic_curchan); 1640 callout_schedule(&sc->scan_to, hz / 5); 1641 break; 1642 1643 case IEEE80211_S_AUTH: 1644 case IEEE80211_S_ASSOC: 1645 run_set_chan(sc, ic->ic_curchan); 1646 break; 1647 1648 case IEEE80211_S_RUN: 1649 run_set_chan(sc, ic->ic_curchan); 1650 1651 ni = ic->ic_bss; 1652 1653 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1654 run_updateslot(ifp); 1655 run_enable_mrr(sc); 1656 run_set_txpreamble(sc); 1657 run_set_basicrates(sc); 1658 run_set_bssid(sc, ni->ni_bssid); 1659 } 1660 #ifndef IEEE80211_STA_ONLY 1661 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 1662 ic->ic_opmode == IEEE80211_M_IBSS) 1663 (void)run_setup_beacon(sc); 1664 #endif 1665 if (ic->ic_opmode == IEEE80211_M_STA) { 1666 /* add BSS entry to the WCID table */ 1667 wcid = RUN_AID2WCID(ni->ni_associd); 1668 run_write_region_1(sc, RT2860_WCID_ENTRY(wcid), 1669 ni->ni_macaddr, IEEE80211_ADDR_LEN); 1670 1671 /* fake a join to init the tx rate */ 1672 run_newassoc(ni, 1); 1673 } 1674 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1675 run_enable_tsf_sync(sc); 1676 1677 /* clear statistic registers used by AMRR */ 1678 run_read_region_1(sc, RT2860_TX_STA_CNT0, 1679 (uint8_t *)sta, sizeof(sta)); 1680 /* start calibration timer */ 1681 callout_schedule(&sc->calib_to, hz); 1682 } 1683 1684 /* turn link LED on */ 1685 run_set_leds(sc, RT2860_LED_RADIO | 1686 (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan) ? 1687 RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ)); 1688 break; 1689 } 1690 (void)sc->sc_newstate(ic, cmd->state, cmd->arg); 1691 splx(s); 1692 } 1693 1694 static int 1695 run_updateedca(struct ieee80211com *ic) 1696 { 1697 1698 /* do it in a process context */ 1699 run_do_async(ic->ic_ifp->if_softc, run_updateedca_cb, NULL, 0); 1700 return 0; 1701 } 1702 1703 /* ARGSUSED */ 1704 static void 1705 run_updateedca_cb(struct run_softc *sc, void *arg) 1706 { 1707 struct ieee80211com *ic = &sc->sc_ic; 1708 int s, aci; 1709 1710 s = splnet(); 1711 /* update MAC TX configuration registers */ 1712 for (aci = 0; aci < WME_NUM_AC; aci++) { 1713 run_write(sc, RT2860_EDCA_AC_CFG(aci), 1714 ic->ic_wme.wme_params[aci].wmep_logcwmax << 16 | 1715 ic->ic_wme.wme_params[aci].wmep_logcwmin << 12 | 1716 ic->ic_wme.wme_params[aci].wmep_aifsn << 8 | 1717 ic->ic_wme.wme_params[aci].wmep_txopLimit); 1718 } 1719 1720 /* update SCH/DMA registers too */ 1721 run_write(sc, RT2860_WMM_AIFSN_CFG, 1722 ic->ic_wme.wme_params[WME_AC_VO].wmep_aifsn << 12 | 1723 ic->ic_wme.wme_params[WME_AC_VI].wmep_aifsn << 8 | 1724 ic->ic_wme.wme_params[WME_AC_BK].wmep_aifsn << 4 | 1725 ic->ic_wme.wme_params[WME_AC_BE].wmep_aifsn); 1726 run_write(sc, RT2860_WMM_CWMIN_CFG, 1727 ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmin << 12 | 1728 ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmin << 8 | 1729 ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmin << 4 | 1730 ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmin); 1731 run_write(sc, RT2860_WMM_CWMAX_CFG, 1732 ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmax << 12 | 1733 ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmax << 8 | 1734 ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmax << 4 | 1735 ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmax); 1736 run_write(sc, RT2860_WMM_TXOP0_CFG, 1737 ic->ic_wme.wme_params[WME_AC_BK].wmep_txopLimit << 16 | 1738 ic->ic_wme.wme_params[WME_AC_BE].wmep_txopLimit); 1739 run_write(sc, RT2860_WMM_TXOP1_CFG, 1740 ic->ic_wme.wme_params[WME_AC_VO].wmep_txopLimit << 16 | 1741 ic->ic_wme.wme_params[WME_AC_VI].wmep_txopLimit); 1742 splx(s); 1743 } 1744 1745 #ifdef RUN_HWCRYPTO 1746 static int 1747 run_set_key(struct ieee80211com *ic, const struct ieee80211_key *k, 1748 const uint8_t *mac) 1749 { 1750 struct run_softc *sc = ic->ic_ifp->if_softc; 1751 struct ieee80211_node *ni = ic->ic_bss; 1752 struct run_cmd_key cmd; 1753 1754 /* do it in a process context */ 1755 cmd.key = *k; 1756 cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1757 run_do_async(sc, run_set_key_cb, &cmd, sizeof(cmd)); 1758 return 1; 1759 } 1760 1761 static void 1762 run_set_key_cb(struct run_softc *sc, void *arg) 1763 { 1764 #ifndef IEEE80211_STA_ONLY 1765 struct ieee80211com *ic = &sc->sc_ic; 1766 #endif 1767 struct run_cmd_key *cmd = arg; 1768 struct ieee80211_key *k = &cmd->key; 1769 uint32_t attr; 1770 uint16_t base; 1771 uint8_t mode, wcid, iv[8]; 1772 1773 /* map net80211 cipher to RT2860 security mode */ 1774 switch (k->wk_cipher->ic_cipher) { 1775 case IEEE80211_CIPHER_WEP: 1776 k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1777 if (k->wk_keylen == 5) 1778 mode = RT2860_MODE_WEP40; 1779 else 1780 mode = RT2860_MODE_WEP104; 1781 break; 1782 case IEEE80211_CIPHER_TKIP: 1783 mode = RT2860_MODE_TKIP; 1784 break; 1785 case IEEE80211_CIPHER_AES_CCM: 1786 mode = RT2860_MODE_AES_CCMP; 1787 break; 1788 default: 1789 return; 1790 } 1791 1792 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1793 wcid = 0; /* NB: update WCID0 for group keys */ 1794 base = RT2860_SKEY(0, k->wk_keyix); 1795 } else { 1796 wcid = RUN_AID2WCID(cmd->associd); 1797 base = RT2860_PKEY(wcid); 1798 } 1799 1800 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1801 run_write_region_1(sc, base, k->wk_key, 16); 1802 #ifndef IEEE80211_STA_ONLY 1803 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1804 run_write_region_1(sc, base + 16, &k->wk_key[16], 8); 1805 run_write_region_1(sc, base + 24, &k->wk_key[24], 8); 1806 } else 1807 #endif 1808 { 1809 run_write_region_1(sc, base + 16, &k->wk_key[24], 8); 1810 run_write_region_1(sc, base + 24, &k->wk_key[16], 8); 1811 } 1812 } else { 1813 /* roundup len to 16-bit: XXX fix write_region_1() instead */ 1814 run_write_region_1(sc, base, k->wk_key, 1815 (k->wk_keylen + 1) & ~1); 1816 } 1817 1818 if (!(k->wk_flags & IEEE80211_KEY_GROUP) || 1819 (k->wk_flags & IEEE80211_KEY_XMIT)) { 1820 /* set initial packet number in IV+EIV */ 1821 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) { 1822 memset(iv, 0, sizeof(iv)); 1823 iv[3] = sc->sc_ic.ic_crypto.cs_def_txkey << 6; 1824 } else { 1825 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1826 iv[0] = k->wk_keytsc >> 8; 1827 iv[1] = (iv[0] | 0x20) & 0x7f; 1828 iv[2] = k->wk_keytsc; 1829 } else /* CCMP */ { 1830 iv[0] = k->wk_keytsc; 1831 iv[1] = k->wk_keytsc >> 8; 1832 iv[2] = 0; 1833 } 1834 iv[3] = k->wk_keyix << 6 | IEEE80211_WEP_EXTIV; 1835 iv[4] = k->wk_keytsc >> 16; 1836 iv[5] = k->wk_keytsc >> 24; 1837 iv[6] = k->wk_keytsc >> 32; 1838 iv[7] = k->wk_keytsc >> 40; 1839 } 1840 run_write_region_1(sc, RT2860_IVEIV(wcid), iv, 8); 1841 } 1842 1843 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1844 /* install group key */ 1845 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1846 attr &= ~(0xf << (k->wk_keyix * 4)); 1847 attr |= mode << (k->wk_keyix * 4); 1848 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1849 } else { 1850 /* install pairwise key */ 1851 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1852 attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN; 1853 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1854 } 1855 } 1856 1857 static int 1858 run_delete_key(struct ieee80211com *ic, const struct ieee80211_key *k) 1859 { 1860 struct run_softc *sc = ic->ic_ifp->if_softc; 1861 struct ieee80211_node *ni = ic->ic_bss; 1862 struct run_cmd_key cmd; 1863 1864 /* do it in a process context */ 1865 cmd.key = *k; 1866 cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1867 run_do_async(sc, run_delete_key_cb, &cmd, sizeof(cmd)); 1868 return 1; 1869 } 1870 1871 static void 1872 run_delete_key_cb(struct run_softc *sc, void *arg) 1873 { 1874 struct run_cmd_key *cmd = arg; 1875 struct ieee80211_key *k = &cmd->key; 1876 uint32_t attr; 1877 uint8_t wcid; 1878 1879 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) 1880 k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1881 1882 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1883 /* remove group key */ 1884 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1885 attr &= ~(0xf << (k->wk_keyix * 4)); 1886 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1887 1888 } else { 1889 /* remove pairwise key */ 1890 wcid = RUN_AID2WCID(cmd->associd); 1891 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1892 attr &= ~0xf; 1893 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1894 } 1895 } 1896 #endif 1897 1898 static void 1899 run_calibrate_to(void *arg) 1900 { 1901 1902 /* do it in a process context */ 1903 run_do_async(arg, run_calibrate_cb, NULL, 0); 1904 /* next timeout will be rescheduled in the calibration task */ 1905 } 1906 1907 /* ARGSUSED */ 1908 static void 1909 run_calibrate_cb(struct run_softc *sc, void *arg) 1910 { 1911 struct ifnet *ifp = &sc->sc_if; 1912 uint32_t sta[3]; 1913 int s, error; 1914 1915 /* read statistic counters (clear on read) and update AMRR state */ 1916 error = run_read_region_1(sc, RT2860_TX_STA_CNT0, (uint8_t *)sta, 1917 sizeof(sta)); 1918 if (error != 0) 1919 goto skip; 1920 1921 DPRINTF(("retrycnt=%d txcnt=%d failcnt=%d\n", 1922 le32toh(sta[1]) >> 16, le32toh(sta[1]) & 0xffff, 1923 le32toh(sta[0]) & 0xffff)); 1924 1925 s = splnet(); 1926 /* count failed TX as errors */ 1927 ifp->if_oerrors += le32toh(sta[0]) & 0xffff; 1928 1929 sc->amn.amn_retrycnt = 1930 (le32toh(sta[0]) & 0xffff) + /* failed TX count */ 1931 (le32toh(sta[1]) >> 16); /* TX retransmission count */ 1932 1933 sc->amn.amn_txcnt = 1934 sc->amn.amn_retrycnt + 1935 (le32toh(sta[1]) & 0xffff); /* successful TX count */ 1936 1937 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 1938 splx(s); 1939 1940 skip: callout_schedule(&sc->calib_to, hz); 1941 } 1942 1943 static void 1944 run_newassoc(struct ieee80211_node *ni, int isnew) 1945 { 1946 struct run_softc *sc = ni->ni_ic->ic_ifp->if_softc; 1947 struct run_node *rn = (void *)ni; 1948 struct ieee80211_rateset *rs = &ni->ni_rates; 1949 uint8_t rate; 1950 int ridx, i, j; 1951 1952 DPRINTF(("new assoc isnew=%d addr=%s\n", 1953 isnew, ether_sprintf(ni->ni_macaddr))); 1954 1955 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 1956 /* start at lowest available bit-rate, AMRR will raise */ 1957 ni->ni_txrate = 0; 1958 1959 for (i = 0; i < rs->rs_nrates; i++) { 1960 rate = rs->rs_rates[i] & IEEE80211_RATE_VAL; 1961 /* convert 802.11 rate to hardware rate index */ 1962 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 1963 if (rt2860_rates[ridx].rate == rate) 1964 break; 1965 rn->ridx[i] = ridx; 1966 /* determine rate of control response frames */ 1967 for (j = i; j >= 0; j--) { 1968 if ((rs->rs_rates[j] & IEEE80211_RATE_BASIC) && 1969 rt2860_rates[rn->ridx[i]].phy == 1970 rt2860_rates[rn->ridx[j]].phy) 1971 break; 1972 } 1973 if (j >= 0) { 1974 rn->ctl_ridx[i] = rn->ridx[j]; 1975 } else { 1976 /* no basic rate found, use mandatory one */ 1977 rn->ctl_ridx[i] = rt2860_rates[ridx].ctl_ridx; 1978 } 1979 DPRINTF(("rate=0x%02x ridx=%d ctl_ridx=%d\n", 1980 rs->rs_rates[i], rn->ridx[i], rn->ctl_ridx[i])); 1981 } 1982 } 1983 1984 /* 1985 * Return the Rx chain with the highest RSSI for a given frame. 1986 */ 1987 static __inline uint8_t 1988 run_maxrssi_chain(struct run_softc *sc, const struct rt2860_rxwi *rxwi) 1989 { 1990 uint8_t rxchain = 0; 1991 1992 if (sc->nrxchains > 1) { 1993 if (rxwi->rssi[1] > rxwi->rssi[rxchain]) 1994 rxchain = 1; 1995 if (sc->nrxchains > 2) 1996 if (rxwi->rssi[2] > rxwi->rssi[rxchain]) 1997 rxchain = 2; 1998 } 1999 return rxchain; 2000 } 2001 2002 static void 2003 run_rx_frame(struct run_softc *sc, uint8_t *buf, int dmalen) 2004 { 2005 struct ieee80211com *ic = &sc->sc_ic; 2006 struct ifnet *ifp = &sc->sc_if; 2007 struct ieee80211_frame *wh; 2008 struct ieee80211_node *ni; 2009 struct rt2870_rxd *rxd; 2010 struct rt2860_rxwi *rxwi; 2011 struct mbuf *m; 2012 uint32_t flags; 2013 uint16_t len, phy; 2014 uint8_t ant, rssi; 2015 int s; 2016 #ifdef RUN_HWCRYPTO 2017 int decrypted = 0; 2018 #endif 2019 2020 rxwi = (struct rt2860_rxwi *)buf; 2021 len = le16toh(rxwi->len) & 0xfff; 2022 if (__predict_false(len > dmalen)) { 2023 DPRINTF(("bad RXWI length %u > %u\n", len, dmalen)); 2024 return; 2025 } 2026 /* Rx descriptor is located at the end */ 2027 rxd = (struct rt2870_rxd *)(buf + dmalen); 2028 flags = le32toh(rxd->flags); 2029 2030 if (__predict_false(flags & (RT2860_RX_CRCERR | RT2860_RX_ICVERR))) { 2031 ifp->if_ierrors++; 2032 return; 2033 } 2034 2035 wh = (struct ieee80211_frame *)(rxwi + 1); 2036 #ifdef RUN_HWCRYPTO 2037 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2038 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2039 decrypted = 1; 2040 } 2041 #endif 2042 2043 if (__predict_false((flags & RT2860_RX_MICERR))) { 2044 /* report MIC failures to net80211 for TKIP */ 2045 ieee80211_notify_michael_failure(ic, wh, 0/* XXX */); 2046 ifp->if_ierrors++; 2047 return; 2048 } 2049 2050 if (flags & RT2860_RX_L2PAD) { 2051 u_int hdrlen = ieee80211_hdrspace(ic, wh); 2052 ovbcopy(wh, (uint8_t *)wh + 2, hdrlen); 2053 wh = (struct ieee80211_frame *)((uint8_t *)wh + 2); 2054 } 2055 2056 /* could use m_devget but net80211 wants contig mgmt frames */ 2057 MGETHDR(m, M_DONTWAIT, MT_DATA); 2058 if (__predict_false(m == NULL)) { 2059 ifp->if_ierrors++; 2060 return; 2061 } 2062 if (len > MHLEN) { 2063 MCLGET(m, M_DONTWAIT); 2064 if (__predict_false(!(m->m_flags & M_EXT))) { 2065 ifp->if_ierrors++; 2066 m_freem(m); 2067 return; 2068 } 2069 } 2070 /* finalize mbuf */ 2071 m->m_pkthdr.rcvif = ifp; 2072 memcpy(mtod(m, void *), wh, len); 2073 m->m_pkthdr.len = m->m_len = len; 2074 2075 ant = run_maxrssi_chain(sc, rxwi); 2076 rssi = rxwi->rssi[ant]; 2077 2078 if (__predict_false(sc->sc_drvbpf != NULL)) { 2079 struct run_rx_radiotap_header *tap = &sc->sc_rxtap; 2080 2081 tap->wr_flags = 0; 2082 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 2083 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2084 tap->wr_antsignal = rssi; 2085 tap->wr_antenna = ant; 2086 tap->wr_dbm_antsignal = run_rssi2dbm(sc, rssi, ant); 2087 tap->wr_rate = 2; /* in case it can't be found below */ 2088 phy = le16toh(rxwi->phy); 2089 switch (phy & RT2860_PHY_MODE) { 2090 case RT2860_PHY_CCK: 2091 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) { 2092 case 0: tap->wr_rate = 2; break; 2093 case 1: tap->wr_rate = 4; break; 2094 case 2: tap->wr_rate = 11; break; 2095 case 3: tap->wr_rate = 22; break; 2096 } 2097 if (phy & RT2860_PHY_SHPRE) 2098 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2099 break; 2100 case RT2860_PHY_OFDM: 2101 switch (phy & RT2860_PHY_MCS) { 2102 case 0: tap->wr_rate = 12; break; 2103 case 1: tap->wr_rate = 18; break; 2104 case 2: tap->wr_rate = 24; break; 2105 case 3: tap->wr_rate = 36; break; 2106 case 4: tap->wr_rate = 48; break; 2107 case 5: tap->wr_rate = 72; break; 2108 case 6: tap->wr_rate = 96; break; 2109 case 7: tap->wr_rate = 108; break; 2110 } 2111 break; 2112 } 2113 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 2114 } 2115 2116 s = splnet(); 2117 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2118 #ifdef RUN_HWCRYPTO 2119 if (decrypted) { 2120 uint32_t icflags = ic->ic_flags; 2121 2122 ic->ic_flags &= ~IEEE80211_F_DROPUNENC; /* XXX */ 2123 ieee80211_input(ic, m, ni, rssi, 0); 2124 ic->ic_flags = icflags; 2125 } else 2126 #endif 2127 ieee80211_input(ic, m, ni, rssi, 0); 2128 2129 /* node is no longer needed */ 2130 ieee80211_free_node(ni); 2131 2132 /* 2133 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 2134 * without calling if_start(). 2135 */ 2136 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 2137 run_start(ifp); 2138 2139 splx(s); 2140 } 2141 2142 static void 2143 run_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 2144 { 2145 struct run_rx_data *data = priv; 2146 struct run_softc *sc = data->sc; 2147 uint8_t *buf; 2148 uint32_t dmalen; 2149 int xferlen; 2150 2151 if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2152 DPRINTF(("RX status=%d\n", status)); 2153 if (status == USBD_STALLED) 2154 usbd_clear_endpoint_stall_async(sc->rxq.pipeh); 2155 if (status != USBD_CANCELLED) 2156 goto skip; 2157 return; 2158 } 2159 usbd_get_xfer_status(xfer, NULL, NULL, &xferlen, NULL); 2160 2161 if (__predict_false(xferlen < (int)(sizeof(uint32_t) + 2162 sizeof(struct rt2860_rxwi) + sizeof(struct rt2870_rxd)))) { 2163 DPRINTF(("xfer too short %d\n", xferlen)); 2164 goto skip; 2165 } 2166 2167 /* HW can aggregate multiple 802.11 frames in a single USB xfer */ 2168 buf = data->buf; 2169 while (xferlen > 8) { 2170 dmalen = le32toh(*(uint32_t *)buf) & 0xffff; 2171 2172 if (__predict_false(dmalen == 0 || (dmalen & 3) != 0)) { 2173 DPRINTF(("bad DMA length %u (%x)\n", dmalen, dmalen)); 2174 break; 2175 } 2176 if (__predict_false(dmalen + 8 > (uint32_t)xferlen)) { 2177 DPRINTF(("bad DMA length %u > %d\n", 2178 dmalen + 8, xferlen)); 2179 break; 2180 } 2181 run_rx_frame(sc, buf + sizeof(uint32_t), dmalen); 2182 buf += dmalen + 8; 2183 xferlen -= dmalen + 8; 2184 } 2185 2186 skip: /* setup a new transfer */ 2187 usbd_setup_xfer(xfer, data, data->buf, RUN_MAX_RXSZ, 2188 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, run_rxeof); 2189 (void)usbd_transfer(data->xfer); 2190 } 2191 2192 static void 2193 run_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 2194 { 2195 struct run_tx_data *data = priv; 2196 struct run_softc *sc = data->sc; 2197 struct run_tx_ring *txq = &sc->txq[data->qid]; 2198 struct ifnet *ifp = &sc->sc_if; 2199 int s; 2200 2201 if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2202 DPRINTF(("TX status=%d\n", status)); 2203 if (status == USBD_STALLED) 2204 usbd_clear_endpoint_stall_async(txq->pipeh); 2205 ifp->if_oerrors++; 2206 return; 2207 } 2208 2209 s = splnet(); 2210 sc->sc_tx_timer = 0; 2211 ifp->if_opackets++; 2212 if (--txq->queued < RUN_TX_RING_COUNT) { 2213 sc->qfullmsk &= ~(1 << data->qid); 2214 ifp->if_flags &= ~IFF_OACTIVE; 2215 run_start(ifp); 2216 } 2217 splx(s); 2218 } 2219 2220 static int 2221 run_tx(struct run_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 2222 { 2223 struct ieee80211com *ic = &sc->sc_ic; 2224 struct run_node *rn = (void *)ni; 2225 struct ieee80211_frame *wh; 2226 #ifndef RUN_HWCRYPTO 2227 struct ieee80211_key *k; 2228 #endif 2229 struct run_tx_ring *ring; 2230 struct run_tx_data *data; 2231 struct rt2870_txd *txd; 2232 struct rt2860_txwi *txwi; 2233 uint16_t dur; 2234 uint8_t type, mcs, tid, qid, qos = 0; 2235 int error, hasqos, ridx, ctl_ridx, xferlen; 2236 2237 wh = mtod(m, struct ieee80211_frame *); 2238 2239 #ifndef RUN_HWCRYPTO 2240 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2241 k = ieee80211_crypto_encap(ic, ni, m); 2242 if (k == NULL) { 2243 m_freem(m); 2244 return ENOBUFS; 2245 } 2246 2247 /* packet header may have moved, reset our local pointer */ 2248 wh = mtod(m, struct ieee80211_frame *); 2249 } 2250 #endif 2251 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2252 2253 if ((hasqos = ieee80211_has_qos(wh))) { 2254 qos = ((struct ieee80211_qosframe *)wh)->i_qos[0]; 2255 tid = qos & IEEE80211_QOS_TID; 2256 qid = TID_TO_WME_AC(tid); 2257 } else { 2258 tid = 0; 2259 qid = WME_AC_BE; 2260 } 2261 ring = &sc->txq[qid]; 2262 data = &ring->data[ring->cur]; 2263 2264 /* pickup a rate index */ 2265 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 2266 type != IEEE80211_FC0_TYPE_DATA) { 2267 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 2268 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 2269 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2270 } else if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 2271 ridx = sc->fixed_ridx; 2272 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2273 } else { 2274 ridx = rn->ridx[ni->ni_txrate]; 2275 ctl_ridx = rn->ctl_ridx[ni->ni_txrate]; 2276 } 2277 2278 /* get MCS code from rate index */ 2279 mcs = rt2860_rates[ridx].mcs; 2280 2281 xferlen = sizeof(*txwi) + m->m_pkthdr.len; 2282 /* roundup to 32-bit alignment */ 2283 xferlen = (xferlen + 3) & ~3; 2284 2285 txd = (struct rt2870_txd *)data->buf; 2286 txd->flags = RT2860_TX_QSEL_EDCA; 2287 txd->len = htole16(xferlen); 2288 2289 /* setup TX Wireless Information */ 2290 txwi = (struct rt2860_txwi *)(txd + 1); 2291 txwi->flags = 0; 2292 txwi->xflags = hasqos ? 0 : RT2860_TX_NSEQ; 2293 txwi->wcid = (type == IEEE80211_FC0_TYPE_DATA) ? 2294 RUN_AID2WCID(ni->ni_associd) : 0xff; 2295 txwi->len = htole16(m->m_pkthdr.len); 2296 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) { 2297 txwi->phy = htole16(RT2860_PHY_CCK); 2298 if (ridx != RT2860_RIDX_CCK1 && 2299 (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 2300 mcs |= RT2860_PHY_SHPRE; 2301 } else 2302 txwi->phy = htole16(RT2860_PHY_OFDM); 2303 txwi->phy |= htole16(mcs); 2304 2305 txwi->txop = RT2860_TX_TXOP_BACKOFF; 2306 2307 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 2308 (!hasqos || (qos & IEEE80211_QOS_ACKPOLICY) != 2309 IEEE80211_QOS_ACKPOLICY_NOACK)) { 2310 txwi->xflags |= RT2860_TX_ACK; 2311 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 2312 dur = rt2860_rates[ctl_ridx].sp_ack_dur; 2313 else 2314 dur = rt2860_rates[ctl_ridx].lp_ack_dur; 2315 *(uint16_t *)wh->i_dur = htole16(dur); 2316 } 2317 2318 #ifndef IEEE80211_STA_ONLY 2319 /* ask MAC to insert timestamp into probe responses */ 2320 if ((wh->i_fc[0] & 2321 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 2322 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 2323 /* NOTE: beacons do not pass through tx_data() */ 2324 txwi->flags |= RT2860_TX_TS; 2325 #endif 2326 2327 if (__predict_false(sc->sc_drvbpf != NULL)) { 2328 struct run_tx_radiotap_header *tap = &sc->sc_txtap; 2329 2330 tap->wt_flags = 0; 2331 tap->wt_rate = rt2860_rates[ridx].rate; 2332 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2333 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2334 tap->wt_hwqueue = qid; 2335 if (mcs & RT2860_PHY_SHPRE) 2336 tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2337 2338 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 2339 } 2340 2341 m_copydata(m, 0, m->m_pkthdr.len, (void *)(txwi + 1)); 2342 m_freem(m); 2343 2344 xferlen += sizeof(*txd) + 4; 2345 2346 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 2347 USBD_FORCE_SHORT_XFER, RUN_TX_TIMEOUT, run_txeof); 2348 error = usbd_transfer(data->xfer); 2349 if (__predict_false(error != USBD_IN_PROGRESS && 2350 error != USBD_NORMAL_COMPLETION)) 2351 return error; 2352 2353 ieee80211_free_node(ni); 2354 2355 ring->cur = (ring->cur + 1) % RUN_TX_RING_COUNT; 2356 if (++ring->queued >= RUN_TX_RING_COUNT) 2357 sc->qfullmsk |= 1 << qid; 2358 2359 return 0; 2360 } 2361 2362 static void 2363 run_start(struct ifnet *ifp) 2364 { 2365 struct run_softc *sc = ifp->if_softc; 2366 struct ieee80211com *ic = &sc->sc_ic; 2367 struct ether_header *eh; 2368 struct ieee80211_node *ni; 2369 struct mbuf *m; 2370 2371 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2372 return; 2373 2374 for (;;) { 2375 if (sc->qfullmsk != 0) { 2376 ifp->if_flags |= IFF_OACTIVE; 2377 break; 2378 } 2379 /* send pending management frames first */ 2380 IF_DEQUEUE(&ic->ic_mgtq, m); 2381 if (m != NULL) { 2382 ni = M_GETCTX(m, struct ieee80211_node *); 2383 M_CLEARCTX(m); 2384 goto sendit; 2385 } 2386 if (ic->ic_state != IEEE80211_S_RUN) 2387 break; 2388 2389 /* encapsulate and send data frames */ 2390 IFQ_DEQUEUE(&ifp->if_snd, m); 2391 if (m == NULL) 2392 break; 2393 if (m->m_len < (int)sizeof(*eh) && 2394 (m = m_pullup(m, sizeof(*eh))) == NULL) { 2395 ifp->if_oerrors++; 2396 continue; 2397 } 2398 2399 eh = mtod(m, struct ether_header *); 2400 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2401 if (ni == NULL) { 2402 m_freem(m); 2403 ifp->if_oerrors++; 2404 continue; 2405 } 2406 2407 bpf_mtap(ifp, m); 2408 2409 if ((m = ieee80211_encap(ic, m, ni)) == NULL) { 2410 ieee80211_free_node(ni); 2411 ifp->if_oerrors++; 2412 continue; 2413 } 2414 sendit: 2415 bpf_mtap3(ic->ic_rawbpf, m); 2416 2417 if (run_tx(sc, m, ni) != 0) { 2418 ieee80211_free_node(ni); 2419 ifp->if_oerrors++; 2420 continue; 2421 } 2422 2423 sc->sc_tx_timer = 5; 2424 ifp->if_timer = 1; 2425 } 2426 } 2427 2428 static void 2429 run_watchdog(struct ifnet *ifp) 2430 { 2431 struct run_softc *sc = ifp->if_softc; 2432 struct ieee80211com *ic = &sc->sc_ic; 2433 2434 ifp->if_timer = 0; 2435 2436 if (sc->sc_tx_timer > 0) { 2437 if (--sc->sc_tx_timer == 0) { 2438 aprint_error_dev(sc->sc_dev, "device timeout\n"); 2439 /* run_init(ifp); XXX needs a process context! */ 2440 ifp->if_oerrors++; 2441 return; 2442 } 2443 ifp->if_timer = 1; 2444 } 2445 2446 ieee80211_watchdog(ic); 2447 } 2448 2449 static int 2450 run_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2451 { 2452 struct run_softc *sc = ifp->if_softc; 2453 struct ieee80211com *ic = &sc->sc_ic; 2454 int s, error = 0; 2455 2456 s = splnet(); 2457 2458 switch (cmd) { 2459 case SIOCSIFFLAGS: 2460 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2461 break; 2462 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 2463 case IFF_UP|IFF_RUNNING: 2464 break; 2465 case IFF_UP: 2466 run_init(ifp); 2467 break; 2468 case IFF_RUNNING: 2469 run_stop(ifp, 1); 2470 break; 2471 case 0: 2472 break; 2473 } 2474 break; 2475 2476 case SIOCADDMULTI: 2477 case SIOCDELMULTI: 2478 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 2479 /* setup multicast filter, etc */ 2480 error = 0; 2481 } 2482 break; 2483 2484 default: 2485 error = ieee80211_ioctl(ic, cmd, data); 2486 break; 2487 } 2488 2489 if (error == ENETRESET) { 2490 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2491 (IFF_UP | IFF_RUNNING)) { 2492 run_init(ifp); 2493 } 2494 error = 0; 2495 } 2496 2497 splx(s); 2498 2499 return error; 2500 } 2501 2502 static void 2503 run_select_chan_group(struct run_softc *sc, int group) 2504 { 2505 uint32_t tmp; 2506 uint8_t agc; 2507 2508 run_bbp_write(sc, 62, 0x37 - sc->lna[group]); 2509 run_bbp_write(sc, 63, 0x37 - sc->lna[group]); 2510 run_bbp_write(sc, 64, 0x37 - sc->lna[group]); 2511 run_bbp_write(sc, 86, 0x00); 2512 2513 if (group == 0) { 2514 if (sc->ext_2ghz_lna) { 2515 run_bbp_write(sc, 82, 0x62); 2516 run_bbp_write(sc, 75, 0x46); 2517 } else { 2518 run_bbp_write(sc, 82, 0x84); 2519 run_bbp_write(sc, 75, 0x50); 2520 } 2521 } else { 2522 if (sc->mac_ver == 0x3572) 2523 run_bbp_write(sc, 82, 0x94); 2524 else 2525 run_bbp_write(sc, 82, 0xf2); 2526 if (sc->ext_5ghz_lna) 2527 run_bbp_write(sc, 75, 0x46); 2528 else 2529 run_bbp_write(sc, 75, 0x50); 2530 } 2531 2532 run_read(sc, RT2860_TX_BAND_CFG, &tmp); 2533 tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P); 2534 tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P; 2535 run_write(sc, RT2860_TX_BAND_CFG, tmp); 2536 2537 /* enable appropriate Power Amplifiers and Low Noise Amplifiers */ 2538 tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN; 2539 if (sc->nrxchains > 1) 2540 tmp |= RT2860_LNA_PE1_EN; 2541 if (group == 0) { /* 2GHz */ 2542 tmp |= RT2860_PA_PE_G0_EN; 2543 if (sc->ntxchains > 1) 2544 tmp |= RT2860_PA_PE_G1_EN; 2545 } else { /* 5GHz */ 2546 tmp |= RT2860_PA_PE_A0_EN; 2547 if (sc->ntxchains > 1) 2548 tmp |= RT2860_PA_PE_A1_EN; 2549 } 2550 if (sc->mac_ver == 0x3572) { 2551 run_rt3070_rf_write(sc, 8, 0x00); 2552 run_write(sc, RT2860_TX_PIN_CFG, tmp); 2553 run_rt3070_rf_write(sc, 8, 0x80); 2554 } else 2555 run_write(sc, RT2860_TX_PIN_CFG, tmp); 2556 2557 /* set initial AGC value */ 2558 if (group == 0) { /* 2GHz band */ 2559 if (sc->mac_ver >= 0x3070) 2560 agc = 0x1c + sc->lna[0] * 2; 2561 else 2562 agc = 0x2e + sc->lna[0]; 2563 } else { /* 5GHz band */ 2564 if (sc->mac_ver == 0x3572) 2565 agc = 0x22 + (sc->lna[group] * 5) / 3; 2566 else 2567 agc = 0x32 + (sc->lna[group] * 5) / 3; 2568 } 2569 run_set_agc(sc, agc); 2570 } 2571 2572 static void 2573 run_rt2870_set_chan(struct run_softc *sc, u_int chan) 2574 { 2575 const struct rfprog *rfprog = rt2860_rf2850; 2576 uint32_t r2, r3, r4; 2577 int8_t txpow1, txpow2; 2578 int i; 2579 2580 /* find the settings for this channel (we know it exists) */ 2581 for (i = 0; rfprog[i].chan != chan; i++); 2582 2583 r2 = rfprog[i].r2; 2584 if (sc->ntxchains == 1) 2585 r2 |= 1 << 12; /* 1T: disable Tx chain 2 */ 2586 if (sc->nrxchains == 1) 2587 r2 |= 1 << 15 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2588 else if (sc->nrxchains == 2) 2589 r2 |= 1 << 4; /* 2R: disable Rx chain 3 */ 2590 2591 /* use Tx power values from EEPROM */ 2592 txpow1 = sc->txpow1[i]; 2593 txpow2 = sc->txpow2[i]; 2594 if (chan > 14) { 2595 if (txpow1 >= 0) 2596 txpow1 = txpow1 << 1 | 1; 2597 else 2598 txpow1 = (7 + txpow1) << 1; 2599 if (txpow2 >= 0) 2600 txpow2 = txpow2 << 1 | 1; 2601 else 2602 txpow2 = (7 + txpow2) << 1; 2603 } 2604 r3 = rfprog[i].r3 | txpow1 << 7; 2605 r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4; 2606 2607 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2608 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2609 run_rt2870_rf_write(sc, RT2860_RF3, r3); 2610 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2611 2612 DELAY(200); 2613 2614 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2615 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2616 run_rt2870_rf_write(sc, RT2860_RF3, r3 | 1); 2617 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2618 2619 DELAY(200); 2620 2621 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2622 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2623 run_rt2870_rf_write(sc, RT2860_RF3, r3); 2624 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2625 } 2626 2627 static void 2628 run_rt3070_set_chan(struct run_softc *sc, u_int chan) 2629 { 2630 int8_t txpow1, txpow2; 2631 uint8_t rf; 2632 int i; 2633 2634 KASSERT(chan >= 1 && chan <= 14); /* RT3070 is 2GHz only */ 2635 2636 /* find the settings for this channel (we know it exists) */ 2637 for (i = 0; rt2860_rf2850[i].chan != chan; i++) 2638 continue; 2639 2640 /* use Tx power values from EEPROM */ 2641 txpow1 = sc->txpow1[i]; 2642 txpow2 = sc->txpow2[i]; 2643 2644 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2645 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2646 run_rt3070_rf_read(sc, 6, &rf); 2647 rf = (rf & ~0x03) | rt3070_freqs[i].r; 2648 run_rt3070_rf_write(sc, 6, rf); 2649 2650 /* set Tx0 power */ 2651 run_rt3070_rf_read(sc, 12, &rf); 2652 rf = (rf & ~0x1f) | txpow1; 2653 run_rt3070_rf_write(sc, 12, rf); 2654 2655 /* set Tx1 power */ 2656 run_rt3070_rf_read(sc, 13, &rf); 2657 rf = (rf & ~0x1f) | txpow2; 2658 run_rt3070_rf_write(sc, 13, rf); 2659 2660 run_rt3070_rf_read(sc, 1, &rf); 2661 rf &= ~0xfc; 2662 if (sc->ntxchains == 1) 2663 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2664 else if (sc->ntxchains == 2) 2665 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2666 if (sc->nrxchains == 1) 2667 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2668 else if (sc->nrxchains == 2) 2669 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2670 run_rt3070_rf_write(sc, 1, rf); 2671 2672 /* set RF offset */ 2673 run_rt3070_rf_read(sc, 23, &rf); 2674 rf = (rf & ~0x7f) | sc->freq; 2675 run_rt3070_rf_write(sc, 23, rf); 2676 2677 /* program RF filter */ 2678 run_rt3070_rf_read(sc, 24, &rf); /* Tx */ 2679 rf = (rf & ~0x3f) | sc->rf24_20mhz; 2680 run_rt3070_rf_write(sc, 24, rf); 2681 run_rt3070_rf_read(sc, 31, &rf); /* Rx */ 2682 rf = (rf & ~0x3f) | sc->rf24_20mhz; 2683 run_rt3070_rf_write(sc, 31, rf); 2684 2685 /* enable RF tuning */ 2686 run_rt3070_rf_read(sc, 7, &rf); 2687 run_rt3070_rf_write(sc, 7, rf | 0x01); 2688 } 2689 2690 static void 2691 run_rt3572_set_chan(struct run_softc *sc, u_int chan) 2692 { 2693 int8_t txpow1, txpow2; 2694 uint32_t tmp; 2695 uint8_t rf; 2696 int i; 2697 2698 /* find the settings for this channel (we know it exists) */ 2699 for (i = 0; rt2860_rf2850[i].chan != chan; i++); 2700 2701 /* use Tx power values from EEPROM */ 2702 txpow1 = sc->txpow1[i]; 2703 txpow2 = sc->txpow2[i]; 2704 2705 if (chan <= 14) { 2706 run_bbp_write(sc, 25, sc->bbp25); 2707 run_bbp_write(sc, 26, sc->bbp26); 2708 } else { 2709 /* enable IQ phase correction */ 2710 run_bbp_write(sc, 25, 0x09); 2711 run_bbp_write(sc, 26, 0xff); 2712 } 2713 2714 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2715 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2716 run_rt3070_rf_read(sc, 6, &rf); 2717 rf = (rf & ~0x0f) | rt3070_freqs[i].r; 2718 rf |= (chan <= 14) ? 0x08 : 0x04; 2719 run_rt3070_rf_write(sc, 6, rf); 2720 2721 /* set PLL mode */ 2722 run_rt3070_rf_read(sc, 5, &rf); 2723 rf &= ~(0x08 | 0x04); 2724 rf |= (chan <= 14) ? 0x04 : 0x08; 2725 run_rt3070_rf_write(sc, 5, rf); 2726 2727 /* set Tx power for chain 0 */ 2728 if (chan <= 14) 2729 rf = 0x60 | txpow1; 2730 else 2731 rf = 0xe0 | (txpow1 & 0xc) << 1 | (txpow1 & 0x3); 2732 run_rt3070_rf_write(sc, 12, rf); 2733 2734 /* set Tx power for chain 1 */ 2735 if (chan <= 14) 2736 rf = 0x60 | txpow2; 2737 else 2738 rf = 0xe0 | (txpow2 & 0xc) << 1 | (txpow2 & 0x3); 2739 run_rt3070_rf_write(sc, 13, rf); 2740 2741 /* set Tx/Rx streams */ 2742 run_rt3070_rf_read(sc, 1, &rf); 2743 rf &= ~0xfc; 2744 if (sc->ntxchains == 1) 2745 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2746 else if (sc->ntxchains == 2) 2747 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2748 if (sc->nrxchains == 1) 2749 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2750 else if (sc->nrxchains == 2) 2751 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2752 run_rt3070_rf_write(sc, 1, rf); 2753 2754 /* set RF offset */ 2755 run_rt3070_rf_read(sc, 23, &rf); 2756 rf = (rf & ~0x7f) | sc->freq; 2757 run_rt3070_rf_write(sc, 23, rf); 2758 2759 /* program RF filter */ 2760 rf = sc->rf24_20mhz; 2761 run_rt3070_rf_write(sc, 24, rf); /* Tx */ 2762 run_rt3070_rf_write(sc, 31, rf); /* Rx */ 2763 2764 /* enable RF tuning */ 2765 run_rt3070_rf_read(sc, 7, &rf); 2766 rf = (chan <= 14) ? 0xd8 : ((rf & ~0xc8) | 0x14); 2767 run_rt3070_rf_write(sc, 7, rf); 2768 2769 /* TSSI */ 2770 rf = (chan <= 14) ? 0xc3 : 0xc0; 2771 run_rt3070_rf_write(sc, 9, rf); 2772 2773 /* set loop filter 1 */ 2774 run_rt3070_rf_write(sc, 10, 0xf1); 2775 /* set loop filter 2 */ 2776 run_rt3070_rf_write(sc, 11, (chan <= 14) ? 0xb9 : 0x00); 2777 2778 /* set tx_mx2_ic */ 2779 run_rt3070_rf_write(sc, 15, (chan <= 14) ? 0x53 : 0x43); 2780 /* set tx_mx1_ic */ 2781 if (chan <= 14) 2782 rf = 0x48 | sc->txmixgain_2ghz; 2783 else 2784 rf = 0x78 | sc->txmixgain_5ghz; 2785 run_rt3070_rf_write(sc, 16, rf); 2786 2787 /* set tx_lo1 */ 2788 run_rt3070_rf_write(sc, 17, 0x23); 2789 /* set tx_lo2 */ 2790 if (chan <= 14) 2791 rf = 0x93; 2792 else if (chan <= 64) 2793 rf = 0xb7; 2794 else if (chan <= 128) 2795 rf = 0x74; 2796 else 2797 rf = 0x72; 2798 run_rt3070_rf_write(sc, 19, rf); 2799 2800 /* set rx_lo1 */ 2801 if (chan <= 14) 2802 rf = 0xb3; 2803 else if (chan <= 64) 2804 rf = 0xf6; 2805 else if (chan <= 128) 2806 rf = 0xf4; 2807 else 2808 rf = 0xf3; 2809 run_rt3070_rf_write(sc, 20, rf); 2810 2811 /* set pfd_delay */ 2812 if (chan <= 14) 2813 rf = 0x15; 2814 else if (chan <= 64) 2815 rf = 0x3d; 2816 else 2817 rf = 0x01; 2818 run_rt3070_rf_write(sc, 25, rf); 2819 2820 /* set rx_lo2 */ 2821 run_rt3070_rf_write(sc, 26, (chan <= 14) ? 0x85 : 0x87); 2822 /* set ldo_rf_vc */ 2823 run_rt3070_rf_write(sc, 27, (chan <= 14) ? 0x00 : 0x01); 2824 /* set drv_cc */ 2825 run_rt3070_rf_write(sc, 29, (chan <= 14) ? 0x9b : 0x9f); 2826 2827 run_read(sc, RT2860_GPIO_CTRL, &tmp); 2828 tmp &= ~0x8080; 2829 if (chan <= 14) 2830 tmp |= 0x80; 2831 run_write(sc, RT2860_GPIO_CTRL, tmp); 2832 2833 /* enable RF tuning */ 2834 run_rt3070_rf_read(sc, 7, &rf); 2835 run_rt3070_rf_write(sc, 7, rf | 0x01); 2836 2837 DELAY(2000); 2838 } 2839 2840 static void 2841 run_set_agc(struct run_softc *sc, uint8_t agc) 2842 { 2843 uint8_t bbp; 2844 2845 if (sc->mac_ver == 0x3572) { 2846 run_bbp_read(sc, 27, &bbp); 2847 bbp &= ~(0x3 << 5); 2848 run_bbp_write(sc, 27, bbp | 0 << 5); /* select Rx0 */ 2849 run_bbp_write(sc, 66, agc); 2850 run_bbp_write(sc, 27, bbp | 1 << 5); /* select Rx1 */ 2851 run_bbp_write(sc, 66, agc); 2852 } else 2853 run_bbp_write(sc, 66, agc); 2854 } 2855 2856 static void 2857 run_set_rx_antenna(struct run_softc *sc, int aux) 2858 { 2859 uint32_t tmp; 2860 2861 run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, !aux); 2862 run_read(sc, RT2860_GPIO_CTRL, &tmp); 2863 tmp &= ~0x0808; 2864 if (aux) 2865 tmp |= 0x08; 2866 run_write(sc, RT2860_GPIO_CTRL, tmp); 2867 } 2868 2869 static int 2870 run_set_chan(struct run_softc *sc, struct ieee80211_channel *c) 2871 { 2872 struct ieee80211com *ic = &sc->sc_ic; 2873 u_int chan, group; 2874 2875 chan = ieee80211_chan2ieee(ic, c); 2876 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2877 return EINVAL; 2878 2879 if (sc->mac_ver == 0x3572) 2880 run_rt3572_set_chan(sc, chan); 2881 else if (sc->mac_ver >= 0x3070) 2882 run_rt3070_set_chan(sc, chan); 2883 else 2884 run_rt2870_set_chan(sc, chan); 2885 2886 /* determine channel group */ 2887 if (chan <= 14) 2888 group = 0; 2889 else if (chan <= 64) 2890 group = 1; 2891 else if (chan <= 128) 2892 group = 2; 2893 else 2894 group = 3; 2895 2896 /* XXX necessary only when group has changed! */ 2897 run_select_chan_group(sc, group); 2898 2899 DELAY(1000); 2900 return 0; 2901 } 2902 2903 static void 2904 run_enable_tsf_sync(struct run_softc *sc) 2905 { 2906 struct ieee80211com *ic = &sc->sc_ic; 2907 uint32_t tmp; 2908 2909 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 2910 tmp &= ~0x1fffff; 2911 tmp |= ic->ic_bss->ni_intval * 16; 2912 tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN; 2913 if (ic->ic_opmode == IEEE80211_M_STA) { 2914 /* 2915 * Local TSF is always updated with remote TSF on beacon 2916 * reception. 2917 */ 2918 tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT; 2919 } 2920 #ifndef IEEE80211_STA_ONLY 2921 else if (ic->ic_opmode == IEEE80211_M_IBSS) { 2922 tmp |= RT2860_BCN_TX_EN; 2923 /* 2924 * Local TSF is updated with remote TSF on beacon reception 2925 * only if the remote TSF is greater than local TSF. 2926 */ 2927 tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT; 2928 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2929 tmp |= RT2860_BCN_TX_EN; 2930 /* SYNC with nobody */ 2931 tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT; 2932 } 2933 #endif 2934 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 2935 } 2936 2937 static void 2938 run_enable_mrr(struct run_softc *sc) 2939 { 2940 #define CCK(mcs) (mcs) 2941 #define OFDM(mcs) (1 << 3 | (mcs)) 2942 run_write(sc, RT2860_LG_FBK_CFG0, 2943 OFDM(6) << 28 | /* 54->48 */ 2944 OFDM(5) << 24 | /* 48->36 */ 2945 OFDM(4) << 20 | /* 36->24 */ 2946 OFDM(3) << 16 | /* 24->18 */ 2947 OFDM(2) << 12 | /* 18->12 */ 2948 OFDM(1) << 8 | /* 12-> 9 */ 2949 OFDM(0) << 4 | /* 9-> 6 */ 2950 OFDM(0)); /* 6-> 6 */ 2951 2952 run_write(sc, RT2860_LG_FBK_CFG1, 2953 CCK(2) << 12 | /* 11->5.5 */ 2954 CCK(1) << 8 | /* 5.5-> 2 */ 2955 CCK(0) << 4 | /* 2-> 1 */ 2956 CCK(0)); /* 1-> 1 */ 2957 #undef OFDM 2958 #undef CCK 2959 } 2960 2961 static void 2962 run_set_txpreamble(struct run_softc *sc) 2963 { 2964 uint32_t tmp; 2965 2966 run_read(sc, RT2860_AUTO_RSP_CFG, &tmp); 2967 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 2968 tmp |= RT2860_CCK_SHORT_EN; 2969 else 2970 tmp &= ~RT2860_CCK_SHORT_EN; 2971 run_write(sc, RT2860_AUTO_RSP_CFG, tmp); 2972 } 2973 2974 static void 2975 run_set_basicrates(struct run_softc *sc) 2976 { 2977 struct ieee80211com *ic = &sc->sc_ic; 2978 2979 /* set basic rates mask */ 2980 if (ic->ic_curmode == IEEE80211_MODE_11B) 2981 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x003); 2982 else if (ic->ic_curmode == IEEE80211_MODE_11A) 2983 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x150); 2984 else /* 11g */ 2985 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x15f); 2986 } 2987 2988 static void 2989 run_set_leds(struct run_softc *sc, uint16_t which) 2990 { 2991 2992 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LEDS, 2993 which | (sc->leds & 0x7f)); 2994 } 2995 2996 static void 2997 run_set_bssid(struct run_softc *sc, const uint8_t *bssid) 2998 { 2999 3000 run_write(sc, RT2860_MAC_BSSID_DW0, 3001 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24); 3002 run_write(sc, RT2860_MAC_BSSID_DW1, 3003 bssid[4] | bssid[5] << 8); 3004 } 3005 3006 static void 3007 run_set_macaddr(struct run_softc *sc, const uint8_t *addr) 3008 { 3009 3010 run_write(sc, RT2860_MAC_ADDR_DW0, 3011 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24); 3012 run_write(sc, RT2860_MAC_ADDR_DW1, 3013 addr[4] | addr[5] << 8 | 0xff << 16); 3014 } 3015 3016 static void 3017 run_updateslot(struct ifnet *ifp) 3018 { 3019 3020 /* do it in a process context */ 3021 run_do_async(ifp->if_softc, run_updateslot_cb, NULL, 0); 3022 } 3023 3024 /* ARGSUSED */ 3025 static void 3026 run_updateslot_cb(struct run_softc *sc, void *arg) 3027 { 3028 uint32_t tmp; 3029 3030 run_read(sc, RT2860_BKOFF_SLOT_CFG, &tmp); 3031 tmp &= ~0xff; 3032 tmp |= (sc->sc_ic.ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 3033 run_write(sc, RT2860_BKOFF_SLOT_CFG, tmp); 3034 } 3035 3036 static int8_t 3037 run_rssi2dbm(struct run_softc *sc, uint8_t rssi, uint8_t rxchain) 3038 { 3039 struct ieee80211com *ic = &sc->sc_ic; 3040 struct ieee80211_channel *c = ic->ic_curchan; 3041 int delta; 3042 3043 if (IEEE80211_IS_CHAN_5GHZ(c)) { 3044 u_int chan = ieee80211_chan2ieee(ic, c); 3045 delta = sc->rssi_5ghz[rxchain]; 3046 3047 /* determine channel group */ 3048 if (chan <= 64) 3049 delta -= sc->lna[1]; 3050 else if (chan <= 128) 3051 delta -= sc->lna[2]; 3052 else 3053 delta -= sc->lna[3]; 3054 } else 3055 delta = sc->rssi_2ghz[rxchain] - sc->lna[0]; 3056 3057 return -12 - delta - rssi; 3058 } 3059 3060 static int 3061 run_bbp_init(struct run_softc *sc) 3062 { 3063 int i, error, ntries; 3064 uint8_t bbp0; 3065 3066 /* wait for BBP to wake up */ 3067 for (ntries = 0; ntries < 20; ntries++) { 3068 if ((error = run_bbp_read(sc, 0, &bbp0)) != 0) 3069 return error; 3070 if (bbp0 != 0 && bbp0 != 0xff) 3071 break; 3072 } 3073 if (ntries == 20) 3074 return ETIMEDOUT; 3075 3076 /* initialize BBP registers to default values */ 3077 for (i = 0; i < (int)__arraycount(rt2860_def_bbp); i++) { 3078 run_bbp_write(sc, rt2860_def_bbp[i].reg, 3079 rt2860_def_bbp[i].val); 3080 } 3081 3082 /* fix BBP84 for RT2860E */ 3083 if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101) 3084 run_bbp_write(sc, 84, 0x19); 3085 3086 if (sc->mac_ver >= 0x3070) { 3087 run_bbp_write(sc, 79, 0x13); 3088 run_bbp_write(sc, 80, 0x05); 3089 run_bbp_write(sc, 81, 0x33); 3090 } else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) { 3091 run_bbp_write(sc, 69, 0x16); 3092 run_bbp_write(sc, 73, 0x12); 3093 } 3094 return 0; 3095 } 3096 3097 static int 3098 run_rt3070_rf_init(struct run_softc *sc) 3099 { 3100 uint32_t tmp; 3101 uint8_t rf, target, bbp4; 3102 int i; 3103 3104 run_rt3070_rf_read(sc, 30, &rf); 3105 /* toggle RF R30 bit 7 */ 3106 run_rt3070_rf_write(sc, 30, rf | 0x80); 3107 DELAY(1000); 3108 run_rt3070_rf_write(sc, 30, rf & ~0x80); 3109 3110 /* initialize RF registers to default value */ 3111 if (sc->mac_ver == 0x3572) { 3112 for (i = 0; i < (int)__arraycount(rt3572_def_rf); i++) { 3113 run_rt3070_rf_write(sc, rt3572_def_rf[i].reg, 3114 rt3572_def_rf[i].val); 3115 } 3116 } else { 3117 for (i = 0; i < (int)__arraycount(rt3070_def_rf); i++) { 3118 run_rt3070_rf_write(sc, rt3070_def_rf[i].reg, 3119 rt3070_def_rf[i].val); 3120 } 3121 } 3122 if (sc->mac_ver == 0x3572) { 3123 run_rt3070_rf_read(sc, 6, &rf); 3124 run_rt3070_rf_write(sc, 6, rf | 0x40); 3125 3126 /* increase voltage from 1.2V to 1.35V */ 3127 run_read(sc, RT3070_LDO_CFG0, &tmp); 3128 tmp = (tmp & ~0x1f000000) | 0x0d000000; 3129 run_write(sc, RT3070_LDO_CFG0, tmp); 3130 if (sc->mac_rev >= 0x0211 || !sc->patch_dac) { 3131 /* decrease voltage back to 1.2V */ 3132 DELAY(1000); 3133 tmp = (tmp & ~0x1f000000) | 0x01000000; 3134 run_write(sc, RT3070_LDO_CFG0, tmp); 3135 } 3136 } else if (sc->mac_ver == 0x3071) { 3137 run_rt3070_rf_read(sc, 6, &rf); 3138 run_rt3070_rf_write(sc, 6, rf | 0x40); 3139 run_rt3070_rf_write(sc, 31, 0x14); 3140 3141 run_read(sc, RT3070_LDO_CFG0, &tmp); 3142 tmp &= ~0x1f000000; 3143 if (sc->mac_rev < 0x0211) 3144 tmp |= 0x0d000000; /* 1.35V */ 3145 else 3146 tmp |= 0x01000000; /* 1.2V */ 3147 run_write(sc, RT3070_LDO_CFG0, tmp); 3148 3149 /* patch LNA_PE_G1 */ 3150 run_read(sc, RT3070_GPIO_SWITCH, &tmp); 3151 run_write(sc, RT3070_GPIO_SWITCH, tmp & ~0x20); 3152 } else if (sc->mac_ver == 0x3070) { 3153 /* increase voltage from 1.2V to 1.35V */ 3154 run_read(sc, RT3070_LDO_CFG0, &tmp); 3155 tmp = (tmp & ~0x0f000000) | 0x0d000000; 3156 run_write(sc, RT3070_LDO_CFG0, tmp); 3157 } 3158 3159 /* select 20MHz bandwidth */ 3160 run_rt3070_rf_read(sc, 31, &rf); 3161 run_rt3070_rf_write(sc, 31, rf & ~0x20); 3162 3163 /* calibrate filter for 20MHz bandwidth */ 3164 sc->rf24_20mhz = 0x1f; /* default value */ 3165 target = (sc->mac_ver < 0x3071) ? 0x16 : 0x13; 3166 run_rt3070_filter_calib(sc, 0x07, target, &sc->rf24_20mhz); 3167 3168 /* select 40MHz bandwidth */ 3169 run_bbp_read(sc, 4, &bbp4); 3170 run_bbp_write(sc, 4, (bbp4 & ~0x08) | 0x10); 3171 run_rt3070_rf_read(sc, 31, &rf); 3172 run_rt3070_rf_write(sc, 31, rf | 0x20); 3173 3174 /* calibrate filter for 40MHz bandwidth */ 3175 sc->rf24_40mhz = 0x2f; /* default value */ 3176 target = (sc->mac_ver < 0x3071) ? 0x19 : 0x15; 3177 run_rt3070_filter_calib(sc, 0x27, target, &sc->rf24_40mhz); 3178 3179 /* go back to 20MHz bandwidth */ 3180 run_bbp_read(sc, 4, &bbp4); 3181 run_bbp_write(sc, 4, bbp4 & ~0x18); 3182 3183 if (sc->mac_ver == 0x3572) { 3184 /* save default BBP registers 25 and 26 values */ 3185 run_bbp_read(sc, 25, &sc->bbp25); 3186 run_bbp_read(sc, 26, &sc->bbp26); 3187 } else if (sc->mac_rev < 0x0211) 3188 run_rt3070_rf_write(sc, 27, 0x03); 3189 3190 run_read(sc, RT3070_OPT_14, &tmp); 3191 run_write(sc, RT3070_OPT_14, tmp | 1); 3192 3193 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3194 run_rt3070_rf_read(sc, 17, &rf); 3195 rf &= ~RT3070_TX_LO1; 3196 if ((sc->mac_ver == 0x3070 || 3197 (sc->mac_ver == 0x3071 && sc->mac_rev >= 0x0211)) && 3198 !sc->ext_2ghz_lna) 3199 rf |= 0x20; /* fix for long range Rx issue */ 3200 if (sc->txmixgain_2ghz >= 1) 3201 rf = (rf & ~0x7) | sc->txmixgain_2ghz; 3202 run_rt3070_rf_write(sc, 17, rf); 3203 } 3204 if (sc->mac_ver == 0x3071) { 3205 run_rt3070_rf_read(sc, 1, &rf); 3206 rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD); 3207 rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD; 3208 run_rt3070_rf_write(sc, 1, rf); 3209 3210 run_rt3070_rf_read(sc, 15, &rf); 3211 run_rt3070_rf_write(sc, 15, rf & ~RT3070_TX_LO2); 3212 3213 run_rt3070_rf_read(sc, 20, &rf); 3214 run_rt3070_rf_write(sc, 20, rf & ~RT3070_RX_LO1); 3215 3216 run_rt3070_rf_read(sc, 21, &rf); 3217 run_rt3070_rf_write(sc, 21, rf & ~RT3070_RX_LO2); 3218 } 3219 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3220 /* fix Tx to Rx IQ glitch by raising RF voltage */ 3221 run_rt3070_rf_read(sc, 27, &rf); 3222 rf &= ~0x77; 3223 if (sc->mac_rev < 0x0211) 3224 rf |= 0x03; 3225 run_rt3070_rf_write(sc, 27, rf); 3226 } 3227 return 0; 3228 } 3229 3230 static int 3231 run_rt3070_filter_calib(struct run_softc *sc, uint8_t init, uint8_t target, 3232 uint8_t *val) 3233 { 3234 uint8_t rf22, rf24; 3235 uint8_t bbp55_pb, bbp55_sb, delta; 3236 int ntries; 3237 3238 /* program filter */ 3239 run_rt3070_rf_read(sc, 24, &rf24); 3240 rf24 = (rf24 & 0xc0) | init; /* initial filter value */ 3241 run_rt3070_rf_write(sc, 24, rf24); 3242 3243 /* enable baseband loopback mode */ 3244 run_rt3070_rf_read(sc, 22, &rf22); 3245 run_rt3070_rf_write(sc, 22, rf22 | 0x01); 3246 3247 /* set power and frequency of passband test tone */ 3248 run_bbp_write(sc, 24, 0x00); 3249 for (ntries = 0; ntries < 100; ntries++) { 3250 /* transmit test tone */ 3251 run_bbp_write(sc, 25, 0x90); 3252 DELAY(1000); 3253 /* read received power */ 3254 run_bbp_read(sc, 55, &bbp55_pb); 3255 if (bbp55_pb != 0) 3256 break; 3257 } 3258 if (ntries == 100) 3259 return ETIMEDOUT; 3260 3261 /* set power and frequency of stopband test tone */ 3262 run_bbp_write(sc, 24, 0x06); 3263 for (ntries = 0; ntries < 100; ntries++) { 3264 /* transmit test tone */ 3265 run_bbp_write(sc, 25, 0x90); 3266 DELAY(1000); 3267 /* read received power */ 3268 run_bbp_read(sc, 55, &bbp55_sb); 3269 3270 delta = bbp55_pb - bbp55_sb; 3271 if (delta > target) 3272 break; 3273 3274 /* reprogram filter */ 3275 rf24++; 3276 run_rt3070_rf_write(sc, 24, rf24); 3277 } 3278 if (ntries < 100) { 3279 if (rf24 != init) 3280 rf24--; /* backtrack */ 3281 *val = rf24; 3282 run_rt3070_rf_write(sc, 24, rf24); 3283 } 3284 3285 /* restore initial state */ 3286 run_bbp_write(sc, 24, 0x00); 3287 3288 /* disable baseband loopback mode */ 3289 run_rt3070_rf_read(sc, 22, &rf22); 3290 run_rt3070_rf_write(sc, 22, rf22 & ~0x01); 3291 3292 return 0; 3293 } 3294 3295 static void 3296 run_rt3070_rf_setup(struct run_softc *sc) 3297 { 3298 uint8_t bbp, rf; 3299 int i; 3300 3301 if (sc->mac_ver == 0x3572) { 3302 /* enable DC filter */ 3303 if (sc->mac_rev >= 0x0201) 3304 run_bbp_write(sc, 103, 0xc0); 3305 3306 run_bbp_read(sc, 138, &bbp); 3307 if (sc->ntxchains == 1) 3308 bbp |= 0x20; /* turn off DAC1 */ 3309 if (sc->nrxchains == 1) 3310 bbp &= ~0x02; /* turn off ADC1 */ 3311 run_bbp_write(sc, 138, bbp); 3312 3313 if (sc->mac_rev >= 0x0211) { 3314 /* improve power consumption */ 3315 run_bbp_read(sc, 31, &bbp); 3316 run_bbp_write(sc, 31, bbp & ~0x03); 3317 } 3318 3319 run_rt3070_rf_read(sc, 16, &rf); 3320 rf = (rf & ~0x07) | sc->txmixgain_2ghz; 3321 run_rt3070_rf_write(sc, 16, rf); 3322 } else if (sc->mac_ver == 0x3071) { 3323 /* enable DC filter */ 3324 if (sc->mac_rev >= 0x0201) 3325 run_bbp_write(sc, 103, 0xc0); 3326 3327 run_bbp_read(sc, 138, &bbp); 3328 if (sc->ntxchains == 1) 3329 bbp |= 0x20; /* turn off DAC1 */ 3330 if (sc->nrxchains == 1) 3331 bbp &= ~0x02; /* turn off ADC1 */ 3332 run_bbp_write(sc, 138, bbp); 3333 3334 if (sc->mac_rev >= 0x0211) { 3335 /* improve power consumption */ 3336 run_bbp_read(sc, 31, &bbp); 3337 run_bbp_write(sc, 31, bbp & ~0x03); 3338 } 3339 3340 run_write(sc, RT2860_TX_SW_CFG1, 0); 3341 if (sc->mac_rev < 0x0211) { 3342 run_write(sc, RT2860_TX_SW_CFG2, 3343 sc->patch_dac ? 0x2c : 0x0f); 3344 } else 3345 run_write(sc, RT2860_TX_SW_CFG2, 0); 3346 } else if (sc->mac_ver == 0x3070) { 3347 if (sc->mac_rev >= 0x0201) { 3348 /* enable DC filter */ 3349 run_bbp_write(sc, 103, 0xc0); 3350 3351 /* improve power consumption */ 3352 run_bbp_read(sc, 31, &bbp); 3353 run_bbp_write(sc, 31, bbp & ~0x03); 3354 } 3355 3356 if (sc->mac_rev < 0x0211) { 3357 run_write(sc, RT2860_TX_SW_CFG1, 0); 3358 run_write(sc, RT2860_TX_SW_CFG2, 0x2c); 3359 } else 3360 run_write(sc, RT2860_TX_SW_CFG2, 0); 3361 } 3362 3363 /* initialize RF registers from ROM for >=RT3071*/ 3364 if (sc->mac_ver >= 0x3071) { 3365 for (i = 0; i < 10; i++) { 3366 if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff) 3367 continue; 3368 run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val); 3369 } 3370 } 3371 } 3372 3373 static int 3374 run_txrx_enable(struct run_softc *sc) 3375 { 3376 uint32_t tmp; 3377 int error, ntries; 3378 3379 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN); 3380 for (ntries = 0; ntries < 200; ntries++) { 3381 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3382 return error; 3383 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3384 break; 3385 DELAY(1000); 3386 } 3387 if (ntries == 200) 3388 return ETIMEDOUT; 3389 3390 DELAY(50); 3391 3392 tmp |= RT2860_RX_DMA_EN | RT2860_TX_DMA_EN | RT2860_TX_WB_DDONE; 3393 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3394 3395 /* enable Rx bulk aggregation (set timeout and limit) */ 3396 tmp = RT2860_USB_TX_EN | RT2860_USB_RX_EN | RT2860_USB_RX_AGG_EN | 3397 RT2860_USB_RX_AGG_TO(128) | RT2860_USB_RX_AGG_LMT(2); 3398 run_write(sc, RT2860_USB_DMA_CFG, tmp); 3399 3400 /* set Rx filter */ 3401 tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR; 3402 if (sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR) { 3403 tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL | 3404 RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK | 3405 RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV | 3406 RT2860_DROP_CFACK | RT2860_DROP_CFEND; 3407 if (sc->sc_ic.ic_opmode == IEEE80211_M_STA) 3408 tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL; 3409 } 3410 run_write(sc, RT2860_RX_FILTR_CFG, tmp); 3411 3412 run_write(sc, RT2860_MAC_SYS_CTRL, 3413 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3414 3415 return 0; 3416 } 3417 3418 static int 3419 run_init(struct ifnet *ifp) 3420 { 3421 struct run_softc *sc = ifp->if_softc; 3422 struct ieee80211com *ic = &sc->sc_ic; 3423 uint32_t tmp; 3424 uint8_t bbp1, bbp3; 3425 int i, error, qid, ridx, ntries; 3426 3427 for (ntries = 0; ntries < 100; ntries++) { 3428 if ((error = run_read(sc, RT2860_ASIC_VER_ID, &tmp)) != 0) 3429 goto fail; 3430 if (tmp != 0 && tmp != 0xffffffff) 3431 break; 3432 DELAY(10); 3433 } 3434 if (ntries == 100) { 3435 error = ETIMEDOUT; 3436 goto fail; 3437 } 3438 3439 if ((sc->sc_flags & RUN_FWLOADED) == 0 && 3440 (error = run_load_microcode(sc)) != 0) { 3441 aprint_error_dev(sc->sc_dev, 3442 "could not load 8051 microcode\n"); 3443 goto fail; 3444 } 3445 3446 if (ifp->if_flags & IFF_RUNNING) 3447 run_stop(ifp, 0); 3448 3449 /* init host command ring */ 3450 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 3451 3452 /* init Tx rings (4 EDCAs) */ 3453 for (qid = 0; qid < 4; qid++) { 3454 if ((error = run_alloc_tx_ring(sc, qid)) != 0) 3455 goto fail; 3456 } 3457 /* init Rx ring */ 3458 if ((error = run_alloc_rx_ring(sc)) != 0) 3459 goto fail; 3460 3461 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 3462 run_set_macaddr(sc, ic->ic_myaddr); 3463 3464 for (ntries = 0; ntries < 100; ntries++) { 3465 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3466 goto fail; 3467 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3468 break; 3469 DELAY(1000); 3470 } 3471 if (ntries == 100) { 3472 aprint_error_dev(sc->sc_dev, 3473 "timeout waiting for DMA engine\n"); 3474 error = ETIMEDOUT; 3475 goto fail; 3476 } 3477 tmp &= 0xff0; 3478 tmp |= RT2860_TX_WB_DDONE; 3479 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3480 3481 /* turn off PME_OEN to solve high-current issue */ 3482 run_read(sc, RT2860_SYS_CTRL, &tmp); 3483 run_write(sc, RT2860_SYS_CTRL, tmp & ~RT2860_PME_OEN); 3484 3485 run_write(sc, RT2860_MAC_SYS_CTRL, 3486 RT2860_BBP_HRST | RT2860_MAC_SRST); 3487 run_write(sc, RT2860_USB_DMA_CFG, 0); 3488 3489 if ((error = run_reset(sc)) != 0) { 3490 aprint_error_dev(sc->sc_dev, "could not reset chipset\n"); 3491 goto fail; 3492 } 3493 3494 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3495 3496 /* init Tx power for all Tx rates (from EEPROM) */ 3497 for (ridx = 0; ridx < 5; ridx++) { 3498 if (sc->txpow20mhz[ridx] == 0xffffffff) 3499 continue; 3500 run_write(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]); 3501 } 3502 3503 for (i = 0; i < (int)__arraycount(rt2870_def_mac); i++) 3504 run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val); 3505 run_write(sc, RT2860_WMM_AIFSN_CFG, 0x00002273); 3506 run_write(sc, RT2860_WMM_CWMIN_CFG, 0x00002344); 3507 run_write(sc, RT2860_WMM_CWMAX_CFG, 0x000034aa); 3508 3509 if (sc->mac_ver >= 0x3070) { 3510 /* set delay of PA_PE assertion to 1us (unit of 0.25us) */ 3511 run_write(sc, RT2860_TX_SW_CFG0, 3512 4 << RT2860_DLY_PAPE_EN_SHIFT); 3513 } 3514 3515 /* wait while MAC is busy */ 3516 for (ntries = 0; ntries < 100; ntries++) { 3517 if ((error = run_read(sc, RT2860_MAC_STATUS_REG, &tmp)) != 0) 3518 goto fail; 3519 if (!(tmp & (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY))) 3520 break; 3521 DELAY(1000); 3522 } 3523 if (ntries == 100) { 3524 error = ETIMEDOUT; 3525 goto fail; 3526 } 3527 3528 /* clear Host to MCU mailbox */ 3529 run_write(sc, RT2860_H2M_BBPAGENT, 0); 3530 run_write(sc, RT2860_H2M_MAILBOX, 0); 3531 DELAY(1000); 3532 3533 if ((error = run_bbp_init(sc)) != 0) { 3534 aprint_error_dev(sc->sc_dev, "could not initialize BBP\n"); 3535 goto fail; 3536 } 3537 3538 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 3539 tmp &= ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 3540 RT2860_TBTT_TIMER_EN); 3541 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 3542 3543 /* clear RX WCID search table */ 3544 run_set_region_4(sc, RT2860_WCID_ENTRY(0), 0, 512); 3545 /* clear Pair-wise key table */ 3546 run_set_region_4(sc, RT2860_PKEY(0), 0, 2048); 3547 /* clear IV/EIV table */ 3548 run_set_region_4(sc, RT2860_IVEIV(0), 0, 512); 3549 /* clear WCID attribute table */ 3550 run_set_region_4(sc, RT2860_WCID_ATTR(0), 0, 8 * 32); 3551 /* clear shared key table */ 3552 run_set_region_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32); 3553 /* clear shared key mode */ 3554 run_set_region_4(sc, RT2860_SKEY_MODE_0_7, 0, 4); 3555 3556 run_read(sc, RT2860_US_CYC_CNT, &tmp); 3557 tmp = (tmp & ~0xff) | 0x1e; 3558 run_write(sc, RT2860_US_CYC_CNT, tmp); 3559 3560 if (sc->mac_rev != 0x0101) 3561 run_write(sc, RT2860_TXOP_CTRL_CFG, 0x0000583f); 3562 3563 run_write(sc, RT2860_WMM_TXOP0_CFG, 0); 3564 run_write(sc, RT2860_WMM_TXOP1_CFG, 48 << 16 | 96); 3565 3566 /* write vendor-specific BBP values (from EEPROM) */ 3567 for (i = 0; i < 8; i++) { 3568 if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff) 3569 continue; 3570 run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val); 3571 } 3572 3573 /* select Main antenna for 1T1R devices */ 3574 if (sc->rf_rev == RT3070_RF_3020) 3575 run_set_rx_antenna(sc, 0); 3576 3577 /* send LEDs operating mode to microcontroller */ 3578 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0]); 3579 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1]); 3580 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2]); 3581 3582 if (sc->mac_ver >= 0x3070) 3583 run_rt3070_rf_init(sc); 3584 3585 /* disable non-existing Rx chains */ 3586 run_bbp_read(sc, 3, &bbp3); 3587 bbp3 &= ~(1 << 3 | 1 << 4); 3588 if (sc->nrxchains == 2) 3589 bbp3 |= 1 << 3; 3590 else if (sc->nrxchains == 3) 3591 bbp3 |= 1 << 4; 3592 run_bbp_write(sc, 3, bbp3); 3593 3594 /* disable non-existing Tx chains */ 3595 run_bbp_read(sc, 1, &bbp1); 3596 if (sc->ntxchains == 1) 3597 bbp1 &= ~(1 << 3 | 1 << 4); 3598 run_bbp_write(sc, 1, bbp1); 3599 3600 if (sc->mac_ver >= 0x3070) 3601 run_rt3070_rf_setup(sc); 3602 3603 /* select default channel */ 3604 run_set_chan(sc, ic->ic_curchan); 3605 3606 /* turn radio LED on */ 3607 run_set_leds(sc, RT2860_LED_RADIO); 3608 3609 #ifdef RUN_HWCRYPTO 3610 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 3611 /* install WEP keys */ 3612 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3613 (void)run_set_key(ic, &ic->ic_crypto.cs_nw_keys[i], 3614 NULL); 3615 } 3616 #endif 3617 3618 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 3619 struct run_rx_data *data = &sc->rxq.data[i]; 3620 3621 usbd_setup_xfer(data->xfer, data, data->buf, RUN_MAX_RXSZ, 3622 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, run_rxeof); 3623 error = usbd_transfer(data->xfer); 3624 if (error != USBD_NORMAL_COMPLETION && 3625 error != USBD_IN_PROGRESS) 3626 goto fail; 3627 } 3628 3629 if ((error = run_txrx_enable(sc)) != 0) 3630 goto fail; 3631 3632 ifp->if_flags &= ~IFF_OACTIVE; 3633 ifp->if_flags |= IFF_RUNNING; 3634 3635 if (ic->ic_opmode == IEEE80211_M_MONITOR) 3636 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 3637 else 3638 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 3639 3640 if (error != 0) 3641 fail: run_stop(ifp, 1); 3642 return error; 3643 } 3644 3645 static void 3646 run_stop(struct ifnet *ifp, int disable) 3647 { 3648 struct run_softc *sc = ifp->if_softc; 3649 struct ieee80211com *ic = &sc->sc_ic; 3650 uint32_t tmp; 3651 int ntries, qid; 3652 3653 if (ifp->if_flags & IFF_RUNNING) 3654 run_set_leds(sc, 0); /* turn all LEDs off */ 3655 3656 sc->sc_tx_timer = 0; 3657 ifp->if_timer = 0; 3658 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 3659 3660 callout_stop(&sc->scan_to); 3661 callout_stop(&sc->calib_to); 3662 3663 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 3664 /* wait for all queued asynchronous commands to complete */ 3665 while (sc->cmdq.queued > 0) 3666 tsleep(&sc->cmdq, 0, "cmdq", 0); 3667 3668 /* disable Tx/Rx */ 3669 run_read(sc, RT2860_MAC_SYS_CTRL, &tmp); 3670 tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3671 run_write(sc, RT2860_MAC_SYS_CTRL, tmp); 3672 3673 /* wait for pending Tx to complete */ 3674 for (ntries = 0; ntries < 100; ntries++) { 3675 if (run_read(sc, RT2860_TXRXQ_PCNT, &tmp) != 0) 3676 break; 3677 if ((tmp & RT2860_TX2Q_PCNT_MASK) == 0) 3678 break; 3679 } 3680 DELAY(1000); 3681 run_write(sc, RT2860_USB_DMA_CFG, 0); 3682 3683 /* reset adapter */ 3684 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST); 3685 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3686 3687 /* reset Tx and Rx rings */ 3688 sc->qfullmsk = 0; 3689 for (qid = 0; qid < 4; qid++) 3690 run_free_tx_ring(sc, qid); 3691 run_free_rx_ring(sc); 3692 } 3693 3694 #ifndef IEEE80211_STA_ONLY 3695 static int 3696 run_setup_beacon(struct run_softc *sc) 3697 { 3698 struct ieee80211com *ic = &sc->sc_ic; 3699 struct rt2860_txwi txwi; 3700 struct mbuf *m; 3701 int ridx; 3702 3703 if ((m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo)) == NULL) 3704 return ENOBUFS; 3705 3706 memset(&txwi, 0, sizeof(txwi)); 3707 txwi.wcid = 0xff; 3708 txwi.len = htole16(m->m_pkthdr.len); 3709 /* send beacons at the lowest available rate */ 3710 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 3711 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 3712 txwi.phy = htole16(rt2860_rates[ridx].mcs); 3713 if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM) 3714 txwi.phy |= htole16(RT2860_PHY_OFDM); 3715 txwi.txop = RT2860_TX_TXOP_HT; 3716 txwi.flags = RT2860_TX_TS; 3717 3718 run_write_region_1(sc, RT2860_BCN_BASE(0), 3719 (uint8_t *)&txwi, sizeof(txwi)); 3720 run_write_region_1(sc, RT2860_BCN_BASE(0) + sizeof(txwi), 3721 mtod(m, uint8_t *), m->m_pkthdr.len); 3722 3723 m_freem(m); 3724 3725 return 0; 3726 } 3727 #endif 3728 3729 MODULE(MODULE_CLASS_DRIVER, if_run, "bpf"); 3730 3731 #ifdef _MODULE 3732 #include "ioconf.c" 3733 #endif 3734 3735 static int 3736 if_run_modcmd(modcmd_t cmd, void *arg) 3737 { 3738 int error = 0; 3739 3740 switch (cmd) { 3741 case MODULE_CMD_INIT: 3742 #ifdef _MODULE 3743 error = config_init_component(cfdriver_ioconf_run, 3744 cfattach_ioconf_run, cfdata_ioconf_run); 3745 #endif 3746 return error; 3747 case MODULE_CMD_FINI: 3748 #ifdef _MODULE 3749 error = config_fini_component(cfdriver_ioconf_run, 3750 cfattach_ioconf_run, cfdata_ioconf_run); 3751 #endif 3752 return error; 3753 default: 3754 return ENOTTY; 3755 } 3756 } 3757
Indexes created Thu Oct 02 10:09:58 GMT 2025