if_run.c revision 1.10.4.5
1 /* $NetBSD: if_run.c,v 1.10.4.5 2020/06/16 10:34:49 bouyer Exp $ */ 2 /* $OpenBSD: if_run.c,v 1.90 2012/03/24 15:11:04 jsg Exp $ */ 3 4 /*- 5 * Copyright (c) 2008-2010 Damien Bergamini <damien.bergamini (at) free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Ralink Technology RT2700U/RT2800U/RT3000U chipset driver. 22 * http://www.ralinktech.com/ 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: if_run.c,v 1.10.4.5 2020/06/16 10:34:49 bouyer Exp $"); 27 28 #ifdef _KERNEL_OPT 29 #include "opt_usb.h" 30 #endif 31 32 #include <sys/param.h> 33 #include <sys/sockio.h> 34 #include <sys/sysctl.h> 35 #include <sys/mbuf.h> 36 #include <sys/kernel.h> 37 #include <sys/socket.h> 38 #include <sys/systm.h> 39 #include <sys/malloc.h> 40 #include <sys/callout.h> 41 #include <sys/module.h> 42 #include <sys/conf.h> 43 #include <sys/device.h> 44 45 #include <sys/bus.h> 46 #include <machine/endian.h> 47 #include <sys/intr.h> 48 49 #include <net/bpf.h> 50 #include <net/if.h> 51 #include <net/if_arp.h> 52 #include <net/if_dl.h> 53 #include <net/if_ether.h> 54 #include <net/if_media.h> 55 #include <net/if_types.h> 56 57 #include <net80211/ieee80211_var.h> 58 #include <net80211/ieee80211_amrr.h> 59 #include <net80211/ieee80211_radiotap.h> 60 61 #include <dev/firmload.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdivar.h> 66 #include <dev/usb/usbdi_util.h> 67 #include <dev/usb/usbdevs.h> 68 69 #include <dev/ic/rt2860reg.h> /* shared with ral(4) */ 70 #include <dev/usb/if_runvar.h> 71 72 #ifdef RUN_DEBUG 73 #define DPRINTF(x) do { if (run_debug) printf x; } while (0) 74 #define DPRINTFN(n, x) do { if (run_debug >= (n)) printf x; } while (0) 75 int run_debug = 0; 76 #else 77 #define DPRINTF(x) 78 #define DPRINTFN(n, x) 79 #endif 80 81 #define USB_ID(v, p) { USB_VENDOR_##v, USB_PRODUCT_##v##_##p } 82 static const struct usb_devno run_devs[] = { 83 USB_ID(ABOCOM, RT2770), 84 USB_ID(ABOCOM, RT2870), 85 USB_ID(ABOCOM, RT3070), 86 USB_ID(ABOCOM, RT3071), 87 USB_ID(ABOCOM, RT3072), 88 USB_ID(ABOCOM2, RT2870_1), 89 USB_ID(ACCTON, RT2770), 90 USB_ID(ACCTON, RT2870_1), 91 USB_ID(ACCTON, RT2870_2), 92 USB_ID(ACCTON, RT2870_3), 93 USB_ID(ACCTON, RT2870_4), 94 USB_ID(ACCTON, RT2870_5), 95 USB_ID(ACCTON, RT3070), 96 USB_ID(ACCTON, RT3070_1), 97 USB_ID(ACCTON, RT3070_2), 98 USB_ID(ACCTON, RT3070_3), 99 USB_ID(ACCTON, RT3070_4), 100 USB_ID(ACCTON, RT3070_5), 101 USB_ID(ACCTON, RT3070_6), 102 USB_ID(AIRTIES, RT3070), 103 USB_ID(AIRTIES, RT3070_2), 104 USB_ID(ALLWIN, RT2070), 105 USB_ID(ALLWIN, RT2770), 106 USB_ID(ALLWIN, RT2870), 107 USB_ID(ALLWIN, RT3070), 108 USB_ID(ALLWIN, RT3071), 109 USB_ID(ALLWIN, RT3072), 110 USB_ID(ALLWIN, RT3572), 111 USB_ID(AMIGO, RT2870_1), 112 USB_ID(AMIGO, RT2870_2), 113 USB_ID(AMIT, CGWLUSB2GNR), 114 USB_ID(AMIT, RT2870_1), 115 USB_ID(AMIT2, RT2870), 116 USB_ID(ASUSTEK, RT2870_1), 117 USB_ID(ASUSTEK, RT2870_2), 118 USB_ID(ASUSTEK, RT2870_3), 119 USB_ID(ASUSTEK, RT2870_4), 120 USB_ID(ASUSTEK, RT2870_5), 121 USB_ID(ASUSTEK, RT3070), 122 USB_ID(ASUSTEK, RT3070_1), 123 USB_ID(ASUSTEK2, USBN11), 124 USB_ID(AZUREWAVE, RT2870_1), 125 USB_ID(AZUREWAVE, RT2870_2), 126 USB_ID(AZUREWAVE, RT3070), 127 USB_ID(AZUREWAVE, RT3070_2), 128 USB_ID(AZUREWAVE, RT3070_3), 129 USB_ID(AZUREWAVE, RT3070_4), 130 USB_ID(AZUREWAVE, RT3070_5), 131 USB_ID(BELKIN, F5D8053V3), 132 USB_ID(BELKIN, F5D8055), 133 USB_ID(BELKIN, F5D8055V2), 134 USB_ID(BELKIN, F6D4050V1), 135 USB_ID(BELKIN, F6D4050V2), 136 USB_ID(BELKIN, F7D1101V2), 137 USB_ID(BELKIN, RT2870_1), 138 USB_ID(BELKIN, RT2870_2), 139 USB_ID(BEWAN, RT3070), 140 USB_ID(CISCOLINKSYS, AE1000), 141 USB_ID(CISCOLINKSYS, AM10), 142 USB_ID(CISCOLINKSYS2, RT3070), 143 USB_ID(CISCOLINKSYS3, RT3070), 144 USB_ID(CONCEPTRONIC, RT2870_1), 145 USB_ID(CONCEPTRONIC, RT2870_2), 146 USB_ID(CONCEPTRONIC, RT2870_3), 147 USB_ID(CONCEPTRONIC, RT2870_4), 148 USB_ID(CONCEPTRONIC, RT2870_5), 149 USB_ID(CONCEPTRONIC, RT2870_6), 150 USB_ID(CONCEPTRONIC, RT2870_7), 151 USB_ID(CONCEPTRONIC, RT2870_8), 152 USB_ID(CONCEPTRONIC, RT3070_1), 153 USB_ID(CONCEPTRONIC, RT3070_2), 154 USB_ID(CONCEPTRONIC, RT3070_3), 155 USB_ID(COREGA, CGWLUSB300GNM), 156 USB_ID(COREGA, RT2870_1), 157 USB_ID(COREGA, RT2870_2), 158 USB_ID(COREGA, RT2870_3), 159 USB_ID(COREGA, RT3070), 160 USB_ID(CYBERTAN, RT2870), 161 USB_ID(DLINK, RT2870), 162 USB_ID(DLINK, RT3072), 163 USB_ID(DLINK2, DWA130), 164 USB_ID(DLINK2, RT2870_1), 165 USB_ID(DLINK2, RT2870_2), 166 USB_ID(DLINK2, RT3070_1), 167 USB_ID(DLINK2, RT3070_2), 168 USB_ID(DLINK2, RT3070_3), 169 USB_ID(DLINK2, RT3070_4), 170 USB_ID(DLINK2, RT3070_5), 171 USB_ID(DLINK2, RT3072), 172 USB_ID(DLINK2, RT3072_1), 173 USB_ID(DVICO, RT3070), 174 USB_ID(EDIMAX, EW7717), 175 USB_ID(EDIMAX, EW7718), 176 USB_ID(EDIMAX, EW7722UTN), 177 USB_ID(EDIMAX, RT2870_1), 178 USB_ID(ENCORE, RT3070), 179 USB_ID(ENCORE, RT3070_2), 180 USB_ID(ENCORE, RT3070_3), 181 USB_ID(GIGABYTE, GNWB31N), 182 USB_ID(GIGABYTE, GNWB32L), 183 USB_ID(GIGABYTE, RT2870_1), 184 USB_ID(GIGASET, RT3070_1), 185 USB_ID(GIGASET, RT3070_2), 186 USB_ID(GUILLEMOT, HWNU300), 187 USB_ID(HAWKING, HWUN2), 188 USB_ID(HAWKING, RT2870_1), 189 USB_ID(HAWKING, RT2870_2), 190 USB_ID(HAWKING, RT2870_3), 191 USB_ID(HAWKING, RT2870_4), 192 USB_ID(HAWKING, RT2870_5), 193 USB_ID(HAWKING, RT3070), 194 USB_ID(IODATA, RT3072_1), 195 USB_ID(IODATA, RT3072_2), 196 USB_ID(IODATA, RT3072_3), 197 USB_ID(IODATA, RT3072_4), 198 USB_ID(LINKSYS4, RT3070), 199 USB_ID(LINKSYS4, WUSB100), 200 USB_ID(LINKSYS4, WUSB54GC_3), 201 USB_ID(LINKSYS4, WUSB600N), 202 USB_ID(LINKSYS4, WUSB600NV2), 203 USB_ID(LOGITEC, LANW300NU2), 204 USB_ID(LOGITEC, RT2870_1), 205 USB_ID(LOGITEC, RT2870_2), 206 USB_ID(LOGITEC, RT2870_3), 207 USB_ID(LOGITEC, RT3020), 208 USB_ID(MELCO, RT2870_1), 209 USB_ID(MELCO, RT2870_2), 210 USB_ID(MELCO, WLIUCAG300N), 211 USB_ID(MELCO, WLIUCG300N), 212 USB_ID(MELCO, WLIUCG301N), 213 USB_ID(MELCO, WLIUCGN), 214 USB_ID(MELCO, WLIUCGNHP), 215 USB_ID(MELCO, WLIUCGNM), 216 USB_ID(MELCO, WLIUCGNM2T), 217 USB_ID(MOTOROLA4, RT2770), 218 USB_ID(MOTOROLA4, RT3070), 219 USB_ID(MSI, RT3070), 220 USB_ID(MSI, RT3070_2), 221 USB_ID(MSI, RT3070_3), 222 USB_ID(MSI, RT3070_4), 223 USB_ID(MSI, RT3070_5), 224 USB_ID(MSI, RT3070_6), 225 USB_ID(MSI, RT3070_7), 226 USB_ID(MSI, RT3070_8), 227 USB_ID(MSI, RT3070_9), 228 USB_ID(MSI, RT3070_10), 229 USB_ID(MSI, RT3070_11), 230 USB_ID(MSI, RT3070_12), 231 USB_ID(MSI, RT3070_13), 232 USB_ID(MSI, RT3070_14), 233 USB_ID(MSI, RT3070_15), 234 USB_ID(OVISLINK, RT3071), 235 USB_ID(OVISLINK, RT3072), 236 USB_ID(PARA, RT3070), 237 USB_ID(PEGATRON, RT2870), 238 USB_ID(PEGATRON, RT3070), 239 USB_ID(PEGATRON, RT3070_2), 240 USB_ID(PEGATRON, RT3070_3), 241 USB_ID(PEGATRON, RT3072), 242 USB_ID(PHILIPS, RT2870), 243 USB_ID(PLANEX2, GWUS300MINIS), 244 USB_ID(PLANEX2, GWUSMICRO300), 245 USB_ID(PLANEX2, GWUSMICRON), 246 USB_ID(PLANEX2, GWUS300MINIX), 247 USB_ID(PLANEX2, RT3070), 248 USB_ID(QCOM, RT2870), 249 USB_ID(QUANTA, RT3070), 250 USB_ID(RALINK, RT2070), 251 USB_ID(RALINK, RT2770), 252 USB_ID(RALINK, RT2870), 253 USB_ID(RALINK, RT3070), 254 USB_ID(RALINK, RT3071), 255 USB_ID(RALINK, RT3072), 256 USB_ID(RALINK, RT3370), 257 USB_ID(RALINK, RT3572), 258 USB_ID(RALINK, RT8070), 259 USB_ID(SAMSUNG, RT2870_1), 260 USB_ID(SENAO, RT2870_1), 261 USB_ID(SENAO, RT2870_2), 262 USB_ID(SENAO, RT2870_3), 263 USB_ID(SENAO, RT2870_4), 264 USB_ID(SENAO, RT3070), 265 USB_ID(SENAO, RT3071), 266 USB_ID(SENAO, RT3072), 267 USB_ID(SENAO, RT3072_2), 268 USB_ID(SENAO, RT3072_3), 269 USB_ID(SENAO, RT3072_4), 270 USB_ID(SENAO, RT3072_5), 271 USB_ID(SITECOMEU, RT2870_1), 272 USB_ID(SITECOMEU, RT2870_2), 273 USB_ID(SITECOMEU, RT2870_3), 274 USB_ID(SITECOMEU, RT3070_1), 275 USB_ID(SITECOMEU, RT3072_3), 276 USB_ID(SITECOMEU, RT3072_4), 277 USB_ID(SITECOMEU, RT3072_5), 278 USB_ID(SITECOMEU, WL302), 279 USB_ID(SITECOMEU, WL315), 280 USB_ID(SITECOMEU, WL321), 281 USB_ID(SITECOMEU, WL324), 282 USB_ID(SITECOMEU, WL329), 283 USB_ID(SITECOMEU, WL343), 284 USB_ID(SITECOMEU, WL344), 285 USB_ID(SITECOMEU, WL345), 286 USB_ID(SITECOMEU, WL349V4), 287 USB_ID(SITECOMEU, WL608), 288 USB_ID(SITECOMEU, WLA4000), 289 USB_ID(SITECOMEU, WLA5000), 290 USB_ID(SPARKLAN, RT2870_1), 291 USB_ID(SPARKLAN, RT2870_2), 292 USB_ID(SPARKLAN, RT3070), 293 USB_ID(SWEEX2, LW153), 294 USB_ID(SWEEX2, LW303), 295 USB_ID(SWEEX2, LW313), 296 USB_ID(TOSHIBA, RT3070), 297 USB_ID(UMEDIA, RT2870_1), 298 USB_ID(UMEDIA, TEW645UB), 299 USB_ID(ZCOM, RT2870_1), 300 USB_ID(ZCOM, RT2870_2), 301 USB_ID(ZINWELL, RT2870_1), 302 USB_ID(ZINWELL, RT2870_2), 303 USB_ID(ZINWELL, RT3070), 304 USB_ID(ZINWELL, RT3072), 305 USB_ID(ZINWELL, RT3072_2), 306 USB_ID(ZYXEL, NWD2105), 307 USB_ID(ZYXEL, NWD211AN), 308 USB_ID(ZYXEL, RT2870_1), 309 USB_ID(ZYXEL, RT2870_2), 310 USB_ID(ZYXEL, RT3070), 311 }; 312 313 static int run_match(device_t, cfdata_t, void *); 314 static void run_attach(device_t, device_t, void *); 315 static int run_detach(device_t, int); 316 static int run_activate(device_t, enum devact); 317 318 CFATTACH_DECL_NEW(run, sizeof(struct run_softc), 319 run_match, run_attach, run_detach, run_activate); 320 321 static int run_alloc_rx_ring(struct run_softc *); 322 static void run_free_rx_ring(struct run_softc *); 323 static int run_alloc_tx_ring(struct run_softc *, int); 324 static void run_free_tx_ring(struct run_softc *, int); 325 static int run_load_microcode(struct run_softc *); 326 static int run_reset(struct run_softc *); 327 static int run_read(struct run_softc *, uint16_t, uint32_t *); 328 static int run_read_region_1(struct run_softc *, uint16_t, 329 uint8_t *, int); 330 static int run_write_2(struct run_softc *, uint16_t, uint16_t); 331 static int run_write(struct run_softc *, uint16_t, uint32_t); 332 static int run_write_region_1(struct run_softc *, uint16_t, 333 const uint8_t *, int); 334 static int run_set_region_4(struct run_softc *, uint16_t, 335 uint32_t, int); 336 static int run_efuse_read_2(struct run_softc *, uint16_t, 337 uint16_t *); 338 static int run_eeprom_read_2(struct run_softc *, uint16_t, 339 uint16_t *); 340 static int run_rt2870_rf_write(struct run_softc *, uint8_t, 341 uint32_t); 342 static int run_rt3070_rf_read(struct run_softc *, uint8_t, 343 uint8_t *); 344 static int run_rt3070_rf_write(struct run_softc *, uint8_t, 345 uint8_t); 346 static int run_bbp_read(struct run_softc *, uint8_t, uint8_t *); 347 static int run_bbp_write(struct run_softc *, uint8_t, uint8_t); 348 static int run_mcu_cmd(struct run_softc *, uint8_t, uint16_t); 349 static const char * run_get_rf(int); 350 static int run_read_eeprom(struct run_softc *); 351 static struct ieee80211_node * 352 run_node_alloc(struct ieee80211_node_table *); 353 static int run_media_change(struct ifnet *); 354 static void run_next_scan(void *); 355 static void run_task(void *); 356 static void run_do_async(struct run_softc *, 357 void (*)(struct run_softc *, void *), void *, int); 358 static int run_newstate(struct ieee80211com *, 359 enum ieee80211_state, int); 360 static void run_newstate_cb(struct run_softc *, void *); 361 static int run_updateedca(struct ieee80211com *); 362 static void run_updateedca_cb(struct run_softc *, void *); 363 #ifdef RUN_HWCRYPTO 364 static int run_set_key(struct ieee80211com *, 365 const struct ieee80211_key *, const uint8_t *); 366 static void run_set_key_cb(struct run_softc *, void *); 367 static int run_delete_key(struct ieee80211com *, 368 const struct ieee80211_key *); 369 static void run_delete_key_cb(struct run_softc *, void *); 370 #endif 371 static void run_calibrate_to(void *); 372 static void run_calibrate_cb(struct run_softc *, void *); 373 static void run_newassoc(struct ieee80211_node *, int); 374 static void run_rx_frame(struct run_softc *, uint8_t *, int); 375 static void run_rxeof(struct usbd_xfer *, void *, 376 usbd_status); 377 static void run_txeof(struct usbd_xfer *, void *, 378 usbd_status); 379 static int run_tx(struct run_softc *, struct mbuf *, 380 struct ieee80211_node *); 381 static void run_start(struct ifnet *); 382 static void run_watchdog(struct ifnet *); 383 static int run_ioctl(struct ifnet *, u_long, void *); 384 static void run_select_chan_group(struct run_softc *, int); 385 static void run_set_agc(struct run_softc *, uint8_t); 386 static void run_set_rx_antenna(struct run_softc *, int); 387 static void run_rt2870_set_chan(struct run_softc *, u_int); 388 static void run_rt3070_set_chan(struct run_softc *, u_int); 389 static void run_rt3572_set_chan(struct run_softc *, u_int); 390 static int run_set_chan(struct run_softc *, 391 struct ieee80211_channel *); 392 static void run_enable_tsf_sync(struct run_softc *); 393 static void run_enable_mrr(struct run_softc *); 394 static void run_set_txpreamble(struct run_softc *); 395 static void run_set_basicrates(struct run_softc *); 396 static void run_set_leds(struct run_softc *, uint16_t); 397 static void run_set_bssid(struct run_softc *, const uint8_t *); 398 static void run_set_macaddr(struct run_softc *, const uint8_t *); 399 static void run_updateslot(struct ifnet *); 400 static void run_updateslot_cb(struct run_softc *, void *); 401 static int8_t run_rssi2dbm(struct run_softc *, uint8_t, uint8_t); 402 static int run_bbp_init(struct run_softc *); 403 static int run_rt3070_rf_init(struct run_softc *); 404 static int run_rt3070_filter_calib(struct run_softc *, uint8_t, 405 uint8_t, uint8_t *); 406 static void run_rt3070_rf_setup(struct run_softc *); 407 static int run_txrx_enable(struct run_softc *); 408 static int run_init(struct ifnet *); 409 static void run_stop(struct ifnet *, int); 410 #ifndef IEEE80211_STA_ONLY 411 static int run_setup_beacon(struct run_softc *); 412 #endif 413 414 static const struct { 415 uint32_t reg; 416 uint32_t val; 417 } rt2870_def_mac[] = { 418 RT2870_DEF_MAC 419 }; 420 421 static const struct { 422 uint8_t reg; 423 uint8_t val; 424 } rt2860_def_bbp[] = { 425 RT2860_DEF_BBP 426 }; 427 428 static const struct rfprog { 429 uint8_t chan; 430 uint32_t r1, r2, r3, r4; 431 } rt2860_rf2850[] = { 432 RT2860_RF2850 433 }; 434 435 static const struct { 436 uint8_t n, r, k; 437 } rt3070_freqs[] = { 438 RT3070_RF3052 439 }; 440 441 static const struct { 442 uint8_t reg; 443 uint8_t val; 444 } rt3070_def_rf[] = { 445 RT3070_DEF_RF 446 }, rt3572_def_rf[] = { 447 RT3572_DEF_RF 448 }; 449 450 static int 451 firmware_load(const char *dname, const char *iname, uint8_t **ucodep, 452 size_t *sizep) 453 { 454 firmware_handle_t fh; 455 int error; 456 457 if ((error = firmware_open(dname, iname, &fh)) != 0) 458 return error; 459 *sizep = firmware_get_size(fh); 460 if ((*ucodep = firmware_malloc(*sizep)) == NULL) { 461 firmware_close(fh); 462 return ENOMEM; 463 } 464 if ((error = firmware_read(fh, 0, *ucodep, *sizep)) != 0) 465 firmware_free(*ucodep, *sizep); 466 firmware_close(fh); 467 468 return error; 469 } 470 471 static int 472 run_match(device_t parent, cfdata_t match, void *aux) 473 { 474 struct usb_attach_arg *uaa = aux; 475 476 return (usb_lookup(run_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 477 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 478 } 479 480 static void 481 run_attach(device_t parent, device_t self, void *aux) 482 { 483 struct run_softc *sc = device_private(self); 484 struct usb_attach_arg *uaa = aux; 485 struct ieee80211com *ic = &sc->sc_ic; 486 struct ifnet *ifp = &sc->sc_if; 487 usb_interface_descriptor_t *id; 488 usb_endpoint_descriptor_t *ed; 489 char *devinfop; 490 int i, nrx, ntx, ntries, error; 491 uint32_t ver; 492 493 aprint_naive("\n"); 494 aprint_normal("\n"); 495 496 sc->sc_dev = self; 497 sc->sc_udev = uaa->uaa_device; 498 499 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 500 aprint_normal_dev(sc->sc_dev, "%s\n", devinfop); 501 usbd_devinfo_free(devinfop); 502 503 error = usbd_set_config_no(sc->sc_udev, 1, 0); 504 if (error != 0) { 505 aprint_error_dev(sc->sc_dev, "failed to set configuration" 506 ", err=%s\n", usbd_errstr(error)); 507 return; 508 } 509 510 /* get the first interface handle */ 511 error = usbd_device2interface_handle(sc->sc_udev, 0, &sc->sc_iface); 512 if (error != 0) { 513 aprint_error_dev(sc->sc_dev, 514 "could not get interface handle\n"); 515 return; 516 } 517 518 /* 519 * Find all bulk endpoints. There are 7 bulk endpoints: 1 for RX 520 * and 6 for TX (4 EDCAs + HCCA + Prio). 521 * Update 03-14-2009: some devices like the Planex GW-US300MiniS 522 * seem to have only 4 TX bulk endpoints (Fukaumi Naoki). 523 */ 524 nrx = ntx = 0; 525 id = usbd_get_interface_descriptor(sc->sc_iface); 526 for (i = 0; i < id->bNumEndpoints; i++) { 527 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 528 if (ed == NULL || UE_GET_XFERTYPE(ed->bmAttributes) != UE_BULK) 529 continue; 530 531 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) { 532 sc->rxq.pipe_no = ed->bEndpointAddress; 533 nrx++; 534 } else if (ntx < 4) { 535 sc->txq[ntx].pipe_no = ed->bEndpointAddress; 536 ntx++; 537 } 538 } 539 /* make sure we've got them all */ 540 if (nrx < 1 || ntx < 4) { 541 aprint_error_dev(sc->sc_dev, "missing endpoint\n"); 542 return; 543 } 544 545 usb_init_task(&sc->sc_task, run_task, sc, 0); 546 callout_init(&sc->scan_to, 0); 547 callout_setfunc(&sc->scan_to, run_next_scan, sc); 548 callout_init(&sc->calib_to, 0); 549 callout_setfunc(&sc->calib_to, run_calibrate_to, sc); 550 551 sc->amrr.amrr_min_success_threshold = 1; 552 sc->amrr.amrr_max_success_threshold = 10; 553 554 /* wait for the chip to settle */ 555 for (ntries = 0; ntries < 100; ntries++) { 556 if (run_read(sc, RT2860_ASIC_VER_ID, &ver) != 0) 557 return; 558 if (ver != 0 && ver != 0xffffffff) 559 break; 560 DELAY(10); 561 } 562 if (ntries == 100) { 563 aprint_error_dev(sc->sc_dev, 564 "timeout waiting for NIC to initialize\n"); 565 return; 566 } 567 sc->mac_ver = ver >> 16; 568 sc->mac_rev = ver & 0xffff; 569 570 /* retrieve RF rev. no and various other things from EEPROM */ 571 run_read_eeprom(sc); 572 573 aprint_error_dev(sc->sc_dev, 574 "MAC/BBP RT%04X (rev 0x%04X), RF %s (MIMO %dT%dR), address %s\n", 575 sc->mac_ver, sc->mac_rev, run_get_rf(sc->rf_rev), sc->ntxchains, 576 sc->nrxchains, ether_sprintf(ic->ic_myaddr)); 577 578 ic->ic_ifp = ifp; 579 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 580 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 581 ic->ic_state = IEEE80211_S_INIT; 582 583 /* set device capabilities */ 584 ic->ic_caps = 585 IEEE80211_C_MONITOR | /* monitor mode supported */ 586 #ifndef IEEE80211_STA_ONLY 587 IEEE80211_C_IBSS | /* IBSS mode supported */ 588 IEEE80211_C_HOSTAP | /* HostAP mode supported */ 589 #endif 590 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 591 IEEE80211_C_SHSLOT | /* short slot time supported */ 592 #ifdef RUN_HWCRYPTO 593 IEEE80211_C_WEP | /* WEP */ 594 IEEE80211_C_TKIP | /* TKIP */ 595 IEEE80211_C_AES_CCM | /* AES CCMP */ 596 IEEE80211_C_TKIPMIC | /* TKIPMIC */ 597 #endif 598 IEEE80211_C_WME | /* WME */ 599 IEEE80211_C_WPA; /* WPA/RSN */ 600 601 if (sc->rf_rev == RT2860_RF_2750 || 602 sc->rf_rev == RT2860_RF_2850 || 603 sc->rf_rev == RT3070_RF_3052) { 604 /* set supported .11a rates */ 605 ic->ic_sup_rates[IEEE80211_MODE_11A] = 606 ieee80211_std_rateset_11a; 607 608 /* set supported .11a channels */ 609 for (i = 14; i < (int)__arraycount(rt2860_rf2850); i++) { 610 uint8_t chan = rt2860_rf2850[i].chan; 611 ic->ic_channels[chan].ic_freq = 612 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ); 613 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A; 614 } 615 } 616 617 /* set supported .11b and .11g rates */ 618 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 619 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 620 621 /* set supported .11b and .11g channels (1 through 14) */ 622 for (i = 1; i <= 14; i++) { 623 ic->ic_channels[i].ic_freq = 624 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 625 ic->ic_channels[i].ic_flags = 626 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 627 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 628 } 629 630 ifp->if_softc = sc; 631 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 632 ifp->if_init = run_init; 633 ifp->if_ioctl = run_ioctl; 634 ifp->if_start = run_start; 635 ifp->if_watchdog = run_watchdog; 636 IFQ_SET_READY(&ifp->if_snd); 637 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 638 639 if_attach(ifp); 640 ieee80211_ifattach(ic); 641 ic->ic_node_alloc = run_node_alloc; 642 ic->ic_newassoc = run_newassoc; 643 ic->ic_updateslot = run_updateslot; 644 ic->ic_wme.wme_update = run_updateedca; 645 #ifdef RUN_HWCRYPTO 646 ic->ic_crypto.cs_key_set = run_set_key; 647 ic->ic_crypto.cs_key_delete = run_delete_key; 648 #endif 649 /* override state transition machine */ 650 sc->sc_newstate = ic->ic_newstate; 651 ic->ic_newstate = run_newstate; 652 ieee80211_media_init(ic, run_media_change, ieee80211_media_status); 653 654 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 655 sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 656 &sc->sc_drvbpf); 657 658 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 659 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 660 sc->sc_rxtap.wr_ihdr.it_present = htole32(RUN_RX_RADIOTAP_PRESENT); 661 662 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 663 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 664 sc->sc_txtap.wt_ihdr.it_present = htole32(RUN_TX_RADIOTAP_PRESENT); 665 666 ieee80211_announce(ic); 667 668 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 669 670 if (!pmf_device_register(self, NULL, NULL)) 671 aprint_error_dev(self, "couldn't establish power handler\n"); 672 } 673 674 static int 675 run_detach(device_t self, int flags) 676 { 677 struct run_softc *sc = device_private(self); 678 struct ifnet *ifp = &sc->sc_if; 679 struct ieee80211com *ic = &sc->sc_ic; 680 int s; 681 682 if (ifp->if_softc == NULL) 683 return 0; 684 685 pmf_device_deregister(self); 686 687 s = splnet(); 688 689 sc->sc_flags |= RUN_DETACHING; 690 691 if (ifp->if_flags & IFF_RUNNING) { 692 run_stop(ifp, 0); 693 callout_halt(&sc->scan_to, NULL); 694 callout_halt(&sc->calib_to, NULL); 695 usb_rem_task_wait(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER, 696 NULL); 697 } 698 699 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 700 bpf_detach(ifp); 701 ieee80211_ifdetach(ic); 702 if_detach(ifp); 703 704 splx(s); 705 706 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 707 708 callout_destroy(&sc->scan_to); 709 callout_destroy(&sc->calib_to); 710 711 return 0; 712 } 713 714 static int 715 run_activate(device_t self, enum devact act) 716 { 717 struct run_softc *sc = device_private(self); 718 719 switch (act) { 720 case DVACT_DEACTIVATE: 721 if_deactivate(sc->sc_ic.ic_ifp); 722 return 0; 723 default: 724 return EOPNOTSUPP; 725 } 726 } 727 728 static int 729 run_alloc_rx_ring(struct run_softc *sc) 730 { 731 struct run_rx_ring *rxq = &sc->rxq; 732 int i, error; 733 734 error = usbd_open_pipe(sc->sc_iface, rxq->pipe_no, 0, &rxq->pipeh); 735 if (error != 0) 736 goto fail; 737 738 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 739 struct run_rx_data *data = &rxq->data[i]; 740 741 data->sc = sc; /* backpointer for callbacks */ 742 743 error = usbd_create_xfer(sc->rxq.pipeh, RUN_MAX_RXSZ, 744 0, 0, &data->xfer); 745 if (error) 746 goto fail; 747 748 data->buf = usbd_get_buffer(data->xfer); 749 } 750 if (error != 0) 751 fail: run_free_rx_ring(sc); 752 return error; 753 } 754 755 static void 756 run_free_rx_ring(struct run_softc *sc) 757 { 758 struct run_rx_ring *rxq = &sc->rxq; 759 int i; 760 761 if (rxq->pipeh != NULL) { 762 usbd_abort_pipe(rxq->pipeh); 763 } 764 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 765 if (rxq->data[i].xfer != NULL) 766 usbd_destroy_xfer(rxq->data[i].xfer); 767 rxq->data[i].xfer = NULL; 768 } 769 if (rxq->pipeh != NULL) { 770 usbd_close_pipe(rxq->pipeh); 771 rxq->pipeh = NULL; 772 } 773 } 774 775 static int 776 run_alloc_tx_ring(struct run_softc *sc, int qid) 777 { 778 struct run_tx_ring *txq = &sc->txq[qid]; 779 int i, error; 780 781 txq->cur = txq->queued = 0; 782 783 error = usbd_open_pipe(sc->sc_iface, txq->pipe_no, 0, &txq->pipeh); 784 if (error != 0) 785 goto fail; 786 787 for (i = 0; i < RUN_TX_RING_COUNT; i++) { 788 struct run_tx_data *data = &txq->data[i]; 789 790 data->sc = sc; /* backpointer for callbacks */ 791 data->qid = qid; 792 793 error = usbd_create_xfer(txq->pipeh, RUN_MAX_TXSZ, 794 USBD_FORCE_SHORT_XFER, 0, &data->xfer); 795 if (error) 796 goto fail; 797 798 data->buf = usbd_get_buffer(data->xfer); 799 /* zeroize the TXD + TXWI part */ 800 memset(data->buf, 0, sizeof(struct rt2870_txd) + 801 sizeof(struct rt2860_txwi)); 802 } 803 if (error != 0) 804 fail: run_free_tx_ring(sc, qid); 805 return error; 806 } 807 808 static void 809 run_free_tx_ring(struct run_softc *sc, int qid) 810 { 811 struct run_tx_ring *txq = &sc->txq[qid]; 812 int i; 813 814 if (txq->pipeh != NULL) { 815 usbd_abort_pipe(txq->pipeh); 816 usbd_close_pipe(txq->pipeh); 817 txq->pipeh = NULL; 818 } 819 for (i = 0; i < RUN_TX_RING_COUNT; i++) { 820 if (txq->data[i].xfer != NULL) 821 usbd_destroy_xfer(txq->data[i].xfer); 822 txq->data[i].xfer = NULL; 823 } 824 } 825 826 static int 827 run_load_microcode(struct run_softc *sc) 828 { 829 usb_device_request_t req; 830 const char *fwname; 831 u_char *ucode = NULL; /* XXX gcc 4.8.3: maybe-uninitialized */ 832 size_t size = 0; /* XXX gcc 4.8.3: maybe-uninitialized */ 833 uint32_t tmp; 834 int ntries, error; 835 836 /* RT3071/RT3072 use a different firmware */ 837 if (sc->mac_ver != 0x2860 && 838 sc->mac_ver != 0x2872 && 839 sc->mac_ver != 0x3070) 840 fwname = "run-rt3071"; 841 else 842 fwname = "run-rt2870"; 843 844 if ((error = firmware_load("run", fwname, &ucode, &size)) != 0) { 845 aprint_error_dev(sc->sc_dev, 846 "error %d, could not read firmware %s\n", error, fwname); 847 return error; 848 } 849 if (size != 4096) { 850 aprint_error_dev(sc->sc_dev, 851 "invalid firmware size (should be 4KB)\n"); 852 firmware_free(ucode, size); 853 return EINVAL; 854 } 855 856 run_read(sc, RT2860_ASIC_VER_ID, &tmp); 857 /* write microcode image */ 858 run_write_region_1(sc, RT2870_FW_BASE, ucode, size); 859 firmware_free(ucode, size); 860 run_write(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff); 861 run_write(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff); 862 863 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 864 req.bRequest = RT2870_RESET; 865 USETW(req.wValue, 8); 866 USETW(req.wIndex, 0); 867 USETW(req.wLength, 0); 868 if ((error = usbd_do_request(sc->sc_udev, &req, NULL)) != 0) 869 return error; 870 871 usbd_delay_ms(sc->sc_udev, 10); 872 run_write(sc, RT2860_H2M_MAILBOX, 0); 873 if ((error = run_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0)) != 0) 874 return error; 875 876 /* wait until microcontroller is ready */ 877 for (ntries = 0; ntries < 1000; ntries++) { 878 if ((error = run_read(sc, RT2860_SYS_CTRL, &tmp)) != 0) 879 return error; 880 if (tmp & RT2860_MCU_READY) 881 break; 882 DELAY(1000); 883 } 884 if (ntries == 1000) { 885 aprint_error_dev(sc->sc_dev, 886 "timeout waiting for MCU to initialize\n"); 887 return ETIMEDOUT; 888 } 889 890 sc->sc_flags |= RUN_FWLOADED; 891 892 DPRINTF(("microcode successfully loaded after %d tries\n", ntries)); 893 return 0; 894 } 895 896 static int 897 run_reset(struct run_softc *sc) 898 { 899 usb_device_request_t req; 900 901 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 902 req.bRequest = RT2870_RESET; 903 USETW(req.wValue, 1); 904 USETW(req.wIndex, 0); 905 USETW(req.wLength, 0); 906 return usbd_do_request(sc->sc_udev, &req, NULL); 907 } 908 909 static int 910 run_read(struct run_softc *sc, uint16_t reg, uint32_t *val) 911 { 912 uint32_t tmp; 913 int error; 914 915 error = run_read_region_1(sc, reg, (uint8_t *)&tmp, sizeof(tmp)); 916 if (error == 0) 917 *val = le32toh(tmp); 918 else 919 *val = 0xffffffff; 920 return error; 921 } 922 923 static int 924 run_read_region_1(struct run_softc *sc, uint16_t reg, uint8_t *buf, int len) 925 { 926 usb_device_request_t req; 927 928 req.bmRequestType = UT_READ_VENDOR_DEVICE; 929 req.bRequest = RT2870_READ_REGION_1; 930 USETW(req.wValue, 0); 931 USETW(req.wIndex, reg); 932 USETW(req.wLength, len); 933 return usbd_do_request(sc->sc_udev, &req, buf); 934 } 935 936 static int 937 run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val) 938 { 939 usb_device_request_t req; 940 941 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 942 req.bRequest = RT2870_WRITE_2; 943 USETW(req.wValue, val); 944 USETW(req.wIndex, reg); 945 USETW(req.wLength, 0); 946 return usbd_do_request(sc->sc_udev, &req, NULL); 947 } 948 949 static int 950 run_write(struct run_softc *sc, uint16_t reg, uint32_t val) 951 { 952 int error; 953 954 if ((error = run_write_2(sc, reg, val & 0xffff)) == 0) 955 error = run_write_2(sc, reg + 2, val >> 16); 956 return error; 957 } 958 959 static int 960 run_write_region_1(struct run_softc *sc, uint16_t reg, const uint8_t *buf, 961 int len) 962 { 963 #if 1 964 int i, error = 0; 965 /* 966 * NB: the WRITE_REGION_1 command is not stable on RT2860. 967 * We thus issue multiple WRITE_2 commands instead. 968 */ 969 KASSERT((len & 1) == 0); 970 for (i = 0; i < len && error == 0; i += 2) 971 error = run_write_2(sc, reg + i, buf[i] | buf[i + 1] << 8); 972 return error; 973 #else 974 usb_device_request_t req; 975 976 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 977 req.bRequest = RT2870_WRITE_REGION_1; 978 USETW(req.wValue, 0); 979 USETW(req.wIndex, reg); 980 USETW(req.wLength, len); 981 return usbd_do_request(sc->sc_udev, &req, buf); 982 #endif 983 } 984 985 static int 986 run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int count) 987 { 988 int error = 0; 989 990 for (; count > 0 && error == 0; count--, reg += 4) 991 error = run_write(sc, reg, val); 992 return error; 993 } 994 995 /* Read 16-bit from eFUSE ROM (RT3070 only.) */ 996 static int 997 run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 998 { 999 uint32_t tmp; 1000 uint16_t reg; 1001 int error, ntries; 1002 1003 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1004 return error; 1005 1006 addr *= 2; 1007 /*- 1008 * Read one 16-byte block into registers EFUSE_DATA[0-3]: 1009 * DATA0: F E D C 1010 * DATA1: B A 9 8 1011 * DATA2: 7 6 5 4 1012 * DATA3: 3 2 1 0 1013 */ 1014 tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK); 1015 tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK; 1016 run_write(sc, RT3070_EFUSE_CTRL, tmp); 1017 for (ntries = 0; ntries < 100; ntries++) { 1018 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1019 return error; 1020 if (!(tmp & RT3070_EFSROM_KICK)) 1021 break; 1022 DELAY(2); 1023 } 1024 if (ntries == 100) 1025 return ETIMEDOUT; 1026 1027 if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK) { 1028 *val = 0xffff; /* address not found */ 1029 return 0; 1030 } 1031 /* determine to which 32-bit register our 16-bit word belongs */ 1032 reg = RT3070_EFUSE_DATA3 - (addr & 0xc); 1033 if ((error = run_read(sc, reg, &tmp)) != 0) 1034 return error; 1035 1036 *val = (addr & 2) ? tmp >> 16 : tmp & 0xffff; 1037 return 0; 1038 } 1039 1040 static int 1041 run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 1042 { 1043 usb_device_request_t req; 1044 uint16_t tmp; 1045 int error; 1046 1047 addr *= 2; 1048 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1049 req.bRequest = RT2870_EEPROM_READ; 1050 USETW(req.wValue, 0); 1051 USETW(req.wIndex, addr); 1052 USETW(req.wLength, sizeof(tmp)); 1053 error = usbd_do_request(sc->sc_udev, &req, &tmp); 1054 if (error == 0) 1055 *val = le16toh(tmp); 1056 else 1057 *val = 0xffff; 1058 return error; 1059 } 1060 1061 static __inline int 1062 run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val) 1063 { 1064 1065 /* either eFUSE ROM or EEPROM */ 1066 return sc->sc_srom_read(sc, addr, val); 1067 } 1068 1069 static int 1070 run_rt2870_rf_write(struct run_softc *sc, uint8_t reg, uint32_t val) 1071 { 1072 uint32_t tmp; 1073 int error, ntries; 1074 1075 for (ntries = 0; ntries < 10; ntries++) { 1076 if ((error = run_read(sc, RT2860_RF_CSR_CFG0, &tmp)) != 0) 1077 return error; 1078 if (!(tmp & RT2860_RF_REG_CTRL)) 1079 break; 1080 } 1081 if (ntries == 10) 1082 return ETIMEDOUT; 1083 1084 /* RF registers are 24-bit on the RT2860 */ 1085 tmp = RT2860_RF_REG_CTRL | 24 << RT2860_RF_REG_WIDTH_SHIFT | 1086 (val & 0x3fffff) << 2 | (reg & 3); 1087 return run_write(sc, RT2860_RF_CSR_CFG0, tmp); 1088 } 1089 1090 static int 1091 run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1092 { 1093 uint32_t tmp; 1094 int error, ntries; 1095 1096 for (ntries = 0; ntries < 100; ntries++) { 1097 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1098 return error; 1099 if (!(tmp & RT3070_RF_KICK)) 1100 break; 1101 } 1102 if (ntries == 100) 1103 return ETIMEDOUT; 1104 1105 tmp = RT3070_RF_KICK | reg << 8; 1106 if ((error = run_write(sc, RT3070_RF_CSR_CFG, tmp)) != 0) 1107 return error; 1108 1109 for (ntries = 0; ntries < 100; ntries++) { 1110 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1111 return error; 1112 if (!(tmp & RT3070_RF_KICK)) 1113 break; 1114 } 1115 if (ntries == 100) 1116 return ETIMEDOUT; 1117 1118 *val = tmp & 0xff; 1119 return 0; 1120 } 1121 1122 static int 1123 run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1124 { 1125 uint32_t tmp; 1126 int error, ntries; 1127 1128 for (ntries = 0; ntries < 10; ntries++) { 1129 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1130 return error; 1131 if (!(tmp & RT3070_RF_KICK)) 1132 break; 1133 } 1134 if (ntries == 10) 1135 return ETIMEDOUT; 1136 1137 tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val; 1138 return run_write(sc, RT3070_RF_CSR_CFG, tmp); 1139 } 1140 1141 static int 1142 run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1143 { 1144 uint32_t tmp; 1145 int ntries, error; 1146 1147 for (ntries = 0; ntries < 10; ntries++) { 1148 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1149 return error; 1150 if (!(tmp & RT2860_BBP_CSR_KICK)) 1151 break; 1152 } 1153 if (ntries == 10) 1154 return ETIMEDOUT; 1155 1156 tmp = RT2860_BBP_CSR_READ | RT2860_BBP_CSR_KICK | reg << 8; 1157 if ((error = run_write(sc, RT2860_BBP_CSR_CFG, tmp)) != 0) 1158 return error; 1159 1160 for (ntries = 0; ntries < 10; ntries++) { 1161 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1162 return error; 1163 if (!(tmp & RT2860_BBP_CSR_KICK)) 1164 break; 1165 } 1166 if (ntries == 10) 1167 return ETIMEDOUT; 1168 1169 *val = tmp & 0xff; 1170 return 0; 1171 } 1172 1173 static int 1174 run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1175 { 1176 uint32_t tmp; 1177 int ntries, error; 1178 1179 for (ntries = 0; ntries < 10; ntries++) { 1180 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1181 return error; 1182 if (!(tmp & RT2860_BBP_CSR_KICK)) 1183 break; 1184 } 1185 if (ntries == 10) 1186 return ETIMEDOUT; 1187 1188 tmp = RT2860_BBP_CSR_KICK | reg << 8 | val; 1189 return run_write(sc, RT2860_BBP_CSR_CFG, tmp); 1190 } 1191 1192 /* 1193 * Send a command to the 8051 microcontroller unit. 1194 */ 1195 static int 1196 run_mcu_cmd(struct run_softc *sc, uint8_t cmd, uint16_t arg) 1197 { 1198 uint32_t tmp; 1199 int error, ntries; 1200 1201 for (ntries = 0; ntries < 100; ntries++) { 1202 if ((error = run_read(sc, RT2860_H2M_MAILBOX, &tmp)) != 0) 1203 return error; 1204 if (!(tmp & RT2860_H2M_BUSY)) 1205 break; 1206 } 1207 if (ntries == 100) 1208 return ETIMEDOUT; 1209 1210 tmp = RT2860_H2M_BUSY | RT2860_TOKEN_NO_INTR << 16 | arg; 1211 if ((error = run_write(sc, RT2860_H2M_MAILBOX, tmp)) == 0) 1212 error = run_write(sc, RT2860_HOST_CMD, cmd); 1213 return error; 1214 } 1215 1216 /* 1217 * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word. 1218 * Used to adjust per-rate Tx power registers. 1219 */ 1220 static __inline uint32_t 1221 b4inc(uint32_t b32, int8_t delta) 1222 { 1223 int8_t i, b4; 1224 1225 for (i = 0; i < 8; i++) { 1226 b4 = b32 & 0xf; 1227 b4 += delta; 1228 if (b4 < 0) 1229 b4 = 0; 1230 else if (b4 > 0xf) 1231 b4 = 0xf; 1232 b32 = b32 >> 4 | b4 << 28; 1233 } 1234 return b32; 1235 } 1236 1237 static const char * 1238 run_get_rf(int rev) 1239 { 1240 switch (rev) { 1241 case RT2860_RF_2820: return "RT2820"; 1242 case RT2860_RF_2850: return "RT2850"; 1243 case RT2860_RF_2720: return "RT2720"; 1244 case RT2860_RF_2750: return "RT2750"; 1245 case RT3070_RF_3020: return "RT3020"; 1246 case RT3070_RF_2020: return "RT2020"; 1247 case RT3070_RF_3021: return "RT3021"; 1248 case RT3070_RF_3022: return "RT3022"; 1249 case RT3070_RF_3052: return "RT3052"; 1250 } 1251 return "unknown"; 1252 } 1253 1254 static int 1255 run_read_eeprom(struct run_softc *sc) 1256 { 1257 struct ieee80211com *ic = &sc->sc_ic; 1258 int8_t delta_2ghz, delta_5ghz; 1259 uint32_t tmp; 1260 uint16_t val; 1261 int ridx, ant, i; 1262 1263 /* check whether the ROM is eFUSE ROM or EEPROM */ 1264 sc->sc_srom_read = run_eeprom_read_2; 1265 if (sc->mac_ver >= 0x3070) { 1266 run_read(sc, RT3070_EFUSE_CTRL, &tmp); 1267 DPRINTF(("EFUSE_CTRL=0x%08x\n", tmp)); 1268 if (tmp & RT3070_SEL_EFUSE) 1269 sc->sc_srom_read = run_efuse_read_2; 1270 } 1271 1272 /* read ROM version */ 1273 run_srom_read(sc, RT2860_EEPROM_VERSION, &val); 1274 DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8)); 1275 1276 /* read MAC address */ 1277 run_srom_read(sc, RT2860_EEPROM_MAC01, &val); 1278 ic->ic_myaddr[0] = val & 0xff; 1279 ic->ic_myaddr[1] = val >> 8; 1280 run_srom_read(sc, RT2860_EEPROM_MAC23, &val); 1281 ic->ic_myaddr[2] = val & 0xff; 1282 ic->ic_myaddr[3] = val >> 8; 1283 run_srom_read(sc, RT2860_EEPROM_MAC45, &val); 1284 ic->ic_myaddr[4] = val & 0xff; 1285 ic->ic_myaddr[5] = val >> 8; 1286 1287 /* read vendor BBP settings */ 1288 for (i = 0; i < 10; i++) { 1289 run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val); 1290 sc->bbp[i].val = val & 0xff; 1291 sc->bbp[i].reg = val >> 8; 1292 DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val)); 1293 } 1294 if (sc->mac_ver >= 0x3071) { 1295 /* read vendor RF settings */ 1296 for (i = 0; i < 10; i++) { 1297 run_srom_read(sc, RT3071_EEPROM_RF_BASE + i, &val); 1298 sc->rf[i].val = val & 0xff; 1299 sc->rf[i].reg = val >> 8; 1300 DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg, 1301 sc->rf[i].val)); 1302 } 1303 } 1304 1305 /* read RF frequency offset from EEPROM */ 1306 run_srom_read(sc, RT2860_EEPROM_FREQ_LEDS, &val); 1307 sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0; 1308 DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff)); 1309 1310 if ((val >> 8) != 0xff) { 1311 /* read LEDs operating mode */ 1312 sc->leds = val >> 8; 1313 run_srom_read(sc, RT2860_EEPROM_LED1, &sc->led[0]); 1314 run_srom_read(sc, RT2860_EEPROM_LED2, &sc->led[1]); 1315 run_srom_read(sc, RT2860_EEPROM_LED3, &sc->led[2]); 1316 } else { 1317 /* broken EEPROM, use default settings */ 1318 sc->leds = 0x01; 1319 sc->led[0] = 0x5555; 1320 sc->led[1] = 0x2221; 1321 sc->led[2] = 0x5627; /* differs from RT2860 */ 1322 } 1323 DPRINTF(("EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n", 1324 sc->leds, sc->led[0], sc->led[1], sc->led[2])); 1325 1326 /* read RF information */ 1327 run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val); 1328 if (val == 0xffff) { 1329 DPRINTF(("invalid EEPROM antenna info, using default\n")); 1330 if (sc->mac_ver == 0x3572) { 1331 /* default to RF3052 2T2R */ 1332 sc->rf_rev = RT3070_RF_3052; 1333 sc->ntxchains = 2; 1334 sc->nrxchains = 2; 1335 } else if (sc->mac_ver >= 0x3070) { 1336 /* default to RF3020 1T1R */ 1337 sc->rf_rev = RT3070_RF_3020; 1338 sc->ntxchains = 1; 1339 sc->nrxchains = 1; 1340 } else { 1341 /* default to RF2820 1T2R */ 1342 sc->rf_rev = RT2860_RF_2820; 1343 sc->ntxchains = 1; 1344 sc->nrxchains = 2; 1345 } 1346 } else { 1347 sc->rf_rev = (val >> 8) & 0xf; 1348 sc->ntxchains = (val >> 4) & 0xf; 1349 sc->nrxchains = val & 0xf; 1350 } 1351 DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n", 1352 sc->rf_rev, sc->ntxchains, sc->nrxchains)); 1353 1354 run_srom_read(sc, RT2860_EEPROM_CONFIG, &val); 1355 DPRINTF(("EEPROM CFG 0x%04x\n", val)); 1356 /* check if driver should patch the DAC issue */ 1357 if ((val >> 8) != 0xff) 1358 sc->patch_dac = (val >> 15) & 1; 1359 if ((val & 0xff) != 0xff) { 1360 sc->ext_5ghz_lna = (val >> 3) & 1; 1361 sc->ext_2ghz_lna = (val >> 2) & 1; 1362 /* check if RF supports automatic Tx access gain control */ 1363 sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1; 1364 /* check if we have a hardware radio switch */ 1365 sc->rfswitch = val & 1; 1366 } 1367 1368 /* read power settings for 2GHz channels */ 1369 for (i = 0; i < 14; i += 2) { 1370 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val); 1371 sc->txpow1[i + 0] = (int8_t)(val & 0xff); 1372 sc->txpow1[i + 1] = (int8_t)(val >> 8); 1373 1374 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val); 1375 sc->txpow2[i + 0] = (int8_t)(val & 0xff); 1376 sc->txpow2[i + 1] = (int8_t)(val >> 8); 1377 } 1378 /* fix broken Tx power entries */ 1379 for (i = 0; i < 14; i++) { 1380 if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31) 1381 sc->txpow1[i] = 5; 1382 if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31) 1383 sc->txpow2[i] = 5; 1384 DPRINTF(("chan %d: power1=%d, power2=%d\n", 1385 rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i])); 1386 } 1387 /* read power settings for 5GHz channels */ 1388 for (i = 0; i < 40; i += 2) { 1389 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val); 1390 sc->txpow1[i + 14] = (int8_t)(val & 0xff); 1391 sc->txpow1[i + 15] = (int8_t)(val >> 8); 1392 1393 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val); 1394 sc->txpow2[i + 14] = (int8_t)(val & 0xff); 1395 sc->txpow2[i + 15] = (int8_t)(val >> 8); 1396 } 1397 /* fix broken Tx power entries */ 1398 for (i = 0; i < 40; i++) { 1399 if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15) 1400 sc->txpow1[14 + i] = 5; 1401 if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15) 1402 sc->txpow2[14 + i] = 5; 1403 DPRINTF(("chan %d: power1=%d, power2=%d\n", 1404 rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i], 1405 sc->txpow2[14 + i])); 1406 } 1407 1408 /* read Tx power compensation for each Tx rate */ 1409 run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val); 1410 delta_2ghz = delta_5ghz = 0; 1411 if ((val & 0xff) != 0xff && (val & 0x80)) { 1412 delta_2ghz = val & 0xf; 1413 if (!(val & 0x40)) /* negative number */ 1414 delta_2ghz = -delta_2ghz; 1415 } 1416 val >>= 8; 1417 if ((val & 0xff) != 0xff && (val & 0x80)) { 1418 delta_5ghz = val & 0xf; 1419 if (!(val & 0x40)) /* negative number */ 1420 delta_5ghz = -delta_5ghz; 1421 } 1422 DPRINTF(("power compensation=%d (2GHz), %d (5GHz)\n", 1423 delta_2ghz, delta_5ghz)); 1424 1425 for (ridx = 0; ridx < 5; ridx++) { 1426 uint32_t reg; 1427 1428 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val); 1429 reg = val; 1430 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val); 1431 reg |= (uint32_t)val << 16; 1432 1433 sc->txpow20mhz[ridx] = reg; 1434 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz); 1435 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz); 1436 1437 DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, " 1438 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx], 1439 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx])); 1440 } 1441 1442 /* read RSSI offsets and LNA gains from EEPROM */ 1443 run_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ, &val); 1444 sc->rssi_2ghz[0] = val & 0xff; /* Ant A */ 1445 sc->rssi_2ghz[1] = val >> 8; /* Ant B */ 1446 run_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ, &val); 1447 if (sc->mac_ver >= 0x3070) { 1448 /* 1449 * On RT3070 chips (limited to 2 Rx chains), this ROM 1450 * field contains the Tx mixer gain for the 2GHz band. 1451 */ 1452 if ((val & 0xff) != 0xff) 1453 sc->txmixgain_2ghz = val & 0x7; 1454 DPRINTF(("tx mixer gain=%u (2GHz)\n", sc->txmixgain_2ghz)); 1455 } else { 1456 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */ 1457 } 1458 sc->lna[2] = val >> 8; /* channel group 2 */ 1459 1460 run_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ, &val); 1461 sc->rssi_5ghz[0] = val & 0xff; /* Ant A */ 1462 sc->rssi_5ghz[1] = val >> 8; /* Ant B */ 1463 run_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ, &val); 1464 if (sc->mac_ver == 0x3572) { 1465 /* 1466 * On RT3572 chips (limited to 2 Rx chains), this ROM 1467 * field contains the Tx mixer gain for the 5GHz band. 1468 */ 1469 if ((val & 0xff) != 0xff) 1470 sc->txmixgain_5ghz = val & 0x7; 1471 DPRINTF(("tx mixer gain=%u (5GHz)\n", sc->txmixgain_5ghz)); 1472 } else { 1473 sc->rssi_5ghz[2] = val & 0xff; /* Ant C */ 1474 } 1475 sc->lna[3] = val >> 8; /* channel group 3 */ 1476 1477 run_srom_read(sc, RT2860_EEPROM_LNA, &val); 1478 sc->lna[0] = val & 0xff; /* channel group 0 */ 1479 sc->lna[1] = val >> 8; /* channel group 1 */ 1480 1481 /* fix broken 5GHz LNA entries */ 1482 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) { 1483 DPRINTF(("invalid LNA for channel group %d\n", 2)); 1484 sc->lna[2] = sc->lna[1]; 1485 } 1486 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) { 1487 DPRINTF(("invalid LNA for channel group %d\n", 3)); 1488 sc->lna[3] = sc->lna[1]; 1489 } 1490 1491 /* fix broken RSSI offset entries */ 1492 for (ant = 0; ant < 3; ant++) { 1493 if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) { 1494 DPRINTF(("invalid RSSI%d offset: %d (2GHz)\n", 1495 ant + 1, sc->rssi_2ghz[ant])); 1496 sc->rssi_2ghz[ant] = 0; 1497 } 1498 if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) { 1499 DPRINTF(("invalid RSSI%d offset: %d (5GHz)\n", 1500 ant + 1, sc->rssi_5ghz[ant])); 1501 sc->rssi_5ghz[ant] = 0; 1502 } 1503 } 1504 return 0; 1505 } 1506 1507 static struct ieee80211_node * 1508 run_node_alloc(struct ieee80211_node_table *nt) 1509 { 1510 struct run_node *rn = 1511 malloc(sizeof(struct run_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1512 return rn ? &rn->ni : NULL; 1513 } 1514 1515 static int 1516 run_media_change(struct ifnet *ifp) 1517 { 1518 struct run_softc *sc = ifp->if_softc; 1519 struct ieee80211com *ic = &sc->sc_ic; 1520 uint8_t rate, ridx; 1521 int error; 1522 1523 error = ieee80211_media_change(ifp); 1524 if (error != ENETRESET) 1525 return error; 1526 1527 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1528 rate = ic->ic_sup_rates[ic->ic_curmode]. 1529 rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL; 1530 for (ridx = 0; ridx <= RT2860_RIDX_MAX; ridx++) 1531 if (rt2860_rates[ridx].rate == rate) 1532 break; 1533 sc->fixed_ridx = ridx; 1534 } 1535 1536 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1537 run_init(ifp); 1538 1539 return 0; 1540 } 1541 1542 static void 1543 run_next_scan(void *arg) 1544 { 1545 struct run_softc *sc = arg; 1546 1547 if (sc->sc_ic.ic_state == IEEE80211_S_SCAN) 1548 ieee80211_next_scan(&sc->sc_ic); 1549 } 1550 1551 static void 1552 run_task(void *arg) 1553 { 1554 struct run_softc *sc = arg; 1555 struct run_host_cmd_ring *ring = &sc->cmdq; 1556 struct run_host_cmd *cmd; 1557 int s; 1558 1559 /* process host commands */ 1560 s = splusb(); 1561 while (ring->next != ring->cur) { 1562 cmd = &ring->cmd[ring->next]; 1563 splx(s); 1564 /* callback */ 1565 cmd->cb(sc, cmd->data); 1566 s = splusb(); 1567 ring->queued--; 1568 ring->next = (ring->next + 1) % RUN_HOST_CMD_RING_COUNT; 1569 } 1570 wakeup(ring); 1571 splx(s); 1572 } 1573 1574 static void 1575 run_do_async(struct run_softc *sc, void (*cb)(struct run_softc *, void *), 1576 void *arg, int len) 1577 { 1578 struct run_host_cmd_ring *ring = &sc->cmdq; 1579 struct run_host_cmd *cmd; 1580 int s; 1581 1582 if (sc->sc_flags & RUN_DETACHING) 1583 return; 1584 1585 s = splusb(); 1586 cmd = &ring->cmd[ring->cur]; 1587 cmd->cb = cb; 1588 KASSERT(len <= sizeof(cmd->data)); 1589 memcpy(cmd->data, arg, len); 1590 ring->cur = (ring->cur + 1) % RUN_HOST_CMD_RING_COUNT; 1591 1592 /* if there is no pending command already, schedule a task */ 1593 if (++ring->queued == 1) 1594 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 1595 splx(s); 1596 } 1597 1598 static int 1599 run_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1600 { 1601 struct run_softc *sc = ic->ic_ifp->if_softc; 1602 struct run_cmd_newstate cmd; 1603 1604 callout_stop(&sc->scan_to); 1605 callout_stop(&sc->calib_to); 1606 1607 /* do it in a process context */ 1608 cmd.state = nstate; 1609 cmd.arg = arg; 1610 run_do_async(sc, run_newstate_cb, &cmd, sizeof(cmd)); 1611 return 0; 1612 } 1613 1614 static void 1615 run_newstate_cb(struct run_softc *sc, void *arg) 1616 { 1617 struct run_cmd_newstate *cmd = arg; 1618 struct ifnet *ifp = &sc->sc_if; 1619 struct ieee80211com *ic = &sc->sc_ic; 1620 enum ieee80211_state ostate; 1621 struct ieee80211_node *ni; 1622 uint32_t tmp, sta[3]; 1623 uint8_t wcid; 1624 int s; 1625 1626 s = splnet(); 1627 ostate = ic->ic_state; 1628 1629 if (ostate == IEEE80211_S_RUN) { 1630 /* turn link LED off */ 1631 run_set_leds(sc, RT2860_LED_RADIO); 1632 } 1633 1634 switch (cmd->state) { 1635 case IEEE80211_S_INIT: 1636 if (ostate == IEEE80211_S_RUN) { 1637 /* abort TSF synchronization */ 1638 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 1639 run_write(sc, RT2860_BCN_TIME_CFG, 1640 tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 1641 RT2860_TBTT_TIMER_EN)); 1642 } 1643 break; 1644 1645 case IEEE80211_S_SCAN: 1646 run_set_chan(sc, ic->ic_curchan); 1647 callout_schedule(&sc->scan_to, hz / 5); 1648 break; 1649 1650 case IEEE80211_S_AUTH: 1651 case IEEE80211_S_ASSOC: 1652 run_set_chan(sc, ic->ic_curchan); 1653 break; 1654 1655 case IEEE80211_S_RUN: 1656 run_set_chan(sc, ic->ic_curchan); 1657 1658 ni = ic->ic_bss; 1659 1660 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1661 run_updateslot(ifp); 1662 run_enable_mrr(sc); 1663 run_set_txpreamble(sc); 1664 run_set_basicrates(sc); 1665 run_set_bssid(sc, ni->ni_bssid); 1666 } 1667 #ifndef IEEE80211_STA_ONLY 1668 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 1669 ic->ic_opmode == IEEE80211_M_IBSS) 1670 (void)run_setup_beacon(sc); 1671 #endif 1672 if (ic->ic_opmode == IEEE80211_M_STA) { 1673 /* add BSS entry to the WCID table */ 1674 wcid = RUN_AID2WCID(ni->ni_associd); 1675 run_write_region_1(sc, RT2860_WCID_ENTRY(wcid), 1676 ni->ni_macaddr, IEEE80211_ADDR_LEN); 1677 1678 /* fake a join to init the tx rate */ 1679 run_newassoc(ni, 1); 1680 } 1681 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1682 run_enable_tsf_sync(sc); 1683 1684 /* clear statistic registers used by AMRR */ 1685 run_read_region_1(sc, RT2860_TX_STA_CNT0, 1686 (uint8_t *)sta, sizeof(sta)); 1687 /* start calibration timer */ 1688 callout_schedule(&sc->calib_to, hz); 1689 } 1690 1691 /* turn link LED on */ 1692 run_set_leds(sc, RT2860_LED_RADIO | 1693 (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan) ? 1694 RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ)); 1695 break; 1696 } 1697 (void)sc->sc_newstate(ic, cmd->state, cmd->arg); 1698 splx(s); 1699 } 1700 1701 static int 1702 run_updateedca(struct ieee80211com *ic) 1703 { 1704 1705 /* do it in a process context */ 1706 run_do_async(ic->ic_ifp->if_softc, run_updateedca_cb, NULL, 0); 1707 return 0; 1708 } 1709 1710 /* ARGSUSED */ 1711 static void 1712 run_updateedca_cb(struct run_softc *sc, void *arg) 1713 { 1714 struct ieee80211com *ic = &sc->sc_ic; 1715 int s, aci; 1716 1717 s = splnet(); 1718 /* update MAC TX configuration registers */ 1719 for (aci = 0; aci < WME_NUM_AC; aci++) { 1720 run_write(sc, RT2860_EDCA_AC_CFG(aci), 1721 ic->ic_wme.wme_params[aci].wmep_logcwmax << 16 | 1722 ic->ic_wme.wme_params[aci].wmep_logcwmin << 12 | 1723 ic->ic_wme.wme_params[aci].wmep_aifsn << 8 | 1724 ic->ic_wme.wme_params[aci].wmep_txopLimit); 1725 } 1726 1727 /* update SCH/DMA registers too */ 1728 run_write(sc, RT2860_WMM_AIFSN_CFG, 1729 ic->ic_wme.wme_params[WME_AC_VO].wmep_aifsn << 12 | 1730 ic->ic_wme.wme_params[WME_AC_VI].wmep_aifsn << 8 | 1731 ic->ic_wme.wme_params[WME_AC_BK].wmep_aifsn << 4 | 1732 ic->ic_wme.wme_params[WME_AC_BE].wmep_aifsn); 1733 run_write(sc, RT2860_WMM_CWMIN_CFG, 1734 ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmin << 12 | 1735 ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmin << 8 | 1736 ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmin << 4 | 1737 ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmin); 1738 run_write(sc, RT2860_WMM_CWMAX_CFG, 1739 ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmax << 12 | 1740 ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmax << 8 | 1741 ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmax << 4 | 1742 ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmax); 1743 run_write(sc, RT2860_WMM_TXOP0_CFG, 1744 ic->ic_wme.wme_params[WME_AC_BK].wmep_txopLimit << 16 | 1745 ic->ic_wme.wme_params[WME_AC_BE].wmep_txopLimit); 1746 run_write(sc, RT2860_WMM_TXOP1_CFG, 1747 ic->ic_wme.wme_params[WME_AC_VO].wmep_txopLimit << 16 | 1748 ic->ic_wme.wme_params[WME_AC_VI].wmep_txopLimit); 1749 splx(s); 1750 } 1751 1752 #ifdef RUN_HWCRYPTO 1753 static int 1754 run_set_key(struct ieee80211com *ic, const struct ieee80211_key *k, 1755 const uint8_t *mac) 1756 { 1757 struct run_softc *sc = ic->ic_ifp->if_softc; 1758 struct ieee80211_node *ni = ic->ic_bss; 1759 struct run_cmd_key cmd; 1760 1761 /* do it in a process context */ 1762 cmd.key = *k; 1763 cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1764 run_do_async(sc, run_set_key_cb, &cmd, sizeof(cmd)); 1765 return 1; 1766 } 1767 1768 static void 1769 run_set_key_cb(struct run_softc *sc, void *arg) 1770 { 1771 #ifndef IEEE80211_STA_ONLY 1772 struct ieee80211com *ic = &sc->sc_ic; 1773 #endif 1774 struct run_cmd_key *cmd = arg; 1775 struct ieee80211_key *k = &cmd->key; 1776 uint32_t attr; 1777 uint16_t base; 1778 uint8_t mode, wcid, iv[8]; 1779 1780 /* map net80211 cipher to RT2860 security mode */ 1781 switch (k->wk_cipher->ic_cipher) { 1782 case IEEE80211_CIPHER_WEP: 1783 k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1784 if (k->wk_keylen == 5) 1785 mode = RT2860_MODE_WEP40; 1786 else 1787 mode = RT2860_MODE_WEP104; 1788 break; 1789 case IEEE80211_CIPHER_TKIP: 1790 mode = RT2860_MODE_TKIP; 1791 break; 1792 case IEEE80211_CIPHER_AES_CCM: 1793 mode = RT2860_MODE_AES_CCMP; 1794 break; 1795 default: 1796 return; 1797 } 1798 1799 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1800 wcid = 0; /* NB: update WCID0 for group keys */ 1801 base = RT2860_SKEY(0, k->wk_keyix); 1802 } else { 1803 wcid = RUN_AID2WCID(cmd->associd); 1804 base = RT2860_PKEY(wcid); 1805 } 1806 1807 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1808 run_write_region_1(sc, base, k->wk_key, 16); 1809 #ifndef IEEE80211_STA_ONLY 1810 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1811 run_write_region_1(sc, base + 16, &k->wk_key[16], 8); 1812 run_write_region_1(sc, base + 24, &k->wk_key[24], 8); 1813 } else 1814 #endif 1815 { 1816 run_write_region_1(sc, base + 16, &k->wk_key[24], 8); 1817 run_write_region_1(sc, base + 24, &k->wk_key[16], 8); 1818 } 1819 } else { 1820 /* roundup len to 16-bit: XXX fix write_region_1() instead */ 1821 run_write_region_1(sc, base, k->wk_key, 1822 (k->wk_keylen + 1) & ~1); 1823 } 1824 1825 if (!(k->wk_flags & IEEE80211_KEY_GROUP) || 1826 (k->wk_flags & IEEE80211_KEY_XMIT)) { 1827 /* set initial packet number in IV+EIV */ 1828 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) { 1829 memset(iv, 0, sizeof(iv)); 1830 iv[3] = sc->sc_ic.ic_crypto.cs_def_txkey << 6; 1831 } else { 1832 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1833 iv[0] = k->wk_keytsc >> 8; 1834 iv[1] = (iv[0] | 0x20) & 0x7f; 1835 iv[2] = k->wk_keytsc; 1836 } else /* CCMP */ { 1837 iv[0] = k->wk_keytsc; 1838 iv[1] = k->wk_keytsc >> 8; 1839 iv[2] = 0; 1840 } 1841 iv[3] = k->wk_keyix << 6 | IEEE80211_WEP_EXTIV; 1842 iv[4] = k->wk_keytsc >> 16; 1843 iv[5] = k->wk_keytsc >> 24; 1844 iv[6] = k->wk_keytsc >> 32; 1845 iv[7] = k->wk_keytsc >> 40; 1846 } 1847 run_write_region_1(sc, RT2860_IVEIV(wcid), iv, 8); 1848 } 1849 1850 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1851 /* install group key */ 1852 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1853 attr &= ~(0xf << (k->wk_keyix * 4)); 1854 attr |= mode << (k->wk_keyix * 4); 1855 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1856 } else { 1857 /* install pairwise key */ 1858 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1859 attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN; 1860 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1861 } 1862 } 1863 1864 static int 1865 run_delete_key(struct ieee80211com *ic, const struct ieee80211_key *k) 1866 { 1867 struct run_softc *sc = ic->ic_ifp->if_softc; 1868 struct ieee80211_node *ni = ic->ic_bss; 1869 struct run_cmd_key cmd; 1870 1871 /* do it in a process context */ 1872 cmd.key = *k; 1873 cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1874 run_do_async(sc, run_delete_key_cb, &cmd, sizeof(cmd)); 1875 return 1; 1876 } 1877 1878 static void 1879 run_delete_key_cb(struct run_softc *sc, void *arg) 1880 { 1881 struct run_cmd_key *cmd = arg; 1882 struct ieee80211_key *k = &cmd->key; 1883 uint32_t attr; 1884 uint8_t wcid; 1885 1886 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) 1887 k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1888 1889 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1890 /* remove group key */ 1891 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1892 attr &= ~(0xf << (k->wk_keyix * 4)); 1893 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1894 1895 } else { 1896 /* remove pairwise key */ 1897 wcid = RUN_AID2WCID(cmd->associd); 1898 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1899 attr &= ~0xf; 1900 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1901 } 1902 } 1903 #endif 1904 1905 static void 1906 run_calibrate_to(void *arg) 1907 { 1908 1909 /* do it in a process context */ 1910 run_do_async(arg, run_calibrate_cb, NULL, 0); 1911 /* next timeout will be rescheduled in the calibration task */ 1912 } 1913 1914 /* ARGSUSED */ 1915 static void 1916 run_calibrate_cb(struct run_softc *sc, void *arg) 1917 { 1918 struct ifnet *ifp = &sc->sc_if; 1919 uint32_t sta[3]; 1920 int s, error; 1921 1922 /* read statistic counters (clear on read) and update AMRR state */ 1923 error = run_read_region_1(sc, RT2860_TX_STA_CNT0, (uint8_t *)sta, 1924 sizeof(sta)); 1925 if (error != 0) 1926 goto skip; 1927 1928 DPRINTF(("retrycnt=%d txcnt=%d failcnt=%d\n", 1929 le32toh(sta[1]) >> 16, le32toh(sta[1]) & 0xffff, 1930 le32toh(sta[0]) & 0xffff)); 1931 1932 s = splnet(); 1933 /* count failed TX as errors */ 1934 ifp->if_oerrors += le32toh(sta[0]) & 0xffff; 1935 1936 sc->amn.amn_retrycnt = 1937 (le32toh(sta[0]) & 0xffff) + /* failed TX count */ 1938 (le32toh(sta[1]) >> 16); /* TX retransmission count */ 1939 1940 sc->amn.amn_txcnt = 1941 sc->amn.amn_retrycnt + 1942 (le32toh(sta[1]) & 0xffff); /* successful TX count */ 1943 1944 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 1945 splx(s); 1946 1947 skip: callout_schedule(&sc->calib_to, hz); 1948 } 1949 1950 static void 1951 run_newassoc(struct ieee80211_node *ni, int isnew) 1952 { 1953 struct run_softc *sc = ni->ni_ic->ic_ifp->if_softc; 1954 struct run_node *rn = (void *)ni; 1955 struct ieee80211_rateset *rs = &ni->ni_rates; 1956 uint8_t rate; 1957 int ridx, i, j; 1958 1959 DPRINTF(("new assoc isnew=%d addr=%s\n", 1960 isnew, ether_sprintf(ni->ni_macaddr))); 1961 1962 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 1963 /* start at lowest available bit-rate, AMRR will raise */ 1964 ni->ni_txrate = 0; 1965 1966 for (i = 0; i < rs->rs_nrates; i++) { 1967 rate = rs->rs_rates[i] & IEEE80211_RATE_VAL; 1968 /* convert 802.11 rate to hardware rate index */ 1969 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 1970 if (rt2860_rates[ridx].rate == rate) 1971 break; 1972 rn->ridx[i] = ridx; 1973 /* determine rate of control response frames */ 1974 for (j = i; j >= 0; j--) { 1975 if ((rs->rs_rates[j] & IEEE80211_RATE_BASIC) && 1976 rt2860_rates[rn->ridx[i]].phy == 1977 rt2860_rates[rn->ridx[j]].phy) 1978 break; 1979 } 1980 if (j >= 0) { 1981 rn->ctl_ridx[i] = rn->ridx[j]; 1982 } else { 1983 /* no basic rate found, use mandatory one */ 1984 rn->ctl_ridx[i] = rt2860_rates[ridx].ctl_ridx; 1985 } 1986 DPRINTF(("rate=0x%02x ridx=%d ctl_ridx=%d\n", 1987 rs->rs_rates[i], rn->ridx[i], rn->ctl_ridx[i])); 1988 } 1989 } 1990 1991 /* 1992 * Return the Rx chain with the highest RSSI for a given frame. 1993 */ 1994 static __inline uint8_t 1995 run_maxrssi_chain(struct run_softc *sc, const struct rt2860_rxwi *rxwi) 1996 { 1997 uint8_t rxchain = 0; 1998 1999 if (sc->nrxchains > 1) { 2000 if (rxwi->rssi[1] > rxwi->rssi[rxchain]) 2001 rxchain = 1; 2002 if (sc->nrxchains > 2) 2003 if (rxwi->rssi[2] > rxwi->rssi[rxchain]) 2004 rxchain = 2; 2005 } 2006 return rxchain; 2007 } 2008 2009 static void 2010 run_rx_frame(struct run_softc *sc, uint8_t *buf, int dmalen) 2011 { 2012 struct ieee80211com *ic = &sc->sc_ic; 2013 struct ifnet *ifp = &sc->sc_if; 2014 struct ieee80211_frame *wh; 2015 struct ieee80211_node *ni; 2016 struct rt2870_rxd *rxd; 2017 struct rt2860_rxwi *rxwi; 2018 struct mbuf *m; 2019 uint32_t flags; 2020 uint16_t len, phy; 2021 uint8_t ant, rssi; 2022 int s; 2023 #ifdef RUN_HWCRYPTO 2024 int decrypted = 0; 2025 #endif 2026 2027 rxwi = (struct rt2860_rxwi *)buf; 2028 len = le16toh(rxwi->len) & 0xfff; 2029 if (__predict_false(len > dmalen)) { 2030 DPRINTF(("bad RXWI length %u > %u\n", len, dmalen)); 2031 return; 2032 } 2033 /* Rx descriptor is located at the end */ 2034 rxd = (struct rt2870_rxd *)(buf + dmalen); 2035 flags = le32toh(rxd->flags); 2036 2037 if (__predict_false(flags & (RT2860_RX_CRCERR | RT2860_RX_ICVERR))) { 2038 ifp->if_ierrors++; 2039 return; 2040 } 2041 2042 wh = (struct ieee80211_frame *)(rxwi + 1); 2043 #ifdef RUN_HWCRYPTO 2044 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2045 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2046 decrypted = 1; 2047 } 2048 #endif 2049 2050 if (__predict_false((flags & RT2860_RX_MICERR))) { 2051 /* report MIC failures to net80211 for TKIP */ 2052 ieee80211_notify_michael_failure(ic, wh, 0/* XXX */); 2053 ifp->if_ierrors++; 2054 return; 2055 } 2056 2057 if (flags & RT2860_RX_L2PAD) { 2058 u_int hdrlen = ieee80211_hdrspace(ic, wh); 2059 ovbcopy(wh, (uint8_t *)wh + 2, hdrlen); 2060 wh = (struct ieee80211_frame *)((uint8_t *)wh + 2); 2061 } 2062 2063 /* could use m_devget but net80211 wants contig mgmt frames */ 2064 MGETHDR(m, M_DONTWAIT, MT_DATA); 2065 if (__predict_false(m == NULL)) { 2066 ifp->if_ierrors++; 2067 return; 2068 } 2069 if (len > MHLEN) { 2070 if (__predict_true(len <= MCLBYTES)) 2071 MCLGET(m, M_DONTWAIT); 2072 if (__predict_false(!(m->m_flags & M_EXT))) { 2073 ifp->if_ierrors++; 2074 m_freem(m); 2075 return; 2076 } 2077 } 2078 /* finalize mbuf */ 2079 m->m_pkthdr.rcvif = ifp; 2080 memcpy(mtod(m, void *), wh, len); 2081 m->m_pkthdr.len = m->m_len = len; 2082 2083 ant = run_maxrssi_chain(sc, rxwi); 2084 rssi = rxwi->rssi[ant]; 2085 2086 if (__predict_false(sc->sc_drvbpf != NULL)) { 2087 struct run_rx_radiotap_header *tap = &sc->sc_rxtap; 2088 2089 tap->wr_flags = 0; 2090 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 2091 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2092 tap->wr_antsignal = rssi; 2093 tap->wr_antenna = ant; 2094 tap->wr_dbm_antsignal = run_rssi2dbm(sc, rssi, ant); 2095 tap->wr_rate = 2; /* in case it can't be found below */ 2096 phy = le16toh(rxwi->phy); 2097 switch (phy & RT2860_PHY_MODE) { 2098 case RT2860_PHY_CCK: 2099 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) { 2100 case 0: tap->wr_rate = 2; break; 2101 case 1: tap->wr_rate = 4; break; 2102 case 2: tap->wr_rate = 11; break; 2103 case 3: tap->wr_rate = 22; break; 2104 } 2105 if (phy & RT2860_PHY_SHPRE) 2106 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2107 break; 2108 case RT2860_PHY_OFDM: 2109 switch (phy & RT2860_PHY_MCS) { 2110 case 0: tap->wr_rate = 12; break; 2111 case 1: tap->wr_rate = 18; break; 2112 case 2: tap->wr_rate = 24; break; 2113 case 3: tap->wr_rate = 36; break; 2114 case 4: tap->wr_rate = 48; break; 2115 case 5: tap->wr_rate = 72; break; 2116 case 6: tap->wr_rate = 96; break; 2117 case 7: tap->wr_rate = 108; break; 2118 } 2119 break; 2120 } 2121 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 2122 } 2123 2124 s = splnet(); 2125 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2126 #ifdef RUN_HWCRYPTO 2127 if (decrypted) { 2128 uint32_t icflags = ic->ic_flags; 2129 2130 ic->ic_flags &= ~IEEE80211_F_DROPUNENC; /* XXX */ 2131 ieee80211_input(ic, m, ni, rssi, 0); 2132 ic->ic_flags = icflags; 2133 } else 2134 #endif 2135 ieee80211_input(ic, m, ni, rssi, 0); 2136 2137 /* node is no longer needed */ 2138 ieee80211_free_node(ni); 2139 2140 /* 2141 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 2142 * without calling if_start(). 2143 */ 2144 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 2145 run_start(ifp); 2146 2147 splx(s); 2148 } 2149 2150 static void 2151 run_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 2152 { 2153 struct run_rx_data *data = priv; 2154 struct run_softc *sc = data->sc; 2155 uint8_t *buf; 2156 uint32_t dmalen; 2157 int xferlen; 2158 2159 if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2160 DPRINTF(("RX status=%d\n", status)); 2161 if (status == USBD_STALLED) 2162 usbd_clear_endpoint_stall_async(sc->rxq.pipeh); 2163 if (status != USBD_CANCELLED) 2164 goto skip; 2165 return; 2166 } 2167 usbd_get_xfer_status(xfer, NULL, NULL, &xferlen, NULL); 2168 2169 if (__predict_false(xferlen < (int)(sizeof(uint32_t) + 2170 sizeof(struct rt2860_rxwi) + sizeof(struct rt2870_rxd)))) { 2171 DPRINTF(("xfer too short %d\n", xferlen)); 2172 goto skip; 2173 } 2174 2175 /* HW can aggregate multiple 802.11 frames in a single USB xfer */ 2176 buf = data->buf; 2177 while (xferlen > 8) { 2178 dmalen = le32toh(*(uint32_t *)buf) & 0xffff; 2179 2180 if (__predict_false(dmalen == 0 || (dmalen & 3) != 0)) { 2181 DPRINTF(("bad DMA length %u (%x)\n", dmalen, dmalen)); 2182 break; 2183 } 2184 if (__predict_false(dmalen + 8 > (uint32_t)xferlen)) { 2185 DPRINTF(("bad DMA length %u > %d\n", 2186 dmalen + 8, xferlen)); 2187 break; 2188 } 2189 run_rx_frame(sc, buf + sizeof(uint32_t), dmalen); 2190 buf += dmalen + 8; 2191 xferlen -= dmalen + 8; 2192 } 2193 2194 skip: /* setup a new transfer */ 2195 usbd_setup_xfer(xfer, data, data->buf, RUN_MAX_RXSZ, 2196 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, run_rxeof); 2197 (void)usbd_transfer(data->xfer); 2198 } 2199 2200 static void 2201 run_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 2202 { 2203 struct run_tx_data *data = priv; 2204 struct run_softc *sc = data->sc; 2205 struct run_tx_ring *txq = &sc->txq[data->qid]; 2206 struct ifnet *ifp = &sc->sc_if; 2207 int s; 2208 2209 if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2210 DPRINTF(("TX status=%d\n", status)); 2211 if (status == USBD_STALLED) 2212 usbd_clear_endpoint_stall_async(txq->pipeh); 2213 ifp->if_oerrors++; 2214 return; 2215 } 2216 2217 s = splnet(); 2218 sc->sc_tx_timer = 0; 2219 ifp->if_opackets++; 2220 if (--txq->queued < RUN_TX_RING_COUNT) { 2221 sc->qfullmsk &= ~(1 << data->qid); 2222 ifp->if_flags &= ~IFF_OACTIVE; 2223 run_start(ifp); 2224 } 2225 splx(s); 2226 } 2227 2228 static int 2229 run_tx(struct run_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 2230 { 2231 struct ieee80211com *ic = &sc->sc_ic; 2232 struct run_node *rn = (void *)ni; 2233 struct ieee80211_frame *wh; 2234 #ifndef RUN_HWCRYPTO 2235 struct ieee80211_key *k; 2236 #endif 2237 struct run_tx_ring *ring; 2238 struct run_tx_data *data; 2239 struct rt2870_txd *txd; 2240 struct rt2860_txwi *txwi; 2241 uint16_t dur; 2242 uint8_t type, mcs, tid, qid, qos = 0; 2243 int error, hasqos, ridx, ctl_ridx, xferlen; 2244 2245 wh = mtod(m, struct ieee80211_frame *); 2246 2247 #ifndef RUN_HWCRYPTO 2248 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2249 k = ieee80211_crypto_encap(ic, ni, m); 2250 if (k == NULL) { 2251 m_freem(m); 2252 return ENOBUFS; 2253 } 2254 2255 /* packet header may have moved, reset our local pointer */ 2256 wh = mtod(m, struct ieee80211_frame *); 2257 } 2258 #endif 2259 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2260 2261 if ((hasqos = ieee80211_has_qos(wh))) { 2262 qos = ((struct ieee80211_qosframe *)wh)->i_qos[0]; 2263 tid = qos & IEEE80211_QOS_TID; 2264 qid = TID_TO_WME_AC(tid); 2265 } else { 2266 tid = 0; 2267 qid = WME_AC_BE; 2268 } 2269 ring = &sc->txq[qid]; 2270 data = &ring->data[ring->cur]; 2271 2272 /* pickup a rate index */ 2273 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 2274 type != IEEE80211_FC0_TYPE_DATA) { 2275 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 2276 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 2277 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2278 } else if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 2279 ridx = sc->fixed_ridx; 2280 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2281 } else { 2282 ridx = rn->ridx[ni->ni_txrate]; 2283 ctl_ridx = rn->ctl_ridx[ni->ni_txrate]; 2284 } 2285 2286 /* get MCS code from rate index */ 2287 mcs = rt2860_rates[ridx].mcs; 2288 2289 xferlen = sizeof(*txwi) + m->m_pkthdr.len; 2290 /* roundup to 32-bit alignment */ 2291 xferlen = (xferlen + 3) & ~3; 2292 2293 txd = (struct rt2870_txd *)data->buf; 2294 txd->flags = RT2860_TX_QSEL_EDCA; 2295 txd->len = htole16(xferlen); 2296 2297 /* setup TX Wireless Information */ 2298 txwi = (struct rt2860_txwi *)(txd + 1); 2299 txwi->flags = 0; 2300 txwi->xflags = hasqos ? 0 : RT2860_TX_NSEQ; 2301 txwi->wcid = (type == IEEE80211_FC0_TYPE_DATA) ? 2302 RUN_AID2WCID(ni->ni_associd) : 0xff; 2303 txwi->len = htole16(m->m_pkthdr.len); 2304 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) { 2305 txwi->phy = htole16(RT2860_PHY_CCK); 2306 if (ridx != RT2860_RIDX_CCK1 && 2307 (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 2308 mcs |= RT2860_PHY_SHPRE; 2309 } else 2310 txwi->phy = htole16(RT2860_PHY_OFDM); 2311 txwi->phy |= htole16(mcs); 2312 2313 txwi->txop = RT2860_TX_TXOP_BACKOFF; 2314 2315 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 2316 (!hasqos || (qos & IEEE80211_QOS_ACKPOLICY) != 2317 IEEE80211_QOS_ACKPOLICY_NOACK)) { 2318 txwi->xflags |= RT2860_TX_ACK; 2319 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 2320 dur = rt2860_rates[ctl_ridx].sp_ack_dur; 2321 else 2322 dur = rt2860_rates[ctl_ridx].lp_ack_dur; 2323 *(uint16_t *)wh->i_dur = htole16(dur); 2324 } 2325 2326 #ifndef IEEE80211_STA_ONLY 2327 /* ask MAC to insert timestamp into probe responses */ 2328 if ((wh->i_fc[0] & 2329 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 2330 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 2331 /* NOTE: beacons do not pass through tx_data() */ 2332 txwi->flags |= RT2860_TX_TS; 2333 #endif 2334 2335 if (__predict_false(sc->sc_drvbpf != NULL)) { 2336 struct run_tx_radiotap_header *tap = &sc->sc_txtap; 2337 2338 tap->wt_flags = 0; 2339 tap->wt_rate = rt2860_rates[ridx].rate; 2340 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2341 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2342 tap->wt_hwqueue = qid; 2343 if (mcs & RT2860_PHY_SHPRE) 2344 tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2345 2346 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 2347 } 2348 2349 m_copydata(m, 0, m->m_pkthdr.len, (void *)(txwi + 1)); 2350 m_freem(m); 2351 2352 xferlen += sizeof(*txd) + 4; 2353 2354 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 2355 USBD_FORCE_SHORT_XFER, RUN_TX_TIMEOUT, run_txeof); 2356 error = usbd_transfer(data->xfer); 2357 if (__predict_false(error != USBD_IN_PROGRESS && 2358 error != USBD_NORMAL_COMPLETION)) 2359 return error; 2360 2361 ieee80211_free_node(ni); 2362 2363 ring->cur = (ring->cur + 1) % RUN_TX_RING_COUNT; 2364 if (++ring->queued >= RUN_TX_RING_COUNT) 2365 sc->qfullmsk |= 1 << qid; 2366 2367 return 0; 2368 } 2369 2370 static void 2371 run_start(struct ifnet *ifp) 2372 { 2373 struct run_softc *sc = ifp->if_softc; 2374 struct ieee80211com *ic = &sc->sc_ic; 2375 struct ether_header *eh; 2376 struct ieee80211_node *ni; 2377 struct mbuf *m; 2378 2379 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2380 return; 2381 2382 for (;;) { 2383 if (sc->qfullmsk != 0) { 2384 ifp->if_flags |= IFF_OACTIVE; 2385 break; 2386 } 2387 /* send pending management frames first */ 2388 IF_DEQUEUE(&ic->ic_mgtq, m); 2389 if (m != NULL) { 2390 ni = M_GETCTX(m, struct ieee80211_node *); 2391 M_CLEARCTX(m); 2392 goto sendit; 2393 } 2394 if (ic->ic_state != IEEE80211_S_RUN) 2395 break; 2396 2397 /* encapsulate and send data frames */ 2398 IFQ_DEQUEUE(&ifp->if_snd, m); 2399 if (m == NULL) 2400 break; 2401 if (m->m_len < (int)sizeof(*eh) && 2402 (m = m_pullup(m, sizeof(*eh))) == NULL) { 2403 ifp->if_oerrors++; 2404 continue; 2405 } 2406 2407 eh = mtod(m, struct ether_header *); 2408 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2409 if (ni == NULL) { 2410 m_freem(m); 2411 ifp->if_oerrors++; 2412 continue; 2413 } 2414 2415 bpf_mtap(ifp, m); 2416 2417 if ((m = ieee80211_encap(ic, m, ni)) == NULL) { 2418 ieee80211_free_node(ni); 2419 ifp->if_oerrors++; 2420 continue; 2421 } 2422 sendit: 2423 bpf_mtap3(ic->ic_rawbpf, m); 2424 2425 if (run_tx(sc, m, ni) != 0) { 2426 ieee80211_free_node(ni); 2427 ifp->if_oerrors++; 2428 continue; 2429 } 2430 2431 sc->sc_tx_timer = 5; 2432 ifp->if_timer = 1; 2433 } 2434 } 2435 2436 static void 2437 run_watchdog(struct ifnet *ifp) 2438 { 2439 struct run_softc *sc = ifp->if_softc; 2440 struct ieee80211com *ic = &sc->sc_ic; 2441 2442 ifp->if_timer = 0; 2443 2444 if (sc->sc_tx_timer > 0) { 2445 if (--sc->sc_tx_timer == 0) { 2446 aprint_error_dev(sc->sc_dev, "device timeout\n"); 2447 /* run_init(ifp); XXX needs a process context! */ 2448 ifp->if_oerrors++; 2449 return; 2450 } 2451 ifp->if_timer = 1; 2452 } 2453 2454 ieee80211_watchdog(ic); 2455 } 2456 2457 static int 2458 run_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2459 { 2460 struct run_softc *sc = ifp->if_softc; 2461 struct ieee80211com *ic = &sc->sc_ic; 2462 int s, error = 0; 2463 2464 s = splnet(); 2465 2466 switch (cmd) { 2467 case SIOCSIFFLAGS: 2468 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2469 break; 2470 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 2471 case IFF_UP|IFF_RUNNING: 2472 break; 2473 case IFF_UP: 2474 run_init(ifp); 2475 break; 2476 case IFF_RUNNING: 2477 run_stop(ifp, 1); 2478 break; 2479 case 0: 2480 break; 2481 } 2482 break; 2483 2484 case SIOCADDMULTI: 2485 case SIOCDELMULTI: 2486 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 2487 /* setup multicast filter, etc */ 2488 error = 0; 2489 } 2490 break; 2491 2492 default: 2493 error = ieee80211_ioctl(ic, cmd, data); 2494 break; 2495 } 2496 2497 if (error == ENETRESET) { 2498 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2499 (IFF_UP | IFF_RUNNING)) { 2500 run_init(ifp); 2501 } 2502 error = 0; 2503 } 2504 2505 splx(s); 2506 2507 return error; 2508 } 2509 2510 static void 2511 run_select_chan_group(struct run_softc *sc, int group) 2512 { 2513 uint32_t tmp; 2514 uint8_t agc; 2515 2516 run_bbp_write(sc, 62, 0x37 - sc->lna[group]); 2517 run_bbp_write(sc, 63, 0x37 - sc->lna[group]); 2518 run_bbp_write(sc, 64, 0x37 - sc->lna[group]); 2519 run_bbp_write(sc, 86, 0x00); 2520 2521 if (group == 0) { 2522 if (sc->ext_2ghz_lna) { 2523 run_bbp_write(sc, 82, 0x62); 2524 run_bbp_write(sc, 75, 0x46); 2525 } else { 2526 run_bbp_write(sc, 82, 0x84); 2527 run_bbp_write(sc, 75, 0x50); 2528 } 2529 } else { 2530 if (sc->mac_ver == 0x3572) 2531 run_bbp_write(sc, 82, 0x94); 2532 else 2533 run_bbp_write(sc, 82, 0xf2); 2534 if (sc->ext_5ghz_lna) 2535 run_bbp_write(sc, 75, 0x46); 2536 else 2537 run_bbp_write(sc, 75, 0x50); 2538 } 2539 2540 run_read(sc, RT2860_TX_BAND_CFG, &tmp); 2541 tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P); 2542 tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P; 2543 run_write(sc, RT2860_TX_BAND_CFG, tmp); 2544 2545 /* enable appropriate Power Amplifiers and Low Noise Amplifiers */ 2546 tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN; 2547 if (sc->nrxchains > 1) 2548 tmp |= RT2860_LNA_PE1_EN; 2549 if (group == 0) { /* 2GHz */ 2550 tmp |= RT2860_PA_PE_G0_EN; 2551 if (sc->ntxchains > 1) 2552 tmp |= RT2860_PA_PE_G1_EN; 2553 } else { /* 5GHz */ 2554 tmp |= RT2860_PA_PE_A0_EN; 2555 if (sc->ntxchains > 1) 2556 tmp |= RT2860_PA_PE_A1_EN; 2557 } 2558 if (sc->mac_ver == 0x3572) { 2559 run_rt3070_rf_write(sc, 8, 0x00); 2560 run_write(sc, RT2860_TX_PIN_CFG, tmp); 2561 run_rt3070_rf_write(sc, 8, 0x80); 2562 } else 2563 run_write(sc, RT2860_TX_PIN_CFG, tmp); 2564 2565 /* set initial AGC value */ 2566 if (group == 0) { /* 2GHz band */ 2567 if (sc->mac_ver >= 0x3070) 2568 agc = 0x1c + sc->lna[0] * 2; 2569 else 2570 agc = 0x2e + sc->lna[0]; 2571 } else { /* 5GHz band */ 2572 if (sc->mac_ver == 0x3572) 2573 agc = 0x22 + (sc->lna[group] * 5) / 3; 2574 else 2575 agc = 0x32 + (sc->lna[group] * 5) / 3; 2576 } 2577 run_set_agc(sc, agc); 2578 } 2579 2580 static void 2581 run_rt2870_set_chan(struct run_softc *sc, u_int chan) 2582 { 2583 const struct rfprog *rfprog = rt2860_rf2850; 2584 uint32_t r2, r3, r4; 2585 int8_t txpow1, txpow2; 2586 int i; 2587 2588 /* find the settings for this channel (we know it exists) */ 2589 for (i = 0; rfprog[i].chan != chan; i++); 2590 2591 r2 = rfprog[i].r2; 2592 if (sc->ntxchains == 1) 2593 r2 |= 1 << 12; /* 1T: disable Tx chain 2 */ 2594 if (sc->nrxchains == 1) 2595 r2 |= 1 << 15 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2596 else if (sc->nrxchains == 2) 2597 r2 |= 1 << 4; /* 2R: disable Rx chain 3 */ 2598 2599 /* use Tx power values from EEPROM */ 2600 txpow1 = sc->txpow1[i]; 2601 txpow2 = sc->txpow2[i]; 2602 if (chan > 14) { 2603 if (txpow1 >= 0) 2604 txpow1 = txpow1 << 1 | 1; 2605 else 2606 txpow1 = (7 + txpow1) << 1; 2607 if (txpow2 >= 0) 2608 txpow2 = txpow2 << 1 | 1; 2609 else 2610 txpow2 = (7 + txpow2) << 1; 2611 } 2612 r3 = rfprog[i].r3 | txpow1 << 7; 2613 r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4; 2614 2615 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2616 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2617 run_rt2870_rf_write(sc, RT2860_RF3, r3); 2618 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2619 2620 DELAY(200); 2621 2622 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2623 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2624 run_rt2870_rf_write(sc, RT2860_RF3, r3 | 1); 2625 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2626 2627 DELAY(200); 2628 2629 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2630 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2631 run_rt2870_rf_write(sc, RT2860_RF3, r3); 2632 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2633 } 2634 2635 static void 2636 run_rt3070_set_chan(struct run_softc *sc, u_int chan) 2637 { 2638 int8_t txpow1, txpow2; 2639 uint8_t rf; 2640 int i; 2641 2642 KASSERT(chan >= 1 && chan <= 14); /* RT3070 is 2GHz only */ 2643 2644 /* find the settings for this channel (we know it exists) */ 2645 for (i = 0; rt2860_rf2850[i].chan != chan; i++) 2646 continue; 2647 2648 /* use Tx power values from EEPROM */ 2649 txpow1 = sc->txpow1[i]; 2650 txpow2 = sc->txpow2[i]; 2651 2652 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2653 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2654 run_rt3070_rf_read(sc, 6, &rf); 2655 rf = (rf & ~0x03) | rt3070_freqs[i].r; 2656 run_rt3070_rf_write(sc, 6, rf); 2657 2658 /* set Tx0 power */ 2659 run_rt3070_rf_read(sc, 12, &rf); 2660 rf = (rf & ~0x1f) | txpow1; 2661 run_rt3070_rf_write(sc, 12, rf); 2662 2663 /* set Tx1 power */ 2664 run_rt3070_rf_read(sc, 13, &rf); 2665 rf = (rf & ~0x1f) | txpow2; 2666 run_rt3070_rf_write(sc, 13, rf); 2667 2668 run_rt3070_rf_read(sc, 1, &rf); 2669 rf &= ~0xfc; 2670 if (sc->ntxchains == 1) 2671 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2672 else if (sc->ntxchains == 2) 2673 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2674 if (sc->nrxchains == 1) 2675 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2676 else if (sc->nrxchains == 2) 2677 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2678 run_rt3070_rf_write(sc, 1, rf); 2679 2680 /* set RF offset */ 2681 run_rt3070_rf_read(sc, 23, &rf); 2682 rf = (rf & ~0x7f) | sc->freq; 2683 run_rt3070_rf_write(sc, 23, rf); 2684 2685 /* program RF filter */ 2686 run_rt3070_rf_read(sc, 24, &rf); /* Tx */ 2687 rf = (rf & ~0x3f) | sc->rf24_20mhz; 2688 run_rt3070_rf_write(sc, 24, rf); 2689 run_rt3070_rf_read(sc, 31, &rf); /* Rx */ 2690 rf = (rf & ~0x3f) | sc->rf24_20mhz; 2691 run_rt3070_rf_write(sc, 31, rf); 2692 2693 /* enable RF tuning */ 2694 run_rt3070_rf_read(sc, 7, &rf); 2695 run_rt3070_rf_write(sc, 7, rf | 0x01); 2696 } 2697 2698 static void 2699 run_rt3572_set_chan(struct run_softc *sc, u_int chan) 2700 { 2701 int8_t txpow1, txpow2; 2702 uint32_t tmp; 2703 uint8_t rf; 2704 int i; 2705 2706 /* find the settings for this channel (we know it exists) */ 2707 for (i = 0; rt2860_rf2850[i].chan != chan; i++); 2708 2709 /* use Tx power values from EEPROM */ 2710 txpow1 = sc->txpow1[i]; 2711 txpow2 = sc->txpow2[i]; 2712 2713 if (chan <= 14) { 2714 run_bbp_write(sc, 25, sc->bbp25); 2715 run_bbp_write(sc, 26, sc->bbp26); 2716 } else { 2717 /* enable IQ phase correction */ 2718 run_bbp_write(sc, 25, 0x09); 2719 run_bbp_write(sc, 26, 0xff); 2720 } 2721 2722 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2723 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2724 run_rt3070_rf_read(sc, 6, &rf); 2725 rf = (rf & ~0x0f) | rt3070_freqs[i].r; 2726 rf |= (chan <= 14) ? 0x08 : 0x04; 2727 run_rt3070_rf_write(sc, 6, rf); 2728 2729 /* set PLL mode */ 2730 run_rt3070_rf_read(sc, 5, &rf); 2731 rf &= ~(0x08 | 0x04); 2732 rf |= (chan <= 14) ? 0x04 : 0x08; 2733 run_rt3070_rf_write(sc, 5, rf); 2734 2735 /* set Tx power for chain 0 */ 2736 if (chan <= 14) 2737 rf = 0x60 | txpow1; 2738 else 2739 rf = 0xe0 | (txpow1 & 0xc) << 1 | (txpow1 & 0x3); 2740 run_rt3070_rf_write(sc, 12, rf); 2741 2742 /* set Tx power for chain 1 */ 2743 if (chan <= 14) 2744 rf = 0x60 | txpow2; 2745 else 2746 rf = 0xe0 | (txpow2 & 0xc) << 1 | (txpow2 & 0x3); 2747 run_rt3070_rf_write(sc, 13, rf); 2748 2749 /* set Tx/Rx streams */ 2750 run_rt3070_rf_read(sc, 1, &rf); 2751 rf &= ~0xfc; 2752 if (sc->ntxchains == 1) 2753 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2754 else if (sc->ntxchains == 2) 2755 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2756 if (sc->nrxchains == 1) 2757 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2758 else if (sc->nrxchains == 2) 2759 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2760 run_rt3070_rf_write(sc, 1, rf); 2761 2762 /* set RF offset */ 2763 run_rt3070_rf_read(sc, 23, &rf); 2764 rf = (rf & ~0x7f) | sc->freq; 2765 run_rt3070_rf_write(sc, 23, rf); 2766 2767 /* program RF filter */ 2768 rf = sc->rf24_20mhz; 2769 run_rt3070_rf_write(sc, 24, rf); /* Tx */ 2770 run_rt3070_rf_write(sc, 31, rf); /* Rx */ 2771 2772 /* enable RF tuning */ 2773 run_rt3070_rf_read(sc, 7, &rf); 2774 rf = (chan <= 14) ? 0xd8 : ((rf & ~0xc8) | 0x14); 2775 run_rt3070_rf_write(sc, 7, rf); 2776 2777 /* TSSI */ 2778 rf = (chan <= 14) ? 0xc3 : 0xc0; 2779 run_rt3070_rf_write(sc, 9, rf); 2780 2781 /* set loop filter 1 */ 2782 run_rt3070_rf_write(sc, 10, 0xf1); 2783 /* set loop filter 2 */ 2784 run_rt3070_rf_write(sc, 11, (chan <= 14) ? 0xb9 : 0x00); 2785 2786 /* set tx_mx2_ic */ 2787 run_rt3070_rf_write(sc, 15, (chan <= 14) ? 0x53 : 0x43); 2788 /* set tx_mx1_ic */ 2789 if (chan <= 14) 2790 rf = 0x48 | sc->txmixgain_2ghz; 2791 else 2792 rf = 0x78 | sc->txmixgain_5ghz; 2793 run_rt3070_rf_write(sc, 16, rf); 2794 2795 /* set tx_lo1 */ 2796 run_rt3070_rf_write(sc, 17, 0x23); 2797 /* set tx_lo2 */ 2798 if (chan <= 14) 2799 rf = 0x93; 2800 else if (chan <= 64) 2801 rf = 0xb7; 2802 else if (chan <= 128) 2803 rf = 0x74; 2804 else 2805 rf = 0x72; 2806 run_rt3070_rf_write(sc, 19, rf); 2807 2808 /* set rx_lo1 */ 2809 if (chan <= 14) 2810 rf = 0xb3; 2811 else if (chan <= 64) 2812 rf = 0xf6; 2813 else if (chan <= 128) 2814 rf = 0xf4; 2815 else 2816 rf = 0xf3; 2817 run_rt3070_rf_write(sc, 20, rf); 2818 2819 /* set pfd_delay */ 2820 if (chan <= 14) 2821 rf = 0x15; 2822 else if (chan <= 64) 2823 rf = 0x3d; 2824 else 2825 rf = 0x01; 2826 run_rt3070_rf_write(sc, 25, rf); 2827 2828 /* set rx_lo2 */ 2829 run_rt3070_rf_write(sc, 26, (chan <= 14) ? 0x85 : 0x87); 2830 /* set ldo_rf_vc */ 2831 run_rt3070_rf_write(sc, 27, (chan <= 14) ? 0x00 : 0x01); 2832 /* set drv_cc */ 2833 run_rt3070_rf_write(sc, 29, (chan <= 14) ? 0x9b : 0x9f); 2834 2835 run_read(sc, RT2860_GPIO_CTRL, &tmp); 2836 tmp &= ~0x8080; 2837 if (chan <= 14) 2838 tmp |= 0x80; 2839 run_write(sc, RT2860_GPIO_CTRL, tmp); 2840 2841 /* enable RF tuning */ 2842 run_rt3070_rf_read(sc, 7, &rf); 2843 run_rt3070_rf_write(sc, 7, rf | 0x01); 2844 2845 DELAY(2000); 2846 } 2847 2848 static void 2849 run_set_agc(struct run_softc *sc, uint8_t agc) 2850 { 2851 uint8_t bbp; 2852 2853 if (sc->mac_ver == 0x3572) { 2854 run_bbp_read(sc, 27, &bbp); 2855 bbp &= ~(0x3 << 5); 2856 run_bbp_write(sc, 27, bbp | 0 << 5); /* select Rx0 */ 2857 run_bbp_write(sc, 66, agc); 2858 run_bbp_write(sc, 27, bbp | 1 << 5); /* select Rx1 */ 2859 run_bbp_write(sc, 66, agc); 2860 } else 2861 run_bbp_write(sc, 66, agc); 2862 } 2863 2864 static void 2865 run_set_rx_antenna(struct run_softc *sc, int aux) 2866 { 2867 uint32_t tmp; 2868 2869 run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, !aux); 2870 run_read(sc, RT2860_GPIO_CTRL, &tmp); 2871 tmp &= ~0x0808; 2872 if (aux) 2873 tmp |= 0x08; 2874 run_write(sc, RT2860_GPIO_CTRL, tmp); 2875 } 2876 2877 static int 2878 run_set_chan(struct run_softc *sc, struct ieee80211_channel *c) 2879 { 2880 struct ieee80211com *ic = &sc->sc_ic; 2881 u_int chan, group; 2882 2883 chan = ieee80211_chan2ieee(ic, c); 2884 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2885 return EINVAL; 2886 2887 if (sc->mac_ver == 0x3572) 2888 run_rt3572_set_chan(sc, chan); 2889 else if (sc->mac_ver >= 0x3070) 2890 run_rt3070_set_chan(sc, chan); 2891 else 2892 run_rt2870_set_chan(sc, chan); 2893 2894 /* determine channel group */ 2895 if (chan <= 14) 2896 group = 0; 2897 else if (chan <= 64) 2898 group = 1; 2899 else if (chan <= 128) 2900 group = 2; 2901 else 2902 group = 3; 2903 2904 /* XXX necessary only when group has changed! */ 2905 run_select_chan_group(sc, group); 2906 2907 DELAY(1000); 2908 return 0; 2909 } 2910 2911 static void 2912 run_enable_tsf_sync(struct run_softc *sc) 2913 { 2914 struct ieee80211com *ic = &sc->sc_ic; 2915 uint32_t tmp; 2916 2917 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 2918 tmp &= ~0x1fffff; 2919 tmp |= ic->ic_bss->ni_intval * 16; 2920 tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN; 2921 if (ic->ic_opmode == IEEE80211_M_STA) { 2922 /* 2923 * Local TSF is always updated with remote TSF on beacon 2924 * reception. 2925 */ 2926 tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT; 2927 } 2928 #ifndef IEEE80211_STA_ONLY 2929 else if (ic->ic_opmode == IEEE80211_M_IBSS) { 2930 tmp |= RT2860_BCN_TX_EN; 2931 /* 2932 * Local TSF is updated with remote TSF on beacon reception 2933 * only if the remote TSF is greater than local TSF. 2934 */ 2935 tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT; 2936 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2937 tmp |= RT2860_BCN_TX_EN; 2938 /* SYNC with nobody */ 2939 tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT; 2940 } 2941 #endif 2942 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 2943 } 2944 2945 static void 2946 run_enable_mrr(struct run_softc *sc) 2947 { 2948 #define CCK(mcs) (mcs) 2949 #define OFDM(mcs) (1 << 3 | (mcs)) 2950 run_write(sc, RT2860_LG_FBK_CFG0, 2951 OFDM(6) << 28 | /* 54->48 */ 2952 OFDM(5) << 24 | /* 48->36 */ 2953 OFDM(4) << 20 | /* 36->24 */ 2954 OFDM(3) << 16 | /* 24->18 */ 2955 OFDM(2) << 12 | /* 18->12 */ 2956 OFDM(1) << 8 | /* 12-> 9 */ 2957 OFDM(0) << 4 | /* 9-> 6 */ 2958 OFDM(0)); /* 6-> 6 */ 2959 2960 run_write(sc, RT2860_LG_FBK_CFG1, 2961 CCK(2) << 12 | /* 11->5.5 */ 2962 CCK(1) << 8 | /* 5.5-> 2 */ 2963 CCK(0) << 4 | /* 2-> 1 */ 2964 CCK(0)); /* 1-> 1 */ 2965 #undef OFDM 2966 #undef CCK 2967 } 2968 2969 static void 2970 run_set_txpreamble(struct run_softc *sc) 2971 { 2972 uint32_t tmp; 2973 2974 run_read(sc, RT2860_AUTO_RSP_CFG, &tmp); 2975 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 2976 tmp |= RT2860_CCK_SHORT_EN; 2977 else 2978 tmp &= ~RT2860_CCK_SHORT_EN; 2979 run_write(sc, RT2860_AUTO_RSP_CFG, tmp); 2980 } 2981 2982 static void 2983 run_set_basicrates(struct run_softc *sc) 2984 { 2985 struct ieee80211com *ic = &sc->sc_ic; 2986 2987 /* set basic rates mask */ 2988 if (ic->ic_curmode == IEEE80211_MODE_11B) 2989 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x003); 2990 else if (ic->ic_curmode == IEEE80211_MODE_11A) 2991 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x150); 2992 else /* 11g */ 2993 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x15f); 2994 } 2995 2996 static void 2997 run_set_leds(struct run_softc *sc, uint16_t which) 2998 { 2999 3000 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LEDS, 3001 which | (sc->leds & 0x7f)); 3002 } 3003 3004 static void 3005 run_set_bssid(struct run_softc *sc, const uint8_t *bssid) 3006 { 3007 3008 run_write(sc, RT2860_MAC_BSSID_DW0, 3009 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24); 3010 run_write(sc, RT2860_MAC_BSSID_DW1, 3011 bssid[4] | bssid[5] << 8); 3012 } 3013 3014 static void 3015 run_set_macaddr(struct run_softc *sc, const uint8_t *addr) 3016 { 3017 3018 run_write(sc, RT2860_MAC_ADDR_DW0, 3019 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24); 3020 run_write(sc, RT2860_MAC_ADDR_DW1, 3021 addr[4] | addr[5] << 8 | 0xff << 16); 3022 } 3023 3024 static void 3025 run_updateslot(struct ifnet *ifp) 3026 { 3027 3028 /* do it in a process context */ 3029 run_do_async(ifp->if_softc, run_updateslot_cb, NULL, 0); 3030 } 3031 3032 /* ARGSUSED */ 3033 static void 3034 run_updateslot_cb(struct run_softc *sc, void *arg) 3035 { 3036 uint32_t tmp; 3037 3038 run_read(sc, RT2860_BKOFF_SLOT_CFG, &tmp); 3039 tmp &= ~0xff; 3040 tmp |= (sc->sc_ic.ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 3041 run_write(sc, RT2860_BKOFF_SLOT_CFG, tmp); 3042 } 3043 3044 static int8_t 3045 run_rssi2dbm(struct run_softc *sc, uint8_t rssi, uint8_t rxchain) 3046 { 3047 struct ieee80211com *ic = &sc->sc_ic; 3048 struct ieee80211_channel *c = ic->ic_curchan; 3049 int delta; 3050 3051 if (IEEE80211_IS_CHAN_5GHZ(c)) { 3052 u_int chan = ieee80211_chan2ieee(ic, c); 3053 delta = sc->rssi_5ghz[rxchain]; 3054 3055 /* determine channel group */ 3056 if (chan <= 64) 3057 delta -= sc->lna[1]; 3058 else if (chan <= 128) 3059 delta -= sc->lna[2]; 3060 else 3061 delta -= sc->lna[3]; 3062 } else 3063 delta = sc->rssi_2ghz[rxchain] - sc->lna[0]; 3064 3065 return -12 - delta - rssi; 3066 } 3067 3068 static int 3069 run_bbp_init(struct run_softc *sc) 3070 { 3071 int i, error, ntries; 3072 uint8_t bbp0; 3073 3074 /* wait for BBP to wake up */ 3075 for (ntries = 0; ntries < 20; ntries++) { 3076 if ((error = run_bbp_read(sc, 0, &bbp0)) != 0) 3077 return error; 3078 if (bbp0 != 0 && bbp0 != 0xff) 3079 break; 3080 } 3081 if (ntries == 20) 3082 return ETIMEDOUT; 3083 3084 /* initialize BBP registers to default values */ 3085 for (i = 0; i < (int)__arraycount(rt2860_def_bbp); i++) { 3086 run_bbp_write(sc, rt2860_def_bbp[i].reg, 3087 rt2860_def_bbp[i].val); 3088 } 3089 3090 /* fix BBP84 for RT2860E */ 3091 if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101) 3092 run_bbp_write(sc, 84, 0x19); 3093 3094 if (sc->mac_ver >= 0x3070) { 3095 run_bbp_write(sc, 79, 0x13); 3096 run_bbp_write(sc, 80, 0x05); 3097 run_bbp_write(sc, 81, 0x33); 3098 } else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) { 3099 run_bbp_write(sc, 69, 0x16); 3100 run_bbp_write(sc, 73, 0x12); 3101 } 3102 return 0; 3103 } 3104 3105 static int 3106 run_rt3070_rf_init(struct run_softc *sc) 3107 { 3108 uint32_t tmp; 3109 uint8_t rf, target, bbp4; 3110 int i; 3111 3112 run_rt3070_rf_read(sc, 30, &rf); 3113 /* toggle RF R30 bit 7 */ 3114 run_rt3070_rf_write(sc, 30, rf | 0x80); 3115 DELAY(1000); 3116 run_rt3070_rf_write(sc, 30, rf & ~0x80); 3117 3118 /* initialize RF registers to default value */ 3119 if (sc->mac_ver == 0x3572) { 3120 for (i = 0; i < (int)__arraycount(rt3572_def_rf); i++) { 3121 run_rt3070_rf_write(sc, rt3572_def_rf[i].reg, 3122 rt3572_def_rf[i].val); 3123 } 3124 } else { 3125 for (i = 0; i < (int)__arraycount(rt3070_def_rf); i++) { 3126 run_rt3070_rf_write(sc, rt3070_def_rf[i].reg, 3127 rt3070_def_rf[i].val); 3128 } 3129 } 3130 if (sc->mac_ver == 0x3572) { 3131 run_rt3070_rf_read(sc, 6, &rf); 3132 run_rt3070_rf_write(sc, 6, rf | 0x40); 3133 3134 /* increase voltage from 1.2V to 1.35V */ 3135 run_read(sc, RT3070_LDO_CFG0, &tmp); 3136 tmp = (tmp & ~0x1f000000) | 0x0d000000; 3137 run_write(sc, RT3070_LDO_CFG0, tmp); 3138 if (sc->mac_rev >= 0x0211 || !sc->patch_dac) { 3139 /* decrease voltage back to 1.2V */ 3140 DELAY(1000); 3141 tmp = (tmp & ~0x1f000000) | 0x01000000; 3142 run_write(sc, RT3070_LDO_CFG0, tmp); 3143 } 3144 } else if (sc->mac_ver == 0x3071) { 3145 run_rt3070_rf_read(sc, 6, &rf); 3146 run_rt3070_rf_write(sc, 6, rf | 0x40); 3147 run_rt3070_rf_write(sc, 31, 0x14); 3148 3149 run_read(sc, RT3070_LDO_CFG0, &tmp); 3150 tmp &= ~0x1f000000; 3151 if (sc->mac_rev < 0x0211) 3152 tmp |= 0x0d000000; /* 1.35V */ 3153 else 3154 tmp |= 0x01000000; /* 1.2V */ 3155 run_write(sc, RT3070_LDO_CFG0, tmp); 3156 3157 /* patch LNA_PE_G1 */ 3158 run_read(sc, RT3070_GPIO_SWITCH, &tmp); 3159 run_write(sc, RT3070_GPIO_SWITCH, tmp & ~0x20); 3160 } else if (sc->mac_ver == 0x3070) { 3161 /* increase voltage from 1.2V to 1.35V */ 3162 run_read(sc, RT3070_LDO_CFG0, &tmp); 3163 tmp = (tmp & ~0x0f000000) | 0x0d000000; 3164 run_write(sc, RT3070_LDO_CFG0, tmp); 3165 } 3166 3167 /* select 20MHz bandwidth */ 3168 run_rt3070_rf_read(sc, 31, &rf); 3169 run_rt3070_rf_write(sc, 31, rf & ~0x20); 3170 3171 /* calibrate filter for 20MHz bandwidth */ 3172 sc->rf24_20mhz = 0x1f; /* default value */ 3173 target = (sc->mac_ver < 0x3071) ? 0x16 : 0x13; 3174 run_rt3070_filter_calib(sc, 0x07, target, &sc->rf24_20mhz); 3175 3176 /* select 40MHz bandwidth */ 3177 run_bbp_read(sc, 4, &bbp4); 3178 run_bbp_write(sc, 4, (bbp4 & ~0x08) | 0x10); 3179 run_rt3070_rf_read(sc, 31, &rf); 3180 run_rt3070_rf_write(sc, 31, rf | 0x20); 3181 3182 /* calibrate filter for 40MHz bandwidth */ 3183 sc->rf24_40mhz = 0x2f; /* default value */ 3184 target = (sc->mac_ver < 0x3071) ? 0x19 : 0x15; 3185 run_rt3070_filter_calib(sc, 0x27, target, &sc->rf24_40mhz); 3186 3187 /* go back to 20MHz bandwidth */ 3188 run_bbp_read(sc, 4, &bbp4); 3189 run_bbp_write(sc, 4, bbp4 & ~0x18); 3190 3191 if (sc->mac_ver == 0x3572) { 3192 /* save default BBP registers 25 and 26 values */ 3193 run_bbp_read(sc, 25, &sc->bbp25); 3194 run_bbp_read(sc, 26, &sc->bbp26); 3195 } else if (sc->mac_rev < 0x0211) 3196 run_rt3070_rf_write(sc, 27, 0x03); 3197 3198 run_read(sc, RT3070_OPT_14, &tmp); 3199 run_write(sc, RT3070_OPT_14, tmp | 1); 3200 3201 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3202 run_rt3070_rf_read(sc, 17, &rf); 3203 rf &= ~RT3070_TX_LO1; 3204 if ((sc->mac_ver == 0x3070 || 3205 (sc->mac_ver == 0x3071 && sc->mac_rev >= 0x0211)) && 3206 !sc->ext_2ghz_lna) 3207 rf |= 0x20; /* fix for long range Rx issue */ 3208 if (sc->txmixgain_2ghz >= 1) 3209 rf = (rf & ~0x7) | sc->txmixgain_2ghz; 3210 run_rt3070_rf_write(sc, 17, rf); 3211 } 3212 if (sc->mac_ver == 0x3071) { 3213 run_rt3070_rf_read(sc, 1, &rf); 3214 rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD); 3215 rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD; 3216 run_rt3070_rf_write(sc, 1, rf); 3217 3218 run_rt3070_rf_read(sc, 15, &rf); 3219 run_rt3070_rf_write(sc, 15, rf & ~RT3070_TX_LO2); 3220 3221 run_rt3070_rf_read(sc, 20, &rf); 3222 run_rt3070_rf_write(sc, 20, rf & ~RT3070_RX_LO1); 3223 3224 run_rt3070_rf_read(sc, 21, &rf); 3225 run_rt3070_rf_write(sc, 21, rf & ~RT3070_RX_LO2); 3226 } 3227 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3228 /* fix Tx to Rx IQ glitch by raising RF voltage */ 3229 run_rt3070_rf_read(sc, 27, &rf); 3230 rf &= ~0x77; 3231 if (sc->mac_rev < 0x0211) 3232 rf |= 0x03; 3233 run_rt3070_rf_write(sc, 27, rf); 3234 } 3235 return 0; 3236 } 3237 3238 static int 3239 run_rt3070_filter_calib(struct run_softc *sc, uint8_t init, uint8_t target, 3240 uint8_t *val) 3241 { 3242 uint8_t rf22, rf24; 3243 uint8_t bbp55_pb, bbp55_sb, delta; 3244 int ntries; 3245 3246 /* program filter */ 3247 run_rt3070_rf_read(sc, 24, &rf24); 3248 rf24 = (rf24 & 0xc0) | init; /* initial filter value */ 3249 run_rt3070_rf_write(sc, 24, rf24); 3250 3251 /* enable baseband loopback mode */ 3252 run_rt3070_rf_read(sc, 22, &rf22); 3253 run_rt3070_rf_write(sc, 22, rf22 | 0x01); 3254 3255 /* set power and frequency of passband test tone */ 3256 run_bbp_write(sc, 24, 0x00); 3257 for (ntries = 0; ntries < 100; ntries++) { 3258 /* transmit test tone */ 3259 run_bbp_write(sc, 25, 0x90); 3260 DELAY(1000); 3261 /* read received power */ 3262 run_bbp_read(sc, 55, &bbp55_pb); 3263 if (bbp55_pb != 0) 3264 break; 3265 } 3266 if (ntries == 100) 3267 return ETIMEDOUT; 3268 3269 /* set power and frequency of stopband test tone */ 3270 run_bbp_write(sc, 24, 0x06); 3271 for (ntries = 0; ntries < 100; ntries++) { 3272 /* transmit test tone */ 3273 run_bbp_write(sc, 25, 0x90); 3274 DELAY(1000); 3275 /* read received power */ 3276 run_bbp_read(sc, 55, &bbp55_sb); 3277 3278 delta = bbp55_pb - bbp55_sb; 3279 if (delta > target) 3280 break; 3281 3282 /* reprogram filter */ 3283 rf24++; 3284 run_rt3070_rf_write(sc, 24, rf24); 3285 } 3286 if (ntries < 100) { 3287 if (rf24 != init) 3288 rf24--; /* backtrack */ 3289 *val = rf24; 3290 run_rt3070_rf_write(sc, 24, rf24); 3291 } 3292 3293 /* restore initial state */ 3294 run_bbp_write(sc, 24, 0x00); 3295 3296 /* disable baseband loopback mode */ 3297 run_rt3070_rf_read(sc, 22, &rf22); 3298 run_rt3070_rf_write(sc, 22, rf22 & ~0x01); 3299 3300 return 0; 3301 } 3302 3303 static void 3304 run_rt3070_rf_setup(struct run_softc *sc) 3305 { 3306 uint8_t bbp, rf; 3307 int i; 3308 3309 if (sc->mac_ver == 0x3572) { 3310 /* enable DC filter */ 3311 if (sc->mac_rev >= 0x0201) 3312 run_bbp_write(sc, 103, 0xc0); 3313 3314 run_bbp_read(sc, 138, &bbp); 3315 if (sc->ntxchains == 1) 3316 bbp |= 0x20; /* turn off DAC1 */ 3317 if (sc->nrxchains == 1) 3318 bbp &= ~0x02; /* turn off ADC1 */ 3319 run_bbp_write(sc, 138, bbp); 3320 3321 if (sc->mac_rev >= 0x0211) { 3322 /* improve power consumption */ 3323 run_bbp_read(sc, 31, &bbp); 3324 run_bbp_write(sc, 31, bbp & ~0x03); 3325 } 3326 3327 run_rt3070_rf_read(sc, 16, &rf); 3328 rf = (rf & ~0x07) | sc->txmixgain_2ghz; 3329 run_rt3070_rf_write(sc, 16, rf); 3330 } else if (sc->mac_ver == 0x3071) { 3331 /* enable DC filter */ 3332 if (sc->mac_rev >= 0x0201) 3333 run_bbp_write(sc, 103, 0xc0); 3334 3335 run_bbp_read(sc, 138, &bbp); 3336 if (sc->ntxchains == 1) 3337 bbp |= 0x20; /* turn off DAC1 */ 3338 if (sc->nrxchains == 1) 3339 bbp &= ~0x02; /* turn off ADC1 */ 3340 run_bbp_write(sc, 138, bbp); 3341 3342 if (sc->mac_rev >= 0x0211) { 3343 /* improve power consumption */ 3344 run_bbp_read(sc, 31, &bbp); 3345 run_bbp_write(sc, 31, bbp & ~0x03); 3346 } 3347 3348 run_write(sc, RT2860_TX_SW_CFG1, 0); 3349 if (sc->mac_rev < 0x0211) { 3350 run_write(sc, RT2860_TX_SW_CFG2, 3351 sc->patch_dac ? 0x2c : 0x0f); 3352 } else 3353 run_write(sc, RT2860_TX_SW_CFG2, 0); 3354 } else if (sc->mac_ver == 0x3070) { 3355 if (sc->mac_rev >= 0x0201) { 3356 /* enable DC filter */ 3357 run_bbp_write(sc, 103, 0xc0); 3358 3359 /* improve power consumption */ 3360 run_bbp_read(sc, 31, &bbp); 3361 run_bbp_write(sc, 31, bbp & ~0x03); 3362 } 3363 3364 if (sc->mac_rev < 0x0211) { 3365 run_write(sc, RT2860_TX_SW_CFG1, 0); 3366 run_write(sc, RT2860_TX_SW_CFG2, 0x2c); 3367 } else 3368 run_write(sc, RT2860_TX_SW_CFG2, 0); 3369 } 3370 3371 /* initialize RF registers from ROM for >=RT3071*/ 3372 if (sc->mac_ver >= 0x3071) { 3373 for (i = 0; i < 10; i++) { 3374 if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff) 3375 continue; 3376 run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val); 3377 } 3378 } 3379 } 3380 3381 static int 3382 run_txrx_enable(struct run_softc *sc) 3383 { 3384 uint32_t tmp; 3385 int error, ntries; 3386 3387 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN); 3388 for (ntries = 0; ntries < 200; ntries++) { 3389 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3390 return error; 3391 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3392 break; 3393 DELAY(1000); 3394 } 3395 if (ntries == 200) 3396 return ETIMEDOUT; 3397 3398 DELAY(50); 3399 3400 tmp |= RT2860_RX_DMA_EN | RT2860_TX_DMA_EN | RT2860_TX_WB_DDONE; 3401 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3402 3403 /* enable Rx bulk aggregation (set timeout and limit) */ 3404 tmp = RT2860_USB_TX_EN | RT2860_USB_RX_EN | RT2860_USB_RX_AGG_EN | 3405 RT2860_USB_RX_AGG_TO(128) | RT2860_USB_RX_AGG_LMT(2); 3406 run_write(sc, RT2860_USB_DMA_CFG, tmp); 3407 3408 /* set Rx filter */ 3409 tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR; 3410 if (sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR) { 3411 tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL | 3412 RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK | 3413 RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV | 3414 RT2860_DROP_CFACK | RT2860_DROP_CFEND; 3415 if (sc->sc_ic.ic_opmode == IEEE80211_M_STA) 3416 tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL; 3417 } 3418 run_write(sc, RT2860_RX_FILTR_CFG, tmp); 3419 3420 run_write(sc, RT2860_MAC_SYS_CTRL, 3421 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3422 3423 return 0; 3424 } 3425 3426 static int 3427 run_init(struct ifnet *ifp) 3428 { 3429 struct run_softc *sc = ifp->if_softc; 3430 struct ieee80211com *ic = &sc->sc_ic; 3431 uint32_t tmp; 3432 uint8_t bbp1, bbp3; 3433 int i, error, qid, ridx, ntries; 3434 3435 for (ntries = 0; ntries < 100; ntries++) { 3436 if ((error = run_read(sc, RT2860_ASIC_VER_ID, &tmp)) != 0) 3437 goto fail; 3438 if (tmp != 0 && tmp != 0xffffffff) 3439 break; 3440 DELAY(10); 3441 } 3442 if (ntries == 100) { 3443 error = ETIMEDOUT; 3444 goto fail; 3445 } 3446 3447 if ((sc->sc_flags & RUN_FWLOADED) == 0 && 3448 (error = run_load_microcode(sc)) != 0) { 3449 aprint_error_dev(sc->sc_dev, 3450 "could not load 8051 microcode\n"); 3451 goto fail; 3452 } 3453 3454 if (ifp->if_flags & IFF_RUNNING) 3455 run_stop(ifp, 0); 3456 3457 /* init host command ring */ 3458 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 3459 3460 /* init Tx rings (4 EDCAs) */ 3461 for (qid = 0; qid < 4; qid++) { 3462 if ((error = run_alloc_tx_ring(sc, qid)) != 0) 3463 goto fail; 3464 } 3465 /* init Rx ring */ 3466 if ((error = run_alloc_rx_ring(sc)) != 0) 3467 goto fail; 3468 3469 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 3470 run_set_macaddr(sc, ic->ic_myaddr); 3471 3472 for (ntries = 0; ntries < 100; ntries++) { 3473 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3474 goto fail; 3475 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3476 break; 3477 DELAY(1000); 3478 } 3479 if (ntries == 100) { 3480 aprint_error_dev(sc->sc_dev, 3481 "timeout waiting for DMA engine\n"); 3482 error = ETIMEDOUT; 3483 goto fail; 3484 } 3485 tmp &= 0xff0; 3486 tmp |= RT2860_TX_WB_DDONE; 3487 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3488 3489 /* turn off PME_OEN to solve high-current issue */ 3490 run_read(sc, RT2860_SYS_CTRL, &tmp); 3491 run_write(sc, RT2860_SYS_CTRL, tmp & ~RT2860_PME_OEN); 3492 3493 run_write(sc, RT2860_MAC_SYS_CTRL, 3494 RT2860_BBP_HRST | RT2860_MAC_SRST); 3495 run_write(sc, RT2860_USB_DMA_CFG, 0); 3496 3497 if ((error = run_reset(sc)) != 0) { 3498 aprint_error_dev(sc->sc_dev, "could not reset chipset\n"); 3499 goto fail; 3500 } 3501 3502 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3503 3504 /* init Tx power for all Tx rates (from EEPROM) */ 3505 for (ridx = 0; ridx < 5; ridx++) { 3506 if (sc->txpow20mhz[ridx] == 0xffffffff) 3507 continue; 3508 run_write(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]); 3509 } 3510 3511 for (i = 0; i < (int)__arraycount(rt2870_def_mac); i++) 3512 run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val); 3513 run_write(sc, RT2860_WMM_AIFSN_CFG, 0x00002273); 3514 run_write(sc, RT2860_WMM_CWMIN_CFG, 0x00002344); 3515 run_write(sc, RT2860_WMM_CWMAX_CFG, 0x000034aa); 3516 3517 if (sc->mac_ver >= 0x3070) { 3518 /* set delay of PA_PE assertion to 1us (unit of 0.25us) */ 3519 run_write(sc, RT2860_TX_SW_CFG0, 3520 4 << RT2860_DLY_PAPE_EN_SHIFT); 3521 } 3522 3523 /* wait while MAC is busy */ 3524 for (ntries = 0; ntries < 100; ntries++) { 3525 if ((error = run_read(sc, RT2860_MAC_STATUS_REG, &tmp)) != 0) 3526 goto fail; 3527 if (!(tmp & (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY))) 3528 break; 3529 DELAY(1000); 3530 } 3531 if (ntries == 100) { 3532 error = ETIMEDOUT; 3533 goto fail; 3534 } 3535 3536 /* clear Host to MCU mailbox */ 3537 run_write(sc, RT2860_H2M_BBPAGENT, 0); 3538 run_write(sc, RT2860_H2M_MAILBOX, 0); 3539 DELAY(1000); 3540 3541 if ((error = run_bbp_init(sc)) != 0) { 3542 aprint_error_dev(sc->sc_dev, "could not initialize BBP\n"); 3543 goto fail; 3544 } 3545 3546 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 3547 tmp &= ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 3548 RT2860_TBTT_TIMER_EN); 3549 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 3550 3551 /* clear RX WCID search table */ 3552 run_set_region_4(sc, RT2860_WCID_ENTRY(0), 0, 512); 3553 /* clear Pair-wise key table */ 3554 run_set_region_4(sc, RT2860_PKEY(0), 0, 2048); 3555 /* clear IV/EIV table */ 3556 run_set_region_4(sc, RT2860_IVEIV(0), 0, 512); 3557 /* clear WCID attribute table */ 3558 run_set_region_4(sc, RT2860_WCID_ATTR(0), 0, 8 * 32); 3559 /* clear shared key table */ 3560 run_set_region_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32); 3561 /* clear shared key mode */ 3562 run_set_region_4(sc, RT2860_SKEY_MODE_0_7, 0, 4); 3563 3564 run_read(sc, RT2860_US_CYC_CNT, &tmp); 3565 tmp = (tmp & ~0xff) | 0x1e; 3566 run_write(sc, RT2860_US_CYC_CNT, tmp); 3567 3568 if (sc->mac_rev != 0x0101) 3569 run_write(sc, RT2860_TXOP_CTRL_CFG, 0x0000583f); 3570 3571 run_write(sc, RT2860_WMM_TXOP0_CFG, 0); 3572 run_write(sc, RT2860_WMM_TXOP1_CFG, 48 << 16 | 96); 3573 3574 /* write vendor-specific BBP values (from EEPROM) */ 3575 for (i = 0; i < 8; i++) { 3576 if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff) 3577 continue; 3578 run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val); 3579 } 3580 3581 /* select Main antenna for 1T1R devices */ 3582 if (sc->rf_rev == RT3070_RF_3020) 3583 run_set_rx_antenna(sc, 0); 3584 3585 /* send LEDs operating mode to microcontroller */ 3586 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0]); 3587 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1]); 3588 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2]); 3589 3590 if (sc->mac_ver >= 0x3070) 3591 run_rt3070_rf_init(sc); 3592 3593 /* disable non-existing Rx chains */ 3594 run_bbp_read(sc, 3, &bbp3); 3595 bbp3 &= ~(1 << 3 | 1 << 4); 3596 if (sc->nrxchains == 2) 3597 bbp3 |= 1 << 3; 3598 else if (sc->nrxchains == 3) 3599 bbp3 |= 1 << 4; 3600 run_bbp_write(sc, 3, bbp3); 3601 3602 /* disable non-existing Tx chains */ 3603 run_bbp_read(sc, 1, &bbp1); 3604 if (sc->ntxchains == 1) 3605 bbp1 &= ~(1 << 3 | 1 << 4); 3606 run_bbp_write(sc, 1, bbp1); 3607 3608 if (sc->mac_ver >= 0x3070) 3609 run_rt3070_rf_setup(sc); 3610 3611 /* select default channel */ 3612 run_set_chan(sc, ic->ic_curchan); 3613 3614 /* turn radio LED on */ 3615 run_set_leds(sc, RT2860_LED_RADIO); 3616 3617 #ifdef RUN_HWCRYPTO 3618 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 3619 /* install WEP keys */ 3620 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3621 (void)run_set_key(ic, &ic->ic_crypto.cs_nw_keys[i], 3622 NULL); 3623 } 3624 #endif 3625 3626 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 3627 struct run_rx_data *data = &sc->rxq.data[i]; 3628 3629 usbd_setup_xfer(data->xfer, data, data->buf, RUN_MAX_RXSZ, 3630 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, run_rxeof); 3631 error = usbd_transfer(data->xfer); 3632 if (error != USBD_NORMAL_COMPLETION && 3633 error != USBD_IN_PROGRESS) 3634 goto fail; 3635 } 3636 3637 if ((error = run_txrx_enable(sc)) != 0) 3638 goto fail; 3639 3640 ifp->if_flags &= ~IFF_OACTIVE; 3641 ifp->if_flags |= IFF_RUNNING; 3642 3643 if (ic->ic_opmode == IEEE80211_M_MONITOR) 3644 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 3645 else 3646 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 3647 3648 if (error != 0) 3649 fail: run_stop(ifp, 1); 3650 return error; 3651 } 3652 3653 static void 3654 run_stop(struct ifnet *ifp, int disable) 3655 { 3656 struct run_softc *sc = ifp->if_softc; 3657 struct ieee80211com *ic = &sc->sc_ic; 3658 uint32_t tmp; 3659 int ntries, qid; 3660 3661 if (ifp->if_flags & IFF_RUNNING) 3662 run_set_leds(sc, 0); /* turn all LEDs off */ 3663 3664 sc->sc_tx_timer = 0; 3665 ifp->if_timer = 0; 3666 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 3667 3668 callout_stop(&sc->scan_to); 3669 callout_stop(&sc->calib_to); 3670 3671 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 3672 /* wait for all queued asynchronous commands to complete */ 3673 while (sc->cmdq.queued > 0) 3674 tsleep(&sc->cmdq, 0, "cmdq", 0); 3675 3676 /* disable Tx/Rx */ 3677 run_read(sc, RT2860_MAC_SYS_CTRL, &tmp); 3678 tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3679 run_write(sc, RT2860_MAC_SYS_CTRL, tmp); 3680 3681 /* wait for pending Tx to complete */ 3682 for (ntries = 0; ntries < 100; ntries++) { 3683 if (run_read(sc, RT2860_TXRXQ_PCNT, &tmp) != 0) 3684 break; 3685 if ((tmp & RT2860_TX2Q_PCNT_MASK) == 0) 3686 break; 3687 } 3688 DELAY(1000); 3689 run_write(sc, RT2860_USB_DMA_CFG, 0); 3690 3691 /* reset adapter */ 3692 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST); 3693 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3694 3695 /* reset Tx and Rx rings */ 3696 sc->qfullmsk = 0; 3697 for (qid = 0; qid < 4; qid++) 3698 run_free_tx_ring(sc, qid); 3699 run_free_rx_ring(sc); 3700 } 3701 3702 #ifndef IEEE80211_STA_ONLY 3703 static int 3704 run_setup_beacon(struct run_softc *sc) 3705 { 3706 struct ieee80211com *ic = &sc->sc_ic; 3707 struct rt2860_txwi txwi; 3708 struct mbuf *m; 3709 int ridx; 3710 3711 if ((m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo)) == NULL) 3712 return ENOBUFS; 3713 3714 memset(&txwi, 0, sizeof(txwi)); 3715 txwi.wcid = 0xff; 3716 txwi.len = htole16(m->m_pkthdr.len); 3717 /* send beacons at the lowest available rate */ 3718 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 3719 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 3720 txwi.phy = htole16(rt2860_rates[ridx].mcs); 3721 if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM) 3722 txwi.phy |= htole16(RT2860_PHY_OFDM); 3723 txwi.txop = RT2860_TX_TXOP_HT; 3724 txwi.flags = RT2860_TX_TS; 3725 3726 run_write_region_1(sc, RT2860_BCN_BASE(0), 3727 (uint8_t *)&txwi, sizeof(txwi)); 3728 run_write_region_1(sc, RT2860_BCN_BASE(0) + sizeof(txwi), 3729 mtod(m, uint8_t *), m->m_pkthdr.len); 3730 3731 m_freem(m); 3732 3733 return 0; 3734 } 3735 #endif 3736 3737 MODULE(MODULE_CLASS_DRIVER, if_run, "bpf"); 3738 3739 #ifdef _MODULE 3740 #include "ioconf.c" 3741 #endif 3742 3743 static int 3744 if_run_modcmd(modcmd_t cmd, void *arg) 3745 { 3746 int error = 0; 3747 3748 switch (cmd) { 3749 case MODULE_CMD_INIT: 3750 #ifdef _MODULE 3751 error = config_init_component(cfdriver_ioconf_run, 3752 cfattach_ioconf_run, cfdata_ioconf_run); 3753 #endif 3754 return error; 3755 case MODULE_CMD_FINI: 3756 #ifdef _MODULE 3757 error = config_fini_component(cfdriver_ioconf_run, 3758 cfattach_ioconf_run, cfdata_ioconf_run); 3759 #endif 3760 return error; 3761 default: 3762 return ENOTTY; 3763 } 3764 } 3765
Indexes created Thu Oct 02 10:09:58 GMT 2025