if_run.c revision 1.10.6.7
1 /* $NetBSD: if_run.c,v 1.10.6.7 2015/10/06 21:32:15 skrll Exp $ */ 2 /* $OpenBSD: if_run.c,v 1.90 2012/03/24 15:11:04 jsg Exp $ */ 3 4 /*- 5 * Copyright (c) 2008-2010 Damien Bergamini <damien.bergamini (at) free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Ralink Technology RT2700U/RT2800U/RT3000U chipset driver. 22 * http://www.ralinktech.com/ 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: if_run.c,v 1.10.6.7 2015/10/06 21:32:15 skrll Exp $"); 27 28 #include <sys/param.h> 29 #include <sys/sockio.h> 30 #include <sys/sysctl.h> 31 #include <sys/mbuf.h> 32 #include <sys/kernel.h> 33 #include <sys/socket.h> 34 #include <sys/systm.h> 35 #include <sys/malloc.h> 36 #include <sys/callout.h> 37 #include <sys/module.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_ether.h> 50 #include <net/if_media.h> 51 #include <net/if_types.h> 52 53 #include <net80211/ieee80211_var.h> 54 #include <net80211/ieee80211_amrr.h> 55 #include <net80211/ieee80211_radiotap.h> 56 57 #include <dev/firmload.h> 58 59 #include <dev/usb/usb.h> 60 #include <dev/usb/usbdi.h> 61 #include <dev/usb/usbdivar.h> 62 #include <dev/usb/usbdi_util.h> 63 #include <dev/usb/usbdevs.h> 64 65 #include <dev/ic/rt2860reg.h> /* shared with ral(4) */ 66 #include <dev/usb/if_runvar.h> 67 68 #ifdef RUN_DEBUG 69 #define DPRINTF(x) do { if (run_debug) printf x; } while (0) 70 #define DPRINTFN(n, x) do { if (run_debug >= (n)) printf x; } while (0) 71 int run_debug = 0; 72 #else 73 #define DPRINTF(x) 74 #define DPRINTFN(n, x) 75 #endif 76 77 #define USB_ID(v, p) { USB_VENDOR_##v, USB_PRODUCT_##v##_##p } 78 static const struct usb_devno run_devs[] = { 79 USB_ID(ABOCOM, RT2770), 80 USB_ID(ABOCOM, RT2870), 81 USB_ID(ABOCOM, RT3070), 82 USB_ID(ABOCOM, RT3071), 83 USB_ID(ABOCOM, RT3072), 84 USB_ID(ABOCOM2, RT2870_1), 85 USB_ID(ACCTON, RT2770), 86 USB_ID(ACCTON, RT2870_1), 87 USB_ID(ACCTON, RT2870_2), 88 USB_ID(ACCTON, RT2870_3), 89 USB_ID(ACCTON, RT2870_4), 90 USB_ID(ACCTON, RT2870_5), 91 USB_ID(ACCTON, RT3070), 92 USB_ID(ACCTON, RT3070_1), 93 USB_ID(ACCTON, RT3070_2), 94 USB_ID(ACCTON, RT3070_3), 95 USB_ID(ACCTON, RT3070_4), 96 USB_ID(ACCTON, RT3070_5), 97 USB_ID(ACCTON, RT3070_6), 98 USB_ID(AIRTIES, RT3070), 99 USB_ID(AIRTIES, RT3070_2), 100 USB_ID(ALLWIN, RT2070), 101 USB_ID(ALLWIN, RT2770), 102 USB_ID(ALLWIN, RT2870), 103 USB_ID(ALLWIN, RT3070), 104 USB_ID(ALLWIN, RT3071), 105 USB_ID(ALLWIN, RT3072), 106 USB_ID(ALLWIN, RT3572), 107 USB_ID(AMIGO, RT2870_1), 108 USB_ID(AMIGO, RT2870_2), 109 USB_ID(AMIT, CGWLUSB2GNR), 110 USB_ID(AMIT, RT2870_1), 111 USB_ID(AMIT2, RT2870), 112 USB_ID(ASUSTEK, RT2870_1), 113 USB_ID(ASUSTEK, RT2870_2), 114 USB_ID(ASUSTEK, RT2870_3), 115 USB_ID(ASUSTEK, RT2870_4), 116 USB_ID(ASUSTEK, RT2870_5), 117 USB_ID(ASUSTEK, RT3070), 118 USB_ID(ASUSTEK, RT3070_1), 119 USB_ID(ASUSTEK2, USBN11), 120 USB_ID(AZUREWAVE, RT2870_1), 121 USB_ID(AZUREWAVE, RT2870_2), 122 USB_ID(AZUREWAVE, RT3070), 123 USB_ID(AZUREWAVE, RT3070_2), 124 USB_ID(AZUREWAVE, RT3070_3), 125 USB_ID(AZUREWAVE, RT3070_4), 126 USB_ID(AZUREWAVE, RT3070_5), 127 USB_ID(BELKIN, F5D8053V3), 128 USB_ID(BELKIN, F5D8055), 129 USB_ID(BELKIN, F5D8055V2), 130 USB_ID(BELKIN, F6D4050V1), 131 USB_ID(BELKIN, F6D4050V2), 132 USB_ID(BELKIN, F7D1101V2), 133 USB_ID(BELKIN, RT2870_1), 134 USB_ID(BELKIN, RT2870_2), 135 USB_ID(BEWAN, RT3070), 136 USB_ID(CISCOLINKSYS, AE1000), 137 USB_ID(CISCOLINKSYS, AM10), 138 USB_ID(CISCOLINKSYS2, RT3070), 139 USB_ID(CISCOLINKSYS3, RT3070), 140 USB_ID(CONCEPTRONIC, RT2870_1), 141 USB_ID(CONCEPTRONIC, RT2870_2), 142 USB_ID(CONCEPTRONIC, RT2870_3), 143 USB_ID(CONCEPTRONIC, RT2870_4), 144 USB_ID(CONCEPTRONIC, RT2870_5), 145 USB_ID(CONCEPTRONIC, RT2870_6), 146 USB_ID(CONCEPTRONIC, RT2870_7), 147 USB_ID(CONCEPTRONIC, RT2870_8), 148 USB_ID(CONCEPTRONIC, RT3070_1), 149 USB_ID(CONCEPTRONIC, RT3070_2), 150 USB_ID(CONCEPTRONIC, RT3070_3), 151 USB_ID(COREGA, CGWLUSB300GNM), 152 USB_ID(COREGA, RT2870_1), 153 USB_ID(COREGA, RT2870_2), 154 USB_ID(COREGA, RT2870_3), 155 USB_ID(COREGA, RT3070), 156 USB_ID(CYBERTAN, RT2870), 157 USB_ID(DLINK, RT2870), 158 USB_ID(DLINK, RT3072), 159 USB_ID(DLINK2, DWA130), 160 USB_ID(DLINK2, RT2870_1), 161 USB_ID(DLINK2, RT2870_2), 162 USB_ID(DLINK2, RT3070_1), 163 USB_ID(DLINK2, RT3070_2), 164 USB_ID(DLINK2, RT3070_3), 165 USB_ID(DLINK2, RT3070_4), 166 USB_ID(DLINK2, RT3070_5), 167 USB_ID(DLINK2, RT3072), 168 USB_ID(DLINK2, RT3072_1), 169 USB_ID(DVICO, RT3070), 170 USB_ID(EDIMAX, EW7717), 171 USB_ID(EDIMAX, EW7718), 172 USB_ID(EDIMAX, EW7722UTN), 173 USB_ID(EDIMAX, RT2870_1), 174 USB_ID(ENCORE, RT3070), 175 USB_ID(ENCORE, RT3070_2), 176 USB_ID(ENCORE, RT3070_3), 177 USB_ID(GIGABYTE, GNWB31N), 178 USB_ID(GIGABYTE, GNWB32L), 179 USB_ID(GIGABYTE, RT2870_1), 180 USB_ID(GIGASET, RT3070_1), 181 USB_ID(GIGASET, RT3070_2), 182 USB_ID(GUILLEMOT, HWNU300), 183 USB_ID(HAWKING, HWUN2), 184 USB_ID(HAWKING, RT2870_1), 185 USB_ID(HAWKING, RT2870_2), 186 USB_ID(HAWKING, RT2870_3), 187 USB_ID(HAWKING, RT2870_4), 188 USB_ID(HAWKING, RT2870_5), 189 USB_ID(HAWKING, RT3070), 190 USB_ID(IODATA, RT3072_1), 191 USB_ID(IODATA, RT3072_2), 192 USB_ID(IODATA, RT3072_3), 193 USB_ID(IODATA, RT3072_4), 194 USB_ID(LINKSYS4, RT3070), 195 USB_ID(LINKSYS4, WUSB100), 196 USB_ID(LINKSYS4, WUSB54GC_3), 197 USB_ID(LINKSYS4, WUSB600N), 198 USB_ID(LINKSYS4, WUSB600NV2), 199 USB_ID(LOGITEC, LANW300NU2), 200 USB_ID(LOGITEC, RT2870_1), 201 USB_ID(LOGITEC, RT2870_2), 202 USB_ID(LOGITEC, RT2870_3), 203 USB_ID(LOGITEC, RT3020), 204 USB_ID(MELCO, RT2870_1), 205 USB_ID(MELCO, RT2870_2), 206 USB_ID(MELCO, WLIUCAG300N), 207 USB_ID(MELCO, WLIUCG300N), 208 USB_ID(MELCO, WLIUCG301N), 209 USB_ID(MELCO, WLIUCGN), 210 USB_ID(MELCO, WLIUCGNHP), 211 USB_ID(MELCO, WLIUCGNM), 212 USB_ID(MELCO, WLIUCGNM2T), 213 USB_ID(MOTOROLA4, RT2770), 214 USB_ID(MOTOROLA4, RT3070), 215 USB_ID(MSI, RT3070), 216 USB_ID(MSI, RT3070_2), 217 USB_ID(MSI, RT3070_3), 218 USB_ID(MSI, RT3070_4), 219 USB_ID(MSI, RT3070_5), 220 USB_ID(MSI, RT3070_6), 221 USB_ID(MSI, RT3070_7), 222 USB_ID(MSI, RT3070_8), 223 USB_ID(MSI, RT3070_9), 224 USB_ID(MSI, RT3070_10), 225 USB_ID(MSI, RT3070_11), 226 USB_ID(MSI, RT3070_12), 227 USB_ID(MSI, RT3070_13), 228 USB_ID(MSI, RT3070_14), 229 USB_ID(MSI, RT3070_15), 230 USB_ID(OVISLINK, RT3071), 231 USB_ID(OVISLINK, RT3072), 232 USB_ID(PARA, RT3070), 233 USB_ID(PEGATRON, RT2870), 234 USB_ID(PEGATRON, RT3070), 235 USB_ID(PEGATRON, RT3070_2), 236 USB_ID(PEGATRON, RT3070_3), 237 USB_ID(PEGATRON, RT3072), 238 USB_ID(PHILIPS, RT2870), 239 USB_ID(PLANEX2, GWUS300MINIS), 240 USB_ID(PLANEX2, GWUSMICRO300), 241 USB_ID(PLANEX2, GWUSMICRON), 242 USB_ID(PLANEX2, GWUS300MINIX), 243 USB_ID(PLANEX2, RT3070), 244 USB_ID(QCOM, RT2870), 245 USB_ID(QUANTA, RT3070), 246 USB_ID(RALINK, RT2070), 247 USB_ID(RALINK, RT2770), 248 USB_ID(RALINK, RT2870), 249 USB_ID(RALINK, RT3070), 250 USB_ID(RALINK, RT3071), 251 USB_ID(RALINK, RT3072), 252 USB_ID(RALINK, RT3370), 253 USB_ID(RALINK, RT3572), 254 USB_ID(RALINK, RT8070), 255 USB_ID(SAMSUNG, RT2870_1), 256 USB_ID(SENAO, RT2870_1), 257 USB_ID(SENAO, RT2870_2), 258 USB_ID(SENAO, RT2870_3), 259 USB_ID(SENAO, RT2870_4), 260 USB_ID(SENAO, RT3070), 261 USB_ID(SENAO, RT3071), 262 USB_ID(SENAO, RT3072), 263 USB_ID(SENAO, RT3072_2), 264 USB_ID(SENAO, RT3072_3), 265 USB_ID(SENAO, RT3072_4), 266 USB_ID(SENAO, RT3072_5), 267 USB_ID(SITECOMEU, RT2870_1), 268 USB_ID(SITECOMEU, RT2870_2), 269 USB_ID(SITECOMEU, RT2870_3), 270 USB_ID(SITECOMEU, RT3070_1), 271 USB_ID(SITECOMEU, RT3072_3), 272 USB_ID(SITECOMEU, RT3072_4), 273 USB_ID(SITECOMEU, RT3072_5), 274 USB_ID(SITECOMEU, WL302), 275 USB_ID(SITECOMEU, WL315), 276 USB_ID(SITECOMEU, WL321), 277 USB_ID(SITECOMEU, WL324), 278 USB_ID(SITECOMEU, WL329), 279 USB_ID(SITECOMEU, WL343), 280 USB_ID(SITECOMEU, WL344), 281 USB_ID(SITECOMEU, WL345), 282 USB_ID(SITECOMEU, WL349V4), 283 USB_ID(SITECOMEU, WL608), 284 USB_ID(SITECOMEU, WLA4000), 285 USB_ID(SITECOMEU, WLA5000), 286 USB_ID(SPARKLAN, RT2870_1), 287 USB_ID(SPARKLAN, RT2870_2), 288 USB_ID(SPARKLAN, RT3070), 289 USB_ID(SWEEX2, LW153), 290 USB_ID(SWEEX2, LW303), 291 USB_ID(SWEEX2, LW313), 292 USB_ID(TOSHIBA, RT3070), 293 USB_ID(UMEDIA, RT2870_1), 294 USB_ID(UMEDIA, TEW645UB), 295 USB_ID(ZCOM, RT2870_1), 296 USB_ID(ZCOM, RT2870_2), 297 USB_ID(ZINWELL, RT2870_1), 298 USB_ID(ZINWELL, RT2870_2), 299 USB_ID(ZINWELL, RT3070), 300 USB_ID(ZINWELL, RT3072), 301 USB_ID(ZINWELL, RT3072_2), 302 USB_ID(ZYXEL, NWD2105), 303 USB_ID(ZYXEL, NWD211AN), 304 USB_ID(ZYXEL, RT2870_1), 305 USB_ID(ZYXEL, RT2870_2), 306 USB_ID(ZYXEL, RT3070), 307 }; 308 309 static int run_match(device_t, cfdata_t, void *); 310 static void run_attach(device_t, device_t, void *); 311 static int run_detach(device_t, int); 312 static int run_activate(device_t, enum devact); 313 314 CFATTACH_DECL_NEW(run, sizeof(struct run_softc), 315 run_match, run_attach, run_detach, run_activate); 316 317 static int run_alloc_rx_ring(struct run_softc *); 318 static void run_free_rx_ring(struct run_softc *); 319 static int run_alloc_tx_ring(struct run_softc *, int); 320 static void run_free_tx_ring(struct run_softc *, int); 321 static int run_load_microcode(struct run_softc *); 322 static int run_reset(struct run_softc *); 323 static int run_read(struct run_softc *, uint16_t, uint32_t *); 324 static int run_read_region_1(struct run_softc *, uint16_t, 325 uint8_t *, int); 326 static int run_write_2(struct run_softc *, uint16_t, uint16_t); 327 static int run_write(struct run_softc *, uint16_t, uint32_t); 328 static int run_write_region_1(struct run_softc *, uint16_t, 329 const uint8_t *, int); 330 static int run_set_region_4(struct run_softc *, uint16_t, 331 uint32_t, int); 332 static int run_efuse_read_2(struct run_softc *, uint16_t, 333 uint16_t *); 334 static int run_eeprom_read_2(struct run_softc *, uint16_t, 335 uint16_t *); 336 static int run_rt2870_rf_write(struct run_softc *, uint8_t, 337 uint32_t); 338 static int run_rt3070_rf_read(struct run_softc *, uint8_t, 339 uint8_t *); 340 static int run_rt3070_rf_write(struct run_softc *, uint8_t, 341 uint8_t); 342 static int run_bbp_read(struct run_softc *, uint8_t, uint8_t *); 343 static int run_bbp_write(struct run_softc *, uint8_t, uint8_t); 344 static int run_mcu_cmd(struct run_softc *, uint8_t, uint16_t); 345 static const char * run_get_rf(int); 346 static int run_read_eeprom(struct run_softc *); 347 static struct ieee80211_node * 348 run_node_alloc(struct ieee80211_node_table *); 349 static int run_media_change(struct ifnet *); 350 static void run_next_scan(void *); 351 static void run_task(void *); 352 static void run_do_async(struct run_softc *, 353 void (*)(struct run_softc *, void *), void *, int); 354 static int run_newstate(struct ieee80211com *, 355 enum ieee80211_state, int); 356 static void run_newstate_cb(struct run_softc *, void *); 357 static int run_updateedca(struct ieee80211com *); 358 static void run_updateedca_cb(struct run_softc *, void *); 359 #ifdef RUN_HWCRYPTO 360 static int run_set_key(struct ieee80211com *, 361 const struct ieee80211_key *, const uint8_t *); 362 static void run_set_key_cb(struct run_softc *, void *); 363 static int run_delete_key(struct ieee80211com *, 364 const struct ieee80211_key *); 365 static void run_delete_key_cb(struct run_softc *, void *); 366 #endif 367 static void run_calibrate_to(void *); 368 static void run_calibrate_cb(struct run_softc *, void *); 369 static void run_newassoc(struct ieee80211_node *, int); 370 static void run_rx_frame(struct run_softc *, uint8_t *, int); 371 static void run_rxeof(struct usbd_xfer *, void *, 372 usbd_status); 373 static void run_txeof(struct usbd_xfer *, void *, 374 usbd_status); 375 static int run_tx(struct run_softc *, struct mbuf *, 376 struct ieee80211_node *); 377 static void run_start(struct ifnet *); 378 static void run_watchdog(struct ifnet *); 379 static int run_ioctl(struct ifnet *, u_long, void *); 380 static void run_select_chan_group(struct run_softc *, int); 381 static void run_set_agc(struct run_softc *, uint8_t); 382 static void run_set_rx_antenna(struct run_softc *, int); 383 static void run_rt2870_set_chan(struct run_softc *, u_int); 384 static void run_rt3070_set_chan(struct run_softc *, u_int); 385 static void run_rt3572_set_chan(struct run_softc *, u_int); 386 static int run_set_chan(struct run_softc *, 387 struct ieee80211_channel *); 388 static void run_enable_tsf_sync(struct run_softc *); 389 static void run_enable_mrr(struct run_softc *); 390 static void run_set_txpreamble(struct run_softc *); 391 static void run_set_basicrates(struct run_softc *); 392 static void run_set_leds(struct run_softc *, uint16_t); 393 static void run_set_bssid(struct run_softc *, const uint8_t *); 394 static void run_set_macaddr(struct run_softc *, const uint8_t *); 395 static void run_updateslot(struct ifnet *); 396 static void run_updateslot_cb(struct run_softc *, void *); 397 static int8_t run_rssi2dbm(struct run_softc *, uint8_t, uint8_t); 398 static int run_bbp_init(struct run_softc *); 399 static int run_rt3070_rf_init(struct run_softc *); 400 static int run_rt3070_filter_calib(struct run_softc *, uint8_t, 401 uint8_t, uint8_t *); 402 static void run_rt3070_rf_setup(struct run_softc *); 403 static int run_txrx_enable(struct run_softc *); 404 static int run_init(struct ifnet *); 405 static void run_stop(struct ifnet *, int); 406 #ifndef IEEE80211_STA_ONLY 407 static int run_setup_beacon(struct run_softc *); 408 #endif 409 410 static const struct { 411 uint32_t reg; 412 uint32_t val; 413 } rt2870_def_mac[] = { 414 RT2870_DEF_MAC 415 }; 416 417 static const struct { 418 uint8_t reg; 419 uint8_t val; 420 } rt2860_def_bbp[] = { 421 RT2860_DEF_BBP 422 }; 423 424 static const struct rfprog { 425 uint8_t chan; 426 uint32_t r1, r2, r3, r4; 427 } rt2860_rf2850[] = { 428 RT2860_RF2850 429 }; 430 431 static const struct { 432 uint8_t n, r, k; 433 } rt3070_freqs[] = { 434 RT3070_RF3052 435 }; 436 437 static const struct { 438 uint8_t reg; 439 uint8_t val; 440 } rt3070_def_rf[] = { 441 RT3070_DEF_RF 442 }, rt3572_def_rf[] = { 443 RT3572_DEF_RF 444 }; 445 446 static int 447 firmware_load(const char *dname, const char *iname, uint8_t **ucodep, 448 size_t *sizep) 449 { 450 firmware_handle_t fh; 451 int error; 452 453 if ((error = firmware_open(dname, iname, &fh)) != 0) 454 return error; 455 *sizep = firmware_get_size(fh); 456 if ((*ucodep = firmware_malloc(*sizep)) == NULL) { 457 firmware_close(fh); 458 return ENOMEM; 459 } 460 if ((error = firmware_read(fh, 0, *ucodep, *sizep)) != 0) 461 firmware_free(*ucodep, *sizep); 462 firmware_close(fh); 463 464 return error; 465 } 466 467 static int 468 run_match(device_t parent, cfdata_t match, void *aux) 469 { 470 struct usb_attach_arg *uaa = aux; 471 472 return (usb_lookup(run_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 473 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 474 } 475 476 static void 477 run_attach(device_t parent, device_t self, void *aux) 478 { 479 struct run_softc *sc = device_private(self); 480 struct usb_attach_arg *uaa = aux; 481 struct ieee80211com *ic = &sc->sc_ic; 482 struct ifnet *ifp = &sc->sc_if; 483 usb_interface_descriptor_t *id; 484 usb_endpoint_descriptor_t *ed; 485 char *devinfop; 486 int i, nrx, ntx, ntries, error; 487 uint32_t ver; 488 489 aprint_naive("\n"); 490 aprint_normal("\n"); 491 492 sc->sc_dev = self; 493 sc->sc_udev = uaa->uaa_device; 494 495 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 496 aprint_normal_dev(sc->sc_dev, "%s\n", devinfop); 497 usbd_devinfo_free(devinfop); 498 499 error = usbd_set_config_no(sc->sc_udev, 1, 0); 500 if (error != 0) { 501 aprint_error_dev(sc->sc_dev, "failed to set configuration" 502 ", err=%s\n", usbd_errstr(error)); 503 return; 504 } 505 506 /* get the first interface handle */ 507 error = usbd_device2interface_handle(sc->sc_udev, 0, &sc->sc_iface); 508 if (error != 0) { 509 aprint_error_dev(sc->sc_dev, 510 "could not get interface handle\n"); 511 return; 512 } 513 514 /* 515 * Find all bulk endpoints. There are 7 bulk endpoints: 1 for RX 516 * and 6 for TX (4 EDCAs + HCCA + Prio). 517 * Update 03-14-2009: some devices like the Planex GW-US300MiniS 518 * seem to have only 4 TX bulk endpoints (Fukaumi Naoki). 519 */ 520 nrx = ntx = 0; 521 id = usbd_get_interface_descriptor(sc->sc_iface); 522 for (i = 0; i < id->bNumEndpoints; i++) { 523 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 524 if (ed == NULL || UE_GET_XFERTYPE(ed->bmAttributes) != UE_BULK) 525 continue; 526 527 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) { 528 sc->rxq.pipe_no = ed->bEndpointAddress; 529 nrx++; 530 } else if (ntx < 4) { 531 sc->txq[ntx].pipe_no = ed->bEndpointAddress; 532 ntx++; 533 } 534 } 535 /* make sure we've got them all */ 536 if (nrx < 1 || ntx < 4) { 537 aprint_error_dev(sc->sc_dev, "missing endpoint\n"); 538 return; 539 } 540 541 usb_init_task(&sc->sc_task, run_task, sc, 0); 542 callout_init(&sc->scan_to, 0); 543 callout_setfunc(&sc->scan_to, run_next_scan, sc); 544 callout_init(&sc->calib_to, 0); 545 callout_setfunc(&sc->calib_to, run_calibrate_to, sc); 546 547 sc->amrr.amrr_min_success_threshold = 1; 548 sc->amrr.amrr_max_success_threshold = 10; 549 550 /* wait for the chip to settle */ 551 for (ntries = 0; ntries < 100; ntries++) { 552 if (run_read(sc, RT2860_ASIC_VER_ID, &ver) != 0) 553 return; 554 if (ver != 0 && ver != 0xffffffff) 555 break; 556 DELAY(10); 557 } 558 if (ntries == 100) { 559 aprint_error_dev(sc->sc_dev, 560 "timeout waiting for NIC to initialize\n"); 561 return; 562 } 563 sc->mac_ver = ver >> 16; 564 sc->mac_rev = ver & 0xffff; 565 566 /* retrieve RF rev. no and various other things from EEPROM */ 567 run_read_eeprom(sc); 568 569 aprint_error_dev(sc->sc_dev, 570 "MAC/BBP RT%04X (rev 0x%04X), RF %s (MIMO %dT%dR), address %s\n", 571 sc->mac_ver, sc->mac_rev, run_get_rf(sc->rf_rev), sc->ntxchains, 572 sc->nrxchains, ether_sprintf(ic->ic_myaddr)); 573 574 ic->ic_ifp = ifp; 575 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 576 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 577 ic->ic_state = IEEE80211_S_INIT; 578 579 /* set device capabilities */ 580 ic->ic_caps = 581 IEEE80211_C_MONITOR | /* monitor mode supported */ 582 #ifndef IEEE80211_STA_ONLY 583 IEEE80211_C_IBSS | /* IBSS mode supported */ 584 IEEE80211_C_HOSTAP | /* HostAP mode supported */ 585 #endif 586 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 587 IEEE80211_C_SHSLOT | /* short slot time supported */ 588 #ifdef RUN_HWCRYPTO 589 IEEE80211_C_WEP | /* WEP */ 590 IEEE80211_C_TKIP | /* TKIP */ 591 IEEE80211_C_AES_CCM | /* AES CCMP */ 592 IEEE80211_C_TKIPMIC | /* TKIPMIC */ 593 #endif 594 IEEE80211_C_WME | /* WME */ 595 IEEE80211_C_WPA; /* WPA/RSN */ 596 597 if (sc->rf_rev == RT2860_RF_2750 || 598 sc->rf_rev == RT2860_RF_2850 || 599 sc->rf_rev == RT3070_RF_3052) { 600 /* set supported .11a rates */ 601 ic->ic_sup_rates[IEEE80211_MODE_11A] = 602 ieee80211_std_rateset_11a; 603 604 /* set supported .11a channels */ 605 for (i = 14; i < (int)__arraycount(rt2860_rf2850); i++) { 606 uint8_t chan = rt2860_rf2850[i].chan; 607 ic->ic_channels[chan].ic_freq = 608 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ); 609 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A; 610 } 611 } 612 613 /* set supported .11b and .11g rates */ 614 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 615 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 616 617 /* set supported .11b and .11g channels (1 through 14) */ 618 for (i = 1; i <= 14; i++) { 619 ic->ic_channels[i].ic_freq = 620 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 621 ic->ic_channels[i].ic_flags = 622 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 623 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 624 } 625 626 ifp->if_softc = sc; 627 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 628 ifp->if_init = run_init; 629 ifp->if_ioctl = run_ioctl; 630 ifp->if_start = run_start; 631 ifp->if_watchdog = run_watchdog; 632 IFQ_SET_READY(&ifp->if_snd); 633 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 634 635 if_attach(ifp); 636 ieee80211_ifattach(ic); 637 ic->ic_node_alloc = run_node_alloc; 638 ic->ic_newassoc = run_newassoc; 639 ic->ic_updateslot = run_updateslot; 640 ic->ic_wme.wme_update = run_updateedca; 641 #ifdef RUN_HWCRYPTO 642 ic->ic_crypto.cs_key_set = run_set_key; 643 ic->ic_crypto.cs_key_delete = run_delete_key; 644 #endif 645 /* override state transition machine */ 646 sc->sc_newstate = ic->ic_newstate; 647 ic->ic_newstate = run_newstate; 648 ieee80211_media_init(ic, run_media_change, ieee80211_media_status); 649 650 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 651 sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 652 &sc->sc_drvbpf); 653 654 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 655 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 656 sc->sc_rxtap.wr_ihdr.it_present = htole32(RUN_RX_RADIOTAP_PRESENT); 657 658 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 659 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 660 sc->sc_txtap.wt_ihdr.it_present = htole32(RUN_TX_RADIOTAP_PRESENT); 661 662 ieee80211_announce(ic); 663 664 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 665 666 if (!pmf_device_register(self, NULL, NULL)) 667 aprint_error_dev(self, "couldn't establish power handler\n"); 668 } 669 670 static int 671 run_detach(device_t self, int flags) 672 { 673 struct run_softc *sc = device_private(self); 674 struct ifnet *ifp = &sc->sc_if; 675 struct ieee80211com *ic = &sc->sc_ic; 676 int s; 677 678 if (ifp->if_softc == NULL) 679 return 0; 680 681 pmf_device_deregister(self); 682 683 s = splnet(); 684 685 sc->sc_flags |= RUN_DETACHING; 686 687 if (ifp->if_flags & IFF_RUNNING) { 688 usb_rem_task(sc->sc_udev, &sc->sc_task); 689 run_stop(ifp, 0); 690 } 691 692 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 693 bpf_detach(ifp); 694 ieee80211_ifdetach(ic); 695 if_detach(ifp); 696 697 splx(s); 698 699 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 700 701 callout_destroy(&sc->scan_to); 702 callout_destroy(&sc->calib_to); 703 704 return 0; 705 } 706 707 static int 708 run_activate(device_t self, enum devact act) 709 { 710 struct run_softc *sc = device_private(self); 711 712 switch (act) { 713 case DVACT_DEACTIVATE: 714 if_deactivate(sc->sc_ic.ic_ifp); 715 return 0; 716 default: 717 return EOPNOTSUPP; 718 } 719 } 720 721 static int 722 run_alloc_rx_ring(struct run_softc *sc) 723 { 724 struct run_rx_ring *rxq = &sc->rxq; 725 int i, error; 726 727 error = usbd_open_pipe(sc->sc_iface, rxq->pipe_no, 0, &rxq->pipeh); 728 if (error != 0) 729 goto fail; 730 731 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 732 struct run_rx_data *data = &rxq->data[i]; 733 734 data->sc = sc; /* backpointer for callbacks */ 735 736 error = usbd_create_xfer(sc->rxq.pipeh, RUN_MAX_RXSZ, 737 USBD_SHORT_XFER_OK, 0, &data->xfer); 738 if (error) 739 goto fail; 740 741 data->buf = usbd_get_buffer(data->xfer); 742 } 743 if (error != 0) 744 fail: run_free_rx_ring(sc); 745 return error; 746 } 747 748 static void 749 run_free_rx_ring(struct run_softc *sc) 750 { 751 struct run_rx_ring *rxq = &sc->rxq; 752 int i; 753 754 if (rxq->pipeh != NULL) { 755 usbd_abort_pipe(rxq->pipeh); 756 usbd_close_pipe(rxq->pipeh); 757 rxq->pipeh = NULL; 758 } 759 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 760 if (rxq->data[i].xfer != NULL) 761 usbd_destroy_xfer(rxq->data[i].xfer); 762 rxq->data[i].xfer = NULL; 763 } 764 } 765 766 static int 767 run_alloc_tx_ring(struct run_softc *sc, int qid) 768 { 769 struct run_tx_ring *txq = &sc->txq[qid]; 770 int i, error; 771 772 txq->cur = txq->queued = 0; 773 774 error = usbd_open_pipe(sc->sc_iface, txq->pipe_no, 0, &txq->pipeh); 775 if (error != 0) 776 goto fail; 777 778 for (i = 0; i < RUN_TX_RING_COUNT; i++) { 779 struct run_tx_data *data = &txq->data[i]; 780 781 data->sc = sc; /* backpointer for callbacks */ 782 data->qid = qid; 783 784 error = usbd_create_xfer(txq->pipeh, RUN_MAX_TXSZ, 785 USBD_FORCE_SHORT_XFER, 0, &data->xfer); 786 if (error) 787 goto fail; 788 789 data->buf = usbd_get_buffer(data->xfer); 790 /* zeroize the TXD + TXWI part */ 791 memset(data->buf, 0, sizeof(struct rt2870_txd) + 792 sizeof(struct rt2860_txwi)); 793 } 794 if (error != 0) 795 fail: run_free_tx_ring(sc, qid); 796 return error; 797 } 798 799 static void 800 run_free_tx_ring(struct run_softc *sc, int qid) 801 { 802 struct run_tx_ring *txq = &sc->txq[qid]; 803 int i; 804 805 if (txq->pipeh != NULL) { 806 usbd_abort_pipe(txq->pipeh); 807 usbd_close_pipe(txq->pipeh); 808 txq->pipeh = NULL; 809 } 810 for (i = 0; i < RUN_TX_RING_COUNT; i++) { 811 if (txq->data[i].xfer != NULL) 812 usbd_destroy_xfer(txq->data[i].xfer); 813 txq->data[i].xfer = NULL; 814 } 815 } 816 817 static int 818 run_load_microcode(struct run_softc *sc) 819 { 820 usb_device_request_t req; 821 const char *fwname; 822 u_char *ucode = NULL; /* XXX gcc 4.8.3: maybe-uninitialized */ 823 size_t size = 0; /* XXX gcc 4.8.3: maybe-uninitialized */ 824 uint32_t tmp; 825 int ntries, error; 826 827 /* RT3071/RT3072 use a different firmware */ 828 if (sc->mac_ver != 0x2860 && 829 sc->mac_ver != 0x2872 && 830 sc->mac_ver != 0x3070) 831 fwname = "run-rt3071"; 832 else 833 fwname = "run-rt2870"; 834 835 if ((error = firmware_load("run", fwname, &ucode, &size)) != 0) { 836 aprint_error_dev(sc->sc_dev, 837 "error %d, could not read firmware %s\n", error, fwname); 838 return error; 839 } 840 if (size != 4096) { 841 aprint_error_dev(sc->sc_dev, 842 "invalid firmware size (should be 4KB)\n"); 843 firmware_free(ucode, size); 844 return EINVAL; 845 } 846 847 run_read(sc, RT2860_ASIC_VER_ID, &tmp); 848 /* write microcode image */ 849 run_write_region_1(sc, RT2870_FW_BASE, ucode, size); 850 firmware_free(ucode, size); 851 run_write(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff); 852 run_write(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff); 853 854 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 855 req.bRequest = RT2870_RESET; 856 USETW(req.wValue, 8); 857 USETW(req.wIndex, 0); 858 USETW(req.wLength, 0); 859 if ((error = usbd_do_request(sc->sc_udev, &req, NULL)) != 0) 860 return error; 861 862 usbd_delay_ms(sc->sc_udev, 10); 863 run_write(sc, RT2860_H2M_MAILBOX, 0); 864 if ((error = run_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0)) != 0) 865 return error; 866 867 /* wait until microcontroller is ready */ 868 for (ntries = 0; ntries < 1000; ntries++) { 869 if ((error = run_read(sc, RT2860_SYS_CTRL, &tmp)) != 0) 870 return error; 871 if (tmp & RT2860_MCU_READY) 872 break; 873 DELAY(1000); 874 } 875 if (ntries == 1000) { 876 aprint_error_dev(sc->sc_dev, 877 "timeout waiting for MCU to initialize\n"); 878 return ETIMEDOUT; 879 } 880 881 sc->sc_flags |= RUN_FWLOADED; 882 883 DPRINTF(("microcode successfully loaded after %d tries\n", ntries)); 884 return 0; 885 } 886 887 static int 888 run_reset(struct run_softc *sc) 889 { 890 usb_device_request_t req; 891 892 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 893 req.bRequest = RT2870_RESET; 894 USETW(req.wValue, 1); 895 USETW(req.wIndex, 0); 896 USETW(req.wLength, 0); 897 return usbd_do_request(sc->sc_udev, &req, NULL); 898 } 899 900 static int 901 run_read(struct run_softc *sc, uint16_t reg, uint32_t *val) 902 { 903 uint32_t tmp; 904 int error; 905 906 error = run_read_region_1(sc, reg, (uint8_t *)&tmp, sizeof(tmp)); 907 if (error == 0) 908 *val = le32toh(tmp); 909 else 910 *val = 0xffffffff; 911 return error; 912 } 913 914 static int 915 run_read_region_1(struct run_softc *sc, uint16_t reg, uint8_t *buf, int len) 916 { 917 usb_device_request_t req; 918 919 req.bmRequestType = UT_READ_VENDOR_DEVICE; 920 req.bRequest = RT2870_READ_REGION_1; 921 USETW(req.wValue, 0); 922 USETW(req.wIndex, reg); 923 USETW(req.wLength, len); 924 return usbd_do_request(sc->sc_udev, &req, buf); 925 } 926 927 static int 928 run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val) 929 { 930 usb_device_request_t req; 931 932 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 933 req.bRequest = RT2870_WRITE_2; 934 USETW(req.wValue, val); 935 USETW(req.wIndex, reg); 936 USETW(req.wLength, 0); 937 return usbd_do_request(sc->sc_udev, &req, NULL); 938 } 939 940 static int 941 run_write(struct run_softc *sc, uint16_t reg, uint32_t val) 942 { 943 int error; 944 945 if ((error = run_write_2(sc, reg, val & 0xffff)) == 0) 946 error = run_write_2(sc, reg + 2, val >> 16); 947 return error; 948 } 949 950 static int 951 run_write_region_1(struct run_softc *sc, uint16_t reg, const uint8_t *buf, 952 int len) 953 { 954 #if 1 955 int i, error = 0; 956 /* 957 * NB: the WRITE_REGION_1 command is not stable on RT2860. 958 * We thus issue multiple WRITE_2 commands instead. 959 */ 960 KASSERT((len & 1) == 0); 961 for (i = 0; i < len && error == 0; i += 2) 962 error = run_write_2(sc, reg + i, buf[i] | buf[i + 1] << 8); 963 return error; 964 #else 965 usb_device_request_t req; 966 967 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 968 req.bRequest = RT2870_WRITE_REGION_1; 969 USETW(req.wValue, 0); 970 USETW(req.wIndex, reg); 971 USETW(req.wLength, len); 972 return usbd_do_request(sc->sc_udev, &req, buf); 973 #endif 974 } 975 976 static int 977 run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int count) 978 { 979 int error = 0; 980 981 for (; count > 0 && error == 0; count--, reg += 4) 982 error = run_write(sc, reg, val); 983 return error; 984 } 985 986 /* Read 16-bit from eFUSE ROM (RT3070 only.) */ 987 static int 988 run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 989 { 990 uint32_t tmp; 991 uint16_t reg; 992 int error, ntries; 993 994 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 995 return error; 996 997 addr *= 2; 998 /*- 999 * Read one 16-byte block into registers EFUSE_DATA[0-3]: 1000 * DATA0: F E D C 1001 * DATA1: B A 9 8 1002 * DATA2: 7 6 5 4 1003 * DATA3: 3 2 1 0 1004 */ 1005 tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK); 1006 tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK; 1007 run_write(sc, RT3070_EFUSE_CTRL, tmp); 1008 for (ntries = 0; ntries < 100; ntries++) { 1009 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1010 return error; 1011 if (!(tmp & RT3070_EFSROM_KICK)) 1012 break; 1013 DELAY(2); 1014 } 1015 if (ntries == 100) 1016 return ETIMEDOUT; 1017 1018 if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK) { 1019 *val = 0xffff; /* address not found */ 1020 return 0; 1021 } 1022 /* determine to which 32-bit register our 16-bit word belongs */ 1023 reg = RT3070_EFUSE_DATA3 - (addr & 0xc); 1024 if ((error = run_read(sc, reg, &tmp)) != 0) 1025 return error; 1026 1027 *val = (addr & 2) ? tmp >> 16 : tmp & 0xffff; 1028 return 0; 1029 } 1030 1031 static int 1032 run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 1033 { 1034 usb_device_request_t req; 1035 uint16_t tmp; 1036 int error; 1037 1038 addr *= 2; 1039 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1040 req.bRequest = RT2870_EEPROM_READ; 1041 USETW(req.wValue, 0); 1042 USETW(req.wIndex, addr); 1043 USETW(req.wLength, sizeof(tmp)); 1044 error = usbd_do_request(sc->sc_udev, &req, &tmp); 1045 if (error == 0) 1046 *val = le16toh(tmp); 1047 else 1048 *val = 0xffff; 1049 return error; 1050 } 1051 1052 static __inline int 1053 run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val) 1054 { 1055 1056 /* either eFUSE ROM or EEPROM */ 1057 return sc->sc_srom_read(sc, addr, val); 1058 } 1059 1060 static int 1061 run_rt2870_rf_write(struct run_softc *sc, uint8_t reg, uint32_t val) 1062 { 1063 uint32_t tmp; 1064 int error, ntries; 1065 1066 for (ntries = 0; ntries < 10; ntries++) { 1067 if ((error = run_read(sc, RT2860_RF_CSR_CFG0, &tmp)) != 0) 1068 return error; 1069 if (!(tmp & RT2860_RF_REG_CTRL)) 1070 break; 1071 } 1072 if (ntries == 10) 1073 return ETIMEDOUT; 1074 1075 /* RF registers are 24-bit on the RT2860 */ 1076 tmp = RT2860_RF_REG_CTRL | 24 << RT2860_RF_REG_WIDTH_SHIFT | 1077 (val & 0x3fffff) << 2 | (reg & 3); 1078 return run_write(sc, RT2860_RF_CSR_CFG0, tmp); 1079 } 1080 1081 static int 1082 run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1083 { 1084 uint32_t tmp; 1085 int error, ntries; 1086 1087 for (ntries = 0; ntries < 100; ntries++) { 1088 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1089 return error; 1090 if (!(tmp & RT3070_RF_KICK)) 1091 break; 1092 } 1093 if (ntries == 100) 1094 return ETIMEDOUT; 1095 1096 tmp = RT3070_RF_KICK | reg << 8; 1097 if ((error = run_write(sc, RT3070_RF_CSR_CFG, tmp)) != 0) 1098 return error; 1099 1100 for (ntries = 0; ntries < 100; ntries++) { 1101 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1102 return error; 1103 if (!(tmp & RT3070_RF_KICK)) 1104 break; 1105 } 1106 if (ntries == 100) 1107 return ETIMEDOUT; 1108 1109 *val = tmp & 0xff; 1110 return 0; 1111 } 1112 1113 static int 1114 run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1115 { 1116 uint32_t tmp; 1117 int error, ntries; 1118 1119 for (ntries = 0; ntries < 10; ntries++) { 1120 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1121 return error; 1122 if (!(tmp & RT3070_RF_KICK)) 1123 break; 1124 } 1125 if (ntries == 10) 1126 return ETIMEDOUT; 1127 1128 tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val; 1129 return run_write(sc, RT3070_RF_CSR_CFG, tmp); 1130 } 1131 1132 static int 1133 run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1134 { 1135 uint32_t tmp; 1136 int ntries, error; 1137 1138 for (ntries = 0; ntries < 10; ntries++) { 1139 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1140 return error; 1141 if (!(tmp & RT2860_BBP_CSR_KICK)) 1142 break; 1143 } 1144 if (ntries == 10) 1145 return ETIMEDOUT; 1146 1147 tmp = RT2860_BBP_CSR_READ | RT2860_BBP_CSR_KICK | reg << 8; 1148 if ((error = run_write(sc, RT2860_BBP_CSR_CFG, tmp)) != 0) 1149 return error; 1150 1151 for (ntries = 0; ntries < 10; ntries++) { 1152 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1153 return error; 1154 if (!(tmp & RT2860_BBP_CSR_KICK)) 1155 break; 1156 } 1157 if (ntries == 10) 1158 return ETIMEDOUT; 1159 1160 *val = tmp & 0xff; 1161 return 0; 1162 } 1163 1164 static int 1165 run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1166 { 1167 uint32_t tmp; 1168 int ntries, error; 1169 1170 for (ntries = 0; ntries < 10; ntries++) { 1171 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1172 return error; 1173 if (!(tmp & RT2860_BBP_CSR_KICK)) 1174 break; 1175 } 1176 if (ntries == 10) 1177 return ETIMEDOUT; 1178 1179 tmp = RT2860_BBP_CSR_KICK | reg << 8 | val; 1180 return run_write(sc, RT2860_BBP_CSR_CFG, tmp); 1181 } 1182 1183 /* 1184 * Send a command to the 8051 microcontroller unit. 1185 */ 1186 static int 1187 run_mcu_cmd(struct run_softc *sc, uint8_t cmd, uint16_t arg) 1188 { 1189 uint32_t tmp; 1190 int error, ntries; 1191 1192 for (ntries = 0; ntries < 100; ntries++) { 1193 if ((error = run_read(sc, RT2860_H2M_MAILBOX, &tmp)) != 0) 1194 return error; 1195 if (!(tmp & RT2860_H2M_BUSY)) 1196 break; 1197 } 1198 if (ntries == 100) 1199 return ETIMEDOUT; 1200 1201 tmp = RT2860_H2M_BUSY | RT2860_TOKEN_NO_INTR << 16 | arg; 1202 if ((error = run_write(sc, RT2860_H2M_MAILBOX, tmp)) == 0) 1203 error = run_write(sc, RT2860_HOST_CMD, cmd); 1204 return error; 1205 } 1206 1207 /* 1208 * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word. 1209 * Used to adjust per-rate Tx power registers. 1210 */ 1211 static __inline uint32_t 1212 b4inc(uint32_t b32, int8_t delta) 1213 { 1214 int8_t i, b4; 1215 1216 for (i = 0; i < 8; i++) { 1217 b4 = b32 & 0xf; 1218 b4 += delta; 1219 if (b4 < 0) 1220 b4 = 0; 1221 else if (b4 > 0xf) 1222 b4 = 0xf; 1223 b32 = b32 >> 4 | b4 << 28; 1224 } 1225 return b32; 1226 } 1227 1228 static const char * 1229 run_get_rf(int rev) 1230 { 1231 switch (rev) { 1232 case RT2860_RF_2820: return "RT2820"; 1233 case RT2860_RF_2850: return "RT2850"; 1234 case RT2860_RF_2720: return "RT2720"; 1235 case RT2860_RF_2750: return "RT2750"; 1236 case RT3070_RF_3020: return "RT3020"; 1237 case RT3070_RF_2020: return "RT2020"; 1238 case RT3070_RF_3021: return "RT3021"; 1239 case RT3070_RF_3022: return "RT3022"; 1240 case RT3070_RF_3052: return "RT3052"; 1241 } 1242 return "unknown"; 1243 } 1244 1245 static int 1246 run_read_eeprom(struct run_softc *sc) 1247 { 1248 struct ieee80211com *ic = &sc->sc_ic; 1249 int8_t delta_2ghz, delta_5ghz; 1250 uint32_t tmp; 1251 uint16_t val; 1252 int ridx, ant, i; 1253 1254 /* check whether the ROM is eFUSE ROM or EEPROM */ 1255 sc->sc_srom_read = run_eeprom_read_2; 1256 if (sc->mac_ver >= 0x3070) { 1257 run_read(sc, RT3070_EFUSE_CTRL, &tmp); 1258 DPRINTF(("EFUSE_CTRL=0x%08x\n", tmp)); 1259 if (tmp & RT3070_SEL_EFUSE) 1260 sc->sc_srom_read = run_efuse_read_2; 1261 } 1262 1263 /* read ROM version */ 1264 run_srom_read(sc, RT2860_EEPROM_VERSION, &val); 1265 DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8)); 1266 1267 /* read MAC address */ 1268 run_srom_read(sc, RT2860_EEPROM_MAC01, &val); 1269 ic->ic_myaddr[0] = val & 0xff; 1270 ic->ic_myaddr[1] = val >> 8; 1271 run_srom_read(sc, RT2860_EEPROM_MAC23, &val); 1272 ic->ic_myaddr[2] = val & 0xff; 1273 ic->ic_myaddr[3] = val >> 8; 1274 run_srom_read(sc, RT2860_EEPROM_MAC45, &val); 1275 ic->ic_myaddr[4] = val & 0xff; 1276 ic->ic_myaddr[5] = val >> 8; 1277 1278 /* read vendor BBP settings */ 1279 for (i = 0; i < 10; i++) { 1280 run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val); 1281 sc->bbp[i].val = val & 0xff; 1282 sc->bbp[i].reg = val >> 8; 1283 DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val)); 1284 } 1285 if (sc->mac_ver >= 0x3071) { 1286 /* read vendor RF settings */ 1287 for (i = 0; i < 10; i++) { 1288 run_srom_read(sc, RT3071_EEPROM_RF_BASE + i, &val); 1289 sc->rf[i].val = val & 0xff; 1290 sc->rf[i].reg = val >> 8; 1291 DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg, 1292 sc->rf[i].val)); 1293 } 1294 } 1295 1296 /* read RF frequency offset from EEPROM */ 1297 run_srom_read(sc, RT2860_EEPROM_FREQ_LEDS, &val); 1298 sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0; 1299 DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff)); 1300 1301 if ((val >> 8) != 0xff) { 1302 /* read LEDs operating mode */ 1303 sc->leds = val >> 8; 1304 run_srom_read(sc, RT2860_EEPROM_LED1, &sc->led[0]); 1305 run_srom_read(sc, RT2860_EEPROM_LED2, &sc->led[1]); 1306 run_srom_read(sc, RT2860_EEPROM_LED3, &sc->led[2]); 1307 } else { 1308 /* broken EEPROM, use default settings */ 1309 sc->leds = 0x01; 1310 sc->led[0] = 0x5555; 1311 sc->led[1] = 0x2221; 1312 sc->led[2] = 0x5627; /* differs from RT2860 */ 1313 } 1314 DPRINTF(("EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n", 1315 sc->leds, sc->led[0], sc->led[1], sc->led[2])); 1316 1317 /* read RF information */ 1318 run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val); 1319 if (val == 0xffff) { 1320 DPRINTF(("invalid EEPROM antenna info, using default\n")); 1321 if (sc->mac_ver == 0x3572) { 1322 /* default to RF3052 2T2R */ 1323 sc->rf_rev = RT3070_RF_3052; 1324 sc->ntxchains = 2; 1325 sc->nrxchains = 2; 1326 } else if (sc->mac_ver >= 0x3070) { 1327 /* default to RF3020 1T1R */ 1328 sc->rf_rev = RT3070_RF_3020; 1329 sc->ntxchains = 1; 1330 sc->nrxchains = 1; 1331 } else { 1332 /* default to RF2820 1T2R */ 1333 sc->rf_rev = RT2860_RF_2820; 1334 sc->ntxchains = 1; 1335 sc->nrxchains = 2; 1336 } 1337 } else { 1338 sc->rf_rev = (val >> 8) & 0xf; 1339 sc->ntxchains = (val >> 4) & 0xf; 1340 sc->nrxchains = val & 0xf; 1341 } 1342 DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n", 1343 sc->rf_rev, sc->ntxchains, sc->nrxchains)); 1344 1345 run_srom_read(sc, RT2860_EEPROM_CONFIG, &val); 1346 DPRINTF(("EEPROM CFG 0x%04x\n", val)); 1347 /* check if driver should patch the DAC issue */ 1348 if ((val >> 8) != 0xff) 1349 sc->patch_dac = (val >> 15) & 1; 1350 if ((val & 0xff) != 0xff) { 1351 sc->ext_5ghz_lna = (val >> 3) & 1; 1352 sc->ext_2ghz_lna = (val >> 2) & 1; 1353 /* check if RF supports automatic Tx access gain control */ 1354 sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1; 1355 /* check if we have a hardware radio switch */ 1356 sc->rfswitch = val & 1; 1357 } 1358 1359 /* read power settings for 2GHz channels */ 1360 for (i = 0; i < 14; i += 2) { 1361 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val); 1362 sc->txpow1[i + 0] = (int8_t)(val & 0xff); 1363 sc->txpow1[i + 1] = (int8_t)(val >> 8); 1364 1365 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val); 1366 sc->txpow2[i + 0] = (int8_t)(val & 0xff); 1367 sc->txpow2[i + 1] = (int8_t)(val >> 8); 1368 } 1369 /* fix broken Tx power entries */ 1370 for (i = 0; i < 14; i++) { 1371 if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31) 1372 sc->txpow1[i] = 5; 1373 if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31) 1374 sc->txpow2[i] = 5; 1375 DPRINTF(("chan %d: power1=%d, power2=%d\n", 1376 rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i])); 1377 } 1378 /* read power settings for 5GHz channels */ 1379 for (i = 0; i < 40; i += 2) { 1380 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val); 1381 sc->txpow1[i + 14] = (int8_t)(val & 0xff); 1382 sc->txpow1[i + 15] = (int8_t)(val >> 8); 1383 1384 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val); 1385 sc->txpow2[i + 14] = (int8_t)(val & 0xff); 1386 sc->txpow2[i + 15] = (int8_t)(val >> 8); 1387 } 1388 /* fix broken Tx power entries */ 1389 for (i = 0; i < 40; i++) { 1390 if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15) 1391 sc->txpow1[14 + i] = 5; 1392 if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15) 1393 sc->txpow2[14 + i] = 5; 1394 DPRINTF(("chan %d: power1=%d, power2=%d\n", 1395 rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i], 1396 sc->txpow2[14 + i])); 1397 } 1398 1399 /* read Tx power compensation for each Tx rate */ 1400 run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val); 1401 delta_2ghz = delta_5ghz = 0; 1402 if ((val & 0xff) != 0xff && (val & 0x80)) { 1403 delta_2ghz = val & 0xf; 1404 if (!(val & 0x40)) /* negative number */ 1405 delta_2ghz = -delta_2ghz; 1406 } 1407 val >>= 8; 1408 if ((val & 0xff) != 0xff && (val & 0x80)) { 1409 delta_5ghz = val & 0xf; 1410 if (!(val & 0x40)) /* negative number */ 1411 delta_5ghz = -delta_5ghz; 1412 } 1413 DPRINTF(("power compensation=%d (2GHz), %d (5GHz)\n", 1414 delta_2ghz, delta_5ghz)); 1415 1416 for (ridx = 0; ridx < 5; ridx++) { 1417 uint32_t reg; 1418 1419 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val); 1420 reg = val; 1421 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val); 1422 reg |= (uint32_t)val << 16; 1423 1424 sc->txpow20mhz[ridx] = reg; 1425 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz); 1426 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz); 1427 1428 DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, " 1429 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx], 1430 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx])); 1431 } 1432 1433 /* read RSSI offsets and LNA gains from EEPROM */ 1434 run_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ, &val); 1435 sc->rssi_2ghz[0] = val & 0xff; /* Ant A */ 1436 sc->rssi_2ghz[1] = val >> 8; /* Ant B */ 1437 run_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ, &val); 1438 if (sc->mac_ver >= 0x3070) { 1439 /* 1440 * On RT3070 chips (limited to 2 Rx chains), this ROM 1441 * field contains the Tx mixer gain for the 2GHz band. 1442 */ 1443 if ((val & 0xff) != 0xff) 1444 sc->txmixgain_2ghz = val & 0x7; 1445 DPRINTF(("tx mixer gain=%u (2GHz)\n", sc->txmixgain_2ghz)); 1446 } else { 1447 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */ 1448 } 1449 sc->lna[2] = val >> 8; /* channel group 2 */ 1450 1451 run_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ, &val); 1452 sc->rssi_5ghz[0] = val & 0xff; /* Ant A */ 1453 sc->rssi_5ghz[1] = val >> 8; /* Ant B */ 1454 run_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ, &val); 1455 if (sc->mac_ver == 0x3572) { 1456 /* 1457 * On RT3572 chips (limited to 2 Rx chains), this ROM 1458 * field contains the Tx mixer gain for the 5GHz band. 1459 */ 1460 if ((val & 0xff) != 0xff) 1461 sc->txmixgain_5ghz = val & 0x7; 1462 DPRINTF(("tx mixer gain=%u (5GHz)\n", sc->txmixgain_5ghz)); 1463 } else { 1464 sc->rssi_5ghz[2] = val & 0xff; /* Ant C */ 1465 } 1466 sc->lna[3] = val >> 8; /* channel group 3 */ 1467 1468 run_srom_read(sc, RT2860_EEPROM_LNA, &val); 1469 sc->lna[0] = val & 0xff; /* channel group 0 */ 1470 sc->lna[1] = val >> 8; /* channel group 1 */ 1471 1472 /* fix broken 5GHz LNA entries */ 1473 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) { 1474 DPRINTF(("invalid LNA for channel group %d\n", 2)); 1475 sc->lna[2] = sc->lna[1]; 1476 } 1477 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) { 1478 DPRINTF(("invalid LNA for channel group %d\n", 3)); 1479 sc->lna[3] = sc->lna[1]; 1480 } 1481 1482 /* fix broken RSSI offset entries */ 1483 for (ant = 0; ant < 3; ant++) { 1484 if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) { 1485 DPRINTF(("invalid RSSI%d offset: %d (2GHz)\n", 1486 ant + 1, sc->rssi_2ghz[ant])); 1487 sc->rssi_2ghz[ant] = 0; 1488 } 1489 if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) { 1490 DPRINTF(("invalid RSSI%d offset: %d (5GHz)\n", 1491 ant + 1, sc->rssi_5ghz[ant])); 1492 sc->rssi_5ghz[ant] = 0; 1493 } 1494 } 1495 return 0; 1496 } 1497 1498 static struct ieee80211_node * 1499 run_node_alloc(struct ieee80211_node_table *nt) 1500 { 1501 struct run_node *rn = 1502 malloc(sizeof(struct run_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1503 return rn ? &rn->ni : NULL; 1504 } 1505 1506 static int 1507 run_media_change(struct ifnet *ifp) 1508 { 1509 struct run_softc *sc = ifp->if_softc; 1510 struct ieee80211com *ic = &sc->sc_ic; 1511 uint8_t rate, ridx; 1512 int error; 1513 1514 error = ieee80211_media_change(ifp); 1515 if (error != ENETRESET) 1516 return error; 1517 1518 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1519 rate = ic->ic_sup_rates[ic->ic_curmode]. 1520 rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL; 1521 for (ridx = 0; ridx <= RT2860_RIDX_MAX; ridx++) 1522 if (rt2860_rates[ridx].rate == rate) 1523 break; 1524 sc->fixed_ridx = ridx; 1525 } 1526 1527 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1528 run_init(ifp); 1529 1530 return 0; 1531 } 1532 1533 static void 1534 run_next_scan(void *arg) 1535 { 1536 struct run_softc *sc = arg; 1537 1538 if (sc->sc_ic.ic_state == IEEE80211_S_SCAN) 1539 ieee80211_next_scan(&sc->sc_ic); 1540 } 1541 1542 static void 1543 run_task(void *arg) 1544 { 1545 struct run_softc *sc = arg; 1546 struct run_host_cmd_ring *ring = &sc->cmdq; 1547 struct run_host_cmd *cmd; 1548 int s; 1549 1550 /* process host commands */ 1551 s = splusb(); 1552 while (ring->next != ring->cur) { 1553 cmd = &ring->cmd[ring->next]; 1554 splx(s); 1555 /* callback */ 1556 cmd->cb(sc, cmd->data); 1557 s = splusb(); 1558 ring->queued--; 1559 ring->next = (ring->next + 1) % RUN_HOST_CMD_RING_COUNT; 1560 } 1561 wakeup(ring); 1562 splx(s); 1563 } 1564 1565 static void 1566 run_do_async(struct run_softc *sc, void (*cb)(struct run_softc *, void *), 1567 void *arg, int len) 1568 { 1569 struct run_host_cmd_ring *ring = &sc->cmdq; 1570 struct run_host_cmd *cmd; 1571 int s; 1572 1573 if (sc->sc_flags & RUN_DETACHING) 1574 return; 1575 1576 s = splusb(); 1577 cmd = &ring->cmd[ring->cur]; 1578 cmd->cb = cb; 1579 KASSERT(len <= sizeof(cmd->data)); 1580 memcpy(cmd->data, arg, len); 1581 ring->cur = (ring->cur + 1) % RUN_HOST_CMD_RING_COUNT; 1582 1583 /* if there is no pending command already, schedule a task */ 1584 if (++ring->queued == 1) 1585 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 1586 splx(s); 1587 } 1588 1589 static int 1590 run_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1591 { 1592 struct run_softc *sc = ic->ic_ifp->if_softc; 1593 struct run_cmd_newstate cmd; 1594 1595 callout_stop(&sc->scan_to); 1596 callout_stop(&sc->calib_to); 1597 1598 /* do it in a process context */ 1599 cmd.state = nstate; 1600 cmd.arg = arg; 1601 run_do_async(sc, run_newstate_cb, &cmd, sizeof(cmd)); 1602 return 0; 1603 } 1604 1605 static void 1606 run_newstate_cb(struct run_softc *sc, void *arg) 1607 { 1608 struct run_cmd_newstate *cmd = arg; 1609 struct ifnet *ifp = &sc->sc_if; 1610 struct ieee80211com *ic = &sc->sc_ic; 1611 enum ieee80211_state ostate; 1612 struct ieee80211_node *ni; 1613 uint32_t tmp, sta[3]; 1614 uint8_t wcid; 1615 int s; 1616 1617 s = splnet(); 1618 ostate = ic->ic_state; 1619 1620 if (ostate == IEEE80211_S_RUN) { 1621 /* turn link LED off */ 1622 run_set_leds(sc, RT2860_LED_RADIO); 1623 } 1624 1625 switch (cmd->state) { 1626 case IEEE80211_S_INIT: 1627 if (ostate == IEEE80211_S_RUN) { 1628 /* abort TSF synchronization */ 1629 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 1630 run_write(sc, RT2860_BCN_TIME_CFG, 1631 tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 1632 RT2860_TBTT_TIMER_EN)); 1633 } 1634 break; 1635 1636 case IEEE80211_S_SCAN: 1637 run_set_chan(sc, ic->ic_curchan); 1638 callout_schedule(&sc->scan_to, hz / 5); 1639 break; 1640 1641 case IEEE80211_S_AUTH: 1642 case IEEE80211_S_ASSOC: 1643 run_set_chan(sc, ic->ic_curchan); 1644 break; 1645 1646 case IEEE80211_S_RUN: 1647 run_set_chan(sc, ic->ic_curchan); 1648 1649 ni = ic->ic_bss; 1650 1651 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1652 run_updateslot(ifp); 1653 run_enable_mrr(sc); 1654 run_set_txpreamble(sc); 1655 run_set_basicrates(sc); 1656 run_set_bssid(sc, ni->ni_bssid); 1657 } 1658 #ifndef IEEE80211_STA_ONLY 1659 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 1660 ic->ic_opmode == IEEE80211_M_IBSS) 1661 (void)run_setup_beacon(sc); 1662 #endif 1663 if (ic->ic_opmode == IEEE80211_M_STA) { 1664 /* add BSS entry to the WCID table */ 1665 wcid = RUN_AID2WCID(ni->ni_associd); 1666 run_write_region_1(sc, RT2860_WCID_ENTRY(wcid), 1667 ni->ni_macaddr, IEEE80211_ADDR_LEN); 1668 1669 /* fake a join to init the tx rate */ 1670 run_newassoc(ni, 1); 1671 } 1672 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1673 run_enable_tsf_sync(sc); 1674 1675 /* clear statistic registers used by AMRR */ 1676 run_read_region_1(sc, RT2860_TX_STA_CNT0, 1677 (uint8_t *)sta, sizeof(sta)); 1678 /* start calibration timer */ 1679 callout_schedule(&sc->calib_to, hz); 1680 } 1681 1682 /* turn link LED on */ 1683 run_set_leds(sc, RT2860_LED_RADIO | 1684 (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan) ? 1685 RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ)); 1686 break; 1687 } 1688 (void)sc->sc_newstate(ic, cmd->state, cmd->arg); 1689 splx(s); 1690 } 1691 1692 static int 1693 run_updateedca(struct ieee80211com *ic) 1694 { 1695 1696 /* do it in a process context */ 1697 run_do_async(ic->ic_ifp->if_softc, run_updateedca_cb, NULL, 0); 1698 return 0; 1699 } 1700 1701 /* ARGSUSED */ 1702 static void 1703 run_updateedca_cb(struct run_softc *sc, void *arg) 1704 { 1705 struct ieee80211com *ic = &sc->sc_ic; 1706 int s, aci; 1707 1708 s = splnet(); 1709 /* update MAC TX configuration registers */ 1710 for (aci = 0; aci < WME_NUM_AC; aci++) { 1711 run_write(sc, RT2860_EDCA_AC_CFG(aci), 1712 ic->ic_wme.wme_params[aci].wmep_logcwmax << 16 | 1713 ic->ic_wme.wme_params[aci].wmep_logcwmin << 12 | 1714 ic->ic_wme.wme_params[aci].wmep_aifsn << 8 | 1715 ic->ic_wme.wme_params[aci].wmep_txopLimit); 1716 } 1717 1718 /* update SCH/DMA registers too */ 1719 run_write(sc, RT2860_WMM_AIFSN_CFG, 1720 ic->ic_wme.wme_params[WME_AC_VO].wmep_aifsn << 12 | 1721 ic->ic_wme.wme_params[WME_AC_VI].wmep_aifsn << 8 | 1722 ic->ic_wme.wme_params[WME_AC_BK].wmep_aifsn << 4 | 1723 ic->ic_wme.wme_params[WME_AC_BE].wmep_aifsn); 1724 run_write(sc, RT2860_WMM_CWMIN_CFG, 1725 ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmin << 12 | 1726 ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmin << 8 | 1727 ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmin << 4 | 1728 ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmin); 1729 run_write(sc, RT2860_WMM_CWMAX_CFG, 1730 ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmax << 12 | 1731 ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmax << 8 | 1732 ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmax << 4 | 1733 ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmax); 1734 run_write(sc, RT2860_WMM_TXOP0_CFG, 1735 ic->ic_wme.wme_params[WME_AC_BK].wmep_txopLimit << 16 | 1736 ic->ic_wme.wme_params[WME_AC_BE].wmep_txopLimit); 1737 run_write(sc, RT2860_WMM_TXOP1_CFG, 1738 ic->ic_wme.wme_params[WME_AC_VO].wmep_txopLimit << 16 | 1739 ic->ic_wme.wme_params[WME_AC_VI].wmep_txopLimit); 1740 splx(s); 1741 } 1742 1743 #ifdef RUN_HWCRYPTO 1744 static int 1745 run_set_key(struct ieee80211com *ic, const struct ieee80211_key *k, 1746 const uint8_t *mac) 1747 { 1748 struct run_softc *sc = ic->ic_ifp->if_softc; 1749 struct ieee80211_node *ni = ic->ic_bss; 1750 struct run_cmd_key cmd; 1751 1752 /* do it in a process context */ 1753 cmd.key = *k; 1754 cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1755 run_do_async(sc, run_set_key_cb, &cmd, sizeof(cmd)); 1756 return 1; 1757 } 1758 1759 static void 1760 run_set_key_cb(struct run_softc *sc, void *arg) 1761 { 1762 #ifndef IEEE80211_STA_ONLY 1763 struct ieee80211com *ic = &sc->sc_ic; 1764 #endif 1765 struct run_cmd_key *cmd = arg; 1766 struct ieee80211_key *k = &cmd->key; 1767 uint32_t attr; 1768 uint16_t base; 1769 uint8_t mode, wcid, iv[8]; 1770 1771 /* map net80211 cipher to RT2860 security mode */ 1772 switch (k->wk_cipher->ic_cipher) { 1773 case IEEE80211_CIPHER_WEP: 1774 k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1775 if (k->wk_keylen == 5) 1776 mode = RT2860_MODE_WEP40; 1777 else 1778 mode = RT2860_MODE_WEP104; 1779 break; 1780 case IEEE80211_CIPHER_TKIP: 1781 mode = RT2860_MODE_TKIP; 1782 break; 1783 case IEEE80211_CIPHER_AES_CCM: 1784 mode = RT2860_MODE_AES_CCMP; 1785 break; 1786 default: 1787 return; 1788 } 1789 1790 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1791 wcid = 0; /* NB: update WCID0 for group keys */ 1792 base = RT2860_SKEY(0, k->wk_keyix); 1793 } else { 1794 wcid = RUN_AID2WCID(cmd->associd); 1795 base = RT2860_PKEY(wcid); 1796 } 1797 1798 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1799 run_write_region_1(sc, base, k->wk_key, 16); 1800 #ifndef IEEE80211_STA_ONLY 1801 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1802 run_write_region_1(sc, base + 16, &k->wk_key[16], 8); 1803 run_write_region_1(sc, base + 24, &k->wk_key[24], 8); 1804 } else 1805 #endif 1806 { 1807 run_write_region_1(sc, base + 16, &k->wk_key[24], 8); 1808 run_write_region_1(sc, base + 24, &k->wk_key[16], 8); 1809 } 1810 } else { 1811 /* roundup len to 16-bit: XXX fix write_region_1() instead */ 1812 run_write_region_1(sc, base, k->wk_key, 1813 (k->wk_keylen + 1) & ~1); 1814 } 1815 1816 if (!(k->wk_flags & IEEE80211_KEY_GROUP) || 1817 (k->wk_flags & IEEE80211_KEY_XMIT)) { 1818 /* set initial packet number in IV+EIV */ 1819 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) { 1820 memset(iv, 0, sizeof(iv)); 1821 iv[3] = sc->sc_ic.ic_crypto.cs_def_txkey << 6; 1822 } else { 1823 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1824 iv[0] = k->wk_keytsc >> 8; 1825 iv[1] = (iv[0] | 0x20) & 0x7f; 1826 iv[2] = k->wk_keytsc; 1827 } else /* CCMP */ { 1828 iv[0] = k->wk_keytsc; 1829 iv[1] = k->wk_keytsc >> 8; 1830 iv[2] = 0; 1831 } 1832 iv[3] = k->wk_keyix << 6 | IEEE80211_WEP_EXTIV; 1833 iv[4] = k->wk_keytsc >> 16; 1834 iv[5] = k->wk_keytsc >> 24; 1835 iv[6] = k->wk_keytsc >> 32; 1836 iv[7] = k->wk_keytsc >> 40; 1837 } 1838 run_write_region_1(sc, RT2860_IVEIV(wcid), iv, 8); 1839 } 1840 1841 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1842 /* install group key */ 1843 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1844 attr &= ~(0xf << (k->wk_keyix * 4)); 1845 attr |= mode << (k->wk_keyix * 4); 1846 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1847 } else { 1848 /* install pairwise key */ 1849 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1850 attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN; 1851 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1852 } 1853 } 1854 1855 static int 1856 run_delete_key(struct ieee80211com *ic, const struct ieee80211_key *k) 1857 { 1858 struct run_softc *sc = ic->ic_ifp->if_softc; 1859 struct ieee80211_node *ni = ic->ic_bss; 1860 struct run_cmd_key cmd; 1861 1862 /* do it in a process context */ 1863 cmd.key = *k; 1864 cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1865 run_do_async(sc, run_delete_key_cb, &cmd, sizeof(cmd)); 1866 return 1; 1867 } 1868 1869 static void 1870 run_delete_key_cb(struct run_softc *sc, void *arg) 1871 { 1872 struct run_cmd_key *cmd = arg; 1873 struct ieee80211_key *k = &cmd->key; 1874 uint32_t attr; 1875 uint8_t wcid; 1876 1877 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) 1878 k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1879 1880 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1881 /* remove group key */ 1882 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1883 attr &= ~(0xf << (k->wk_keyix * 4)); 1884 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1885 1886 } else { 1887 /* remove pairwise key */ 1888 wcid = RUN_AID2WCID(cmd->associd); 1889 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1890 attr &= ~0xf; 1891 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1892 } 1893 } 1894 #endif 1895 1896 static void 1897 run_calibrate_to(void *arg) 1898 { 1899 1900 /* do it in a process context */ 1901 run_do_async(arg, run_calibrate_cb, NULL, 0); 1902 /* next timeout will be rescheduled in the calibration task */ 1903 } 1904 1905 /* ARGSUSED */ 1906 static void 1907 run_calibrate_cb(struct run_softc *sc, void *arg) 1908 { 1909 struct ifnet *ifp = &sc->sc_if; 1910 uint32_t sta[3]; 1911 int s, error; 1912 1913 /* read statistic counters (clear on read) and update AMRR state */ 1914 error = run_read_region_1(sc, RT2860_TX_STA_CNT0, (uint8_t *)sta, 1915 sizeof(sta)); 1916 if (error != 0) 1917 goto skip; 1918 1919 DPRINTF(("retrycnt=%d txcnt=%d failcnt=%d\n", 1920 le32toh(sta[1]) >> 16, le32toh(sta[1]) & 0xffff, 1921 le32toh(sta[0]) & 0xffff)); 1922 1923 s = splnet(); 1924 /* count failed TX as errors */ 1925 ifp->if_oerrors += le32toh(sta[0]) & 0xffff; 1926 1927 sc->amn.amn_retrycnt = 1928 (le32toh(sta[0]) & 0xffff) + /* failed TX count */ 1929 (le32toh(sta[1]) >> 16); /* TX retransmission count */ 1930 1931 sc->amn.amn_txcnt = 1932 sc->amn.amn_retrycnt + 1933 (le32toh(sta[1]) & 0xffff); /* successful TX count */ 1934 1935 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 1936 splx(s); 1937 1938 skip: callout_schedule(&sc->calib_to, hz); 1939 } 1940 1941 static void 1942 run_newassoc(struct ieee80211_node *ni, int isnew) 1943 { 1944 struct run_softc *sc = ni->ni_ic->ic_ifp->if_softc; 1945 struct run_node *rn = (void *)ni; 1946 struct ieee80211_rateset *rs = &ni->ni_rates; 1947 uint8_t rate; 1948 int ridx, i, j; 1949 1950 DPRINTF(("new assoc isnew=%d addr=%s\n", 1951 isnew, ether_sprintf(ni->ni_macaddr))); 1952 1953 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 1954 /* start at lowest available bit-rate, AMRR will raise */ 1955 ni->ni_txrate = 0; 1956 1957 for (i = 0; i < rs->rs_nrates; i++) { 1958 rate = rs->rs_rates[i] & IEEE80211_RATE_VAL; 1959 /* convert 802.11 rate to hardware rate index */ 1960 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 1961 if (rt2860_rates[ridx].rate == rate) 1962 break; 1963 rn->ridx[i] = ridx; 1964 /* determine rate of control response frames */ 1965 for (j = i; j >= 0; j--) { 1966 if ((rs->rs_rates[j] & IEEE80211_RATE_BASIC) && 1967 rt2860_rates[rn->ridx[i]].phy == 1968 rt2860_rates[rn->ridx[j]].phy) 1969 break; 1970 } 1971 if (j >= 0) { 1972 rn->ctl_ridx[i] = rn->ridx[j]; 1973 } else { 1974 /* no basic rate found, use mandatory one */ 1975 rn->ctl_ridx[i] = rt2860_rates[ridx].ctl_ridx; 1976 } 1977 DPRINTF(("rate=0x%02x ridx=%d ctl_ridx=%d\n", 1978 rs->rs_rates[i], rn->ridx[i], rn->ctl_ridx[i])); 1979 } 1980 } 1981 1982 /* 1983 * Return the Rx chain with the highest RSSI for a given frame. 1984 */ 1985 static __inline uint8_t 1986 run_maxrssi_chain(struct run_softc *sc, const struct rt2860_rxwi *rxwi) 1987 { 1988 uint8_t rxchain = 0; 1989 1990 if (sc->nrxchains > 1) { 1991 if (rxwi->rssi[1] > rxwi->rssi[rxchain]) 1992 rxchain = 1; 1993 if (sc->nrxchains > 2) 1994 if (rxwi->rssi[2] > rxwi->rssi[rxchain]) 1995 rxchain = 2; 1996 } 1997 return rxchain; 1998 } 1999 2000 static void 2001 run_rx_frame(struct run_softc *sc, uint8_t *buf, int dmalen) 2002 { 2003 struct ieee80211com *ic = &sc->sc_ic; 2004 struct ifnet *ifp = &sc->sc_if; 2005 struct ieee80211_frame *wh; 2006 struct ieee80211_node *ni; 2007 struct rt2870_rxd *rxd; 2008 struct rt2860_rxwi *rxwi; 2009 struct mbuf *m; 2010 uint32_t flags; 2011 uint16_t len, phy; 2012 uint8_t ant, rssi; 2013 int s; 2014 #ifdef RUN_HWCRYPTO 2015 int decrypted = 0; 2016 #endif 2017 2018 rxwi = (struct rt2860_rxwi *)buf; 2019 len = le16toh(rxwi->len) & 0xfff; 2020 if (__predict_false(len > dmalen)) { 2021 DPRINTF(("bad RXWI length %u > %u\n", len, dmalen)); 2022 return; 2023 } 2024 /* Rx descriptor is located at the end */ 2025 rxd = (struct rt2870_rxd *)(buf + dmalen); 2026 flags = le32toh(rxd->flags); 2027 2028 if (__predict_false(flags & (RT2860_RX_CRCERR | RT2860_RX_ICVERR))) { 2029 ifp->if_ierrors++; 2030 return; 2031 } 2032 2033 wh = (struct ieee80211_frame *)(rxwi + 1); 2034 #ifdef RUN_HWCRYPTO 2035 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2036 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2037 decrypted = 1; 2038 } 2039 #endif 2040 2041 if (__predict_false((flags & RT2860_RX_MICERR))) { 2042 /* report MIC failures to net80211 for TKIP */ 2043 ieee80211_notify_michael_failure(ic, wh, 0/* XXX */); 2044 ifp->if_ierrors++; 2045 return; 2046 } 2047 2048 if (flags & RT2860_RX_L2PAD) { 2049 u_int hdrlen = ieee80211_hdrspace(ic, wh); 2050 ovbcopy(wh, (uint8_t *)wh + 2, hdrlen); 2051 wh = (struct ieee80211_frame *)((uint8_t *)wh + 2); 2052 } 2053 2054 /* could use m_devget but net80211 wants contig mgmt frames */ 2055 MGETHDR(m, M_DONTWAIT, MT_DATA); 2056 if (__predict_false(m == NULL)) { 2057 ifp->if_ierrors++; 2058 return; 2059 } 2060 if (len > MHLEN) { 2061 MCLGET(m, M_DONTWAIT); 2062 if (__predict_false(!(m->m_flags & M_EXT))) { 2063 ifp->if_ierrors++; 2064 m_freem(m); 2065 return; 2066 } 2067 } 2068 /* finalize mbuf */ 2069 m->m_pkthdr.rcvif = ifp; 2070 memcpy(mtod(m, void *), wh, len); 2071 m->m_pkthdr.len = m->m_len = len; 2072 2073 ant = run_maxrssi_chain(sc, rxwi); 2074 rssi = rxwi->rssi[ant]; 2075 2076 if (__predict_false(sc->sc_drvbpf != NULL)) { 2077 struct run_rx_radiotap_header *tap = &sc->sc_rxtap; 2078 2079 tap->wr_flags = 0; 2080 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 2081 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2082 tap->wr_antsignal = rssi; 2083 tap->wr_antenna = ant; 2084 tap->wr_dbm_antsignal = run_rssi2dbm(sc, rssi, ant); 2085 tap->wr_rate = 2; /* in case it can't be found below */ 2086 phy = le16toh(rxwi->phy); 2087 switch (phy & RT2860_PHY_MODE) { 2088 case RT2860_PHY_CCK: 2089 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) { 2090 case 0: tap->wr_rate = 2; break; 2091 case 1: tap->wr_rate = 4; break; 2092 case 2: tap->wr_rate = 11; break; 2093 case 3: tap->wr_rate = 22; break; 2094 } 2095 if (phy & RT2860_PHY_SHPRE) 2096 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2097 break; 2098 case RT2860_PHY_OFDM: 2099 switch (phy & RT2860_PHY_MCS) { 2100 case 0: tap->wr_rate = 12; break; 2101 case 1: tap->wr_rate = 18; break; 2102 case 2: tap->wr_rate = 24; break; 2103 case 3: tap->wr_rate = 36; break; 2104 case 4: tap->wr_rate = 48; break; 2105 case 5: tap->wr_rate = 72; break; 2106 case 6: tap->wr_rate = 96; break; 2107 case 7: tap->wr_rate = 108; break; 2108 } 2109 break; 2110 } 2111 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 2112 } 2113 2114 s = splnet(); 2115 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2116 #ifdef RUN_HWCRYPTO 2117 if (decrypted) { 2118 uint32_t icflags = ic->ic_flags; 2119 2120 ic->ic_flags &= ~IEEE80211_F_DROPUNENC; /* XXX */ 2121 ieee80211_input(ic, m, ni, rssi, 0); 2122 ic->ic_flags = icflags; 2123 } else 2124 #endif 2125 ieee80211_input(ic, m, ni, rssi, 0); 2126 2127 /* node is no longer needed */ 2128 ieee80211_free_node(ni); 2129 2130 /* 2131 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 2132 * without calling if_start(). 2133 */ 2134 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 2135 run_start(ifp); 2136 2137 splx(s); 2138 } 2139 2140 static void 2141 run_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 2142 { 2143 struct run_rx_data *data = priv; 2144 struct run_softc *sc = data->sc; 2145 uint8_t *buf; 2146 uint32_t dmalen; 2147 int xferlen; 2148 2149 if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2150 DPRINTF(("RX status=%d\n", status)); 2151 if (status == USBD_STALLED) 2152 usbd_clear_endpoint_stall_async(sc->rxq.pipeh); 2153 if (status != USBD_CANCELLED) 2154 goto skip; 2155 return; 2156 } 2157 usbd_get_xfer_status(xfer, NULL, NULL, &xferlen, NULL); 2158 2159 if (__predict_false(xferlen < (int)(sizeof(uint32_t) + 2160 sizeof(struct rt2860_rxwi) + sizeof(struct rt2870_rxd)))) { 2161 DPRINTF(("xfer too short %d\n", xferlen)); 2162 goto skip; 2163 } 2164 2165 /* HW can aggregate multiple 802.11 frames in a single USB xfer */ 2166 buf = data->buf; 2167 while (xferlen > 8) { 2168 dmalen = le32toh(*(uint32_t *)buf) & 0xffff; 2169 2170 if (__predict_false(dmalen == 0 || (dmalen & 3) != 0)) { 2171 DPRINTF(("bad DMA length %u (%x)\n", dmalen, dmalen)); 2172 break; 2173 } 2174 if (__predict_false(dmalen + 8 > (uint32_t)xferlen)) { 2175 DPRINTF(("bad DMA length %u > %d\n", 2176 dmalen + 8, xferlen)); 2177 break; 2178 } 2179 run_rx_frame(sc, buf + sizeof(uint32_t), dmalen); 2180 buf += dmalen + 8; 2181 xferlen -= dmalen + 8; 2182 } 2183 2184 skip: /* setup a new transfer */ 2185 usbd_setup_xfer(xfer, data, data->buf, RUN_MAX_RXSZ, 2186 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, run_rxeof); 2187 (void)usbd_transfer(data->xfer); 2188 } 2189 2190 static void 2191 run_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 2192 { 2193 struct run_tx_data *data = priv; 2194 struct run_softc *sc = data->sc; 2195 struct run_tx_ring *txq = &sc->txq[data->qid]; 2196 struct ifnet *ifp = &sc->sc_if; 2197 int s; 2198 2199 if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2200 DPRINTF(("TX status=%d\n", status)); 2201 if (status == USBD_STALLED) 2202 usbd_clear_endpoint_stall_async(txq->pipeh); 2203 ifp->if_oerrors++; 2204 return; 2205 } 2206 2207 s = splnet(); 2208 sc->sc_tx_timer = 0; 2209 ifp->if_opackets++; 2210 if (--txq->queued < RUN_TX_RING_COUNT) { 2211 sc->qfullmsk &= ~(1 << data->qid); 2212 ifp->if_flags &= ~IFF_OACTIVE; 2213 run_start(ifp); 2214 } 2215 splx(s); 2216 } 2217 2218 static int 2219 run_tx(struct run_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 2220 { 2221 struct ieee80211com *ic = &sc->sc_ic; 2222 struct run_node *rn = (void *)ni; 2223 struct ieee80211_frame *wh; 2224 #ifndef RUN_HWCRYPTO 2225 struct ieee80211_key *k; 2226 #endif 2227 struct run_tx_ring *ring; 2228 struct run_tx_data *data; 2229 struct rt2870_txd *txd; 2230 struct rt2860_txwi *txwi; 2231 uint16_t dur; 2232 uint8_t type, mcs, tid, qid, qos = 0; 2233 int error, hasqos, ridx, ctl_ridx, xferlen; 2234 2235 wh = mtod(m, struct ieee80211_frame *); 2236 2237 #ifndef RUN_HWCRYPTO 2238 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2239 k = ieee80211_crypto_encap(ic, ni, m); 2240 if (k == NULL) { 2241 m_freem(m); 2242 return ENOBUFS; 2243 } 2244 2245 /* packet header may have moved, reset our local pointer */ 2246 wh = mtod(m, struct ieee80211_frame *); 2247 } 2248 #endif 2249 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2250 2251 if ((hasqos = ieee80211_has_qos(wh))) { 2252 qos = ((struct ieee80211_qosframe *)wh)->i_qos[0]; 2253 tid = qos & IEEE80211_QOS_TID; 2254 qid = TID_TO_WME_AC(tid); 2255 } else { 2256 tid = 0; 2257 qid = WME_AC_BE; 2258 } 2259 ring = &sc->txq[qid]; 2260 data = &ring->data[ring->cur]; 2261 2262 /* pickup a rate index */ 2263 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 2264 type != IEEE80211_FC0_TYPE_DATA) { 2265 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 2266 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 2267 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2268 } else if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 2269 ridx = sc->fixed_ridx; 2270 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2271 } else { 2272 ridx = rn->ridx[ni->ni_txrate]; 2273 ctl_ridx = rn->ctl_ridx[ni->ni_txrate]; 2274 } 2275 2276 /* get MCS code from rate index */ 2277 mcs = rt2860_rates[ridx].mcs; 2278 2279 xferlen = sizeof(*txwi) + m->m_pkthdr.len; 2280 /* roundup to 32-bit alignment */ 2281 xferlen = (xferlen + 3) & ~3; 2282 2283 txd = (struct rt2870_txd *)data->buf; 2284 txd->flags = RT2860_TX_QSEL_EDCA; 2285 txd->len = htole16(xferlen); 2286 2287 /* setup TX Wireless Information */ 2288 txwi = (struct rt2860_txwi *)(txd + 1); 2289 txwi->flags = 0; 2290 txwi->xflags = hasqos ? 0 : RT2860_TX_NSEQ; 2291 txwi->wcid = (type == IEEE80211_FC0_TYPE_DATA) ? 2292 RUN_AID2WCID(ni->ni_associd) : 0xff; 2293 txwi->len = htole16(m->m_pkthdr.len); 2294 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) { 2295 txwi->phy = htole16(RT2860_PHY_CCK); 2296 if (ridx != RT2860_RIDX_CCK1 && 2297 (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 2298 mcs |= RT2860_PHY_SHPRE; 2299 } else 2300 txwi->phy = htole16(RT2860_PHY_OFDM); 2301 txwi->phy |= htole16(mcs); 2302 2303 txwi->txop = RT2860_TX_TXOP_BACKOFF; 2304 2305 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 2306 (!hasqos || (qos & IEEE80211_QOS_ACKPOLICY) != 2307 IEEE80211_QOS_ACKPOLICY_NOACK)) { 2308 txwi->xflags |= RT2860_TX_ACK; 2309 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 2310 dur = rt2860_rates[ctl_ridx].sp_ack_dur; 2311 else 2312 dur = rt2860_rates[ctl_ridx].lp_ack_dur; 2313 *(uint16_t *)wh->i_dur = htole16(dur); 2314 } 2315 2316 #ifndef IEEE80211_STA_ONLY 2317 /* ask MAC to insert timestamp into probe responses */ 2318 if ((wh->i_fc[0] & 2319 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 2320 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 2321 /* NOTE: beacons do not pass through tx_data() */ 2322 txwi->flags |= RT2860_TX_TS; 2323 #endif 2324 2325 if (__predict_false(sc->sc_drvbpf != NULL)) { 2326 struct run_tx_radiotap_header *tap = &sc->sc_txtap; 2327 2328 tap->wt_flags = 0; 2329 tap->wt_rate = rt2860_rates[ridx].rate; 2330 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2331 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2332 tap->wt_hwqueue = qid; 2333 if (mcs & RT2860_PHY_SHPRE) 2334 tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2335 2336 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 2337 } 2338 2339 m_copydata(m, 0, m->m_pkthdr.len, (void *)(txwi + 1)); 2340 m_freem(m); 2341 2342 xferlen += sizeof(*txd) + 4; 2343 2344 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 2345 USBD_FORCE_SHORT_XFER, RUN_TX_TIMEOUT, run_txeof); 2346 error = usbd_transfer(data->xfer); 2347 if (__predict_false(error != USBD_IN_PROGRESS && 2348 error != USBD_NORMAL_COMPLETION)) 2349 return error; 2350 2351 ieee80211_free_node(ni); 2352 2353 ring->cur = (ring->cur + 1) % RUN_TX_RING_COUNT; 2354 if (++ring->queued >= RUN_TX_RING_COUNT) 2355 sc->qfullmsk |= 1 << qid; 2356 2357 return 0; 2358 } 2359 2360 static void 2361 run_start(struct ifnet *ifp) 2362 { 2363 struct run_softc *sc = ifp->if_softc; 2364 struct ieee80211com *ic = &sc->sc_ic; 2365 struct ether_header *eh; 2366 struct ieee80211_node *ni; 2367 struct mbuf *m; 2368 2369 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2370 return; 2371 2372 for (;;) { 2373 if (sc->qfullmsk != 0) { 2374 ifp->if_flags |= IFF_OACTIVE; 2375 break; 2376 } 2377 /* send pending management frames first */ 2378 IF_DEQUEUE(&ic->ic_mgtq, m); 2379 if (m != NULL) { 2380 ni = (void *)m->m_pkthdr.rcvif; 2381 m->m_pkthdr.rcvif = NULL; 2382 goto sendit; 2383 } 2384 if (ic->ic_state != IEEE80211_S_RUN) 2385 break; 2386 2387 /* encapsulate and send data frames */ 2388 IFQ_DEQUEUE(&ifp->if_snd, m); 2389 if (m == NULL) 2390 break; 2391 if (m->m_len < (int)sizeof(*eh) && 2392 (m = m_pullup(m, sizeof(*eh))) == NULL) { 2393 ifp->if_oerrors++; 2394 continue; 2395 } 2396 2397 eh = mtod(m, struct ether_header *); 2398 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2399 if (ni == NULL) { 2400 m_freem(m); 2401 ifp->if_oerrors++; 2402 continue; 2403 } 2404 2405 bpf_mtap(ifp, m); 2406 2407 if ((m = ieee80211_encap(ic, m, ni)) == NULL) { 2408 ieee80211_free_node(ni); 2409 ifp->if_oerrors++; 2410 continue; 2411 } 2412 sendit: 2413 bpf_mtap3(ic->ic_rawbpf, m); 2414 2415 if (run_tx(sc, m, ni) != 0) { 2416 ieee80211_free_node(ni); 2417 ifp->if_oerrors++; 2418 continue; 2419 } 2420 2421 sc->sc_tx_timer = 5; 2422 ifp->if_timer = 1; 2423 } 2424 } 2425 2426 static void 2427 run_watchdog(struct ifnet *ifp) 2428 { 2429 struct run_softc *sc = ifp->if_softc; 2430 struct ieee80211com *ic = &sc->sc_ic; 2431 2432 ifp->if_timer = 0; 2433 2434 if (sc->sc_tx_timer > 0) { 2435 if (--sc->sc_tx_timer == 0) { 2436 aprint_error_dev(sc->sc_dev, "device timeout\n"); 2437 /* run_init(ifp); XXX needs a process context! */ 2438 ifp->if_oerrors++; 2439 return; 2440 } 2441 ifp->if_timer = 1; 2442 } 2443 2444 ieee80211_watchdog(ic); 2445 } 2446 2447 static int 2448 run_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2449 { 2450 struct run_softc *sc = ifp->if_softc; 2451 struct ieee80211com *ic = &sc->sc_ic; 2452 int s, error = 0; 2453 2454 s = splnet(); 2455 2456 switch (cmd) { 2457 case SIOCSIFFLAGS: 2458 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2459 break; 2460 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 2461 case IFF_UP|IFF_RUNNING: 2462 break; 2463 case IFF_UP: 2464 run_init(ifp); 2465 break; 2466 case IFF_RUNNING: 2467 run_stop(ifp, 1); 2468 break; 2469 case 0: 2470 break; 2471 } 2472 break; 2473 2474 case SIOCADDMULTI: 2475 case SIOCDELMULTI: 2476 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 2477 /* setup multicast filter, etc */ 2478 error = 0; 2479 } 2480 break; 2481 2482 default: 2483 error = ieee80211_ioctl(ic, cmd, data); 2484 break; 2485 } 2486 2487 if (error == ENETRESET) { 2488 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2489 (IFF_UP | IFF_RUNNING)) { 2490 run_init(ifp); 2491 } 2492 error = 0; 2493 } 2494 2495 splx(s); 2496 2497 return error; 2498 } 2499 2500 static void 2501 run_select_chan_group(struct run_softc *sc, int group) 2502 { 2503 uint32_t tmp; 2504 uint8_t agc; 2505 2506 run_bbp_write(sc, 62, 0x37 - sc->lna[group]); 2507 run_bbp_write(sc, 63, 0x37 - sc->lna[group]); 2508 run_bbp_write(sc, 64, 0x37 - sc->lna[group]); 2509 run_bbp_write(sc, 86, 0x00); 2510 2511 if (group == 0) { 2512 if (sc->ext_2ghz_lna) { 2513 run_bbp_write(sc, 82, 0x62); 2514 run_bbp_write(sc, 75, 0x46); 2515 } else { 2516 run_bbp_write(sc, 82, 0x84); 2517 run_bbp_write(sc, 75, 0x50); 2518 } 2519 } else { 2520 if (sc->mac_ver == 0x3572) 2521 run_bbp_write(sc, 82, 0x94); 2522 else 2523 run_bbp_write(sc, 82, 0xf2); 2524 if (sc->ext_5ghz_lna) 2525 run_bbp_write(sc, 75, 0x46); 2526 else 2527 run_bbp_write(sc, 75, 0x50); 2528 } 2529 2530 run_read(sc, RT2860_TX_BAND_CFG, &tmp); 2531 tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P); 2532 tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P; 2533 run_write(sc, RT2860_TX_BAND_CFG, tmp); 2534 2535 /* enable appropriate Power Amplifiers and Low Noise Amplifiers */ 2536 tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN; 2537 if (sc->nrxchains > 1) 2538 tmp |= RT2860_LNA_PE1_EN; 2539 if (group == 0) { /* 2GHz */ 2540 tmp |= RT2860_PA_PE_G0_EN; 2541 if (sc->ntxchains > 1) 2542 tmp |= RT2860_PA_PE_G1_EN; 2543 } else { /* 5GHz */ 2544 tmp |= RT2860_PA_PE_A0_EN; 2545 if (sc->ntxchains > 1) 2546 tmp |= RT2860_PA_PE_A1_EN; 2547 } 2548 if (sc->mac_ver == 0x3572) { 2549 run_rt3070_rf_write(sc, 8, 0x00); 2550 run_write(sc, RT2860_TX_PIN_CFG, tmp); 2551 run_rt3070_rf_write(sc, 8, 0x80); 2552 } else 2553 run_write(sc, RT2860_TX_PIN_CFG, tmp); 2554 2555 /* set initial AGC value */ 2556 if (group == 0) { /* 2GHz band */ 2557 if (sc->mac_ver >= 0x3070) 2558 agc = 0x1c + sc->lna[0] * 2; 2559 else 2560 agc = 0x2e + sc->lna[0]; 2561 } else { /* 5GHz band */ 2562 if (sc->mac_ver == 0x3572) 2563 agc = 0x22 + (sc->lna[group] * 5) / 3; 2564 else 2565 agc = 0x32 + (sc->lna[group] * 5) / 3; 2566 } 2567 run_set_agc(sc, agc); 2568 } 2569 2570 static void 2571 run_rt2870_set_chan(struct run_softc *sc, u_int chan) 2572 { 2573 const struct rfprog *rfprog = rt2860_rf2850; 2574 uint32_t r2, r3, r4; 2575 int8_t txpow1, txpow2; 2576 int i; 2577 2578 /* find the settings for this channel (we know it exists) */ 2579 for (i = 0; rfprog[i].chan != chan; i++); 2580 2581 r2 = rfprog[i].r2; 2582 if (sc->ntxchains == 1) 2583 r2 |= 1 << 12; /* 1T: disable Tx chain 2 */ 2584 if (sc->nrxchains == 1) 2585 r2 |= 1 << 15 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2586 else if (sc->nrxchains == 2) 2587 r2 |= 1 << 4; /* 2R: disable Rx chain 3 */ 2588 2589 /* use Tx power values from EEPROM */ 2590 txpow1 = sc->txpow1[i]; 2591 txpow2 = sc->txpow2[i]; 2592 if (chan > 14) { 2593 if (txpow1 >= 0) 2594 txpow1 = txpow1 << 1 | 1; 2595 else 2596 txpow1 = (7 + txpow1) << 1; 2597 if (txpow2 >= 0) 2598 txpow2 = txpow2 << 1 | 1; 2599 else 2600 txpow2 = (7 + txpow2) << 1; 2601 } 2602 r3 = rfprog[i].r3 | txpow1 << 7; 2603 r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4; 2604 2605 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2606 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2607 run_rt2870_rf_write(sc, RT2860_RF3, r3); 2608 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2609 2610 DELAY(200); 2611 2612 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2613 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2614 run_rt2870_rf_write(sc, RT2860_RF3, r3 | 1); 2615 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2616 2617 DELAY(200); 2618 2619 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2620 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2621 run_rt2870_rf_write(sc, RT2860_RF3, r3); 2622 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2623 } 2624 2625 static void 2626 run_rt3070_set_chan(struct run_softc *sc, u_int chan) 2627 { 2628 int8_t txpow1, txpow2; 2629 uint8_t rf; 2630 int i; 2631 2632 KASSERT(chan >= 1 && chan <= 14); /* RT3070 is 2GHz only */ 2633 2634 /* find the settings for this channel (we know it exists) */ 2635 for (i = 0; rt2860_rf2850[i].chan != chan; i++) 2636 continue; 2637 2638 /* use Tx power values from EEPROM */ 2639 txpow1 = sc->txpow1[i]; 2640 txpow2 = sc->txpow2[i]; 2641 2642 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2643 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2644 run_rt3070_rf_read(sc, 6, &rf); 2645 rf = (rf & ~0x03) | rt3070_freqs[i].r; 2646 run_rt3070_rf_write(sc, 6, rf); 2647 2648 /* set Tx0 power */ 2649 run_rt3070_rf_read(sc, 12, &rf); 2650 rf = (rf & ~0x1f) | txpow1; 2651 run_rt3070_rf_write(sc, 12, rf); 2652 2653 /* set Tx1 power */ 2654 run_rt3070_rf_read(sc, 13, &rf); 2655 rf = (rf & ~0x1f) | txpow2; 2656 run_rt3070_rf_write(sc, 13, rf); 2657 2658 run_rt3070_rf_read(sc, 1, &rf); 2659 rf &= ~0xfc; 2660 if (sc->ntxchains == 1) 2661 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2662 else if (sc->ntxchains == 2) 2663 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2664 if (sc->nrxchains == 1) 2665 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2666 else if (sc->nrxchains == 2) 2667 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2668 run_rt3070_rf_write(sc, 1, rf); 2669 2670 /* set RF offset */ 2671 run_rt3070_rf_read(sc, 23, &rf); 2672 rf = (rf & ~0x7f) | sc->freq; 2673 run_rt3070_rf_write(sc, 23, rf); 2674 2675 /* program RF filter */ 2676 run_rt3070_rf_read(sc, 24, &rf); /* Tx */ 2677 rf = (rf & ~0x3f) | sc->rf24_20mhz; 2678 run_rt3070_rf_write(sc, 24, rf); 2679 run_rt3070_rf_read(sc, 31, &rf); /* Rx */ 2680 rf = (rf & ~0x3f) | sc->rf24_20mhz; 2681 run_rt3070_rf_write(sc, 31, rf); 2682 2683 /* enable RF tuning */ 2684 run_rt3070_rf_read(sc, 7, &rf); 2685 run_rt3070_rf_write(sc, 7, rf | 0x01); 2686 } 2687 2688 static void 2689 run_rt3572_set_chan(struct run_softc *sc, u_int chan) 2690 { 2691 int8_t txpow1, txpow2; 2692 uint32_t tmp; 2693 uint8_t rf; 2694 int i; 2695 2696 /* find the settings for this channel (we know it exists) */ 2697 for (i = 0; rt2860_rf2850[i].chan != chan; i++); 2698 2699 /* use Tx power values from EEPROM */ 2700 txpow1 = sc->txpow1[i]; 2701 txpow2 = sc->txpow2[i]; 2702 2703 if (chan <= 14) { 2704 run_bbp_write(sc, 25, sc->bbp25); 2705 run_bbp_write(sc, 26, sc->bbp26); 2706 } else { 2707 /* enable IQ phase correction */ 2708 run_bbp_write(sc, 25, 0x09); 2709 run_bbp_write(sc, 26, 0xff); 2710 } 2711 2712 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2713 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2714 run_rt3070_rf_read(sc, 6, &rf); 2715 rf = (rf & ~0x0f) | rt3070_freqs[i].r; 2716 rf |= (chan <= 14) ? 0x08 : 0x04; 2717 run_rt3070_rf_write(sc, 6, rf); 2718 2719 /* set PLL mode */ 2720 run_rt3070_rf_read(sc, 5, &rf); 2721 rf &= ~(0x08 | 0x04); 2722 rf |= (chan <= 14) ? 0x04 : 0x08; 2723 run_rt3070_rf_write(sc, 5, rf); 2724 2725 /* set Tx power for chain 0 */ 2726 if (chan <= 14) 2727 rf = 0x60 | txpow1; 2728 else 2729 rf = 0xe0 | (txpow1 & 0xc) << 1 | (txpow1 & 0x3); 2730 run_rt3070_rf_write(sc, 12, rf); 2731 2732 /* set Tx power for chain 1 */ 2733 if (chan <= 14) 2734 rf = 0x60 | txpow2; 2735 else 2736 rf = 0xe0 | (txpow2 & 0xc) << 1 | (txpow2 & 0x3); 2737 run_rt3070_rf_write(sc, 13, rf); 2738 2739 /* set Tx/Rx streams */ 2740 run_rt3070_rf_read(sc, 1, &rf); 2741 rf &= ~0xfc; 2742 if (sc->ntxchains == 1) 2743 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2744 else if (sc->ntxchains == 2) 2745 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2746 if (sc->nrxchains == 1) 2747 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2748 else if (sc->nrxchains == 2) 2749 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2750 run_rt3070_rf_write(sc, 1, rf); 2751 2752 /* set RF offset */ 2753 run_rt3070_rf_read(sc, 23, &rf); 2754 rf = (rf & ~0x7f) | sc->freq; 2755 run_rt3070_rf_write(sc, 23, rf); 2756 2757 /* program RF filter */ 2758 rf = sc->rf24_20mhz; 2759 run_rt3070_rf_write(sc, 24, rf); /* Tx */ 2760 run_rt3070_rf_write(sc, 31, rf); /* Rx */ 2761 2762 /* enable RF tuning */ 2763 run_rt3070_rf_read(sc, 7, &rf); 2764 rf = (chan <= 14) ? 0xd8 : ((rf & ~0xc8) | 0x14); 2765 run_rt3070_rf_write(sc, 7, rf); 2766 2767 /* TSSI */ 2768 rf = (chan <= 14) ? 0xc3 : 0xc0; 2769 run_rt3070_rf_write(sc, 9, rf); 2770 2771 /* set loop filter 1 */ 2772 run_rt3070_rf_write(sc, 10, 0xf1); 2773 /* set loop filter 2 */ 2774 run_rt3070_rf_write(sc, 11, (chan <= 14) ? 0xb9 : 0x00); 2775 2776 /* set tx_mx2_ic */ 2777 run_rt3070_rf_write(sc, 15, (chan <= 14) ? 0x53 : 0x43); 2778 /* set tx_mx1_ic */ 2779 if (chan <= 14) 2780 rf = 0x48 | sc->txmixgain_2ghz; 2781 else 2782 rf = 0x78 | sc->txmixgain_5ghz; 2783 run_rt3070_rf_write(sc, 16, rf); 2784 2785 /* set tx_lo1 */ 2786 run_rt3070_rf_write(sc, 17, 0x23); 2787 /* set tx_lo2 */ 2788 if (chan <= 14) 2789 rf = 0x93; 2790 else if (chan <= 64) 2791 rf = 0xb7; 2792 else if (chan <= 128) 2793 rf = 0x74; 2794 else 2795 rf = 0x72; 2796 run_rt3070_rf_write(sc, 19, rf); 2797 2798 /* set rx_lo1 */ 2799 if (chan <= 14) 2800 rf = 0xb3; 2801 else if (chan <= 64) 2802 rf = 0xf6; 2803 else if (chan <= 128) 2804 rf = 0xf4; 2805 else 2806 rf = 0xf3; 2807 run_rt3070_rf_write(sc, 20, rf); 2808 2809 /* set pfd_delay */ 2810 if (chan <= 14) 2811 rf = 0x15; 2812 else if (chan <= 64) 2813 rf = 0x3d; 2814 else 2815 rf = 0x01; 2816 run_rt3070_rf_write(sc, 25, rf); 2817 2818 /* set rx_lo2 */ 2819 run_rt3070_rf_write(sc, 26, (chan <= 14) ? 0x85 : 0x87); 2820 /* set ldo_rf_vc */ 2821 run_rt3070_rf_write(sc, 27, (chan <= 14) ? 0x00 : 0x01); 2822 /* set drv_cc */ 2823 run_rt3070_rf_write(sc, 29, (chan <= 14) ? 0x9b : 0x9f); 2824 2825 run_read(sc, RT2860_GPIO_CTRL, &tmp); 2826 tmp &= ~0x8080; 2827 if (chan <= 14) 2828 tmp |= 0x80; 2829 run_write(sc, RT2860_GPIO_CTRL, tmp); 2830 2831 /* enable RF tuning */ 2832 run_rt3070_rf_read(sc, 7, &rf); 2833 run_rt3070_rf_write(sc, 7, rf | 0x01); 2834 2835 DELAY(2000); 2836 } 2837 2838 static void 2839 run_set_agc(struct run_softc *sc, uint8_t agc) 2840 { 2841 uint8_t bbp; 2842 2843 if (sc->mac_ver == 0x3572) { 2844 run_bbp_read(sc, 27, &bbp); 2845 bbp &= ~(0x3 << 5); 2846 run_bbp_write(sc, 27, bbp | 0 << 5); /* select Rx0 */ 2847 run_bbp_write(sc, 66, agc); 2848 run_bbp_write(sc, 27, bbp | 1 << 5); /* select Rx1 */ 2849 run_bbp_write(sc, 66, agc); 2850 } else 2851 run_bbp_write(sc, 66, agc); 2852 } 2853 2854 static void 2855 run_set_rx_antenna(struct run_softc *sc, int aux) 2856 { 2857 uint32_t tmp; 2858 2859 run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, !aux); 2860 run_read(sc, RT2860_GPIO_CTRL, &tmp); 2861 tmp &= ~0x0808; 2862 if (aux) 2863 tmp |= 0x08; 2864 run_write(sc, RT2860_GPIO_CTRL, tmp); 2865 } 2866 2867 static int 2868 run_set_chan(struct run_softc *sc, struct ieee80211_channel *c) 2869 { 2870 struct ieee80211com *ic = &sc->sc_ic; 2871 u_int chan, group; 2872 2873 chan = ieee80211_chan2ieee(ic, c); 2874 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2875 return EINVAL; 2876 2877 if (sc->mac_ver == 0x3572) 2878 run_rt3572_set_chan(sc, chan); 2879 else if (sc->mac_ver >= 0x3070) 2880 run_rt3070_set_chan(sc, chan); 2881 else 2882 run_rt2870_set_chan(sc, chan); 2883 2884 /* determine channel group */ 2885 if (chan <= 14) 2886 group = 0; 2887 else if (chan <= 64) 2888 group = 1; 2889 else if (chan <= 128) 2890 group = 2; 2891 else 2892 group = 3; 2893 2894 /* XXX necessary only when group has changed! */ 2895 run_select_chan_group(sc, group); 2896 2897 DELAY(1000); 2898 return 0; 2899 } 2900 2901 static void 2902 run_enable_tsf_sync(struct run_softc *sc) 2903 { 2904 struct ieee80211com *ic = &sc->sc_ic; 2905 uint32_t tmp; 2906 2907 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 2908 tmp &= ~0x1fffff; 2909 tmp |= ic->ic_bss->ni_intval * 16; 2910 tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN; 2911 if (ic->ic_opmode == IEEE80211_M_STA) { 2912 /* 2913 * Local TSF is always updated with remote TSF on beacon 2914 * reception. 2915 */ 2916 tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT; 2917 } 2918 #ifndef IEEE80211_STA_ONLY 2919 else if (ic->ic_opmode == IEEE80211_M_IBSS) { 2920 tmp |= RT2860_BCN_TX_EN; 2921 /* 2922 * Local TSF is updated with remote TSF on beacon reception 2923 * only if the remote TSF is greater than local TSF. 2924 */ 2925 tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT; 2926 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2927 tmp |= RT2860_BCN_TX_EN; 2928 /* SYNC with nobody */ 2929 tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT; 2930 } 2931 #endif 2932 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 2933 } 2934 2935 static void 2936 run_enable_mrr(struct run_softc *sc) 2937 { 2938 #define CCK(mcs) (mcs) 2939 #define OFDM(mcs) (1 << 3 | (mcs)) 2940 run_write(sc, RT2860_LG_FBK_CFG0, 2941 OFDM(6) << 28 | /* 54->48 */ 2942 OFDM(5) << 24 | /* 48->36 */ 2943 OFDM(4) << 20 | /* 36->24 */ 2944 OFDM(3) << 16 | /* 24->18 */ 2945 OFDM(2) << 12 | /* 18->12 */ 2946 OFDM(1) << 8 | /* 12-> 9 */ 2947 OFDM(0) << 4 | /* 9-> 6 */ 2948 OFDM(0)); /* 6-> 6 */ 2949 2950 run_write(sc, RT2860_LG_FBK_CFG1, 2951 CCK(2) << 12 | /* 11->5.5 */ 2952 CCK(1) << 8 | /* 5.5-> 2 */ 2953 CCK(0) << 4 | /* 2-> 1 */ 2954 CCK(0)); /* 1-> 1 */ 2955 #undef OFDM 2956 #undef CCK 2957 } 2958 2959 static void 2960 run_set_txpreamble(struct run_softc *sc) 2961 { 2962 uint32_t tmp; 2963 2964 run_read(sc, RT2860_AUTO_RSP_CFG, &tmp); 2965 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 2966 tmp |= RT2860_CCK_SHORT_EN; 2967 else 2968 tmp &= ~RT2860_CCK_SHORT_EN; 2969 run_write(sc, RT2860_AUTO_RSP_CFG, tmp); 2970 } 2971 2972 static void 2973 run_set_basicrates(struct run_softc *sc) 2974 { 2975 struct ieee80211com *ic = &sc->sc_ic; 2976 2977 /* set basic rates mask */ 2978 if (ic->ic_curmode == IEEE80211_MODE_11B) 2979 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x003); 2980 else if (ic->ic_curmode == IEEE80211_MODE_11A) 2981 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x150); 2982 else /* 11g */ 2983 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x15f); 2984 } 2985 2986 static void 2987 run_set_leds(struct run_softc *sc, uint16_t which) 2988 { 2989 2990 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LEDS, 2991 which | (sc->leds & 0x7f)); 2992 } 2993 2994 static void 2995 run_set_bssid(struct run_softc *sc, const uint8_t *bssid) 2996 { 2997 2998 run_write(sc, RT2860_MAC_BSSID_DW0, 2999 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24); 3000 run_write(sc, RT2860_MAC_BSSID_DW1, 3001 bssid[4] | bssid[5] << 8); 3002 } 3003 3004 static void 3005 run_set_macaddr(struct run_softc *sc, const uint8_t *addr) 3006 { 3007 3008 run_write(sc, RT2860_MAC_ADDR_DW0, 3009 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24); 3010 run_write(sc, RT2860_MAC_ADDR_DW1, 3011 addr[4] | addr[5] << 8 | 0xff << 16); 3012 } 3013 3014 static void 3015 run_updateslot(struct ifnet *ifp) 3016 { 3017 3018 /* do it in a process context */ 3019 run_do_async(ifp->if_softc, run_updateslot_cb, NULL, 0); 3020 } 3021 3022 /* ARGSUSED */ 3023 static void 3024 run_updateslot_cb(struct run_softc *sc, void *arg) 3025 { 3026 uint32_t tmp; 3027 3028 run_read(sc, RT2860_BKOFF_SLOT_CFG, &tmp); 3029 tmp &= ~0xff; 3030 tmp |= (sc->sc_ic.ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 3031 run_write(sc, RT2860_BKOFF_SLOT_CFG, tmp); 3032 } 3033 3034 static int8_t 3035 run_rssi2dbm(struct run_softc *sc, uint8_t rssi, uint8_t rxchain) 3036 { 3037 struct ieee80211com *ic = &sc->sc_ic; 3038 struct ieee80211_channel *c = ic->ic_curchan; 3039 int delta; 3040 3041 if (IEEE80211_IS_CHAN_5GHZ(c)) { 3042 u_int chan = ieee80211_chan2ieee(ic, c); 3043 delta = sc->rssi_5ghz[rxchain]; 3044 3045 /* determine channel group */ 3046 if (chan <= 64) 3047 delta -= sc->lna[1]; 3048 else if (chan <= 128) 3049 delta -= sc->lna[2]; 3050 else 3051 delta -= sc->lna[3]; 3052 } else 3053 delta = sc->rssi_2ghz[rxchain] - sc->lna[0]; 3054 3055 return -12 - delta - rssi; 3056 } 3057 3058 static int 3059 run_bbp_init(struct run_softc *sc) 3060 { 3061 int i, error, ntries; 3062 uint8_t bbp0; 3063 3064 /* wait for BBP to wake up */ 3065 for (ntries = 0; ntries < 20; ntries++) { 3066 if ((error = run_bbp_read(sc, 0, &bbp0)) != 0) 3067 return error; 3068 if (bbp0 != 0 && bbp0 != 0xff) 3069 break; 3070 } 3071 if (ntries == 20) 3072 return ETIMEDOUT; 3073 3074 /* initialize BBP registers to default values */ 3075 for (i = 0; i < (int)__arraycount(rt2860_def_bbp); i++) { 3076 run_bbp_write(sc, rt2860_def_bbp[i].reg, 3077 rt2860_def_bbp[i].val); 3078 } 3079 3080 /* fix BBP84 for RT2860E */ 3081 if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101) 3082 run_bbp_write(sc, 84, 0x19); 3083 3084 if (sc->mac_ver >= 0x3070) { 3085 run_bbp_write(sc, 79, 0x13); 3086 run_bbp_write(sc, 80, 0x05); 3087 run_bbp_write(sc, 81, 0x33); 3088 } else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) { 3089 run_bbp_write(sc, 69, 0x16); 3090 run_bbp_write(sc, 73, 0x12); 3091 } 3092 return 0; 3093 } 3094 3095 static int 3096 run_rt3070_rf_init(struct run_softc *sc) 3097 { 3098 uint32_t tmp; 3099 uint8_t rf, target, bbp4; 3100 int i; 3101 3102 run_rt3070_rf_read(sc, 30, &rf); 3103 /* toggle RF R30 bit 7 */ 3104 run_rt3070_rf_write(sc, 30, rf | 0x80); 3105 DELAY(1000); 3106 run_rt3070_rf_write(sc, 30, rf & ~0x80); 3107 3108 /* initialize RF registers to default value */ 3109 if (sc->mac_ver == 0x3572) { 3110 for (i = 0; i < (int)__arraycount(rt3572_def_rf); i++) { 3111 run_rt3070_rf_write(sc, rt3572_def_rf[i].reg, 3112 rt3572_def_rf[i].val); 3113 } 3114 } else { 3115 for (i = 0; i < (int)__arraycount(rt3070_def_rf); i++) { 3116 run_rt3070_rf_write(sc, rt3070_def_rf[i].reg, 3117 rt3070_def_rf[i].val); 3118 } 3119 } 3120 if (sc->mac_ver == 0x3572) { 3121 run_rt3070_rf_read(sc, 6, &rf); 3122 run_rt3070_rf_write(sc, 6, rf | 0x40); 3123 3124 /* increase voltage from 1.2V to 1.35V */ 3125 run_read(sc, RT3070_LDO_CFG0, &tmp); 3126 tmp = (tmp & ~0x1f000000) | 0x0d000000; 3127 run_write(sc, RT3070_LDO_CFG0, tmp); 3128 if (sc->mac_rev >= 0x0211 || !sc->patch_dac) { 3129 /* decrease voltage back to 1.2V */ 3130 DELAY(1000); 3131 tmp = (tmp & ~0x1f000000) | 0x01000000; 3132 run_write(sc, RT3070_LDO_CFG0, tmp); 3133 } 3134 } else if (sc->mac_ver == 0x3071) { 3135 run_rt3070_rf_read(sc, 6, &rf); 3136 run_rt3070_rf_write(sc, 6, rf | 0x40); 3137 run_rt3070_rf_write(sc, 31, 0x14); 3138 3139 run_read(sc, RT3070_LDO_CFG0, &tmp); 3140 tmp &= ~0x1f000000; 3141 if (sc->mac_rev < 0x0211) 3142 tmp |= 0x0d000000; /* 1.35V */ 3143 else 3144 tmp |= 0x01000000; /* 1.2V */ 3145 run_write(sc, RT3070_LDO_CFG0, tmp); 3146 3147 /* patch LNA_PE_G1 */ 3148 run_read(sc, RT3070_GPIO_SWITCH, &tmp); 3149 run_write(sc, RT3070_GPIO_SWITCH, tmp & ~0x20); 3150 } else if (sc->mac_ver == 0x3070) { 3151 /* increase voltage from 1.2V to 1.35V */ 3152 run_read(sc, RT3070_LDO_CFG0, &tmp); 3153 tmp = (tmp & ~0x0f000000) | 0x0d000000; 3154 run_write(sc, RT3070_LDO_CFG0, tmp); 3155 } 3156 3157 /* select 20MHz bandwidth */ 3158 run_rt3070_rf_read(sc, 31, &rf); 3159 run_rt3070_rf_write(sc, 31, rf & ~0x20); 3160 3161 /* calibrate filter for 20MHz bandwidth */ 3162 sc->rf24_20mhz = 0x1f; /* default value */ 3163 target = (sc->mac_ver < 0x3071) ? 0x16 : 0x13; 3164 run_rt3070_filter_calib(sc, 0x07, target, &sc->rf24_20mhz); 3165 3166 /* select 40MHz bandwidth */ 3167 run_bbp_read(sc, 4, &bbp4); 3168 run_bbp_write(sc, 4, (bbp4 & ~0x08) | 0x10); 3169 run_rt3070_rf_read(sc, 31, &rf); 3170 run_rt3070_rf_write(sc, 31, rf | 0x20); 3171 3172 /* calibrate filter for 40MHz bandwidth */ 3173 sc->rf24_40mhz = 0x2f; /* default value */ 3174 target = (sc->mac_ver < 0x3071) ? 0x19 : 0x15; 3175 run_rt3070_filter_calib(sc, 0x27, target, &sc->rf24_40mhz); 3176 3177 /* go back to 20MHz bandwidth */ 3178 run_bbp_read(sc, 4, &bbp4); 3179 run_bbp_write(sc, 4, bbp4 & ~0x18); 3180 3181 if (sc->mac_ver == 0x3572) { 3182 /* save default BBP registers 25 and 26 values */ 3183 run_bbp_read(sc, 25, &sc->bbp25); 3184 run_bbp_read(sc, 26, &sc->bbp26); 3185 } else if (sc->mac_rev < 0x0211) 3186 run_rt3070_rf_write(sc, 27, 0x03); 3187 3188 run_read(sc, RT3070_OPT_14, &tmp); 3189 run_write(sc, RT3070_OPT_14, tmp | 1); 3190 3191 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3192 run_rt3070_rf_read(sc, 17, &rf); 3193 rf &= ~RT3070_TX_LO1; 3194 if ((sc->mac_ver == 0x3070 || 3195 (sc->mac_ver == 0x3071 && sc->mac_rev >= 0x0211)) && 3196 !sc->ext_2ghz_lna) 3197 rf |= 0x20; /* fix for long range Rx issue */ 3198 if (sc->txmixgain_2ghz >= 1) 3199 rf = (rf & ~0x7) | sc->txmixgain_2ghz; 3200 run_rt3070_rf_write(sc, 17, rf); 3201 } 3202 if (sc->mac_ver == 0x3071) { 3203 run_rt3070_rf_read(sc, 1, &rf); 3204 rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD); 3205 rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD; 3206 run_rt3070_rf_write(sc, 1, rf); 3207 3208 run_rt3070_rf_read(sc, 15, &rf); 3209 run_rt3070_rf_write(sc, 15, rf & ~RT3070_TX_LO2); 3210 3211 run_rt3070_rf_read(sc, 20, &rf); 3212 run_rt3070_rf_write(sc, 20, rf & ~RT3070_RX_LO1); 3213 3214 run_rt3070_rf_read(sc, 21, &rf); 3215 run_rt3070_rf_write(sc, 21, rf & ~RT3070_RX_LO2); 3216 } 3217 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3218 /* fix Tx to Rx IQ glitch by raising RF voltage */ 3219 run_rt3070_rf_read(sc, 27, &rf); 3220 rf &= ~0x77; 3221 if (sc->mac_rev < 0x0211) 3222 rf |= 0x03; 3223 run_rt3070_rf_write(sc, 27, rf); 3224 } 3225 return 0; 3226 } 3227 3228 static int 3229 run_rt3070_filter_calib(struct run_softc *sc, uint8_t init, uint8_t target, 3230 uint8_t *val) 3231 { 3232 uint8_t rf22, rf24; 3233 uint8_t bbp55_pb, bbp55_sb, delta; 3234 int ntries; 3235 3236 /* program filter */ 3237 run_rt3070_rf_read(sc, 24, &rf24); 3238 rf24 = (rf24 & 0xc0) | init; /* initial filter value */ 3239 run_rt3070_rf_write(sc, 24, rf24); 3240 3241 /* enable baseband loopback mode */ 3242 run_rt3070_rf_read(sc, 22, &rf22); 3243 run_rt3070_rf_write(sc, 22, rf22 | 0x01); 3244 3245 /* set power and frequency of passband test tone */ 3246 run_bbp_write(sc, 24, 0x00); 3247 for (ntries = 0; ntries < 100; ntries++) { 3248 /* transmit test tone */ 3249 run_bbp_write(sc, 25, 0x90); 3250 DELAY(1000); 3251 /* read received power */ 3252 run_bbp_read(sc, 55, &bbp55_pb); 3253 if (bbp55_pb != 0) 3254 break; 3255 } 3256 if (ntries == 100) 3257 return ETIMEDOUT; 3258 3259 /* set power and frequency of stopband test tone */ 3260 run_bbp_write(sc, 24, 0x06); 3261 for (ntries = 0; ntries < 100; ntries++) { 3262 /* transmit test tone */ 3263 run_bbp_write(sc, 25, 0x90); 3264 DELAY(1000); 3265 /* read received power */ 3266 run_bbp_read(sc, 55, &bbp55_sb); 3267 3268 delta = bbp55_pb - bbp55_sb; 3269 if (delta > target) 3270 break; 3271 3272 /* reprogram filter */ 3273 rf24++; 3274 run_rt3070_rf_write(sc, 24, rf24); 3275 } 3276 if (ntries < 100) { 3277 if (rf24 != init) 3278 rf24--; /* backtrack */ 3279 *val = rf24; 3280 run_rt3070_rf_write(sc, 24, rf24); 3281 } 3282 3283 /* restore initial state */ 3284 run_bbp_write(sc, 24, 0x00); 3285 3286 /* disable baseband loopback mode */ 3287 run_rt3070_rf_read(sc, 22, &rf22); 3288 run_rt3070_rf_write(sc, 22, rf22 & ~0x01); 3289 3290 return 0; 3291 } 3292 3293 static void 3294 run_rt3070_rf_setup(struct run_softc *sc) 3295 { 3296 uint8_t bbp, rf; 3297 int i; 3298 3299 if (sc->mac_ver == 0x3572) { 3300 /* enable DC filter */ 3301 if (sc->mac_rev >= 0x0201) 3302 run_bbp_write(sc, 103, 0xc0); 3303 3304 run_bbp_read(sc, 138, &bbp); 3305 if (sc->ntxchains == 1) 3306 bbp |= 0x20; /* turn off DAC1 */ 3307 if (sc->nrxchains == 1) 3308 bbp &= ~0x02; /* turn off ADC1 */ 3309 run_bbp_write(sc, 138, bbp); 3310 3311 if (sc->mac_rev >= 0x0211) { 3312 /* improve power consumption */ 3313 run_bbp_read(sc, 31, &bbp); 3314 run_bbp_write(sc, 31, bbp & ~0x03); 3315 } 3316 3317 run_rt3070_rf_read(sc, 16, &rf); 3318 rf = (rf & ~0x07) | sc->txmixgain_2ghz; 3319 run_rt3070_rf_write(sc, 16, rf); 3320 } else if (sc->mac_ver == 0x3071) { 3321 /* enable DC filter */ 3322 if (sc->mac_rev >= 0x0201) 3323 run_bbp_write(sc, 103, 0xc0); 3324 3325 run_bbp_read(sc, 138, &bbp); 3326 if (sc->ntxchains == 1) 3327 bbp |= 0x20; /* turn off DAC1 */ 3328 if (sc->nrxchains == 1) 3329 bbp &= ~0x02; /* turn off ADC1 */ 3330 run_bbp_write(sc, 138, bbp); 3331 3332 if (sc->mac_rev >= 0x0211) { 3333 /* improve power consumption */ 3334 run_bbp_read(sc, 31, &bbp); 3335 run_bbp_write(sc, 31, bbp & ~0x03); 3336 } 3337 3338 run_write(sc, RT2860_TX_SW_CFG1, 0); 3339 if (sc->mac_rev < 0x0211) { 3340 run_write(sc, RT2860_TX_SW_CFG2, 3341 sc->patch_dac ? 0x2c : 0x0f); 3342 } else 3343 run_write(sc, RT2860_TX_SW_CFG2, 0); 3344 } else if (sc->mac_ver == 0x3070) { 3345 if (sc->mac_rev >= 0x0201) { 3346 /* enable DC filter */ 3347 run_bbp_write(sc, 103, 0xc0); 3348 3349 /* improve power consumption */ 3350 run_bbp_read(sc, 31, &bbp); 3351 run_bbp_write(sc, 31, bbp & ~0x03); 3352 } 3353 3354 if (sc->mac_rev < 0x0211) { 3355 run_write(sc, RT2860_TX_SW_CFG1, 0); 3356 run_write(sc, RT2860_TX_SW_CFG2, 0x2c); 3357 } else 3358 run_write(sc, RT2860_TX_SW_CFG2, 0); 3359 } 3360 3361 /* initialize RF registers from ROM for >=RT3071*/ 3362 if (sc->mac_ver >= 0x3071) { 3363 for (i = 0; i < 10; i++) { 3364 if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff) 3365 continue; 3366 run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val); 3367 } 3368 } 3369 } 3370 3371 static int 3372 run_txrx_enable(struct run_softc *sc) 3373 { 3374 uint32_t tmp; 3375 int error, ntries; 3376 3377 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN); 3378 for (ntries = 0; ntries < 200; ntries++) { 3379 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3380 return error; 3381 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3382 break; 3383 DELAY(1000); 3384 } 3385 if (ntries == 200) 3386 return ETIMEDOUT; 3387 3388 DELAY(50); 3389 3390 tmp |= RT2860_RX_DMA_EN | RT2860_TX_DMA_EN | RT2860_TX_WB_DDONE; 3391 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3392 3393 /* enable Rx bulk aggregation (set timeout and limit) */ 3394 tmp = RT2860_USB_TX_EN | RT2860_USB_RX_EN | RT2860_USB_RX_AGG_EN | 3395 RT2860_USB_RX_AGG_TO(128) | RT2860_USB_RX_AGG_LMT(2); 3396 run_write(sc, RT2860_USB_DMA_CFG, tmp); 3397 3398 /* set Rx filter */ 3399 tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR; 3400 if (sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR) { 3401 tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL | 3402 RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK | 3403 RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV | 3404 RT2860_DROP_CFACK | RT2860_DROP_CFEND; 3405 if (sc->sc_ic.ic_opmode == IEEE80211_M_STA) 3406 tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL; 3407 } 3408 run_write(sc, RT2860_RX_FILTR_CFG, tmp); 3409 3410 run_write(sc, RT2860_MAC_SYS_CTRL, 3411 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3412 3413 return 0; 3414 } 3415 3416 static int 3417 run_init(struct ifnet *ifp) 3418 { 3419 struct run_softc *sc = ifp->if_softc; 3420 struct ieee80211com *ic = &sc->sc_ic; 3421 uint32_t tmp; 3422 uint8_t bbp1, bbp3; 3423 int i, error, qid, ridx, ntries; 3424 3425 for (ntries = 0; ntries < 100; ntries++) { 3426 if ((error = run_read(sc, RT2860_ASIC_VER_ID, &tmp)) != 0) 3427 goto fail; 3428 if (tmp != 0 && tmp != 0xffffffff) 3429 break; 3430 DELAY(10); 3431 } 3432 if (ntries == 100) { 3433 error = ETIMEDOUT; 3434 goto fail; 3435 } 3436 3437 if ((sc->sc_flags & RUN_FWLOADED) == 0 && 3438 (error = run_load_microcode(sc)) != 0) { 3439 aprint_error_dev(sc->sc_dev, 3440 "could not load 8051 microcode\n"); 3441 goto fail; 3442 } 3443 3444 if (ifp->if_flags & IFF_RUNNING) 3445 run_stop(ifp, 0); 3446 3447 /* init host command ring */ 3448 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 3449 3450 /* init Tx rings (4 EDCAs) */ 3451 for (qid = 0; qid < 4; qid++) { 3452 if ((error = run_alloc_tx_ring(sc, qid)) != 0) 3453 goto fail; 3454 } 3455 /* init Rx ring */ 3456 if ((error = run_alloc_rx_ring(sc)) != 0) 3457 goto fail; 3458 3459 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 3460 run_set_macaddr(sc, ic->ic_myaddr); 3461 3462 for (ntries = 0; ntries < 100; ntries++) { 3463 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3464 goto fail; 3465 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3466 break; 3467 DELAY(1000); 3468 } 3469 if (ntries == 100) { 3470 aprint_error_dev(sc->sc_dev, 3471 "timeout waiting for DMA engine\n"); 3472 error = ETIMEDOUT; 3473 goto fail; 3474 } 3475 tmp &= 0xff0; 3476 tmp |= RT2860_TX_WB_DDONE; 3477 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3478 3479 /* turn off PME_OEN to solve high-current issue */ 3480 run_read(sc, RT2860_SYS_CTRL, &tmp); 3481 run_write(sc, RT2860_SYS_CTRL, tmp & ~RT2860_PME_OEN); 3482 3483 run_write(sc, RT2860_MAC_SYS_CTRL, 3484 RT2860_BBP_HRST | RT2860_MAC_SRST); 3485 run_write(sc, RT2860_USB_DMA_CFG, 0); 3486 3487 if ((error = run_reset(sc)) != 0) { 3488 aprint_error_dev(sc->sc_dev, "could not reset chipset\n"); 3489 goto fail; 3490 } 3491 3492 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3493 3494 /* init Tx power for all Tx rates (from EEPROM) */ 3495 for (ridx = 0; ridx < 5; ridx++) { 3496 if (sc->txpow20mhz[ridx] == 0xffffffff) 3497 continue; 3498 run_write(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]); 3499 } 3500 3501 for (i = 0; i < (int)__arraycount(rt2870_def_mac); i++) 3502 run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val); 3503 run_write(sc, RT2860_WMM_AIFSN_CFG, 0x00002273); 3504 run_write(sc, RT2860_WMM_CWMIN_CFG, 0x00002344); 3505 run_write(sc, RT2860_WMM_CWMAX_CFG, 0x000034aa); 3506 3507 if (sc->mac_ver >= 0x3070) { 3508 /* set delay of PA_PE assertion to 1us (unit of 0.25us) */ 3509 run_write(sc, RT2860_TX_SW_CFG0, 3510 4 << RT2860_DLY_PAPE_EN_SHIFT); 3511 } 3512 3513 /* wait while MAC is busy */ 3514 for (ntries = 0; ntries < 100; ntries++) { 3515 if ((error = run_read(sc, RT2860_MAC_STATUS_REG, &tmp)) != 0) 3516 goto fail; 3517 if (!(tmp & (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY))) 3518 break; 3519 DELAY(1000); 3520 } 3521 if (ntries == 100) { 3522 error = ETIMEDOUT; 3523 goto fail; 3524 } 3525 3526 /* clear Host to MCU mailbox */ 3527 run_write(sc, RT2860_H2M_BBPAGENT, 0); 3528 run_write(sc, RT2860_H2M_MAILBOX, 0); 3529 DELAY(1000); 3530 3531 if ((error = run_bbp_init(sc)) != 0) { 3532 aprint_error_dev(sc->sc_dev, "could not initialize BBP\n"); 3533 goto fail; 3534 } 3535 3536 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 3537 tmp &= ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 3538 RT2860_TBTT_TIMER_EN); 3539 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 3540 3541 /* clear RX WCID search table */ 3542 run_set_region_4(sc, RT2860_WCID_ENTRY(0), 0, 512); 3543 /* clear Pair-wise key table */ 3544 run_set_region_4(sc, RT2860_PKEY(0), 0, 2048); 3545 /* clear IV/EIV table */ 3546 run_set_region_4(sc, RT2860_IVEIV(0), 0, 512); 3547 /* clear WCID attribute table */ 3548 run_set_region_4(sc, RT2860_WCID_ATTR(0), 0, 8 * 32); 3549 /* clear shared key table */ 3550 run_set_region_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32); 3551 /* clear shared key mode */ 3552 run_set_region_4(sc, RT2860_SKEY_MODE_0_7, 0, 4); 3553 3554 run_read(sc, RT2860_US_CYC_CNT, &tmp); 3555 tmp = (tmp & ~0xff) | 0x1e; 3556 run_write(sc, RT2860_US_CYC_CNT, tmp); 3557 3558 if (sc->mac_rev != 0x0101) 3559 run_write(sc, RT2860_TXOP_CTRL_CFG, 0x0000583f); 3560 3561 run_write(sc, RT2860_WMM_TXOP0_CFG, 0); 3562 run_write(sc, RT2860_WMM_TXOP1_CFG, 48 << 16 | 96); 3563 3564 /* write vendor-specific BBP values (from EEPROM) */ 3565 for (i = 0; i < 8; i++) { 3566 if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff) 3567 continue; 3568 run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val); 3569 } 3570 3571 /* select Main antenna for 1T1R devices */ 3572 if (sc->rf_rev == RT3070_RF_3020) 3573 run_set_rx_antenna(sc, 0); 3574 3575 /* send LEDs operating mode to microcontroller */ 3576 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0]); 3577 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1]); 3578 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2]); 3579 3580 if (sc->mac_ver >= 0x3070) 3581 run_rt3070_rf_init(sc); 3582 3583 /* disable non-existing Rx chains */ 3584 run_bbp_read(sc, 3, &bbp3); 3585 bbp3 &= ~(1 << 3 | 1 << 4); 3586 if (sc->nrxchains == 2) 3587 bbp3 |= 1 << 3; 3588 else if (sc->nrxchains == 3) 3589 bbp3 |= 1 << 4; 3590 run_bbp_write(sc, 3, bbp3); 3591 3592 /* disable non-existing Tx chains */ 3593 run_bbp_read(sc, 1, &bbp1); 3594 if (sc->ntxchains == 1) 3595 bbp1 &= ~(1 << 3 | 1 << 4); 3596 run_bbp_write(sc, 1, bbp1); 3597 3598 if (sc->mac_ver >= 0x3070) 3599 run_rt3070_rf_setup(sc); 3600 3601 /* select default channel */ 3602 run_set_chan(sc, ic->ic_curchan); 3603 3604 /* turn radio LED on */ 3605 run_set_leds(sc, RT2860_LED_RADIO); 3606 3607 #ifdef RUN_HWCRYPTO 3608 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 3609 /* install WEP keys */ 3610 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3611 (void)run_set_key(ic, &ic->ic_crypto.cs_nw_keys[i], 3612 NULL); 3613 } 3614 #endif 3615 3616 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 3617 struct run_rx_data *data = &sc->rxq.data[i]; 3618 3619 usbd_setup_xfer(data->xfer, data, data->buf, RUN_MAX_RXSZ, 3620 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, run_rxeof); 3621 error = usbd_transfer(data->xfer); 3622 if (error != USBD_NORMAL_COMPLETION && 3623 error != USBD_IN_PROGRESS) 3624 goto fail; 3625 } 3626 3627 if ((error = run_txrx_enable(sc)) != 0) 3628 goto fail; 3629 3630 ifp->if_flags &= ~IFF_OACTIVE; 3631 ifp->if_flags |= IFF_RUNNING; 3632 3633 if (ic->ic_opmode == IEEE80211_M_MONITOR) 3634 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 3635 else 3636 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 3637 3638 if (error != 0) 3639 fail: run_stop(ifp, 1); 3640 return error; 3641 } 3642 3643 static void 3644 run_stop(struct ifnet *ifp, int disable) 3645 { 3646 struct run_softc *sc = ifp->if_softc; 3647 struct ieee80211com *ic = &sc->sc_ic; 3648 uint32_t tmp; 3649 int ntries, qid; 3650 3651 if (ifp->if_flags & IFF_RUNNING) 3652 run_set_leds(sc, 0); /* turn all LEDs off */ 3653 3654 sc->sc_tx_timer = 0; 3655 ifp->if_timer = 0; 3656 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 3657 3658 callout_stop(&sc->scan_to); 3659 callout_stop(&sc->calib_to); 3660 3661 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 3662 /* wait for all queued asynchronous commands to complete */ 3663 while (sc->cmdq.queued > 0) 3664 tsleep(&sc->cmdq, 0, "cmdq", 0); 3665 3666 /* disable Tx/Rx */ 3667 run_read(sc, RT2860_MAC_SYS_CTRL, &tmp); 3668 tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3669 run_write(sc, RT2860_MAC_SYS_CTRL, tmp); 3670 3671 /* wait for pending Tx to complete */ 3672 for (ntries = 0; ntries < 100; ntries++) { 3673 if (run_read(sc, RT2860_TXRXQ_PCNT, &tmp) != 0) 3674 break; 3675 if ((tmp & RT2860_TX2Q_PCNT_MASK) == 0) 3676 break; 3677 } 3678 DELAY(1000); 3679 run_write(sc, RT2860_USB_DMA_CFG, 0); 3680 3681 /* reset adapter */ 3682 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST); 3683 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3684 3685 /* reset Tx and Rx rings */ 3686 sc->qfullmsk = 0; 3687 for (qid = 0; qid < 4; qid++) 3688 run_free_tx_ring(sc, qid); 3689 run_free_rx_ring(sc); 3690 } 3691 3692 #ifndef IEEE80211_STA_ONLY 3693 static int 3694 run_setup_beacon(struct run_softc *sc) 3695 { 3696 struct ieee80211com *ic = &sc->sc_ic; 3697 struct rt2860_txwi txwi; 3698 struct mbuf *m; 3699 int ridx; 3700 3701 if ((m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo)) == NULL) 3702 return ENOBUFS; 3703 3704 memset(&txwi, 0, sizeof(txwi)); 3705 txwi.wcid = 0xff; 3706 txwi.len = htole16(m->m_pkthdr.len); 3707 /* send beacons at the lowest available rate */ 3708 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 3709 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 3710 txwi.phy = htole16(rt2860_rates[ridx].mcs); 3711 if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM) 3712 txwi.phy |= htole16(RT2860_PHY_OFDM); 3713 txwi.txop = RT2860_TX_TXOP_HT; 3714 txwi.flags = RT2860_TX_TS; 3715 3716 run_write_region_1(sc, RT2860_BCN_BASE(0), 3717 (uint8_t *)&txwi, sizeof(txwi)); 3718 run_write_region_1(sc, RT2860_BCN_BASE(0) + sizeof(txwi), 3719 mtod(m, uint8_t *), m->m_pkthdr.len); 3720 3721 m_freem(m); 3722 3723 return 0; 3724 } 3725 #endif 3726 3727 MODULE(MODULE_CLASS_DRIVER, if_run, "bpf"); 3728 3729 #ifdef _MODULE 3730 #include "ioconf.c" 3731 #endif 3732 3733 static int 3734 if_run_modcmd(modcmd_t cmd, void *arg) 3735 { 3736 int error = 0; 3737 3738 switch (cmd) { 3739 case MODULE_CMD_INIT: 3740 #ifdef _MODULE 3741 error = config_init_component(cfdriver_ioconf_run, 3742 cfattach_ioconf_run, cfdata_ioconf_run); 3743 #endif 3744 return error; 3745 case MODULE_CMD_FINI: 3746 #ifdef _MODULE 3747 error = config_fini_component(cfdriver_ioconf_run, 3748 cfattach_ioconf_run, cfdata_ioconf_run); 3749 #endif 3750 return error; 3751 default: 3752 return ENOTTY; 3753 } 3754 } 3755
Indexes created Thu Oct 02 10:09:58 GMT 2025