if_run.c revision 1.6
1 /* $NetBSD: if_run.c,v 1.6 2013/01/05 01:30:16 christos Exp $ */ 2 /* $OpenBSD: if_run.c,v 1.90 2012/03/24 15:11:04 jsg Exp $ */ 3 4 /*- 5 * Copyright (c) 2008-2010 Damien Bergamini <damien.bergamini (at) free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Ralink Technology RT2700U/RT2800U/RT3000U chipset driver. 22 * http://www.ralinktech.com/ 23 */ 24 25 #include <sys/cdefs.h> 26 __KERNEL_RCSID(0, "$NetBSD: if_run.c,v 1.6 2013/01/05 01:30:16 christos Exp $"); 27 28 #ifdef _KERNEL_OPT 29 #include "opt_usb.h" 30 #endif 31 32 #include <sys/param.h> 33 #include <sys/sockio.h> 34 #include <sys/sysctl.h> 35 #include <sys/mbuf.h> 36 #include <sys/kernel.h> 37 #include <sys/socket.h> 38 #include <sys/systm.h> 39 #include <sys/malloc.h> 40 #include <sys/callout.h> 41 #include <sys/module.h> 42 #include <sys/conf.h> 43 #include <sys/device.h> 44 45 #include <sys/bus.h> 46 #include <machine/endian.h> 47 #include <sys/intr.h> 48 49 #include <net/bpf.h> 50 #include <net/if.h> 51 #include <net/if_arp.h> 52 #include <net/if_dl.h> 53 #include <net/if_ether.h> 54 #include <net/if_media.h> 55 #include <net/if_types.h> 56 57 #include <net80211/ieee80211_var.h> 58 #include <net80211/ieee80211_amrr.h> 59 #include <net80211/ieee80211_radiotap.h> 60 61 #include <dev/firmload.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdivar.h> 66 #include <dev/usb/usbdi_util.h> 67 #include <dev/usb/usbdevs.h> 68 69 #include <dev/ic/rt2860reg.h> /* shared with ral(4) */ 70 #include <dev/usb/if_runvar.h> 71 72 #ifdef USB_DEBUG 73 #define RUN_DEBUG 74 #endif 75 76 #ifdef RUN_DEBUG 77 #define DPRINTF(x) do { if (run_debug) printf x; } while (0) 78 #define DPRINTFN(n, x) do { if (run_debug >= (n)) printf x; } while (0) 79 int run_debug = 0; 80 #else 81 #define DPRINTF(x) 82 #define DPRINTFN(n, x) 83 #endif 84 85 #define USB_ID(v, p) { USB_VENDOR_##v, USB_PRODUCT_##v##_##p } 86 static const struct usb_devno run_devs[] = { 87 USB_ID(ABOCOM, RT2770), 88 USB_ID(ABOCOM, RT2870), 89 USB_ID(ABOCOM, RT3070), 90 USB_ID(ABOCOM, RT3071), 91 USB_ID(ABOCOM, RT3072), 92 USB_ID(ABOCOM2, RT2870_1), 93 USB_ID(ACCTON, RT2770), 94 USB_ID(ACCTON, RT2870_1), 95 USB_ID(ACCTON, RT2870_2), 96 USB_ID(ACCTON, RT2870_3), 97 USB_ID(ACCTON, RT2870_4), 98 USB_ID(ACCTON, RT2870_5), 99 USB_ID(ACCTON, RT3070), 100 USB_ID(ACCTON, RT3070_1), 101 USB_ID(ACCTON, RT3070_2), 102 USB_ID(ACCTON, RT3070_3), 103 USB_ID(ACCTON, RT3070_4), 104 USB_ID(ACCTON, RT3070_5), 105 USB_ID(ACCTON, RT3070_6), 106 USB_ID(AIRTIES, RT3070), 107 USB_ID(AIRTIES, RT3070_2), 108 USB_ID(ALLWIN, RT2070), 109 USB_ID(ALLWIN, RT2770), 110 USB_ID(ALLWIN, RT2870), 111 USB_ID(ALLWIN, RT3070), 112 USB_ID(ALLWIN, RT3071), 113 USB_ID(ALLWIN, RT3072), 114 USB_ID(ALLWIN, RT3572), 115 USB_ID(AMIGO, RT2870_1), 116 USB_ID(AMIGO, RT2870_2), 117 USB_ID(AMIT, CGWLUSB2GNR), 118 USB_ID(AMIT, RT2870_1), 119 USB_ID(AMIT2, RT2870), 120 USB_ID(ASUSTEK, RT2870_1), 121 USB_ID(ASUSTEK, RT2870_2), 122 USB_ID(ASUSTEK, RT2870_3), 123 USB_ID(ASUSTEK, RT2870_4), 124 USB_ID(ASUSTEK, RT2870_5), 125 USB_ID(ASUSTEK, RT3070), 126 USB_ID(ASUSTEK, RT3070_1), 127 USB_ID(ASUSTEK2, USBN11), 128 USB_ID(AZUREWAVE, RT2870_1), 129 USB_ID(AZUREWAVE, RT2870_2), 130 USB_ID(AZUREWAVE, RT3070), 131 USB_ID(AZUREWAVE, RT3070_2), 132 USB_ID(AZUREWAVE, RT3070_3), 133 USB_ID(AZUREWAVE, RT3070_4), 134 USB_ID(AZUREWAVE, RT3070_5), 135 USB_ID(BELKIN, F5D8053V3), 136 USB_ID(BELKIN, F5D8055), 137 USB_ID(BELKIN, F5D8055V2), 138 USB_ID(BELKIN, F6D4050V1), 139 USB_ID(BELKIN, F6D4050V2), 140 USB_ID(BELKIN, F7D1101V2), 141 USB_ID(BELKIN, RT2870_1), 142 USB_ID(BELKIN, RT2870_2), 143 USB_ID(BEWAN, RT3070), 144 USB_ID(CISCOLINKSYS, AE1000), 145 USB_ID(CISCOLINKSYS, AM10), 146 USB_ID(CISCOLINKSYS2, RT3070), 147 USB_ID(CISCOLINKSYS3, RT3070), 148 USB_ID(CONCEPTRONIC, RT2870_1), 149 USB_ID(CONCEPTRONIC, RT2870_2), 150 USB_ID(CONCEPTRONIC, RT2870_3), 151 USB_ID(CONCEPTRONIC, RT2870_4), 152 USB_ID(CONCEPTRONIC, RT2870_5), 153 USB_ID(CONCEPTRONIC, RT2870_6), 154 USB_ID(CONCEPTRONIC, RT2870_7), 155 USB_ID(CONCEPTRONIC, RT2870_8), 156 USB_ID(CONCEPTRONIC, RT3070_1), 157 USB_ID(CONCEPTRONIC, RT3070_2), 158 USB_ID(CONCEPTRONIC, RT3070_3), 159 USB_ID(COREGA, CGWLUSB300GNM), 160 USB_ID(COREGA, RT2870_1), 161 USB_ID(COREGA, RT2870_2), 162 USB_ID(COREGA, RT2870_3), 163 USB_ID(COREGA, RT3070), 164 USB_ID(CYBERTAN, RT2870), 165 USB_ID(DLINK, RT2870), 166 USB_ID(DLINK, RT3072), 167 USB_ID(DLINK2, DWA130), 168 USB_ID(DLINK2, RT2870_1), 169 USB_ID(DLINK2, RT2870_2), 170 USB_ID(DLINK2, RT3070_1), 171 USB_ID(DLINK2, RT3070_2), 172 USB_ID(DLINK2, RT3070_3), 173 USB_ID(DLINK2, RT3070_4), 174 USB_ID(DLINK2, RT3070_5), 175 USB_ID(DLINK2, RT3072), 176 USB_ID(DLINK2, RT3072_1), 177 USB_ID(DVICO, RT3070), 178 USB_ID(EDIMAX, EW7717), 179 USB_ID(EDIMAX, EW7718), 180 USB_ID(EDIMAX, EW7722UTN), 181 USB_ID(EDIMAX, RT2870_1), 182 USB_ID(ENCORE, RT3070), 183 USB_ID(ENCORE, RT3070_2), 184 USB_ID(ENCORE, RT3070_3), 185 USB_ID(GIGABYTE, GNWB31N), 186 USB_ID(GIGABYTE, GNWB32L), 187 USB_ID(GIGABYTE, RT2870_1), 188 USB_ID(GIGASET, RT3070_1), 189 USB_ID(GIGASET, RT3070_2), 190 USB_ID(GUILLEMOT, HWNU300), 191 USB_ID(HAWKING, HWUN2), 192 USB_ID(HAWKING, RT2870_1), 193 USB_ID(HAWKING, RT2870_2), 194 USB_ID(HAWKING, RT2870_3), 195 USB_ID(HAWKING, RT2870_4), 196 USB_ID(HAWKING, RT2870_5), 197 USB_ID(HAWKING, RT3070), 198 USB_ID(IODATA, RT3072_1), 199 USB_ID(IODATA, RT3072_2), 200 USB_ID(IODATA, RT3072_3), 201 USB_ID(IODATA, RT3072_4), 202 USB_ID(LINKSYS4, RT3070), 203 USB_ID(LINKSYS4, WUSB100), 204 USB_ID(LINKSYS4, WUSB54GC_3), 205 USB_ID(LINKSYS4, WUSB600N), 206 USB_ID(LINKSYS4, WUSB600NV2), 207 USB_ID(LOGITEC, LANW300NU2), 208 USB_ID(LOGITEC, RT2870_1), 209 USB_ID(LOGITEC, RT2870_2), 210 USB_ID(LOGITEC, RT2870_3), 211 USB_ID(LOGITEC, RT3020), 212 USB_ID(MELCO, RT2870_1), 213 USB_ID(MELCO, RT2870_2), 214 USB_ID(MELCO, WLIUCAG300N), 215 USB_ID(MELCO, WLIUCG300N), 216 USB_ID(MELCO, WLIUCG301N), 217 USB_ID(MELCO, WLIUCGN), 218 USB_ID(MELCO, WLIUCGNHP), 219 USB_ID(MELCO, WLIUCGNM), 220 USB_ID(MELCO, WLIUCGNM2T), 221 USB_ID(MOTOROLA4, RT2770), 222 USB_ID(MOTOROLA4, RT3070), 223 USB_ID(MSI, RT3070), 224 USB_ID(MSI, RT3070_2), 225 USB_ID(MSI, RT3070_3), 226 USB_ID(MSI, RT3070_4), 227 USB_ID(MSI, RT3070_5), 228 USB_ID(MSI, RT3070_6), 229 USB_ID(MSI, RT3070_7), 230 USB_ID(MSI, RT3070_8), 231 USB_ID(MSI, RT3070_9), 232 USB_ID(MSI, RT3070_10), 233 USB_ID(MSI, RT3070_11), 234 USB_ID(MSI, RT3070_12), 235 USB_ID(MSI, RT3070_13), 236 USB_ID(MSI, RT3070_14), 237 USB_ID(MSI, RT3070_15), 238 USB_ID(OVISLINK, RT3071), 239 USB_ID(OVISLINK, RT3072), 240 USB_ID(PARA, RT3070), 241 USB_ID(PEGATRON, RT2870), 242 USB_ID(PEGATRON, RT3070), 243 USB_ID(PEGATRON, RT3070_2), 244 USB_ID(PEGATRON, RT3070_3), 245 USB_ID(PEGATRON, RT3072), 246 USB_ID(PHILIPS, RT2870), 247 USB_ID(PLANEX2, GWUS300MINIS), 248 USB_ID(PLANEX2, GWUSMICRO300), 249 USB_ID(PLANEX2, GWUSMICRON), 250 USB_ID(PLANEX2, GWUS300MINIX), 251 USB_ID(PLANEX2, RT3070), 252 USB_ID(QCOM, RT2870), 253 USB_ID(QUANTA, RT3070), 254 USB_ID(RALINK, RT2070), 255 USB_ID(RALINK, RT2770), 256 USB_ID(RALINK, RT2870), 257 USB_ID(RALINK, RT3070), 258 USB_ID(RALINK, RT3071), 259 USB_ID(RALINK, RT3072), 260 USB_ID(RALINK, RT3370), 261 USB_ID(RALINK, RT3572), 262 USB_ID(RALINK, RT8070), 263 USB_ID(SAMSUNG, RT2870_1), 264 USB_ID(SENAO, RT2870_1), 265 USB_ID(SENAO, RT2870_2), 266 USB_ID(SENAO, RT2870_3), 267 USB_ID(SENAO, RT2870_4), 268 USB_ID(SENAO, RT3070), 269 USB_ID(SENAO, RT3071), 270 USB_ID(SENAO, RT3072), 271 USB_ID(SENAO, RT3072_2), 272 USB_ID(SENAO, RT3072_3), 273 USB_ID(SENAO, RT3072_4), 274 USB_ID(SENAO, RT3072_5), 275 USB_ID(SITECOMEU, RT2870_1), 276 USB_ID(SITECOMEU, RT2870_2), 277 USB_ID(SITECOMEU, RT2870_3), 278 USB_ID(SITECOMEU, RT3070_1), 279 USB_ID(SITECOMEU, RT3072_3), 280 USB_ID(SITECOMEU, RT3072_4), 281 USB_ID(SITECOMEU, RT3072_5), 282 USB_ID(SITECOMEU, WL302), 283 USB_ID(SITECOMEU, WL315), 284 USB_ID(SITECOMEU, WL321), 285 USB_ID(SITECOMEU, WL324), 286 USB_ID(SITECOMEU, WL329), 287 USB_ID(SITECOMEU, WL343), 288 USB_ID(SITECOMEU, WL344), 289 USB_ID(SITECOMEU, WL345), 290 USB_ID(SITECOMEU, WL349V4), 291 USB_ID(SITECOMEU, WL608), 292 USB_ID(SITECOMEU, WLA4000), 293 USB_ID(SITECOMEU, WLA5000), 294 USB_ID(SPARKLAN, RT2870_1), 295 USB_ID(SPARKLAN, RT2870_2), 296 USB_ID(SPARKLAN, RT3070), 297 USB_ID(SWEEX2, LW153), 298 USB_ID(SWEEX2, LW303), 299 USB_ID(SWEEX2, LW313), 300 USB_ID(TOSHIBA, RT3070), 301 USB_ID(UMEDIA, RT2870_1), 302 USB_ID(UMEDIA, TEW645UB), 303 USB_ID(ZCOM, RT2870_1), 304 USB_ID(ZCOM, RT2870_2), 305 USB_ID(ZINWELL, RT2870_1), 306 USB_ID(ZINWELL, RT2870_2), 307 USB_ID(ZINWELL, RT3070), 308 USB_ID(ZINWELL, RT3072), 309 USB_ID(ZINWELL, RT3072_2), 310 USB_ID(ZYXEL, NWD2105), 311 USB_ID(ZYXEL, NWD211AN), 312 USB_ID(ZYXEL, RT2870_1), 313 USB_ID(ZYXEL, RT2870_2), 314 USB_ID(ZYXEL, RT3070), 315 }; 316 317 static int run_match(device_t, cfdata_t, void *); 318 static void run_attach(device_t, device_t, void *); 319 static int run_detach(device_t, int); 320 static int run_activate(device_t, enum devact); 321 322 CFATTACH_DECL_NEW(run, sizeof(struct run_softc), 323 run_match, run_attach, run_detach, run_activate); 324 325 static int run_alloc_rx_ring(struct run_softc *); 326 static void run_free_rx_ring(struct run_softc *); 327 static int run_alloc_tx_ring(struct run_softc *, int); 328 static void run_free_tx_ring(struct run_softc *, int); 329 static int run_load_microcode(struct run_softc *); 330 static int run_reset(struct run_softc *); 331 static int run_read(struct run_softc *, uint16_t, uint32_t *); 332 static int run_read_region_1(struct run_softc *, uint16_t, 333 uint8_t *, int); 334 static int run_write_2(struct run_softc *, uint16_t, uint16_t); 335 static int run_write(struct run_softc *, uint16_t, uint32_t); 336 static int run_write_region_1(struct run_softc *, uint16_t, 337 const uint8_t *, int); 338 static int run_set_region_4(struct run_softc *, uint16_t, 339 uint32_t, int); 340 static int run_efuse_read_2(struct run_softc *, uint16_t, 341 uint16_t *); 342 static int run_eeprom_read_2(struct run_softc *, uint16_t, 343 uint16_t *); 344 static int run_rt2870_rf_write(struct run_softc *, uint8_t, 345 uint32_t); 346 static int run_rt3070_rf_read(struct run_softc *, uint8_t, 347 uint8_t *); 348 static int run_rt3070_rf_write(struct run_softc *, uint8_t, 349 uint8_t); 350 static int run_bbp_read(struct run_softc *, uint8_t, uint8_t *); 351 static int run_bbp_write(struct run_softc *, uint8_t, uint8_t); 352 static int run_mcu_cmd(struct run_softc *, uint8_t, uint16_t); 353 static const char * run_get_rf(int); 354 static int run_read_eeprom(struct run_softc *); 355 static struct ieee80211_node * 356 run_node_alloc(struct ieee80211_node_table *); 357 static int run_media_change(struct ifnet *); 358 static void run_next_scan(void *); 359 static void run_task(void *); 360 static void run_do_async(struct run_softc *, 361 void (*)(struct run_softc *, void *), void *, int); 362 static int run_newstate(struct ieee80211com *, 363 enum ieee80211_state, int); 364 static void run_newstate_cb(struct run_softc *, void *); 365 static int run_updateedca(struct ieee80211com *); 366 static void run_updateedca_cb(struct run_softc *, void *); 367 #ifdef RUN_HWCRYPTO 368 static int run_set_key(struct ieee80211com *, 369 const struct ieee80211_key *, const uint8_t *); 370 static void run_set_key_cb(struct run_softc *, void *); 371 static int run_delete_key(struct ieee80211com *, 372 const struct ieee80211_key *); 373 static void run_delete_key_cb(struct run_softc *, void *); 374 #endif 375 static void run_calibrate_to(void *); 376 static void run_calibrate_cb(struct run_softc *, void *); 377 static void run_newassoc(struct ieee80211_node *, int); 378 static void run_rx_frame(struct run_softc *, uint8_t *, int); 379 static void run_rxeof(usbd_xfer_handle, usbd_private_handle, 380 usbd_status); 381 static void run_txeof(usbd_xfer_handle, usbd_private_handle, 382 usbd_status); 383 static int run_tx(struct run_softc *, struct mbuf *, 384 struct ieee80211_node *); 385 static void run_start(struct ifnet *); 386 static void run_watchdog(struct ifnet *); 387 static int run_ioctl(struct ifnet *, u_long, void *); 388 static void run_select_chan_group(struct run_softc *, int); 389 static void run_set_agc(struct run_softc *, uint8_t); 390 static void run_set_rx_antenna(struct run_softc *, int); 391 static void run_rt2870_set_chan(struct run_softc *, u_int); 392 static void run_rt3070_set_chan(struct run_softc *, u_int); 393 static void run_rt3572_set_chan(struct run_softc *, u_int); 394 static int run_set_chan(struct run_softc *, 395 struct ieee80211_channel *); 396 static void run_enable_tsf_sync(struct run_softc *); 397 static void run_enable_mrr(struct run_softc *); 398 static void run_set_txpreamble(struct run_softc *); 399 static void run_set_basicrates(struct run_softc *); 400 static void run_set_leds(struct run_softc *, uint16_t); 401 static void run_set_bssid(struct run_softc *, const uint8_t *); 402 static void run_set_macaddr(struct run_softc *, const uint8_t *); 403 static void run_updateslot(struct ifnet *); 404 static void run_updateslot_cb(struct run_softc *, void *); 405 static int8_t run_rssi2dbm(struct run_softc *, uint8_t, uint8_t); 406 static int run_bbp_init(struct run_softc *); 407 static int run_rt3070_rf_init(struct run_softc *); 408 static int run_rt3070_filter_calib(struct run_softc *, uint8_t, 409 uint8_t, uint8_t *); 410 static void run_rt3070_rf_setup(struct run_softc *); 411 static int run_txrx_enable(struct run_softc *); 412 static int run_init(struct ifnet *); 413 static void run_stop(struct ifnet *, int); 414 #ifndef IEEE80211_STA_ONLY 415 static int run_setup_beacon(struct run_softc *); 416 #endif 417 418 static const struct { 419 uint32_t reg; 420 uint32_t val; 421 } rt2870_def_mac[] = { 422 RT2870_DEF_MAC 423 }; 424 425 static const struct { 426 uint8_t reg; 427 uint8_t val; 428 } rt2860_def_bbp[] = { 429 RT2860_DEF_BBP 430 }; 431 432 static const struct rfprog { 433 uint8_t chan; 434 uint32_t r1, r2, r3, r4; 435 } rt2860_rf2850[] = { 436 RT2860_RF2850 437 }; 438 439 static const struct { 440 uint8_t n, r, k; 441 } rt3070_freqs[] = { 442 RT3070_RF3052 443 }; 444 445 static const struct { 446 uint8_t reg; 447 uint8_t val; 448 } rt3070_def_rf[] = { 449 RT3070_DEF_RF 450 }, rt3572_def_rf[] = { 451 RT3572_DEF_RF 452 }; 453 454 static int 455 firmware_load(const char *dname, const char *iname, uint8_t **ucodep, 456 size_t *sizep) 457 { 458 firmware_handle_t fh; 459 int error; 460 461 if ((error = firmware_open(dname, iname, &fh)) != 0) 462 return (error); 463 *sizep = firmware_get_size(fh); 464 if ((*ucodep = firmware_malloc(*sizep)) == NULL) { 465 firmware_close(fh); 466 return (ENOMEM); 467 } 468 if ((error = firmware_read(fh, 0, *ucodep, *sizep)) != 0) 469 firmware_free(*ucodep, *sizep); 470 firmware_close(fh); 471 472 return (error); 473 } 474 475 static int 476 run_match(device_t parent, cfdata_t match, void *aux) 477 { 478 struct usb_attach_arg *uaa = aux; 479 480 return (usb_lookup(run_devs, uaa->vendor, uaa->product) != NULL) ? 481 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 482 } 483 484 static void 485 run_attach(device_t parent, device_t self, void *aux) 486 { 487 struct run_softc *sc = device_private(self); 488 struct usb_attach_arg *uaa = aux; 489 struct ieee80211com *ic = &sc->sc_ic; 490 struct ifnet *ifp = &sc->sc_if; 491 usb_interface_descriptor_t *id; 492 usb_endpoint_descriptor_t *ed; 493 char *devinfop; 494 int i, nrx, ntx, ntries, error; 495 uint32_t ver; 496 497 aprint_naive("\n"); 498 aprint_normal("\n"); 499 500 sc->sc_dev = self; 501 sc->sc_udev = uaa->device; 502 503 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 504 aprint_normal_dev(sc->sc_dev, "%s\n", devinfop); 505 usbd_devinfo_free(devinfop); 506 507 error = usbd_set_config_no(sc->sc_udev, 1, 0); 508 if (error != 0) { 509 aprint_error_dev(sc->sc_dev, "failed to set configuration" 510 ", err=%s\n", usbd_errstr(error)); 511 return; 512 } 513 514 /* get the first interface handle */ 515 error = usbd_device2interface_handle(sc->sc_udev, 0, &sc->sc_iface); 516 if (error != 0) { 517 aprint_error_dev(sc->sc_dev, 518 "could not get interface handle\n"); 519 return; 520 } 521 522 /* 523 * Find all bulk endpoints. There are 7 bulk endpoints: 1 for RX 524 * and 6 for TX (4 EDCAs + HCCA + Prio). 525 * Update 03-14-2009: some devices like the Planex GW-US300MiniS 526 * seem to have only 4 TX bulk endpoints (Fukaumi Naoki). 527 */ 528 nrx = ntx = 0; 529 id = usbd_get_interface_descriptor(sc->sc_iface); 530 for (i = 0; i < id->bNumEndpoints; i++) { 531 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 532 if (ed == NULL || UE_GET_XFERTYPE(ed->bmAttributes) != UE_BULK) 533 continue; 534 535 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) { 536 sc->rxq.pipe_no = ed->bEndpointAddress; 537 nrx++; 538 } else if (ntx < 4) { 539 sc->txq[ntx].pipe_no = ed->bEndpointAddress; 540 ntx++; 541 } 542 } 543 /* make sure we've got them all */ 544 if (nrx < 1 || ntx < 4) { 545 aprint_error_dev(sc->sc_dev, "missing endpoint\n"); 546 return; 547 } 548 549 usb_init_task(&sc->sc_task, run_task, sc); 550 callout_init(&sc->scan_to, 0); 551 callout_setfunc(&sc->scan_to, run_next_scan, sc); 552 callout_init(&sc->calib_to, 0); 553 callout_setfunc(&sc->calib_to, run_calibrate_to, sc); 554 555 sc->amrr.amrr_min_success_threshold = 1; 556 sc->amrr.amrr_max_success_threshold = 10; 557 558 /* wait for the chip to settle */ 559 for (ntries = 0; ntries < 100; ntries++) { 560 if (run_read(sc, RT2860_ASIC_VER_ID, &ver) != 0) 561 return; 562 if (ver != 0 && ver != 0xffffffff) 563 break; 564 DELAY(10); 565 } 566 if (ntries == 100) { 567 aprint_error_dev(sc->sc_dev, 568 "timeout waiting for NIC to initialize\n"); 569 return; 570 } 571 sc->mac_ver = ver >> 16; 572 sc->mac_rev = ver & 0xffff; 573 574 /* retrieve RF rev. no and various other things from EEPROM */ 575 run_read_eeprom(sc); 576 577 aprint_error_dev(sc->sc_dev, 578 "MAC/BBP RT%04X (rev 0x%04X), RF %s (MIMO %dT%dR), address %s\n", 579 sc->mac_ver, sc->mac_rev, run_get_rf(sc->rf_rev), sc->ntxchains, 580 sc->nrxchains, ether_sprintf(ic->ic_myaddr)); 581 582 ic->ic_ifp = ifp; 583 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 584 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 585 ic->ic_state = IEEE80211_S_INIT; 586 587 /* set device capabilities */ 588 ic->ic_caps = 589 IEEE80211_C_MONITOR | /* monitor mode supported */ 590 #ifndef IEEE80211_STA_ONLY 591 IEEE80211_C_IBSS | /* IBSS mode supported */ 592 IEEE80211_C_HOSTAP | /* HostAP mode supported */ 593 #endif 594 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 595 IEEE80211_C_SHSLOT | /* short slot time supported */ 596 #ifdef RUN_HWCRYPTO 597 IEEE80211_C_WEP | /* WEP */ 598 IEEE80211_C_TKIP | /* TKIP */ 599 IEEE80211_C_AES_CCM | /* AES CCMP */ 600 IEEE80211_C_TKIPMIC | /* TKIPMIC */ 601 #endif 602 IEEE80211_C_WME | /* WME */ 603 IEEE80211_C_WPA; /* WPA/RSN */ 604 605 if (sc->rf_rev == RT2860_RF_2750 || 606 sc->rf_rev == RT2860_RF_2850 || 607 sc->rf_rev == RT3070_RF_3052) { 608 /* set supported .11a rates */ 609 ic->ic_sup_rates[IEEE80211_MODE_11A] = 610 ieee80211_std_rateset_11a; 611 612 /* set supported .11a channels */ 613 for (i = 14; i < (int)__arraycount(rt2860_rf2850); i++) { 614 uint8_t chan = rt2860_rf2850[i].chan; 615 ic->ic_channels[chan].ic_freq = 616 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ); 617 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A; 618 } 619 } 620 621 /* set supported .11b and .11g rates */ 622 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 623 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 624 625 /* set supported .11b and .11g channels (1 through 14) */ 626 for (i = 1; i <= 14; i++) { 627 ic->ic_channels[i].ic_freq = 628 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 629 ic->ic_channels[i].ic_flags = 630 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 631 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 632 } 633 634 ifp->if_softc = sc; 635 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 636 ifp->if_init = run_init; 637 ifp->if_ioctl = run_ioctl; 638 ifp->if_start = run_start; 639 ifp->if_watchdog = run_watchdog; 640 IFQ_SET_READY(&ifp->if_snd); 641 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 642 643 if_attach(ifp); 644 ieee80211_ifattach(ic); 645 ic->ic_node_alloc = run_node_alloc; 646 ic->ic_newassoc = run_newassoc; 647 ic->ic_updateslot = run_updateslot; 648 ic->ic_wme.wme_update = run_updateedca; 649 #ifdef RUN_HWCRYPTO 650 ic->ic_crypto.cs_key_set = run_set_key; 651 ic->ic_crypto.cs_key_delete = run_delete_key; 652 #endif 653 /* override state transition machine */ 654 sc->sc_newstate = ic->ic_newstate; 655 ic->ic_newstate = run_newstate; 656 ieee80211_media_init(ic, run_media_change, ieee80211_media_status); 657 658 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 659 sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 660 &sc->sc_drvbpf); 661 662 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 663 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 664 sc->sc_rxtap.wr_ihdr.it_present = htole32(RUN_RX_RADIOTAP_PRESENT); 665 666 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 667 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 668 sc->sc_txtap.wt_ihdr.it_present = htole32(RUN_TX_RADIOTAP_PRESENT); 669 670 ieee80211_announce(ic); 671 672 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 673 } 674 675 static int 676 run_detach(device_t self, int flags) 677 { 678 struct run_softc *sc = device_private(self); 679 struct ifnet *ifp = &sc->sc_if; 680 struct ieee80211com *ic = &sc->sc_ic; 681 int s; 682 683 if (ifp->if_softc == NULL) 684 return (0); 685 686 s = splnet(); 687 688 sc->sc_flags |= RUN_DETACHING; 689 690 if (ifp->if_flags & IFF_RUNNING) { 691 usb_rem_task(sc->sc_udev, &sc->sc_task); 692 run_stop(ifp, 0); 693 } 694 695 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 696 bpf_detach(ifp); 697 ieee80211_ifdetach(ic); 698 if_detach(ifp); 699 700 splx(s); 701 702 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 703 704 callout_destroy(&sc->scan_to); 705 callout_destroy(&sc->calib_to); 706 707 return (0); 708 } 709 710 static int 711 run_activate(device_t self, enum devact act) 712 { 713 struct run_softc *sc = device_private(self); 714 715 switch (act) { 716 case DVACT_DEACTIVATE: 717 if_deactivate(sc->sc_ic.ic_ifp); 718 return (0); 719 default: 720 return (EOPNOTSUPP); 721 } 722 } 723 724 static int 725 run_alloc_rx_ring(struct run_softc *sc) 726 { 727 struct run_rx_ring *rxq = &sc->rxq; 728 int i, error; 729 730 error = usbd_open_pipe(sc->sc_iface, rxq->pipe_no, 0, &rxq->pipeh); 731 if (error != 0) 732 goto fail; 733 734 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 735 struct run_rx_data *data = &rxq->data[i]; 736 737 data->sc = sc; /* backpointer for callbacks */ 738 739 data->xfer = usbd_alloc_xfer(sc->sc_udev); 740 if (data->xfer == NULL) { 741 error = ENOMEM; 742 goto fail; 743 } 744 data->buf = usbd_alloc_buffer(data->xfer, RUN_MAX_RXSZ); 745 if (data->buf == NULL) { 746 error = ENOMEM; 747 goto fail; 748 } 749 } 750 if (error != 0) 751 fail: run_free_rx_ring(sc); 752 return (error); 753 } 754 755 static void 756 run_free_rx_ring(struct run_softc *sc) 757 { 758 struct run_rx_ring *rxq = &sc->rxq; 759 int i; 760 761 if (rxq->pipeh != NULL) { 762 usbd_abort_pipe(rxq->pipeh); 763 usbd_close_pipe(rxq->pipeh); 764 rxq->pipeh = NULL; 765 } 766 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 767 if (rxq->data[i].xfer != NULL) 768 usbd_free_xfer(rxq->data[i].xfer); 769 rxq->data[i].xfer = NULL; 770 } 771 } 772 773 static int 774 run_alloc_tx_ring(struct run_softc *sc, int qid) 775 { 776 struct run_tx_ring *txq = &sc->txq[qid]; 777 int i, error; 778 779 txq->cur = txq->queued = 0; 780 781 error = usbd_open_pipe(sc->sc_iface, txq->pipe_no, 0, &txq->pipeh); 782 if (error != 0) 783 goto fail; 784 785 for (i = 0; i < RUN_TX_RING_COUNT; i++) { 786 struct run_tx_data *data = &txq->data[i]; 787 788 data->sc = sc; /* backpointer for callbacks */ 789 data->qid = qid; 790 791 data->xfer = usbd_alloc_xfer(sc->sc_udev); 792 if (data->xfer == NULL) { 793 error = ENOMEM; 794 goto fail; 795 } 796 data->buf = usbd_alloc_buffer(data->xfer, RUN_MAX_TXSZ); 797 if (data->buf == NULL) { 798 error = ENOMEM; 799 goto fail; 800 } 801 /* zeroize the TXD + TXWI part */ 802 memset(data->buf, 0, sizeof (struct rt2870_txd) + 803 sizeof (struct rt2860_txwi)); 804 } 805 if (error != 0) 806 fail: run_free_tx_ring(sc, qid); 807 return (error); 808 } 809 810 static void 811 run_free_tx_ring(struct run_softc *sc, int qid) 812 { 813 struct run_tx_ring *txq = &sc->txq[qid]; 814 int i; 815 816 if (txq->pipeh != NULL) { 817 usbd_abort_pipe(txq->pipeh); 818 usbd_close_pipe(txq->pipeh); 819 txq->pipeh = NULL; 820 } 821 for (i = 0; i < RUN_TX_RING_COUNT; i++) { 822 if (txq->data[i].xfer != NULL) 823 usbd_free_xfer(txq->data[i].xfer); 824 txq->data[i].xfer = NULL; 825 } 826 } 827 828 static int 829 run_load_microcode(struct run_softc *sc) 830 { 831 usb_device_request_t req; 832 const char *fwname; 833 u_char *ucode; 834 size_t size; 835 uint32_t tmp; 836 int ntries, error; 837 838 /* RT3071/RT3072 use a different firmware */ 839 if (sc->mac_ver != 0x2860 && 840 sc->mac_ver != 0x2872 && 841 sc->mac_ver != 0x3070) 842 fwname = "run-rt3071"; 843 else 844 fwname = "run-rt2870"; 845 846 if ((error = firmware_load("run", fwname, &ucode, &size)) != 0) { 847 aprint_error_dev(sc->sc_dev, 848 "error %d, could not read firmware %s\n", error, fwname); 849 return (error); 850 } 851 if (size != 4096) { 852 aprint_error_dev(sc->sc_dev, 853 "invalid firmware size (should be 4KB)\n"); 854 firmware_free(ucode, size); 855 return (EINVAL); 856 } 857 858 run_read(sc, RT2860_ASIC_VER_ID, &tmp); 859 /* write microcode image */ 860 run_write_region_1(sc, RT2870_FW_BASE, ucode, size); 861 firmware_free(ucode, size); 862 run_write(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff); 863 run_write(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff); 864 865 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 866 req.bRequest = RT2870_RESET; 867 USETW(req.wValue, 8); 868 USETW(req.wIndex, 0); 869 USETW(req.wLength, 0); 870 if ((error = usbd_do_request(sc->sc_udev, &req, NULL)) != 0) 871 return (error); 872 873 usbd_delay_ms(sc->sc_udev, 10); 874 run_write(sc, RT2860_H2M_MAILBOX, 0); 875 if ((error = run_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0)) != 0) 876 return (error); 877 878 /* wait until microcontroller is ready */ 879 for (ntries = 0; ntries < 1000; ntries++) { 880 if ((error = run_read(sc, RT2860_SYS_CTRL, &tmp)) != 0) 881 return (error); 882 if (tmp & RT2860_MCU_READY) 883 break; 884 DELAY(1000); 885 } 886 if (ntries == 1000) { 887 aprint_error_dev(sc->sc_dev, 888 "timeout waiting for MCU to initialize\n"); 889 return (ETIMEDOUT); 890 } 891 892 sc->sc_flags |= RUN_FWLOADED; 893 894 DPRINTF(("microcode successfully loaded after %d tries\n", ntries)); 895 return (0); 896 } 897 898 static int 899 run_reset(struct run_softc *sc) 900 { 901 usb_device_request_t req; 902 903 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 904 req.bRequest = RT2870_RESET; 905 USETW(req.wValue, 1); 906 USETW(req.wIndex, 0); 907 USETW(req.wLength, 0); 908 return usbd_do_request(sc->sc_udev, &req, NULL); 909 } 910 911 static int 912 run_read(struct run_softc *sc, uint16_t reg, uint32_t *val) 913 { 914 uint32_t tmp; 915 int error; 916 917 error = run_read_region_1(sc, reg, (uint8_t *)&tmp, sizeof tmp); 918 if (error == 0) 919 *val = le32toh(tmp); 920 else 921 *val = 0xffffffff; 922 return (error); 923 } 924 925 static int 926 run_read_region_1(struct run_softc *sc, uint16_t reg, uint8_t *buf, int len) 927 { 928 usb_device_request_t req; 929 930 req.bmRequestType = UT_READ_VENDOR_DEVICE; 931 req.bRequest = RT2870_READ_REGION_1; 932 USETW(req.wValue, 0); 933 USETW(req.wIndex, reg); 934 USETW(req.wLength, len); 935 return usbd_do_request(sc->sc_udev, &req, buf); 936 } 937 938 static int 939 run_write_2(struct run_softc *sc, uint16_t reg, uint16_t val) 940 { 941 usb_device_request_t req; 942 943 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 944 req.bRequest = RT2870_WRITE_2; 945 USETW(req.wValue, val); 946 USETW(req.wIndex, reg); 947 USETW(req.wLength, 0); 948 return usbd_do_request(sc->sc_udev, &req, NULL); 949 } 950 951 static int 952 run_write(struct run_softc *sc, uint16_t reg, uint32_t val) 953 { 954 int error; 955 956 if ((error = run_write_2(sc, reg, val & 0xffff)) == 0) 957 error = run_write_2(sc, reg + 2, val >> 16); 958 return (error); 959 } 960 961 static int 962 run_write_region_1(struct run_softc *sc, uint16_t reg, const uint8_t *buf, 963 int len) 964 { 965 #if 1 966 int i, error = 0; 967 /* 968 * NB: the WRITE_REGION_1 command is not stable on RT2860. 969 * We thus issue multiple WRITE_2 commands instead. 970 */ 971 KASSERT((len & 1) == 0); 972 for (i = 0; i < len && error == 0; i += 2) 973 error = run_write_2(sc, reg + i, buf[i] | buf[i + 1] << 8); 974 return (error); 975 #else 976 usb_device_request_t req; 977 978 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 979 req.bRequest = RT2870_WRITE_REGION_1; 980 USETW(req.wValue, 0); 981 USETW(req.wIndex, reg); 982 USETW(req.wLength, len); 983 return usbd_do_request(sc->sc_udev, &req, buf); 984 #endif 985 } 986 987 static int 988 run_set_region_4(struct run_softc *sc, uint16_t reg, uint32_t val, int count) 989 { 990 int error = 0; 991 992 for (; count > 0 && error == 0; count--, reg += 4) 993 error = run_write(sc, reg, val); 994 return (error); 995 } 996 997 /* Read 16-bit from eFUSE ROM (RT3070 only.) */ 998 static int 999 run_efuse_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 1000 { 1001 uint32_t tmp; 1002 uint16_t reg; 1003 int error, ntries; 1004 1005 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1006 return (error); 1007 1008 addr *= 2; 1009 /*- 1010 * Read one 16-byte block into registers EFUSE_DATA[0-3]: 1011 * DATA0: F E D C 1012 * DATA1: B A 9 8 1013 * DATA2: 7 6 5 4 1014 * DATA3: 3 2 1 0 1015 */ 1016 tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK); 1017 tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK; 1018 run_write(sc, RT3070_EFUSE_CTRL, tmp); 1019 for (ntries = 0; ntries < 100; ntries++) { 1020 if ((error = run_read(sc, RT3070_EFUSE_CTRL, &tmp)) != 0) 1021 return (error); 1022 if (!(tmp & RT3070_EFSROM_KICK)) 1023 break; 1024 DELAY(2); 1025 } 1026 if (ntries == 100) 1027 return (ETIMEDOUT); 1028 1029 if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK) { 1030 *val = 0xffff; /* address not found */ 1031 return (0); 1032 } 1033 /* determine to which 32-bit register our 16-bit word belongs */ 1034 reg = RT3070_EFUSE_DATA3 - (addr & 0xc); 1035 if ((error = run_read(sc, reg, &tmp)) != 0) 1036 return (error); 1037 1038 *val = (addr & 2) ? tmp >> 16 : tmp & 0xffff; 1039 return (0); 1040 } 1041 1042 static int 1043 run_eeprom_read_2(struct run_softc *sc, uint16_t addr, uint16_t *val) 1044 { 1045 usb_device_request_t req; 1046 uint16_t tmp; 1047 int error; 1048 1049 addr *= 2; 1050 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1051 req.bRequest = RT2870_EEPROM_READ; 1052 USETW(req.wValue, 0); 1053 USETW(req.wIndex, addr); 1054 USETW(req.wLength, sizeof tmp); 1055 error = usbd_do_request(sc->sc_udev, &req, &tmp); 1056 if (error == 0) 1057 *val = le16toh(tmp); 1058 else 1059 *val = 0xffff; 1060 return (error); 1061 } 1062 1063 static __inline int 1064 run_srom_read(struct run_softc *sc, uint16_t addr, uint16_t *val) 1065 { 1066 1067 /* either eFUSE ROM or EEPROM */ 1068 return sc->sc_srom_read(sc, addr, val); 1069 } 1070 1071 static int 1072 run_rt2870_rf_write(struct run_softc *sc, uint8_t reg, uint32_t val) 1073 { 1074 uint32_t tmp; 1075 int error, ntries; 1076 1077 for (ntries = 0; ntries < 10; ntries++) { 1078 if ((error = run_read(sc, RT2860_RF_CSR_CFG0, &tmp)) != 0) 1079 return (error); 1080 if (!(tmp & RT2860_RF_REG_CTRL)) 1081 break; 1082 } 1083 if (ntries == 10) 1084 return (ETIMEDOUT); 1085 1086 /* RF registers are 24-bit on the RT2860 */ 1087 tmp = RT2860_RF_REG_CTRL | 24 << RT2860_RF_REG_WIDTH_SHIFT | 1088 (val & 0x3fffff) << 2 | (reg & 3); 1089 return run_write(sc, RT2860_RF_CSR_CFG0, tmp); 1090 } 1091 1092 static int 1093 run_rt3070_rf_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1094 { 1095 uint32_t tmp; 1096 int error, ntries; 1097 1098 for (ntries = 0; ntries < 100; ntries++) { 1099 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1100 return (error); 1101 if (!(tmp & RT3070_RF_KICK)) 1102 break; 1103 } 1104 if (ntries == 100) 1105 return (ETIMEDOUT); 1106 1107 tmp = RT3070_RF_KICK | reg << 8; 1108 if ((error = run_write(sc, RT3070_RF_CSR_CFG, tmp)) != 0) 1109 return (error); 1110 1111 for (ntries = 0; ntries < 100; ntries++) { 1112 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1113 return (error); 1114 if (!(tmp & RT3070_RF_KICK)) 1115 break; 1116 } 1117 if (ntries == 100) 1118 return (ETIMEDOUT); 1119 1120 *val = tmp & 0xff; 1121 return (0); 1122 } 1123 1124 static int 1125 run_rt3070_rf_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1126 { 1127 uint32_t tmp; 1128 int error, ntries; 1129 1130 for (ntries = 0; ntries < 10; ntries++) { 1131 if ((error = run_read(sc, RT3070_RF_CSR_CFG, &tmp)) != 0) 1132 return (error); 1133 if (!(tmp & RT3070_RF_KICK)) 1134 break; 1135 } 1136 if (ntries == 10) 1137 return (ETIMEDOUT); 1138 1139 tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val; 1140 return run_write(sc, RT3070_RF_CSR_CFG, tmp); 1141 } 1142 1143 static int 1144 run_bbp_read(struct run_softc *sc, uint8_t reg, uint8_t *val) 1145 { 1146 uint32_t tmp; 1147 int ntries, error; 1148 1149 for (ntries = 0; ntries < 10; ntries++) { 1150 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1151 return (error); 1152 if (!(tmp & RT2860_BBP_CSR_KICK)) 1153 break; 1154 } 1155 if (ntries == 10) 1156 return (ETIMEDOUT); 1157 1158 tmp = RT2860_BBP_CSR_READ | RT2860_BBP_CSR_KICK | reg << 8; 1159 if ((error = run_write(sc, RT2860_BBP_CSR_CFG, tmp)) != 0) 1160 return (error); 1161 1162 for (ntries = 0; ntries < 10; ntries++) { 1163 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1164 return (error); 1165 if (!(tmp & RT2860_BBP_CSR_KICK)) 1166 break; 1167 } 1168 if (ntries == 10) 1169 return (ETIMEDOUT); 1170 1171 *val = tmp & 0xff; 1172 return (0); 1173 } 1174 1175 static int 1176 run_bbp_write(struct run_softc *sc, uint8_t reg, uint8_t val) 1177 { 1178 uint32_t tmp; 1179 int ntries, error; 1180 1181 for (ntries = 0; ntries < 10; ntries++) { 1182 if ((error = run_read(sc, RT2860_BBP_CSR_CFG, &tmp)) != 0) 1183 return (error); 1184 if (!(tmp & RT2860_BBP_CSR_KICK)) 1185 break; 1186 } 1187 if (ntries == 10) 1188 return (ETIMEDOUT); 1189 1190 tmp = RT2860_BBP_CSR_KICK | reg << 8 | val; 1191 return run_write(sc, RT2860_BBP_CSR_CFG, tmp); 1192 } 1193 1194 /* 1195 * Send a command to the 8051 microcontroller unit. 1196 */ 1197 static int 1198 run_mcu_cmd(struct run_softc *sc, uint8_t cmd, uint16_t arg) 1199 { 1200 uint32_t tmp; 1201 int error, ntries; 1202 1203 for (ntries = 0; ntries < 100; ntries++) { 1204 if ((error = run_read(sc, RT2860_H2M_MAILBOX, &tmp)) != 0) 1205 return (error); 1206 if (!(tmp & RT2860_H2M_BUSY)) 1207 break; 1208 } 1209 if (ntries == 100) 1210 return (ETIMEDOUT); 1211 1212 tmp = RT2860_H2M_BUSY | RT2860_TOKEN_NO_INTR << 16 | arg; 1213 if ((error = run_write(sc, RT2860_H2M_MAILBOX, tmp)) == 0) 1214 error = run_write(sc, RT2860_HOST_CMD, cmd); 1215 return (error); 1216 } 1217 1218 /* 1219 * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word. 1220 * Used to adjust per-rate Tx power registers. 1221 */ 1222 static __inline uint32_t 1223 b4inc(uint32_t b32, int8_t delta) 1224 { 1225 int8_t i, b4; 1226 1227 for (i = 0; i < 8; i++) { 1228 b4 = b32 & 0xf; 1229 b4 += delta; 1230 if (b4 < 0) 1231 b4 = 0; 1232 else if (b4 > 0xf) 1233 b4 = 0xf; 1234 b32 = b32 >> 4 | b4 << 28; 1235 } 1236 return (b32); 1237 } 1238 1239 static const char * 1240 run_get_rf(int rev) 1241 { 1242 switch (rev) { 1243 case RT2860_RF_2820: return "RT2820"; 1244 case RT2860_RF_2850: return "RT2850"; 1245 case RT2860_RF_2720: return "RT2720"; 1246 case RT2860_RF_2750: return "RT2750"; 1247 case RT3070_RF_3020: return "RT3020"; 1248 case RT3070_RF_2020: return "RT2020"; 1249 case RT3070_RF_3021: return "RT3021"; 1250 case RT3070_RF_3022: return "RT3022"; 1251 case RT3070_RF_3052: return "RT3052"; 1252 } 1253 return "unknown"; 1254 } 1255 1256 static int 1257 run_read_eeprom(struct run_softc *sc) 1258 { 1259 struct ieee80211com *ic = &sc->sc_ic; 1260 int8_t delta_2ghz, delta_5ghz; 1261 uint32_t tmp; 1262 uint16_t val; 1263 int ridx, ant, i; 1264 1265 /* check whether the ROM is eFUSE ROM or EEPROM */ 1266 sc->sc_srom_read = run_eeprom_read_2; 1267 if (sc->mac_ver >= 0x3070) { 1268 run_read(sc, RT3070_EFUSE_CTRL, &tmp); 1269 DPRINTF(("EFUSE_CTRL=0x%08x\n", tmp)); 1270 if (tmp & RT3070_SEL_EFUSE) 1271 sc->sc_srom_read = run_efuse_read_2; 1272 } 1273 1274 /* read ROM version */ 1275 run_srom_read(sc, RT2860_EEPROM_VERSION, &val); 1276 DPRINTF(("EEPROM rev=%d, FAE=%d\n", val & 0xff, val >> 8)); 1277 1278 /* read MAC address */ 1279 run_srom_read(sc, RT2860_EEPROM_MAC01, &val); 1280 ic->ic_myaddr[0] = val & 0xff; 1281 ic->ic_myaddr[1] = val >> 8; 1282 run_srom_read(sc, RT2860_EEPROM_MAC23, &val); 1283 ic->ic_myaddr[2] = val & 0xff; 1284 ic->ic_myaddr[3] = val >> 8; 1285 run_srom_read(sc, RT2860_EEPROM_MAC45, &val); 1286 ic->ic_myaddr[4] = val & 0xff; 1287 ic->ic_myaddr[5] = val >> 8; 1288 1289 /* read vendor BBP settings */ 1290 for (i = 0; i < 10; i++) { 1291 run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val); 1292 sc->bbp[i].val = val & 0xff; 1293 sc->bbp[i].reg = val >> 8; 1294 DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val)); 1295 } 1296 if (sc->mac_ver >= 0x3071) { 1297 /* read vendor RF settings */ 1298 for (i = 0; i < 10; i++) { 1299 run_srom_read(sc, RT3071_EEPROM_RF_BASE + i, &val); 1300 sc->rf[i].val = val & 0xff; 1301 sc->rf[i].reg = val >> 8; 1302 DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg, 1303 sc->rf[i].val)); 1304 } 1305 } 1306 1307 /* read RF frequency offset from EEPROM */ 1308 run_srom_read(sc, RT2860_EEPROM_FREQ_LEDS, &val); 1309 sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0; 1310 DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff)); 1311 1312 if ((val >> 8) != 0xff) { 1313 /* read LEDs operating mode */ 1314 sc->leds = val >> 8; 1315 run_srom_read(sc, RT2860_EEPROM_LED1, &sc->led[0]); 1316 run_srom_read(sc, RT2860_EEPROM_LED2, &sc->led[1]); 1317 run_srom_read(sc, RT2860_EEPROM_LED3, &sc->led[2]); 1318 } else { 1319 /* broken EEPROM, use default settings */ 1320 sc->leds = 0x01; 1321 sc->led[0] = 0x5555; 1322 sc->led[1] = 0x2221; 1323 sc->led[2] = 0x5627; /* differs from RT2860 */ 1324 } 1325 DPRINTF(("EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n", 1326 sc->leds, sc->led[0], sc->led[1], sc->led[2])); 1327 1328 /* read RF information */ 1329 run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val); 1330 if (val == 0xffff) { 1331 DPRINTF(("invalid EEPROM antenna info, using default\n")); 1332 if (sc->mac_ver == 0x3572) { 1333 /* default to RF3052 2T2R */ 1334 sc->rf_rev = RT3070_RF_3052; 1335 sc->ntxchains = 2; 1336 sc->nrxchains = 2; 1337 } else if (sc->mac_ver >= 0x3070) { 1338 /* default to RF3020 1T1R */ 1339 sc->rf_rev = RT3070_RF_3020; 1340 sc->ntxchains = 1; 1341 sc->nrxchains = 1; 1342 } else { 1343 /* default to RF2820 1T2R */ 1344 sc->rf_rev = RT2860_RF_2820; 1345 sc->ntxchains = 1; 1346 sc->nrxchains = 2; 1347 } 1348 } else { 1349 sc->rf_rev = (val >> 8) & 0xf; 1350 sc->ntxchains = (val >> 4) & 0xf; 1351 sc->nrxchains = val & 0xf; 1352 } 1353 DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n", 1354 sc->rf_rev, sc->ntxchains, sc->nrxchains)); 1355 1356 run_srom_read(sc, RT2860_EEPROM_CONFIG, &val); 1357 DPRINTF(("EEPROM CFG 0x%04x\n", val)); 1358 /* check if driver should patch the DAC issue */ 1359 if ((val >> 8) != 0xff) 1360 sc->patch_dac = (val >> 15) & 1; 1361 if ((val & 0xff) != 0xff) { 1362 sc->ext_5ghz_lna = (val >> 3) & 1; 1363 sc->ext_2ghz_lna = (val >> 2) & 1; 1364 /* check if RF supports automatic Tx access gain control */ 1365 sc->calib_2ghz = sc->calib_5ghz = (val >> 1) & 1; 1366 /* check if we have a hardware radio switch */ 1367 sc->rfswitch = val & 1; 1368 } 1369 1370 /* read power settings for 2GHz channels */ 1371 for (i = 0; i < 14; i += 2) { 1372 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2, &val); 1373 sc->txpow1[i + 0] = (int8_t)(val & 0xff); 1374 sc->txpow1[i + 1] = (int8_t)(val >> 8); 1375 1376 run_srom_read(sc, RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2, &val); 1377 sc->txpow2[i + 0] = (int8_t)(val & 0xff); 1378 sc->txpow2[i + 1] = (int8_t)(val >> 8); 1379 } 1380 /* fix broken Tx power entries */ 1381 for (i = 0; i < 14; i++) { 1382 if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31) 1383 sc->txpow1[i] = 5; 1384 if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31) 1385 sc->txpow2[i] = 5; 1386 DPRINTF(("chan %d: power1=%d, power2=%d\n", 1387 rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i])); 1388 } 1389 /* read power settings for 5GHz channels */ 1390 for (i = 0; i < 40; i += 2) { 1391 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2, &val); 1392 sc->txpow1[i + 14] = (int8_t)(val & 0xff); 1393 sc->txpow1[i + 15] = (int8_t)(val >> 8); 1394 1395 run_srom_read(sc, RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2, &val); 1396 sc->txpow2[i + 14] = (int8_t)(val & 0xff); 1397 sc->txpow2[i + 15] = (int8_t)(val >> 8); 1398 } 1399 /* fix broken Tx power entries */ 1400 for (i = 0; i < 40; i++) { 1401 if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15) 1402 sc->txpow1[14 + i] = 5; 1403 if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15) 1404 sc->txpow2[14 + i] = 5; 1405 DPRINTF(("chan %d: power1=%d, power2=%d\n", 1406 rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i], 1407 sc->txpow2[14 + i])); 1408 } 1409 1410 /* read Tx power compensation for each Tx rate */ 1411 run_srom_read(sc, RT2860_EEPROM_DELTAPWR, &val); 1412 delta_2ghz = delta_5ghz = 0; 1413 if ((val & 0xff) != 0xff && (val & 0x80)) { 1414 delta_2ghz = val & 0xf; 1415 if (!(val & 0x40)) /* negative number */ 1416 delta_2ghz = -delta_2ghz; 1417 } 1418 val >>= 8; 1419 if ((val & 0xff) != 0xff && (val & 0x80)) { 1420 delta_5ghz = val & 0xf; 1421 if (!(val & 0x40)) /* negative number */ 1422 delta_5ghz = -delta_5ghz; 1423 } 1424 DPRINTF(("power compensation=%d (2GHz), %d (5GHz)\n", 1425 delta_2ghz, delta_5ghz)); 1426 1427 for (ridx = 0; ridx < 5; ridx++) { 1428 uint32_t reg; 1429 1430 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2, &val); 1431 reg = val; 1432 run_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1, &val); 1433 reg |= (uint32_t)val << 16; 1434 1435 sc->txpow20mhz[ridx] = reg; 1436 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz); 1437 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz); 1438 1439 DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, " 1440 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx], 1441 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx])); 1442 } 1443 1444 /* read RSSI offsets and LNA gains from EEPROM */ 1445 run_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ, &val); 1446 sc->rssi_2ghz[0] = val & 0xff; /* Ant A */ 1447 sc->rssi_2ghz[1] = val >> 8; /* Ant B */ 1448 run_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ, &val); 1449 if (sc->mac_ver >= 0x3070) { 1450 /* 1451 * On RT3070 chips (limited to 2 Rx chains), this ROM 1452 * field contains the Tx mixer gain for the 2GHz band. 1453 */ 1454 if ((val & 0xff) != 0xff) 1455 sc->txmixgain_2ghz = val & 0x7; 1456 DPRINTF(("tx mixer gain=%u (2GHz)\n", sc->txmixgain_2ghz)); 1457 } else { 1458 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */ 1459 } 1460 sc->lna[2] = val >> 8; /* channel group 2 */ 1461 1462 run_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ, &val); 1463 sc->rssi_5ghz[0] = val & 0xff; /* Ant A */ 1464 sc->rssi_5ghz[1] = val >> 8; /* Ant B */ 1465 run_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ, &val); 1466 if (sc->mac_ver == 0x3572) { 1467 /* 1468 * On RT3572 chips (limited to 2 Rx chains), this ROM 1469 * field contains the Tx mixer gain for the 5GHz band. 1470 */ 1471 if ((val & 0xff) != 0xff) 1472 sc->txmixgain_5ghz = val & 0x7; 1473 DPRINTF(("tx mixer gain=%u (5GHz)\n", sc->txmixgain_5ghz)); 1474 } else { 1475 sc->rssi_5ghz[2] = val & 0xff; /* Ant C */ 1476 } 1477 sc->lna[3] = val >> 8; /* channel group 3 */ 1478 1479 run_srom_read(sc, RT2860_EEPROM_LNA, &val); 1480 sc->lna[0] = val & 0xff; /* channel group 0 */ 1481 sc->lna[1] = val >> 8; /* channel group 1 */ 1482 1483 /* fix broken 5GHz LNA entries */ 1484 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) { 1485 DPRINTF(("invalid LNA for channel group %d\n", 2)); 1486 sc->lna[2] = sc->lna[1]; 1487 } 1488 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) { 1489 DPRINTF(("invalid LNA for channel group %d\n", 3)); 1490 sc->lna[3] = sc->lna[1]; 1491 } 1492 1493 /* fix broken RSSI offset entries */ 1494 for (ant = 0; ant < 3; ant++) { 1495 if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) { 1496 DPRINTF(("invalid RSSI%d offset: %d (2GHz)\n", 1497 ant + 1, sc->rssi_2ghz[ant])); 1498 sc->rssi_2ghz[ant] = 0; 1499 } 1500 if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) { 1501 DPRINTF(("invalid RSSI%d offset: %d (5GHz)\n", 1502 ant + 1, sc->rssi_5ghz[ant])); 1503 sc->rssi_5ghz[ant] = 0; 1504 } 1505 } 1506 return (0); 1507 } 1508 1509 static struct ieee80211_node * 1510 run_node_alloc(struct ieee80211_node_table *nt) 1511 { 1512 struct run_node *rn = 1513 malloc(sizeof (struct run_node), M_DEVBUF, M_NOWAIT | M_ZERO); 1514 return (rn) ? &rn->ni : NULL; 1515 } 1516 1517 static int 1518 run_media_change(struct ifnet *ifp) 1519 { 1520 struct run_softc *sc = ifp->if_softc; 1521 struct ieee80211com *ic = &sc->sc_ic; 1522 uint8_t rate, ridx; 1523 int error; 1524 1525 error = ieee80211_media_change(ifp); 1526 if (error != ENETRESET) 1527 return (error); 1528 1529 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1530 rate = ic->ic_sup_rates[ic->ic_curmode]. 1531 rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL; 1532 for (ridx = 0; ridx <= RT2860_RIDX_MAX; ridx++) 1533 if (rt2860_rates[ridx].rate == rate) 1534 break; 1535 sc->fixed_ridx = ridx; 1536 } 1537 1538 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 1539 run_init(ifp); 1540 1541 return (0); 1542 } 1543 1544 static void 1545 run_next_scan(void *arg) 1546 { 1547 struct run_softc *sc = arg; 1548 1549 if (sc->sc_ic.ic_state == IEEE80211_S_SCAN) 1550 ieee80211_next_scan(&sc->sc_ic); 1551 } 1552 1553 static void 1554 run_task(void *arg) 1555 { 1556 struct run_softc *sc = arg; 1557 struct run_host_cmd_ring *ring = &sc->cmdq; 1558 struct run_host_cmd *cmd; 1559 int s; 1560 1561 /* process host commands */ 1562 s = splusb(); 1563 while (ring->next != ring->cur) { 1564 cmd = &ring->cmd[ring->next]; 1565 splx(s); 1566 /* callback */ 1567 cmd->cb(sc, cmd->data); 1568 s = splusb(); 1569 ring->queued--; 1570 ring->next = (ring->next + 1) % RUN_HOST_CMD_RING_COUNT; 1571 } 1572 wakeup(ring); 1573 splx(s); 1574 } 1575 1576 static void 1577 run_do_async(struct run_softc *sc, void (*cb)(struct run_softc *, void *), 1578 void *arg, int len) 1579 { 1580 struct run_host_cmd_ring *ring = &sc->cmdq; 1581 struct run_host_cmd *cmd; 1582 int s; 1583 1584 if (sc->sc_flags & RUN_DETACHING) 1585 return; 1586 1587 s = splusb(); 1588 cmd = &ring->cmd[ring->cur]; 1589 cmd->cb = cb; 1590 KASSERT(len <= sizeof (cmd->data)); 1591 memcpy(cmd->data, arg, len); 1592 ring->cur = (ring->cur + 1) % RUN_HOST_CMD_RING_COUNT; 1593 1594 /* if there is no pending command already, schedule a task */ 1595 if (++ring->queued == 1) 1596 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 1597 splx(s); 1598 } 1599 1600 static int 1601 run_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1602 { 1603 struct run_softc *sc = ic->ic_ifp->if_softc; 1604 struct run_cmd_newstate cmd; 1605 1606 callout_stop(&sc->scan_to); 1607 callout_stop(&sc->calib_to); 1608 1609 /* do it in a process context */ 1610 cmd.state = nstate; 1611 cmd.arg = arg; 1612 run_do_async(sc, run_newstate_cb, &cmd, sizeof cmd); 1613 return (0); 1614 } 1615 1616 static void 1617 run_newstate_cb(struct run_softc *sc, void *arg) 1618 { 1619 struct run_cmd_newstate *cmd = arg; 1620 struct ifnet *ifp = &sc->sc_if; 1621 struct ieee80211com *ic = &sc->sc_ic; 1622 enum ieee80211_state ostate; 1623 struct ieee80211_node *ni; 1624 uint32_t tmp, sta[3]; 1625 uint8_t wcid; 1626 int s; 1627 1628 s = splnet(); 1629 ostate = ic->ic_state; 1630 1631 if (ostate == IEEE80211_S_RUN) { 1632 /* turn link LED off */ 1633 run_set_leds(sc, RT2860_LED_RADIO); 1634 } 1635 1636 switch (cmd->state) { 1637 case IEEE80211_S_INIT: 1638 if (ostate == IEEE80211_S_RUN) { 1639 /* abort TSF synchronization */ 1640 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 1641 run_write(sc, RT2860_BCN_TIME_CFG, 1642 tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 1643 RT2860_TBTT_TIMER_EN)); 1644 } 1645 break; 1646 1647 case IEEE80211_S_SCAN: 1648 run_set_chan(sc, ic->ic_curchan); 1649 callout_schedule(&sc->scan_to, hz / 5); 1650 break; 1651 1652 case IEEE80211_S_AUTH: 1653 case IEEE80211_S_ASSOC: 1654 run_set_chan(sc, ic->ic_curchan); 1655 break; 1656 1657 case IEEE80211_S_RUN: 1658 run_set_chan(sc, ic->ic_curchan); 1659 1660 ni = ic->ic_bss; 1661 1662 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1663 run_updateslot(ifp); 1664 run_enable_mrr(sc); 1665 run_set_txpreamble(sc); 1666 run_set_basicrates(sc); 1667 run_set_bssid(sc, ni->ni_bssid); 1668 } 1669 #ifndef IEEE80211_STA_ONLY 1670 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 1671 ic->ic_opmode == IEEE80211_M_IBSS) 1672 (void)run_setup_beacon(sc); 1673 #endif 1674 if (ic->ic_opmode == IEEE80211_M_STA) { 1675 /* add BSS entry to the WCID table */ 1676 wcid = RUN_AID2WCID(ni->ni_associd); 1677 run_write_region_1(sc, RT2860_WCID_ENTRY(wcid), 1678 ni->ni_macaddr, IEEE80211_ADDR_LEN); 1679 1680 /* fake a join to init the tx rate */ 1681 run_newassoc(ni, 1); 1682 } 1683 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 1684 run_enable_tsf_sync(sc); 1685 1686 /* clear statistic registers used by AMRR */ 1687 run_read_region_1(sc, RT2860_TX_STA_CNT0, 1688 (uint8_t *)sta, sizeof sta); 1689 /* start calibration timer */ 1690 callout_schedule(&sc->calib_to, hz); 1691 } 1692 1693 /* turn link LED on */ 1694 run_set_leds(sc, RT2860_LED_RADIO | 1695 (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan) ? 1696 RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ)); 1697 break; 1698 } 1699 (void)sc->sc_newstate(ic, cmd->state, cmd->arg); 1700 splx(s); 1701 } 1702 1703 static int 1704 run_updateedca(struct ieee80211com *ic) 1705 { 1706 1707 /* do it in a process context */ 1708 run_do_async(ic->ic_ifp->if_softc, run_updateedca_cb, NULL, 0); 1709 return (0); 1710 } 1711 1712 /* ARGSUSED */ 1713 static void 1714 run_updateedca_cb(struct run_softc *sc, void *arg) 1715 { 1716 struct ieee80211com *ic = &sc->sc_ic; 1717 int s, aci; 1718 1719 s = splnet(); 1720 /* update MAC TX configuration registers */ 1721 for (aci = 0; aci < WME_NUM_AC; aci++) { 1722 run_write(sc, RT2860_EDCA_AC_CFG(aci), 1723 ic->ic_wme.wme_params[aci].wmep_logcwmax << 16 | 1724 ic->ic_wme.wme_params[aci].wmep_logcwmin << 12 | 1725 ic->ic_wme.wme_params[aci].wmep_aifsn << 8 | 1726 ic->ic_wme.wme_params[aci].wmep_txopLimit); 1727 } 1728 1729 /* update SCH/DMA registers too */ 1730 run_write(sc, RT2860_WMM_AIFSN_CFG, 1731 ic->ic_wme.wme_params[WME_AC_VO].wmep_aifsn << 12 | 1732 ic->ic_wme.wme_params[WME_AC_VI].wmep_aifsn << 8 | 1733 ic->ic_wme.wme_params[WME_AC_BK].wmep_aifsn << 4 | 1734 ic->ic_wme.wme_params[WME_AC_BE].wmep_aifsn); 1735 run_write(sc, RT2860_WMM_CWMIN_CFG, 1736 ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmin << 12 | 1737 ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmin << 8 | 1738 ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmin << 4 | 1739 ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmin); 1740 run_write(sc, RT2860_WMM_CWMAX_CFG, 1741 ic->ic_wme.wme_params[WME_AC_VO].wmep_logcwmax << 12 | 1742 ic->ic_wme.wme_params[WME_AC_VI].wmep_logcwmax << 8 | 1743 ic->ic_wme.wme_params[WME_AC_BK].wmep_logcwmax << 4 | 1744 ic->ic_wme.wme_params[WME_AC_BE].wmep_logcwmax); 1745 run_write(sc, RT2860_WMM_TXOP0_CFG, 1746 ic->ic_wme.wme_params[WME_AC_BK].wmep_txopLimit << 16 | 1747 ic->ic_wme.wme_params[WME_AC_BE].wmep_txopLimit); 1748 run_write(sc, RT2860_WMM_TXOP1_CFG, 1749 ic->ic_wme.wme_params[WME_AC_VO].wmep_txopLimit << 16 | 1750 ic->ic_wme.wme_params[WME_AC_VI].wmep_txopLimit); 1751 splx(s); 1752 } 1753 1754 #ifdef RUN_HWCRYPTO 1755 static int 1756 run_set_key(struct ieee80211com *ic, const struct ieee80211_key *k, 1757 const uint8_t *mac) 1758 { 1759 struct run_softc *sc = ic->ic_ifp->if_softc; 1760 struct ieee80211_node *ni = ic->ic_bss; 1761 struct run_cmd_key cmd; 1762 1763 /* do it in a process context */ 1764 cmd.key = *k; 1765 cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1766 run_do_async(sc, run_set_key_cb, &cmd, sizeof cmd); 1767 return 1; 1768 } 1769 1770 static void 1771 run_set_key_cb(struct run_softc *sc, void *arg) 1772 { 1773 #ifndef IEEE80211_STA_ONLY 1774 struct ieee80211com *ic = &sc->sc_ic; 1775 #endif 1776 struct run_cmd_key *cmd = arg; 1777 struct ieee80211_key *k = &cmd->key; 1778 uint32_t attr; 1779 uint16_t base; 1780 uint8_t mode, wcid, iv[8]; 1781 1782 /* map net80211 cipher to RT2860 security mode */ 1783 switch (k->wk_cipher->ic_cipher) { 1784 case IEEE80211_CIPHER_WEP: 1785 k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1786 if (k->wk_keylen == 5) 1787 mode = RT2860_MODE_WEP40; 1788 else 1789 mode = RT2860_MODE_WEP104; 1790 break; 1791 case IEEE80211_CIPHER_TKIP: 1792 mode = RT2860_MODE_TKIP; 1793 break; 1794 case IEEE80211_CIPHER_AES_CCM: 1795 mode = RT2860_MODE_AES_CCMP; 1796 break; 1797 default: 1798 return; 1799 } 1800 1801 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1802 wcid = 0; /* NB: update WCID0 for group keys */ 1803 base = RT2860_SKEY(0, k->wk_keyix); 1804 } else { 1805 wcid = RUN_AID2WCID(cmd->associd); 1806 base = RT2860_PKEY(wcid); 1807 } 1808 1809 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1810 run_write_region_1(sc, base, k->wk_key, 16); 1811 #ifndef IEEE80211_STA_ONLY 1812 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 1813 run_write_region_1(sc, base + 16, &k->wk_key[16], 8); 1814 run_write_region_1(sc, base + 24, &k->wk_key[24], 8); 1815 } else 1816 #endif 1817 { 1818 run_write_region_1(sc, base + 16, &k->wk_key[24], 8); 1819 run_write_region_1(sc, base + 24, &k->wk_key[16], 8); 1820 } 1821 } else { 1822 /* roundup len to 16-bit: XXX fix write_region_1() instead */ 1823 run_write_region_1(sc, base, k->wk_key, 1824 (k->wk_keylen + 1) & ~1); 1825 } 1826 1827 if (!(k->wk_flags & IEEE80211_KEY_GROUP) || 1828 (k->wk_flags & IEEE80211_KEY_XMIT)) { 1829 /* set initial packet number in IV+EIV */ 1830 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) { 1831 memset(iv, 0, sizeof iv); 1832 iv[3] = sc->sc_ic.ic_crypto.cs_def_txkey << 6; 1833 } else { 1834 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) { 1835 iv[0] = k->wk_keytsc >> 8; 1836 iv[1] = (iv[0] | 0x20) & 0x7f; 1837 iv[2] = k->wk_keytsc; 1838 } else /* CCMP */ { 1839 iv[0] = k->wk_keytsc; 1840 iv[1] = k->wk_keytsc >> 8; 1841 iv[2] = 0; 1842 } 1843 iv[3] = k->wk_keyix << 6 | IEEE80211_WEP_EXTIV; 1844 iv[4] = k->wk_keytsc >> 16; 1845 iv[5] = k->wk_keytsc >> 24; 1846 iv[6] = k->wk_keytsc >> 32; 1847 iv[7] = k->wk_keytsc >> 40; 1848 } 1849 run_write_region_1(sc, RT2860_IVEIV(wcid), iv, 8); 1850 } 1851 1852 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1853 /* install group key */ 1854 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1855 attr &= ~(0xf << (k->wk_keyix * 4)); 1856 attr |= mode << (k->wk_keyix * 4); 1857 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1858 } else { 1859 /* install pairwise key */ 1860 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1861 attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN; 1862 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1863 } 1864 } 1865 1866 static int 1867 run_delete_key(struct ieee80211com *ic, const struct ieee80211_key *k) 1868 { 1869 struct run_softc *sc = ic->ic_ifp->if_softc; 1870 struct ieee80211_node *ni = ic->ic_bss; 1871 struct run_cmd_key cmd; 1872 1873 /* do it in a process context */ 1874 cmd.key = *k; 1875 cmd.associd = (ni != NULL) ? ni->ni_associd : 0; 1876 run_do_async(sc, run_delete_key_cb, &cmd, sizeof cmd); 1877 return 1; 1878 } 1879 1880 static void 1881 run_delete_key_cb(struct run_softc *sc, void *arg) 1882 { 1883 struct run_cmd_key *cmd = arg; 1884 struct ieee80211_key *k = &cmd->key; 1885 uint32_t attr; 1886 uint8_t wcid; 1887 1888 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) 1889 k->wk_flags |= IEEE80211_KEY_GROUP; /* XXX */ 1890 1891 if (k->wk_flags & IEEE80211_KEY_GROUP) { 1892 /* remove group key */ 1893 run_read(sc, RT2860_SKEY_MODE_0_7, &attr); 1894 attr &= ~(0xf << (k->wk_keyix * 4)); 1895 run_write(sc, RT2860_SKEY_MODE_0_7, attr); 1896 1897 } else { 1898 /* remove pairwise key */ 1899 wcid = RUN_AID2WCID(cmd->associd); 1900 run_read(sc, RT2860_WCID_ATTR(wcid), &attr); 1901 attr &= ~0xf; 1902 run_write(sc, RT2860_WCID_ATTR(wcid), attr); 1903 } 1904 } 1905 #endif 1906 1907 static void 1908 run_calibrate_to(void *arg) 1909 { 1910 1911 /* do it in a process context */ 1912 run_do_async(arg, run_calibrate_cb, NULL, 0); 1913 /* next timeout will be rescheduled in the calibration task */ 1914 } 1915 1916 /* ARGSUSED */ 1917 static void 1918 run_calibrate_cb(struct run_softc *sc, void *arg) 1919 { 1920 struct ifnet *ifp = &sc->sc_if; 1921 uint32_t sta[3]; 1922 int s, error; 1923 1924 /* read statistic counters (clear on read) and update AMRR state */ 1925 error = run_read_region_1(sc, RT2860_TX_STA_CNT0, (uint8_t *)sta, 1926 sizeof sta); 1927 if (error != 0) 1928 goto skip; 1929 1930 DPRINTF(("retrycnt=%d txcnt=%d failcnt=%d\n", 1931 le32toh(sta[1]) >> 16, le32toh(sta[1]) & 0xffff, 1932 le32toh(sta[0]) & 0xffff)); 1933 1934 s = splnet(); 1935 /* count failed TX as errors */ 1936 ifp->if_oerrors += le32toh(sta[0]) & 0xffff; 1937 1938 sc->amn.amn_retrycnt = 1939 (le32toh(sta[0]) & 0xffff) + /* failed TX count */ 1940 (le32toh(sta[1]) >> 16); /* TX retransmission count */ 1941 1942 sc->amn.amn_txcnt = 1943 sc->amn.amn_retrycnt + 1944 (le32toh(sta[1]) & 0xffff); /* successful TX count */ 1945 1946 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 1947 splx(s); 1948 1949 skip: callout_schedule(&sc->calib_to, hz); 1950 } 1951 1952 static void 1953 run_newassoc(struct ieee80211_node *ni, int isnew) 1954 { 1955 struct run_softc *sc = ni->ni_ic->ic_ifp->if_softc; 1956 struct run_node *rn = (void *)ni; 1957 struct ieee80211_rateset *rs = &ni->ni_rates; 1958 uint8_t rate; 1959 int ridx, i, j; 1960 1961 DPRINTF(("new assoc isnew=%d addr=%s\n", 1962 isnew, ether_sprintf(ni->ni_macaddr))); 1963 1964 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 1965 /* start at lowest available bit-rate, AMRR will raise */ 1966 ni->ni_txrate = 0; 1967 1968 for (i = 0; i < rs->rs_nrates; i++) { 1969 rate = rs->rs_rates[i] & IEEE80211_RATE_VAL; 1970 /* convert 802.11 rate to hardware rate index */ 1971 for (ridx = 0; ridx < RT2860_RIDX_MAX; ridx++) 1972 if (rt2860_rates[ridx].rate == rate) 1973 break; 1974 rn->ridx[i] = ridx; 1975 /* determine rate of control response frames */ 1976 for (j = i; j >= 0; j--) { 1977 if ((rs->rs_rates[j] & IEEE80211_RATE_BASIC) && 1978 rt2860_rates[rn->ridx[i]].phy == 1979 rt2860_rates[rn->ridx[j]].phy) 1980 break; 1981 } 1982 if (j >= 0) { 1983 rn->ctl_ridx[i] = rn->ridx[j]; 1984 } else { 1985 /* no basic rate found, use mandatory one */ 1986 rn->ctl_ridx[i] = rt2860_rates[ridx].ctl_ridx; 1987 } 1988 DPRINTF(("rate=0x%02x ridx=%d ctl_ridx=%d\n", 1989 rs->rs_rates[i], rn->ridx[i], rn->ctl_ridx[i])); 1990 } 1991 } 1992 1993 /* 1994 * Return the Rx chain with the highest RSSI for a given frame. 1995 */ 1996 static __inline uint8_t 1997 run_maxrssi_chain(struct run_softc *sc, const struct rt2860_rxwi *rxwi) 1998 { 1999 uint8_t rxchain = 0; 2000 2001 if (sc->nrxchains > 1) { 2002 if (rxwi->rssi[1] > rxwi->rssi[rxchain]) 2003 rxchain = 1; 2004 if (sc->nrxchains > 2) 2005 if (rxwi->rssi[2] > rxwi->rssi[rxchain]) 2006 rxchain = 2; 2007 } 2008 return (rxchain); 2009 } 2010 2011 static void 2012 run_rx_frame(struct run_softc *sc, uint8_t *buf, int dmalen) 2013 { 2014 struct ieee80211com *ic = &sc->sc_ic; 2015 struct ifnet *ifp = &sc->sc_if; 2016 struct ieee80211_frame *wh; 2017 struct ieee80211_node *ni; 2018 struct rt2870_rxd *rxd; 2019 struct rt2860_rxwi *rxwi; 2020 struct mbuf *m; 2021 uint32_t flags; 2022 uint16_t len, phy; 2023 uint8_t ant, rssi; 2024 int s; 2025 #ifdef RUN_HWCRYPTO 2026 int decrypted = 0; 2027 #endif 2028 2029 rxwi = (struct rt2860_rxwi *)buf; 2030 len = le16toh(rxwi->len) & 0xfff; 2031 if (__predict_false(len > dmalen)) { 2032 DPRINTF(("bad RXWI length %u > %u\n", len, dmalen)); 2033 return; 2034 } 2035 /* Rx descriptor is located at the end */ 2036 rxd = (struct rt2870_rxd *)(buf + dmalen); 2037 flags = le32toh(rxd->flags); 2038 2039 if (__predict_false(flags & (RT2860_RX_CRCERR | RT2860_RX_ICVERR))) { 2040 ifp->if_ierrors++; 2041 return; 2042 } 2043 2044 wh = (struct ieee80211_frame *)(rxwi + 1); 2045 #ifdef RUN_HWCRYPTO 2046 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2047 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 2048 decrypted = 1; 2049 } 2050 #endif 2051 2052 if (__predict_false((flags & RT2860_RX_MICERR))) { 2053 /* report MIC failures to net80211 for TKIP */ 2054 ieee80211_notify_michael_failure(ic, wh, 0/* XXX */); 2055 ifp->if_ierrors++; 2056 return; 2057 } 2058 2059 if (flags & RT2860_RX_L2PAD) { 2060 u_int hdrlen = ieee80211_hdrspace(ic, wh); 2061 ovbcopy(wh, (uint8_t *)wh + 2, hdrlen); 2062 wh = (struct ieee80211_frame *)((uint8_t *)wh + 2); 2063 } 2064 2065 /* could use m_devget but net80211 wants contig mgmt frames */ 2066 MGETHDR(m, M_DONTWAIT, MT_DATA); 2067 if (__predict_false(m == NULL)) { 2068 ifp->if_ierrors++; 2069 return; 2070 } 2071 if (len > MHLEN) { 2072 MCLGET(m, M_DONTWAIT); 2073 if (__predict_false(!(m->m_flags & M_EXT))) { 2074 ifp->if_ierrors++; 2075 m_freem(m); 2076 return; 2077 } 2078 } 2079 /* finalize mbuf */ 2080 m->m_pkthdr.rcvif = ifp; 2081 memcpy(mtod(m, void *), wh, len); 2082 m->m_pkthdr.len = m->m_len = len; 2083 2084 ant = run_maxrssi_chain(sc, rxwi); 2085 rssi = rxwi->rssi[ant]; 2086 2087 if (__predict_false(sc->sc_drvbpf != NULL)) { 2088 struct run_rx_radiotap_header *tap = &sc->sc_rxtap; 2089 2090 tap->wr_flags = 0; 2091 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 2092 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 2093 tap->wr_antsignal = rssi; 2094 tap->wr_antenna = ant; 2095 tap->wr_dbm_antsignal = run_rssi2dbm(sc, rssi, ant); 2096 tap->wr_rate = 2; /* in case it can't be found below */ 2097 phy = le16toh(rxwi->phy); 2098 switch (phy & RT2860_PHY_MODE) { 2099 case RT2860_PHY_CCK: 2100 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) { 2101 case 0: tap->wr_rate = 2; break; 2102 case 1: tap->wr_rate = 4; break; 2103 case 2: tap->wr_rate = 11; break; 2104 case 3: tap->wr_rate = 22; break; 2105 } 2106 if (phy & RT2860_PHY_SHPRE) 2107 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2108 break; 2109 case RT2860_PHY_OFDM: 2110 switch (phy & RT2860_PHY_MCS) { 2111 case 0: tap->wr_rate = 12; break; 2112 case 1: tap->wr_rate = 18; break; 2113 case 2: tap->wr_rate = 24; break; 2114 case 3: tap->wr_rate = 36; break; 2115 case 4: tap->wr_rate = 48; break; 2116 case 5: tap->wr_rate = 72; break; 2117 case 6: tap->wr_rate = 96; break; 2118 case 7: tap->wr_rate = 108; break; 2119 } 2120 break; 2121 } 2122 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 2123 } 2124 2125 s = splnet(); 2126 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 2127 #ifdef RUN_HWCRYPTO 2128 if (decrypted) { 2129 uint32_t icflags = ic->ic_flags; 2130 2131 ic->ic_flags &= ~IEEE80211_F_DROPUNENC; /* XXX */ 2132 ieee80211_input(ic, m, ni, rssi, 0); 2133 ic->ic_flags = icflags; 2134 } else 2135 #endif 2136 ieee80211_input(ic, m, ni, rssi, 0); 2137 2138 /* node is no longer needed */ 2139 ieee80211_free_node(ni); 2140 2141 /* 2142 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 2143 * without calling if_start(). 2144 */ 2145 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 2146 run_start(ifp); 2147 2148 splx(s); 2149 } 2150 2151 static void 2152 run_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 2153 { 2154 struct run_rx_data *data = priv; 2155 struct run_softc *sc = data->sc; 2156 uint8_t *buf; 2157 uint32_t dmalen; 2158 int xferlen; 2159 2160 if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2161 DPRINTF(("RX status=%d\n", status)); 2162 if (status == USBD_STALLED) 2163 usbd_clear_endpoint_stall_async(sc->rxq.pipeh); 2164 if (status != USBD_CANCELLED) 2165 goto skip; 2166 return; 2167 } 2168 usbd_get_xfer_status(xfer, NULL, NULL, &xferlen, NULL); 2169 2170 if (__predict_false(xferlen < (int)(sizeof(uint32_t) + 2171 sizeof(struct rt2860_rxwi) + sizeof(struct rt2870_rxd)))) { 2172 DPRINTF(("xfer too short %d\n", xferlen)); 2173 goto skip; 2174 } 2175 2176 /* HW can aggregate multiple 802.11 frames in a single USB xfer */ 2177 buf = data->buf; 2178 while (xferlen > 8) { 2179 dmalen = le32toh(*(uint32_t *)buf) & 0xffff; 2180 2181 if (__predict_false(dmalen == 0 || (dmalen & 3) != 0)) { 2182 DPRINTF(("bad DMA length %u (%x)\n", dmalen, dmalen)); 2183 break; 2184 } 2185 if (__predict_false(dmalen + 8 > (uint32_t)xferlen)) { 2186 DPRINTF(("bad DMA length %u > %d\n", 2187 dmalen + 8, xferlen)); 2188 break; 2189 } 2190 run_rx_frame(sc, buf + sizeof (uint32_t), dmalen); 2191 buf += dmalen + 8; 2192 xferlen -= dmalen + 8; 2193 } 2194 2195 skip: /* setup a new transfer */ 2196 usbd_setup_xfer(xfer, sc->rxq.pipeh, data, data->buf, RUN_MAX_RXSZ, 2197 USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT, run_rxeof); 2198 (void)usbd_transfer(data->xfer); 2199 } 2200 2201 static void 2202 run_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 2203 { 2204 struct run_tx_data *data = priv; 2205 struct run_softc *sc = data->sc; 2206 struct run_tx_ring *txq = &sc->txq[data->qid]; 2207 struct ifnet *ifp = &sc->sc_if; 2208 int s; 2209 2210 if (__predict_false(status != USBD_NORMAL_COMPLETION)) { 2211 DPRINTF(("TX status=%d\n", status)); 2212 if (status == USBD_STALLED) 2213 usbd_clear_endpoint_stall_async(txq->pipeh); 2214 ifp->if_oerrors++; 2215 return; 2216 } 2217 2218 s = splnet(); 2219 sc->sc_tx_timer = 0; 2220 ifp->if_opackets++; 2221 if (--txq->queued < RUN_TX_RING_COUNT) { 2222 sc->qfullmsk &= ~(1 << data->qid); 2223 ifp->if_flags &= ~IFF_OACTIVE; 2224 run_start(ifp); 2225 } 2226 splx(s); 2227 } 2228 2229 static int 2230 run_tx(struct run_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 2231 { 2232 struct ieee80211com *ic = &sc->sc_ic; 2233 struct run_node *rn = (void *)ni; 2234 struct ieee80211_frame *wh; 2235 #ifndef RUN_HWCRYPTO 2236 struct ieee80211_key *k; 2237 #endif 2238 struct run_tx_ring *ring; 2239 struct run_tx_data *data; 2240 struct rt2870_txd *txd; 2241 struct rt2860_txwi *txwi; 2242 uint16_t dur; 2243 uint8_t type, mcs, tid, qid, qos = 0; 2244 int error, hasqos, ridx, ctl_ridx, xferlen; 2245 2246 wh = mtod(m, struct ieee80211_frame *); 2247 2248 #ifndef RUN_HWCRYPTO 2249 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 2250 k = ieee80211_crypto_encap(ic, ni, m); 2251 if (k == NULL) { 2252 m_freem(m); 2253 return (ENOBUFS); 2254 } 2255 2256 /* packet header may have moved, reset our local pointer */ 2257 wh = mtod(m, struct ieee80211_frame *); 2258 } 2259 #endif 2260 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2261 2262 if ((hasqos = IEEE80211_QOS_HAS_SEQ(wh))) { 2263 qos = ((struct ieee80211_qosframe *)wh)->i_qos[0]; 2264 tid = qos & IEEE80211_QOS_TID; 2265 qid = TID_TO_WME_AC(tid); 2266 } else { 2267 tid = 0; 2268 qid = WME_AC_BE; 2269 } 2270 ring = &sc->txq[qid]; 2271 data = &ring->data[ring->cur]; 2272 2273 /* pickup a rate index */ 2274 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 2275 type != IEEE80211_FC0_TYPE_DATA) { 2276 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 2277 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 2278 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2279 } else if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 2280 ridx = sc->fixed_ridx; 2281 ctl_ridx = rt2860_rates[ridx].ctl_ridx; 2282 } else { 2283 ridx = rn->ridx[ni->ni_txrate]; 2284 ctl_ridx = rn->ctl_ridx[ni->ni_txrate]; 2285 } 2286 2287 /* get MCS code from rate index */ 2288 mcs = rt2860_rates[ridx].mcs; 2289 2290 xferlen = sizeof (*txwi) + m->m_pkthdr.len; 2291 /* roundup to 32-bit alignment */ 2292 xferlen = (xferlen + 3) & ~3; 2293 2294 txd = (struct rt2870_txd *)data->buf; 2295 txd->flags = RT2860_TX_QSEL_EDCA; 2296 txd->len = htole16(xferlen); 2297 2298 /* setup TX Wireless Information */ 2299 txwi = (struct rt2860_txwi *)(txd + 1); 2300 txwi->flags = 0; 2301 txwi->xflags = hasqos ? 0 : RT2860_TX_NSEQ; 2302 txwi->wcid = (type == IEEE80211_FC0_TYPE_DATA) ? 2303 RUN_AID2WCID(ni->ni_associd) : 0xff; 2304 txwi->len = htole16(m->m_pkthdr.len); 2305 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) { 2306 txwi->phy = htole16(RT2860_PHY_CCK); 2307 if (ridx != RT2860_RIDX_CCK1 && 2308 (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 2309 mcs |= RT2860_PHY_SHPRE; 2310 } else 2311 txwi->phy = htole16(RT2860_PHY_OFDM); 2312 txwi->phy |= htole16(mcs); 2313 2314 txwi->txop = RT2860_TX_TXOP_BACKOFF; 2315 2316 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 2317 (!hasqos || (qos & IEEE80211_QOS_ACKPOLICY) != 2318 IEEE80211_QOS_ACKPOLICY_NOACK)) { 2319 txwi->xflags |= RT2860_TX_ACK; 2320 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 2321 dur = rt2860_rates[ctl_ridx].sp_ack_dur; 2322 else 2323 dur = rt2860_rates[ctl_ridx].lp_ack_dur; 2324 *(uint16_t *)wh->i_dur = htole16(dur); 2325 } 2326 2327 #ifndef IEEE80211_STA_ONLY 2328 /* ask MAC to insert timestamp into probe responses */ 2329 if ((wh->i_fc[0] & 2330 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 2331 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 2332 /* NOTE: beacons do not pass through tx_data() */ 2333 txwi->flags |= RT2860_TX_TS; 2334 #endif 2335 2336 if (__predict_false(sc->sc_drvbpf != NULL)) { 2337 struct run_tx_radiotap_header *tap = &sc->sc_txtap; 2338 2339 tap->wt_flags = 0; 2340 tap->wt_rate = rt2860_rates[ridx].rate; 2341 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2342 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2343 tap->wt_hwqueue = qid; 2344 if (mcs & RT2860_PHY_SHPRE) 2345 tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 2346 2347 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 2348 } 2349 2350 m_copydata(m, 0, m->m_pkthdr.len, (void *)(txwi + 1)); 2351 m_freem(m); 2352 2353 xferlen += sizeof (*txd) + 4; 2354 2355 usbd_setup_xfer(data->xfer, ring->pipeh, data, data->buf, xferlen, 2356 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RUN_TX_TIMEOUT, run_txeof); 2357 error = usbd_transfer(data->xfer); 2358 if (__predict_false(error != USBD_IN_PROGRESS && 2359 error != USBD_NORMAL_COMPLETION)) 2360 return (error); 2361 2362 ieee80211_free_node(ni); 2363 2364 ring->cur = (ring->cur + 1) % RUN_TX_RING_COUNT; 2365 if (++ring->queued >= RUN_TX_RING_COUNT) 2366 sc->qfullmsk |= 1 << qid; 2367 2368 return (0); 2369 } 2370 2371 static void 2372 run_start(struct ifnet *ifp) 2373 { 2374 struct run_softc *sc = ifp->if_softc; 2375 struct ieee80211com *ic = &sc->sc_ic; 2376 struct ether_header *eh; 2377 struct ieee80211_node *ni; 2378 struct mbuf *m; 2379 2380 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2381 return; 2382 2383 for (;;) { 2384 if (sc->qfullmsk != 0) { 2385 ifp->if_flags |= IFF_OACTIVE; 2386 break; 2387 } 2388 /* send pending management frames first */ 2389 IF_DEQUEUE(&ic->ic_mgtq, m); 2390 if (m != NULL) { 2391 ni = (void *)m->m_pkthdr.rcvif; 2392 m->m_pkthdr.rcvif = NULL; 2393 goto sendit; 2394 } 2395 if (ic->ic_state != IEEE80211_S_RUN) 2396 break; 2397 2398 /* encapsulate and send data frames */ 2399 IFQ_DEQUEUE(&ifp->if_snd, m); 2400 if (m == NULL) 2401 break; 2402 if (m->m_len < (int)sizeof(*eh) && 2403 (m = m_pullup(m, sizeof(*eh))) == NULL) { 2404 ifp->if_oerrors++; 2405 continue; 2406 } 2407 2408 eh = mtod(m, struct ether_header *); 2409 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2410 if (ni == NULL) { 2411 m_freem(m); 2412 ifp->if_oerrors++; 2413 continue; 2414 } 2415 2416 bpf_mtap(ifp, m); 2417 2418 if ((m = ieee80211_encap(ic, m, ni)) == NULL) { 2419 ieee80211_free_node(ni); 2420 ifp->if_oerrors++; 2421 continue; 2422 } 2423 sendit: 2424 bpf_mtap3(ic->ic_rawbpf, m); 2425 2426 if (run_tx(sc, m, ni) != 0) { 2427 ieee80211_free_node(ni); 2428 ifp->if_oerrors++; 2429 continue; 2430 } 2431 2432 sc->sc_tx_timer = 5; 2433 ifp->if_timer = 1; 2434 } 2435 } 2436 2437 static void 2438 run_watchdog(struct ifnet *ifp) 2439 { 2440 struct run_softc *sc = ifp->if_softc; 2441 struct ieee80211com *ic = &sc->sc_ic; 2442 2443 ifp->if_timer = 0; 2444 2445 if (sc->sc_tx_timer > 0) { 2446 if (--sc->sc_tx_timer == 0) { 2447 aprint_error_dev(sc->sc_dev, "device timeout\n"); 2448 /* run_init(ifp); XXX needs a process context! */ 2449 ifp->if_oerrors++; 2450 return; 2451 } 2452 ifp->if_timer = 1; 2453 } 2454 2455 ieee80211_watchdog(ic); 2456 } 2457 2458 static int 2459 run_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2460 { 2461 struct run_softc *sc = ifp->if_softc; 2462 struct ieee80211com *ic = &sc->sc_ic; 2463 int s, error = 0; 2464 2465 s = splnet(); 2466 2467 switch (cmd) { 2468 case SIOCSIFFLAGS: 2469 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2470 break; 2471 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 2472 case IFF_UP|IFF_RUNNING: 2473 break; 2474 case IFF_UP: 2475 run_init(ifp); 2476 break; 2477 case IFF_RUNNING: 2478 run_stop(ifp, 1); 2479 break; 2480 case 0: 2481 break; 2482 } 2483 break; 2484 2485 case SIOCADDMULTI: 2486 case SIOCDELMULTI: 2487 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 2488 /* setup multicast filter, etc */ 2489 error = 0; 2490 } 2491 break; 2492 2493 default: 2494 error = ieee80211_ioctl(ic, cmd, data); 2495 break; 2496 } 2497 2498 if (error == ENETRESET) { 2499 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2500 (IFF_UP | IFF_RUNNING)) { 2501 run_init(ifp); 2502 } 2503 error = 0; 2504 } 2505 2506 splx(s); 2507 2508 return (error); 2509 } 2510 2511 static void 2512 run_select_chan_group(struct run_softc *sc, int group) 2513 { 2514 uint32_t tmp; 2515 uint8_t agc; 2516 2517 run_bbp_write(sc, 62, 0x37 - sc->lna[group]); 2518 run_bbp_write(sc, 63, 0x37 - sc->lna[group]); 2519 run_bbp_write(sc, 64, 0x37 - sc->lna[group]); 2520 run_bbp_write(sc, 86, 0x00); 2521 2522 if (group == 0) { 2523 if (sc->ext_2ghz_lna) { 2524 run_bbp_write(sc, 82, 0x62); 2525 run_bbp_write(sc, 75, 0x46); 2526 } else { 2527 run_bbp_write(sc, 82, 0x84); 2528 run_bbp_write(sc, 75, 0x50); 2529 } 2530 } else { 2531 if (sc->mac_ver == 0x3572) 2532 run_bbp_write(sc, 82, 0x94); 2533 else 2534 run_bbp_write(sc, 82, 0xf2); 2535 if (sc->ext_5ghz_lna) 2536 run_bbp_write(sc, 75, 0x46); 2537 else 2538 run_bbp_write(sc, 75, 0x50); 2539 } 2540 2541 run_read(sc, RT2860_TX_BAND_CFG, &tmp); 2542 tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P); 2543 tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P; 2544 run_write(sc, RT2860_TX_BAND_CFG, tmp); 2545 2546 /* enable appropriate Power Amplifiers and Low Noise Amplifiers */ 2547 tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN; 2548 if (sc->nrxchains > 1) 2549 tmp |= RT2860_LNA_PE1_EN; 2550 if (group == 0) { /* 2GHz */ 2551 tmp |= RT2860_PA_PE_G0_EN; 2552 if (sc->ntxchains > 1) 2553 tmp |= RT2860_PA_PE_G1_EN; 2554 } else { /* 5GHz */ 2555 tmp |= RT2860_PA_PE_A0_EN; 2556 if (sc->ntxchains > 1) 2557 tmp |= RT2860_PA_PE_A1_EN; 2558 } 2559 if (sc->mac_ver == 0x3572) { 2560 run_rt3070_rf_write(sc, 8, 0x00); 2561 run_write(sc, RT2860_TX_PIN_CFG, tmp); 2562 run_rt3070_rf_write(sc, 8, 0x80); 2563 } else 2564 run_write(sc, RT2860_TX_PIN_CFG, tmp); 2565 2566 /* set initial AGC value */ 2567 if (group == 0) { /* 2GHz band */ 2568 if (sc->mac_ver >= 0x3070) 2569 agc = 0x1c + sc->lna[0] * 2; 2570 else 2571 agc = 0x2e + sc->lna[0]; 2572 } else { /* 5GHz band */ 2573 if (sc->mac_ver == 0x3572) 2574 agc = 0x22 + (sc->lna[group] * 5) / 3; 2575 else 2576 agc = 0x32 + (sc->lna[group] * 5) / 3; 2577 } 2578 run_set_agc(sc, agc); 2579 } 2580 2581 static void 2582 run_rt2870_set_chan(struct run_softc *sc, u_int chan) 2583 { 2584 const struct rfprog *rfprog = rt2860_rf2850; 2585 uint32_t r2, r3, r4; 2586 int8_t txpow1, txpow2; 2587 int i; 2588 2589 /* find the settings for this channel (we know it exists) */ 2590 for (i = 0; rfprog[i].chan != chan; i++); 2591 2592 r2 = rfprog[i].r2; 2593 if (sc->ntxchains == 1) 2594 r2 |= 1 << 12; /* 1T: disable Tx chain 2 */ 2595 if (sc->nrxchains == 1) 2596 r2 |= 1 << 15 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2597 else if (sc->nrxchains == 2) 2598 r2 |= 1 << 4; /* 2R: disable Rx chain 3 */ 2599 2600 /* use Tx power values from EEPROM */ 2601 txpow1 = sc->txpow1[i]; 2602 txpow2 = sc->txpow2[i]; 2603 if (chan > 14) { 2604 if (txpow1 >= 0) 2605 txpow1 = txpow1 << 1 | 1; 2606 else 2607 txpow1 = (7 + txpow1) << 1; 2608 if (txpow2 >= 0) 2609 txpow2 = txpow2 << 1 | 1; 2610 else 2611 txpow2 = (7 + txpow2) << 1; 2612 } 2613 r3 = rfprog[i].r3 | txpow1 << 7; 2614 r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4; 2615 2616 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2617 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2618 run_rt2870_rf_write(sc, RT2860_RF3, r3); 2619 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2620 2621 DELAY(200); 2622 2623 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2624 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2625 run_rt2870_rf_write(sc, RT2860_RF3, r3 | 1); 2626 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2627 2628 DELAY(200); 2629 2630 run_rt2870_rf_write(sc, RT2860_RF1, rfprog[i].r1); 2631 run_rt2870_rf_write(sc, RT2860_RF2, r2); 2632 run_rt2870_rf_write(sc, RT2860_RF3, r3); 2633 run_rt2870_rf_write(sc, RT2860_RF4, r4); 2634 } 2635 2636 static void 2637 run_rt3070_set_chan(struct run_softc *sc, u_int chan) 2638 { 2639 int8_t txpow1, txpow2; 2640 uint8_t rf; 2641 int i; 2642 2643 KASSERT(chan >= 1 && chan <= 14); /* RT3070 is 2GHz only */ 2644 2645 /* find the settings for this channel (we know it exists) */ 2646 for (i = 0; rt2860_rf2850[i].chan != chan; i++) 2647 continue; 2648 2649 /* use Tx power values from EEPROM */ 2650 txpow1 = sc->txpow1[i]; 2651 txpow2 = sc->txpow2[i]; 2652 2653 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2654 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2655 run_rt3070_rf_read(sc, 6, &rf); 2656 rf = (rf & ~0x03) | rt3070_freqs[i].r; 2657 run_rt3070_rf_write(sc, 6, rf); 2658 2659 /* set Tx0 power */ 2660 run_rt3070_rf_read(sc, 12, &rf); 2661 rf = (rf & ~0x1f) | txpow1; 2662 run_rt3070_rf_write(sc, 12, rf); 2663 2664 /* set Tx1 power */ 2665 run_rt3070_rf_read(sc, 13, &rf); 2666 rf = (rf & ~0x1f) | txpow2; 2667 run_rt3070_rf_write(sc, 13, rf); 2668 2669 run_rt3070_rf_read(sc, 1, &rf); 2670 rf &= ~0xfc; 2671 if (sc->ntxchains == 1) 2672 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2673 else if (sc->ntxchains == 2) 2674 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2675 if (sc->nrxchains == 1) 2676 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2677 else if (sc->nrxchains == 2) 2678 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2679 run_rt3070_rf_write(sc, 1, rf); 2680 2681 /* set RF offset */ 2682 run_rt3070_rf_read(sc, 23, &rf); 2683 rf = (rf & ~0x7f) | sc->freq; 2684 run_rt3070_rf_write(sc, 23, rf); 2685 2686 /* program RF filter */ 2687 run_rt3070_rf_read(sc, 24, &rf); /* Tx */ 2688 rf = (rf & ~0x3f) | sc->rf24_20mhz; 2689 run_rt3070_rf_write(sc, 24, rf); 2690 run_rt3070_rf_read(sc, 31, &rf); /* Rx */ 2691 rf = (rf & ~0x3f) | sc->rf24_20mhz; 2692 run_rt3070_rf_write(sc, 31, rf); 2693 2694 /* enable RF tuning */ 2695 run_rt3070_rf_read(sc, 7, &rf); 2696 run_rt3070_rf_write(sc, 7, rf | 0x01); 2697 } 2698 2699 static void 2700 run_rt3572_set_chan(struct run_softc *sc, u_int chan) 2701 { 2702 int8_t txpow1, txpow2; 2703 uint32_t tmp; 2704 uint8_t rf; 2705 int i; 2706 2707 /* find the settings for this channel (we know it exists) */ 2708 for (i = 0; rt2860_rf2850[i].chan != chan; i++); 2709 2710 /* use Tx power values from EEPROM */ 2711 txpow1 = sc->txpow1[i]; 2712 txpow2 = sc->txpow2[i]; 2713 2714 if (chan <= 14) { 2715 run_bbp_write(sc, 25, sc->bbp25); 2716 run_bbp_write(sc, 26, sc->bbp26); 2717 } else { 2718 /* enable IQ phase correction */ 2719 run_bbp_write(sc, 25, 0x09); 2720 run_bbp_write(sc, 26, 0xff); 2721 } 2722 2723 run_rt3070_rf_write(sc, 2, rt3070_freqs[i].n); 2724 run_rt3070_rf_write(sc, 3, rt3070_freqs[i].k); 2725 run_rt3070_rf_read(sc, 6, &rf); 2726 rf = (rf & ~0x0f) | rt3070_freqs[i].r; 2727 rf |= (chan <= 14) ? 0x08 : 0x04; 2728 run_rt3070_rf_write(sc, 6, rf); 2729 2730 /* set PLL mode */ 2731 run_rt3070_rf_read(sc, 5, &rf); 2732 rf &= ~(0x08 | 0x04); 2733 rf |= (chan <= 14) ? 0x04 : 0x08; 2734 run_rt3070_rf_write(sc, 5, rf); 2735 2736 /* set Tx power for chain 0 */ 2737 if (chan <= 14) 2738 rf = 0x60 | txpow1; 2739 else 2740 rf = 0xe0 | (txpow1 & 0xc) << 1 | (txpow1 & 0x3); 2741 run_rt3070_rf_write(sc, 12, rf); 2742 2743 /* set Tx power for chain 1 */ 2744 if (chan <= 14) 2745 rf = 0x60 | txpow2; 2746 else 2747 rf = 0xe0 | (txpow2 & 0xc) << 1 | (txpow2 & 0x3); 2748 run_rt3070_rf_write(sc, 13, rf); 2749 2750 /* set Tx/Rx streams */ 2751 run_rt3070_rf_read(sc, 1, &rf); 2752 rf &= ~0xfc; 2753 if (sc->ntxchains == 1) 2754 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */ 2755 else if (sc->ntxchains == 2) 2756 rf |= 1 << 7; /* 2T: disable Tx chain 3 */ 2757 if (sc->nrxchains == 1) 2758 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */ 2759 else if (sc->nrxchains == 2) 2760 rf |= 1 << 6; /* 2R: disable Rx chain 3 */ 2761 run_rt3070_rf_write(sc, 1, rf); 2762 2763 /* set RF offset */ 2764 run_rt3070_rf_read(sc, 23, &rf); 2765 rf = (rf & ~0x7f) | sc->freq; 2766 run_rt3070_rf_write(sc, 23, rf); 2767 2768 /* program RF filter */ 2769 rf = sc->rf24_20mhz; 2770 run_rt3070_rf_write(sc, 24, rf); /* Tx */ 2771 run_rt3070_rf_write(sc, 31, rf); /* Rx */ 2772 2773 /* enable RF tuning */ 2774 run_rt3070_rf_read(sc, 7, &rf); 2775 rf = (chan <= 14) ? 0xd8 : ((rf & ~0xc8) | 0x14); 2776 run_rt3070_rf_write(sc, 7, rf); 2777 2778 /* TSSI */ 2779 rf = (chan <= 14) ? 0xc3 : 0xc0; 2780 run_rt3070_rf_write(sc, 9, rf); 2781 2782 /* set loop filter 1 */ 2783 run_rt3070_rf_write(sc, 10, 0xf1); 2784 /* set loop filter 2 */ 2785 run_rt3070_rf_write(sc, 11, (chan <= 14) ? 0xb9 : 0x00); 2786 2787 /* set tx_mx2_ic */ 2788 run_rt3070_rf_write(sc, 15, (chan <= 14) ? 0x53 : 0x43); 2789 /* set tx_mx1_ic */ 2790 if (chan <= 14) 2791 rf = 0x48 | sc->txmixgain_2ghz; 2792 else 2793 rf = 0x78 | sc->txmixgain_5ghz; 2794 run_rt3070_rf_write(sc, 16, rf); 2795 2796 /* set tx_lo1 */ 2797 run_rt3070_rf_write(sc, 17, 0x23); 2798 /* set tx_lo2 */ 2799 if (chan <= 14) 2800 rf = 0x93; 2801 else if (chan <= 64) 2802 rf = 0xb7; 2803 else if (chan <= 128) 2804 rf = 0x74; 2805 else 2806 rf = 0x72; 2807 run_rt3070_rf_write(sc, 19, rf); 2808 2809 /* set rx_lo1 */ 2810 if (chan <= 14) 2811 rf = 0xb3; 2812 else if (chan <= 64) 2813 rf = 0xf6; 2814 else if (chan <= 128) 2815 rf = 0xf4; 2816 else 2817 rf = 0xf3; 2818 run_rt3070_rf_write(sc, 20, rf); 2819 2820 /* set pfd_delay */ 2821 if (chan <= 14) 2822 rf = 0x15; 2823 else if (chan <= 64) 2824 rf = 0x3d; 2825 else 2826 rf = 0x01; 2827 run_rt3070_rf_write(sc, 25, rf); 2828 2829 /* set rx_lo2 */ 2830 run_rt3070_rf_write(sc, 26, (chan <= 14) ? 0x85 : 0x87); 2831 /* set ldo_rf_vc */ 2832 run_rt3070_rf_write(sc, 27, (chan <= 14) ? 0x00 : 0x01); 2833 /* set drv_cc */ 2834 run_rt3070_rf_write(sc, 29, (chan <= 14) ? 0x9b : 0x9f); 2835 2836 run_read(sc, RT2860_GPIO_CTRL, &tmp); 2837 tmp &= ~0x8080; 2838 if (chan <= 14) 2839 tmp |= 0x80; 2840 run_write(sc, RT2860_GPIO_CTRL, tmp); 2841 2842 /* enable RF tuning */ 2843 run_rt3070_rf_read(sc, 7, &rf); 2844 run_rt3070_rf_write(sc, 7, rf | 0x01); 2845 2846 DELAY(2000); 2847 } 2848 2849 static void 2850 run_set_agc(struct run_softc *sc, uint8_t agc) 2851 { 2852 uint8_t bbp; 2853 2854 if (sc->mac_ver == 0x3572) { 2855 run_bbp_read(sc, 27, &bbp); 2856 bbp &= ~(0x3 << 5); 2857 run_bbp_write(sc, 27, bbp | 0 << 5); /* select Rx0 */ 2858 run_bbp_write(sc, 66, agc); 2859 run_bbp_write(sc, 27, bbp | 1 << 5); /* select Rx1 */ 2860 run_bbp_write(sc, 66, agc); 2861 } else 2862 run_bbp_write(sc, 66, agc); 2863 } 2864 2865 static void 2866 run_set_rx_antenna(struct run_softc *sc, int aux) 2867 { 2868 uint32_t tmp; 2869 2870 run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, !aux); 2871 run_read(sc, RT2860_GPIO_CTRL, &tmp); 2872 tmp &= ~0x0808; 2873 if (aux) 2874 tmp |= 0x08; 2875 run_write(sc, RT2860_GPIO_CTRL, tmp); 2876 } 2877 2878 static int 2879 run_set_chan(struct run_softc *sc, struct ieee80211_channel *c) 2880 { 2881 struct ieee80211com *ic = &sc->sc_ic; 2882 u_int chan, group; 2883 2884 chan = ieee80211_chan2ieee(ic, c); 2885 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2886 return (EINVAL); 2887 2888 if (sc->mac_ver == 0x3572) 2889 run_rt3572_set_chan(sc, chan); 2890 else if (sc->mac_ver >= 0x3070) 2891 run_rt3070_set_chan(sc, chan); 2892 else 2893 run_rt2870_set_chan(sc, chan); 2894 2895 /* determine channel group */ 2896 if (chan <= 14) 2897 group = 0; 2898 else if (chan <= 64) 2899 group = 1; 2900 else if (chan <= 128) 2901 group = 2; 2902 else 2903 group = 3; 2904 2905 /* XXX necessary only when group has changed! */ 2906 run_select_chan_group(sc, group); 2907 2908 DELAY(1000); 2909 return (0); 2910 } 2911 2912 static void 2913 run_enable_tsf_sync(struct run_softc *sc) 2914 { 2915 struct ieee80211com *ic = &sc->sc_ic; 2916 uint32_t tmp; 2917 2918 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 2919 tmp &= ~0x1fffff; 2920 tmp |= ic->ic_bss->ni_intval * 16; 2921 tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN; 2922 if (ic->ic_opmode == IEEE80211_M_STA) { 2923 /* 2924 * Local TSF is always updated with remote TSF on beacon 2925 * reception. 2926 */ 2927 tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT; 2928 } 2929 #ifndef IEEE80211_STA_ONLY 2930 else if (ic->ic_opmode == IEEE80211_M_IBSS) { 2931 tmp |= RT2860_BCN_TX_EN; 2932 /* 2933 * Local TSF is updated with remote TSF on beacon reception 2934 * only if the remote TSF is greater than local TSF. 2935 */ 2936 tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT; 2937 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2938 tmp |= RT2860_BCN_TX_EN; 2939 /* SYNC with nobody */ 2940 tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT; 2941 } 2942 #endif 2943 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 2944 } 2945 2946 static void 2947 run_enable_mrr(struct run_softc *sc) 2948 { 2949 #define CCK(mcs) (mcs) 2950 #define OFDM(mcs) (1 << 3 | (mcs)) 2951 run_write(sc, RT2860_LG_FBK_CFG0, 2952 OFDM(6) << 28 | /* 54->48 */ 2953 OFDM(5) << 24 | /* 48->36 */ 2954 OFDM(4) << 20 | /* 36->24 */ 2955 OFDM(3) << 16 | /* 24->18 */ 2956 OFDM(2) << 12 | /* 18->12 */ 2957 OFDM(1) << 8 | /* 12-> 9 */ 2958 OFDM(0) << 4 | /* 9-> 6 */ 2959 OFDM(0)); /* 6-> 6 */ 2960 2961 run_write(sc, RT2860_LG_FBK_CFG1, 2962 CCK(2) << 12 | /* 11->5.5 */ 2963 CCK(1) << 8 | /* 5.5-> 2 */ 2964 CCK(0) << 4 | /* 2-> 1 */ 2965 CCK(0)); /* 1-> 1 */ 2966 #undef OFDM 2967 #undef CCK 2968 } 2969 2970 static void 2971 run_set_txpreamble(struct run_softc *sc) 2972 { 2973 uint32_t tmp; 2974 2975 run_read(sc, RT2860_AUTO_RSP_CFG, &tmp); 2976 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 2977 tmp |= RT2860_CCK_SHORT_EN; 2978 else 2979 tmp &= ~RT2860_CCK_SHORT_EN; 2980 run_write(sc, RT2860_AUTO_RSP_CFG, tmp); 2981 } 2982 2983 static void 2984 run_set_basicrates(struct run_softc *sc) 2985 { 2986 struct ieee80211com *ic = &sc->sc_ic; 2987 2988 /* set basic rates mask */ 2989 if (ic->ic_curmode == IEEE80211_MODE_11B) 2990 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x003); 2991 else if (ic->ic_curmode == IEEE80211_MODE_11A) 2992 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x150); 2993 else /* 11g */ 2994 run_write(sc, RT2860_LEGACY_BASIC_RATE, 0x15f); 2995 } 2996 2997 static void 2998 run_set_leds(struct run_softc *sc, uint16_t which) 2999 { 3000 3001 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LEDS, 3002 which | (sc->leds & 0x7f)); 3003 } 3004 3005 static void 3006 run_set_bssid(struct run_softc *sc, const uint8_t *bssid) 3007 { 3008 3009 run_write(sc, RT2860_MAC_BSSID_DW0, 3010 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24); 3011 run_write(sc, RT2860_MAC_BSSID_DW1, 3012 bssid[4] | bssid[5] << 8); 3013 } 3014 3015 static void 3016 run_set_macaddr(struct run_softc *sc, const uint8_t *addr) 3017 { 3018 3019 run_write(sc, RT2860_MAC_ADDR_DW0, 3020 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24); 3021 run_write(sc, RT2860_MAC_ADDR_DW1, 3022 addr[4] | addr[5] << 8 | 0xff << 16); 3023 } 3024 3025 static void 3026 run_updateslot(struct ifnet *ifp) 3027 { 3028 3029 /* do it in a process context */ 3030 run_do_async(ifp->if_softc, run_updateslot_cb, NULL, 0); 3031 } 3032 3033 /* ARGSUSED */ 3034 static void 3035 run_updateslot_cb(struct run_softc *sc, void *arg) 3036 { 3037 uint32_t tmp; 3038 3039 run_read(sc, RT2860_BKOFF_SLOT_CFG, &tmp); 3040 tmp &= ~0xff; 3041 tmp |= (sc->sc_ic.ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 3042 run_write(sc, RT2860_BKOFF_SLOT_CFG, tmp); 3043 } 3044 3045 static int8_t 3046 run_rssi2dbm(struct run_softc *sc, uint8_t rssi, uint8_t rxchain) 3047 { 3048 struct ieee80211com *ic = &sc->sc_ic; 3049 struct ieee80211_channel *c = ic->ic_curchan; 3050 int delta; 3051 3052 if (IEEE80211_IS_CHAN_5GHZ(c)) { 3053 u_int chan = ieee80211_chan2ieee(ic, c); 3054 delta = sc->rssi_5ghz[rxchain]; 3055 3056 /* determine channel group */ 3057 if (chan <= 64) 3058 delta -= sc->lna[1]; 3059 else if (chan <= 128) 3060 delta -= sc->lna[2]; 3061 else 3062 delta -= sc->lna[3]; 3063 } else 3064 delta = sc->rssi_2ghz[rxchain] - sc->lna[0]; 3065 3066 return (-12 - delta - rssi); 3067 } 3068 3069 static int 3070 run_bbp_init(struct run_softc *sc) 3071 { 3072 int i, error, ntries; 3073 uint8_t bbp0; 3074 3075 /* wait for BBP to wake up */ 3076 for (ntries = 0; ntries < 20; ntries++) { 3077 if ((error = run_bbp_read(sc, 0, &bbp0)) != 0) 3078 return (error); 3079 if (bbp0 != 0 && bbp0 != 0xff) 3080 break; 3081 } 3082 if (ntries == 20) 3083 return (ETIMEDOUT); 3084 3085 /* initialize BBP registers to default values */ 3086 for (i = 0; i < (int)__arraycount(rt2860_def_bbp); i++) { 3087 run_bbp_write(sc, rt2860_def_bbp[i].reg, 3088 rt2860_def_bbp[i].val); 3089 } 3090 3091 /* fix BBP84 for RT2860E */ 3092 if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101) 3093 run_bbp_write(sc, 84, 0x19); 3094 3095 if (sc->mac_ver >= 0x3070) { 3096 run_bbp_write(sc, 79, 0x13); 3097 run_bbp_write(sc, 80, 0x05); 3098 run_bbp_write(sc, 81, 0x33); 3099 } else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) { 3100 run_bbp_write(sc, 69, 0x16); 3101 run_bbp_write(sc, 73, 0x12); 3102 } 3103 return (0); 3104 } 3105 3106 static int 3107 run_rt3070_rf_init(struct run_softc *sc) 3108 { 3109 uint32_t tmp; 3110 uint8_t rf, target, bbp4; 3111 int i; 3112 3113 run_rt3070_rf_read(sc, 30, &rf); 3114 /* toggle RF R30 bit 7 */ 3115 run_rt3070_rf_write(sc, 30, rf | 0x80); 3116 DELAY(1000); 3117 run_rt3070_rf_write(sc, 30, rf & ~0x80); 3118 3119 /* initialize RF registers to default value */ 3120 if (sc->mac_ver == 0x3572) { 3121 for (i = 0; i < (int)__arraycount(rt3572_def_rf); i++) { 3122 run_rt3070_rf_write(sc, rt3572_def_rf[i].reg, 3123 rt3572_def_rf[i].val); 3124 } 3125 } else { 3126 for (i = 0; i < (int)__arraycount(rt3070_def_rf); i++) { 3127 run_rt3070_rf_write(sc, rt3070_def_rf[i].reg, 3128 rt3070_def_rf[i].val); 3129 } 3130 } 3131 if (sc->mac_ver == 0x3572) { 3132 run_rt3070_rf_read(sc, 6, &rf); 3133 run_rt3070_rf_write(sc, 6, rf | 0x40); 3134 3135 /* increase voltage from 1.2V to 1.35V */ 3136 run_read(sc, RT3070_LDO_CFG0, &tmp); 3137 tmp = (tmp & ~0x1f000000) | 0x0d000000; 3138 run_write(sc, RT3070_LDO_CFG0, tmp); 3139 if (sc->mac_rev >= 0x0211 || !sc->patch_dac) { 3140 /* decrease voltage back to 1.2V */ 3141 DELAY(1000); 3142 tmp = (tmp & ~0x1f000000) | 0x01000000; 3143 run_write(sc, RT3070_LDO_CFG0, tmp); 3144 } 3145 } else if (sc->mac_ver == 0x3071) { 3146 run_rt3070_rf_read(sc, 6, &rf); 3147 run_rt3070_rf_write(sc, 6, rf | 0x40); 3148 run_rt3070_rf_write(sc, 31, 0x14); 3149 3150 run_read(sc, RT3070_LDO_CFG0, &tmp); 3151 tmp &= ~0x1f000000; 3152 if (sc->mac_rev < 0x0211) 3153 tmp |= 0x0d000000; /* 1.35V */ 3154 else 3155 tmp |= 0x01000000; /* 1.2V */ 3156 run_write(sc, RT3070_LDO_CFG0, tmp); 3157 3158 /* patch LNA_PE_G1 */ 3159 run_read(sc, RT3070_GPIO_SWITCH, &tmp); 3160 run_write(sc, RT3070_GPIO_SWITCH, tmp & ~0x20); 3161 } else if (sc->mac_ver == 0x3070) { 3162 /* increase voltage from 1.2V to 1.35V */ 3163 run_read(sc, RT3070_LDO_CFG0, &tmp); 3164 tmp = (tmp & ~0x0f000000) | 0x0d000000; 3165 run_write(sc, RT3070_LDO_CFG0, tmp); 3166 } 3167 3168 /* select 20MHz bandwidth */ 3169 run_rt3070_rf_read(sc, 31, &rf); 3170 run_rt3070_rf_write(sc, 31, rf & ~0x20); 3171 3172 /* calibrate filter for 20MHz bandwidth */ 3173 sc->rf24_20mhz = 0x1f; /* default value */ 3174 target = (sc->mac_ver < 0x3071) ? 0x16 : 0x13; 3175 run_rt3070_filter_calib(sc, 0x07, target, &sc->rf24_20mhz); 3176 3177 /* select 40MHz bandwidth */ 3178 run_bbp_read(sc, 4, &bbp4); 3179 run_bbp_write(sc, 4, (bbp4 & ~0x08) | 0x10); 3180 run_rt3070_rf_read(sc, 31, &rf); 3181 run_rt3070_rf_write(sc, 31, rf | 0x20); 3182 3183 /* calibrate filter for 40MHz bandwidth */ 3184 sc->rf24_40mhz = 0x2f; /* default value */ 3185 target = (sc->mac_ver < 0x3071) ? 0x19 : 0x15; 3186 run_rt3070_filter_calib(sc, 0x27, target, &sc->rf24_40mhz); 3187 3188 /* go back to 20MHz bandwidth */ 3189 run_bbp_read(sc, 4, &bbp4); 3190 run_bbp_write(sc, 4, bbp4 & ~0x18); 3191 3192 if (sc->mac_ver == 0x3572) { 3193 /* save default BBP registers 25 and 26 values */ 3194 run_bbp_read(sc, 25, &sc->bbp25); 3195 run_bbp_read(sc, 26, &sc->bbp26); 3196 } else if (sc->mac_rev < 0x0211) 3197 run_rt3070_rf_write(sc, 27, 0x03); 3198 3199 run_read(sc, RT3070_OPT_14, &tmp); 3200 run_write(sc, RT3070_OPT_14, tmp | 1); 3201 3202 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3203 run_rt3070_rf_read(sc, 17, &rf); 3204 rf &= ~RT3070_TX_LO1; 3205 if ((sc->mac_ver == 0x3070 || 3206 (sc->mac_ver == 0x3071 && sc->mac_rev >= 0x0211)) && 3207 !sc->ext_2ghz_lna) 3208 rf |= 0x20; /* fix for long range Rx issue */ 3209 if (sc->txmixgain_2ghz >= 1) 3210 rf = (rf & ~0x7) | sc->txmixgain_2ghz; 3211 run_rt3070_rf_write(sc, 17, rf); 3212 } 3213 if (sc->mac_ver == 0x3071) { 3214 run_rt3070_rf_read(sc, 1, &rf); 3215 rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD); 3216 rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD; 3217 run_rt3070_rf_write(sc, 1, rf); 3218 3219 run_rt3070_rf_read(sc, 15, &rf); 3220 run_rt3070_rf_write(sc, 15, rf & ~RT3070_TX_LO2); 3221 3222 run_rt3070_rf_read(sc, 20, &rf); 3223 run_rt3070_rf_write(sc, 20, rf & ~RT3070_RX_LO1); 3224 3225 run_rt3070_rf_read(sc, 21, &rf); 3226 run_rt3070_rf_write(sc, 21, rf & ~RT3070_RX_LO2); 3227 } 3228 if (sc->mac_ver == 0x3070 || sc->mac_ver == 0x3071) { 3229 /* fix Tx to Rx IQ glitch by raising RF voltage */ 3230 run_rt3070_rf_read(sc, 27, &rf); 3231 rf &= ~0x77; 3232 if (sc->mac_rev < 0x0211) 3233 rf |= 0x03; 3234 run_rt3070_rf_write(sc, 27, rf); 3235 } 3236 return (0); 3237 } 3238 3239 static int 3240 run_rt3070_filter_calib(struct run_softc *sc, uint8_t init, uint8_t target, 3241 uint8_t *val) 3242 { 3243 uint8_t rf22, rf24; 3244 uint8_t bbp55_pb, bbp55_sb, delta; 3245 int ntries; 3246 3247 /* program filter */ 3248 run_rt3070_rf_read(sc, 24, &rf24); 3249 rf24 = (rf24 & 0xc0) | init; /* initial filter value */ 3250 run_rt3070_rf_write(sc, 24, rf24); 3251 3252 /* enable baseband loopback mode */ 3253 run_rt3070_rf_read(sc, 22, &rf22); 3254 run_rt3070_rf_write(sc, 22, rf22 | 0x01); 3255 3256 /* set power and frequency of passband test tone */ 3257 run_bbp_write(sc, 24, 0x00); 3258 for (ntries = 0; ntries < 100; ntries++) { 3259 /* transmit test tone */ 3260 run_bbp_write(sc, 25, 0x90); 3261 DELAY(1000); 3262 /* read received power */ 3263 run_bbp_read(sc, 55, &bbp55_pb); 3264 if (bbp55_pb != 0) 3265 break; 3266 } 3267 if (ntries == 100) 3268 return (ETIMEDOUT); 3269 3270 /* set power and frequency of stopband test tone */ 3271 run_bbp_write(sc, 24, 0x06); 3272 for (ntries = 0; ntries < 100; ntries++) { 3273 /* transmit test tone */ 3274 run_bbp_write(sc, 25, 0x90); 3275 DELAY(1000); 3276 /* read received power */ 3277 run_bbp_read(sc, 55, &bbp55_sb); 3278 3279 delta = bbp55_pb - bbp55_sb; 3280 if (delta > target) 3281 break; 3282 3283 /* reprogram filter */ 3284 rf24++; 3285 run_rt3070_rf_write(sc, 24, rf24); 3286 } 3287 if (ntries < 100) { 3288 if (rf24 != init) 3289 rf24--; /* backtrack */ 3290 *val = rf24; 3291 run_rt3070_rf_write(sc, 24, rf24); 3292 } 3293 3294 /* restore initial state */ 3295 run_bbp_write(sc, 24, 0x00); 3296 3297 /* disable baseband loopback mode */ 3298 run_rt3070_rf_read(sc, 22, &rf22); 3299 run_rt3070_rf_write(sc, 22, rf22 & ~0x01); 3300 3301 return (0); 3302 } 3303 3304 static void 3305 run_rt3070_rf_setup(struct run_softc *sc) 3306 { 3307 uint8_t bbp, rf; 3308 int i; 3309 3310 if (sc->mac_ver == 0x3572) { 3311 /* enable DC filter */ 3312 if (sc->mac_rev >= 0x0201) 3313 run_bbp_write(sc, 103, 0xc0); 3314 3315 run_bbp_read(sc, 138, &bbp); 3316 if (sc->ntxchains == 1) 3317 bbp |= 0x20; /* turn off DAC1 */ 3318 if (sc->nrxchains == 1) 3319 bbp &= ~0x02; /* turn off ADC1 */ 3320 run_bbp_write(sc, 138, bbp); 3321 3322 if (sc->mac_rev >= 0x0211) { 3323 /* improve power consumption */ 3324 run_bbp_read(sc, 31, &bbp); 3325 run_bbp_write(sc, 31, bbp & ~0x03); 3326 } 3327 3328 run_rt3070_rf_read(sc, 16, &rf); 3329 rf = (rf & ~0x07) | sc->txmixgain_2ghz; 3330 run_rt3070_rf_write(sc, 16, rf); 3331 } else if (sc->mac_ver == 0x3071) { 3332 /* enable DC filter */ 3333 if (sc->mac_rev >= 0x0201) 3334 run_bbp_write(sc, 103, 0xc0); 3335 3336 run_bbp_read(sc, 138, &bbp); 3337 if (sc->ntxchains == 1) 3338 bbp |= 0x20; /* turn off DAC1 */ 3339 if (sc->nrxchains == 1) 3340 bbp &= ~0x02; /* turn off ADC1 */ 3341 run_bbp_write(sc, 138, bbp); 3342 3343 if (sc->mac_rev >= 0x0211) { 3344 /* improve power consumption */ 3345 run_bbp_read(sc, 31, &bbp); 3346 run_bbp_write(sc, 31, bbp & ~0x03); 3347 } 3348 3349 run_write(sc, RT2860_TX_SW_CFG1, 0); 3350 if (sc->mac_rev < 0x0211) { 3351 run_write(sc, RT2860_TX_SW_CFG2, 3352 sc->patch_dac ? 0x2c : 0x0f); 3353 } else 3354 run_write(sc, RT2860_TX_SW_CFG2, 0); 3355 } else if (sc->mac_ver == 0x3070) { 3356 if (sc->mac_rev >= 0x0201) { 3357 /* enable DC filter */ 3358 run_bbp_write(sc, 103, 0xc0); 3359 3360 /* improve power consumption */ 3361 run_bbp_read(sc, 31, &bbp); 3362 run_bbp_write(sc, 31, bbp & ~0x03); 3363 } 3364 3365 if (sc->mac_rev < 0x0211) { 3366 run_write(sc, RT2860_TX_SW_CFG1, 0); 3367 run_write(sc, RT2860_TX_SW_CFG2, 0x2c); 3368 } else 3369 run_write(sc, RT2860_TX_SW_CFG2, 0); 3370 } 3371 3372 /* initialize RF registers from ROM for >=RT3071*/ 3373 if (sc->mac_ver >= 0x3071) { 3374 for (i = 0; i < 10; i++) { 3375 if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff) 3376 continue; 3377 run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val); 3378 } 3379 } 3380 } 3381 3382 static int 3383 run_txrx_enable(struct run_softc *sc) 3384 { 3385 uint32_t tmp; 3386 int error, ntries; 3387 3388 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN); 3389 for (ntries = 0; ntries < 200; ntries++) { 3390 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3391 return (error); 3392 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3393 break; 3394 DELAY(1000); 3395 } 3396 if (ntries == 200) 3397 return (ETIMEDOUT); 3398 3399 DELAY(50); 3400 3401 tmp |= RT2860_RX_DMA_EN | RT2860_TX_DMA_EN | RT2860_TX_WB_DDONE; 3402 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3403 3404 /* enable Rx bulk aggregation (set timeout and limit) */ 3405 tmp = RT2860_USB_TX_EN | RT2860_USB_RX_EN | RT2860_USB_RX_AGG_EN | 3406 RT2860_USB_RX_AGG_TO(128) | RT2860_USB_RX_AGG_LMT(2); 3407 run_write(sc, RT2860_USB_DMA_CFG, tmp); 3408 3409 /* set Rx filter */ 3410 tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR; 3411 if (sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR) { 3412 tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL | 3413 RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK | 3414 RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV | 3415 RT2860_DROP_CFACK | RT2860_DROP_CFEND; 3416 if (sc->sc_ic.ic_opmode == IEEE80211_M_STA) 3417 tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL; 3418 } 3419 run_write(sc, RT2860_RX_FILTR_CFG, tmp); 3420 3421 run_write(sc, RT2860_MAC_SYS_CTRL, 3422 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3423 3424 return (0); 3425 } 3426 3427 static int 3428 run_init(struct ifnet *ifp) 3429 { 3430 struct run_softc *sc = ifp->if_softc; 3431 struct ieee80211com *ic = &sc->sc_ic; 3432 uint32_t tmp; 3433 uint8_t bbp1, bbp3; 3434 int i, error, qid, ridx, ntries; 3435 3436 for (ntries = 0; ntries < 100; ntries++) { 3437 if ((error = run_read(sc, RT2860_ASIC_VER_ID, &tmp)) != 0) 3438 goto fail; 3439 if (tmp != 0 && tmp != 0xffffffff) 3440 break; 3441 DELAY(10); 3442 } 3443 if (ntries == 100) { 3444 error = ETIMEDOUT; 3445 goto fail; 3446 } 3447 3448 if ((sc->sc_flags & RUN_FWLOADED) == 0 && 3449 (error = run_load_microcode(sc)) != 0) { 3450 aprint_error_dev(sc->sc_dev, 3451 "could not load 8051 microcode\n"); 3452 goto fail; 3453 } 3454 3455 if (ifp->if_flags & IFF_RUNNING) 3456 run_stop(ifp, 0); 3457 3458 /* init host command ring */ 3459 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 3460 3461 /* init Tx rings (4 EDCAs) */ 3462 for (qid = 0; qid < 4; qid++) { 3463 if ((error = run_alloc_tx_ring(sc, qid)) != 0) 3464 goto fail; 3465 } 3466 /* init Rx ring */ 3467 if ((error = run_alloc_rx_ring(sc)) != 0) 3468 goto fail; 3469 3470 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 3471 run_set_macaddr(sc, ic->ic_myaddr); 3472 3473 for (ntries = 0; ntries < 100; ntries++) { 3474 if ((error = run_read(sc, RT2860_WPDMA_GLO_CFG, &tmp)) != 0) 3475 goto fail; 3476 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0) 3477 break; 3478 DELAY(1000); 3479 } 3480 if (ntries == 100) { 3481 aprint_error_dev(sc->sc_dev, 3482 "timeout waiting for DMA engine\n"); 3483 error = ETIMEDOUT; 3484 goto fail; 3485 } 3486 tmp &= 0xff0; 3487 tmp |= RT2860_TX_WB_DDONE; 3488 run_write(sc, RT2860_WPDMA_GLO_CFG, tmp); 3489 3490 /* turn off PME_OEN to solve high-current issue */ 3491 run_read(sc, RT2860_SYS_CTRL, &tmp); 3492 run_write(sc, RT2860_SYS_CTRL, tmp & ~RT2860_PME_OEN); 3493 3494 run_write(sc, RT2860_MAC_SYS_CTRL, 3495 RT2860_BBP_HRST | RT2860_MAC_SRST); 3496 run_write(sc, RT2860_USB_DMA_CFG, 0); 3497 3498 if ((error = run_reset(sc)) != 0) { 3499 aprint_error_dev(sc->sc_dev, "could not reset chipset\n"); 3500 goto fail; 3501 } 3502 3503 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3504 3505 /* init Tx power for all Tx rates (from EEPROM) */ 3506 for (ridx = 0; ridx < 5; ridx++) { 3507 if (sc->txpow20mhz[ridx] == 0xffffffff) 3508 continue; 3509 run_write(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]); 3510 } 3511 3512 for (i = 0; i < (int)__arraycount(rt2870_def_mac); i++) 3513 run_write(sc, rt2870_def_mac[i].reg, rt2870_def_mac[i].val); 3514 run_write(sc, RT2860_WMM_AIFSN_CFG, 0x00002273); 3515 run_write(sc, RT2860_WMM_CWMIN_CFG, 0x00002344); 3516 run_write(sc, RT2860_WMM_CWMAX_CFG, 0x000034aa); 3517 3518 if (sc->mac_ver >= 0x3070) { 3519 /* set delay of PA_PE assertion to 1us (unit of 0.25us) */ 3520 run_write(sc, RT2860_TX_SW_CFG0, 3521 4 << RT2860_DLY_PAPE_EN_SHIFT); 3522 } 3523 3524 /* wait while MAC is busy */ 3525 for (ntries = 0; ntries < 100; ntries++) { 3526 if ((error = run_read(sc, RT2860_MAC_STATUS_REG, &tmp)) != 0) 3527 goto fail; 3528 if (!(tmp & (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY))) 3529 break; 3530 DELAY(1000); 3531 } 3532 if (ntries == 100) { 3533 error = ETIMEDOUT; 3534 goto fail; 3535 } 3536 3537 /* clear Host to MCU mailbox */ 3538 run_write(sc, RT2860_H2M_BBPAGENT, 0); 3539 run_write(sc, RT2860_H2M_MAILBOX, 0); 3540 DELAY(1000); 3541 3542 if ((error = run_bbp_init(sc)) != 0) { 3543 aprint_error_dev(sc->sc_dev, "could not initialize BBP\n"); 3544 goto fail; 3545 } 3546 3547 run_read(sc, RT2860_BCN_TIME_CFG, &tmp); 3548 tmp &= ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN | 3549 RT2860_TBTT_TIMER_EN); 3550 run_write(sc, RT2860_BCN_TIME_CFG, tmp); 3551 3552 /* clear RX WCID search table */ 3553 run_set_region_4(sc, RT2860_WCID_ENTRY(0), 0, 512); 3554 /* clear Pair-wise key table */ 3555 run_set_region_4(sc, RT2860_PKEY(0), 0, 2048); 3556 /* clear IV/EIV table */ 3557 run_set_region_4(sc, RT2860_IVEIV(0), 0, 512); 3558 /* clear WCID attribute table */ 3559 run_set_region_4(sc, RT2860_WCID_ATTR(0), 0, 8 * 32); 3560 /* clear shared key table */ 3561 run_set_region_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32); 3562 /* clear shared key mode */ 3563 run_set_region_4(sc, RT2860_SKEY_MODE_0_7, 0, 4); 3564 3565 run_read(sc, RT2860_US_CYC_CNT, &tmp); 3566 tmp = (tmp & ~0xff) | 0x1e; 3567 run_write(sc, RT2860_US_CYC_CNT, tmp); 3568 3569 if (sc->mac_rev != 0x0101) 3570 run_write(sc, RT2860_TXOP_CTRL_CFG, 0x0000583f); 3571 3572 run_write(sc, RT2860_WMM_TXOP0_CFG, 0); 3573 run_write(sc, RT2860_WMM_TXOP1_CFG, 48 << 16 | 96); 3574 3575 /* write vendor-specific BBP values (from EEPROM) */ 3576 for (i = 0; i < 8; i++) { 3577 if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff) 3578 continue; 3579 run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val); 3580 } 3581 3582 /* select Main antenna for 1T1R devices */ 3583 if (sc->rf_rev == RT3070_RF_3020) 3584 run_set_rx_antenna(sc, 0); 3585 3586 /* send LEDs operating mode to microcontroller */ 3587 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0]); 3588 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1]); 3589 (void)run_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2]); 3590 3591 if (sc->mac_ver >= 0x3070) 3592 run_rt3070_rf_init(sc); 3593 3594 /* disable non-existing Rx chains */ 3595 run_bbp_read(sc, 3, &bbp3); 3596 bbp3 &= ~(1 << 3 | 1 << 4); 3597 if (sc->nrxchains == 2) 3598 bbp3 |= 1 << 3; 3599 else if (sc->nrxchains == 3) 3600 bbp3 |= 1 << 4; 3601 run_bbp_write(sc, 3, bbp3); 3602 3603 /* disable non-existing Tx chains */ 3604 run_bbp_read(sc, 1, &bbp1); 3605 if (sc->ntxchains == 1) 3606 bbp1 &= ~(1 << 3 | 1 << 4); 3607 run_bbp_write(sc, 1, bbp1); 3608 3609 if (sc->mac_ver >= 0x3070) 3610 run_rt3070_rf_setup(sc); 3611 3612 /* select default channel */ 3613 run_set_chan(sc, ic->ic_curchan); 3614 3615 /* turn radio LED on */ 3616 run_set_leds(sc, RT2860_LED_RADIO); 3617 3618 #ifdef RUN_HWCRYPTO 3619 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 3620 /* install WEP keys */ 3621 for (i = 0; i < IEEE80211_WEP_NKID; i++) 3622 (void)run_set_key(ic, &ic->ic_crypto.cs_nw_keys[i], 3623 NULL); 3624 } 3625 #endif 3626 3627 for (i = 0; i < RUN_RX_RING_COUNT; i++) { 3628 struct run_rx_data *data = &sc->rxq.data[i]; 3629 3630 usbd_setup_xfer(data->xfer, sc->rxq.pipeh, data, data->buf, 3631 RUN_MAX_RXSZ, USBD_SHORT_XFER_OK | USBD_NO_COPY, 3632 USBD_NO_TIMEOUT, run_rxeof); 3633 error = usbd_transfer(data->xfer); 3634 if (error != USBD_NORMAL_COMPLETION && 3635 error != USBD_IN_PROGRESS) 3636 goto fail; 3637 } 3638 3639 if ((error = run_txrx_enable(sc)) != 0) 3640 goto fail; 3641 3642 ifp->if_flags &= ~IFF_OACTIVE; 3643 ifp->if_flags |= IFF_RUNNING; 3644 3645 if (ic->ic_opmode == IEEE80211_M_MONITOR) 3646 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 3647 else 3648 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 3649 3650 if (error != 0) 3651 fail: run_stop(ifp, 1); 3652 return (error); 3653 } 3654 3655 static void 3656 run_stop(struct ifnet *ifp, int disable) 3657 { 3658 struct run_softc *sc = ifp->if_softc; 3659 struct ieee80211com *ic = &sc->sc_ic; 3660 uint32_t tmp; 3661 int ntries, qid; 3662 3663 if (ifp->if_flags & IFF_RUNNING) 3664 run_set_leds(sc, 0); /* turn all LEDs off */ 3665 3666 sc->sc_tx_timer = 0; 3667 ifp->if_timer = 0; 3668 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 3669 3670 callout_stop(&sc->scan_to); 3671 callout_stop(&sc->calib_to); 3672 3673 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 3674 /* wait for all queued asynchronous commands to complete */ 3675 while (sc->cmdq.queued > 0) 3676 tsleep(&sc->cmdq, 0, "cmdq", 0); 3677 3678 /* disable Tx/Rx */ 3679 run_read(sc, RT2860_MAC_SYS_CTRL, &tmp); 3680 tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN); 3681 run_write(sc, RT2860_MAC_SYS_CTRL, tmp); 3682 3683 /* wait for pending Tx to complete */ 3684 for (ntries = 0; ntries < 100; ntries++) { 3685 if (run_read(sc, RT2860_TXRXQ_PCNT, &tmp) != 0) 3686 break; 3687 if ((tmp & RT2860_TX2Q_PCNT_MASK) == 0) 3688 break; 3689 } 3690 DELAY(1000); 3691 run_write(sc, RT2860_USB_DMA_CFG, 0); 3692 3693 /* reset adapter */ 3694 run_write(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST); 3695 run_write(sc, RT2860_MAC_SYS_CTRL, 0); 3696 3697 /* reset Tx and Rx rings */ 3698 sc->qfullmsk = 0; 3699 for (qid = 0; qid < 4; qid++) 3700 run_free_tx_ring(sc, qid); 3701 run_free_rx_ring(sc); 3702 } 3703 3704 #ifndef IEEE80211_STA_ONLY 3705 static int 3706 run_setup_beacon(struct run_softc *sc) 3707 { 3708 struct ieee80211com *ic = &sc->sc_ic; 3709 struct rt2860_txwi txwi; 3710 struct mbuf *m; 3711 int ridx; 3712 3713 if ((m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo)) == NULL) 3714 return (ENOBUFS); 3715 3716 memset(&txwi, 0, sizeof txwi); 3717 txwi.wcid = 0xff; 3718 txwi.len = htole16(m->m_pkthdr.len); 3719 /* send beacons at the lowest available rate */ 3720 ridx = (ic->ic_curmode == IEEE80211_MODE_11A) ? 3721 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1; 3722 txwi.phy = htole16(rt2860_rates[ridx].mcs); 3723 if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM) 3724 txwi.phy |= htole16(RT2860_PHY_OFDM); 3725 txwi.txop = RT2860_TX_TXOP_HT; 3726 txwi.flags = RT2860_TX_TS; 3727 3728 run_write_region_1(sc, RT2860_BCN_BASE(0), 3729 (uint8_t *)&txwi, sizeof txwi); 3730 run_write_region_1(sc, RT2860_BCN_BASE(0) + sizeof txwi, 3731 mtod(m, uint8_t *), m->m_pkthdr.len); 3732 3733 m_freem(m); 3734 3735 return (0); 3736 } 3737 #endif 3738 3739 MODULE(MODULE_CLASS_DRIVER, if_run, "bpf"); 3740 3741 #ifdef _MODULE 3742 #include "ioconf.c" 3743 #endif 3744 3745 static int 3746 if_run_modcmd(modcmd_t cmd, void *arg) 3747 { 3748 int error = 0; 3749 3750 switch (cmd) { 3751 case MODULE_CMD_INIT: 3752 #ifdef _MODULE 3753 error = config_init_component(cfdriver_ioconf_run, 3754 cfattach_ioconf_run, cfdata_ioconf_run); 3755 #endif 3756 return (error); 3757 case MODULE_CMD_FINI: 3758 #ifdef _MODULE 3759 error = config_fini_component(cfdriver_ioconf_run, 3760 cfattach_ioconf_run, cfdata_ioconf_run); 3761 #endif 3762 return (error); 3763 default: 3764 return (ENOTTY); 3765 } 3766 } 3767
Indexes created Thu Oct 02 10:09:58 GMT 2025