if_smsc.c revision 1.19.2.3 1 1.19.2.3 snj /* $NetBSD: if_smsc.c,v 1.19.2.3 2017/04/05 19:54:19 snj Exp $ */
2 1.1 skrll
3 1.1 skrll /* $OpenBSD: if_smsc.c,v 1.4 2012/09/27 12:38:11 jsg Exp $ */
4 1.1 skrll /* $FreeBSD: src/sys/dev/usb/net/if_smsc.c,v 1.1 2012/08/15 04:03:55 gonzo Exp $ */
5 1.1 skrll /*-
6 1.1 skrll * Copyright (c) 2012
7 1.1 skrll * Ben Gray <bgray (at) freebsd.org>.
8 1.1 skrll * All rights reserved.
9 1.1 skrll *
10 1.1 skrll * Redistribution and use in source and binary forms, with or without
11 1.1 skrll * modification, are permitted provided that the following conditions
12 1.1 skrll * are met:
13 1.1 skrll * 1. Redistributions of source code must retain the above copyright
14 1.1 skrll * notice, this list of conditions and the following disclaimer.
15 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 skrll * notice, this list of conditions and the following disclaimer in the
17 1.1 skrll * documentation and/or other materials provided with the distribution.
18 1.1 skrll *
19 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 1.1 skrll * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 1.1 skrll * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 1.1 skrll * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 1.1 skrll * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 1.1 skrll * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 1.1 skrll */
30 1.1 skrll
31 1.1 skrll /*
32 1.1 skrll * SMSC LAN9xxx devices (http://www.smsc.com/)
33 1.1 skrll *
34 1.1 skrll * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that
35 1.1 skrll * support USB 2.0 and 10/100 Mbps Ethernet.
36 1.1 skrll *
37 1.1 skrll * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter.
38 1.1 skrll * The driver only covers the Ethernet part, the standard USB hub driver
39 1.1 skrll * supports the hub part.
40 1.1 skrll *
41 1.1 skrll * This driver is closely modelled on the Linux driver written and copyrighted
42 1.1 skrll * by SMSC.
43 1.1 skrll *
44 1.1 skrll * H/W TCP & UDP Checksum Offloading
45 1.1 skrll * ---------------------------------
46 1.1 skrll * The chip supports both tx and rx offloading of UDP & TCP checksums, this
47 1.1 skrll * feature can be dynamically enabled/disabled.
48 1.1 skrll *
49 1.1 skrll * RX checksuming is performed across bytes after the IPv4 header to the end of
50 1.1 skrll * the Ethernet frame, this means if the frame is padded with non-zero values
51 1.1 skrll * the H/W checksum will be incorrect, however the rx code compensates for this.
52 1.1 skrll *
53 1.1 skrll * TX checksuming is more complicated, the device requires a special header to
54 1.1 skrll * be prefixed onto the start of the frame which indicates the start and end
55 1.1 skrll * positions of the UDP or TCP frame. This requires the driver to manually
56 1.1 skrll * go through the packet data and decode the headers prior to sending.
57 1.1 skrll * On Linux they generally provide cues to the location of the csum and the
58 1.1 skrll * area to calculate it over, on FreeBSD we seem to have to do it all ourselves,
59 1.8 skrll * hence this is not as optimal and therefore h/w TX checksum is currently not
60 1.1 skrll * implemented.
61 1.1 skrll */
62 1.1 skrll
63 1.12 skrll #ifdef _KERNEL_OPT
64 1.19.2.3 snj #include "opt_usb.h"
65 1.12 skrll #include "opt_inet.h"
66 1.12 skrll #endif
67 1.1 skrll
68 1.1 skrll #include <sys/param.h>
69 1.1 skrll #include <sys/bus.h>
70 1.1 skrll #include <sys/systm.h>
71 1.1 skrll #include <sys/sockio.h>
72 1.1 skrll #include <sys/mbuf.h>
73 1.1 skrll #include <sys/mutex.h>
74 1.1 skrll #include <sys/kernel.h>
75 1.1 skrll #include <sys/proc.h>
76 1.1 skrll #include <sys/socket.h>
77 1.1 skrll
78 1.1 skrll #include <sys/device.h>
79 1.1 skrll
80 1.1 skrll #include <sys/rnd.h>
81 1.1 skrll
82 1.1 skrll #include <net/if.h>
83 1.1 skrll #include <net/if_dl.h>
84 1.1 skrll #include <net/if_media.h>
85 1.1 skrll #include <net/if_ether.h>
86 1.1 skrll
87 1.1 skrll #include <net/bpf.h>
88 1.1 skrll
89 1.1 skrll #ifdef INET
90 1.1 skrll #include <netinet/in.h>
91 1.12 skrll #include <netinet/if_inarp.h>
92 1.1 skrll #endif
93 1.1 skrll
94 1.1 skrll #include <dev/mii/mii.h>
95 1.1 skrll #include <dev/mii/miivar.h>
96 1.1 skrll
97 1.1 skrll #include <dev/usb/usb.h>
98 1.1 skrll #include <dev/usb/usbdi.h>
99 1.1 skrll #include <dev/usb/usbdi_util.h>
100 1.1 skrll #include <dev/usb/usbdivar.h>
101 1.1 skrll #include <dev/usb/usbdevs.h>
102 1.1 skrll
103 1.1 skrll #include <dev/usb/if_smscreg.h>
104 1.1 skrll #include <dev/usb/if_smscvar.h>
105 1.1 skrll
106 1.1 skrll #include "ioconf.h"
107 1.1 skrll
108 1.1 skrll #ifdef USB_DEBUG
109 1.1 skrll int smsc_debug = 0;
110 1.1 skrll #endif
111 1.1 skrll
112 1.13 mlelstv #define ETHER_ALIGN 2
113 1.1 skrll /*
114 1.1 skrll * Various supported device vendors/products.
115 1.1 skrll */
116 1.1 skrll static const struct usb_devno smsc_devs[] = {
117 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN89530 },
118 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN9530 },
119 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN9730 },
120 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500 },
121 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500A },
122 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500A_ALT },
123 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500A_HAL },
124 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500A_SAL10 },
125 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500_ALT },
126 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500_SAL10 },
127 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505 },
128 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505A },
129 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505A_HAL },
130 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505A_SAL10 },
131 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505_SAL10 },
132 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9512_14 },
133 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9512_14_ALT },
134 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9512_14_SAL10 }
135 1.1 skrll };
136 1.1 skrll
137 1.1 skrll #ifdef USB_DEBUG
138 1.1 skrll #define smsc_dbg_printf(sc, fmt, args...) \
139 1.1 skrll do { \
140 1.1 skrll if (smsc_debug > 0) \
141 1.1 skrll printf("debug: " fmt, ##args); \
142 1.1 skrll } while(0)
143 1.1 skrll #else
144 1.1 skrll #define smsc_dbg_printf(sc, fmt, args...)
145 1.1 skrll #endif
146 1.1 skrll
147 1.1 skrll #define smsc_warn_printf(sc, fmt, args...) \
148 1.1 skrll printf("%s: warning: " fmt, device_xname((sc)->sc_dev), ##args)
149 1.1 skrll
150 1.1 skrll #define smsc_err_printf(sc, fmt, args...) \
151 1.1 skrll printf("%s: error: " fmt, device_xname((sc)->sc_dev), ##args)
152 1.1 skrll
153 1.1 skrll /* Function declarations */
154 1.1 skrll int smsc_chip_init(struct smsc_softc *);
155 1.1 skrll void smsc_setmulti(struct smsc_softc *);
156 1.1 skrll int smsc_setmacaddress(struct smsc_softc *, const uint8_t *);
157 1.1 skrll
158 1.1 skrll int smsc_match(device_t, cfdata_t, void *);
159 1.1 skrll void smsc_attach(device_t, device_t, void *);
160 1.1 skrll int smsc_detach(device_t, int);
161 1.1 skrll int smsc_activate(device_t, enum devact);
162 1.1 skrll
163 1.1 skrll int smsc_init(struct ifnet *);
164 1.19.2.3 snj int smsc_init_locked(struct ifnet *);
165 1.1 skrll void smsc_start(struct ifnet *);
166 1.19.2.3 snj void smsc_start_locked(struct ifnet *);
167 1.1 skrll int smsc_ioctl(struct ifnet *, u_long, void *);
168 1.1 skrll void smsc_stop(struct ifnet *, int);
169 1.19.2.3 snj void smsc_stop_locked(struct ifnet *, int);
170 1.1 skrll
171 1.1 skrll void smsc_reset(struct smsc_softc *);
172 1.1 skrll struct mbuf *smsc_newbuf(void);
173 1.1 skrll
174 1.1 skrll void smsc_tick(void *);
175 1.1 skrll void smsc_tick_task(void *);
176 1.1 skrll void smsc_miibus_statchg(struct ifnet *);
177 1.1 skrll int smsc_miibus_readreg(device_t, int, int);
178 1.1 skrll void smsc_miibus_writereg(device_t, int, int, int);
179 1.1 skrll int smsc_ifmedia_upd(struct ifnet *);
180 1.1 skrll void smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *);
181 1.1 skrll void smsc_lock_mii(struct smsc_softc *);
182 1.1 skrll void smsc_unlock_mii(struct smsc_softc *);
183 1.1 skrll
184 1.1 skrll int smsc_tx_list_init(struct smsc_softc *);
185 1.19.2.3 snj void smsc_tx_list_free(struct smsc_softc *);
186 1.1 skrll int smsc_rx_list_init(struct smsc_softc *);
187 1.19.2.3 snj void smsc_rx_list_free(struct smsc_softc *);
188 1.1 skrll int smsc_encap(struct smsc_softc *, struct mbuf *, int);
189 1.19.2.3 snj void smsc_rxeof(struct usbd_xfer *, void *, usbd_status);
190 1.19.2.3 snj void smsc_txeof(struct usbd_xfer *, void *, usbd_status);
191 1.1 skrll
192 1.1 skrll int smsc_read_reg(struct smsc_softc *, uint32_t, uint32_t *);
193 1.1 skrll int smsc_write_reg(struct smsc_softc *, uint32_t, uint32_t);
194 1.1 skrll int smsc_wait_for_bits(struct smsc_softc *, uint32_t, uint32_t);
195 1.1 skrll int smsc_sethwcsum(struct smsc_softc *);
196 1.1 skrll
197 1.1 skrll CFATTACH_DECL_NEW(usmsc, sizeof(struct smsc_softc), smsc_match, smsc_attach,
198 1.1 skrll smsc_detach, smsc_activate);
199 1.1 skrll
200 1.1 skrll int
201 1.1 skrll smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data)
202 1.1 skrll {
203 1.1 skrll usb_device_request_t req;
204 1.1 skrll uint32_t buf;
205 1.1 skrll usbd_status err;
206 1.1 skrll
207 1.1 skrll req.bmRequestType = UT_READ_VENDOR_DEVICE;
208 1.1 skrll req.bRequest = SMSC_UR_READ_REG;
209 1.1 skrll USETW(req.wValue, 0);
210 1.1 skrll USETW(req.wIndex, off);
211 1.1 skrll USETW(req.wLength, 4);
212 1.1 skrll
213 1.1 skrll err = usbd_do_request(sc->sc_udev, &req, &buf);
214 1.1 skrll if (err != 0)
215 1.1 skrll smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off);
216 1.1 skrll
217 1.1 skrll *data = le32toh(buf);
218 1.1 skrll
219 1.19.2.3 snj return err;
220 1.1 skrll }
221 1.1 skrll
222 1.1 skrll int
223 1.1 skrll smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data)
224 1.1 skrll {
225 1.1 skrll usb_device_request_t req;
226 1.1 skrll uint32_t buf;
227 1.1 skrll usbd_status err;
228 1.1 skrll
229 1.1 skrll buf = htole32(data);
230 1.1 skrll
231 1.1 skrll req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
232 1.1 skrll req.bRequest = SMSC_UR_WRITE_REG;
233 1.1 skrll USETW(req.wValue, 0);
234 1.1 skrll USETW(req.wIndex, off);
235 1.1 skrll USETW(req.wLength, 4);
236 1.1 skrll
237 1.1 skrll err = usbd_do_request(sc->sc_udev, &req, &buf);
238 1.1 skrll if (err != 0)
239 1.1 skrll smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off);
240 1.1 skrll
241 1.19.2.3 snj return err;
242 1.1 skrll }
243 1.1 skrll
244 1.1 skrll int
245 1.1 skrll smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits)
246 1.1 skrll {
247 1.1 skrll uint32_t val;
248 1.1 skrll int err, i;
249 1.1 skrll
250 1.1 skrll for (i = 0; i < 100; i++) {
251 1.1 skrll if ((err = smsc_read_reg(sc, reg, &val)) != 0)
252 1.19.2.3 snj return err;
253 1.1 skrll if (!(val & bits))
254 1.19.2.3 snj return 0;
255 1.1 skrll DELAY(5);
256 1.1 skrll }
257 1.1 skrll
258 1.19.2.3 snj return 1;
259 1.1 skrll }
260 1.1 skrll
261 1.1 skrll int
262 1.1 skrll smsc_miibus_readreg(device_t dev, int phy, int reg)
263 1.1 skrll {
264 1.1 skrll struct smsc_softc *sc = device_private(dev);
265 1.1 skrll uint32_t addr;
266 1.1 skrll uint32_t val = 0;
267 1.1 skrll
268 1.1 skrll smsc_lock_mii(sc);
269 1.1 skrll if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
270 1.1 skrll smsc_warn_printf(sc, "MII is busy\n");
271 1.1 skrll goto done;
272 1.1 skrll }
273 1.1 skrll
274 1.1 skrll addr = (phy << 11) | (reg << 6) | SMSC_MII_READ;
275 1.1 skrll smsc_write_reg(sc, SMSC_MII_ADDR, addr);
276 1.1 skrll
277 1.1 skrll if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
278 1.1 skrll smsc_warn_printf(sc, "MII read timeout\n");
279 1.1 skrll
280 1.1 skrll smsc_read_reg(sc, SMSC_MII_DATA, &val);
281 1.3 skrll
282 1.3 skrll done:
283 1.1 skrll smsc_unlock_mii(sc);
284 1.1 skrll
285 1.19.2.3 snj return val & 0xFFFF;
286 1.1 skrll }
287 1.1 skrll
288 1.1 skrll void
289 1.1 skrll smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
290 1.1 skrll {
291 1.1 skrll struct smsc_softc *sc = device_private(dev);
292 1.1 skrll uint32_t addr;
293 1.1 skrll
294 1.1 skrll if (sc->sc_phyno != phy)
295 1.1 skrll return;
296 1.1 skrll
297 1.1 skrll smsc_lock_mii(sc);
298 1.1 skrll if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
299 1.1 skrll smsc_warn_printf(sc, "MII is busy\n");
300 1.5 skrll smsc_unlock_mii(sc);
301 1.1 skrll return;
302 1.1 skrll }
303 1.1 skrll
304 1.1 skrll smsc_write_reg(sc, SMSC_MII_DATA, val);
305 1.1 skrll
306 1.1 skrll addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE;
307 1.1 skrll smsc_write_reg(sc, SMSC_MII_ADDR, addr);
308 1.1 skrll smsc_unlock_mii(sc);
309 1.1 skrll
310 1.1 skrll if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
311 1.1 skrll smsc_warn_printf(sc, "MII write timeout\n");
312 1.1 skrll }
313 1.1 skrll
314 1.1 skrll void
315 1.1 skrll smsc_miibus_statchg(struct ifnet *ifp)
316 1.1 skrll {
317 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
318 1.1 skrll struct mii_data *mii = &sc->sc_mii;
319 1.1 skrll int err;
320 1.1 skrll uint32_t flow;
321 1.1 skrll uint32_t afc_cfg;
322 1.1 skrll
323 1.1 skrll if (mii == NULL || ifp == NULL ||
324 1.1 skrll (ifp->if_flags & IFF_RUNNING) == 0)
325 1.1 skrll return;
326 1.1 skrll
327 1.1 skrll /* Use the MII status to determine link status */
328 1.1 skrll sc->sc_flags &= ~SMSC_FLAG_LINK;
329 1.1 skrll if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
330 1.1 skrll (IFM_ACTIVE | IFM_AVALID)) {
331 1.1 skrll switch (IFM_SUBTYPE(mii->mii_media_active)) {
332 1.1 skrll case IFM_10_T:
333 1.1 skrll case IFM_100_TX:
334 1.1 skrll sc->sc_flags |= SMSC_FLAG_LINK;
335 1.1 skrll break;
336 1.1 skrll case IFM_1000_T:
337 1.1 skrll /* Gigabit ethernet not supported by chipset */
338 1.1 skrll break;
339 1.1 skrll default:
340 1.1 skrll break;
341 1.1 skrll }
342 1.1 skrll }
343 1.1 skrll
344 1.1 skrll /* Lost link, do nothing. */
345 1.1 skrll if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
346 1.1 skrll smsc_dbg_printf(sc, "link flag not set\n");
347 1.1 skrll return;
348 1.1 skrll }
349 1.1 skrll
350 1.1 skrll err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg);
351 1.1 skrll if (err) {
352 1.1 skrll smsc_warn_printf(sc, "failed to read initial AFC_CFG, "
353 1.1 skrll "error %d\n", err);
354 1.1 skrll return;
355 1.1 skrll }
356 1.1 skrll
357 1.1 skrll /* Enable/disable full duplex operation and TX/RX pause */
358 1.1 skrll if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
359 1.1 skrll smsc_dbg_printf(sc, "full duplex operation\n");
360 1.1 skrll sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN;
361 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX;
362 1.1 skrll
363 1.1 skrll if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
364 1.1 skrll flow = 0xffff0002;
365 1.1 skrll else
366 1.1 skrll flow = 0;
367 1.1 skrll
368 1.1 skrll if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
369 1.1 skrll afc_cfg |= 0xf;
370 1.1 skrll else
371 1.1 skrll afc_cfg &= ~0xf;
372 1.1 skrll
373 1.1 skrll } else {
374 1.1 skrll smsc_dbg_printf(sc, "half duplex operation\n");
375 1.1 skrll sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX;
376 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN;
377 1.1 skrll
378 1.1 skrll flow = 0;
379 1.1 skrll afc_cfg |= 0xf;
380 1.1 skrll }
381 1.1 skrll
382 1.1 skrll err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
383 1.1 skrll err += smsc_write_reg(sc, SMSC_FLOW, flow);
384 1.1 skrll err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg);
385 1.1 skrll if (err)
386 1.1 skrll smsc_warn_printf(sc, "media change failed, error %d\n", err);
387 1.1 skrll }
388 1.1 skrll
389 1.1 skrll int
390 1.1 skrll smsc_ifmedia_upd(struct ifnet *ifp)
391 1.1 skrll {
392 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
393 1.1 skrll struct mii_data *mii = &sc->sc_mii;
394 1.1 skrll int err;
395 1.1 skrll
396 1.1 skrll if (mii->mii_instance) {
397 1.1 skrll struct mii_softc *miisc;
398 1.1 skrll
399 1.1 skrll LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
400 1.1 skrll mii_phy_reset(miisc);
401 1.1 skrll }
402 1.1 skrll err = mii_mediachg(mii);
403 1.19.2.3 snj return err;
404 1.1 skrll }
405 1.1 skrll
406 1.1 skrll void
407 1.1 skrll smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
408 1.1 skrll {
409 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
410 1.1 skrll struct mii_data *mii = &sc->sc_mii;
411 1.1 skrll
412 1.1 skrll mii_pollstat(mii);
413 1.1 skrll
414 1.1 skrll ifmr->ifm_active = mii->mii_media_active;
415 1.1 skrll ifmr->ifm_status = mii->mii_media_status;
416 1.1 skrll }
417 1.1 skrll
418 1.1 skrll static inline uint32_t
419 1.1 skrll smsc_hash(uint8_t addr[ETHER_ADDR_LEN])
420 1.1 skrll {
421 1.1 skrll return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
422 1.1 skrll }
423 1.1 skrll
424 1.1 skrll void
425 1.1 skrll smsc_setmulti(struct smsc_softc *sc)
426 1.1 skrll {
427 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
428 1.1 skrll struct ether_multi *enm;
429 1.1 skrll struct ether_multistep step;
430 1.1 skrll uint32_t hashtbl[2] = { 0, 0 };
431 1.1 skrll uint32_t hash;
432 1.1 skrll
433 1.1 skrll if (sc->sc_dying)
434 1.1 skrll return;
435 1.1 skrll
436 1.1 skrll if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
437 1.1 skrll allmulti:
438 1.1 skrll smsc_dbg_printf(sc, "receive all multicast enabled\n");
439 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS;
440 1.1 skrll sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT;
441 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
442 1.1 skrll return;
443 1.1 skrll } else {
444 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT;
445 1.1 skrll sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS);
446 1.1 skrll }
447 1.1 skrll
448 1.1 skrll ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
449 1.1 skrll while (enm != NULL) {
450 1.1 skrll if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
451 1.1 skrll ETHER_ADDR_LEN) != 0)
452 1.1 skrll goto allmulti;
453 1.1 skrll
454 1.1 skrll hash = smsc_hash(enm->enm_addrlo);
455 1.1 skrll hashtbl[hash >> 5] |= 1 << (hash & 0x1F);
456 1.1 skrll ETHER_NEXT_MULTI(step, enm);
457 1.1 skrll }
458 1.1 skrll
459 1.1 skrll /* Debug */
460 1.1 skrll if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) {
461 1.1 skrll smsc_dbg_printf(sc, "receive select group of macs\n");
462 1.1 skrll } else {
463 1.1 skrll smsc_dbg_printf(sc, "receive own packets only\n");
464 1.1 skrll }
465 1.1 skrll
466 1.1 skrll /* Write the hash table and mac control registers */
467 1.1 skrll ifp->if_flags &= ~IFF_ALLMULTI;
468 1.1 skrll smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]);
469 1.1 skrll smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]);
470 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
471 1.1 skrll }
472 1.1 skrll
473 1.1 skrll int
474 1.1 skrll smsc_sethwcsum(struct smsc_softc *sc)
475 1.1 skrll {
476 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
477 1.1 skrll uint32_t val;
478 1.1 skrll int err;
479 1.1 skrll
480 1.1 skrll if (!ifp)
481 1.5 skrll return EIO;
482 1.1 skrll
483 1.1 skrll err = smsc_read_reg(sc, SMSC_COE_CTRL, &val);
484 1.1 skrll if (err != 0) {
485 1.1 skrll smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n",
486 1.1 skrll err);
487 1.19.2.3 snj return err;
488 1.1 skrll }
489 1.1 skrll
490 1.1 skrll /* Enable/disable the Rx checksum */
491 1.13 mlelstv if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx))
492 1.13 mlelstv val |= (SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);
493 1.1 skrll else
494 1.13 mlelstv val &= ~(SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);
495 1.1 skrll
496 1.1 skrll /* Enable/disable the Tx checksum (currently not supported) */
497 1.13 mlelstv if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Tx|IFCAP_CSUM_UDPv4_Tx))
498 1.1 skrll val |= SMSC_COE_CTRL_TX_EN;
499 1.1 skrll else
500 1.1 skrll val &= ~SMSC_COE_CTRL_TX_EN;
501 1.1 skrll
502 1.13 mlelstv sc->sc_coe_ctrl = val;
503 1.13 mlelstv
504 1.1 skrll err = smsc_write_reg(sc, SMSC_COE_CTRL, val);
505 1.1 skrll if (err != 0) {
506 1.1 skrll smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n",
507 1.1 skrll err);
508 1.19.2.3 snj return err;
509 1.1 skrll }
510 1.1 skrll
511 1.19.2.3 snj return 0;
512 1.1 skrll }
513 1.1 skrll
514 1.1 skrll int
515 1.1 skrll smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr)
516 1.1 skrll {
517 1.1 skrll int err;
518 1.1 skrll uint32_t val;
519 1.1 skrll
520 1.1 skrll smsc_dbg_printf(sc, "setting mac address to "
521 1.1 skrll "%02x:%02x:%02x:%02x:%02x:%02x\n",
522 1.1 skrll addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
523 1.1 skrll
524 1.1 skrll val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
525 1.1 skrll if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0)
526 1.1 skrll goto done;
527 1.1 skrll
528 1.1 skrll val = (addr[5] << 8) | addr[4];
529 1.1 skrll err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val);
530 1.1 skrll
531 1.1 skrll done:
532 1.19.2.3 snj return err;
533 1.1 skrll }
534 1.1 skrll
535 1.1 skrll void
536 1.1 skrll smsc_reset(struct smsc_softc *sc)
537 1.1 skrll {
538 1.1 skrll if (sc->sc_dying)
539 1.1 skrll return;
540 1.1 skrll
541 1.1 skrll /* Wait a little while for the chip to get its brains in order. */
542 1.1 skrll DELAY(1000);
543 1.1 skrll
544 1.1 skrll /* Reinitialize controller to achieve full reset. */
545 1.1 skrll smsc_chip_init(sc);
546 1.1 skrll }
547 1.1 skrll
548 1.1 skrll int
549 1.1 skrll smsc_init(struct ifnet *ifp)
550 1.1 skrll {
551 1.19.2.3 snj struct smsc_softc *sc = ifp->if_softc;
552 1.19.2.3 snj
553 1.19.2.3 snj mutex_enter(&sc->sc_lock);
554 1.19.2.3 snj int ret = smsc_init_locked(ifp);
555 1.19.2.3 snj mutex_exit(&sc->sc_lock);
556 1.19.2.3 snj
557 1.19.2.3 snj return ret;
558 1.19.2.3 snj }
559 1.19.2.3 snj
560 1.19.2.3 snj int
561 1.19.2.3 snj smsc_init_locked(struct ifnet *ifp)
562 1.19.2.3 snj {
563 1.19.2.3 snj struct smsc_softc * const sc = ifp->if_softc;
564 1.19.2.3 snj usbd_status err;
565 1.1 skrll
566 1.1 skrll if (sc->sc_dying)
567 1.1 skrll return EIO;
568 1.1 skrll
569 1.1 skrll /* Cancel pending I/O */
570 1.19.2.3 snj smsc_stop_locked(ifp, 1);
571 1.1 skrll
572 1.1 skrll /* Reset the ethernet interface. */
573 1.1 skrll smsc_reset(sc);
574 1.1 skrll
575 1.1 skrll /* Load the multicast filter. */
576 1.1 skrll smsc_setmulti(sc);
577 1.9 christos
578 1.13 mlelstv /* TCP/UDP checksum offload engines. */
579 1.13 mlelstv smsc_sethwcsum(sc);
580 1.13 mlelstv
581 1.1 skrll /* Open RX and TX pipes. */
582 1.1 skrll err = usbd_open_pipe(sc->sc_iface, sc->sc_ed[SMSC_ENDPT_RX],
583 1.19.2.3 snj USBD_EXCLUSIVE_USE | USBD_MPSAFE, &sc->sc_ep[SMSC_ENDPT_RX]);
584 1.1 skrll if (err) {
585 1.1 skrll printf("%s: open rx pipe failed: %s\n",
586 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
587 1.19.2.3 snj goto fail;
588 1.1 skrll }
589 1.1 skrll
590 1.1 skrll err = usbd_open_pipe(sc->sc_iface, sc->sc_ed[SMSC_ENDPT_TX],
591 1.19.2.3 snj USBD_EXCLUSIVE_USE | USBD_MPSAFE, &sc->sc_ep[SMSC_ENDPT_TX]);
592 1.1 skrll if (err) {
593 1.1 skrll printf("%s: open tx pipe failed: %s\n",
594 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
595 1.19.2.3 snj goto fail1;
596 1.19.2.3 snj }
597 1.19.2.3 snj
598 1.19.2.3 snj /* Init RX ring. */
599 1.19.2.3 snj if (smsc_rx_list_init(sc)) {
600 1.19.2.3 snj aprint_error_dev(sc->sc_dev, "rx list init failed\n");
601 1.19.2.3 snj goto fail2;
602 1.19.2.3 snj }
603 1.19.2.3 snj
604 1.19.2.3 snj /* Init TX ring. */
605 1.19.2.3 snj if (smsc_tx_list_init(sc)) {
606 1.19.2.3 snj aprint_error_dev(sc->sc_dev, "tx list init failed\n");
607 1.19.2.3 snj goto fail3;
608 1.1 skrll }
609 1.1 skrll
610 1.1 skrll /* Start up the receive pipe. */
611 1.19.2.3 snj for (size_t i = 0; i < SMSC_RX_LIST_CNT; i++) {
612 1.19.2.3 snj struct smsc_chain *c = &sc->sc_cdata.rx_chain[i];
613 1.19.2.3 snj usbd_setup_xfer(c->sc_xfer, c, c->sc_buf, sc->sc_bufsz,
614 1.19.2.3 snj USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, smsc_rxeof);
615 1.1 skrll usbd_transfer(c->sc_xfer);
616 1.1 skrll }
617 1.1 skrll
618 1.19.2.3 snj sc->sc_stopping = false;
619 1.19.2.3 snj
620 1.1 skrll /* Indicate we are up and running. */
621 1.1 skrll ifp->if_flags |= IFF_RUNNING;
622 1.1 skrll ifp->if_flags &= ~IFF_OACTIVE;
623 1.1 skrll
624 1.1 skrll callout_reset(&sc->sc_stat_ch, hz, smsc_tick, sc);
625 1.1 skrll
626 1.1 skrll return 0;
627 1.19.2.3 snj
628 1.19.2.3 snj fail3:
629 1.19.2.3 snj smsc_rx_list_free(sc);
630 1.19.2.3 snj fail2:
631 1.19.2.3 snj usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
632 1.19.2.3 snj fail1:
633 1.19.2.3 snj usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
634 1.19.2.3 snj fail:
635 1.19.2.3 snj return EIO;
636 1.1 skrll }
637 1.1 skrll
638 1.1 skrll void
639 1.1 skrll smsc_start(struct ifnet *ifp)
640 1.1 skrll {
641 1.19.2.3 snj struct smsc_softc * const sc = ifp->if_softc;
642 1.19.2.3 snj
643 1.19.2.3 snj mutex_enter(&sc->sc_txlock);
644 1.19.2.3 snj if (!sc->sc_stopping)
645 1.19.2.3 snj smsc_start_locked(ifp);
646 1.19.2.3 snj mutex_exit(&sc->sc_txlock);
647 1.19.2.3 snj }
648 1.19.2.3 snj
649 1.19.2.3 snj void
650 1.19.2.3 snj smsc_start_locked(struct ifnet *ifp)
651 1.19.2.3 snj {
652 1.19.2.3 snj struct smsc_softc * const sc = ifp->if_softc;
653 1.19.2.3 snj struct mbuf *m_head = NULL;
654 1.19.2.3 snj
655 1.19.2.3 snj KASSERT(mutex_owned(&sc->sc_txlock));
656 1.1 skrll
657 1.1 skrll /* Don't send anything if there is no link or controller is busy. */
658 1.1 skrll if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
659 1.1 skrll return;
660 1.1 skrll }
661 1.1 skrll
662 1.1 skrll if ((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING)) != IFF_RUNNING)
663 1.1 skrll return;
664 1.1 skrll
665 1.1 skrll IFQ_POLL(&ifp->if_snd, m_head);
666 1.1 skrll if (m_head == NULL)
667 1.1 skrll return;
668 1.1 skrll
669 1.1 skrll if (smsc_encap(sc, m_head, 0)) {
670 1.1 skrll return;
671 1.1 skrll }
672 1.1 skrll IFQ_DEQUEUE(&ifp->if_snd, m_head);
673 1.1 skrll
674 1.1 skrll bpf_mtap(ifp, m_head);
675 1.1 skrll
676 1.1 skrll ifp->if_flags |= IFF_OACTIVE;
677 1.4 skrll
678 1.4 skrll /*
679 1.4 skrll * Set a timeout in case the chip goes out to lunch.
680 1.4 skrll */
681 1.4 skrll ifp->if_timer = 5;
682 1.1 skrll }
683 1.1 skrll
684 1.1 skrll void
685 1.1 skrll smsc_tick(void *xsc)
686 1.1 skrll {
687 1.1 skrll struct smsc_softc *sc = xsc;
688 1.1 skrll
689 1.1 skrll if (sc == NULL)
690 1.1 skrll return;
691 1.1 skrll
692 1.1 skrll if (sc->sc_dying)
693 1.1 skrll return;
694 1.1 skrll
695 1.1 skrll usb_add_task(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER);
696 1.1 skrll }
697 1.1 skrll
698 1.1 skrll void
699 1.1 skrll smsc_stop(struct ifnet *ifp, int disable)
700 1.1 skrll {
701 1.19.2.3 snj struct smsc_softc * const sc = ifp->if_softc;
702 1.1 skrll
703 1.19.2.3 snj mutex_enter(&sc->sc_lock);
704 1.19.2.3 snj smsc_stop_locked(ifp, disable);
705 1.19.2.3 snj mutex_exit(&sc->sc_lock);
706 1.19.2.3 snj }
707 1.1 skrll
708 1.19.2.3 snj void
709 1.19.2.3 snj smsc_stop_locked(struct ifnet *ifp, int disable)
710 1.19.2.3 snj {
711 1.19.2.3 snj struct smsc_softc * const sc = ifp->if_softc;
712 1.19.2.3 snj usbd_status err;
713 1.19.2.3 snj
714 1.19.2.3 snj // smsc_reset(sc);
715 1.19.2.3 snj
716 1.19.2.3 snj KASSERT(mutex_owned(&sc->sc_lock));
717 1.19.2.3 snj mutex_enter(&sc->sc_rxlock);
718 1.19.2.3 snj mutex_enter(&sc->sc_txlock);
719 1.19.2.3 snj sc->sc_stopping = true;
720 1.19.2.3 snj mutex_exit(&sc->sc_txlock);
721 1.19.2.3 snj mutex_exit(&sc->sc_rxlock);
722 1.1 skrll
723 1.1 skrll callout_stop(&sc->sc_stat_ch);
724 1.1 skrll
725 1.1 skrll /* Stop transfers. */
726 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_RX] != NULL) {
727 1.1 skrll err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
728 1.1 skrll if (err) {
729 1.1 skrll printf("%s: abort rx pipe failed: %s\n",
730 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
731 1.1 skrll }
732 1.19.2.3 snj }
733 1.19.2.3 snj
734 1.19.2.3 snj if (sc->sc_ep[SMSC_ENDPT_TX] != NULL) {
735 1.19.2.3 snj err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
736 1.19.2.3 snj if (err) {
737 1.19.2.3 snj printf("%s: abort tx pipe failed: %s\n",
738 1.19.2.3 snj device_xname(sc->sc_dev), usbd_errstr(err));
739 1.19.2.3 snj }
740 1.19.2.3 snj }
741 1.19.2.3 snj
742 1.19.2.3 snj if (sc->sc_ep[SMSC_ENDPT_INTR] != NULL) {
743 1.19.2.3 snj err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_INTR]);
744 1.19.2.3 snj if (err) {
745 1.19.2.3 snj printf("%s: abort intr pipe failed: %s\n",
746 1.19.2.3 snj device_xname(sc->sc_dev), usbd_errstr(err));
747 1.19.2.3 snj }
748 1.19.2.3 snj }
749 1.19.2.3 snj
750 1.19.2.3 snj smsc_rx_list_free(sc);
751 1.19.2.3 snj
752 1.19.2.3 snj smsc_tx_list_free(sc);
753 1.19.2.3 snj
754 1.19.2.3 snj /* Close pipes */
755 1.19.2.3 snj if (sc->sc_ep[SMSC_ENDPT_RX] != NULL) {
756 1.1 skrll err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
757 1.1 skrll if (err) {
758 1.1 skrll printf("%s: close rx pipe failed: %s\n",
759 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
760 1.1 skrll }
761 1.1 skrll sc->sc_ep[SMSC_ENDPT_RX] = NULL;
762 1.1 skrll }
763 1.1 skrll
764 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_TX] != NULL) {
765 1.1 skrll err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
766 1.1 skrll if (err) {
767 1.1 skrll printf("%s: close tx pipe failed: %s\n",
768 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
769 1.1 skrll }
770 1.1 skrll sc->sc_ep[SMSC_ENDPT_TX] = NULL;
771 1.1 skrll }
772 1.1 skrll
773 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_INTR] != NULL) {
774 1.1 skrll err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_INTR]);
775 1.1 skrll if (err) {
776 1.1 skrll printf("%s: close intr pipe failed: %s\n",
777 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
778 1.1 skrll }
779 1.1 skrll sc->sc_ep[SMSC_ENDPT_INTR] = NULL;
780 1.1 skrll }
781 1.1 skrll
782 1.19.2.3 snj ifp->if_timer = 0;
783 1.19.2.3 snj ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
784 1.1 skrll
785 1.19.2.3 snj if (disable) {
786 1.19.2.3 snj /* drain */
787 1.1 skrll }
788 1.1 skrll }
789 1.1 skrll
790 1.1 skrll int
791 1.1 skrll smsc_chip_init(struct smsc_softc *sc)
792 1.1 skrll {
793 1.1 skrll int err;
794 1.1 skrll uint32_t reg_val;
795 1.1 skrll int burst_cap;
796 1.1 skrll
797 1.1 skrll /* Enter H/W config mode */
798 1.1 skrll smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST);
799 1.1 skrll
800 1.1 skrll if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG,
801 1.1 skrll SMSC_HW_CFG_LRST)) != 0) {
802 1.1 skrll smsc_warn_printf(sc, "timed-out waiting for reset to "
803 1.1 skrll "complete\n");
804 1.1 skrll goto init_failed;
805 1.1 skrll }
806 1.1 skrll
807 1.1 skrll /* Reset the PHY */
808 1.1 skrll smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST);
809 1.1 skrll
810 1.1 skrll if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL,
811 1.19.2.2 snj SMSC_PM_CTRL_PHY_RST)) != 0) {
812 1.1 skrll smsc_warn_printf(sc, "timed-out waiting for phy reset to "
813 1.1 skrll "complete\n");
814 1.1 skrll goto init_failed;
815 1.1 skrll }
816 1.1 skrll usbd_delay_ms(sc->sc_udev, 40);
817 1.1 skrll
818 1.1 skrll /* Set the mac address */
819 1.19.2.3 snj struct ifnet * const ifp = &sc->sc_ec.ec_if;
820 1.11 skrll const char *eaddr = CLLADDR(ifp->if_sadl);
821 1.11 skrll if ((err = smsc_setmacaddress(sc, eaddr)) != 0) {
822 1.1 skrll smsc_warn_printf(sc, "failed to set the MAC address\n");
823 1.1 skrll goto init_failed;
824 1.1 skrll }
825 1.1 skrll
826 1.1 skrll /*
827 1.1 skrll * Don't know what the HW_CFG_BIR bit is, but following the reset
828 1.1 skrll * sequence as used in the Linux driver.
829 1.1 skrll */
830 1.1 skrll if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) != 0) {
831 1.1 skrll smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err);
832 1.1 skrll goto init_failed;
833 1.1 skrll }
834 1.1 skrll reg_val |= SMSC_HW_CFG_BIR;
835 1.1 skrll smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
836 1.1 skrll
837 1.1 skrll /*
838 1.1 skrll * There is a so called 'turbo mode' that the linux driver supports, it
839 1.1 skrll * seems to allow you to jam multiple frames per Rx transaction.
840 1.1 skrll * By default this driver supports that and therefore allows multiple
841 1.8 skrll * frames per USB transfer.
842 1.1 skrll *
843 1.1 skrll * The xfer buffer size needs to reflect this as well, therefore based
844 1.1 skrll * on the calculations in the Linux driver the RX bufsize is set to
845 1.1 skrll * 18944,
846 1.1 skrll * bufsz = (16 * 1024 + 5 * 512)
847 1.1 skrll *
848 1.1 skrll * Burst capability is the number of URBs that can be in a burst of
849 1.1 skrll * data/ethernet frames.
850 1.1 skrll */
851 1.13 mlelstv
852 1.19.2.3 snj if (sc->sc_udev->ud_speed == USB_SPEED_HIGH)
853 1.1 skrll burst_cap = 37;
854 1.1 skrll else
855 1.1 skrll burst_cap = 128;
856 1.1 skrll
857 1.1 skrll smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap);
858 1.1 skrll
859 1.1 skrll /* Set the default bulk in delay (magic value from Linux driver) */
860 1.1 skrll smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000);
861 1.1 skrll
862 1.1 skrll /*
863 1.1 skrll * Initialise the RX interface
864 1.1 skrll */
865 1.1 skrll if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) < 0) {
866 1.1 skrll smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n",
867 1.1 skrll err);
868 1.1 skrll goto init_failed;
869 1.1 skrll }
870 1.1 skrll
871 1.1 skrll /*
872 1.8 skrll * The following settings are used for 'turbo mode', a.k.a multiple
873 1.1 skrll * frames per Rx transaction (again info taken form Linux driver).
874 1.1 skrll */
875 1.14 skrll reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
876 1.13 mlelstv
877 1.18 skrll /*
878 1.13 mlelstv * set Rx data offset to ETHER_ALIGN which will make the IP header
879 1.13 mlelstv * align on a word boundary.
880 1.18 skrll */
881 1.13 mlelstv reg_val |= ETHER_ALIGN << SMSC_HW_CFG_RXDOFF_SHIFT;
882 1.1 skrll
883 1.1 skrll smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
884 1.1 skrll
885 1.1 skrll /* Clear the status register ? */
886 1.1 skrll smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff);
887 1.1 skrll
888 1.1 skrll /* Read and display the revision register */
889 1.1 skrll if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) {
890 1.1 skrll smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err);
891 1.1 skrll goto init_failed;
892 1.1 skrll }
893 1.1 skrll
894 1.1 skrll /* GPIO/LED setup */
895 1.1 skrll reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
896 1.1 skrll SMSC_LED_GPIO_CFG_FDX_LED;
897 1.1 skrll smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val);
898 1.1 skrll
899 1.1 skrll /*
900 1.1 skrll * Initialise the TX interface
901 1.1 skrll */
902 1.1 skrll smsc_write_reg(sc, SMSC_FLOW, 0);
903 1.1 skrll
904 1.1 skrll smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT);
905 1.1 skrll
906 1.1 skrll /* Read the current MAC configuration */
907 1.1 skrll if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) {
908 1.1 skrll smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err);
909 1.1 skrll goto init_failed;
910 1.1 skrll }
911 1.1 skrll
912 1.13 mlelstv /* disable pad stripping, collides with checksum offload */
913 1.13 mlelstv sc->sc_mac_csr &= ~SMSC_MAC_CSR_PADSTR;
914 1.13 mlelstv
915 1.1 skrll /* Vlan */
916 1.1 skrll smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN);
917 1.1 skrll
918 1.1 skrll /*
919 1.1 skrll * Start TX
920 1.1 skrll */
921 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN;
922 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
923 1.1 skrll smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON);
924 1.1 skrll
925 1.1 skrll /*
926 1.1 skrll * Start RX
927 1.1 skrll */
928 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN;
929 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
930 1.1 skrll
931 1.19.2.3 snj return 0;
932 1.1 skrll
933 1.1 skrll init_failed:
934 1.1 skrll smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err);
935 1.19.2.3 snj return err;
936 1.1 skrll }
937 1.1 skrll
938 1.19.2.3 snj static int
939 1.19.2.3 snj smsc_ifflags_cb(struct ethercom *ec)
940 1.19.2.3 snj {
941 1.19.2.3 snj struct ifnet *ifp = &ec->ec_if;
942 1.19.2.3 snj struct smsc_softc *sc = ifp->if_softc;
943 1.19.2.3 snj int rc = 0;
944 1.19.2.3 snj
945 1.19.2.3 snj mutex_enter(&sc->sc_lock);
946 1.19.2.3 snj
947 1.19.2.3 snj int change = ifp->if_flags ^ sc->sc_if_flags;
948 1.19.2.3 snj sc->sc_if_flags = ifp->if_flags;
949 1.19.2.3 snj
950 1.19.2.3 snj if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) {
951 1.19.2.3 snj rc = ENETRESET;
952 1.19.2.3 snj goto out;
953 1.19.2.3 snj }
954 1.19.2.3 snj
955 1.19.2.3 snj if ((change & IFF_PROMISC) != 0) {
956 1.19.2.3 snj if (ifp->if_flags & IFF_PROMISC) {
957 1.19.2.3 snj sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS;
958 1.19.2.3 snj smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
959 1.19.2.3 snj } else if (!(ifp->if_flags & IFF_PROMISC)) {
960 1.19.2.3 snj sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS;
961 1.19.2.3 snj smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
962 1.19.2.3 snj }
963 1.19.2.3 snj smsc_setmulti(sc);
964 1.19.2.3 snj }
965 1.19.2.3 snj
966 1.19.2.3 snj out:
967 1.19.2.3 snj mutex_exit(&sc->sc_lock);
968 1.19.2.3 snj
969 1.19.2.3 snj return rc;
970 1.19.2.3 snj }
971 1.19.2.3 snj
972 1.19.2.3 snj
973 1.1 skrll int
974 1.1 skrll smsc_ioctl(struct ifnet *ifp, u_long cmd, void *data)
975 1.1 skrll {
976 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
977 1.19.2.3 snj // struct ifreq /*const*/ *ifr = data;
978 1.1 skrll int s, error = 0;
979 1.1 skrll
980 1.1 skrll if (sc->sc_dying)
981 1.1 skrll return EIO;
982 1.1 skrll
983 1.1 skrll s = splnet();
984 1.19.2.3 snj error = ether_ioctl(ifp, cmd, data);
985 1.19.2.3 snj splx(s);
986 1.1 skrll
987 1.19.2.3 snj if (error == ENETRESET) {
988 1.1 skrll error = 0;
989 1.19.2.3 snj if (cmd != SIOCADDMULTI && cmd != SIOCDELMULTI)
990 1.19.2.3 snj ;
991 1.19.2.3 snj else if (ifp->if_flags & IFF_RUNNING) {
992 1.19.2.3 snj mutex_enter(&sc->sc_lock);
993 1.1 skrll smsc_setmulti(sc);
994 1.19.2.3 snj mutex_exit(&sc->sc_lock);
995 1.19.2.3 snj }
996 1.1 skrll }
997 1.1 skrll return error;
998 1.1 skrll }
999 1.1 skrll
1000 1.1 skrll int
1001 1.1 skrll smsc_match(device_t parent, cfdata_t match, void *aux)
1002 1.1 skrll {
1003 1.1 skrll struct usb_attach_arg *uaa = aux;
1004 1.1 skrll
1005 1.19.2.3 snj return (usb_lookup(smsc_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ?
1006 1.1 skrll UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
1007 1.1 skrll }
1008 1.1 skrll
1009 1.1 skrll void
1010 1.1 skrll smsc_attach(device_t parent, device_t self, void *aux)
1011 1.1 skrll {
1012 1.1 skrll struct smsc_softc *sc = device_private(self);
1013 1.1 skrll struct usb_attach_arg *uaa = aux;
1014 1.19.2.3 snj struct usbd_device *dev = uaa->uaa_device;
1015 1.1 skrll usb_interface_descriptor_t *id;
1016 1.1 skrll usb_endpoint_descriptor_t *ed;
1017 1.1 skrll char *devinfop;
1018 1.1 skrll struct mii_data *mii;
1019 1.1 skrll struct ifnet *ifp;
1020 1.19.2.3 snj int err, i;
1021 1.1 skrll uint32_t mac_h, mac_l;
1022 1.1 skrll
1023 1.1 skrll sc->sc_dev = self;
1024 1.1 skrll sc->sc_udev = dev;
1025 1.19.2.3 snj sc->sc_stopping = false;
1026 1.1 skrll
1027 1.1 skrll aprint_naive("\n");
1028 1.1 skrll aprint_normal("\n");
1029 1.1 skrll
1030 1.1 skrll devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
1031 1.1 skrll aprint_normal_dev(self, "%s\n", devinfop);
1032 1.1 skrll usbd_devinfo_free(devinfop);
1033 1.1 skrll
1034 1.1 skrll err = usbd_set_config_no(dev, SMSC_CONFIG_INDEX, 1);
1035 1.1 skrll if (err) {
1036 1.1 skrll aprint_error_dev(self, "failed to set configuration"
1037 1.1 skrll ", err=%s\n", usbd_errstr(err));
1038 1.1 skrll return;
1039 1.1 skrll }
1040 1.1 skrll /* Setup the endpoints for the SMSC LAN95xx device(s) */
1041 1.6 jmcneill usb_init_task(&sc->sc_tick_task, smsc_tick_task, sc, 0);
1042 1.6 jmcneill usb_init_task(&sc->sc_stop_task, (void (*)(void *))smsc_stop, sc, 0);
1043 1.19.2.3 snj
1044 1.19.2.3 snj mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
1045 1.19.2.3 snj mutex_init(&sc->sc_txlock, MUTEX_DEFAULT, IPL_SOFTUSB);
1046 1.19.2.3 snj mutex_init(&sc->sc_rxlock, MUTEX_DEFAULT, IPL_SOFTUSB);
1047 1.1 skrll mutex_init(&sc->sc_mii_lock, MUTEX_DEFAULT, IPL_NONE);
1048 1.1 skrll
1049 1.1 skrll err = usbd_device2interface_handle(dev, SMSC_IFACE_IDX, &sc->sc_iface);
1050 1.1 skrll if (err) {
1051 1.1 skrll aprint_error_dev(self, "getting interface handle failed\n");
1052 1.1 skrll return;
1053 1.1 skrll }
1054 1.1 skrll
1055 1.1 skrll id = usbd_get_interface_descriptor(sc->sc_iface);
1056 1.1 skrll
1057 1.19.2.3 snj if (sc->sc_udev->ud_speed >= USB_SPEED_HIGH)
1058 1.1 skrll sc->sc_bufsz = SMSC_MAX_BUFSZ;
1059 1.1 skrll else
1060 1.1 skrll sc->sc_bufsz = SMSC_MIN_BUFSZ;
1061 1.1 skrll
1062 1.1 skrll /* Find endpoints. */
1063 1.1 skrll for (i = 0; i < id->bNumEndpoints; i++) {
1064 1.1 skrll ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
1065 1.1 skrll if (!ed) {
1066 1.1 skrll aprint_error_dev(self, "couldn't get ep %d\n", i);
1067 1.1 skrll return;
1068 1.1 skrll }
1069 1.1 skrll if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
1070 1.1 skrll UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
1071 1.1 skrll sc->sc_ed[SMSC_ENDPT_RX] = ed->bEndpointAddress;
1072 1.1 skrll } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
1073 1.1 skrll UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
1074 1.1 skrll sc->sc_ed[SMSC_ENDPT_TX] = ed->bEndpointAddress;
1075 1.1 skrll } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
1076 1.1 skrll UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
1077 1.1 skrll sc->sc_ed[SMSC_ENDPT_INTR] = ed->bEndpointAddress;
1078 1.1 skrll }
1079 1.1 skrll }
1080 1.1 skrll
1081 1.1 skrll ifp = &sc->sc_ec.ec_if;
1082 1.1 skrll ifp->if_softc = sc;
1083 1.1 skrll strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
1084 1.1 skrll ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1085 1.1 skrll ifp->if_init = smsc_init;
1086 1.1 skrll ifp->if_ioctl = smsc_ioctl;
1087 1.1 skrll ifp->if_start = smsc_start;
1088 1.1 skrll ifp->if_stop = smsc_stop;
1089 1.1 skrll
1090 1.13 mlelstv #ifdef notyet
1091 1.13 mlelstv /*
1092 1.13 mlelstv * We can do TCPv4, and UDPv4 checksums in hardware.
1093 1.13 mlelstv */
1094 1.13 mlelstv ifp->if_capabilities |=
1095 1.13 mlelstv /*IFCAP_CSUM_TCPv4_Tx |*/ IFCAP_CSUM_TCPv4_Rx |
1096 1.13 mlelstv /*IFCAP_CSUM_UDPv4_Tx |*/ IFCAP_CSUM_UDPv4_Rx;
1097 1.13 mlelstv #endif
1098 1.13 mlelstv
1099 1.15 skrll sc->sc_ec.ec_capabilities = ETHERCAP_VLAN_MTU;
1100 1.9 christos
1101 1.1 skrll /* Setup some of the basics */
1102 1.1 skrll sc->sc_phyno = 1;
1103 1.1 skrll
1104 1.1 skrll /*
1105 1.1 skrll * Attempt to get the mac address, if an EEPROM is not attached this
1106 1.1 skrll * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
1107 1.1 skrll * address based on urandom.
1108 1.1 skrll */
1109 1.1 skrll memset(sc->sc_enaddr, 0xff, ETHER_ADDR_LEN);
1110 1.1 skrll
1111 1.1 skrll prop_dictionary_t dict = device_properties(self);
1112 1.1 skrll prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
1113 1.1 skrll
1114 1.1 skrll if (eaprop != NULL) {
1115 1.1 skrll KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
1116 1.1 skrll KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
1117 1.1 skrll memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
1118 1.1 skrll ETHER_ADDR_LEN);
1119 1.1 skrll } else
1120 1.1 skrll /* Check if there is already a MAC address in the register */
1121 1.1 skrll if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) &&
1122 1.1 skrll (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) {
1123 1.1 skrll sc->sc_enaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1124 1.1 skrll sc->sc_enaddr[4] = (uint8_t)((mac_h) & 0xff);
1125 1.1 skrll sc->sc_enaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1126 1.1 skrll sc->sc_enaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1127 1.1 skrll sc->sc_enaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1128 1.1 skrll sc->sc_enaddr[0] = (uint8_t)((mac_l) & 0xff);
1129 1.1 skrll }
1130 1.1 skrll
1131 1.19.2.3 snj aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(sc->sc_enaddr));
1132 1.1 skrll
1133 1.1 skrll IFQ_SET_READY(&ifp->if_snd);
1134 1.1 skrll
1135 1.1 skrll /* Initialize MII/media info. */
1136 1.1 skrll mii = &sc->sc_mii;
1137 1.1 skrll mii->mii_ifp = ifp;
1138 1.1 skrll mii->mii_readreg = smsc_miibus_readreg;
1139 1.1 skrll mii->mii_writereg = smsc_miibus_writereg;
1140 1.1 skrll mii->mii_statchg = smsc_miibus_statchg;
1141 1.1 skrll mii->mii_flags = MIIF_AUTOTSLEEP;
1142 1.1 skrll sc->sc_ec.ec_mii = mii;
1143 1.1 skrll ifmedia_init(&mii->mii_media, 0, smsc_ifmedia_upd, smsc_ifmedia_sts);
1144 1.1 skrll mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
1145 1.1 skrll
1146 1.1 skrll if (LIST_FIRST(&mii->mii_phys) == NULL) {
1147 1.1 skrll ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
1148 1.1 skrll ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
1149 1.1 skrll } else
1150 1.1 skrll ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
1151 1.1 skrll
1152 1.1 skrll if_attach(ifp);
1153 1.1 skrll ether_ifattach(ifp, sc->sc_enaddr);
1154 1.19.2.3 snj ether_set_ifflags_cb(&sc->sc_ec, smsc_ifflags_cb);
1155 1.1 skrll
1156 1.1 skrll rnd_attach_source(&sc->sc_rnd_source, device_xname(sc->sc_dev),
1157 1.19 tls RND_TYPE_NET, RND_FLAG_DEFAULT);
1158 1.1 skrll
1159 1.1 skrll callout_init(&sc->sc_stat_ch, 0);
1160 1.1 skrll
1161 1.1 skrll usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev);
1162 1.1 skrll }
1163 1.1 skrll
1164 1.1 skrll int
1165 1.1 skrll smsc_detach(device_t self, int flags)
1166 1.1 skrll {
1167 1.1 skrll struct smsc_softc *sc = device_private(self);
1168 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
1169 1.1 skrll int s;
1170 1.1 skrll
1171 1.1 skrll callout_stop(&sc->sc_stat_ch);
1172 1.1 skrll
1173 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_TX] != NULL)
1174 1.1 skrll usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
1175 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_RX] != NULL)
1176 1.1 skrll usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
1177 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_INTR] != NULL)
1178 1.1 skrll usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_INTR]);
1179 1.1 skrll
1180 1.1 skrll /*
1181 1.1 skrll * Remove any pending tasks. They cannot be executing because they run
1182 1.1 skrll * in the same thread as detach.
1183 1.1 skrll */
1184 1.1 skrll usb_rem_task(sc->sc_udev, &sc->sc_tick_task);
1185 1.1 skrll usb_rem_task(sc->sc_udev, &sc->sc_stop_task);
1186 1.1 skrll
1187 1.1 skrll s = splusb();
1188 1.1 skrll
1189 1.1 skrll if (--sc->sc_refcnt >= 0) {
1190 1.1 skrll /* Wait for processes to go away */
1191 1.1 skrll usb_detach_waitold(sc->sc_dev);
1192 1.1 skrll }
1193 1.1 skrll
1194 1.1 skrll if (ifp->if_flags & IFF_RUNNING)
1195 1.1 skrll smsc_stop(ifp ,1);
1196 1.1 skrll
1197 1.1 skrll rnd_detach_source(&sc->sc_rnd_source);
1198 1.1 skrll mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1199 1.1 skrll ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
1200 1.1 skrll if (ifp->if_softc != NULL) {
1201 1.1 skrll ether_ifdetach(ifp);
1202 1.1 skrll if_detach(ifp);
1203 1.1 skrll }
1204 1.1 skrll
1205 1.1 skrll #ifdef DIAGNOSTIC
1206 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_TX] != NULL ||
1207 1.1 skrll sc->sc_ep[SMSC_ENDPT_RX] != NULL ||
1208 1.1 skrll sc->sc_ep[SMSC_ENDPT_INTR] != NULL)
1209 1.1 skrll printf("%s: detach has active endpoints\n",
1210 1.1 skrll device_xname(sc->sc_dev));
1211 1.1 skrll #endif
1212 1.1 skrll
1213 1.1 skrll if (--sc->sc_refcnt >= 0) {
1214 1.1 skrll /* Wait for processes to go away. */
1215 1.1 skrll usb_detach_waitold(sc->sc_dev);
1216 1.1 skrll }
1217 1.1 skrll splx(s);
1218 1.1 skrll
1219 1.1 skrll usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev);
1220 1.1 skrll
1221 1.1 skrll mutex_destroy(&sc->sc_mii_lock);
1222 1.1 skrll
1223 1.19.2.3 snj mutex_destroy(&sc->sc_rxlock);
1224 1.19.2.3 snj mutex_destroy(&sc->sc_txlock);
1225 1.19.2.3 snj mutex_destroy(&sc->sc_lock);
1226 1.19.2.3 snj
1227 1.19.2.3 snj return 0;
1228 1.1 skrll }
1229 1.1 skrll
1230 1.1 skrll void
1231 1.1 skrll smsc_tick_task(void *xsc)
1232 1.1 skrll {
1233 1.1 skrll int s;
1234 1.1 skrll struct smsc_softc *sc = xsc;
1235 1.1 skrll struct ifnet *ifp;
1236 1.1 skrll struct mii_data *mii;
1237 1.1 skrll
1238 1.1 skrll if (sc == NULL)
1239 1.1 skrll return;
1240 1.1 skrll
1241 1.1 skrll if (sc->sc_dying)
1242 1.1 skrll return;
1243 1.1 skrll ifp = &sc->sc_ec.ec_if;
1244 1.1 skrll mii = &sc->sc_mii;
1245 1.1 skrll if (mii == NULL)
1246 1.1 skrll return;
1247 1.1 skrll
1248 1.1 skrll s = splnet();
1249 1.1 skrll
1250 1.1 skrll mii_tick(mii);
1251 1.1 skrll if ((sc->sc_flags & SMSC_FLAG_LINK) == 0)
1252 1.1 skrll smsc_miibus_statchg(ifp);
1253 1.1 skrll callout_reset(&sc->sc_stat_ch, hz, smsc_tick, sc);
1254 1.1 skrll
1255 1.1 skrll splx(s);
1256 1.1 skrll }
1257 1.1 skrll
1258 1.1 skrll int
1259 1.1 skrll smsc_activate(device_t self, enum devact act)
1260 1.1 skrll {
1261 1.1 skrll struct smsc_softc *sc = device_private(self);
1262 1.1 skrll
1263 1.15 skrll switch (act) {
1264 1.1 skrll case DVACT_DEACTIVATE:
1265 1.1 skrll if_deactivate(&sc->sc_ec.ec_if);
1266 1.1 skrll sc->sc_dying = 1;
1267 1.1 skrll return 0;
1268 1.1 skrll default:
1269 1.1 skrll return EOPNOTSUPP;
1270 1.1 skrll }
1271 1.19.2.3 snj return 0;
1272 1.1 skrll }
1273 1.1 skrll
1274 1.1 skrll void
1275 1.1 skrll smsc_lock_mii(struct smsc_softc *sc)
1276 1.1 skrll {
1277 1.1 skrll sc->sc_refcnt++;
1278 1.1 skrll mutex_enter(&sc->sc_mii_lock);
1279 1.1 skrll }
1280 1.1 skrll
1281 1.1 skrll void
1282 1.1 skrll smsc_unlock_mii(struct smsc_softc *sc)
1283 1.1 skrll {
1284 1.1 skrll mutex_exit(&sc->sc_mii_lock);
1285 1.1 skrll if (--sc->sc_refcnt < 0)
1286 1.1 skrll usb_detach_wakeupold(sc->sc_dev);
1287 1.1 skrll }
1288 1.1 skrll
1289 1.1 skrll void
1290 1.19.2.3 snj smsc_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1291 1.1 skrll {
1292 1.1 skrll struct smsc_chain *c = (struct smsc_chain *)priv;
1293 1.1 skrll struct smsc_softc *sc = c->sc_sc;
1294 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
1295 1.1 skrll u_char *buf = c->sc_buf;
1296 1.1 skrll uint32_t total_len;
1297 1.13 mlelstv uint32_t rxhdr;
1298 1.13 mlelstv uint16_t pktlen;
1299 1.1 skrll struct mbuf *m;
1300 1.1 skrll
1301 1.19.2.3 snj mutex_enter(&sc->sc_rxlock);
1302 1.19.2.3 snj
1303 1.19.2.3 snj if (sc->sc_dying) {
1304 1.19.2.3 snj mutex_exit(&sc->sc_rxlock);
1305 1.1 skrll return;
1306 1.19.2.3 snj }
1307 1.1 skrll
1308 1.19.2.3 snj if (!(ifp->if_flags & IFF_RUNNING)) {
1309 1.19.2.3 snj mutex_exit(&sc->sc_rxlock);
1310 1.1 skrll return;
1311 1.19.2.3 snj }
1312 1.1 skrll
1313 1.1 skrll if (status != USBD_NORMAL_COMPLETION) {
1314 1.19.2.3 snj if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
1315 1.19.2.3 snj mutex_exit(&sc->sc_rxlock);
1316 1.1 skrll return;
1317 1.19.2.3 snj }
1318 1.1 skrll if (usbd_ratecheck(&sc->sc_rx_notice)) {
1319 1.1 skrll printf("%s: usb errors on rx: %s\n",
1320 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(status));
1321 1.1 skrll }
1322 1.1 skrll if (status == USBD_STALLED)
1323 1.1 skrll usbd_clear_endpoint_stall_async(sc->sc_ep[SMSC_ENDPT_RX]);
1324 1.1 skrll goto done;
1325 1.1 skrll }
1326 1.1 skrll
1327 1.1 skrll usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
1328 1.1 skrll smsc_dbg_printf(sc, "xfer status total_len %d\n", total_len);
1329 1.1 skrll
1330 1.13 mlelstv while (total_len != 0) {
1331 1.1 skrll if (total_len < sizeof(rxhdr)) {
1332 1.1 skrll smsc_dbg_printf(sc, "total_len %d < sizeof(rxhdr) %zu\n",
1333 1.1 skrll total_len, sizeof(rxhdr));
1334 1.1 skrll ifp->if_ierrors++;
1335 1.1 skrll goto done;
1336 1.1 skrll }
1337 1.1 skrll
1338 1.1 skrll memcpy(&rxhdr, buf, sizeof(rxhdr));
1339 1.1 skrll rxhdr = le32toh(rxhdr);
1340 1.13 mlelstv buf += sizeof(rxhdr);
1341 1.1 skrll total_len -= sizeof(rxhdr);
1342 1.1 skrll
1343 1.19.2.3 snj if (rxhdr & SMSC_RX_STAT_COLLISION)
1344 1.19.2.3 snj ifp->if_collisions++;
1345 1.19.2.3 snj
1346 1.19.2.3 snj if (rxhdr & (SMSC_RX_STAT_ERROR
1347 1.19.2.3 snj | SMSC_RX_STAT_LENGTH_ERROR
1348 1.19.2.3 snj | SMSC_RX_STAT_MII_ERROR)) {
1349 1.1 skrll smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr);
1350 1.1 skrll ifp->if_ierrors++;
1351 1.1 skrll goto done;
1352 1.1 skrll }
1353 1.1 skrll
1354 1.1 skrll pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr);
1355 1.1 skrll smsc_dbg_printf(sc, "rxeof total_len %d pktlen %d rxhdr "
1356 1.1 skrll "0x%08x\n", total_len, pktlen, rxhdr);
1357 1.13 mlelstv
1358 1.19.2.1 martin if (pktlen < ETHER_HDR_LEN) {
1359 1.19.2.1 martin smsc_dbg_printf(sc, "pktlen %d < ETHER_HDR_LEN %d\n",
1360 1.19.2.1 martin pktlen, ETHER_HDR_LEN);
1361 1.19.2.1 martin ifp->if_ierrors++;
1362 1.19.2.1 martin goto done;
1363 1.19.2.1 martin }
1364 1.19.2.1 martin
1365 1.13 mlelstv pktlen += ETHER_ALIGN;
1366 1.13 mlelstv
1367 1.17 mlelstv if (pktlen > MCLBYTES) {
1368 1.17 mlelstv smsc_dbg_printf(sc, "pktlen %d > MCLBYTES %d\n",
1369 1.17 mlelstv pktlen, MCLBYTES);
1370 1.17 mlelstv ifp->if_ierrors++;
1371 1.17 mlelstv goto done;
1372 1.17 mlelstv }
1373 1.17 mlelstv
1374 1.1 skrll if (pktlen > total_len) {
1375 1.1 skrll smsc_dbg_printf(sc, "pktlen %d > total_len %d\n",
1376 1.1 skrll pktlen, total_len);
1377 1.1 skrll ifp->if_ierrors++;
1378 1.1 skrll goto done;
1379 1.1 skrll }
1380 1.1 skrll
1381 1.1 skrll m = smsc_newbuf();
1382 1.1 skrll if (m == NULL) {
1383 1.1 skrll smsc_dbg_printf(sc, "smc_newbuf returned NULL\n");
1384 1.1 skrll ifp->if_ierrors++;
1385 1.1 skrll goto done;
1386 1.1 skrll }
1387 1.1 skrll
1388 1.1 skrll ifp->if_ipackets++;
1389 1.1 skrll m->m_pkthdr.rcvif = ifp;
1390 1.1 skrll m->m_pkthdr.len = m->m_len = pktlen;
1391 1.13 mlelstv m->m_flags |= M_HASFCS;
1392 1.1 skrll m_adj(m, ETHER_ALIGN);
1393 1.17 mlelstv
1394 1.17 mlelstv KASSERT(m->m_len < MCLBYTES);
1395 1.13 mlelstv memcpy(mtod(m, char *), buf + ETHER_ALIGN, m->m_len);
1396 1.1 skrll
1397 1.13 mlelstv /* Check if RX TCP/UDP checksumming is being offloaded */
1398 1.13 mlelstv if (sc->sc_coe_ctrl & SMSC_COE_CTRL_RX_EN) {
1399 1.13 mlelstv smsc_dbg_printf(sc,"RX checksum offload checking\n");
1400 1.13 mlelstv struct ether_header *eh;
1401 1.13 mlelstv
1402 1.13 mlelstv eh = mtod(m, struct ether_header *);
1403 1.13 mlelstv
1404 1.13 mlelstv /* Remove the extra 2 bytes of the csum */
1405 1.13 mlelstv m_adj(m, -2);
1406 1.13 mlelstv
1407 1.13 mlelstv /*
1408 1.13 mlelstv * The checksum appears to be simplistically calculated
1409 1.13 mlelstv * over the udp/tcp header and data up to the end of the
1410 1.13 mlelstv * eth frame. Which means if the eth frame is padded
1411 1.13 mlelstv * the csum calculation is incorrectly performed over
1412 1.13 mlelstv * the padding bytes as well. Therefore to be safe we
1413 1.13 mlelstv * ignore the H/W csum on frames less than or equal to
1414 1.13 mlelstv * 64 bytes.
1415 1.13 mlelstv *
1416 1.13 mlelstv * Ignore H/W csum for non-IPv4 packets.
1417 1.13 mlelstv */
1418 1.13 mlelstv smsc_dbg_printf(sc,"Ethertype %02x pktlen %02x\n",
1419 1.18 skrll be16toh(eh->ether_type), pktlen);
1420 1.13 mlelstv if (be16toh(eh->ether_type) == ETHERTYPE_IP &&
1421 1.18 skrll pktlen > ETHER_MIN_LEN) {
1422 1.13 mlelstv
1423 1.13 mlelstv m->m_pkthdr.csum_flags |=
1424 1.18 skrll (M_CSUM_TCPv4 | M_CSUM_UDPv4 | M_CSUM_DATA);
1425 1.13 mlelstv
1426 1.13 mlelstv /*
1427 1.13 mlelstv * Copy the TCP/UDP checksum from the last 2
1428 1.13 mlelstv * bytes of the transfer and put in the
1429 1.13 mlelstv * csum_data field.
1430 1.13 mlelstv */
1431 1.13 mlelstv memcpy(&m->m_pkthdr.csum_data,
1432 1.18 skrll buf + pktlen - 2, 2);
1433 1.13 mlelstv /*
1434 1.13 mlelstv * The data is copied in network order, but the
1435 1.13 mlelstv * csum algorithm in the kernel expects it to be
1436 1.13 mlelstv * in host network order.
1437 1.13 mlelstv */
1438 1.13 mlelstv m->m_pkthdr.csum_data =
1439 1.18 skrll ntohs(m->m_pkthdr.csum_data);
1440 1.13 mlelstv smsc_dbg_printf(sc,
1441 1.18 skrll "RX checksum offloaded (0x%04x)\n",
1442 1.18 skrll m->m_pkthdr.csum_data);
1443 1.13 mlelstv }
1444 1.13 mlelstv }
1445 1.13 mlelstv
1446 1.17 mlelstv /* round up to next longword */
1447 1.17 mlelstv pktlen = (pktlen + 3) & ~0x3;
1448 1.17 mlelstv
1449 1.17 mlelstv /* total_len does not include the padding */
1450 1.17 mlelstv if (pktlen > total_len)
1451 1.17 mlelstv pktlen = total_len;
1452 1.17 mlelstv
1453 1.13 mlelstv buf += pktlen;
1454 1.13 mlelstv total_len -= pktlen;
1455 1.1 skrll
1456 1.19.2.3 snj mutex_exit(&sc->sc_rxlock);
1457 1.19.2.3 snj
1458 1.1 skrll /* push the packet up */
1459 1.1 skrll bpf_mtap(ifp, m);
1460 1.1 skrll ifp->if_input(ifp, m);
1461 1.19.2.3 snj
1462 1.19.2.3 snj mutex_enter(&sc->sc_rxlock);
1463 1.13 mlelstv }
1464 1.1 skrll
1465 1.1 skrll done:
1466 1.19.2.3 snj mutex_exit(&sc->sc_rxlock);
1467 1.19.2.3 snj
1468 1.1 skrll /* Setup new transfer. */
1469 1.19.2.3 snj usbd_setup_xfer(xfer, c, c->sc_buf, sc->sc_bufsz, USBD_SHORT_XFER_OK,
1470 1.1 skrll USBD_NO_TIMEOUT, smsc_rxeof);
1471 1.1 skrll usbd_transfer(xfer);
1472 1.1 skrll
1473 1.1 skrll return;
1474 1.1 skrll }
1475 1.1 skrll
1476 1.1 skrll void
1477 1.19.2.3 snj smsc_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1478 1.1 skrll {
1479 1.19.2.3 snj struct smsc_chain *c = priv;
1480 1.19.2.3 snj struct smsc_softc *sc = c->sc_sc;
1481 1.19.2.3 snj struct ifnet *ifp = &sc->sc_ec.ec_if;
1482 1.1 skrll
1483 1.19.2.3 snj mutex_enter(&sc->sc_txlock);
1484 1.1 skrll
1485 1.19.2.3 snj if (sc->sc_dying) {
1486 1.19.2.3 snj mutex_exit(&sc->sc_txlock);
1487 1.1 skrll return;
1488 1.19.2.3 snj }
1489 1.1 skrll
1490 1.19.2.3 snj if (sc->sc_stopping) {
1491 1.19.2.3 snj mutex_exit(&sc->sc_txlock);
1492 1.19.2.3 snj return;
1493 1.19.2.3 snj }
1494 1.1 skrll
1495 1.4 skrll ifp->if_timer = 0;
1496 1.4 skrll ifp->if_flags &= ~IFF_OACTIVE;
1497 1.4 skrll
1498 1.1 skrll if (status != USBD_NORMAL_COMPLETION) {
1499 1.1 skrll if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
1500 1.19.2.3 snj mutex_exit(&sc->sc_txlock);
1501 1.1 skrll return;
1502 1.1 skrll }
1503 1.1 skrll ifp->if_oerrors++;
1504 1.1 skrll printf("%s: usb error on tx: %s\n", device_xname(sc->sc_dev),
1505 1.1 skrll usbd_errstr(status));
1506 1.1 skrll if (status == USBD_STALLED)
1507 1.1 skrll usbd_clear_endpoint_stall_async(sc->sc_ep[SMSC_ENDPT_TX]);
1508 1.19.2.3 snj mutex_exit(&sc->sc_txlock);
1509 1.1 skrll return;
1510 1.1 skrll }
1511 1.4 skrll ifp->if_opackets++;
1512 1.1 skrll
1513 1.1 skrll m_freem(c->sc_mbuf);
1514 1.1 skrll c->sc_mbuf = NULL;
1515 1.1 skrll
1516 1.1 skrll if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1517 1.19.2.3 snj smsc_start_locked(ifp);
1518 1.1 skrll
1519 1.19.2.3 snj mutex_exit(&sc->sc_txlock);
1520 1.1 skrll }
1521 1.1 skrll
1522 1.1 skrll int
1523 1.1 skrll smsc_tx_list_init(struct smsc_softc *sc)
1524 1.1 skrll {
1525 1.19.2.3 snj struct smsc_cdata *cd = &sc->sc_cdata;
1526 1.1 skrll struct smsc_chain *c;
1527 1.1 skrll int i;
1528 1.1 skrll
1529 1.1 skrll for (i = 0; i < SMSC_TX_LIST_CNT; i++) {
1530 1.1 skrll c = &cd->tx_chain[i];
1531 1.1 skrll c->sc_sc = sc;
1532 1.1 skrll c->sc_idx = i;
1533 1.1 skrll c->sc_mbuf = NULL;
1534 1.1 skrll if (c->sc_xfer == NULL) {
1535 1.19.2.3 snj int error = usbd_create_xfer(sc->sc_ep[SMSC_ENDPT_TX],
1536 1.19.2.3 snj sc->sc_bufsz, USBD_FORCE_SHORT_XFER, 0,
1537 1.19.2.3 snj &c->sc_xfer);
1538 1.19.2.3 snj if (error)
1539 1.19.2.3 snj return EIO;
1540 1.19.2.3 snj c->sc_buf = usbd_get_buffer(c->sc_xfer);
1541 1.1 skrll }
1542 1.1 skrll }
1543 1.1 skrll
1544 1.19.2.3 snj return 0;
1545 1.19.2.3 snj }
1546 1.19.2.3 snj
1547 1.19.2.3 snj void
1548 1.19.2.3 snj smsc_tx_list_free(struct smsc_softc *sc)
1549 1.19.2.3 snj {
1550 1.19.2.3 snj /* Free TX resources. */
1551 1.19.2.3 snj for (size_t i = 0; i < SMSC_TX_LIST_CNT; i++) {
1552 1.19.2.3 snj if (sc->sc_cdata.tx_chain[i].sc_mbuf != NULL) {
1553 1.19.2.3 snj m_freem(sc->sc_cdata.tx_chain[i].sc_mbuf);
1554 1.19.2.3 snj sc->sc_cdata.tx_chain[i].sc_mbuf = NULL;
1555 1.19.2.3 snj }
1556 1.19.2.3 snj if (sc->sc_cdata.tx_chain[i].sc_xfer != NULL) {
1557 1.19.2.3 snj usbd_destroy_xfer(sc->sc_cdata.tx_chain[i].sc_xfer);
1558 1.19.2.3 snj sc->sc_cdata.tx_chain[i].sc_xfer = NULL;
1559 1.19.2.3 snj }
1560 1.19.2.3 snj }
1561 1.1 skrll }
1562 1.1 skrll
1563 1.1 skrll int
1564 1.1 skrll smsc_rx_list_init(struct smsc_softc *sc)
1565 1.1 skrll {
1566 1.19.2.3 snj struct smsc_cdata *cd = &sc->sc_cdata;
1567 1.1 skrll struct smsc_chain *c;
1568 1.1 skrll int i;
1569 1.1 skrll
1570 1.1 skrll for (i = 0; i < SMSC_RX_LIST_CNT; i++) {
1571 1.1 skrll c = &cd->rx_chain[i];
1572 1.1 skrll c->sc_sc = sc;
1573 1.1 skrll c->sc_idx = i;
1574 1.1 skrll c->sc_mbuf = NULL;
1575 1.1 skrll if (c->sc_xfer == NULL) {
1576 1.19.2.3 snj int error = usbd_create_xfer(sc->sc_ep[SMSC_ENDPT_RX],
1577 1.19.2.3 snj sc->sc_bufsz, USBD_SHORT_XFER_OK, 0, &c->sc_xfer);
1578 1.19.2.3 snj if (error)
1579 1.19.2.3 snj return error;
1580 1.19.2.3 snj c->sc_buf = usbd_get_buffer(c->sc_xfer);
1581 1.1 skrll }
1582 1.1 skrll }
1583 1.1 skrll
1584 1.19.2.3 snj return 0;
1585 1.19.2.3 snj }
1586 1.19.2.3 snj
1587 1.19.2.3 snj void
1588 1.19.2.3 snj smsc_rx_list_free(struct smsc_softc *sc)
1589 1.19.2.3 snj {
1590 1.19.2.3 snj /* Free RX resources. */
1591 1.19.2.3 snj for (size_t i = 0; i < SMSC_RX_LIST_CNT; i++) {
1592 1.19.2.3 snj if (sc->sc_cdata.rx_chain[i].sc_mbuf != NULL) {
1593 1.19.2.3 snj m_freem(sc->sc_cdata.rx_chain[i].sc_mbuf);
1594 1.19.2.3 snj sc->sc_cdata.rx_chain[i].sc_mbuf = NULL;
1595 1.19.2.3 snj }
1596 1.19.2.3 snj if (sc->sc_cdata.rx_chain[i].sc_xfer != NULL) {
1597 1.19.2.3 snj usbd_destroy_xfer(sc->sc_cdata.rx_chain[i].sc_xfer);
1598 1.19.2.3 snj sc->sc_cdata.rx_chain[i].sc_xfer = NULL;
1599 1.19.2.3 snj }
1600 1.19.2.3 snj }
1601 1.1 skrll }
1602 1.1 skrll
1603 1.1 skrll struct mbuf *
1604 1.1 skrll smsc_newbuf(void)
1605 1.1 skrll {
1606 1.1 skrll struct mbuf *m;
1607 1.1 skrll
1608 1.1 skrll MGETHDR(m, M_DONTWAIT, MT_DATA);
1609 1.1 skrll if (m == NULL)
1610 1.19.2.3 snj return NULL;
1611 1.1 skrll
1612 1.1 skrll MCLGET(m, M_DONTWAIT);
1613 1.1 skrll if (!(m->m_flags & M_EXT)) {
1614 1.1 skrll m_freem(m);
1615 1.19.2.3 snj return NULL;
1616 1.1 skrll }
1617 1.1 skrll
1618 1.19.2.3 snj return m;
1619 1.1 skrll }
1620 1.1 skrll
1621 1.1 skrll int
1622 1.1 skrll smsc_encap(struct smsc_softc *sc, struct mbuf *m, int idx)
1623 1.1 skrll {
1624 1.19.2.3 snj struct ifnet * const ifp = &sc->sc_ec.ec_if;
1625 1.19.2.3 snj struct smsc_chain * const c = &sc->sc_cdata.tx_chain[idx];
1626 1.19.2.3 snj uint32_t txhdr;
1627 1.19.2.3 snj uint32_t frm_len = 0;
1628 1.1 skrll
1629 1.1 skrll /*
1630 1.1 skrll * Each frame is prefixed with two 32-bit values describing the
1631 1.1 skrll * length of the packet and buffer.
1632 1.1 skrll */
1633 1.1 skrll txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) |
1634 1.1 skrll SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG;
1635 1.1 skrll txhdr = htole32(txhdr);
1636 1.1 skrll memcpy(c->sc_buf, &txhdr, sizeof(txhdr));
1637 1.1 skrll
1638 1.1 skrll txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len);
1639 1.1 skrll txhdr = htole32(txhdr);
1640 1.1 skrll memcpy(c->sc_buf + 4, &txhdr, sizeof(txhdr));
1641 1.1 skrll
1642 1.1 skrll frm_len += 8;
1643 1.1 skrll
1644 1.1 skrll /* Next copy in the actual packet */
1645 1.1 skrll m_copydata(m, 0, m->m_pkthdr.len, c->sc_buf + frm_len);
1646 1.1 skrll frm_len += m->m_pkthdr.len;
1647 1.1 skrll
1648 1.1 skrll c->sc_mbuf = m;
1649 1.1 skrll
1650 1.19.2.3 snj usbd_setup_xfer(c->sc_xfer, c, c->sc_buf, frm_len,
1651 1.19.2.3 snj USBD_FORCE_SHORT_XFER, 10000, smsc_txeof);
1652 1.1 skrll
1653 1.19.2.3 snj usbd_status err = usbd_transfer(c->sc_xfer);
1654 1.1 skrll /* XXXNH get task to stop interface */
1655 1.1 skrll if (err != USBD_IN_PROGRESS) {
1656 1.1 skrll smsc_stop(ifp, 0);
1657 1.19.2.3 snj return EIO;
1658 1.1 skrll }
1659 1.1 skrll
1660 1.1 skrll sc->sc_cdata.tx_cnt++;
1661 1.1 skrll
1662 1.19.2.3 snj return 0;
1663 1.1 skrll }
1664