if_smsc.c revision 1.33.2.2 1 1.33.2.2 pgoyette /* $NetBSD: if_smsc.c,v 1.33.2.2 2018/09/06 06:56:04 pgoyette Exp $ */
2 1.1 skrll
3 1.1 skrll /* $OpenBSD: if_smsc.c,v 1.4 2012/09/27 12:38:11 jsg Exp $ */
4 1.32 skrll /* $FreeBSD: src/sys/dev/usb/net/if_smsc.c,v 1.1 2012/08/15 04:03:55 gonzo Exp $ */
5 1.1 skrll /*-
6 1.1 skrll * Copyright (c) 2012
7 1.1 skrll * Ben Gray <bgray (at) freebsd.org>.
8 1.1 skrll * All rights reserved.
9 1.1 skrll *
10 1.1 skrll * Redistribution and use in source and binary forms, with or without
11 1.1 skrll * modification, are permitted provided that the following conditions
12 1.1 skrll * are met:
13 1.1 skrll * 1. Redistributions of source code must retain the above copyright
14 1.1 skrll * notice, this list of conditions and the following disclaimer.
15 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 skrll * notice, this list of conditions and the following disclaimer in the
17 1.1 skrll * documentation and/or other materials provided with the distribution.
18 1.1 skrll *
19 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 1.1 skrll * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 1.1 skrll * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 1.1 skrll * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 1.1 skrll * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 1.1 skrll * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 1.1 skrll */
30 1.1 skrll
31 1.1 skrll /*
32 1.1 skrll * SMSC LAN9xxx devices (http://www.smsc.com/)
33 1.1 skrll *
34 1.1 skrll * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that
35 1.1 skrll * support USB 2.0 and 10/100 Mbps Ethernet.
36 1.1 skrll *
37 1.1 skrll * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter.
38 1.1 skrll * The driver only covers the Ethernet part, the standard USB hub driver
39 1.1 skrll * supports the hub part.
40 1.1 skrll *
41 1.1 skrll * This driver is closely modelled on the Linux driver written and copyrighted
42 1.1 skrll * by SMSC.
43 1.1 skrll *
44 1.1 skrll * H/W TCP & UDP Checksum Offloading
45 1.1 skrll * ---------------------------------
46 1.1 skrll * The chip supports both tx and rx offloading of UDP & TCP checksums, this
47 1.1 skrll * feature can be dynamically enabled/disabled.
48 1.1 skrll *
49 1.1 skrll * RX checksuming is performed across bytes after the IPv4 header to the end of
50 1.1 skrll * the Ethernet frame, this means if the frame is padded with non-zero values
51 1.1 skrll * the H/W checksum will be incorrect, however the rx code compensates for this.
52 1.1 skrll *
53 1.1 skrll * TX checksuming is more complicated, the device requires a special header to
54 1.1 skrll * be prefixed onto the start of the frame which indicates the start and end
55 1.1 skrll * positions of the UDP or TCP frame. This requires the driver to manually
56 1.1 skrll * go through the packet data and decode the headers prior to sending.
57 1.1 skrll * On Linux they generally provide cues to the location of the csum and the
58 1.1 skrll * area to calculate it over, on FreeBSD we seem to have to do it all ourselves,
59 1.8 skrll * hence this is not as optimal and therefore h/w TX checksum is currently not
60 1.1 skrll * implemented.
61 1.1 skrll */
62 1.1 skrll
63 1.33.2.2 pgoyette #include <sys/cdefs.h>
64 1.33.2.2 pgoyette __KERNEL_RCSID(0, "$NetBSD: if_smsc.c,v 1.33.2.2 2018/09/06 06:56:04 pgoyette Exp $");
65 1.33.2.2 pgoyette
66 1.12 skrll #ifdef _KERNEL_OPT
67 1.20 skrll #include "opt_usb.h"
68 1.12 skrll #include "opt_inet.h"
69 1.12 skrll #endif
70 1.1 skrll
71 1.1 skrll #include <sys/param.h>
72 1.1 skrll #include <sys/bus.h>
73 1.1 skrll #include <sys/systm.h>
74 1.1 skrll #include <sys/sockio.h>
75 1.1 skrll #include <sys/mbuf.h>
76 1.1 skrll #include <sys/mutex.h>
77 1.1 skrll #include <sys/kernel.h>
78 1.1 skrll #include <sys/proc.h>
79 1.1 skrll #include <sys/socket.h>
80 1.1 skrll
81 1.1 skrll #include <sys/device.h>
82 1.1 skrll
83 1.23 riastrad #include <sys/rndsource.h>
84 1.1 skrll
85 1.1 skrll #include <net/if.h>
86 1.1 skrll #include <net/if_dl.h>
87 1.1 skrll #include <net/if_media.h>
88 1.1 skrll #include <net/if_ether.h>
89 1.1 skrll
90 1.1 skrll #include <net/bpf.h>
91 1.1 skrll
92 1.1 skrll #ifdef INET
93 1.1 skrll #include <netinet/in.h>
94 1.12 skrll #include <netinet/if_inarp.h>
95 1.1 skrll #endif
96 1.1 skrll
97 1.1 skrll #include <dev/mii/mii.h>
98 1.1 skrll #include <dev/mii/miivar.h>
99 1.1 skrll
100 1.1 skrll #include <dev/usb/usb.h>
101 1.1 skrll #include <dev/usb/usbdi.h>
102 1.1 skrll #include <dev/usb/usbdi_util.h>
103 1.1 skrll #include <dev/usb/usbdivar.h>
104 1.1 skrll #include <dev/usb/usbdevs.h>
105 1.1 skrll
106 1.1 skrll #include <dev/usb/if_smscreg.h>
107 1.1 skrll #include <dev/usb/if_smscvar.h>
108 1.1 skrll
109 1.1 skrll #include "ioconf.h"
110 1.1 skrll
111 1.1 skrll #ifdef USB_DEBUG
112 1.1 skrll int smsc_debug = 0;
113 1.1 skrll #endif
114 1.1 skrll
115 1.13 mlelstv #define ETHER_ALIGN 2
116 1.1 skrll /*
117 1.1 skrll * Various supported device vendors/products.
118 1.1 skrll */
119 1.1 skrll static const struct usb_devno smsc_devs[] = {
120 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN89530 },
121 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN9530 },
122 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN9730 },
123 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500 },
124 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500A },
125 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500A_ALT },
126 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500A_HAL },
127 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500A_SAL10 },
128 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500_ALT },
129 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9500_SAL10 },
130 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505 },
131 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505A },
132 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505A_HAL },
133 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505A_SAL10 },
134 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9505_SAL10 },
135 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9512_14 },
136 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9512_14_ALT },
137 1.2 jakllsch { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_SMSC9512_14_SAL10 }
138 1.1 skrll };
139 1.1 skrll
140 1.1 skrll #ifdef USB_DEBUG
141 1.1 skrll #define smsc_dbg_printf(sc, fmt, args...) \
142 1.1 skrll do { \
143 1.1 skrll if (smsc_debug > 0) \
144 1.1 skrll printf("debug: " fmt, ##args); \
145 1.1 skrll } while(0)
146 1.1 skrll #else
147 1.1 skrll #define smsc_dbg_printf(sc, fmt, args...)
148 1.1 skrll #endif
149 1.1 skrll
150 1.1 skrll #define smsc_warn_printf(sc, fmt, args...) \
151 1.1 skrll printf("%s: warning: " fmt, device_xname((sc)->sc_dev), ##args)
152 1.1 skrll
153 1.1 skrll #define smsc_err_printf(sc, fmt, args...) \
154 1.1 skrll printf("%s: error: " fmt, device_xname((sc)->sc_dev), ##args)
155 1.1 skrll
156 1.1 skrll /* Function declarations */
157 1.1 skrll int smsc_chip_init(struct smsc_softc *);
158 1.1 skrll void smsc_setmulti(struct smsc_softc *);
159 1.1 skrll int smsc_setmacaddress(struct smsc_softc *, const uint8_t *);
160 1.1 skrll
161 1.1 skrll int smsc_match(device_t, cfdata_t, void *);
162 1.1 skrll void smsc_attach(device_t, device_t, void *);
163 1.1 skrll int smsc_detach(device_t, int);
164 1.1 skrll int smsc_activate(device_t, enum devact);
165 1.1 skrll
166 1.1 skrll int smsc_init(struct ifnet *);
167 1.1 skrll void smsc_start(struct ifnet *);
168 1.1 skrll int smsc_ioctl(struct ifnet *, u_long, void *);
169 1.1 skrll void smsc_stop(struct ifnet *, int);
170 1.1 skrll
171 1.1 skrll void smsc_reset(struct smsc_softc *);
172 1.1 skrll struct mbuf *smsc_newbuf(void);
173 1.1 skrll
174 1.1 skrll void smsc_tick(void *);
175 1.1 skrll void smsc_tick_task(void *);
176 1.1 skrll void smsc_miibus_statchg(struct ifnet *);
177 1.1 skrll int smsc_miibus_readreg(device_t, int, int);
178 1.1 skrll void smsc_miibus_writereg(device_t, int, int, int);
179 1.1 skrll int smsc_ifmedia_upd(struct ifnet *);
180 1.1 skrll void smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *);
181 1.1 skrll void smsc_lock_mii(struct smsc_softc *);
182 1.1 skrll void smsc_unlock_mii(struct smsc_softc *);
183 1.1 skrll
184 1.1 skrll int smsc_tx_list_init(struct smsc_softc *);
185 1.1 skrll int smsc_rx_list_init(struct smsc_softc *);
186 1.1 skrll int smsc_encap(struct smsc_softc *, struct mbuf *, int);
187 1.27 skrll void smsc_rxeof(struct usbd_xfer *, void *, usbd_status);
188 1.27 skrll void smsc_txeof(struct usbd_xfer *, void *, usbd_status);
189 1.1 skrll
190 1.1 skrll int smsc_read_reg(struct smsc_softc *, uint32_t, uint32_t *);
191 1.1 skrll int smsc_write_reg(struct smsc_softc *, uint32_t, uint32_t);
192 1.1 skrll int smsc_wait_for_bits(struct smsc_softc *, uint32_t, uint32_t);
193 1.1 skrll int smsc_sethwcsum(struct smsc_softc *);
194 1.1 skrll
195 1.1 skrll CFATTACH_DECL_NEW(usmsc, sizeof(struct smsc_softc), smsc_match, smsc_attach,
196 1.1 skrll smsc_detach, smsc_activate);
197 1.1 skrll
198 1.1 skrll int
199 1.1 skrll smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data)
200 1.1 skrll {
201 1.1 skrll usb_device_request_t req;
202 1.1 skrll uint32_t buf;
203 1.1 skrll usbd_status err;
204 1.1 skrll
205 1.1 skrll req.bmRequestType = UT_READ_VENDOR_DEVICE;
206 1.1 skrll req.bRequest = SMSC_UR_READ_REG;
207 1.1 skrll USETW(req.wValue, 0);
208 1.1 skrll USETW(req.wIndex, off);
209 1.1 skrll USETW(req.wLength, 4);
210 1.1 skrll
211 1.1 skrll err = usbd_do_request(sc->sc_udev, &req, &buf);
212 1.1 skrll if (err != 0)
213 1.1 skrll smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off);
214 1.1 skrll
215 1.1 skrll *data = le32toh(buf);
216 1.1 skrll
217 1.27 skrll return err;
218 1.1 skrll }
219 1.1 skrll
220 1.1 skrll int
221 1.1 skrll smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data)
222 1.1 skrll {
223 1.1 skrll usb_device_request_t req;
224 1.1 skrll uint32_t buf;
225 1.1 skrll usbd_status err;
226 1.1 skrll
227 1.1 skrll buf = htole32(data);
228 1.1 skrll
229 1.1 skrll req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
230 1.1 skrll req.bRequest = SMSC_UR_WRITE_REG;
231 1.1 skrll USETW(req.wValue, 0);
232 1.1 skrll USETW(req.wIndex, off);
233 1.1 skrll USETW(req.wLength, 4);
234 1.1 skrll
235 1.1 skrll err = usbd_do_request(sc->sc_udev, &req, &buf);
236 1.1 skrll if (err != 0)
237 1.1 skrll smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off);
238 1.1 skrll
239 1.27 skrll return err;
240 1.1 skrll }
241 1.1 skrll
242 1.1 skrll int
243 1.1 skrll smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits)
244 1.1 skrll {
245 1.1 skrll uint32_t val;
246 1.1 skrll int err, i;
247 1.1 skrll
248 1.1 skrll for (i = 0; i < 100; i++) {
249 1.1 skrll if ((err = smsc_read_reg(sc, reg, &val)) != 0)
250 1.27 skrll return err;
251 1.1 skrll if (!(val & bits))
252 1.27 skrll return 0;
253 1.1 skrll DELAY(5);
254 1.1 skrll }
255 1.1 skrll
256 1.27 skrll return 1;
257 1.1 skrll }
258 1.1 skrll
259 1.1 skrll int
260 1.1 skrll smsc_miibus_readreg(device_t dev, int phy, int reg)
261 1.1 skrll {
262 1.1 skrll struct smsc_softc *sc = device_private(dev);
263 1.1 skrll uint32_t addr;
264 1.1 skrll uint32_t val = 0;
265 1.1 skrll
266 1.1 skrll smsc_lock_mii(sc);
267 1.1 skrll if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
268 1.1 skrll smsc_warn_printf(sc, "MII is busy\n");
269 1.1 skrll goto done;
270 1.1 skrll }
271 1.1 skrll
272 1.1 skrll addr = (phy << 11) | (reg << 6) | SMSC_MII_READ;
273 1.1 skrll smsc_write_reg(sc, SMSC_MII_ADDR, addr);
274 1.1 skrll
275 1.1 skrll if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
276 1.1 skrll smsc_warn_printf(sc, "MII read timeout\n");
277 1.1 skrll
278 1.1 skrll smsc_read_reg(sc, SMSC_MII_DATA, &val);
279 1.3 skrll
280 1.3 skrll done:
281 1.1 skrll smsc_unlock_mii(sc);
282 1.1 skrll
283 1.31 skrll return val & 0xffff;
284 1.1 skrll }
285 1.1 skrll
286 1.1 skrll void
287 1.1 skrll smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
288 1.1 skrll {
289 1.1 skrll struct smsc_softc *sc = device_private(dev);
290 1.1 skrll uint32_t addr;
291 1.1 skrll
292 1.1 skrll if (sc->sc_phyno != phy)
293 1.1 skrll return;
294 1.1 skrll
295 1.1 skrll smsc_lock_mii(sc);
296 1.1 skrll if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
297 1.1 skrll smsc_warn_printf(sc, "MII is busy\n");
298 1.5 skrll smsc_unlock_mii(sc);
299 1.1 skrll return;
300 1.1 skrll }
301 1.1 skrll
302 1.1 skrll smsc_write_reg(sc, SMSC_MII_DATA, val);
303 1.1 skrll
304 1.1 skrll addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE;
305 1.1 skrll smsc_write_reg(sc, SMSC_MII_ADDR, addr);
306 1.1 skrll smsc_unlock_mii(sc);
307 1.1 skrll
308 1.1 skrll if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
309 1.1 skrll smsc_warn_printf(sc, "MII write timeout\n");
310 1.1 skrll }
311 1.1 skrll
312 1.1 skrll void
313 1.1 skrll smsc_miibus_statchg(struct ifnet *ifp)
314 1.1 skrll {
315 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
316 1.1 skrll struct mii_data *mii = &sc->sc_mii;
317 1.1 skrll int err;
318 1.1 skrll uint32_t flow;
319 1.1 skrll uint32_t afc_cfg;
320 1.1 skrll
321 1.1 skrll if (mii == NULL || ifp == NULL ||
322 1.1 skrll (ifp->if_flags & IFF_RUNNING) == 0)
323 1.1 skrll return;
324 1.1 skrll
325 1.1 skrll /* Use the MII status to determine link status */
326 1.1 skrll sc->sc_flags &= ~SMSC_FLAG_LINK;
327 1.1 skrll if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
328 1.1 skrll (IFM_ACTIVE | IFM_AVALID)) {
329 1.1 skrll switch (IFM_SUBTYPE(mii->mii_media_active)) {
330 1.1 skrll case IFM_10_T:
331 1.1 skrll case IFM_100_TX:
332 1.1 skrll sc->sc_flags |= SMSC_FLAG_LINK;
333 1.1 skrll break;
334 1.1 skrll case IFM_1000_T:
335 1.1 skrll /* Gigabit ethernet not supported by chipset */
336 1.1 skrll break;
337 1.1 skrll default:
338 1.1 skrll break;
339 1.1 skrll }
340 1.1 skrll }
341 1.1 skrll
342 1.1 skrll /* Lost link, do nothing. */
343 1.1 skrll if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
344 1.1 skrll smsc_dbg_printf(sc, "link flag not set\n");
345 1.1 skrll return;
346 1.1 skrll }
347 1.1 skrll
348 1.1 skrll err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg);
349 1.1 skrll if (err) {
350 1.1 skrll smsc_warn_printf(sc, "failed to read initial AFC_CFG, "
351 1.1 skrll "error %d\n", err);
352 1.1 skrll return;
353 1.1 skrll }
354 1.1 skrll
355 1.1 skrll /* Enable/disable full duplex operation and TX/RX pause */
356 1.1 skrll if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
357 1.1 skrll smsc_dbg_printf(sc, "full duplex operation\n");
358 1.1 skrll sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN;
359 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX;
360 1.1 skrll
361 1.1 skrll if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
362 1.1 skrll flow = 0xffff0002;
363 1.1 skrll else
364 1.1 skrll flow = 0;
365 1.1 skrll
366 1.1 skrll if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
367 1.1 skrll afc_cfg |= 0xf;
368 1.1 skrll else
369 1.1 skrll afc_cfg &= ~0xf;
370 1.1 skrll } else {
371 1.1 skrll smsc_dbg_printf(sc, "half duplex operation\n");
372 1.1 skrll sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX;
373 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN;
374 1.1 skrll
375 1.1 skrll flow = 0;
376 1.1 skrll afc_cfg |= 0xf;
377 1.1 skrll }
378 1.1 skrll
379 1.1 skrll err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
380 1.1 skrll err += smsc_write_reg(sc, SMSC_FLOW, flow);
381 1.1 skrll err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg);
382 1.1 skrll if (err)
383 1.1 skrll smsc_warn_printf(sc, "media change failed, error %d\n", err);
384 1.1 skrll }
385 1.1 skrll
386 1.1 skrll int
387 1.1 skrll smsc_ifmedia_upd(struct ifnet *ifp)
388 1.1 skrll {
389 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
390 1.1 skrll struct mii_data *mii = &sc->sc_mii;
391 1.1 skrll int err;
392 1.1 skrll
393 1.1 skrll if (mii->mii_instance) {
394 1.1 skrll struct mii_softc *miisc;
395 1.1 skrll
396 1.1 skrll LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
397 1.1 skrll mii_phy_reset(miisc);
398 1.1 skrll }
399 1.1 skrll err = mii_mediachg(mii);
400 1.27 skrll return err;
401 1.1 skrll }
402 1.1 skrll
403 1.1 skrll void
404 1.1 skrll smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
405 1.1 skrll {
406 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
407 1.1 skrll struct mii_data *mii = &sc->sc_mii;
408 1.1 skrll
409 1.1 skrll mii_pollstat(mii);
410 1.1 skrll
411 1.1 skrll ifmr->ifm_active = mii->mii_media_active;
412 1.1 skrll ifmr->ifm_status = mii->mii_media_status;
413 1.1 skrll }
414 1.1 skrll
415 1.1 skrll static inline uint32_t
416 1.1 skrll smsc_hash(uint8_t addr[ETHER_ADDR_LEN])
417 1.1 skrll {
418 1.32 skrll
419 1.1 skrll return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
420 1.1 skrll }
421 1.1 skrll
422 1.1 skrll void
423 1.1 skrll smsc_setmulti(struct smsc_softc *sc)
424 1.1 skrll {
425 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
426 1.1 skrll struct ether_multi *enm;
427 1.1 skrll struct ether_multistep step;
428 1.1 skrll uint32_t hashtbl[2] = { 0, 0 };
429 1.1 skrll uint32_t hash;
430 1.1 skrll
431 1.1 skrll if (sc->sc_dying)
432 1.1 skrll return;
433 1.1 skrll
434 1.1 skrll if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
435 1.1 skrll allmulti:
436 1.1 skrll smsc_dbg_printf(sc, "receive all multicast enabled\n");
437 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS;
438 1.1 skrll sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT;
439 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
440 1.1 skrll return;
441 1.1 skrll } else {
442 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT;
443 1.1 skrll sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS);
444 1.1 skrll }
445 1.1 skrll
446 1.1 skrll ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
447 1.1 skrll while (enm != NULL) {
448 1.1 skrll if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
449 1.1 skrll ETHER_ADDR_LEN) != 0)
450 1.1 skrll goto allmulti;
451 1.1 skrll
452 1.1 skrll hash = smsc_hash(enm->enm_addrlo);
453 1.1 skrll hashtbl[hash >> 5] |= 1 << (hash & 0x1F);
454 1.1 skrll ETHER_NEXT_MULTI(step, enm);
455 1.1 skrll }
456 1.1 skrll
457 1.1 skrll /* Debug */
458 1.1 skrll if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) {
459 1.1 skrll smsc_dbg_printf(sc, "receive select group of macs\n");
460 1.1 skrll } else {
461 1.1 skrll smsc_dbg_printf(sc, "receive own packets only\n");
462 1.1 skrll }
463 1.1 skrll
464 1.1 skrll /* Write the hash table and mac control registers */
465 1.1 skrll ifp->if_flags &= ~IFF_ALLMULTI;
466 1.1 skrll smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]);
467 1.1 skrll smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]);
468 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
469 1.1 skrll }
470 1.1 skrll
471 1.1 skrll int
472 1.1 skrll smsc_sethwcsum(struct smsc_softc *sc)
473 1.1 skrll {
474 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
475 1.1 skrll uint32_t val;
476 1.1 skrll int err;
477 1.1 skrll
478 1.1 skrll if (!ifp)
479 1.5 skrll return EIO;
480 1.1 skrll
481 1.1 skrll err = smsc_read_reg(sc, SMSC_COE_CTRL, &val);
482 1.1 skrll if (err != 0) {
483 1.1 skrll smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n",
484 1.1 skrll err);
485 1.27 skrll return err;
486 1.1 skrll }
487 1.1 skrll
488 1.1 skrll /* Enable/disable the Rx checksum */
489 1.13 mlelstv if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx))
490 1.13 mlelstv val |= (SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);
491 1.1 skrll else
492 1.13 mlelstv val &= ~(SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);
493 1.1 skrll
494 1.1 skrll /* Enable/disable the Tx checksum (currently not supported) */
495 1.13 mlelstv if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Tx|IFCAP_CSUM_UDPv4_Tx))
496 1.1 skrll val |= SMSC_COE_CTRL_TX_EN;
497 1.1 skrll else
498 1.1 skrll val &= ~SMSC_COE_CTRL_TX_EN;
499 1.1 skrll
500 1.13 mlelstv sc->sc_coe_ctrl = val;
501 1.13 mlelstv
502 1.1 skrll err = smsc_write_reg(sc, SMSC_COE_CTRL, val);
503 1.1 skrll if (err != 0) {
504 1.1 skrll smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n",
505 1.1 skrll err);
506 1.27 skrll return err;
507 1.1 skrll }
508 1.1 skrll
509 1.27 skrll return 0;
510 1.1 skrll }
511 1.1 skrll
512 1.1 skrll int
513 1.1 skrll smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr)
514 1.1 skrll {
515 1.1 skrll int err;
516 1.1 skrll uint32_t val;
517 1.1 skrll
518 1.1 skrll smsc_dbg_printf(sc, "setting mac address to "
519 1.1 skrll "%02x:%02x:%02x:%02x:%02x:%02x\n",
520 1.1 skrll addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
521 1.1 skrll
522 1.1 skrll val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
523 1.1 skrll if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0)
524 1.1 skrll goto done;
525 1.1 skrll
526 1.1 skrll val = (addr[5] << 8) | addr[4];
527 1.1 skrll err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val);
528 1.1 skrll
529 1.1 skrll done:
530 1.27 skrll return err;
531 1.1 skrll }
532 1.1 skrll
533 1.1 skrll void
534 1.1 skrll smsc_reset(struct smsc_softc *sc)
535 1.1 skrll {
536 1.1 skrll if (sc->sc_dying)
537 1.1 skrll return;
538 1.1 skrll
539 1.1 skrll /* Wait a little while for the chip to get its brains in order. */
540 1.1 skrll DELAY(1000);
541 1.1 skrll
542 1.1 skrll /* Reinitialize controller to achieve full reset. */
543 1.1 skrll smsc_chip_init(sc);
544 1.1 skrll }
545 1.1 skrll
546 1.1 skrll int
547 1.1 skrll smsc_init(struct ifnet *ifp)
548 1.1 skrll {
549 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
550 1.1 skrll struct smsc_chain *c;
551 1.1 skrll usbd_status err;
552 1.1 skrll int s, i;
553 1.1 skrll
554 1.1 skrll if (sc->sc_dying)
555 1.1 skrll return EIO;
556 1.1 skrll
557 1.1 skrll s = splnet();
558 1.1 skrll
559 1.1 skrll /* Cancel pending I/O */
560 1.1 skrll if (ifp->if_flags & IFF_RUNNING)
561 1.1 skrll smsc_stop(ifp, 1);
562 1.1 skrll
563 1.1 skrll /* Reset the ethernet interface. */
564 1.1 skrll smsc_reset(sc);
565 1.1 skrll
566 1.1 skrll /* Load the multicast filter. */
567 1.1 skrll smsc_setmulti(sc);
568 1.9 christos
569 1.13 mlelstv /* TCP/UDP checksum offload engines. */
570 1.13 mlelstv smsc_sethwcsum(sc);
571 1.13 mlelstv
572 1.1 skrll /* Open RX and TX pipes. */
573 1.1 skrll err = usbd_open_pipe(sc->sc_iface, sc->sc_ed[SMSC_ENDPT_RX],
574 1.1 skrll USBD_EXCLUSIVE_USE, &sc->sc_ep[SMSC_ENDPT_RX]);
575 1.1 skrll if (err) {
576 1.1 skrll printf("%s: open rx pipe failed: %s\n",
577 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
578 1.1 skrll splx(s);
579 1.1 skrll return EIO;
580 1.1 skrll }
581 1.1 skrll
582 1.1 skrll err = usbd_open_pipe(sc->sc_iface, sc->sc_ed[SMSC_ENDPT_TX],
583 1.1 skrll USBD_EXCLUSIVE_USE, &sc->sc_ep[SMSC_ENDPT_TX]);
584 1.1 skrll if (err) {
585 1.1 skrll printf("%s: open tx pipe failed: %s\n",
586 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
587 1.1 skrll splx(s);
588 1.1 skrll return EIO;
589 1.1 skrll }
590 1.1 skrll
591 1.27 skrll /* Init RX ring. */
592 1.27 skrll if (smsc_rx_list_init(sc)) {
593 1.27 skrll aprint_error_dev(sc->sc_dev, "rx list init failed\n");
594 1.27 skrll splx(s);
595 1.27 skrll return EIO;
596 1.27 skrll }
597 1.27 skrll
598 1.27 skrll /* Init TX ring. */
599 1.27 skrll if (smsc_tx_list_init(sc)) {
600 1.27 skrll aprint_error_dev(sc->sc_dev, "tx list init failed\n");
601 1.27 skrll splx(s);
602 1.27 skrll return EIO;
603 1.27 skrll }
604 1.27 skrll
605 1.1 skrll /* Start up the receive pipe. */
606 1.1 skrll for (i = 0; i < SMSC_RX_LIST_CNT; i++) {
607 1.1 skrll c = &sc->sc_cdata.rx_chain[i];
608 1.27 skrll usbd_setup_xfer(c->sc_xfer, c, c->sc_buf, sc->sc_bufsz,
609 1.27 skrll USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, smsc_rxeof);
610 1.1 skrll usbd_transfer(c->sc_xfer);
611 1.1 skrll }
612 1.1 skrll
613 1.1 skrll /* Indicate we are up and running. */
614 1.1 skrll ifp->if_flags |= IFF_RUNNING;
615 1.1 skrll ifp->if_flags &= ~IFF_OACTIVE;
616 1.1 skrll
617 1.1 skrll splx(s);
618 1.1 skrll
619 1.1 skrll callout_reset(&sc->sc_stat_ch, hz, smsc_tick, sc);
620 1.1 skrll
621 1.1 skrll return 0;
622 1.1 skrll }
623 1.1 skrll
624 1.1 skrll void
625 1.1 skrll smsc_start(struct ifnet *ifp)
626 1.1 skrll {
627 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
628 1.1 skrll struct mbuf *m_head = NULL;
629 1.1 skrll
630 1.1 skrll /* Don't send anything if there is no link or controller is busy. */
631 1.1 skrll if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
632 1.1 skrll return;
633 1.1 skrll }
634 1.1 skrll
635 1.1 skrll if ((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING)) != IFF_RUNNING)
636 1.1 skrll return;
637 1.1 skrll
638 1.1 skrll IFQ_POLL(&ifp->if_snd, m_head);
639 1.1 skrll if (m_head == NULL)
640 1.1 skrll return;
641 1.1 skrll
642 1.1 skrll if (smsc_encap(sc, m_head, 0)) {
643 1.1 skrll ifp->if_flags |= IFF_OACTIVE;
644 1.1 skrll return;
645 1.1 skrll }
646 1.1 skrll IFQ_DEQUEUE(&ifp->if_snd, m_head);
647 1.1 skrll
648 1.33.2.1 pgoyette bpf_mtap(ifp, m_head, BPF_D_OUT);
649 1.1 skrll
650 1.1 skrll ifp->if_flags |= IFF_OACTIVE;
651 1.4 skrll
652 1.4 skrll /*
653 1.4 skrll * Set a timeout in case the chip goes out to lunch.
654 1.4 skrll */
655 1.4 skrll ifp->if_timer = 5;
656 1.1 skrll }
657 1.1 skrll
658 1.1 skrll void
659 1.1 skrll smsc_tick(void *xsc)
660 1.1 skrll {
661 1.1 skrll struct smsc_softc *sc = xsc;
662 1.1 skrll
663 1.1 skrll if (sc == NULL)
664 1.1 skrll return;
665 1.1 skrll
666 1.1 skrll if (sc->sc_dying)
667 1.1 skrll return;
668 1.1 skrll
669 1.1 skrll usb_add_task(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER);
670 1.1 skrll }
671 1.1 skrll
672 1.1 skrll void
673 1.1 skrll smsc_stop(struct ifnet *ifp, int disable)
674 1.1 skrll {
675 1.1 skrll usbd_status err;
676 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
677 1.1 skrll int i;
678 1.1 skrll
679 1.1 skrll smsc_reset(sc);
680 1.1 skrll
681 1.1 skrll ifp = &sc->sc_ec.ec_if;
682 1.1 skrll ifp->if_timer = 0;
683 1.1 skrll ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
684 1.1 skrll
685 1.1 skrll callout_stop(&sc->sc_stat_ch);
686 1.1 skrll
687 1.1 skrll /* Stop transfers. */
688 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_RX] != NULL) {
689 1.1 skrll err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
690 1.1 skrll if (err) {
691 1.1 skrll printf("%s: abort rx pipe failed: %s\n",
692 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
693 1.1 skrll }
694 1.1 skrll }
695 1.1 skrll
696 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_TX] != NULL) {
697 1.1 skrll err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
698 1.1 skrll if (err) {
699 1.1 skrll printf("%s: abort tx pipe failed: %s\n",
700 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
701 1.1 skrll }
702 1.1 skrll }
703 1.1 skrll
704 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_INTR] != NULL) {
705 1.1 skrll err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_INTR]);
706 1.1 skrll if (err) {
707 1.1 skrll printf("%s: abort intr pipe failed: %s\n",
708 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(err));
709 1.1 skrll }
710 1.1 skrll }
711 1.1 skrll
712 1.1 skrll /* Free RX resources. */
713 1.1 skrll for (i = 0; i < SMSC_RX_LIST_CNT; i++) {
714 1.1 skrll if (sc->sc_cdata.rx_chain[i].sc_mbuf != NULL) {
715 1.1 skrll m_freem(sc->sc_cdata.rx_chain[i].sc_mbuf);
716 1.1 skrll sc->sc_cdata.rx_chain[i].sc_mbuf = NULL;
717 1.1 skrll }
718 1.1 skrll if (sc->sc_cdata.rx_chain[i].sc_xfer != NULL) {
719 1.27 skrll usbd_destroy_xfer(sc->sc_cdata.rx_chain[i].sc_xfer);
720 1.1 skrll sc->sc_cdata.rx_chain[i].sc_xfer = NULL;
721 1.1 skrll }
722 1.1 skrll }
723 1.1 skrll
724 1.1 skrll /* Free TX resources. */
725 1.1 skrll for (i = 0; i < SMSC_TX_LIST_CNT; i++) {
726 1.1 skrll if (sc->sc_cdata.tx_chain[i].sc_mbuf != NULL) {
727 1.1 skrll m_freem(sc->sc_cdata.tx_chain[i].sc_mbuf);
728 1.1 skrll sc->sc_cdata.tx_chain[i].sc_mbuf = NULL;
729 1.1 skrll }
730 1.1 skrll if (sc->sc_cdata.tx_chain[i].sc_xfer != NULL) {
731 1.27 skrll usbd_destroy_xfer(sc->sc_cdata.tx_chain[i].sc_xfer);
732 1.1 skrll sc->sc_cdata.tx_chain[i].sc_xfer = NULL;
733 1.1 skrll }
734 1.1 skrll }
735 1.27 skrll /* Close pipes */
736 1.27 skrll if (sc->sc_ep[SMSC_ENDPT_RX] != NULL) {
737 1.27 skrll err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
738 1.27 skrll if (err) {
739 1.27 skrll printf("%s: close rx pipe failed: %s\n",
740 1.27 skrll device_xname(sc->sc_dev), usbd_errstr(err));
741 1.27 skrll }
742 1.27 skrll sc->sc_ep[SMSC_ENDPT_RX] = NULL;
743 1.27 skrll }
744 1.27 skrll
745 1.27 skrll if (sc->sc_ep[SMSC_ENDPT_TX] != NULL) {
746 1.27 skrll err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
747 1.27 skrll if (err) {
748 1.27 skrll printf("%s: close tx pipe failed: %s\n",
749 1.27 skrll device_xname(sc->sc_dev), usbd_errstr(err));
750 1.27 skrll }
751 1.27 skrll sc->sc_ep[SMSC_ENDPT_TX] = NULL;
752 1.27 skrll }
753 1.27 skrll
754 1.27 skrll if (sc->sc_ep[SMSC_ENDPT_INTR] != NULL) {
755 1.27 skrll err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_INTR]);
756 1.27 skrll if (err) {
757 1.27 skrll printf("%s: close intr pipe failed: %s\n",
758 1.27 skrll device_xname(sc->sc_dev), usbd_errstr(err));
759 1.27 skrll }
760 1.27 skrll sc->sc_ep[SMSC_ENDPT_INTR] = NULL;
761 1.27 skrll }
762 1.1 skrll }
763 1.1 skrll
764 1.1 skrll int
765 1.1 skrll smsc_chip_init(struct smsc_softc *sc)
766 1.1 skrll {
767 1.1 skrll int err;
768 1.1 skrll uint32_t reg_val;
769 1.1 skrll int burst_cap;
770 1.1 skrll
771 1.1 skrll /* Enter H/W config mode */
772 1.1 skrll smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST);
773 1.1 skrll
774 1.1 skrll if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG,
775 1.1 skrll SMSC_HW_CFG_LRST)) != 0) {
776 1.1 skrll smsc_warn_printf(sc, "timed-out waiting for reset to "
777 1.1 skrll "complete\n");
778 1.1 skrll goto init_failed;
779 1.1 skrll }
780 1.1 skrll
781 1.1 skrll /* Reset the PHY */
782 1.1 skrll smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST);
783 1.1 skrll
784 1.1 skrll if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL,
785 1.26 skrll SMSC_PM_CTRL_PHY_RST)) != 0) {
786 1.1 skrll smsc_warn_printf(sc, "timed-out waiting for phy reset to "
787 1.1 skrll "complete\n");
788 1.1 skrll goto init_failed;
789 1.1 skrll }
790 1.1 skrll usbd_delay_ms(sc->sc_udev, 40);
791 1.1 skrll
792 1.1 skrll /* Set the mac address */
793 1.11 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
794 1.11 skrll const char *eaddr = CLLADDR(ifp->if_sadl);
795 1.11 skrll if ((err = smsc_setmacaddress(sc, eaddr)) != 0) {
796 1.1 skrll smsc_warn_printf(sc, "failed to set the MAC address\n");
797 1.1 skrll goto init_failed;
798 1.1 skrll }
799 1.1 skrll
800 1.1 skrll /*
801 1.1 skrll * Don't know what the HW_CFG_BIR bit is, but following the reset
802 1.1 skrll * sequence as used in the Linux driver.
803 1.1 skrll */
804 1.1 skrll if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) != 0) {
805 1.1 skrll smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err);
806 1.1 skrll goto init_failed;
807 1.1 skrll }
808 1.1 skrll reg_val |= SMSC_HW_CFG_BIR;
809 1.1 skrll smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
810 1.1 skrll
811 1.1 skrll /*
812 1.1 skrll * There is a so called 'turbo mode' that the linux driver supports, it
813 1.1 skrll * seems to allow you to jam multiple frames per Rx transaction.
814 1.1 skrll * By default this driver supports that and therefore allows multiple
815 1.8 skrll * frames per USB transfer.
816 1.1 skrll *
817 1.1 skrll * The xfer buffer size needs to reflect this as well, therefore based
818 1.1 skrll * on the calculations in the Linux driver the RX bufsize is set to
819 1.1 skrll * 18944,
820 1.1 skrll * bufsz = (16 * 1024 + 5 * 512)
821 1.1 skrll *
822 1.1 skrll * Burst capability is the number of URBs that can be in a burst of
823 1.1 skrll * data/ethernet frames.
824 1.1 skrll */
825 1.13 mlelstv
826 1.27 skrll if (sc->sc_udev->ud_speed == USB_SPEED_HIGH)
827 1.1 skrll burst_cap = 37;
828 1.1 skrll else
829 1.1 skrll burst_cap = 128;
830 1.1 skrll
831 1.1 skrll smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap);
832 1.1 skrll
833 1.1 skrll /* Set the default bulk in delay (magic value from Linux driver) */
834 1.1 skrll smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000);
835 1.1 skrll
836 1.1 skrll /*
837 1.1 skrll * Initialise the RX interface
838 1.1 skrll */
839 1.1 skrll if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) < 0) {
840 1.1 skrll smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n",
841 1.1 skrll err);
842 1.1 skrll goto init_failed;
843 1.1 skrll }
844 1.1 skrll
845 1.1 skrll /*
846 1.8 skrll * The following settings are used for 'turbo mode', a.k.a multiple
847 1.1 skrll * frames per Rx transaction (again info taken form Linux driver).
848 1.1 skrll */
849 1.14 skrll reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
850 1.13 mlelstv
851 1.18 skrll /*
852 1.13 mlelstv * set Rx data offset to ETHER_ALIGN which will make the IP header
853 1.13 mlelstv * align on a word boundary.
854 1.18 skrll */
855 1.13 mlelstv reg_val |= ETHER_ALIGN << SMSC_HW_CFG_RXDOFF_SHIFT;
856 1.1 skrll
857 1.1 skrll smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
858 1.1 skrll
859 1.1 skrll /* Clear the status register ? */
860 1.1 skrll smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff);
861 1.1 skrll
862 1.1 skrll /* Read and display the revision register */
863 1.1 skrll if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) {
864 1.1 skrll smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err);
865 1.1 skrll goto init_failed;
866 1.1 skrll }
867 1.1 skrll
868 1.1 skrll /* GPIO/LED setup */
869 1.1 skrll reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
870 1.1 skrll SMSC_LED_GPIO_CFG_FDX_LED;
871 1.1 skrll smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val);
872 1.1 skrll
873 1.1 skrll /*
874 1.1 skrll * Initialise the TX interface
875 1.1 skrll */
876 1.1 skrll smsc_write_reg(sc, SMSC_FLOW, 0);
877 1.1 skrll
878 1.1 skrll smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT);
879 1.1 skrll
880 1.1 skrll /* Read the current MAC configuration */
881 1.1 skrll if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) {
882 1.1 skrll smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err);
883 1.1 skrll goto init_failed;
884 1.1 skrll }
885 1.1 skrll
886 1.13 mlelstv /* disable pad stripping, collides with checksum offload */
887 1.13 mlelstv sc->sc_mac_csr &= ~SMSC_MAC_CSR_PADSTR;
888 1.13 mlelstv
889 1.1 skrll /* Vlan */
890 1.1 skrll smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN);
891 1.1 skrll
892 1.1 skrll /*
893 1.1 skrll * Start TX
894 1.1 skrll */
895 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN;
896 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
897 1.1 skrll smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON);
898 1.1 skrll
899 1.1 skrll /*
900 1.1 skrll * Start RX
901 1.1 skrll */
902 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN;
903 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
904 1.1 skrll
905 1.27 skrll return 0;
906 1.1 skrll
907 1.1 skrll init_failed:
908 1.1 skrll smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err);
909 1.27 skrll return err;
910 1.1 skrll }
911 1.1 skrll
912 1.1 skrll int
913 1.1 skrll smsc_ioctl(struct ifnet *ifp, u_long cmd, void *data)
914 1.1 skrll {
915 1.1 skrll struct smsc_softc *sc = ifp->if_softc;
916 1.1 skrll struct ifreq /*const*/ *ifr = data;
917 1.1 skrll int s, error = 0;
918 1.1 skrll
919 1.1 skrll if (sc->sc_dying)
920 1.1 skrll return EIO;
921 1.1 skrll
922 1.1 skrll s = splnet();
923 1.1 skrll
924 1.1 skrll switch(cmd) {
925 1.1 skrll case SIOCSIFFLAGS:
926 1.1 skrll if ((error = ifioctl_common(ifp, cmd, data)) != 0)
927 1.1 skrll break;
928 1.1 skrll
929 1.1 skrll switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
930 1.1 skrll case IFF_RUNNING:
931 1.1 skrll smsc_stop(ifp, 1);
932 1.1 skrll break;
933 1.1 skrll case IFF_UP:
934 1.1 skrll smsc_init(ifp);
935 1.1 skrll break;
936 1.1 skrll case IFF_UP | IFF_RUNNING:
937 1.1 skrll if (ifp->if_flags & IFF_PROMISC &&
938 1.1 skrll !(sc->sc_if_flags & IFF_PROMISC)) {
939 1.1 skrll sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS;
940 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR,
941 1.1 skrll sc->sc_mac_csr);
942 1.1 skrll smsc_setmulti(sc);
943 1.1 skrll } else if (!(ifp->if_flags & IFF_PROMISC) &&
944 1.1 skrll sc->sc_if_flags & IFF_PROMISC) {
945 1.1 skrll sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS;
946 1.1 skrll smsc_write_reg(sc, SMSC_MAC_CSR,
947 1.1 skrll sc->sc_mac_csr);
948 1.1 skrll smsc_setmulti(sc);
949 1.1 skrll } else {
950 1.1 skrll smsc_init(ifp);
951 1.1 skrll }
952 1.1 skrll break;
953 1.1 skrll }
954 1.1 skrll sc->sc_if_flags = ifp->if_flags;
955 1.1 skrll break;
956 1.1 skrll
957 1.1 skrll case SIOCGIFMEDIA:
958 1.1 skrll case SIOCSIFMEDIA:
959 1.1 skrll error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
960 1.1 skrll break;
961 1.1 skrll
962 1.1 skrll default:
963 1.1 skrll if ((error = ether_ioctl(ifp, cmd, data)) != ENETRESET)
964 1.1 skrll break;
965 1.1 skrll
966 1.1 skrll error = 0;
967 1.1 skrll
968 1.1 skrll if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI)
969 1.1 skrll smsc_setmulti(sc);
970 1.1 skrll
971 1.1 skrll }
972 1.1 skrll splx(s);
973 1.1 skrll
974 1.1 skrll return error;
975 1.1 skrll }
976 1.1 skrll
977 1.1 skrll int
978 1.1 skrll smsc_match(device_t parent, cfdata_t match, void *aux)
979 1.1 skrll {
980 1.1 skrll struct usb_attach_arg *uaa = aux;
981 1.1 skrll
982 1.27 skrll return (usb_lookup(smsc_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ?
983 1.1 skrll UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
984 1.1 skrll }
985 1.1 skrll
986 1.1 skrll void
987 1.1 skrll smsc_attach(device_t parent, device_t self, void *aux)
988 1.1 skrll {
989 1.1 skrll struct smsc_softc *sc = device_private(self);
990 1.1 skrll struct usb_attach_arg *uaa = aux;
991 1.27 skrll struct usbd_device *dev = uaa->uaa_device;
992 1.1 skrll usb_interface_descriptor_t *id;
993 1.1 skrll usb_endpoint_descriptor_t *ed;
994 1.1 skrll char *devinfop;
995 1.1 skrll struct mii_data *mii;
996 1.1 skrll struct ifnet *ifp;
997 1.1 skrll int err, s, i;
998 1.1 skrll uint32_t mac_h, mac_l;
999 1.1 skrll
1000 1.1 skrll sc->sc_dev = self;
1001 1.1 skrll sc->sc_udev = dev;
1002 1.1 skrll
1003 1.1 skrll aprint_naive("\n");
1004 1.1 skrll aprint_normal("\n");
1005 1.1 skrll
1006 1.1 skrll devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
1007 1.1 skrll aprint_normal_dev(self, "%s\n", devinfop);
1008 1.1 skrll usbd_devinfo_free(devinfop);
1009 1.1 skrll
1010 1.1 skrll err = usbd_set_config_no(dev, SMSC_CONFIG_INDEX, 1);
1011 1.1 skrll if (err) {
1012 1.1 skrll aprint_error_dev(self, "failed to set configuration"
1013 1.1 skrll ", err=%s\n", usbd_errstr(err));
1014 1.1 skrll return;
1015 1.1 skrll }
1016 1.1 skrll /* Setup the endpoints for the SMSC LAN95xx device(s) */
1017 1.6 jmcneill usb_init_task(&sc->sc_tick_task, smsc_tick_task, sc, 0);
1018 1.6 jmcneill usb_init_task(&sc->sc_stop_task, (void (*)(void *))smsc_stop, sc, 0);
1019 1.1 skrll mutex_init(&sc->sc_mii_lock, MUTEX_DEFAULT, IPL_NONE);
1020 1.1 skrll
1021 1.1 skrll err = usbd_device2interface_handle(dev, SMSC_IFACE_IDX, &sc->sc_iface);
1022 1.1 skrll if (err) {
1023 1.1 skrll aprint_error_dev(self, "getting interface handle failed\n");
1024 1.1 skrll return;
1025 1.1 skrll }
1026 1.1 skrll
1027 1.1 skrll id = usbd_get_interface_descriptor(sc->sc_iface);
1028 1.1 skrll
1029 1.27 skrll if (sc->sc_udev->ud_speed >= USB_SPEED_HIGH)
1030 1.1 skrll sc->sc_bufsz = SMSC_MAX_BUFSZ;
1031 1.1 skrll else
1032 1.1 skrll sc->sc_bufsz = SMSC_MIN_BUFSZ;
1033 1.1 skrll
1034 1.1 skrll /* Find endpoints. */
1035 1.1 skrll for (i = 0; i < id->bNumEndpoints; i++) {
1036 1.1 skrll ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
1037 1.1 skrll if (!ed) {
1038 1.1 skrll aprint_error_dev(self, "couldn't get ep %d\n", i);
1039 1.1 skrll return;
1040 1.1 skrll }
1041 1.1 skrll if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
1042 1.1 skrll UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
1043 1.1 skrll sc->sc_ed[SMSC_ENDPT_RX] = ed->bEndpointAddress;
1044 1.1 skrll } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
1045 1.1 skrll UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
1046 1.1 skrll sc->sc_ed[SMSC_ENDPT_TX] = ed->bEndpointAddress;
1047 1.1 skrll } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
1048 1.1 skrll UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
1049 1.1 skrll sc->sc_ed[SMSC_ENDPT_INTR] = ed->bEndpointAddress;
1050 1.1 skrll }
1051 1.1 skrll }
1052 1.1 skrll
1053 1.1 skrll s = splnet();
1054 1.1 skrll
1055 1.1 skrll ifp = &sc->sc_ec.ec_if;
1056 1.1 skrll ifp->if_softc = sc;
1057 1.1 skrll strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
1058 1.1 skrll ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1059 1.1 skrll ifp->if_init = smsc_init;
1060 1.1 skrll ifp->if_ioctl = smsc_ioctl;
1061 1.1 skrll ifp->if_start = smsc_start;
1062 1.1 skrll ifp->if_stop = smsc_stop;
1063 1.1 skrll
1064 1.13 mlelstv #ifdef notyet
1065 1.13 mlelstv /*
1066 1.13 mlelstv * We can do TCPv4, and UDPv4 checksums in hardware.
1067 1.13 mlelstv */
1068 1.13 mlelstv ifp->if_capabilities |=
1069 1.13 mlelstv /*IFCAP_CSUM_TCPv4_Tx |*/ IFCAP_CSUM_TCPv4_Rx |
1070 1.13 mlelstv /*IFCAP_CSUM_UDPv4_Tx |*/ IFCAP_CSUM_UDPv4_Rx;
1071 1.13 mlelstv #endif
1072 1.13 mlelstv
1073 1.15 skrll sc->sc_ec.ec_capabilities = ETHERCAP_VLAN_MTU;
1074 1.9 christos
1075 1.1 skrll /* Setup some of the basics */
1076 1.1 skrll sc->sc_phyno = 1;
1077 1.1 skrll
1078 1.1 skrll /*
1079 1.1 skrll * Attempt to get the mac address, if an EEPROM is not attached this
1080 1.1 skrll * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
1081 1.1 skrll * address based on urandom.
1082 1.1 skrll */
1083 1.1 skrll memset(sc->sc_enaddr, 0xff, ETHER_ADDR_LEN);
1084 1.1 skrll
1085 1.1 skrll prop_dictionary_t dict = device_properties(self);
1086 1.1 skrll prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
1087 1.1 skrll
1088 1.1 skrll if (eaprop != NULL) {
1089 1.1 skrll KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
1090 1.1 skrll KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
1091 1.1 skrll memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
1092 1.1 skrll ETHER_ADDR_LEN);
1093 1.1 skrll } else
1094 1.1 skrll /* Check if there is already a MAC address in the register */
1095 1.1 skrll if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) &&
1096 1.1 skrll (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) {
1097 1.1 skrll sc->sc_enaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
1098 1.1 skrll sc->sc_enaddr[4] = (uint8_t)((mac_h) & 0xff);
1099 1.1 skrll sc->sc_enaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
1100 1.1 skrll sc->sc_enaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
1101 1.1 skrll sc->sc_enaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
1102 1.1 skrll sc->sc_enaddr[0] = (uint8_t)((mac_l) & 0xff);
1103 1.1 skrll }
1104 1.1 skrll
1105 1.21 jmcneill aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(sc->sc_enaddr));
1106 1.1 skrll
1107 1.1 skrll IFQ_SET_READY(&ifp->if_snd);
1108 1.1 skrll
1109 1.1 skrll /* Initialize MII/media info. */
1110 1.1 skrll mii = &sc->sc_mii;
1111 1.1 skrll mii->mii_ifp = ifp;
1112 1.1 skrll mii->mii_readreg = smsc_miibus_readreg;
1113 1.1 skrll mii->mii_writereg = smsc_miibus_writereg;
1114 1.1 skrll mii->mii_statchg = smsc_miibus_statchg;
1115 1.1 skrll mii->mii_flags = MIIF_AUTOTSLEEP;
1116 1.1 skrll sc->sc_ec.ec_mii = mii;
1117 1.1 skrll ifmedia_init(&mii->mii_media, 0, smsc_ifmedia_upd, smsc_ifmedia_sts);
1118 1.1 skrll mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
1119 1.1 skrll
1120 1.1 skrll if (LIST_FIRST(&mii->mii_phys) == NULL) {
1121 1.1 skrll ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
1122 1.1 skrll ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
1123 1.1 skrll } else
1124 1.1 skrll ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
1125 1.1 skrll
1126 1.1 skrll if_attach(ifp);
1127 1.1 skrll ether_ifattach(ifp, sc->sc_enaddr);
1128 1.1 skrll
1129 1.1 skrll rnd_attach_source(&sc->sc_rnd_source, device_xname(sc->sc_dev),
1130 1.19 tls RND_TYPE_NET, RND_FLAG_DEFAULT);
1131 1.1 skrll
1132 1.1 skrll callout_init(&sc->sc_stat_ch, 0);
1133 1.1 skrll
1134 1.1 skrll splx(s);
1135 1.1 skrll
1136 1.1 skrll usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev);
1137 1.1 skrll }
1138 1.1 skrll
1139 1.1 skrll int
1140 1.1 skrll smsc_detach(device_t self, int flags)
1141 1.1 skrll {
1142 1.1 skrll struct smsc_softc *sc = device_private(self);
1143 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
1144 1.1 skrll int s;
1145 1.1 skrll
1146 1.33.2.2 pgoyette callout_halt(&sc->sc_stat_ch, NULL);
1147 1.1 skrll
1148 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_TX] != NULL)
1149 1.1 skrll usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
1150 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_RX] != NULL)
1151 1.1 skrll usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
1152 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_INTR] != NULL)
1153 1.1 skrll usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_INTR]);
1154 1.1 skrll
1155 1.33.2.2 pgoyette usb_rem_task_wait(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER,
1156 1.33.2.2 pgoyette NULL);
1157 1.33.2.2 pgoyette usb_rem_task_wait(sc->sc_udev, &sc->sc_stop_task, USB_TASKQ_DRIVER,
1158 1.33.2.2 pgoyette NULL);
1159 1.1 skrll
1160 1.1 skrll s = splusb();
1161 1.1 skrll
1162 1.1 skrll if (--sc->sc_refcnt >= 0) {
1163 1.1 skrll /* Wait for processes to go away */
1164 1.1 skrll usb_detach_waitold(sc->sc_dev);
1165 1.1 skrll }
1166 1.1 skrll
1167 1.1 skrll if (ifp->if_flags & IFF_RUNNING)
1168 1.1 skrll smsc_stop(ifp ,1);
1169 1.1 skrll
1170 1.1 skrll rnd_detach_source(&sc->sc_rnd_source);
1171 1.1 skrll mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1172 1.1 skrll ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
1173 1.1 skrll if (ifp->if_softc != NULL) {
1174 1.1 skrll ether_ifdetach(ifp);
1175 1.1 skrll if_detach(ifp);
1176 1.1 skrll }
1177 1.1 skrll
1178 1.1 skrll #ifdef DIAGNOSTIC
1179 1.1 skrll if (sc->sc_ep[SMSC_ENDPT_TX] != NULL ||
1180 1.1 skrll sc->sc_ep[SMSC_ENDPT_RX] != NULL ||
1181 1.1 skrll sc->sc_ep[SMSC_ENDPT_INTR] != NULL)
1182 1.1 skrll printf("%s: detach has active endpoints\n",
1183 1.1 skrll device_xname(sc->sc_dev));
1184 1.1 skrll #endif
1185 1.1 skrll
1186 1.1 skrll if (--sc->sc_refcnt >= 0) {
1187 1.1 skrll /* Wait for processes to go away. */
1188 1.1 skrll usb_detach_waitold(sc->sc_dev);
1189 1.1 skrll }
1190 1.1 skrll splx(s);
1191 1.1 skrll
1192 1.1 skrll usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev);
1193 1.1 skrll
1194 1.1 skrll mutex_destroy(&sc->sc_mii_lock);
1195 1.1 skrll
1196 1.27 skrll return 0;
1197 1.1 skrll }
1198 1.1 skrll
1199 1.1 skrll void
1200 1.1 skrll smsc_tick_task(void *xsc)
1201 1.1 skrll {
1202 1.1 skrll int s;
1203 1.1 skrll struct smsc_softc *sc = xsc;
1204 1.1 skrll struct ifnet *ifp;
1205 1.1 skrll struct mii_data *mii;
1206 1.1 skrll
1207 1.1 skrll if (sc == NULL)
1208 1.1 skrll return;
1209 1.1 skrll
1210 1.1 skrll if (sc->sc_dying)
1211 1.1 skrll return;
1212 1.1 skrll ifp = &sc->sc_ec.ec_if;
1213 1.1 skrll mii = &sc->sc_mii;
1214 1.1 skrll if (mii == NULL)
1215 1.1 skrll return;
1216 1.1 skrll
1217 1.1 skrll s = splnet();
1218 1.1 skrll
1219 1.1 skrll mii_tick(mii);
1220 1.1 skrll if ((sc->sc_flags & SMSC_FLAG_LINK) == 0)
1221 1.1 skrll smsc_miibus_statchg(ifp);
1222 1.1 skrll callout_reset(&sc->sc_stat_ch, hz, smsc_tick, sc);
1223 1.1 skrll
1224 1.1 skrll splx(s);
1225 1.1 skrll }
1226 1.1 skrll
1227 1.1 skrll int
1228 1.1 skrll smsc_activate(device_t self, enum devact act)
1229 1.1 skrll {
1230 1.1 skrll struct smsc_softc *sc = device_private(self);
1231 1.1 skrll
1232 1.15 skrll switch (act) {
1233 1.1 skrll case DVACT_DEACTIVATE:
1234 1.1 skrll if_deactivate(&sc->sc_ec.ec_if);
1235 1.1 skrll sc->sc_dying = 1;
1236 1.1 skrll return 0;
1237 1.1 skrll default:
1238 1.1 skrll return EOPNOTSUPP;
1239 1.1 skrll }
1240 1.27 skrll return 0;
1241 1.1 skrll }
1242 1.1 skrll
1243 1.1 skrll void
1244 1.1 skrll smsc_lock_mii(struct smsc_softc *sc)
1245 1.1 skrll {
1246 1.1 skrll sc->sc_refcnt++;
1247 1.1 skrll mutex_enter(&sc->sc_mii_lock);
1248 1.1 skrll }
1249 1.1 skrll
1250 1.1 skrll void
1251 1.1 skrll smsc_unlock_mii(struct smsc_softc *sc)
1252 1.1 skrll {
1253 1.1 skrll mutex_exit(&sc->sc_mii_lock);
1254 1.1 skrll if (--sc->sc_refcnt < 0)
1255 1.1 skrll usb_detach_wakeupold(sc->sc_dev);
1256 1.1 skrll }
1257 1.1 skrll
1258 1.1 skrll void
1259 1.27 skrll smsc_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1260 1.1 skrll {
1261 1.1 skrll struct smsc_chain *c = (struct smsc_chain *)priv;
1262 1.1 skrll struct smsc_softc *sc = c->sc_sc;
1263 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
1264 1.1 skrll u_char *buf = c->sc_buf;
1265 1.1 skrll uint32_t total_len;
1266 1.13 mlelstv uint32_t rxhdr;
1267 1.13 mlelstv uint16_t pktlen;
1268 1.1 skrll struct mbuf *m;
1269 1.1 skrll int s;
1270 1.1 skrll
1271 1.1 skrll if (sc->sc_dying)
1272 1.1 skrll return;
1273 1.1 skrll
1274 1.1 skrll if (!(ifp->if_flags & IFF_RUNNING))
1275 1.1 skrll return;
1276 1.1 skrll
1277 1.1 skrll if (status != USBD_NORMAL_COMPLETION) {
1278 1.1 skrll if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
1279 1.1 skrll return;
1280 1.1 skrll if (usbd_ratecheck(&sc->sc_rx_notice)) {
1281 1.1 skrll printf("%s: usb errors on rx: %s\n",
1282 1.1 skrll device_xname(sc->sc_dev), usbd_errstr(status));
1283 1.1 skrll }
1284 1.1 skrll if (status == USBD_STALLED)
1285 1.1 skrll usbd_clear_endpoint_stall_async(sc->sc_ep[SMSC_ENDPT_RX]);
1286 1.1 skrll goto done;
1287 1.1 skrll }
1288 1.1 skrll
1289 1.1 skrll usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
1290 1.1 skrll smsc_dbg_printf(sc, "xfer status total_len %d\n", total_len);
1291 1.1 skrll
1292 1.13 mlelstv while (total_len != 0) {
1293 1.1 skrll if (total_len < sizeof(rxhdr)) {
1294 1.1 skrll smsc_dbg_printf(sc, "total_len %d < sizeof(rxhdr) %zu\n",
1295 1.1 skrll total_len, sizeof(rxhdr));
1296 1.1 skrll ifp->if_ierrors++;
1297 1.1 skrll goto done;
1298 1.1 skrll }
1299 1.1 skrll
1300 1.1 skrll memcpy(&rxhdr, buf, sizeof(rxhdr));
1301 1.1 skrll rxhdr = le32toh(rxhdr);
1302 1.13 mlelstv buf += sizeof(rxhdr);
1303 1.1 skrll total_len -= sizeof(rxhdr);
1304 1.1 skrll
1305 1.24 mlelstv if (rxhdr & SMSC_RX_STAT_COLLISION)
1306 1.24 mlelstv ifp->if_collisions++;
1307 1.24 mlelstv
1308 1.24 mlelstv if (rxhdr & (SMSC_RX_STAT_ERROR
1309 1.24 mlelstv | SMSC_RX_STAT_LENGTH_ERROR
1310 1.24 mlelstv | SMSC_RX_STAT_MII_ERROR)) {
1311 1.1 skrll smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr);
1312 1.1 skrll ifp->if_ierrors++;
1313 1.1 skrll goto done;
1314 1.1 skrll }
1315 1.1 skrll
1316 1.1 skrll pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr);
1317 1.1 skrll smsc_dbg_printf(sc, "rxeof total_len %d pktlen %d rxhdr "
1318 1.1 skrll "0x%08x\n", total_len, pktlen, rxhdr);
1319 1.13 mlelstv
1320 1.22 jmcneill if (pktlen < ETHER_HDR_LEN) {
1321 1.22 jmcneill smsc_dbg_printf(sc, "pktlen %d < ETHER_HDR_LEN %d\n",
1322 1.22 jmcneill pktlen, ETHER_HDR_LEN);
1323 1.22 jmcneill ifp->if_ierrors++;
1324 1.22 jmcneill goto done;
1325 1.22 jmcneill }
1326 1.22 jmcneill
1327 1.13 mlelstv pktlen += ETHER_ALIGN;
1328 1.13 mlelstv
1329 1.17 mlelstv if (pktlen > MCLBYTES) {
1330 1.17 mlelstv smsc_dbg_printf(sc, "pktlen %d > MCLBYTES %d\n",
1331 1.17 mlelstv pktlen, MCLBYTES);
1332 1.17 mlelstv ifp->if_ierrors++;
1333 1.17 mlelstv goto done;
1334 1.17 mlelstv }
1335 1.17 mlelstv
1336 1.1 skrll if (pktlen > total_len) {
1337 1.1 skrll smsc_dbg_printf(sc, "pktlen %d > total_len %d\n",
1338 1.1 skrll pktlen, total_len);
1339 1.1 skrll ifp->if_ierrors++;
1340 1.1 skrll goto done;
1341 1.1 skrll }
1342 1.1 skrll
1343 1.1 skrll m = smsc_newbuf();
1344 1.1 skrll if (m == NULL) {
1345 1.1 skrll smsc_dbg_printf(sc, "smc_newbuf returned NULL\n");
1346 1.1 skrll ifp->if_ierrors++;
1347 1.1 skrll goto done;
1348 1.1 skrll }
1349 1.1 skrll
1350 1.29 ozaki m_set_rcvif(m, ifp);
1351 1.1 skrll m->m_pkthdr.len = m->m_len = pktlen;
1352 1.13 mlelstv m->m_flags |= M_HASFCS;
1353 1.1 skrll m_adj(m, ETHER_ALIGN);
1354 1.17 mlelstv
1355 1.17 mlelstv KASSERT(m->m_len < MCLBYTES);
1356 1.13 mlelstv memcpy(mtod(m, char *), buf + ETHER_ALIGN, m->m_len);
1357 1.1 skrll
1358 1.13 mlelstv /* Check if RX TCP/UDP checksumming is being offloaded */
1359 1.13 mlelstv if (sc->sc_coe_ctrl & SMSC_COE_CTRL_RX_EN) {
1360 1.13 mlelstv smsc_dbg_printf(sc,"RX checksum offload checking\n");
1361 1.13 mlelstv struct ether_header *eh;
1362 1.13 mlelstv
1363 1.13 mlelstv eh = mtod(m, struct ether_header *);
1364 1.13 mlelstv
1365 1.13 mlelstv /* Remove the extra 2 bytes of the csum */
1366 1.13 mlelstv m_adj(m, -2);
1367 1.13 mlelstv
1368 1.13 mlelstv /*
1369 1.13 mlelstv * The checksum appears to be simplistically calculated
1370 1.13 mlelstv * over the udp/tcp header and data up to the end of the
1371 1.13 mlelstv * eth frame. Which means if the eth frame is padded
1372 1.13 mlelstv * the csum calculation is incorrectly performed over
1373 1.13 mlelstv * the padding bytes as well. Therefore to be safe we
1374 1.13 mlelstv * ignore the H/W csum on frames less than or equal to
1375 1.13 mlelstv * 64 bytes.
1376 1.13 mlelstv *
1377 1.13 mlelstv * Ignore H/W csum for non-IPv4 packets.
1378 1.13 mlelstv */
1379 1.13 mlelstv smsc_dbg_printf(sc,"Ethertype %02x pktlen %02x\n",
1380 1.18 skrll be16toh(eh->ether_type), pktlen);
1381 1.13 mlelstv if (be16toh(eh->ether_type) == ETHERTYPE_IP &&
1382 1.18 skrll pktlen > ETHER_MIN_LEN) {
1383 1.13 mlelstv
1384 1.13 mlelstv m->m_pkthdr.csum_flags |=
1385 1.18 skrll (M_CSUM_TCPv4 | M_CSUM_UDPv4 | M_CSUM_DATA);
1386 1.13 mlelstv
1387 1.13 mlelstv /*
1388 1.13 mlelstv * Copy the TCP/UDP checksum from the last 2
1389 1.13 mlelstv * bytes of the transfer and put in the
1390 1.13 mlelstv * csum_data field.
1391 1.13 mlelstv */
1392 1.13 mlelstv memcpy(&m->m_pkthdr.csum_data,
1393 1.18 skrll buf + pktlen - 2, 2);
1394 1.13 mlelstv /*
1395 1.13 mlelstv * The data is copied in network order, but the
1396 1.13 mlelstv * csum algorithm in the kernel expects it to be
1397 1.13 mlelstv * in host network order.
1398 1.13 mlelstv */
1399 1.13 mlelstv m->m_pkthdr.csum_data =
1400 1.18 skrll ntohs(m->m_pkthdr.csum_data);
1401 1.13 mlelstv smsc_dbg_printf(sc,
1402 1.18 skrll "RX checksum offloaded (0x%04x)\n",
1403 1.18 skrll m->m_pkthdr.csum_data);
1404 1.13 mlelstv }
1405 1.13 mlelstv }
1406 1.13 mlelstv
1407 1.17 mlelstv /* round up to next longword */
1408 1.17 mlelstv pktlen = (pktlen + 3) & ~0x3;
1409 1.17 mlelstv
1410 1.17 mlelstv /* total_len does not include the padding */
1411 1.17 mlelstv if (pktlen > total_len)
1412 1.17 mlelstv pktlen = total_len;
1413 1.17 mlelstv
1414 1.13 mlelstv buf += pktlen;
1415 1.13 mlelstv total_len -= pktlen;
1416 1.1 skrll
1417 1.1 skrll /* push the packet up */
1418 1.1 skrll s = splnet();
1419 1.25 ozaki if_percpuq_enqueue(ifp->if_percpuq, m);
1420 1.1 skrll splx(s);
1421 1.13 mlelstv }
1422 1.1 skrll
1423 1.1 skrll done:
1424 1.1 skrll /* Setup new transfer. */
1425 1.27 skrll usbd_setup_xfer(xfer, c, c->sc_buf, sc->sc_bufsz, USBD_SHORT_XFER_OK,
1426 1.1 skrll USBD_NO_TIMEOUT, smsc_rxeof);
1427 1.1 skrll usbd_transfer(xfer);
1428 1.1 skrll
1429 1.1 skrll return;
1430 1.1 skrll }
1431 1.1 skrll
1432 1.1 skrll void
1433 1.27 skrll smsc_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1434 1.1 skrll {
1435 1.1 skrll struct smsc_softc *sc;
1436 1.1 skrll struct smsc_chain *c;
1437 1.1 skrll struct ifnet *ifp;
1438 1.1 skrll int s;
1439 1.1 skrll
1440 1.1 skrll c = priv;
1441 1.1 skrll sc = c->sc_sc;
1442 1.1 skrll ifp = &sc->sc_ec.ec_if;
1443 1.1 skrll
1444 1.1 skrll if (sc->sc_dying)
1445 1.1 skrll return;
1446 1.1 skrll
1447 1.1 skrll s = splnet();
1448 1.1 skrll
1449 1.4 skrll ifp->if_timer = 0;
1450 1.4 skrll ifp->if_flags &= ~IFF_OACTIVE;
1451 1.4 skrll
1452 1.1 skrll if (status != USBD_NORMAL_COMPLETION) {
1453 1.1 skrll if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
1454 1.1 skrll splx(s);
1455 1.1 skrll return;
1456 1.1 skrll }
1457 1.1 skrll ifp->if_oerrors++;
1458 1.1 skrll printf("%s: usb error on tx: %s\n", device_xname(sc->sc_dev),
1459 1.1 skrll usbd_errstr(status));
1460 1.1 skrll if (status == USBD_STALLED)
1461 1.1 skrll usbd_clear_endpoint_stall_async(sc->sc_ep[SMSC_ENDPT_TX]);
1462 1.1 skrll splx(s);
1463 1.1 skrll return;
1464 1.1 skrll }
1465 1.4 skrll ifp->if_opackets++;
1466 1.1 skrll
1467 1.1 skrll m_freem(c->sc_mbuf);
1468 1.1 skrll c->sc_mbuf = NULL;
1469 1.1 skrll
1470 1.1 skrll if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1471 1.1 skrll smsc_start(ifp);
1472 1.1 skrll
1473 1.1 skrll splx(s);
1474 1.1 skrll }
1475 1.1 skrll
1476 1.1 skrll int
1477 1.1 skrll smsc_tx_list_init(struct smsc_softc *sc)
1478 1.1 skrll {
1479 1.1 skrll struct smsc_cdata *cd;
1480 1.1 skrll struct smsc_chain *c;
1481 1.1 skrll int i;
1482 1.1 skrll
1483 1.1 skrll cd = &sc->sc_cdata;
1484 1.1 skrll for (i = 0; i < SMSC_TX_LIST_CNT; i++) {
1485 1.1 skrll c = &cd->tx_chain[i];
1486 1.1 skrll c->sc_sc = sc;
1487 1.1 skrll c->sc_idx = i;
1488 1.1 skrll c->sc_mbuf = NULL;
1489 1.1 skrll if (c->sc_xfer == NULL) {
1490 1.27 skrll int error = usbd_create_xfer(sc->sc_ep[SMSC_ENDPT_TX],
1491 1.27 skrll sc->sc_bufsz, USBD_FORCE_SHORT_XFER, 0,
1492 1.27 skrll &c->sc_xfer);
1493 1.27 skrll if (error)
1494 1.28 martin return EIO;
1495 1.27 skrll c->sc_buf = usbd_get_buffer(c->sc_xfer);
1496 1.1 skrll }
1497 1.1 skrll }
1498 1.1 skrll
1499 1.27 skrll return 0;
1500 1.1 skrll }
1501 1.1 skrll
1502 1.1 skrll int
1503 1.1 skrll smsc_rx_list_init(struct smsc_softc *sc)
1504 1.1 skrll {
1505 1.1 skrll struct smsc_cdata *cd;
1506 1.1 skrll struct smsc_chain *c;
1507 1.1 skrll int i;
1508 1.1 skrll
1509 1.1 skrll cd = &sc->sc_cdata;
1510 1.1 skrll for (i = 0; i < SMSC_RX_LIST_CNT; i++) {
1511 1.1 skrll c = &cd->rx_chain[i];
1512 1.1 skrll c->sc_sc = sc;
1513 1.1 skrll c->sc_idx = i;
1514 1.1 skrll c->sc_mbuf = NULL;
1515 1.1 skrll if (c->sc_xfer == NULL) {
1516 1.27 skrll int error = usbd_create_xfer(sc->sc_ep[SMSC_ENDPT_RX],
1517 1.33 skrll sc->sc_bufsz, 0, 0, &c->sc_xfer);
1518 1.27 skrll if (error)
1519 1.27 skrll return error;
1520 1.27 skrll c->sc_buf = usbd_get_buffer(c->sc_xfer);
1521 1.1 skrll }
1522 1.1 skrll }
1523 1.1 skrll
1524 1.27 skrll return 0;
1525 1.1 skrll }
1526 1.1 skrll
1527 1.1 skrll struct mbuf *
1528 1.1 skrll smsc_newbuf(void)
1529 1.1 skrll {
1530 1.1 skrll struct mbuf *m;
1531 1.1 skrll
1532 1.1 skrll MGETHDR(m, M_DONTWAIT, MT_DATA);
1533 1.1 skrll if (m == NULL)
1534 1.27 skrll return NULL;
1535 1.1 skrll
1536 1.1 skrll MCLGET(m, M_DONTWAIT);
1537 1.1 skrll if (!(m->m_flags & M_EXT)) {
1538 1.1 skrll m_freem(m);
1539 1.27 skrll return NULL;
1540 1.1 skrll }
1541 1.1 skrll
1542 1.27 skrll return m;
1543 1.1 skrll }
1544 1.1 skrll
1545 1.1 skrll int
1546 1.1 skrll smsc_encap(struct smsc_softc *sc, struct mbuf *m, int idx)
1547 1.1 skrll {
1548 1.1 skrll struct ifnet *ifp = &sc->sc_ec.ec_if;
1549 1.1 skrll struct smsc_chain *c;
1550 1.1 skrll usbd_status err;
1551 1.1 skrll uint32_t txhdr;
1552 1.1 skrll uint32_t frm_len = 0;
1553 1.1 skrll
1554 1.1 skrll c = &sc->sc_cdata.tx_chain[idx];
1555 1.1 skrll
1556 1.1 skrll /*
1557 1.1 skrll * Each frame is prefixed with two 32-bit values describing the
1558 1.1 skrll * length of the packet and buffer.
1559 1.1 skrll */
1560 1.1 skrll txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) |
1561 1.1 skrll SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG;
1562 1.1 skrll txhdr = htole32(txhdr);
1563 1.1 skrll memcpy(c->sc_buf, &txhdr, sizeof(txhdr));
1564 1.1 skrll
1565 1.1 skrll txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len);
1566 1.1 skrll txhdr = htole32(txhdr);
1567 1.1 skrll memcpy(c->sc_buf + 4, &txhdr, sizeof(txhdr));
1568 1.1 skrll
1569 1.1 skrll frm_len += 8;
1570 1.1 skrll
1571 1.1 skrll /* Next copy in the actual packet */
1572 1.1 skrll m_copydata(m, 0, m->m_pkthdr.len, c->sc_buf + frm_len);
1573 1.1 skrll frm_len += m->m_pkthdr.len;
1574 1.1 skrll
1575 1.1 skrll c->sc_mbuf = m;
1576 1.1 skrll
1577 1.27 skrll usbd_setup_xfer(c->sc_xfer, c, c->sc_buf, frm_len,
1578 1.27 skrll USBD_FORCE_SHORT_XFER, 10000, smsc_txeof);
1579 1.1 skrll
1580 1.1 skrll err = usbd_transfer(c->sc_xfer);
1581 1.1 skrll /* XXXNH get task to stop interface */
1582 1.1 skrll if (err != USBD_IN_PROGRESS) {
1583 1.1 skrll smsc_stop(ifp, 0);
1584 1.27 skrll return EIO;
1585 1.1 skrll }
1586 1.1 skrll
1587 1.1 skrll sc->sc_cdata.tx_cnt++;
1588 1.1 skrll
1589 1.27 skrll return 0;
1590 1.1 skrll }
1591