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if_smsc.c revision 1.33.2.3
      1  1.33.2.3  pgoyette /*	$NetBSD: if_smsc.c,v 1.33.2.3 2018/09/30 01:45:51 pgoyette Exp $	*/
      2       1.1     skrll 
      3       1.1     skrll /*	$OpenBSD: if_smsc.c,v 1.4 2012/09/27 12:38:11 jsg Exp $	*/
      4      1.32     skrll /*	$FreeBSD: src/sys/dev/usb/net/if_smsc.c,v 1.1 2012/08/15 04:03:55 gonzo Exp $ */
      5       1.1     skrll /*-
      6       1.1     skrll  * Copyright (c) 2012
      7       1.1     skrll  *	Ben Gray <bgray (at) freebsd.org>.
      8       1.1     skrll  * All rights reserved.
      9       1.1     skrll  *
     10       1.1     skrll  * Redistribution and use in source and binary forms, with or without
     11       1.1     skrll  * modification, are permitted provided that the following conditions
     12       1.1     skrll  * are met:
     13       1.1     skrll  * 1. Redistributions of source code must retain the above copyright
     14       1.1     skrll  *    notice, this list of conditions and the following disclaimer.
     15       1.1     skrll  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1     skrll  *    notice, this list of conditions and the following disclaimer in the
     17       1.1     skrll  *    documentation and/or other materials provided with the distribution.
     18       1.1     skrll  *
     19       1.1     skrll  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     20       1.1     skrll  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     21       1.1     skrll  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22       1.1     skrll  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     23       1.1     skrll  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     24       1.1     skrll  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     25       1.1     skrll  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     26       1.1     skrll  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     27       1.1     skrll  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     28       1.1     skrll  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     29       1.1     skrll  */
     30       1.1     skrll 
     31       1.1     skrll /*
     32       1.1     skrll  * SMSC LAN9xxx devices (http://www.smsc.com/)
     33       1.1     skrll  *
     34       1.1     skrll  * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that
     35       1.1     skrll  * support USB 2.0 and 10/100 Mbps Ethernet.
     36       1.1     skrll  *
     37       1.1     skrll  * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter.
     38       1.1     skrll  * The driver only covers the Ethernet part, the standard USB hub driver
     39       1.1     skrll  * supports the hub part.
     40       1.1     skrll  *
     41       1.1     skrll  * This driver is closely modelled on the Linux driver written and copyrighted
     42       1.1     skrll  * by SMSC.
     43       1.1     skrll  *
     44       1.1     skrll  * H/W TCP & UDP Checksum Offloading
     45       1.1     skrll  * ---------------------------------
     46       1.1     skrll  * The chip supports both tx and rx offloading of UDP & TCP checksums, this
     47       1.1     skrll  * feature can be dynamically enabled/disabled.
     48       1.1     skrll  *
     49       1.1     skrll  * RX checksuming is performed across bytes after the IPv4 header to the end of
     50       1.1     skrll  * the Ethernet frame, this means if the frame is padded with non-zero values
     51       1.1     skrll  * the H/W checksum will be incorrect, however the rx code compensates for this.
     52       1.1     skrll  *
     53       1.1     skrll  * TX checksuming is more complicated, the device requires a special header to
     54       1.1     skrll  * be prefixed onto the start of the frame which indicates the start and end
     55       1.1     skrll  * positions of the UDP or TCP frame.  This requires the driver to manually
     56       1.1     skrll  * go through the packet data and decode the headers prior to sending.
     57       1.1     skrll  * On Linux they generally provide cues to the location of the csum and the
     58       1.1     skrll  * area to calculate it over, on FreeBSD we seem to have to do it all ourselves,
     59       1.8     skrll  * hence this is not as optimal and therefore h/w TX checksum is currently not
     60       1.1     skrll  * implemented.
     61       1.1     skrll  */
     62       1.1     skrll 
     63  1.33.2.2  pgoyette #include <sys/cdefs.h>
     64  1.33.2.3  pgoyette __KERNEL_RCSID(0, "$NetBSD: if_smsc.c,v 1.33.2.3 2018/09/30 01:45:51 pgoyette Exp $");
     65  1.33.2.2  pgoyette 
     66      1.12     skrll #ifdef _KERNEL_OPT
     67      1.20     skrll #include "opt_usb.h"
     68      1.12     skrll #include "opt_inet.h"
     69      1.12     skrll #endif
     70       1.1     skrll 
     71       1.1     skrll #include <sys/param.h>
     72       1.1     skrll #include <sys/bus.h>
     73  1.33.2.3  pgoyette #include <sys/device.h>
     74  1.33.2.3  pgoyette #include <sys/kernel.h>
     75       1.1     skrll #include <sys/mbuf.h>
     76       1.1     skrll #include <sys/mutex.h>
     77       1.1     skrll #include <sys/proc.h>
     78      1.23  riastrad #include <sys/rndsource.h>
     79  1.33.2.3  pgoyette #include <sys/socket.h>
     80  1.33.2.3  pgoyette #include <sys/sockio.h>
     81  1.33.2.3  pgoyette #include <sys/systm.h>
     82       1.1     skrll 
     83       1.1     skrll #include <net/if.h>
     84       1.1     skrll #include <net/if_dl.h>
     85       1.1     skrll #include <net/if_media.h>
     86       1.1     skrll #include <net/if_ether.h>
     87       1.1     skrll 
     88       1.1     skrll #include <net/bpf.h>
     89       1.1     skrll 
     90       1.1     skrll #ifdef INET
     91       1.1     skrll #include <netinet/in.h>
     92      1.12     skrll #include <netinet/if_inarp.h>
     93       1.1     skrll #endif
     94       1.1     skrll 
     95       1.1     skrll #include <dev/mii/mii.h>
     96       1.1     skrll #include <dev/mii/miivar.h>
     97       1.1     skrll 
     98       1.1     skrll #include <dev/usb/usb.h>
     99       1.1     skrll #include <dev/usb/usbdi.h>
    100       1.1     skrll #include <dev/usb/usbdi_util.h>
    101       1.1     skrll #include <dev/usb/usbdivar.h>
    102       1.1     skrll #include <dev/usb/usbdevs.h>
    103       1.1     skrll 
    104       1.1     skrll #include <dev/usb/if_smscreg.h>
    105       1.1     skrll #include <dev/usb/if_smscvar.h>
    106       1.1     skrll 
    107       1.1     skrll #include "ioconf.h"
    108       1.1     skrll 
    109       1.1     skrll #ifdef USB_DEBUG
    110       1.1     skrll int smsc_debug = 0;
    111       1.1     skrll #endif
    112       1.1     skrll 
    113      1.13   mlelstv #define ETHER_ALIGN 2
    114       1.1     skrll /*
    115       1.1     skrll  * Various supported device vendors/products.
    116       1.1     skrll  */
    117       1.1     skrll static const struct usb_devno smsc_devs[] = {
    118       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_LAN89530 },
    119       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_LAN9530 },
    120       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_LAN9730 },
    121       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500 },
    122       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500A },
    123       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500A_ALT },
    124       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500A_HAL },
    125       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500A_SAL10 },
    126       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500_ALT },
    127       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9500_SAL10 },
    128       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505 },
    129       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505A },
    130       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505A_HAL },
    131       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505A_SAL10 },
    132       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9505_SAL10 },
    133       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9512_14 },
    134       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9512_14_ALT },
    135       1.2  jakllsch 	{ USB_VENDOR_SMSC,	USB_PRODUCT_SMSC_SMSC9512_14_SAL10 }
    136       1.1     skrll };
    137       1.1     skrll 
    138       1.1     skrll #ifdef USB_DEBUG
    139       1.1     skrll #define smsc_dbg_printf(sc, fmt, args...) \
    140       1.1     skrll 	do { \
    141       1.1     skrll 		if (smsc_debug > 0) \
    142       1.1     skrll 			printf("debug: " fmt, ##args); \
    143       1.1     skrll 	} while(0)
    144       1.1     skrll #else
    145       1.1     skrll #define smsc_dbg_printf(sc, fmt, args...)
    146       1.1     skrll #endif
    147       1.1     skrll 
    148       1.1     skrll #define smsc_warn_printf(sc, fmt, args...) \
    149       1.1     skrll 	printf("%s: warning: " fmt, device_xname((sc)->sc_dev), ##args)
    150       1.1     skrll 
    151       1.1     skrll #define smsc_err_printf(sc, fmt, args...) \
    152       1.1     skrll 	printf("%s: error: " fmt, device_xname((sc)->sc_dev), ##args)
    153       1.1     skrll 
    154       1.1     skrll /* Function declarations */
    155       1.1     skrll int		 smsc_chip_init(struct smsc_softc *);
    156       1.1     skrll void		 smsc_setmulti(struct smsc_softc *);
    157       1.1     skrll int		 smsc_setmacaddress(struct smsc_softc *, const uint8_t *);
    158       1.1     skrll 
    159       1.1     skrll int		 smsc_match(device_t, cfdata_t, void *);
    160       1.1     skrll void		 smsc_attach(device_t, device_t, void *);
    161       1.1     skrll int		 smsc_detach(device_t, int);
    162       1.1     skrll int		 smsc_activate(device_t, enum devact);
    163       1.1     skrll 
    164       1.1     skrll int		 smsc_init(struct ifnet *);
    165  1.33.2.3  pgoyette int		 smsc_init_locked(struct ifnet *);
    166       1.1     skrll void		 smsc_start(struct ifnet *);
    167  1.33.2.3  pgoyette void		 smsc_start_locked(struct ifnet *);
    168       1.1     skrll int		 smsc_ioctl(struct ifnet *, u_long, void *);
    169       1.1     skrll void		 smsc_stop(struct ifnet *, int);
    170  1.33.2.3  pgoyette void		 smsc_stop_locked(struct ifnet *, int);
    171       1.1     skrll 
    172       1.1     skrll void		 smsc_reset(struct smsc_softc *);
    173       1.1     skrll struct mbuf	*smsc_newbuf(void);
    174       1.1     skrll 
    175       1.1     skrll void		 smsc_tick(void *);
    176       1.1     skrll void		 smsc_tick_task(void *);
    177       1.1     skrll void		 smsc_miibus_statchg(struct ifnet *);
    178  1.33.2.3  pgoyette void		 smsc_miibus_statchg_locked(struct ifnet *);
    179       1.1     skrll int		 smsc_miibus_readreg(device_t, int, int);
    180       1.1     skrll void		 smsc_miibus_writereg(device_t, int, int, int);
    181       1.1     skrll int		 smsc_ifmedia_upd(struct ifnet *);
    182       1.1     skrll void		 smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *);
    183       1.1     skrll void		 smsc_lock_mii(struct smsc_softc *);
    184       1.1     skrll void		 smsc_unlock_mii(struct smsc_softc *);
    185       1.1     skrll 
    186       1.1     skrll int		 smsc_tx_list_init(struct smsc_softc *);
    187  1.33.2.3  pgoyette void		 smsc_tx_list_free(struct smsc_softc *);
    188       1.1     skrll int		 smsc_rx_list_init(struct smsc_softc *);
    189  1.33.2.3  pgoyette void		 smsc_rx_list_free(struct smsc_softc *);
    190       1.1     skrll int		 smsc_encap(struct smsc_softc *, struct mbuf *, int);
    191      1.27     skrll void		 smsc_rxeof(struct usbd_xfer *, void *, usbd_status);
    192      1.27     skrll void		 smsc_txeof(struct usbd_xfer *, void *, usbd_status);
    193       1.1     skrll 
    194       1.1     skrll int		 smsc_read_reg(struct smsc_softc *, uint32_t, uint32_t *);
    195       1.1     skrll int		 smsc_write_reg(struct smsc_softc *, uint32_t, uint32_t);
    196       1.1     skrll int		 smsc_wait_for_bits(struct smsc_softc *, uint32_t, uint32_t);
    197       1.1     skrll int		 smsc_sethwcsum(struct smsc_softc *);
    198       1.1     skrll 
    199       1.1     skrll CFATTACH_DECL_NEW(usmsc, sizeof(struct smsc_softc), smsc_match, smsc_attach,
    200       1.1     skrll     smsc_detach, smsc_activate);
    201       1.1     skrll 
    202       1.1     skrll int
    203       1.1     skrll smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data)
    204       1.1     skrll {
    205       1.1     skrll 	usb_device_request_t req;
    206       1.1     skrll 	uint32_t buf;
    207       1.1     skrll 	usbd_status err;
    208       1.1     skrll 
    209       1.1     skrll 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
    210       1.1     skrll 	req.bRequest = SMSC_UR_READ_REG;
    211       1.1     skrll 	USETW(req.wValue, 0);
    212       1.1     skrll 	USETW(req.wIndex, off);
    213       1.1     skrll 	USETW(req.wLength, 4);
    214       1.1     skrll 
    215       1.1     skrll 	err = usbd_do_request(sc->sc_udev, &req, &buf);
    216       1.1     skrll 	if (err != 0)
    217       1.1     skrll 		smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off);
    218       1.1     skrll 
    219       1.1     skrll 	*data = le32toh(buf);
    220       1.1     skrll 
    221      1.27     skrll 	return err;
    222       1.1     skrll }
    223       1.1     skrll 
    224       1.1     skrll int
    225       1.1     skrll smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data)
    226       1.1     skrll {
    227       1.1     skrll 	usb_device_request_t req;
    228       1.1     skrll 	uint32_t buf;
    229       1.1     skrll 	usbd_status err;
    230       1.1     skrll 
    231       1.1     skrll 	buf = htole32(data);
    232       1.1     skrll 
    233       1.1     skrll 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
    234       1.1     skrll 	req.bRequest = SMSC_UR_WRITE_REG;
    235       1.1     skrll 	USETW(req.wValue, 0);
    236       1.1     skrll 	USETW(req.wIndex, off);
    237       1.1     skrll 	USETW(req.wLength, 4);
    238       1.1     skrll 
    239       1.1     skrll 	err = usbd_do_request(sc->sc_udev, &req, &buf);
    240       1.1     skrll 	if (err != 0)
    241       1.1     skrll 		smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off);
    242       1.1     skrll 
    243      1.27     skrll 	return err;
    244       1.1     skrll }
    245       1.1     skrll 
    246       1.1     skrll int
    247       1.1     skrll smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits)
    248       1.1     skrll {
    249       1.1     skrll 	uint32_t val;
    250       1.1     skrll 	int err, i;
    251       1.1     skrll 
    252       1.1     skrll 	for (i = 0; i < 100; i++) {
    253       1.1     skrll 		if ((err = smsc_read_reg(sc, reg, &val)) != 0)
    254      1.27     skrll 			return err;
    255       1.1     skrll 		if (!(val & bits))
    256      1.27     skrll 			return 0;
    257       1.1     skrll 		DELAY(5);
    258       1.1     skrll 	}
    259       1.1     skrll 
    260      1.27     skrll 	return 1;
    261       1.1     skrll }
    262       1.1     skrll 
    263       1.1     skrll int
    264       1.1     skrll smsc_miibus_readreg(device_t dev, int phy, int reg)
    265       1.1     skrll {
    266  1.33.2.3  pgoyette 	struct smsc_softc * const sc = device_private(dev);
    267       1.1     skrll 	uint32_t addr;
    268       1.1     skrll 	uint32_t val = 0;
    269       1.1     skrll 
    270       1.1     skrll 	smsc_lock_mii(sc);
    271       1.1     skrll 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
    272       1.1     skrll 		smsc_warn_printf(sc, "MII is busy\n");
    273       1.1     skrll 		goto done;
    274       1.1     skrll 	}
    275       1.1     skrll 
    276       1.1     skrll 	addr = (phy << 11) | (reg << 6) | SMSC_MII_READ;
    277       1.1     skrll 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
    278       1.1     skrll 
    279       1.1     skrll 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
    280       1.1     skrll 		smsc_warn_printf(sc, "MII read timeout\n");
    281       1.1     skrll 
    282       1.1     skrll 	smsc_read_reg(sc, SMSC_MII_DATA, &val);
    283       1.3     skrll 
    284       1.3     skrll done:
    285       1.1     skrll 	smsc_unlock_mii(sc);
    286       1.1     skrll 
    287      1.31     skrll 	return val & 0xffff;
    288       1.1     skrll }
    289       1.1     skrll 
    290       1.1     skrll void
    291       1.1     skrll smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
    292       1.1     skrll {
    293  1.33.2.3  pgoyette 	struct smsc_softc * const sc = device_private(dev);
    294       1.1     skrll 	uint32_t addr;
    295       1.1     skrll 
    296       1.1     skrll 	if (sc->sc_phyno != phy)
    297       1.1     skrll 		return;
    298       1.1     skrll 
    299       1.1     skrll 	smsc_lock_mii(sc);
    300       1.1     skrll 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) {
    301       1.1     skrll 		smsc_warn_printf(sc, "MII is busy\n");
    302       1.5     skrll 		smsc_unlock_mii(sc);
    303       1.1     skrll 		return;
    304       1.1     skrll 	}
    305       1.1     skrll 
    306       1.1     skrll 	smsc_write_reg(sc, SMSC_MII_DATA, val);
    307       1.1     skrll 
    308       1.1     skrll 	addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE;
    309       1.1     skrll 	smsc_write_reg(sc, SMSC_MII_ADDR, addr);
    310       1.1     skrll 	smsc_unlock_mii(sc);
    311       1.1     skrll 
    312       1.1     skrll 	if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
    313       1.1     skrll 		smsc_warn_printf(sc, "MII write timeout\n");
    314       1.1     skrll }
    315       1.1     skrll 
    316       1.1     skrll void
    317       1.1     skrll smsc_miibus_statchg(struct ifnet *ifp)
    318       1.1     skrll {
    319  1.33.2.3  pgoyette 	if (ifp == NULL)
    320  1.33.2.3  pgoyette 		return;
    321  1.33.2.3  pgoyette 
    322  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    323  1.33.2.3  pgoyette 
    324  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
    325  1.33.2.3  pgoyette 	if (sc->sc_dying) {
    326  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_lock);
    327  1.33.2.3  pgoyette 		return;
    328  1.33.2.3  pgoyette 	}
    329  1.33.2.3  pgoyette 	smsc_miibus_statchg_locked(ifp);
    330  1.33.2.3  pgoyette 
    331  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
    332  1.33.2.3  pgoyette }
    333  1.33.2.3  pgoyette 
    334  1.33.2.3  pgoyette 
    335  1.33.2.3  pgoyette void
    336  1.33.2.3  pgoyette smsc_miibus_statchg_locked(struct ifnet *ifp)
    337  1.33.2.3  pgoyette {
    338  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    339  1.33.2.3  pgoyette 	struct mii_data * const mii = &sc->sc_mii;
    340       1.1     skrll 	int err;
    341       1.1     skrll 	uint32_t flow;
    342       1.1     skrll 	uint32_t afc_cfg;
    343       1.1     skrll 
    344  1.33.2.3  pgoyette 	KASSERT(mutex_owned(&sc->sc_lock));
    345  1.33.2.3  pgoyette 
    346  1.33.2.3  pgoyette 	if ((ifp->if_flags & IFF_RUNNING) == 0) {
    347  1.33.2.3  pgoyette 		smsc_dbg_printf(sc, "%s: not running\n", __func__);
    348       1.1     skrll 		return;
    349  1.33.2.3  pgoyette 	}
    350       1.1     skrll 
    351       1.1     skrll 	/* Use the MII status to determine link status */
    352       1.1     skrll 	sc->sc_flags &= ~SMSC_FLAG_LINK;
    353       1.1     skrll 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
    354       1.1     skrll 	    (IFM_ACTIVE | IFM_AVALID)) {
    355       1.1     skrll 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
    356       1.1     skrll 			case IFM_10_T:
    357       1.1     skrll 			case IFM_100_TX:
    358       1.1     skrll 				sc->sc_flags |= SMSC_FLAG_LINK;
    359       1.1     skrll 				break;
    360       1.1     skrll 			case IFM_1000_T:
    361       1.1     skrll 				/* Gigabit ethernet not supported by chipset */
    362       1.1     skrll 				break;
    363       1.1     skrll 			default:
    364       1.1     skrll 				break;
    365       1.1     skrll 		}
    366       1.1     skrll 	}
    367       1.1     skrll 
    368       1.1     skrll 	/* Lost link, do nothing. */
    369       1.1     skrll 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
    370       1.1     skrll 		smsc_dbg_printf(sc, "link flag not set\n");
    371       1.1     skrll 		return;
    372       1.1     skrll 	}
    373       1.1     skrll 
    374       1.1     skrll 	err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg);
    375       1.1     skrll 	if (err) {
    376       1.1     skrll 		smsc_warn_printf(sc, "failed to read initial AFC_CFG, "
    377       1.1     skrll 		    "error %d\n", err);
    378       1.1     skrll 		return;
    379       1.1     skrll 	}
    380       1.1     skrll 
    381       1.1     skrll 	/* Enable/disable full duplex operation and TX/RX pause */
    382       1.1     skrll 	if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
    383       1.1     skrll 		smsc_dbg_printf(sc, "full duplex operation\n");
    384       1.1     skrll 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN;
    385       1.1     skrll 		sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX;
    386       1.1     skrll 
    387       1.1     skrll 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0)
    388       1.1     skrll 			flow = 0xffff0002;
    389       1.1     skrll 		else
    390       1.1     skrll 			flow = 0;
    391       1.1     skrll 
    392       1.1     skrll 		if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0)
    393       1.1     skrll 			afc_cfg |= 0xf;
    394       1.1     skrll 		else
    395       1.1     skrll 			afc_cfg &= ~0xf;
    396       1.1     skrll 	} else {
    397       1.1     skrll 		smsc_dbg_printf(sc, "half duplex operation\n");
    398       1.1     skrll 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX;
    399       1.1     skrll 		sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN;
    400       1.1     skrll 
    401       1.1     skrll 		flow = 0;
    402       1.1     skrll 		afc_cfg |= 0xf;
    403       1.1     skrll 	}
    404       1.1     skrll 
    405       1.1     skrll 	err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
    406       1.1     skrll 	err += smsc_write_reg(sc, SMSC_FLOW, flow);
    407       1.1     skrll 	err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg);
    408       1.1     skrll 	if (err)
    409       1.1     skrll 		smsc_warn_printf(sc, "media change failed, error %d\n", err);
    410       1.1     skrll }
    411       1.1     skrll 
    412       1.1     skrll int
    413       1.1     skrll smsc_ifmedia_upd(struct ifnet *ifp)
    414       1.1     skrll {
    415  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    416  1.33.2.3  pgoyette 	struct mii_data * const mii = &sc->sc_mii;
    417       1.1     skrll 	int err;
    418       1.1     skrll 
    419       1.1     skrll 	if (mii->mii_instance) {
    420       1.1     skrll 		struct mii_softc *miisc;
    421       1.1     skrll 
    422       1.1     skrll 		LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
    423       1.1     skrll 			mii_phy_reset(miisc);
    424       1.1     skrll 	}
    425       1.1     skrll 	err = mii_mediachg(mii);
    426      1.27     skrll 	return err;
    427       1.1     skrll }
    428       1.1     skrll 
    429       1.1     skrll void
    430       1.1     skrll smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
    431       1.1     skrll {
    432  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    433  1.33.2.3  pgoyette 	struct mii_data * const mii = &sc->sc_mii;
    434  1.33.2.3  pgoyette 
    435  1.33.2.3  pgoyette 	/* SMSC_LOCK */
    436       1.1     skrll 
    437       1.1     skrll 	mii_pollstat(mii);
    438       1.1     skrll 
    439       1.1     skrll 	ifmr->ifm_active = mii->mii_media_active;
    440       1.1     skrll 	ifmr->ifm_status = mii->mii_media_status;
    441  1.33.2.3  pgoyette 
    442  1.33.2.3  pgoyette 	/* SMSC_UNLOCK */
    443       1.1     skrll }
    444       1.1     skrll 
    445       1.1     skrll static inline uint32_t
    446       1.1     skrll smsc_hash(uint8_t addr[ETHER_ADDR_LEN])
    447       1.1     skrll {
    448      1.32     skrll 
    449       1.1     skrll 	return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f;
    450       1.1     skrll }
    451       1.1     skrll 
    452       1.1     skrll void
    453       1.1     skrll smsc_setmulti(struct smsc_softc *sc)
    454       1.1     skrll {
    455  1.33.2.3  pgoyette 	struct ifnet * const ifp = &sc->sc_ec.ec_if;
    456  1.33.2.3  pgoyette 	struct ether_multi *enm;
    457  1.33.2.3  pgoyette 	struct ether_multistep step;
    458  1.33.2.3  pgoyette 	uint32_t hashtbl[2] = { 0, 0 };
    459  1.33.2.3  pgoyette 	uint32_t hash;
    460  1.33.2.3  pgoyette 
    461  1.33.2.3  pgoyette 	KASSERT(mutex_owned(&sc->sc_lock));
    462       1.1     skrll 
    463       1.1     skrll 	if (sc->sc_dying)
    464       1.1     skrll 		return;
    465       1.1     skrll 
    466       1.1     skrll 	if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
    467       1.1     skrll allmulti:
    468       1.1     skrll 		smsc_dbg_printf(sc, "receive all multicast enabled\n");
    469       1.1     skrll 		sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS;
    470       1.1     skrll 		sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT;
    471       1.1     skrll 		smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
    472       1.1     skrll 		return;
    473       1.1     skrll 	} else {
    474       1.1     skrll 		sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT;
    475       1.1     skrll 		sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS);
    476       1.1     skrll 	}
    477       1.1     skrll 
    478  1.33.2.3  pgoyette 	ETHER_LOCK(&sc->sc_ec);
    479       1.1     skrll 	ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
    480       1.1     skrll 	while (enm != NULL) {
    481  1.33.2.3  pgoyette 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
    482  1.33.2.3  pgoyette 			ETHER_UNLOCK(&sc->sc_ec);
    483       1.1     skrll 			goto allmulti;
    484  1.33.2.3  pgoyette 		}
    485       1.1     skrll 
    486       1.1     skrll 		hash = smsc_hash(enm->enm_addrlo);
    487       1.1     skrll 		hashtbl[hash >> 5] |= 1 << (hash & 0x1F);
    488       1.1     skrll 		ETHER_NEXT_MULTI(step, enm);
    489       1.1     skrll 	}
    490  1.33.2.3  pgoyette 	ETHER_UNLOCK(&sc->sc_ec);
    491       1.1     skrll 
    492       1.1     skrll 	/* Debug */
    493       1.1     skrll 	if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) {
    494       1.1     skrll 		smsc_dbg_printf(sc, "receive select group of macs\n");
    495       1.1     skrll 	} else {
    496       1.1     skrll 		smsc_dbg_printf(sc, "receive own packets only\n");
    497       1.1     skrll 	}
    498       1.1     skrll 
    499       1.1     skrll 	/* Write the hash table and mac control registers */
    500       1.1     skrll 	ifp->if_flags &= ~IFF_ALLMULTI;
    501       1.1     skrll 	smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]);
    502       1.1     skrll 	smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]);
    503       1.1     skrll 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
    504       1.1     skrll }
    505       1.1     skrll 
    506       1.1     skrll int
    507       1.1     skrll smsc_sethwcsum(struct smsc_softc *sc)
    508       1.1     skrll {
    509  1.33.2.3  pgoyette 	struct ifnet * const ifp = &sc->sc_ec.ec_if;
    510       1.1     skrll 	uint32_t val;
    511       1.1     skrll 	int err;
    512       1.1     skrll 
    513       1.1     skrll 	err = smsc_read_reg(sc, SMSC_COE_CTRL, &val);
    514       1.1     skrll 	if (err != 0) {
    515       1.1     skrll 		smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n",
    516       1.1     skrll 		    err);
    517      1.27     skrll 		return err;
    518       1.1     skrll 	}
    519       1.1     skrll 
    520       1.1     skrll 	/* Enable/disable the Rx checksum */
    521      1.13   mlelstv 	if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Rx|IFCAP_CSUM_UDPv4_Rx))
    522      1.13   mlelstv 		val |= (SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);
    523       1.1     skrll 	else
    524      1.13   mlelstv 		val &= ~(SMSC_COE_CTRL_RX_EN | SMSC_COE_CTRL_RX_MODE);
    525       1.1     skrll 
    526       1.1     skrll 	/* Enable/disable the Tx checksum (currently not supported) */
    527      1.13   mlelstv 	if (ifp->if_capenable & (IFCAP_CSUM_TCPv4_Tx|IFCAP_CSUM_UDPv4_Tx))
    528       1.1     skrll 		val |= SMSC_COE_CTRL_TX_EN;
    529       1.1     skrll 	else
    530       1.1     skrll 		val &= ~SMSC_COE_CTRL_TX_EN;
    531       1.1     skrll 
    532      1.13   mlelstv 	sc->sc_coe_ctrl = val;
    533      1.13   mlelstv 
    534       1.1     skrll 	err = smsc_write_reg(sc, SMSC_COE_CTRL, val);
    535       1.1     skrll 	if (err != 0) {
    536       1.1     skrll 		smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n",
    537       1.1     skrll 		    err);
    538      1.27     skrll 		return err;
    539       1.1     skrll 	}
    540       1.1     skrll 
    541      1.27     skrll 	return 0;
    542       1.1     skrll }
    543       1.1     skrll 
    544       1.1     skrll int
    545       1.1     skrll smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr)
    546       1.1     skrll {
    547       1.1     skrll 	int err;
    548       1.1     skrll 	uint32_t val;
    549       1.1     skrll 
    550       1.1     skrll 	smsc_dbg_printf(sc, "setting mac address to "
    551       1.1     skrll 	    "%02x:%02x:%02x:%02x:%02x:%02x\n",
    552       1.1     skrll 	    addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
    553       1.1     skrll 
    554       1.1     skrll 	val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
    555       1.1     skrll 	if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0)
    556       1.1     skrll 		goto done;
    557       1.1     skrll 
    558       1.1     skrll 	val = (addr[5] << 8) | addr[4];
    559       1.1     skrll 	err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val);
    560       1.1     skrll 
    561       1.1     skrll done:
    562      1.27     skrll 	return err;
    563       1.1     skrll }
    564       1.1     skrll 
    565       1.1     skrll void
    566       1.1     skrll smsc_reset(struct smsc_softc *sc)
    567       1.1     skrll {
    568  1.33.2.3  pgoyette 	KASSERT(mutex_owned(&sc->sc_lock));
    569       1.1     skrll 	if (sc->sc_dying)
    570       1.1     skrll 		return;
    571       1.1     skrll 
    572       1.1     skrll 	/* Wait a little while for the chip to get its brains in order. */
    573       1.1     skrll 	DELAY(1000);
    574       1.1     skrll 
    575       1.1     skrll 	/* Reinitialize controller to achieve full reset. */
    576       1.1     skrll 	smsc_chip_init(sc);
    577       1.1     skrll }
    578       1.1     skrll 
    579       1.1     skrll int
    580       1.1     skrll smsc_init(struct ifnet *ifp)
    581       1.1     skrll {
    582  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    583  1.33.2.3  pgoyette 
    584  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
    585  1.33.2.3  pgoyette 	int ret = smsc_init_locked(ifp);
    586  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
    587  1.33.2.3  pgoyette 
    588  1.33.2.3  pgoyette 	return ret;
    589  1.33.2.3  pgoyette }
    590  1.33.2.3  pgoyette 
    591  1.33.2.3  pgoyette int
    592  1.33.2.3  pgoyette smsc_init_locked(struct ifnet *ifp)
    593  1.33.2.3  pgoyette {
    594  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    595  1.33.2.3  pgoyette 	usbd_status err;
    596       1.1     skrll 
    597       1.1     skrll 	if (sc->sc_dying)
    598       1.1     skrll 		return EIO;
    599       1.1     skrll 
    600       1.1     skrll 	/* Cancel pending I/O */
    601  1.33.2.3  pgoyette 	smsc_stop_locked(ifp, 1);
    602       1.1     skrll 
    603       1.1     skrll 	/* Reset the ethernet interface. */
    604       1.1     skrll 	smsc_reset(sc);
    605       1.1     skrll 
    606       1.1     skrll 	/* Load the multicast filter. */
    607       1.1     skrll 	smsc_setmulti(sc);
    608       1.9  christos 
    609      1.13   mlelstv 	/* TCP/UDP checksum offload engines. */
    610      1.13   mlelstv 	smsc_sethwcsum(sc);
    611      1.13   mlelstv 
    612       1.1     skrll 	/* Open RX and TX pipes. */
    613       1.1     skrll 	err = usbd_open_pipe(sc->sc_iface, sc->sc_ed[SMSC_ENDPT_RX],
    614  1.33.2.3  pgoyette 	    USBD_EXCLUSIVE_USE | USBD_MPSAFE, &sc->sc_ep[SMSC_ENDPT_RX]);
    615       1.1     skrll 	if (err) {
    616       1.1     skrll 		printf("%s: open rx pipe failed: %s\n",
    617       1.1     skrll 		    device_xname(sc->sc_dev), usbd_errstr(err));
    618  1.33.2.3  pgoyette 		goto fail;
    619       1.1     skrll 	}
    620       1.1     skrll 
    621       1.1     skrll 	err = usbd_open_pipe(sc->sc_iface, sc->sc_ed[SMSC_ENDPT_TX],
    622  1.33.2.3  pgoyette 	    USBD_EXCLUSIVE_USE | USBD_MPSAFE, &sc->sc_ep[SMSC_ENDPT_TX]);
    623       1.1     skrll 	if (err) {
    624       1.1     skrll 		printf("%s: open tx pipe failed: %s\n",
    625       1.1     skrll 		    device_xname(sc->sc_dev), usbd_errstr(err));
    626  1.33.2.3  pgoyette 		goto fail1;
    627       1.1     skrll 	}
    628       1.1     skrll 
    629      1.27     skrll 	/* Init RX ring. */
    630      1.27     skrll 	if (smsc_rx_list_init(sc)) {
    631      1.27     skrll 		aprint_error_dev(sc->sc_dev, "rx list init failed\n");
    632  1.33.2.3  pgoyette 		goto fail2;
    633      1.27     skrll 	}
    634      1.27     skrll 
    635      1.27     skrll 	/* Init TX ring. */
    636      1.27     skrll 	if (smsc_tx_list_init(sc)) {
    637      1.27     skrll 		aprint_error_dev(sc->sc_dev, "tx list init failed\n");
    638  1.33.2.3  pgoyette 		goto fail3;
    639      1.27     skrll 	}
    640      1.27     skrll 
    641  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_rxlock);
    642  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_txlock);
    643  1.33.2.3  pgoyette 	sc->sc_stopping = false;
    644  1.33.2.3  pgoyette 
    645       1.1     skrll 	/* Start up the receive pipe. */
    646  1.33.2.3  pgoyette 	for (size_t i = 0; i < SMSC_RX_LIST_CNT; i++) {
    647  1.33.2.3  pgoyette 		struct smsc_chain * const c = &sc->sc_cdata.rx_chain[i];
    648      1.27     skrll 		usbd_setup_xfer(c->sc_xfer, c, c->sc_buf, sc->sc_bufsz,
    649      1.27     skrll 		    USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, smsc_rxeof);
    650       1.1     skrll 		usbd_transfer(c->sc_xfer);
    651       1.1     skrll 	}
    652       1.1     skrll 
    653  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_txlock);
    654  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_rxlock);
    655  1.33.2.3  pgoyette 
    656       1.1     skrll 	/* Indicate we are up and running. */
    657       1.1     skrll 	ifp->if_flags |= IFF_RUNNING;
    658       1.1     skrll 	ifp->if_flags &= ~IFF_OACTIVE;
    659       1.1     skrll 
    660       1.1     skrll 	callout_reset(&sc->sc_stat_ch, hz, smsc_tick, sc);
    661       1.1     skrll 
    662       1.1     skrll 	return 0;
    663  1.33.2.3  pgoyette 
    664  1.33.2.3  pgoyette fail3:
    665  1.33.2.3  pgoyette 	smsc_rx_list_free(sc);
    666  1.33.2.3  pgoyette fail2:
    667  1.33.2.3  pgoyette 	usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
    668  1.33.2.3  pgoyette fail1:
    669  1.33.2.3  pgoyette 	usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
    670  1.33.2.3  pgoyette fail:
    671  1.33.2.3  pgoyette 	return EIO;
    672       1.1     skrll }
    673       1.1     skrll 
    674       1.1     skrll void
    675       1.1     skrll smsc_start(struct ifnet *ifp)
    676       1.1     skrll {
    677  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    678  1.33.2.3  pgoyette 	KASSERT(ifp->if_extflags & IFEF_MPSAFE);
    679  1.33.2.3  pgoyette 
    680  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_txlock);
    681  1.33.2.3  pgoyette 	if (!sc->sc_stopping)
    682  1.33.2.3  pgoyette 		smsc_start_locked(ifp);
    683  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_txlock);
    684  1.33.2.3  pgoyette }
    685  1.33.2.3  pgoyette 
    686  1.33.2.3  pgoyette void
    687  1.33.2.3  pgoyette smsc_start_locked(struct ifnet *ifp)
    688  1.33.2.3  pgoyette {
    689  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    690  1.33.2.3  pgoyette 	struct mbuf *m_head = NULL;
    691  1.33.2.3  pgoyette 
    692  1.33.2.3  pgoyette 	KASSERT(mutex_owned(&sc->sc_txlock));
    693       1.1     skrll 
    694       1.1     skrll 	/* Don't send anything if there is no link or controller is busy. */
    695       1.1     skrll 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) {
    696  1.33.2.3  pgoyette 		smsc_dbg_printf(sc, "%s: no link\n", __func__);
    697  1.33.2.3  pgoyette 		return;
    698  1.33.2.3  pgoyette 	}
    699  1.33.2.3  pgoyette 
    700  1.33.2.3  pgoyette 	/* Any free USB transfers? */
    701  1.33.2.3  pgoyette 	if (sc->sc_cdata.tx_free == 0) {
    702  1.33.2.3  pgoyette 		smsc_dbg_printf(sc, "%s: all USB transfers in use\n", __func__);
    703       1.1     skrll 		return;
    704       1.1     skrll 	}
    705       1.1     skrll 
    706  1.33.2.3  pgoyette 	if ((ifp->if_flags & (IFF_OACTIVE|IFF_RUNNING)) != IFF_RUNNING) {
    707  1.33.2.3  pgoyette 		smsc_dbg_printf(sc, "%s: not running\n", __func__);
    708       1.1     skrll 		return;
    709  1.33.2.3  pgoyette 	}
    710       1.1     skrll 
    711       1.1     skrll 	IFQ_POLL(&ifp->if_snd, m_head);
    712       1.1     skrll 	if (m_head == NULL)
    713       1.1     skrll 		return;
    714       1.1     skrll 
    715  1.33.2.3  pgoyette 	sc->sc_cdata.tx_free--;
    716  1.33.2.3  pgoyette 
    717  1.33.2.3  pgoyette 	IFQ_DEQUEUE(&ifp->if_snd, m_head);
    718  1.33.2.3  pgoyette 	if (smsc_encap(sc, m_head, sc->sc_cdata.tx_next)) {
    719  1.33.2.3  pgoyette 		m_free(m_head);
    720  1.33.2.3  pgoyette 		sc->sc_cdata.tx_free++;
    721       1.1     skrll 		return;
    722       1.1     skrll 	}
    723  1.33.2.3  pgoyette 
    724  1.33.2.3  pgoyette 	sc->sc_cdata.tx_next = (sc->sc_cdata.tx_next + 1) % SMSC_TX_LIST_CNT;
    725       1.1     skrll 
    726  1.33.2.1  pgoyette 	bpf_mtap(ifp, m_head, BPF_D_OUT);
    727       1.1     skrll 
    728  1.33.2.3  pgoyette 	if (sc->sc_cdata.tx_free == 0)
    729  1.33.2.3  pgoyette 		ifp->if_flags |= IFF_OACTIVE;
    730       1.4     skrll 
    731       1.4     skrll 	/*
    732       1.4     skrll 	 * Set a timeout in case the chip goes out to lunch.
    733       1.4     skrll 	 */
    734       1.4     skrll 	ifp->if_timer = 5;
    735       1.1     skrll }
    736       1.1     skrll 
    737       1.1     skrll void
    738       1.1     skrll smsc_tick(void *xsc)
    739       1.1     skrll {
    740  1.33.2.3  pgoyette 	struct smsc_softc * const sc = xsc;
    741       1.1     skrll 
    742       1.1     skrll 	if (sc == NULL)
    743       1.1     skrll 		return;
    744       1.1     skrll 
    745  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
    746  1.33.2.3  pgoyette 
    747  1.33.2.3  pgoyette 	if (sc->sc_dying) {
    748  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_lock);
    749       1.1     skrll 		return;
    750  1.33.2.3  pgoyette 	}
    751       1.1     skrll 
    752  1.33.2.3  pgoyette 	if (!sc->sc_ttpending) {
    753  1.33.2.3  pgoyette 		sc->sc_ttpending = true;
    754  1.33.2.3  pgoyette 		usb_add_task(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER);
    755  1.33.2.3  pgoyette 	}
    756  1.33.2.3  pgoyette 
    757  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
    758       1.1     skrll }
    759       1.1     skrll 
    760       1.1     skrll void
    761       1.1     skrll smsc_stop(struct ifnet *ifp, int disable)
    762       1.1     skrll {
    763  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    764       1.1     skrll 
    765  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
    766  1.33.2.3  pgoyette 	smsc_stop_locked(ifp, disable);
    767  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
    768  1.33.2.3  pgoyette }
    769       1.1     skrll 
    770  1.33.2.3  pgoyette void
    771  1.33.2.3  pgoyette smsc_stop_locked(struct ifnet *ifp, int disable)
    772  1.33.2.3  pgoyette {
    773  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
    774  1.33.2.3  pgoyette 	usbd_status err;
    775  1.33.2.3  pgoyette 
    776  1.33.2.3  pgoyette 	KASSERT(mutex_owned(&sc->sc_lock));
    777  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_rxlock);
    778  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_txlock);
    779  1.33.2.3  pgoyette 	sc->sc_stopping = true;
    780  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_txlock);
    781  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_rxlock);
    782       1.1     skrll 
    783       1.1     skrll 	callout_stop(&sc->sc_stat_ch);
    784       1.1     skrll 
    785       1.1     skrll 	/* Stop transfers. */
    786       1.1     skrll 	if (sc->sc_ep[SMSC_ENDPT_RX] != NULL) {
    787       1.1     skrll 		err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
    788       1.1     skrll 		if (err) {
    789       1.1     skrll 			printf("%s: abort rx pipe failed: %s\n",
    790       1.1     skrll 			    device_xname(sc->sc_dev), usbd_errstr(err));
    791       1.1     skrll 		}
    792       1.1     skrll 	}
    793       1.1     skrll 
    794       1.1     skrll 	if (sc->sc_ep[SMSC_ENDPT_TX] != NULL) {
    795       1.1     skrll 		err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
    796       1.1     skrll 		if (err) {
    797       1.1     skrll 			printf("%s: abort tx pipe failed: %s\n",
    798       1.1     skrll 			    device_xname(sc->sc_dev), usbd_errstr(err));
    799       1.1     skrll 		}
    800       1.1     skrll 	}
    801       1.1     skrll 
    802       1.1     skrll 	if (sc->sc_ep[SMSC_ENDPT_INTR] != NULL) {
    803       1.1     skrll 		err = usbd_abort_pipe(sc->sc_ep[SMSC_ENDPT_INTR]);
    804       1.1     skrll 		if (err) {
    805       1.1     skrll 			printf("%s: abort intr pipe failed: %s\n",
    806       1.1     skrll 			    device_xname(sc->sc_dev), usbd_errstr(err));
    807       1.1     skrll 		}
    808       1.1     skrll 	}
    809       1.1     skrll 
    810  1.33.2.3  pgoyette 	smsc_rx_list_free(sc);
    811  1.33.2.3  pgoyette 
    812  1.33.2.3  pgoyette 	smsc_tx_list_free(sc);
    813       1.1     skrll 
    814      1.27     skrll 	/* Close pipes */
    815      1.27     skrll 	if (sc->sc_ep[SMSC_ENDPT_RX] != NULL) {
    816      1.27     skrll 		err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_RX]);
    817      1.27     skrll 		if (err) {
    818      1.27     skrll 			printf("%s: close rx pipe failed: %s\n",
    819      1.27     skrll 			    device_xname(sc->sc_dev), usbd_errstr(err));
    820      1.27     skrll 		}
    821      1.27     skrll 		sc->sc_ep[SMSC_ENDPT_RX] = NULL;
    822      1.27     skrll 	}
    823      1.27     skrll 
    824      1.27     skrll 	if (sc->sc_ep[SMSC_ENDPT_TX] != NULL) {
    825      1.27     skrll 		err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_TX]);
    826      1.27     skrll 		if (err) {
    827      1.27     skrll 			printf("%s: close tx pipe failed: %s\n",
    828      1.27     skrll 			    device_xname(sc->sc_dev), usbd_errstr(err));
    829      1.27     skrll 		}
    830      1.27     skrll 		sc->sc_ep[SMSC_ENDPT_TX] = NULL;
    831      1.27     skrll 	}
    832      1.27     skrll 
    833      1.27     skrll 	if (sc->sc_ep[SMSC_ENDPT_INTR] != NULL) {
    834      1.27     skrll 		err = usbd_close_pipe(sc->sc_ep[SMSC_ENDPT_INTR]);
    835      1.27     skrll 		if (err) {
    836      1.27     skrll 			printf("%s: close intr pipe failed: %s\n",
    837      1.27     skrll 			    device_xname(sc->sc_dev), usbd_errstr(err));
    838      1.27     skrll 		}
    839      1.27     skrll 		sc->sc_ep[SMSC_ENDPT_INTR] = NULL;
    840      1.27     skrll 	}
    841  1.33.2.3  pgoyette 
    842  1.33.2.3  pgoyette 	ifp->if_timer = 0;
    843  1.33.2.3  pgoyette 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
    844  1.33.2.3  pgoyette 
    845  1.33.2.3  pgoyette 	if (disable) {
    846  1.33.2.3  pgoyette 		/* drain */
    847  1.33.2.3  pgoyette 	}
    848       1.1     skrll }
    849       1.1     skrll 
    850       1.1     skrll int
    851       1.1     skrll smsc_chip_init(struct smsc_softc *sc)
    852       1.1     skrll {
    853       1.1     skrll 	int err;
    854       1.1     skrll 	uint32_t reg_val;
    855       1.1     skrll 	int burst_cap;
    856       1.1     skrll 
    857       1.1     skrll 	/* Enter H/W config mode */
    858       1.1     skrll 	smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST);
    859       1.1     skrll 
    860       1.1     skrll 	if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG,
    861       1.1     skrll 	    SMSC_HW_CFG_LRST)) != 0) {
    862       1.1     skrll 		smsc_warn_printf(sc, "timed-out waiting for reset to "
    863       1.1     skrll 		    "complete\n");
    864       1.1     skrll 		goto init_failed;
    865       1.1     skrll 	}
    866       1.1     skrll 
    867       1.1     skrll 	/* Reset the PHY */
    868       1.1     skrll 	smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST);
    869       1.1     skrll 
    870       1.1     skrll 	if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL,
    871      1.26     skrll 	    SMSC_PM_CTRL_PHY_RST)) != 0) {
    872       1.1     skrll 		smsc_warn_printf(sc, "timed-out waiting for phy reset to "
    873       1.1     skrll 		    "complete\n");
    874       1.1     skrll 		goto init_failed;
    875       1.1     skrll 	}
    876       1.1     skrll 	usbd_delay_ms(sc->sc_udev, 40);
    877       1.1     skrll 
    878       1.1     skrll 	/* Set the mac address */
    879  1.33.2.3  pgoyette 	struct ifnet * const ifp = &sc->sc_ec.ec_if;
    880      1.11     skrll 	const char *eaddr = CLLADDR(ifp->if_sadl);
    881      1.11     skrll 	if ((err = smsc_setmacaddress(sc, eaddr)) != 0) {
    882       1.1     skrll 		smsc_warn_printf(sc, "failed to set the MAC address\n");
    883       1.1     skrll 		goto init_failed;
    884       1.1     skrll 	}
    885       1.1     skrll 
    886       1.1     skrll 	/*
    887       1.1     skrll 	 * Don't know what the HW_CFG_BIR bit is, but following the reset
    888       1.1     skrll 	 * sequence as used in the Linux driver.
    889       1.1     skrll 	 */
    890       1.1     skrll 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) != 0) {
    891       1.1     skrll 		smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err);
    892       1.1     skrll 		goto init_failed;
    893       1.1     skrll 	}
    894       1.1     skrll 	reg_val |= SMSC_HW_CFG_BIR;
    895       1.1     skrll 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
    896       1.1     skrll 
    897       1.1     skrll 	/*
    898       1.1     skrll 	 * There is a so called 'turbo mode' that the linux driver supports, it
    899       1.1     skrll 	 * seems to allow you to jam multiple frames per Rx transaction.
    900       1.1     skrll 	 * By default this driver supports that and therefore allows multiple
    901       1.8     skrll 	 * frames per USB transfer.
    902       1.1     skrll 	 *
    903       1.1     skrll 	 * The xfer buffer size needs to reflect this as well, therefore based
    904       1.1     skrll 	 * on the calculations in the Linux driver the RX bufsize is set to
    905       1.1     skrll 	 * 18944,
    906       1.1     skrll 	 *     bufsz = (16 * 1024 + 5 * 512)
    907       1.1     skrll 	 *
    908       1.1     skrll 	 * Burst capability is the number of URBs that can be in a burst of
    909       1.1     skrll 	 * data/ethernet frames.
    910       1.1     skrll 	 */
    911      1.13   mlelstv 
    912      1.27     skrll 	if (sc->sc_udev->ud_speed == USB_SPEED_HIGH)
    913       1.1     skrll 		burst_cap = 37;
    914       1.1     skrll 	else
    915       1.1     skrll 		burst_cap = 128;
    916       1.1     skrll 
    917       1.1     skrll 	smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap);
    918       1.1     skrll 
    919       1.1     skrll 	/* Set the default bulk in delay (magic value from Linux driver) */
    920       1.1     skrll 	smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000);
    921       1.1     skrll 
    922       1.1     skrll 	/*
    923       1.1     skrll 	 * Initialise the RX interface
    924       1.1     skrll 	 */
    925       1.1     skrll 	if ((err = smsc_read_reg(sc, SMSC_HW_CFG, &reg_val)) < 0) {
    926       1.1     skrll 		smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n",
    927       1.1     skrll 		    err);
    928       1.1     skrll 		goto init_failed;
    929       1.1     skrll 	}
    930       1.1     skrll 
    931       1.1     skrll 	/*
    932       1.8     skrll 	 * The following settings are used for 'turbo mode', a.k.a multiple
    933       1.1     skrll 	 * frames per Rx transaction (again info taken form Linux driver).
    934       1.1     skrll 	 */
    935      1.14     skrll 	reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE);
    936      1.13   mlelstv 
    937      1.18     skrll 	/*
    938      1.13   mlelstv 	 * set Rx data offset to ETHER_ALIGN which will make the IP header
    939      1.13   mlelstv 	 * align on a word boundary.
    940      1.18     skrll 	 */
    941      1.13   mlelstv 	reg_val |= ETHER_ALIGN << SMSC_HW_CFG_RXDOFF_SHIFT;
    942       1.1     skrll 
    943       1.1     skrll 	smsc_write_reg(sc, SMSC_HW_CFG, reg_val);
    944       1.1     skrll 
    945       1.1     skrll 	/* Clear the status register ? */
    946       1.1     skrll 	smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff);
    947       1.1     skrll 
    948       1.1     skrll 	/* Read and display the revision register */
    949       1.1     skrll 	if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) {
    950       1.1     skrll 		smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err);
    951       1.1     skrll 		goto init_failed;
    952       1.1     skrll 	}
    953       1.1     skrll 
    954       1.1     skrll 	/* GPIO/LED setup */
    955       1.1     skrll 	reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED |
    956       1.1     skrll 	    SMSC_LED_GPIO_CFG_FDX_LED;
    957       1.1     skrll 	smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val);
    958       1.1     skrll 
    959       1.1     skrll 	/*
    960       1.1     skrll 	 * Initialise the TX interface
    961       1.1     skrll 	 */
    962       1.1     skrll 	smsc_write_reg(sc, SMSC_FLOW, 0);
    963       1.1     skrll 
    964       1.1     skrll 	smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT);
    965       1.1     skrll 
    966       1.1     skrll 	/* Read the current MAC configuration */
    967       1.1     skrll 	if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) {
    968       1.1     skrll 		smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err);
    969       1.1     skrll 		goto init_failed;
    970       1.1     skrll 	}
    971       1.1     skrll 
    972      1.13   mlelstv 	/* disable pad stripping, collides with checksum offload */
    973      1.13   mlelstv 	sc->sc_mac_csr &= ~SMSC_MAC_CSR_PADSTR;
    974      1.13   mlelstv 
    975       1.1     skrll 	/* Vlan */
    976       1.1     skrll 	smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN);
    977       1.1     skrll 
    978       1.1     skrll 	/*
    979       1.1     skrll 	 * Start TX
    980       1.1     skrll 	 */
    981       1.1     skrll 	sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN;
    982       1.1     skrll 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
    983       1.1     skrll 	smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON);
    984       1.1     skrll 
    985       1.1     skrll 	/*
    986       1.1     skrll 	 * Start RX
    987       1.1     skrll 	 */
    988       1.1     skrll 	sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN;
    989       1.1     skrll 	smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
    990       1.1     skrll 
    991      1.27     skrll 	return 0;
    992       1.1     skrll 
    993       1.1     skrll init_failed:
    994       1.1     skrll 	smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err);
    995      1.27     skrll 	return err;
    996       1.1     skrll }
    997       1.1     skrll 
    998  1.33.2.3  pgoyette static int
    999  1.33.2.3  pgoyette smsc_ifflags_cb(struct ethercom *ec)
   1000       1.1     skrll {
   1001  1.33.2.3  pgoyette 	struct ifnet *ifp = &ec->ec_if;
   1002  1.33.2.3  pgoyette 	struct smsc_softc *sc = ifp->if_softc;
   1003       1.1     skrll 
   1004  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
   1005       1.1     skrll 
   1006  1.33.2.3  pgoyette 	const int change = ifp->if_flags ^ sc->sc_if_flags;
   1007  1.33.2.3  pgoyette 	if ((change & ~(IFF_CANTCHANGE | IFF_DEBUG)) != 0) {
   1008  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_lock);
   1009  1.33.2.3  pgoyette 		return ENETRESET;
   1010  1.33.2.3  pgoyette 	}
   1011       1.1     skrll 
   1012  1.33.2.3  pgoyette 	smsc_dbg_printf(sc, "%s: change %x\n", __func__, change);
   1013  1.33.2.3  pgoyette 
   1014  1.33.2.3  pgoyette 	if ((change & IFF_PROMISC) != 0) {
   1015  1.33.2.3  pgoyette 		if (ifp->if_flags & IFF_PROMISC) {
   1016  1.33.2.3  pgoyette 			sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS;
   1017  1.33.2.3  pgoyette 			smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
   1018  1.33.2.3  pgoyette 		} else if (!(ifp->if_flags & IFF_PROMISC)) {
   1019  1.33.2.3  pgoyette 			sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS;
   1020  1.33.2.3  pgoyette 			smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr);
   1021       1.1     skrll 		}
   1022  1.33.2.3  pgoyette 		smsc_setmulti(sc);
   1023  1.33.2.3  pgoyette 	}
   1024       1.1     skrll 
   1025  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
   1026       1.1     skrll 
   1027  1.33.2.3  pgoyette 	return 0;
   1028  1.33.2.3  pgoyette }
   1029       1.1     skrll 
   1030       1.1     skrll 
   1031  1.33.2.3  pgoyette int
   1032  1.33.2.3  pgoyette smsc_ioctl(struct ifnet *ifp, u_long cmd, void *data)
   1033  1.33.2.3  pgoyette {
   1034  1.33.2.3  pgoyette 	struct smsc_softc * const sc = ifp->if_softc;
   1035  1.33.2.3  pgoyette 
   1036  1.33.2.3  pgoyette 	smsc_dbg_printf(sc, "%s: cmd %0lx data %p\n", __func__, cmd, data);
   1037  1.33.2.3  pgoyette 
   1038  1.33.2.3  pgoyette 	int error = ether_ioctl(ifp, cmd, data);
   1039       1.1     skrll 
   1040  1.33.2.3  pgoyette 	if (error == ENETRESET) {
   1041  1.33.2.3  pgoyette 		error = 0;
   1042  1.33.2.3  pgoyette 		if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
   1043  1.33.2.3  pgoyette 			if (ifp->if_flags & IFF_RUNNING) {
   1044  1.33.2.3  pgoyette 				mutex_enter(&sc->sc_lock);
   1045  1.33.2.3  pgoyette 				smsc_setmulti(sc);
   1046  1.33.2.3  pgoyette 				mutex_exit(&sc->sc_lock);
   1047  1.33.2.3  pgoyette 			}
   1048  1.33.2.3  pgoyette 		}
   1049       1.1     skrll 	}
   1050  1.33.2.3  pgoyette 
   1051  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_rxlock);
   1052  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_txlock);
   1053  1.33.2.3  pgoyette 	sc->sc_if_flags = ifp->if_flags;
   1054  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_txlock);
   1055  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_rxlock);
   1056       1.1     skrll 
   1057       1.1     skrll 	return error;
   1058       1.1     skrll }
   1059       1.1     skrll 
   1060       1.1     skrll int
   1061       1.1     skrll smsc_match(device_t parent, cfdata_t match, void *aux)
   1062       1.1     skrll {
   1063       1.1     skrll 	struct usb_attach_arg *uaa = aux;
   1064       1.1     skrll 
   1065      1.27     skrll 	return (usb_lookup(smsc_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ?
   1066       1.1     skrll 	    UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
   1067       1.1     skrll }
   1068       1.1     skrll 
   1069       1.1     skrll void
   1070       1.1     skrll smsc_attach(device_t parent, device_t self, void *aux)
   1071       1.1     skrll {
   1072       1.1     skrll 	struct smsc_softc *sc = device_private(self);
   1073       1.1     skrll 	struct usb_attach_arg *uaa = aux;
   1074      1.27     skrll 	struct usbd_device *dev = uaa->uaa_device;
   1075       1.1     skrll 	usb_interface_descriptor_t *id;
   1076       1.1     skrll 	usb_endpoint_descriptor_t *ed;
   1077       1.1     skrll 	char *devinfop;
   1078       1.1     skrll 	struct mii_data *mii;
   1079       1.1     skrll 	struct ifnet *ifp;
   1080  1.33.2.3  pgoyette 	int err, i;
   1081       1.1     skrll 	uint32_t mac_h, mac_l;
   1082       1.1     skrll 
   1083       1.1     skrll 	sc->sc_dev = self;
   1084       1.1     skrll 	sc->sc_udev = dev;
   1085  1.33.2.3  pgoyette 	sc->sc_stopping = false;
   1086       1.1     skrll 
   1087       1.1     skrll 	aprint_naive("\n");
   1088       1.1     skrll 	aprint_normal("\n");
   1089       1.1     skrll 
   1090       1.1     skrll 	devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
   1091       1.1     skrll 	aprint_normal_dev(self, "%s\n", devinfop);
   1092       1.1     skrll 	usbd_devinfo_free(devinfop);
   1093       1.1     skrll 
   1094       1.1     skrll 	err = usbd_set_config_no(dev, SMSC_CONFIG_INDEX, 1);
   1095       1.1     skrll 	if (err) {
   1096       1.1     skrll 		aprint_error_dev(self, "failed to set configuration"
   1097       1.1     skrll 		    ", err=%s\n", usbd_errstr(err));
   1098       1.1     skrll 		return;
   1099       1.1     skrll 	}
   1100       1.1     skrll 
   1101  1.33.2.3  pgoyette 	/* Setup the endpoints for the SMSC LAN95xx device(s) */
   1102       1.1     skrll 	err = usbd_device2interface_handle(dev, SMSC_IFACE_IDX, &sc->sc_iface);
   1103       1.1     skrll 	if (err) {
   1104       1.1     skrll 		aprint_error_dev(self, "getting interface handle failed\n");
   1105       1.1     skrll 		return;
   1106       1.1     skrll 	}
   1107       1.1     skrll 
   1108       1.1     skrll 	id = usbd_get_interface_descriptor(sc->sc_iface);
   1109       1.1     skrll 
   1110      1.27     skrll 	if (sc->sc_udev->ud_speed >= USB_SPEED_HIGH)
   1111       1.1     skrll 		sc->sc_bufsz = SMSC_MAX_BUFSZ;
   1112       1.1     skrll 	else
   1113       1.1     skrll 		sc->sc_bufsz = SMSC_MIN_BUFSZ;
   1114       1.1     skrll 
   1115       1.1     skrll 	/* Find endpoints. */
   1116       1.1     skrll 	for (i = 0; i < id->bNumEndpoints; i++) {
   1117       1.1     skrll 		ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
   1118       1.1     skrll 		if (!ed) {
   1119       1.1     skrll 			aprint_error_dev(self, "couldn't get ep %d\n", i);
   1120       1.1     skrll 			return;
   1121       1.1     skrll 		}
   1122       1.1     skrll 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
   1123       1.1     skrll 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
   1124       1.1     skrll 			sc->sc_ed[SMSC_ENDPT_RX] = ed->bEndpointAddress;
   1125       1.1     skrll 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
   1126       1.1     skrll 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
   1127       1.1     skrll 			sc->sc_ed[SMSC_ENDPT_TX] = ed->bEndpointAddress;
   1128       1.1     skrll 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
   1129       1.1     skrll 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
   1130       1.1     skrll 			sc->sc_ed[SMSC_ENDPT_INTR] = ed->bEndpointAddress;
   1131       1.1     skrll 		}
   1132       1.1     skrll 	}
   1133       1.1     skrll 
   1134  1.33.2.3  pgoyette 	usb_init_task(&sc->sc_tick_task, smsc_tick_task, sc, USB_TASKQ_MPSAFE);
   1135  1.33.2.3  pgoyette 
   1136  1.33.2.3  pgoyette 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
   1137  1.33.2.3  pgoyette 	mutex_init(&sc->sc_txlock, MUTEX_DEFAULT, IPL_SOFTUSB);
   1138  1.33.2.3  pgoyette 	mutex_init(&sc->sc_rxlock, MUTEX_DEFAULT, IPL_SOFTUSB);
   1139  1.33.2.3  pgoyette 	mutex_init(&sc->sc_mii_lock, MUTEX_DEFAULT, IPL_NONE);
   1140       1.1     skrll 
   1141       1.1     skrll 	ifp = &sc->sc_ec.ec_if;
   1142       1.1     skrll 	ifp->if_softc = sc;
   1143       1.1     skrll 	strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
   1144       1.1     skrll 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
   1145  1.33.2.3  pgoyette 	ifp->if_extflags = IFEF_MPSAFE;
   1146       1.1     skrll 	ifp->if_init = smsc_init;
   1147       1.1     skrll 	ifp->if_ioctl = smsc_ioctl;
   1148       1.1     skrll 	ifp->if_start = smsc_start;
   1149       1.1     skrll 	ifp->if_stop = smsc_stop;
   1150       1.1     skrll 
   1151      1.13   mlelstv #ifdef notyet
   1152      1.13   mlelstv 	/*
   1153      1.13   mlelstv 	 * We can do TCPv4, and UDPv4 checksums in hardware.
   1154      1.13   mlelstv 	 */
   1155      1.13   mlelstv 	ifp->if_capabilities |=
   1156      1.13   mlelstv 	    /*IFCAP_CSUM_TCPv4_Tx |*/ IFCAP_CSUM_TCPv4_Rx |
   1157      1.13   mlelstv 	    /*IFCAP_CSUM_UDPv4_Tx |*/ IFCAP_CSUM_UDPv4_Rx;
   1158      1.13   mlelstv #endif
   1159      1.13   mlelstv 
   1160      1.15     skrll 	sc->sc_ec.ec_capabilities = ETHERCAP_VLAN_MTU;
   1161       1.9  christos 
   1162       1.1     skrll 	/* Setup some of the basics */
   1163       1.1     skrll 	sc->sc_phyno = 1;
   1164       1.1     skrll 
   1165       1.1     skrll 	/*
   1166       1.1     skrll 	 * Attempt to get the mac address, if an EEPROM is not attached this
   1167       1.1     skrll 	 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC
   1168       1.1     skrll 	 * address based on urandom.
   1169       1.1     skrll 	 */
   1170       1.1     skrll 	memset(sc->sc_enaddr, 0xff, ETHER_ADDR_LEN);
   1171       1.1     skrll 
   1172       1.1     skrll 	prop_dictionary_t dict = device_properties(self);
   1173       1.1     skrll 	prop_data_t eaprop = prop_dictionary_get(dict, "mac-address");
   1174       1.1     skrll 
   1175       1.1     skrll 	if (eaprop != NULL) {
   1176       1.1     skrll 		KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
   1177       1.1     skrll 		KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
   1178       1.1     skrll 		memcpy(sc->sc_enaddr, prop_data_data_nocopy(eaprop),
   1179       1.1     skrll 		    ETHER_ADDR_LEN);
   1180  1.33.2.3  pgoyette 	} else {
   1181  1.33.2.3  pgoyette 		/* Check if there is already a MAC address in the register */
   1182  1.33.2.3  pgoyette 		if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) &&
   1183  1.33.2.3  pgoyette 		    (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) {
   1184  1.33.2.3  pgoyette 			sc->sc_enaddr[5] = (uint8_t)((mac_h >> 8) & 0xff);
   1185  1.33.2.3  pgoyette 			sc->sc_enaddr[4] = (uint8_t)((mac_h) & 0xff);
   1186  1.33.2.3  pgoyette 			sc->sc_enaddr[3] = (uint8_t)((mac_l >> 24) & 0xff);
   1187  1.33.2.3  pgoyette 			sc->sc_enaddr[2] = (uint8_t)((mac_l >> 16) & 0xff);
   1188  1.33.2.3  pgoyette 			sc->sc_enaddr[1] = (uint8_t)((mac_l >> 8) & 0xff);
   1189  1.33.2.3  pgoyette 			sc->sc_enaddr[0] = (uint8_t)((mac_l) & 0xff);
   1190  1.33.2.3  pgoyette 		}
   1191       1.1     skrll 	}
   1192       1.1     skrll 
   1193  1.33.2.3  pgoyette 	aprint_normal_dev(self, "Ethernet address %s\n",
   1194  1.33.2.3  pgoyette 	    ether_sprintf(sc->sc_enaddr));
   1195       1.1     skrll 
   1196       1.1     skrll 	IFQ_SET_READY(&ifp->if_snd);
   1197       1.1     skrll 
   1198       1.1     skrll 	/* Initialize MII/media info. */
   1199       1.1     skrll 	mii = &sc->sc_mii;
   1200       1.1     skrll 	mii->mii_ifp = ifp;
   1201       1.1     skrll 	mii->mii_readreg = smsc_miibus_readreg;
   1202       1.1     skrll 	mii->mii_writereg = smsc_miibus_writereg;
   1203       1.1     skrll 	mii->mii_statchg = smsc_miibus_statchg;
   1204       1.1     skrll 	mii->mii_flags = MIIF_AUTOTSLEEP;
   1205       1.1     skrll 	sc->sc_ec.ec_mii = mii;
   1206       1.1     skrll 	ifmedia_init(&mii->mii_media, 0, smsc_ifmedia_upd, smsc_ifmedia_sts);
   1207       1.1     skrll 	mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
   1208       1.1     skrll 
   1209       1.1     skrll 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
   1210       1.1     skrll 		ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
   1211       1.1     skrll 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
   1212       1.1     skrll 	} else
   1213       1.1     skrll 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
   1214       1.1     skrll 
   1215  1.33.2.3  pgoyette 	callout_init(&sc->sc_stat_ch, CALLOUT_MPSAFE);
   1216  1.33.2.3  pgoyette 
   1217  1.33.2.3  pgoyette 	if_initialize(ifp);
   1218  1.33.2.3  pgoyette 	sc->sc_ipq = if_percpuq_create(&sc->sc_ec.ec_if);
   1219       1.1     skrll 	ether_ifattach(ifp, sc->sc_enaddr);
   1220  1.33.2.3  pgoyette 	ether_set_ifflags_cb(&sc->sc_ec, smsc_ifflags_cb);
   1221  1.33.2.3  pgoyette 	if_register(ifp);
   1222       1.1     skrll 
   1223       1.1     skrll 	rnd_attach_source(&sc->sc_rnd_source, device_xname(sc->sc_dev),
   1224      1.19       tls 	    RND_TYPE_NET, RND_FLAG_DEFAULT);
   1225       1.1     skrll 
   1226       1.1     skrll 	usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev);
   1227       1.1     skrll }
   1228       1.1     skrll 
   1229       1.1     skrll int
   1230       1.1     skrll smsc_detach(device_t self, int flags)
   1231       1.1     skrll {
   1232       1.1     skrll 	struct smsc_softc *sc = device_private(self);
   1233       1.1     skrll 	struct ifnet *ifp = &sc->sc_ec.ec_if;
   1234  1.33.2.3  pgoyette 
   1235  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
   1236  1.33.2.3  pgoyette 	sc->sc_dying = true;
   1237  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
   1238       1.1     skrll 
   1239  1.33.2.2  pgoyette 	callout_halt(&sc->sc_stat_ch, NULL);
   1240       1.1     skrll 
   1241  1.33.2.3  pgoyette 	if (ifp->if_flags & IFF_RUNNING)
   1242  1.33.2.3  pgoyette 		smsc_stop_locked(ifp, 1);
   1243       1.1     skrll 
   1244  1.33.2.3  pgoyette 	/*
   1245  1.33.2.3  pgoyette 	 * Remove any pending tasks.  They cannot be executing because they run
   1246  1.33.2.3  pgoyette 	 * in the same thread as detach.
   1247  1.33.2.3  pgoyette 	 */
   1248  1.33.2.2  pgoyette 	usb_rem_task_wait(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER,
   1249  1.33.2.2  pgoyette 	    NULL);
   1250       1.1     skrll 
   1251  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
   1252  1.33.2.3  pgoyette 	sc->sc_refcnt--;
   1253  1.33.2.3  pgoyette 	while (sc->sc_refcnt > 0) {
   1254       1.1     skrll 		/* Wait for processes to go away */
   1255  1.33.2.3  pgoyette 		cv_wait(&sc->sc_detachcv, &sc->sc_lock);
   1256       1.1     skrll 	}
   1257       1.1     skrll 
   1258       1.1     skrll #ifdef DIAGNOSTIC
   1259       1.1     skrll 	if (sc->sc_ep[SMSC_ENDPT_TX] != NULL ||
   1260       1.1     skrll 	    sc->sc_ep[SMSC_ENDPT_RX] != NULL ||
   1261       1.1     skrll 	    sc->sc_ep[SMSC_ENDPT_INTR] != NULL)
   1262       1.1     skrll 		printf("%s: detach has active endpoints\n",
   1263       1.1     skrll 		    device_xname(sc->sc_dev));
   1264       1.1     skrll #endif
   1265       1.1     skrll 
   1266  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
   1267  1.33.2.3  pgoyette 
   1268  1.33.2.3  pgoyette 	rnd_detach_source(&sc->sc_rnd_source);
   1269  1.33.2.3  pgoyette 	mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
   1270  1.33.2.3  pgoyette 	ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
   1271  1.33.2.3  pgoyette 	if (ifp->if_softc != NULL) {
   1272  1.33.2.3  pgoyette 		ether_ifdetach(ifp);
   1273  1.33.2.3  pgoyette 		if_detach(ifp);
   1274       1.1     skrll 	}
   1275       1.1     skrll 
   1276       1.1     skrll 	usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev);
   1277       1.1     skrll 
   1278  1.33.2.3  pgoyette 	cv_destroy(&sc->sc_detachcv);
   1279       1.1     skrll 	mutex_destroy(&sc->sc_mii_lock);
   1280  1.33.2.3  pgoyette 	mutex_destroy(&sc->sc_rxlock);
   1281  1.33.2.3  pgoyette 	mutex_destroy(&sc->sc_txlock);
   1282  1.33.2.3  pgoyette 	mutex_destroy(&sc->sc_lock);
   1283       1.1     skrll 
   1284      1.27     skrll 	return 0;
   1285       1.1     skrll }
   1286       1.1     skrll 
   1287       1.1     skrll void
   1288       1.1     skrll smsc_tick_task(void *xsc)
   1289       1.1     skrll {
   1290  1.33.2.3  pgoyette 	struct smsc_softc * const sc = xsc;
   1291       1.1     skrll 
   1292       1.1     skrll 	if (sc == NULL)
   1293       1.1     skrll 		return;
   1294       1.1     skrll 
   1295  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
   1296  1.33.2.3  pgoyette 
   1297  1.33.2.3  pgoyette 	if (sc->sc_dying) {
   1298  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_lock);
   1299       1.1     skrll 		return;
   1300  1.33.2.3  pgoyette 	}
   1301  1.33.2.3  pgoyette 
   1302  1.33.2.3  pgoyette 	struct ifnet * const ifp = &sc->sc_ec.ec_if;
   1303  1.33.2.3  pgoyette 	struct mii_data * const mii = &sc->sc_mii;
   1304       1.1     skrll 
   1305  1.33.2.3  pgoyette 	sc->sc_refcnt++;
   1306  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
   1307       1.1     skrll 
   1308       1.1     skrll 	mii_tick(mii);
   1309       1.1     skrll 	if ((sc->sc_flags & SMSC_FLAG_LINK) == 0)
   1310       1.1     skrll 		smsc_miibus_statchg(ifp);
   1311  1.33.2.3  pgoyette 
   1312  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
   1313  1.33.2.3  pgoyette 	sc->sc_ttpending = false;
   1314  1.33.2.3  pgoyette 
   1315  1.33.2.3  pgoyette 	if (--sc->sc_refcnt < 0)
   1316  1.33.2.3  pgoyette 		cv_broadcast(&sc->sc_detachcv);
   1317  1.33.2.3  pgoyette 
   1318  1.33.2.3  pgoyette 	if (sc->sc_dying) {
   1319  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_lock);
   1320  1.33.2.3  pgoyette 		return;
   1321  1.33.2.3  pgoyette 	}
   1322       1.1     skrll 	callout_reset(&sc->sc_stat_ch, hz, smsc_tick, sc);
   1323       1.1     skrll 
   1324  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
   1325       1.1     skrll }
   1326       1.1     skrll 
   1327       1.1     skrll int
   1328       1.1     skrll smsc_activate(device_t self, enum devact act)
   1329       1.1     skrll {
   1330       1.1     skrll 	struct smsc_softc *sc = device_private(self);
   1331       1.1     skrll 
   1332      1.15     skrll 	switch (act) {
   1333       1.1     skrll 	case DVACT_DEACTIVATE:
   1334       1.1     skrll 		if_deactivate(&sc->sc_ec.ec_if);
   1335  1.33.2.3  pgoyette 
   1336  1.33.2.3  pgoyette 		mutex_enter(&sc->sc_lock);
   1337  1.33.2.3  pgoyette 		sc->sc_dying = true;
   1338  1.33.2.3  pgoyette 
   1339  1.33.2.3  pgoyette 		mutex_enter(&sc->sc_rxlock);
   1340  1.33.2.3  pgoyette 		mutex_enter(&sc->sc_txlock);
   1341  1.33.2.3  pgoyette 		sc->sc_stopping = true;
   1342  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_txlock);
   1343  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_rxlock);
   1344  1.33.2.3  pgoyette 
   1345  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_lock);
   1346       1.1     skrll 		return 0;
   1347       1.1     skrll 	default:
   1348       1.1     skrll 		return EOPNOTSUPP;
   1349       1.1     skrll 	}
   1350      1.27     skrll 	return 0;
   1351       1.1     skrll }
   1352       1.1     skrll 
   1353       1.1     skrll void
   1354       1.1     skrll smsc_lock_mii(struct smsc_softc *sc)
   1355       1.1     skrll {
   1356  1.33.2.3  pgoyette 
   1357  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
   1358       1.1     skrll 	sc->sc_refcnt++;
   1359  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
   1360  1.33.2.3  pgoyette 
   1361       1.1     skrll 	mutex_enter(&sc->sc_mii_lock);
   1362       1.1     skrll }
   1363       1.1     skrll 
   1364       1.1     skrll void
   1365       1.1     skrll smsc_unlock_mii(struct smsc_softc *sc)
   1366       1.1     skrll {
   1367  1.33.2.3  pgoyette 
   1368       1.1     skrll 	mutex_exit(&sc->sc_mii_lock);
   1369  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_lock);
   1370       1.1     skrll 	if (--sc->sc_refcnt < 0)
   1371  1.33.2.3  pgoyette 		cv_broadcast(&sc->sc_detachcv);
   1372  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_lock);
   1373       1.1     skrll }
   1374       1.1     skrll 
   1375       1.1     skrll void
   1376      1.27     skrll smsc_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
   1377       1.1     skrll {
   1378  1.33.2.3  pgoyette 	struct smsc_chain * const c = (struct smsc_chain *)priv;
   1379  1.33.2.3  pgoyette 	struct smsc_softc * const sc = c->sc_sc;
   1380  1.33.2.3  pgoyette 	struct ifnet * const ifp = &sc->sc_ec.ec_if;
   1381  1.33.2.3  pgoyette 	u_char *buf = c->sc_buf;
   1382  1.33.2.3  pgoyette 	uint32_t total_len;
   1383  1.33.2.3  pgoyette 
   1384  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_rxlock);
   1385  1.33.2.3  pgoyette 	if (sc->sc_stopping) {
   1386  1.33.2.3  pgoyette 		smsc_dbg_printf(sc, "%s: stopping\n", __func__);
   1387  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_rxlock);
   1388       1.1     skrll 		return;
   1389  1.33.2.3  pgoyette 	}
   1390       1.1     skrll 
   1391  1.33.2.3  pgoyette 	if (!(sc->sc_if_flags & IFF_RUNNING)) {
   1392  1.33.2.3  pgoyette 		smsc_dbg_printf(sc, "%s: not running\n", __func__);
   1393  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_rxlock);
   1394       1.1     skrll 		return;
   1395  1.33.2.3  pgoyette 	}
   1396       1.1     skrll 
   1397       1.1     skrll 	if (status != USBD_NORMAL_COMPLETION) {
   1398  1.33.2.3  pgoyette 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
   1399  1.33.2.3  pgoyette 	    		mutex_exit(&sc->sc_rxlock);
   1400       1.1     skrll 			return;
   1401  1.33.2.3  pgoyette 		}
   1402       1.1     skrll 		if (usbd_ratecheck(&sc->sc_rx_notice)) {
   1403       1.1     skrll 			printf("%s: usb errors on rx: %s\n",
   1404       1.1     skrll 			    device_xname(sc->sc_dev), usbd_errstr(status));
   1405       1.1     skrll 		}
   1406       1.1     skrll 		if (status == USBD_STALLED)
   1407       1.1     skrll 			usbd_clear_endpoint_stall_async(sc->sc_ep[SMSC_ENDPT_RX]);
   1408       1.1     skrll 		goto done;
   1409       1.1     skrll 	}
   1410       1.1     skrll 
   1411       1.1     skrll 	usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
   1412       1.1     skrll 	smsc_dbg_printf(sc, "xfer status total_len %d\n", total_len);
   1413       1.1     skrll 
   1414      1.13   mlelstv 	while (total_len != 0) {
   1415  1.33.2.3  pgoyette 		uint32_t rxhdr;
   1416       1.1     skrll 		if (total_len < sizeof(rxhdr)) {
   1417       1.1     skrll 			smsc_dbg_printf(sc, "total_len %d < sizeof(rxhdr) %zu\n",
   1418       1.1     skrll 			    total_len, sizeof(rxhdr));
   1419       1.1     skrll 			ifp->if_ierrors++;
   1420       1.1     skrll 			goto done;
   1421       1.1     skrll 		}
   1422       1.1     skrll 
   1423       1.1     skrll 		memcpy(&rxhdr, buf, sizeof(rxhdr));
   1424       1.1     skrll 		rxhdr = le32toh(rxhdr);
   1425      1.13   mlelstv 		buf += sizeof(rxhdr);
   1426       1.1     skrll 		total_len -= sizeof(rxhdr);
   1427       1.1     skrll 
   1428      1.24   mlelstv 		if (rxhdr & SMSC_RX_STAT_COLLISION)
   1429      1.24   mlelstv 			ifp->if_collisions++;
   1430      1.24   mlelstv 
   1431      1.24   mlelstv 		if (rxhdr & (SMSC_RX_STAT_ERROR
   1432      1.24   mlelstv 		           | SMSC_RX_STAT_LENGTH_ERROR
   1433      1.24   mlelstv 		           | SMSC_RX_STAT_MII_ERROR)) {
   1434       1.1     skrll 			smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr);
   1435       1.1     skrll 			ifp->if_ierrors++;
   1436       1.1     skrll 			goto done;
   1437       1.1     skrll 		}
   1438       1.1     skrll 
   1439  1.33.2.3  pgoyette 		uint16_t pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr);
   1440       1.1     skrll 		smsc_dbg_printf(sc, "rxeof total_len %d pktlen %d rxhdr "
   1441       1.1     skrll 		    "0x%08x\n", total_len, pktlen, rxhdr);
   1442      1.13   mlelstv 
   1443      1.22  jmcneill 		if (pktlen < ETHER_HDR_LEN) {
   1444      1.22  jmcneill 			smsc_dbg_printf(sc, "pktlen %d < ETHER_HDR_LEN %d\n",
   1445      1.22  jmcneill 			    pktlen, ETHER_HDR_LEN);
   1446      1.22  jmcneill 			ifp->if_ierrors++;
   1447      1.22  jmcneill 			goto done;
   1448      1.22  jmcneill 		}
   1449      1.22  jmcneill 
   1450      1.13   mlelstv 		pktlen += ETHER_ALIGN;
   1451      1.13   mlelstv 
   1452      1.17   mlelstv 		if (pktlen > MCLBYTES) {
   1453      1.17   mlelstv 			smsc_dbg_printf(sc, "pktlen %d > MCLBYTES %d\n",
   1454      1.17   mlelstv 			    pktlen, MCLBYTES);
   1455      1.17   mlelstv 			ifp->if_ierrors++;
   1456      1.17   mlelstv 			goto done;
   1457      1.17   mlelstv 		}
   1458      1.17   mlelstv 
   1459       1.1     skrll 		if (pktlen > total_len) {
   1460       1.1     skrll 			smsc_dbg_printf(sc, "pktlen %d > total_len %d\n",
   1461       1.1     skrll 			    pktlen, total_len);
   1462       1.1     skrll 			ifp->if_ierrors++;
   1463       1.1     skrll 			goto done;
   1464       1.1     skrll 		}
   1465       1.1     skrll 
   1466  1.33.2.3  pgoyette 		struct mbuf *m = smsc_newbuf();
   1467       1.1     skrll 		if (m == NULL) {
   1468       1.1     skrll 			smsc_dbg_printf(sc, "smc_newbuf returned NULL\n");
   1469       1.1     skrll 			ifp->if_ierrors++;
   1470       1.1     skrll 			goto done;
   1471       1.1     skrll 		}
   1472       1.1     skrll 
   1473      1.29     ozaki 		m_set_rcvif(m, ifp);
   1474       1.1     skrll 		m->m_pkthdr.len = m->m_len = pktlen;
   1475      1.13   mlelstv 		m->m_flags |= M_HASFCS;
   1476       1.1     skrll 		m_adj(m, ETHER_ALIGN);
   1477      1.17   mlelstv 
   1478      1.17   mlelstv 		KASSERT(m->m_len < MCLBYTES);
   1479      1.13   mlelstv 		memcpy(mtod(m, char *), buf + ETHER_ALIGN, m->m_len);
   1480       1.1     skrll 
   1481      1.13   mlelstv 		/* Check if RX TCP/UDP checksumming is being offloaded */
   1482      1.13   mlelstv 		if (sc->sc_coe_ctrl & SMSC_COE_CTRL_RX_EN) {
   1483      1.13   mlelstv 			smsc_dbg_printf(sc,"RX checksum offload checking\n");
   1484      1.13   mlelstv 			struct ether_header *eh;
   1485      1.13   mlelstv 
   1486      1.13   mlelstv 			eh = mtod(m, struct ether_header *);
   1487      1.13   mlelstv 
   1488      1.13   mlelstv 			/* Remove the extra 2 bytes of the csum */
   1489      1.13   mlelstv 			m_adj(m, -2);
   1490      1.13   mlelstv 
   1491      1.13   mlelstv 			/*
   1492      1.13   mlelstv 			 * The checksum appears to be simplistically calculated
   1493      1.13   mlelstv 			 * over the udp/tcp header and data up to the end of the
   1494      1.13   mlelstv 			 * eth frame.  Which means if the eth frame is padded
   1495      1.13   mlelstv 			 * the csum calculation is incorrectly performed over
   1496      1.13   mlelstv 			 * the padding bytes as well. Therefore to be safe we
   1497      1.13   mlelstv 			 * ignore the H/W csum on frames less than or equal to
   1498      1.13   mlelstv 			 * 64 bytes.
   1499      1.13   mlelstv 			 *
   1500      1.13   mlelstv 			 * Ignore H/W csum for non-IPv4 packets.
   1501      1.13   mlelstv 			 */
   1502      1.13   mlelstv 			smsc_dbg_printf(sc,"Ethertype %02x pktlen %02x\n",
   1503      1.18     skrll 			    be16toh(eh->ether_type), pktlen);
   1504      1.13   mlelstv 			if (be16toh(eh->ether_type) == ETHERTYPE_IP &&
   1505      1.18     skrll 			    pktlen > ETHER_MIN_LEN) {
   1506      1.13   mlelstv 
   1507      1.13   mlelstv 				m->m_pkthdr.csum_flags |=
   1508      1.18     skrll 				    (M_CSUM_TCPv4 | M_CSUM_UDPv4 | M_CSUM_DATA);
   1509      1.13   mlelstv 
   1510      1.13   mlelstv 				/*
   1511      1.13   mlelstv 				 * Copy the TCP/UDP checksum from the last 2
   1512      1.13   mlelstv 				 * bytes of the transfer and put in the
   1513      1.13   mlelstv 				 * csum_data field.
   1514      1.13   mlelstv 				 */
   1515      1.13   mlelstv 				memcpy(&m->m_pkthdr.csum_data,
   1516      1.18     skrll 				    buf + pktlen - 2, 2);
   1517      1.13   mlelstv 				/*
   1518      1.13   mlelstv 				 * The data is copied in network order, but the
   1519      1.13   mlelstv 				 * csum algorithm in the kernel expects it to be
   1520      1.13   mlelstv 				 * in host network order.
   1521      1.13   mlelstv 				 */
   1522      1.13   mlelstv 				m->m_pkthdr.csum_data =
   1523      1.18     skrll 				    ntohs(m->m_pkthdr.csum_data);
   1524      1.13   mlelstv 				smsc_dbg_printf(sc,
   1525      1.18     skrll 				    "RX checksum offloaded (0x%04x)\n",
   1526      1.18     skrll 				    m->m_pkthdr.csum_data);
   1527      1.13   mlelstv 			}
   1528      1.13   mlelstv 		}
   1529      1.13   mlelstv 
   1530      1.17   mlelstv 		/* round up to next longword */
   1531      1.17   mlelstv 		pktlen = (pktlen + 3) & ~0x3;
   1532      1.17   mlelstv 
   1533      1.17   mlelstv 		/* total_len does not include the padding */
   1534      1.17   mlelstv 		if (pktlen > total_len)
   1535      1.17   mlelstv 			pktlen = total_len;
   1536      1.17   mlelstv 
   1537      1.13   mlelstv 		buf += pktlen;
   1538      1.13   mlelstv 		total_len -= pktlen;
   1539       1.1     skrll 
   1540  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_rxlock);
   1541  1.33.2.3  pgoyette 
   1542       1.1     skrll 		/* push the packet up */
   1543  1.33.2.3  pgoyette 		if_percpuq_enqueue(sc->sc_ipq, m);
   1544  1.33.2.3  pgoyette 
   1545  1.33.2.3  pgoyette 		mutex_enter(&sc->sc_rxlock);
   1546  1.33.2.3  pgoyette 		if (sc->sc_stopping) {
   1547  1.33.2.3  pgoyette 			smsc_dbg_printf(sc, "%s: stopping\n", __func__);
   1548  1.33.2.3  pgoyette 			mutex_exit(&sc->sc_rxlock);
   1549  1.33.2.3  pgoyette 			return;
   1550  1.33.2.3  pgoyette 		}
   1551      1.13   mlelstv 	}
   1552       1.1     skrll 
   1553       1.1     skrll done:
   1554  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_rxlock);
   1555  1.33.2.3  pgoyette 
   1556       1.1     skrll 	/* Setup new transfer. */
   1557      1.27     skrll 	usbd_setup_xfer(xfer, c, c->sc_buf, sc->sc_bufsz, USBD_SHORT_XFER_OK,
   1558       1.1     skrll 	    USBD_NO_TIMEOUT, smsc_rxeof);
   1559       1.1     skrll 	usbd_transfer(xfer);
   1560       1.1     skrll 
   1561       1.1     skrll 	return;
   1562       1.1     skrll }
   1563       1.1     skrll 
   1564       1.1     skrll void
   1565      1.27     skrll smsc_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
   1566       1.1     skrll {
   1567  1.33.2.3  pgoyette 	struct smsc_chain *c = priv;
   1568  1.33.2.3  pgoyette 	struct smsc_softc *sc = c->sc_sc;
   1569  1.33.2.3  pgoyette 	struct ifnet *ifp = &sc->sc_ec.ec_if;
   1570       1.1     skrll 
   1571  1.33.2.3  pgoyette 	mutex_enter(&sc->sc_txlock);
   1572  1.33.2.3  pgoyette 	if (sc->sc_stopping) {
   1573  1.33.2.3  pgoyette 		smsc_dbg_printf(sc, "%s: stopping\n", __func__);
   1574  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_txlock);
   1575       1.1     skrll 		return;
   1576  1.33.2.3  pgoyette 	}
   1577       1.1     skrll 
   1578  1.33.2.3  pgoyette 	sc->sc_cdata.tx_free++;
   1579       1.4     skrll 	ifp->if_timer = 0;
   1580       1.4     skrll 	ifp->if_flags &= ~IFF_OACTIVE;
   1581       1.4     skrll 
   1582       1.1     skrll 	if (status != USBD_NORMAL_COMPLETION) {
   1583       1.1     skrll 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
   1584  1.33.2.3  pgoyette 			mutex_exit(&sc->sc_txlock);
   1585       1.1     skrll 			return;
   1586       1.1     skrll 		}
   1587       1.1     skrll 		ifp->if_oerrors++;
   1588       1.1     skrll 		printf("%s: usb error on tx: %s\n", device_xname(sc->sc_dev),
   1589       1.1     skrll 		    usbd_errstr(status));
   1590       1.1     skrll 		if (status == USBD_STALLED)
   1591       1.1     skrll 			usbd_clear_endpoint_stall_async(sc->sc_ep[SMSC_ENDPT_TX]);
   1592  1.33.2.3  pgoyette 		mutex_exit(&sc->sc_txlock);
   1593       1.1     skrll 		return;
   1594       1.1     skrll 	}
   1595       1.4     skrll 	ifp->if_opackets++;
   1596       1.1     skrll 
   1597       1.1     skrll 	m_freem(c->sc_mbuf);
   1598       1.1     skrll 	c->sc_mbuf = NULL;
   1599       1.1     skrll 
   1600       1.1     skrll 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1601  1.33.2.3  pgoyette 		smsc_start_locked(ifp);
   1602       1.1     skrll 
   1603  1.33.2.3  pgoyette 	mutex_exit(&sc->sc_txlock);
   1604       1.1     skrll }
   1605       1.1     skrll 
   1606       1.1     skrll int
   1607       1.1     skrll smsc_tx_list_init(struct smsc_softc *sc)
   1608       1.1     skrll {
   1609  1.33.2.3  pgoyette 	struct smsc_cdata *cd = &sc->sc_cdata;
   1610       1.1     skrll 	struct smsc_chain *c;
   1611       1.1     skrll 	int i;
   1612       1.1     skrll 
   1613       1.1     skrll 	for (i = 0; i < SMSC_TX_LIST_CNT; i++) {
   1614       1.1     skrll 		c = &cd->tx_chain[i];
   1615       1.1     skrll 		c->sc_sc = sc;
   1616       1.1     skrll 		c->sc_idx = i;
   1617       1.1     skrll 		c->sc_mbuf = NULL;
   1618       1.1     skrll 		if (c->sc_xfer == NULL) {
   1619      1.27     skrll 			int error = usbd_create_xfer(sc->sc_ep[SMSC_ENDPT_TX],
   1620      1.27     skrll 			    sc->sc_bufsz, USBD_FORCE_SHORT_XFER, 0,
   1621      1.27     skrll 			    &c->sc_xfer);
   1622      1.27     skrll 			if (error)
   1623      1.28    martin 				return EIO;
   1624      1.27     skrll 			c->sc_buf = usbd_get_buffer(c->sc_xfer);
   1625       1.1     skrll 		}
   1626       1.1     skrll 	}
   1627       1.1     skrll 
   1628  1.33.2.3  pgoyette 	cd->tx_free = SMSC_TX_LIST_CNT;
   1629  1.33.2.3  pgoyette 	cd->tx_next = 0;
   1630  1.33.2.3  pgoyette 
   1631      1.27     skrll 	return 0;
   1632       1.1     skrll }
   1633       1.1     skrll 
   1634  1.33.2.3  pgoyette void
   1635  1.33.2.3  pgoyette smsc_tx_list_free(struct smsc_softc *sc)
   1636  1.33.2.3  pgoyette {
   1637  1.33.2.3  pgoyette 	/* Free TX resources. */
   1638  1.33.2.3  pgoyette 	for (size_t i = 0; i < SMSC_TX_LIST_CNT; i++) {
   1639  1.33.2.3  pgoyette 		if (sc->sc_cdata.tx_chain[i].sc_mbuf != NULL) {
   1640  1.33.2.3  pgoyette 			m_freem(sc->sc_cdata.tx_chain[i].sc_mbuf);
   1641  1.33.2.3  pgoyette 			sc->sc_cdata.tx_chain[i].sc_mbuf = NULL;
   1642  1.33.2.3  pgoyette 		}
   1643  1.33.2.3  pgoyette 		if (sc->sc_cdata.tx_chain[i].sc_xfer != NULL) {
   1644  1.33.2.3  pgoyette 			usbd_destroy_xfer(sc->sc_cdata.tx_chain[i].sc_xfer);
   1645  1.33.2.3  pgoyette 			sc->sc_cdata.tx_chain[i].sc_xfer = NULL;
   1646  1.33.2.3  pgoyette 		}
   1647  1.33.2.3  pgoyette 	}
   1648  1.33.2.3  pgoyette }
   1649  1.33.2.3  pgoyette 
   1650       1.1     skrll int
   1651       1.1     skrll smsc_rx_list_init(struct smsc_softc *sc)
   1652       1.1     skrll {
   1653  1.33.2.3  pgoyette 	struct smsc_cdata *cd = &sc->sc_cdata;
   1654       1.1     skrll 	struct smsc_chain *c;
   1655       1.1     skrll 	int i;
   1656       1.1     skrll 
   1657       1.1     skrll 	for (i = 0; i < SMSC_RX_LIST_CNT; i++) {
   1658       1.1     skrll 		c = &cd->rx_chain[i];
   1659       1.1     skrll 		c->sc_sc = sc;
   1660       1.1     skrll 		c->sc_idx = i;
   1661       1.1     skrll 		c->sc_mbuf = NULL;
   1662       1.1     skrll 		if (c->sc_xfer == NULL) {
   1663      1.27     skrll 			int error = usbd_create_xfer(sc->sc_ep[SMSC_ENDPT_RX],
   1664  1.33.2.3  pgoyette 			    sc->sc_bufsz, USBD_SHORT_XFER_OK, 0, &c->sc_xfer);
   1665      1.27     skrll 			if (error)
   1666      1.27     skrll 				return error;
   1667      1.27     skrll 			c->sc_buf = usbd_get_buffer(c->sc_xfer);
   1668       1.1     skrll 		}
   1669       1.1     skrll 	}
   1670       1.1     skrll 
   1671      1.27     skrll 	return 0;
   1672       1.1     skrll }
   1673       1.1     skrll 
   1674  1.33.2.3  pgoyette void
   1675  1.33.2.3  pgoyette smsc_rx_list_free(struct smsc_softc *sc)
   1676  1.33.2.3  pgoyette {
   1677  1.33.2.3  pgoyette 	/* Free RX resources. */
   1678  1.33.2.3  pgoyette 	for (size_t i = 0; i < SMSC_RX_LIST_CNT; i++) {
   1679  1.33.2.3  pgoyette 		if (sc->sc_cdata.rx_chain[i].sc_mbuf != NULL) {
   1680  1.33.2.3  pgoyette 			m_freem(sc->sc_cdata.rx_chain[i].sc_mbuf);
   1681  1.33.2.3  pgoyette 			sc->sc_cdata.rx_chain[i].sc_mbuf = NULL;
   1682  1.33.2.3  pgoyette 		}
   1683  1.33.2.3  pgoyette 		if (sc->sc_cdata.rx_chain[i].sc_xfer != NULL) {
   1684  1.33.2.3  pgoyette 			usbd_destroy_xfer(sc->sc_cdata.rx_chain[i].sc_xfer);
   1685  1.33.2.3  pgoyette 			sc->sc_cdata.rx_chain[i].sc_xfer = NULL;
   1686  1.33.2.3  pgoyette 		}
   1687  1.33.2.3  pgoyette 	}
   1688  1.33.2.3  pgoyette }
   1689  1.33.2.3  pgoyette 
   1690       1.1     skrll struct mbuf *
   1691       1.1     skrll smsc_newbuf(void)
   1692       1.1     skrll {
   1693  1.33.2.3  pgoyette 	struct mbuf *m;
   1694       1.1     skrll 
   1695       1.1     skrll 	MGETHDR(m, M_DONTWAIT, MT_DATA);
   1696       1.1     skrll 	if (m == NULL)
   1697      1.27     skrll 		return NULL;
   1698       1.1     skrll 
   1699       1.1     skrll 	MCLGET(m, M_DONTWAIT);
   1700       1.1     skrll 	if (!(m->m_flags & M_EXT)) {
   1701       1.1     skrll 		m_freem(m);
   1702      1.27     skrll 		return NULL;
   1703       1.1     skrll 	}
   1704       1.1     skrll 
   1705      1.27     skrll 	return m;
   1706       1.1     skrll }
   1707       1.1     skrll 
   1708       1.1     skrll int
   1709       1.1     skrll smsc_encap(struct smsc_softc *sc, struct mbuf *m, int idx)
   1710       1.1     skrll {
   1711  1.33.2.3  pgoyette 	struct smsc_chain * const c = &sc->sc_cdata.tx_chain[idx];
   1712  1.33.2.3  pgoyette 	uint32_t txhdr;
   1713  1.33.2.3  pgoyette 	uint32_t frm_len = 0;
   1714       1.1     skrll 
   1715       1.1     skrll 	/*
   1716       1.1     skrll 	 * Each frame is prefixed with two 32-bit values describing the
   1717       1.1     skrll 	 * length of the packet and buffer.
   1718       1.1     skrll 	 */
   1719       1.1     skrll 	txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) |
   1720  1.33.2.3  pgoyette 	    SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG;
   1721       1.1     skrll 	txhdr = htole32(txhdr);
   1722       1.1     skrll 	memcpy(c->sc_buf, &txhdr, sizeof(txhdr));
   1723       1.1     skrll 
   1724       1.1     skrll 	txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len);
   1725       1.1     skrll 	txhdr = htole32(txhdr);
   1726       1.1     skrll 	memcpy(c->sc_buf + 4, &txhdr, sizeof(txhdr));
   1727       1.1     skrll 
   1728       1.1     skrll 	frm_len += 8;
   1729       1.1     skrll 
   1730       1.1     skrll 	/* Next copy in the actual packet */
   1731       1.1     skrll 	m_copydata(m, 0, m->m_pkthdr.len, c->sc_buf + frm_len);
   1732       1.1     skrll 	frm_len += m->m_pkthdr.len;
   1733       1.1     skrll 
   1734       1.1     skrll 	c->sc_mbuf = m;
   1735       1.1     skrll 
   1736      1.27     skrll 	usbd_setup_xfer(c->sc_xfer, c, c->sc_buf, frm_len,
   1737      1.27     skrll 	    USBD_FORCE_SHORT_XFER, 10000, smsc_txeof);
   1738       1.1     skrll 
   1739  1.33.2.3  pgoyette 	usbd_status err = usbd_transfer(c->sc_xfer);
   1740       1.1     skrll 	if (err != USBD_IN_PROGRESS) {
   1741      1.27     skrll 		return EIO;
   1742       1.1     skrll 	}
   1743       1.1     skrll 
   1744      1.27     skrll 	return 0;
   1745       1.1     skrll }
   1746