1 1.67 rin /* $NetBSD: if_ural.c,v 1.67 2024/07/05 04:31:52 rin Exp $ */ 2 1.12 perry /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 1.1 drochner 4 1.1 drochner /*- 5 1.12 perry * Copyright (c) 2005, 2006 6 1.1 drochner * Damien Bergamini <damien.bergamini (at) free.fr> 7 1.1 drochner * 8 1.1 drochner * Permission to use, copy, modify, and distribute this software for any 9 1.1 drochner * purpose with or without fee is hereby granted, provided that the above 10 1.1 drochner * copyright notice and this permission notice appear in all copies. 11 1.1 drochner * 12 1.1 drochner * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 1.1 drochner * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 1.1 drochner * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 1.1 drochner * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 1.1 drochner * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 1.1 drochner * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 1.1 drochner * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 1.1 drochner */ 20 1.1 drochner 21 1.1 drochner /*- 22 1.1 drochner * Ralink Technology RT2500USB chipset driver 23 1.1 drochner * http://www.ralinktech.com/ 24 1.1 drochner */ 25 1.1 drochner 26 1.1 drochner #include <sys/cdefs.h> 27 1.67 rin __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.67 2024/07/05 04:31:52 rin Exp $"); 28 1.51 skrll 29 1.51 skrll #ifdef _KERNEL_OPT 30 1.51 skrll #include "opt_usb.h" 31 1.51 skrll #endif 32 1.1 drochner 33 1.1 drochner #include <sys/param.h> 34 1.1 drochner #include <sys/sockio.h> 35 1.1 drochner #include <sys/sysctl.h> 36 1.1 drochner #include <sys/mbuf.h> 37 1.1 drochner #include <sys/kernel.h> 38 1.1 drochner #include <sys/socket.h> 39 1.1 drochner #include <sys/systm.h> 40 1.1 drochner #include <sys/conf.h> 41 1.1 drochner #include <sys/device.h> 42 1.1 drochner 43 1.25 ad #include <sys/bus.h> 44 1.1 drochner #include <machine/endian.h> 45 1.25 ad #include <sys/intr.h> 46 1.1 drochner 47 1.1 drochner #include <net/bpf.h> 48 1.1 drochner #include <net/if.h> 49 1.1 drochner #include <net/if_arp.h> 50 1.1 drochner #include <net/if_dl.h> 51 1.1 drochner #include <net/if_ether.h> 52 1.1 drochner #include <net/if_media.h> 53 1.1 drochner #include <net/if_types.h> 54 1.1 drochner 55 1.1 drochner #include <netinet/in.h> 56 1.1 drochner #include <netinet/in_systm.h> 57 1.1 drochner #include <netinet/in_var.h> 58 1.1 drochner #include <netinet/ip.h> 59 1.1 drochner 60 1.2 drochner #include <net80211/ieee80211_netbsd.h> 61 1.1 drochner #include <net80211/ieee80211_var.h> 62 1.17 joerg #include <net80211/ieee80211_amrr.h> 63 1.1 drochner #include <net80211/ieee80211_radiotap.h> 64 1.1 drochner 65 1.1 drochner #include <dev/usb/usb.h> 66 1.1 drochner #include <dev/usb/usbdi.h> 67 1.1 drochner #include <dev/usb/usbdi_util.h> 68 1.1 drochner #include <dev/usb/usbdevs.h> 69 1.1 drochner 70 1.1 drochner #include <dev/usb/if_uralreg.h> 71 1.1 drochner #include <dev/usb/if_uralvar.h> 72 1.1 drochner 73 1.1 drochner #ifdef URAL_DEBUG 74 1.36 dyoung #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 75 1.36 dyoung #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 76 1.1 drochner int ural_debug = 0; 77 1.1 drochner #else 78 1.1 drochner #define DPRINTF(x) 79 1.1 drochner #define DPRINTFN(n, x) 80 1.1 drochner #endif 81 1.1 drochner 82 1.1 drochner /* various supported device vendors/products */ 83 1.1 drochner static const struct usb_devno ural_devs[] = { 84 1.1 drochner { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 85 1.1 drochner { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 86 1.2 drochner { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 87 1.4 drochner { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 88 1.4 drochner { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 89 1.21 xtraeme { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 90 1.1 drochner { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 91 1.1 drochner { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 92 1.4 drochner { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 93 1.4 drochner { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 94 1.1 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 95 1.1 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 96 1.4 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 97 1.21 xtraeme { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 98 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 99 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 100 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 101 1.21 xtraeme { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 102 1.1 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 103 1.1 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 104 1.4 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 105 1.1 drochner { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 106 1.21 xtraeme { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 107 1.4 drochner { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 108 1.4 drochner { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 109 1.4 drochner { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 110 1.1 drochner }; 111 1.1 drochner 112 1.1 drochner Static int ural_alloc_tx_list(struct ural_softc *); 113 1.1 drochner Static void ural_free_tx_list(struct ural_softc *); 114 1.1 drochner Static int ural_alloc_rx_list(struct ural_softc *); 115 1.1 drochner Static void ural_free_rx_list(struct ural_softc *); 116 1.1 drochner Static int ural_media_change(struct ifnet *); 117 1.1 drochner Static void ural_next_scan(void *); 118 1.1 drochner Static void ural_task(void *); 119 1.1 drochner Static int ural_newstate(struct ieee80211com *, 120 1.1 drochner enum ieee80211_state, int); 121 1.12 perry Static int ural_rxrate(struct ural_rx_desc *); 122 1.46 skrll Static void ural_txeof(struct usbd_xfer *, void *, 123 1.1 drochner usbd_status); 124 1.46 skrll Static void ural_rxeof(struct usbd_xfer *, void *, 125 1.1 drochner usbd_status); 126 1.12 perry Static int ural_ack_rate(struct ieee80211com *, int); 127 1.1 drochner Static uint16_t ural_txtime(int, int, uint32_t); 128 1.1 drochner Static uint8_t ural_plcp_signal(int); 129 1.1 drochner Static void ural_setup_tx_desc(struct ural_softc *, 130 1.1 drochner struct ural_tx_desc *, uint32_t, int, int); 131 1.1 drochner Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 132 1.1 drochner struct ieee80211_node *); 133 1.1 drochner Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 134 1.1 drochner struct ieee80211_node *); 135 1.1 drochner Static int ural_tx_data(struct ural_softc *, struct mbuf *, 136 1.1 drochner struct ieee80211_node *); 137 1.1 drochner Static void ural_start(struct ifnet *); 138 1.1 drochner Static void ural_watchdog(struct ifnet *); 139 1.12 perry Static int ural_reset(struct ifnet *); 140 1.19 christos Static int ural_ioctl(struct ifnet *, u_long, void *); 141 1.12 perry Static void ural_set_testmode(struct ural_softc *); 142 1.1 drochner Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 143 1.1 drochner int); 144 1.1 drochner Static uint16_t ural_read(struct ural_softc *, uint16_t); 145 1.1 drochner Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 146 1.1 drochner int); 147 1.1 drochner Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 148 1.1 drochner Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 149 1.1 drochner int); 150 1.1 drochner Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 151 1.1 drochner Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 152 1.1 drochner Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 153 1.1 drochner Static void ural_set_chan(struct ural_softc *, 154 1.1 drochner struct ieee80211_channel *); 155 1.1 drochner Static void ural_disable_rf_tune(struct ural_softc *); 156 1.1 drochner Static void ural_enable_tsf_sync(struct ural_softc *); 157 1.12 perry Static void ural_update_slot(struct ifnet *); 158 1.12 perry Static void ural_set_txpreamble(struct ural_softc *); 159 1.12 perry Static void ural_set_basicrates(struct ural_softc *); 160 1.1 drochner Static void ural_set_bssid(struct ural_softc *, uint8_t *); 161 1.1 drochner Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 162 1.1 drochner Static void ural_update_promisc(struct ural_softc *); 163 1.1 drochner Static const char *ural_get_rf(int); 164 1.1 drochner Static void ural_read_eeprom(struct ural_softc *); 165 1.1 drochner Static int ural_bbp_init(struct ural_softc *); 166 1.1 drochner Static void ural_set_txantenna(struct ural_softc *, int); 167 1.1 drochner Static void ural_set_rxantenna(struct ural_softc *, int); 168 1.1 drochner Static int ural_init(struct ifnet *); 169 1.1 drochner Static void ural_stop(struct ifnet *, int); 170 1.12 perry Static void ural_amrr_start(struct ural_softc *, 171 1.12 perry struct ieee80211_node *); 172 1.12 perry Static void ural_amrr_timeout(void *); 173 1.46 skrll Static void ural_amrr_update(struct usbd_xfer *, void *, 174 1.12 perry usbd_status status); 175 1.1 drochner 176 1.1 drochner /* 177 1.1 drochner * Default values for MAC registers; values taken from the reference driver. 178 1.1 drochner */ 179 1.1 drochner static const struct { 180 1.1 drochner uint16_t reg; 181 1.1 drochner uint16_t val; 182 1.1 drochner } ural_def_mac[] = { 183 1.1 drochner { RAL_TXRX_CSR5, 0x8c8d }, 184 1.1 drochner { RAL_TXRX_CSR6, 0x8b8a }, 185 1.1 drochner { RAL_TXRX_CSR7, 0x8687 }, 186 1.1 drochner { RAL_TXRX_CSR8, 0x0085 }, 187 1.1 drochner { RAL_MAC_CSR13, 0x1111 }, 188 1.1 drochner { RAL_MAC_CSR14, 0x1e11 }, 189 1.1 drochner { RAL_TXRX_CSR21, 0xe78f }, 190 1.1 drochner { RAL_MAC_CSR9, 0xff1d }, 191 1.1 drochner { RAL_MAC_CSR11, 0x0002 }, 192 1.1 drochner { RAL_MAC_CSR22, 0x0053 }, 193 1.1 drochner { RAL_MAC_CSR15, 0x0000 }, 194 1.1 drochner { RAL_MAC_CSR8, 0x0780 }, 195 1.1 drochner { RAL_TXRX_CSR19, 0x0000 }, 196 1.1 drochner { RAL_TXRX_CSR18, 0x005a }, 197 1.1 drochner { RAL_PHY_CSR2, 0x0000 }, 198 1.1 drochner { RAL_TXRX_CSR0, 0x1ec0 }, 199 1.1 drochner { RAL_PHY_CSR4, 0x000f } 200 1.1 drochner }; 201 1.1 drochner 202 1.1 drochner /* 203 1.1 drochner * Default values for BBP registers; values taken from the reference driver. 204 1.1 drochner */ 205 1.1 drochner static const struct { 206 1.1 drochner uint8_t reg; 207 1.1 drochner uint8_t val; 208 1.1 drochner } ural_def_bbp[] = { 209 1.1 drochner { 3, 0x02 }, 210 1.1 drochner { 4, 0x19 }, 211 1.1 drochner { 14, 0x1c }, 212 1.1 drochner { 15, 0x30 }, 213 1.1 drochner { 16, 0xac }, 214 1.1 drochner { 17, 0x48 }, 215 1.1 drochner { 18, 0x18 }, 216 1.1 drochner { 19, 0xff }, 217 1.1 drochner { 20, 0x1e }, 218 1.1 drochner { 21, 0x08 }, 219 1.1 drochner { 22, 0x08 }, 220 1.1 drochner { 23, 0x08 }, 221 1.1 drochner { 24, 0x80 }, 222 1.1 drochner { 25, 0x50 }, 223 1.1 drochner { 26, 0x08 }, 224 1.1 drochner { 27, 0x23 }, 225 1.1 drochner { 30, 0x10 }, 226 1.1 drochner { 31, 0x2b }, 227 1.1 drochner { 32, 0xb9 }, 228 1.1 drochner { 34, 0x12 }, 229 1.1 drochner { 35, 0x50 }, 230 1.1 drochner { 39, 0xc4 }, 231 1.1 drochner { 40, 0x02 }, 232 1.1 drochner { 41, 0x60 }, 233 1.1 drochner { 53, 0x10 }, 234 1.1 drochner { 54, 0x18 }, 235 1.1 drochner { 56, 0x08 }, 236 1.1 drochner { 57, 0x10 }, 237 1.1 drochner { 58, 0x08 }, 238 1.1 drochner { 61, 0x60 }, 239 1.1 drochner { 62, 0x10 }, 240 1.1 drochner { 75, 0xff } 241 1.1 drochner }; 242 1.1 drochner 243 1.1 drochner /* 244 1.1 drochner * Default values for RF register R2 indexed by channel numbers. 245 1.1 drochner */ 246 1.1 drochner static const uint32_t ural_rf2522_r2[] = { 247 1.1 drochner 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 248 1.1 drochner 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 249 1.1 drochner }; 250 1.1 drochner 251 1.1 drochner static const uint32_t ural_rf2523_r2[] = { 252 1.1 drochner 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 253 1.1 drochner 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 254 1.1 drochner }; 255 1.1 drochner 256 1.1 drochner static const uint32_t ural_rf2524_r2[] = { 257 1.1 drochner 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 258 1.1 drochner 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 259 1.1 drochner }; 260 1.1 drochner 261 1.1 drochner static const uint32_t ural_rf2525_r2[] = { 262 1.1 drochner 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 263 1.1 drochner 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 264 1.1 drochner }; 265 1.1 drochner 266 1.1 drochner static const uint32_t ural_rf2525_hi_r2[] = { 267 1.1 drochner 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 268 1.1 drochner 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 269 1.1 drochner }; 270 1.1 drochner 271 1.1 drochner static const uint32_t ural_rf2525e_r2[] = { 272 1.1 drochner 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 273 1.1 drochner 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 274 1.1 drochner }; 275 1.1 drochner 276 1.1 drochner static const uint32_t ural_rf2526_hi_r2[] = { 277 1.1 drochner 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 278 1.1 drochner 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 279 1.1 drochner }; 280 1.1 drochner 281 1.1 drochner static const uint32_t ural_rf2526_r2[] = { 282 1.1 drochner 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 283 1.1 drochner 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 284 1.1 drochner }; 285 1.1 drochner 286 1.1 drochner /* 287 1.1 drochner * For dual-band RF, RF registers R1 and R4 also depend on channel number; 288 1.1 drochner * values taken from the reference driver. 289 1.1 drochner */ 290 1.1 drochner static const struct { 291 1.1 drochner uint8_t chan; 292 1.1 drochner uint32_t r1; 293 1.1 drochner uint32_t r2; 294 1.1 drochner uint32_t r4; 295 1.1 drochner } ural_rf5222[] = { 296 1.1 drochner { 1, 0x08808, 0x0044d, 0x00282 }, 297 1.1 drochner { 2, 0x08808, 0x0044e, 0x00282 }, 298 1.1 drochner { 3, 0x08808, 0x0044f, 0x00282 }, 299 1.1 drochner { 4, 0x08808, 0x00460, 0x00282 }, 300 1.1 drochner { 5, 0x08808, 0x00461, 0x00282 }, 301 1.1 drochner { 6, 0x08808, 0x00462, 0x00282 }, 302 1.1 drochner { 7, 0x08808, 0x00463, 0x00282 }, 303 1.1 drochner { 8, 0x08808, 0x00464, 0x00282 }, 304 1.1 drochner { 9, 0x08808, 0x00465, 0x00282 }, 305 1.1 drochner { 10, 0x08808, 0x00466, 0x00282 }, 306 1.1 drochner { 11, 0x08808, 0x00467, 0x00282 }, 307 1.1 drochner { 12, 0x08808, 0x00468, 0x00282 }, 308 1.1 drochner { 13, 0x08808, 0x00469, 0x00282 }, 309 1.1 drochner { 14, 0x08808, 0x0046b, 0x00286 }, 310 1.1 drochner 311 1.1 drochner { 36, 0x08804, 0x06225, 0x00287 }, 312 1.1 drochner { 40, 0x08804, 0x06226, 0x00287 }, 313 1.1 drochner { 44, 0x08804, 0x06227, 0x00287 }, 314 1.1 drochner { 48, 0x08804, 0x06228, 0x00287 }, 315 1.1 drochner { 52, 0x08804, 0x06229, 0x00287 }, 316 1.1 drochner { 56, 0x08804, 0x0622a, 0x00287 }, 317 1.1 drochner { 60, 0x08804, 0x0622b, 0x00287 }, 318 1.1 drochner { 64, 0x08804, 0x0622c, 0x00287 }, 319 1.1 drochner 320 1.1 drochner { 100, 0x08804, 0x02200, 0x00283 }, 321 1.1 drochner { 104, 0x08804, 0x02201, 0x00283 }, 322 1.1 drochner { 108, 0x08804, 0x02202, 0x00283 }, 323 1.1 drochner { 112, 0x08804, 0x02203, 0x00283 }, 324 1.1 drochner { 116, 0x08804, 0x02204, 0x00283 }, 325 1.1 drochner { 120, 0x08804, 0x02205, 0x00283 }, 326 1.1 drochner { 124, 0x08804, 0x02206, 0x00283 }, 327 1.1 drochner { 128, 0x08804, 0x02207, 0x00283 }, 328 1.1 drochner { 132, 0x08804, 0x02208, 0x00283 }, 329 1.1 drochner { 136, 0x08804, 0x02209, 0x00283 }, 330 1.1 drochner { 140, 0x08804, 0x0220a, 0x00283 }, 331 1.1 drochner 332 1.1 drochner { 149, 0x08808, 0x02429, 0x00281 }, 333 1.1 drochner { 153, 0x08808, 0x0242b, 0x00281 }, 334 1.1 drochner { 157, 0x08808, 0x0242d, 0x00281 }, 335 1.1 drochner { 161, 0x08808, 0x0242f, 0x00281 } 336 1.1 drochner }; 337 1.1 drochner 338 1.61 maxv static int ural_match(device_t, cfdata_t, void *); 339 1.61 maxv static void ural_attach(device_t, device_t, void *); 340 1.61 maxv static int ural_detach(device_t, int); 341 1.61 maxv static int ural_activate(device_t, enum devact); 342 1.59 mrg 343 1.50 msaitoh CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, 344 1.50 msaitoh ural_detach, ural_activate); 345 1.1 drochner 346 1.61 maxv static int 347 1.36 dyoung ural_match(device_t parent, cfdata_t match, void *aux) 348 1.1 drochner { 349 1.36 dyoung struct usb_attach_arg *uaa = aux; 350 1.1 drochner 351 1.46 skrll return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 352 1.1 drochner UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 353 1.1 drochner } 354 1.1 drochner 355 1.61 maxv static void 356 1.36 dyoung ural_attach(device_t parent, device_t self, void *aux) 357 1.1 drochner { 358 1.36 dyoung struct ural_softc *sc = device_private(self); 359 1.36 dyoung struct usb_attach_arg *uaa = aux; 360 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 361 1.2 drochner struct ifnet *ifp = &sc->sc_if; 362 1.1 drochner usb_interface_descriptor_t *id; 363 1.1 drochner usb_endpoint_descriptor_t *ed; 364 1.1 drochner usbd_status error; 365 1.1 drochner char *devinfop; 366 1.1 drochner int i; 367 1.1 drochner 368 1.30 cube sc->sc_dev = self; 369 1.46 skrll sc->sc_udev = uaa->uaa_device; 370 1.60 maxv sc->sc_init_state = URAL_INIT_NONE; 371 1.1 drochner 372 1.32 plunky aprint_naive("\n"); 373 1.32 plunky aprint_normal("\n"); 374 1.32 plunky 375 1.1 drochner devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 376 1.30 cube aprint_normal_dev(self, "%s\n", devinfop); 377 1.1 drochner usbd_devinfo_free(devinfop); 378 1.1 drochner 379 1.41 skrll error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 380 1.41 skrll if (error != 0) { 381 1.41 skrll aprint_error_dev(self, "failed to set configuration" 382 1.41 skrll ", err=%s\n", usbd_errstr(error)); 383 1.36 dyoung return; 384 1.1 drochner } 385 1.1 drochner 386 1.1 drochner /* get the first interface handle */ 387 1.1 drochner error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 388 1.1 drochner &sc->sc_iface); 389 1.1 drochner if (error != 0) { 390 1.30 cube aprint_error_dev(self, "could not get interface handle\n"); 391 1.36 dyoung return; 392 1.1 drochner } 393 1.1 drochner 394 1.1 drochner /* 395 1.1 drochner * Find endpoints. 396 1.1 drochner */ 397 1.1 drochner id = usbd_get_interface_descriptor(sc->sc_iface); 398 1.1 drochner 399 1.1 drochner sc->sc_rx_no = sc->sc_tx_no = -1; 400 1.1 drochner for (i = 0; i < id->bNumEndpoints; i++) { 401 1.1 drochner ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 402 1.1 drochner if (ed == NULL) { 403 1.30 cube aprint_error_dev(self, 404 1.30 cube "no endpoint descriptor for %d\n", i); 405 1.36 dyoung return; 406 1.1 drochner } 407 1.1 drochner 408 1.1 drochner if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 409 1.1 drochner UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 410 1.1 drochner sc->sc_rx_no = ed->bEndpointAddress; 411 1.1 drochner else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 412 1.1 drochner UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 413 1.1 drochner sc->sc_tx_no = ed->bEndpointAddress; 414 1.1 drochner } 415 1.1 drochner if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 416 1.30 cube aprint_error_dev(self, "missing endpoint\n"); 417 1.36 dyoung return; 418 1.1 drochner } 419 1.1 drochner 420 1.44 jmcneill usb_init_task(&sc->sc_task, ural_task, sc, 0); 421 1.36 dyoung callout_init(&sc->sc_scan_ch, 0); 422 1.17 joerg sc->amrr.amrr_min_success_threshold = 1; 423 1.29 nakayama sc->amrr.amrr_max_success_threshold = 15; 424 1.36 dyoung callout_init(&sc->sc_amrr_ch, 0); 425 1.1 drochner 426 1.1 drochner /* retrieve RT2570 rev. no */ 427 1.1 drochner sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 428 1.1 drochner 429 1.1 drochner /* retrieve MAC address and various other things from EEPROM */ 430 1.1 drochner ural_read_eeprom(sc); 431 1.1 drochner 432 1.64 christos aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 433 1.30 cube sc->asic_rev, ural_get_rf(sc->rf_rev)); 434 1.12 perry 435 1.12 perry ifp->if_softc = sc; 436 1.36 dyoung memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 437 1.12 perry ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 438 1.12 perry ifp->if_init = ural_init; 439 1.12 perry ifp->if_ioctl = ural_ioctl; 440 1.12 perry ifp->if_start = ural_start; 441 1.12 perry ifp->if_watchdog = ural_watchdog; 442 1.12 perry IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 443 1.12 perry IFQ_SET_READY(&ifp->if_snd); 444 1.1 drochner 445 1.2 drochner ic->ic_ifp = ifp; 446 1.1 drochner ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 447 1.1 drochner ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 448 1.1 drochner ic->ic_state = IEEE80211_S_INIT; 449 1.1 drochner 450 1.1 drochner /* set device capabilities */ 451 1.12 perry ic->ic_caps = 452 1.12 perry IEEE80211_C_IBSS | /* IBSS mode supported */ 453 1.12 perry IEEE80211_C_MONITOR | /* monitor mode supported */ 454 1.12 perry IEEE80211_C_HOSTAP | /* HostAp mode supported */ 455 1.12 perry IEEE80211_C_TXPMGT | /* tx power management */ 456 1.12 perry IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 457 1.12 perry IEEE80211_C_SHSLOT | /* short slot time supported */ 458 1.12 perry IEEE80211_C_WPA; /* 802.11i */ 459 1.1 drochner 460 1.1 drochner if (sc->rf_rev == RAL_RF_5222) { 461 1.1 drochner /* set supported .11a rates */ 462 1.54 maya ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a; 463 1.1 drochner 464 1.1 drochner /* set supported .11a channels */ 465 1.1 drochner for (i = 36; i <= 64; i += 4) { 466 1.1 drochner ic->ic_channels[i].ic_freq = 467 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 468 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 469 1.1 drochner } 470 1.1 drochner for (i = 100; i <= 140; i += 4) { 471 1.1 drochner ic->ic_channels[i].ic_freq = 472 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 473 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 474 1.1 drochner } 475 1.1 drochner for (i = 149; i <= 161; i += 4) { 476 1.1 drochner ic->ic_channels[i].ic_freq = 477 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 478 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 479 1.1 drochner } 480 1.1 drochner } 481 1.1 drochner 482 1.1 drochner /* set supported .11b and .11g rates */ 483 1.54 maya ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 484 1.54 maya ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 485 1.1 drochner 486 1.1 drochner /* set supported .11b and .11g channels (1 through 14) */ 487 1.1 drochner for (i = 1; i <= 14; i++) { 488 1.1 drochner ic->ic_channels[i].ic_freq = 489 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 490 1.1 drochner ic->ic_channels[i].ic_flags = 491 1.1 drochner IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 492 1.1 drochner IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 493 1.1 drochner } 494 1.1 drochner 495 1.1 drochner if_attach(ifp); 496 1.1 drochner ieee80211_ifattach(ic); 497 1.12 perry ic->ic_reset = ural_reset; 498 1.1 drochner 499 1.1 drochner /* override state transition machine */ 500 1.1 drochner sc->sc_newstate = ic->ic_newstate; 501 1.1 drochner ic->ic_newstate = ural_newstate; 502 1.65 thorpej 503 1.65 thorpej /* XXX media locking needs revisiting */ 504 1.65 thorpej mutex_init(&sc->sc_media_mtx, MUTEX_DEFAULT, IPL_SOFTUSB); 505 1.65 thorpej ieee80211_media_init_with_lock(ic, 506 1.65 thorpej ural_media_change, ieee80211_media_status, &sc->sc_media_mtx); 507 1.1 drochner 508 1.35 joerg bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 509 1.46 skrll sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 510 1.1 drochner 511 1.46 skrll sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 512 1.1 drochner sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 513 1.1 drochner sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 514 1.1 drochner 515 1.46 skrll sc->sc_txtap_len = sizeof(sc->sc_txtapu); 516 1.1 drochner sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 517 1.1 drochner sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 518 1.1 drochner 519 1.4 drochner ieee80211_announce(ic); 520 1.4 drochner 521 1.60 maxv sc->sc_init_state = URAL_INIT_INITED; 522 1.60 maxv 523 1.50 msaitoh usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 524 1.1 drochner 525 1.45 nonaka if (!pmf_device_register(self, NULL, NULL)) 526 1.45 nonaka aprint_error_dev(self, "couldn't establish power handler\n"); 527 1.45 nonaka 528 1.36 dyoung return; 529 1.1 drochner } 530 1.1 drochner 531 1.61 maxv static int 532 1.36 dyoung ural_detach(device_t self, int flags) 533 1.1 drochner { 534 1.36 dyoung struct ural_softc *sc = device_private(self); 535 1.2 drochner struct ieee80211com *ic = &sc->sc_ic; 536 1.2 drochner struct ifnet *ifp = &sc->sc_if; 537 1.1 drochner int s; 538 1.1 drochner 539 1.60 maxv if (sc->sc_init_state < URAL_INIT_INITED) 540 1.60 maxv return 0; 541 1.60 maxv 542 1.45 nonaka pmf_device_deregister(self); 543 1.45 nonaka 544 1.1 drochner s = splusb(); 545 1.1 drochner 546 1.12 perry ural_stop(ifp, 1); 547 1.56 riastrad callout_halt(&sc->sc_scan_ch, NULL); 548 1.56 riastrad callout_halt(&sc->sc_amrr_ch, NULL); 549 1.57 riastrad usb_rem_task_wait(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER, NULL); 550 1.12 perry 551 1.35 joerg bpf_detach(ifp); 552 1.2 drochner ieee80211_ifdetach(ic); 553 1.1 drochner if_detach(ifp); 554 1.1 drochner 555 1.1 drochner splx(s); 556 1.1 drochner 557 1.50 msaitoh usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 558 1.1 drochner 559 1.1 drochner return 0; 560 1.1 drochner } 561 1.1 drochner 562 1.1 drochner Static int 563 1.1 drochner ural_alloc_tx_list(struct ural_softc *sc) 564 1.1 drochner { 565 1.1 drochner struct ural_tx_data *data; 566 1.1 drochner int i, error; 567 1.1 drochner 568 1.1 drochner sc->tx_queued = 0; 569 1.1 drochner 570 1.1 drochner for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 571 1.1 drochner data = &sc->tx_data[i]; 572 1.1 drochner 573 1.1 drochner data->sc = sc; 574 1.46 skrll error = usbd_create_xfer(sc->sc_tx_pipeh, 575 1.46 skrll RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 576 1.46 skrll &data->xfer); 577 1.46 skrll if (error) { 578 1.1 drochner printf("%s: could not allocate tx xfer\n", 579 1.36 dyoung device_xname(sc->sc_dev)); 580 1.1 drochner goto fail; 581 1.1 drochner } 582 1.1 drochner 583 1.46 skrll data->buf = usbd_get_buffer(data->xfer); 584 1.1 drochner } 585 1.1 drochner 586 1.1 drochner return 0; 587 1.1 drochner 588 1.1 drochner fail: ural_free_tx_list(sc); 589 1.1 drochner return error; 590 1.1 drochner } 591 1.1 drochner 592 1.1 drochner Static void 593 1.1 drochner ural_free_tx_list(struct ural_softc *sc) 594 1.1 drochner { 595 1.1 drochner struct ural_tx_data *data; 596 1.1 drochner int i; 597 1.1 drochner 598 1.1 drochner for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 599 1.1 drochner data = &sc->tx_data[i]; 600 1.1 drochner 601 1.1 drochner if (data->xfer != NULL) { 602 1.46 skrll usbd_destroy_xfer(data->xfer); 603 1.1 drochner data->xfer = NULL; 604 1.1 drochner } 605 1.1 drochner 606 1.1 drochner if (data->ni != NULL) { 607 1.1 drochner ieee80211_free_node(data->ni); 608 1.1 drochner data->ni = NULL; 609 1.1 drochner } 610 1.1 drochner } 611 1.1 drochner } 612 1.1 drochner 613 1.1 drochner Static int 614 1.1 drochner ural_alloc_rx_list(struct ural_softc *sc) 615 1.1 drochner { 616 1.1 drochner struct ural_rx_data *data; 617 1.1 drochner int i, error; 618 1.1 drochner 619 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 620 1.1 drochner data = &sc->rx_data[i]; 621 1.1 drochner 622 1.1 drochner data->sc = sc; 623 1.1 drochner 624 1.46 skrll error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 625 1.53 skrll 0, 0, &data->xfer); 626 1.46 skrll if (error) { 627 1.1 drochner printf("%s: could not allocate rx xfer\n", 628 1.36 dyoung device_xname(sc->sc_dev)); 629 1.1 drochner goto fail; 630 1.1 drochner } 631 1.1 drochner 632 1.1 drochner MGETHDR(data->m, M_DONTWAIT, MT_DATA); 633 1.1 drochner if (data->m == NULL) { 634 1.1 drochner printf("%s: could not allocate rx mbuf\n", 635 1.36 dyoung device_xname(sc->sc_dev)); 636 1.1 drochner error = ENOMEM; 637 1.1 drochner goto fail; 638 1.1 drochner } 639 1.1 drochner 640 1.1 drochner MCLGET(data->m, M_DONTWAIT); 641 1.1 drochner if (!(data->m->m_flags & M_EXT)) { 642 1.1 drochner printf("%s: could not allocate rx mbuf cluster\n", 643 1.36 dyoung device_xname(sc->sc_dev)); 644 1.1 drochner error = ENOMEM; 645 1.1 drochner goto fail; 646 1.1 drochner } 647 1.1 drochner 648 1.1 drochner data->buf = mtod(data->m, uint8_t *); 649 1.1 drochner } 650 1.1 drochner 651 1.1 drochner return 0; 652 1.1 drochner 653 1.52 skrll fail: ural_free_rx_list(sc); 654 1.1 drochner return error; 655 1.1 drochner } 656 1.1 drochner 657 1.1 drochner Static void 658 1.1 drochner ural_free_rx_list(struct ural_softc *sc) 659 1.1 drochner { 660 1.1 drochner struct ural_rx_data *data; 661 1.1 drochner int i; 662 1.1 drochner 663 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 664 1.1 drochner data = &sc->rx_data[i]; 665 1.1 drochner 666 1.1 drochner if (data->xfer != NULL) { 667 1.46 skrll usbd_destroy_xfer(data->xfer); 668 1.1 drochner data->xfer = NULL; 669 1.1 drochner } 670 1.1 drochner 671 1.67 rin m_freem(data->m); 672 1.67 rin data->m = NULL; 673 1.1 drochner } 674 1.1 drochner } 675 1.1 drochner 676 1.1 drochner Static int 677 1.1 drochner ural_media_change(struct ifnet *ifp) 678 1.1 drochner { 679 1.1 drochner int error; 680 1.1 drochner 681 1.1 drochner error = ieee80211_media_change(ifp); 682 1.1 drochner if (error != ENETRESET) 683 1.1 drochner return error; 684 1.1 drochner 685 1.1 drochner if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 686 1.1 drochner ural_init(ifp); 687 1.1 drochner 688 1.1 drochner return 0; 689 1.1 drochner } 690 1.1 drochner 691 1.1 drochner /* 692 1.1 drochner * This function is called periodically (every 200ms) during scanning to 693 1.1 drochner * switch from one channel to another. 694 1.1 drochner */ 695 1.1 drochner Static void 696 1.1 drochner ural_next_scan(void *arg) 697 1.1 drochner { 698 1.1 drochner struct ural_softc *sc = arg; 699 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 700 1.1 drochner 701 1.1 drochner if (ic->ic_state == IEEE80211_S_SCAN) 702 1.1 drochner ieee80211_next_scan(ic); 703 1.1 drochner } 704 1.1 drochner 705 1.1 drochner Static void 706 1.1 drochner ural_task(void *arg) 707 1.1 drochner { 708 1.1 drochner struct ural_softc *sc = arg; 709 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 710 1.1 drochner enum ieee80211_state ostate; 711 1.12 perry struct ieee80211_node *ni; 712 1.1 drochner struct mbuf *m; 713 1.1 drochner 714 1.1 drochner ostate = ic->ic_state; 715 1.1 drochner 716 1.1 drochner switch (sc->sc_state) { 717 1.1 drochner case IEEE80211_S_INIT: 718 1.1 drochner if (ostate == IEEE80211_S_RUN) { 719 1.1 drochner /* abort TSF synchronization */ 720 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, 0); 721 1.1 drochner 722 1.1 drochner /* force tx led to stop blinking */ 723 1.1 drochner ural_write(sc, RAL_MAC_CSR20, 0); 724 1.1 drochner } 725 1.1 drochner break; 726 1.1 drochner 727 1.1 drochner case IEEE80211_S_SCAN: 728 1.9 skrll ural_set_chan(sc, ic->ic_curchan); 729 1.36 dyoung callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 730 1.1 drochner break; 731 1.1 drochner 732 1.1 drochner case IEEE80211_S_AUTH: 733 1.9 skrll ural_set_chan(sc, ic->ic_curchan); 734 1.1 drochner break; 735 1.1 drochner 736 1.1 drochner case IEEE80211_S_ASSOC: 737 1.9 skrll ural_set_chan(sc, ic->ic_curchan); 738 1.1 drochner break; 739 1.1 drochner 740 1.1 drochner case IEEE80211_S_RUN: 741 1.9 skrll ural_set_chan(sc, ic->ic_curchan); 742 1.1 drochner 743 1.12 perry ni = ic->ic_bss; 744 1.12 perry 745 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR) { 746 1.12 perry ural_update_slot(ic->ic_ifp); 747 1.12 perry ural_set_txpreamble(sc); 748 1.12 perry ural_set_basicrates(sc); 749 1.12 perry ural_set_bssid(sc, ni->ni_bssid); 750 1.12 perry } 751 1.1 drochner 752 1.1 drochner if (ic->ic_opmode == IEEE80211_M_HOSTAP || 753 1.1 drochner ic->ic_opmode == IEEE80211_M_IBSS) { 754 1.12 perry m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 755 1.1 drochner if (m == NULL) { 756 1.1 drochner printf("%s: could not allocate beacon\n", 757 1.36 dyoung device_xname(sc->sc_dev)); 758 1.1 drochner return; 759 1.1 drochner } 760 1.1 drochner 761 1.12 perry if (ural_tx_bcn(sc, m, ni) != 0) { 762 1.1 drochner m_freem(m); 763 1.12 perry printf("%s: could not send beacon\n", 764 1.36 dyoung device_xname(sc->sc_dev)); 765 1.1 drochner return; 766 1.1 drochner } 767 1.1 drochner 768 1.1 drochner /* beacon is no longer needed */ 769 1.1 drochner m_freem(m); 770 1.1 drochner } 771 1.1 drochner 772 1.1 drochner /* make tx led blink on tx (controlled by ASIC) */ 773 1.1 drochner ural_write(sc, RAL_MAC_CSR20, 1); 774 1.1 drochner 775 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR) 776 1.1 drochner ural_enable_tsf_sync(sc); 777 1.12 perry 778 1.12 perry /* enable automatic rate adaptation in STA mode */ 779 1.12 perry if (ic->ic_opmode == IEEE80211_M_STA && 780 1.12 perry ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 781 1.12 perry ural_amrr_start(sc, ni); 782 1.12 perry 783 1.1 drochner break; 784 1.1 drochner } 785 1.1 drochner 786 1.1 drochner sc->sc_newstate(ic, sc->sc_state, -1); 787 1.1 drochner } 788 1.1 drochner 789 1.1 drochner Static int 790 1.13 christos ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 791 1.18 christos int arg) 792 1.1 drochner { 793 1.1 drochner struct ural_softc *sc = ic->ic_ifp->if_softc; 794 1.1 drochner 795 1.56 riastrad /* 796 1.56 riastrad * XXXSMP: This does not wait for the task, if it is in flight, 797 1.56 riastrad * to complete. If this code works at all, it must rely on the 798 1.56 riastrad * kernel lock to serialize with the USB task thread. 799 1.56 riastrad */ 800 1.1 drochner usb_rem_task(sc->sc_udev, &sc->sc_task); 801 1.36 dyoung callout_stop(&sc->sc_scan_ch); 802 1.36 dyoung callout_stop(&sc->sc_amrr_ch); 803 1.1 drochner 804 1.1 drochner /* do it in a process context */ 805 1.1 drochner sc->sc_state = nstate; 806 1.17 joerg usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 807 1.1 drochner 808 1.1 drochner return 0; 809 1.1 drochner } 810 1.1 drochner 811 1.1 drochner /* quickly determine if a given rate is CCK or OFDM */ 812 1.1 drochner #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 813 1.1 drochner 814 1.1 drochner #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 815 1.1 drochner #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 816 1.12 perry 817 1.12 perry #define RAL_SIFS 10 /* us */ 818 1.12 perry 819 1.12 perry #define RAL_RXTX_TURNAROUND 5 /* us */ 820 1.12 perry 821 1.12 perry /* 822 1.12 perry * This function is only used by the Rx radiotap code. 823 1.12 perry */ 824 1.12 perry Static int 825 1.12 perry ural_rxrate(struct ural_rx_desc *desc) 826 1.12 perry { 827 1.12 perry if (le32toh(desc->flags) & RAL_RX_OFDM) { 828 1.12 perry /* reverse function of ural_plcp_signal */ 829 1.12 perry switch (desc->rate) { 830 1.12 perry case 0xb: return 12; 831 1.12 perry case 0xf: return 18; 832 1.12 perry case 0xa: return 24; 833 1.12 perry case 0xe: return 36; 834 1.12 perry case 0x9: return 48; 835 1.12 perry case 0xd: return 72; 836 1.12 perry case 0x8: return 96; 837 1.12 perry case 0xc: return 108; 838 1.12 perry } 839 1.12 perry } else { 840 1.12 perry if (desc->rate == 10) 841 1.12 perry return 2; 842 1.12 perry if (desc->rate == 20) 843 1.12 perry return 4; 844 1.12 perry if (desc->rate == 55) 845 1.12 perry return 11; 846 1.12 perry if (desc->rate == 110) 847 1.12 perry return 22; 848 1.12 perry } 849 1.12 perry return 2; /* should not get there */ 850 1.12 perry } 851 1.1 drochner 852 1.1 drochner Static void 853 1.46 skrll ural_txeof(struct usbd_xfer *xfer, void * priv, 854 1.13 christos usbd_status status) 855 1.1 drochner { 856 1.1 drochner struct ural_tx_data *data = priv; 857 1.1 drochner struct ural_softc *sc = data->sc; 858 1.2 drochner struct ifnet *ifp = &sc->sc_if; 859 1.1 drochner int s; 860 1.1 drochner 861 1.1 drochner if (status != USBD_NORMAL_COMPLETION) { 862 1.1 drochner if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 863 1.1 drochner return; 864 1.1 drochner 865 1.1 drochner printf("%s: could not transmit buffer: %s\n", 866 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(status)); 867 1.1 drochner 868 1.1 drochner if (status == USBD_STALLED) 869 1.10 augustss usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 870 1.1 drochner 871 1.62 thorpej if_statinc(ifp, if_oerrors); 872 1.1 drochner return; 873 1.1 drochner } 874 1.1 drochner 875 1.1 drochner s = splnet(); 876 1.1 drochner 877 1.1 drochner m_freem(data->m); 878 1.1 drochner data->m = NULL; 879 1.1 drochner ieee80211_free_node(data->ni); 880 1.1 drochner data->ni = NULL; 881 1.1 drochner 882 1.1 drochner sc->tx_queued--; 883 1.62 thorpej if_statinc(ifp, if_opackets); 884 1.1 drochner 885 1.1 drochner DPRINTFN(10, ("tx done\n")); 886 1.1 drochner 887 1.1 drochner sc->sc_tx_timer = 0; 888 1.1 drochner ifp->if_flags &= ~IFF_OACTIVE; 889 1.1 drochner ural_start(ifp); 890 1.1 drochner 891 1.1 drochner splx(s); 892 1.1 drochner } 893 1.1 drochner 894 1.1 drochner Static void 895 1.46 skrll ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 896 1.1 drochner { 897 1.1 drochner struct ural_rx_data *data = priv; 898 1.1 drochner struct ural_softc *sc = data->sc; 899 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 900 1.2 drochner struct ifnet *ifp = &sc->sc_if; 901 1.1 drochner struct ural_rx_desc *desc; 902 1.12 perry struct ieee80211_frame *wh; 903 1.1 drochner struct ieee80211_node *ni; 904 1.12 perry struct mbuf *mnew, *m; 905 1.1 drochner int s, len; 906 1.1 drochner 907 1.1 drochner if (status != USBD_NORMAL_COMPLETION) { 908 1.1 drochner if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 909 1.1 drochner return; 910 1.1 drochner 911 1.1 drochner if (status == USBD_STALLED) 912 1.10 augustss usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 913 1.1 drochner goto skip; 914 1.1 drochner } 915 1.1 drochner 916 1.1 drochner usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 917 1.1 drochner 918 1.12 perry if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 919 1.36 dyoung DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 920 1.12 perry len)); 921 1.62 thorpej if_statinc(ifp, if_ierrors); 922 1.1 drochner goto skip; 923 1.1 drochner } 924 1.1 drochner 925 1.1 drochner /* rx descriptor is located at the end */ 926 1.1 drochner desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 927 1.1 drochner 928 1.12 perry if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 929 1.12 perry (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 930 1.1 drochner /* 931 1.1 drochner * This should not happen since we did not request to receive 932 1.1 drochner * those frames when we filled RAL_TXRX_CSR2. 933 1.1 drochner */ 934 1.1 drochner DPRINTFN(5, ("PHY or CRC error\n")); 935 1.62 thorpej if_statinc(ifp, if_ierrors); 936 1.1 drochner goto skip; 937 1.1 drochner } 938 1.1 drochner 939 1.12 perry MGETHDR(mnew, M_DONTWAIT, MT_DATA); 940 1.12 perry if (mnew == NULL) { 941 1.62 thorpej if_statinc(ifp, if_ierrors); 942 1.12 perry goto skip; 943 1.12 perry } 944 1.12 perry 945 1.12 perry MCLGET(mnew, M_DONTWAIT); 946 1.12 perry if (!(mnew->m_flags & M_EXT)) { 947 1.62 thorpej if_statinc(ifp, if_ierrors); 948 1.12 perry m_freem(mnew); 949 1.12 perry goto skip; 950 1.12 perry } 951 1.12 perry 952 1.12 perry m = data->m; 953 1.12 perry data->m = mnew; 954 1.12 perry data->buf = mtod(data->m, uint8_t *); 955 1.12 perry 956 1.1 drochner /* finalize mbuf */ 957 1.49 ozaki m_set_rcvif(m, ifp); 958 1.1 drochner m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 959 1.12 perry m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 960 1.1 drochner 961 1.1 drochner s = splnet(); 962 1.1 drochner 963 1.1 drochner if (sc->sc_drvbpf != NULL) { 964 1.1 drochner struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 965 1.1 drochner 966 1.5 drochner tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 967 1.12 perry tap->wr_rate = ural_rxrate(desc); 968 1.12 perry tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 969 1.12 perry tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 970 1.1 drochner tap->wr_antenna = sc->rx_ant; 971 1.1 drochner tap->wr_antsignal = desc->rssi; 972 1.1 drochner 973 1.55 msaitoh bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN); 974 1.1 drochner } 975 1.1 drochner 976 1.12 perry wh = mtod(m, struct ieee80211_frame *); 977 1.12 perry ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 978 1.1 drochner 979 1.1 drochner /* send the frame to the 802.11 layer */ 980 1.1 drochner ieee80211_input(ic, m, ni, desc->rssi, 0); 981 1.1 drochner 982 1.1 drochner /* node is no longer needed */ 983 1.1 drochner ieee80211_free_node(ni); 984 1.1 drochner 985 1.1 drochner splx(s); 986 1.1 drochner 987 1.1 drochner DPRINTFN(15, ("rx done\n")); 988 1.1 drochner 989 1.1 drochner skip: /* setup a new transfer */ 990 1.46 skrll usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 991 1.1 drochner USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 992 1.1 drochner usbd_transfer(xfer); 993 1.1 drochner } 994 1.1 drochner 995 1.1 drochner /* 996 1.1 drochner * Return the expected ack rate for a frame transmitted at rate `rate'. 997 1.1 drochner * XXX: this should depend on the destination node basic rate set. 998 1.1 drochner */ 999 1.1 drochner Static int 1000 1.12 perry ural_ack_rate(struct ieee80211com *ic, int rate) 1001 1.1 drochner { 1002 1.1 drochner switch (rate) { 1003 1.1 drochner /* CCK rates */ 1004 1.1 drochner case 2: 1005 1.1 drochner return 2; 1006 1.1 drochner case 4: 1007 1.1 drochner case 11: 1008 1.1 drochner case 22: 1009 1.12 perry return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1010 1.1 drochner 1011 1.1 drochner /* OFDM rates */ 1012 1.1 drochner case 12: 1013 1.1 drochner case 18: 1014 1.1 drochner return 12; 1015 1.1 drochner case 24: 1016 1.1 drochner case 36: 1017 1.1 drochner return 24; 1018 1.1 drochner case 48: 1019 1.1 drochner case 72: 1020 1.1 drochner case 96: 1021 1.1 drochner case 108: 1022 1.1 drochner return 48; 1023 1.1 drochner } 1024 1.1 drochner 1025 1.1 drochner /* default to 1Mbps */ 1026 1.1 drochner return 2; 1027 1.1 drochner } 1028 1.1 drochner 1029 1.1 drochner /* 1030 1.1 drochner * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1031 1.1 drochner * The function automatically determines the operating mode depending on the 1032 1.1 drochner * given rate. `flags' indicates whether short preamble is in use or not. 1033 1.1 drochner */ 1034 1.1 drochner Static uint16_t 1035 1.1 drochner ural_txtime(int len, int rate, uint32_t flags) 1036 1.1 drochner { 1037 1.1 drochner uint16_t txtime; 1038 1.1 drochner 1039 1.1 drochner if (RAL_RATE_IS_OFDM(rate)) { 1040 1.17 joerg /* IEEE Std 802.11g-2003, pp. 37 */ 1041 1.12 perry txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1042 1.12 perry txtime = 16 + 4 + 4 * txtime + 6; 1043 1.1 drochner } else { 1044 1.12 perry /* IEEE Std 802.11b-1999, pp. 28 */ 1045 1.12 perry txtime = (16 * len + rate - 1) / rate; 1046 1.1 drochner if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1047 1.12 perry txtime += 72 + 24; 1048 1.1 drochner else 1049 1.12 perry txtime += 144 + 48; 1050 1.1 drochner } 1051 1.1 drochner return txtime; 1052 1.1 drochner } 1053 1.1 drochner 1054 1.1 drochner Static uint8_t 1055 1.1 drochner ural_plcp_signal(int rate) 1056 1.1 drochner { 1057 1.1 drochner switch (rate) { 1058 1.1 drochner /* CCK rates (returned values are device-dependent) */ 1059 1.1 drochner case 2: return 0x0; 1060 1.1 drochner case 4: return 0x1; 1061 1.1 drochner case 11: return 0x2; 1062 1.1 drochner case 22: return 0x3; 1063 1.1 drochner 1064 1.1 drochner /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1065 1.1 drochner case 12: return 0xb; 1066 1.1 drochner case 18: return 0xf; 1067 1.1 drochner case 24: return 0xa; 1068 1.1 drochner case 36: return 0xe; 1069 1.1 drochner case 48: return 0x9; 1070 1.1 drochner case 72: return 0xd; 1071 1.1 drochner case 96: return 0x8; 1072 1.1 drochner case 108: return 0xc; 1073 1.1 drochner 1074 1.1 drochner /* unsupported rates (should not get there) */ 1075 1.1 drochner default: return 0xff; 1076 1.1 drochner } 1077 1.1 drochner } 1078 1.1 drochner 1079 1.1 drochner Static void 1080 1.1 drochner ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1081 1.1 drochner uint32_t flags, int len, int rate) 1082 1.1 drochner { 1083 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 1084 1.1 drochner uint16_t plcp_length; 1085 1.1 drochner int remainder; 1086 1.1 drochner 1087 1.1 drochner desc->flags = htole32(flags); 1088 1.1 drochner desc->flags |= htole32(RAL_TX_NEWSEQ); 1089 1.1 drochner desc->flags |= htole32(len << 16); 1090 1.1 drochner 1091 1.12 perry desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1092 1.46 skrll desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1093 1.1 drochner 1094 1.12 perry /* setup PLCP fields */ 1095 1.12 perry desc->plcp_signal = ural_plcp_signal(rate); 1096 1.1 drochner desc->plcp_service = 4; 1097 1.1 drochner 1098 1.12 perry len += IEEE80211_CRC_LEN; 1099 1.1 drochner if (RAL_RATE_IS_OFDM(rate)) { 1100 1.12 perry desc->flags |= htole32(RAL_TX_OFDM); 1101 1.12 perry 1102 1.1 drochner plcp_length = len & 0xfff; 1103 1.12 perry desc->plcp_length_hi = plcp_length >> 6; 1104 1.12 perry desc->plcp_length_lo = plcp_length & 0x3f; 1105 1.1 drochner } else { 1106 1.12 perry plcp_length = (16 * len + rate - 1) / rate; 1107 1.12 perry if (rate == 22) { 1108 1.12 perry remainder = (16 * len) % 22; 1109 1.12 perry if (remainder != 0 && remainder < 7) 1110 1.1 drochner desc->plcp_service |= RAL_PLCP_LENGEXT; 1111 1.1 drochner } 1112 1.12 perry desc->plcp_length_hi = plcp_length >> 8; 1113 1.12 perry desc->plcp_length_lo = plcp_length & 0xff; 1114 1.12 perry 1115 1.12 perry if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1116 1.12 perry desc->plcp_signal |= 0x08; 1117 1.1 drochner } 1118 1.1 drochner 1119 1.1 drochner desc->iv = 0; 1120 1.1 drochner desc->eiv = 0; 1121 1.1 drochner } 1122 1.1 drochner 1123 1.1 drochner #define RAL_TX_TIMEOUT 5000 1124 1.1 drochner 1125 1.1 drochner Static int 1126 1.1 drochner ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1127 1.1 drochner { 1128 1.1 drochner struct ural_tx_desc *desc; 1129 1.46 skrll struct usbd_xfer *xfer; 1130 1.12 perry uint8_t cmd = 0; 1131 1.1 drochner usbd_status error; 1132 1.1 drochner uint8_t *buf; 1133 1.1 drochner int xferlen, rate; 1134 1.1 drochner 1135 1.12 perry rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1136 1.1 drochner 1137 1.1 drochner /* xfer length needs to be a multiple of two! */ 1138 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1139 1.1 drochner 1140 1.46 skrll error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1141 1.46 skrll USBD_FORCE_SHORT_XFER, 0, &xfer); 1142 1.46 skrll if (error) 1143 1.46 skrll return error; 1144 1.46 skrll 1145 1.46 skrll buf = usbd_get_buffer(xfer); 1146 1.1 drochner 1147 1.46 skrll usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1148 1.46 skrll RAL_TX_TIMEOUT, NULL); 1149 1.1 drochner 1150 1.1 drochner error = usbd_sync_transfer(xfer); 1151 1.1 drochner if (error != 0) { 1152 1.46 skrll usbd_destroy_xfer(xfer); 1153 1.1 drochner return error; 1154 1.1 drochner } 1155 1.1 drochner 1156 1.1 drochner desc = (struct ural_tx_desc *)buf; 1157 1.1 drochner 1158 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1159 1.1 drochner ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1160 1.1 drochner m0->m_pkthdr.len, rate); 1161 1.1 drochner 1162 1.1 drochner DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1163 1.1 drochner m0->m_pkthdr.len, rate, xferlen)); 1164 1.1 drochner 1165 1.46 skrll usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1166 1.46 skrll RAL_TX_TIMEOUT, NULL); 1167 1.1 drochner 1168 1.1 drochner error = usbd_sync_transfer(xfer); 1169 1.46 skrll usbd_destroy_xfer(xfer); 1170 1.1 drochner 1171 1.1 drochner return error; 1172 1.1 drochner } 1173 1.1 drochner 1174 1.1 drochner Static int 1175 1.1 drochner ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1176 1.1 drochner { 1177 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 1178 1.1 drochner struct ural_tx_desc *desc; 1179 1.1 drochner struct ural_tx_data *data; 1180 1.1 drochner struct ieee80211_frame *wh; 1181 1.26 degroote struct ieee80211_key *k; 1182 1.1 drochner uint32_t flags = 0; 1183 1.1 drochner uint16_t dur; 1184 1.1 drochner usbd_status error; 1185 1.1 drochner int xferlen, rate; 1186 1.1 drochner 1187 1.1 drochner data = &sc->tx_data[0]; 1188 1.1 drochner desc = (struct ural_tx_desc *)data->buf; 1189 1.1 drochner 1190 1.12 perry rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1191 1.12 perry 1192 1.26 degroote wh = mtod(m0, struct ieee80211_frame *); 1193 1.26 degroote 1194 1.26 degroote if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1195 1.26 degroote k = ieee80211_crypto_encap(ic, ni, m0); 1196 1.26 degroote if (k == NULL) { 1197 1.26 degroote m_freem(m0); 1198 1.26 degroote return ENOBUFS; 1199 1.26 degroote } 1200 1.26 degroote } 1201 1.26 degroote 1202 1.1 drochner data->m = m0; 1203 1.1 drochner data->ni = ni; 1204 1.1 drochner 1205 1.1 drochner wh = mtod(m0, struct ieee80211_frame *); 1206 1.1 drochner 1207 1.1 drochner if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1208 1.1 drochner flags |= RAL_TX_ACK; 1209 1.1 drochner 1210 1.1 drochner dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1211 1.1 drochner *(uint16_t *)wh->i_dur = htole16(dur); 1212 1.1 drochner 1213 1.1 drochner /* tell hardware to add timestamp for probe responses */ 1214 1.12 perry if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1215 1.12 perry IEEE80211_FC0_TYPE_MGT && 1216 1.12 perry (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1217 1.12 perry IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1218 1.1 drochner flags |= RAL_TX_TIMESTAMP; 1219 1.1 drochner } 1220 1.1 drochner 1221 1.7 drochner if (sc->sc_drvbpf != NULL) { 1222 1.7 drochner struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1223 1.7 drochner 1224 1.7 drochner tap->wt_flags = 0; 1225 1.7 drochner tap->wt_rate = rate; 1226 1.9 skrll tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1227 1.9 skrll tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1228 1.7 drochner tap->wt_antenna = sc->tx_ant; 1229 1.7 drochner 1230 1.55 msaitoh bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1231 1.7 drochner } 1232 1.7 drochner 1233 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1234 1.1 drochner ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1235 1.1 drochner 1236 1.12 perry /* align end on a 2-bytes boundary */ 1237 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1238 1.1 drochner 1239 1.12 perry /* 1240 1.12 perry * No space left in the last URB to store the extra 2 bytes, force 1241 1.12 perry * sending of another URB. 1242 1.12 perry */ 1243 1.12 perry if ((xferlen % 64) == 0) 1244 1.12 perry xferlen += 2; 1245 1.12 perry 1246 1.1 drochner DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1247 1.1 drochner m0->m_pkthdr.len, rate, xferlen)); 1248 1.1 drochner 1249 1.46 skrll usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1250 1.46 skrll USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1251 1.1 drochner 1252 1.1 drochner error = usbd_transfer(data->xfer); 1253 1.16 joerg if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1254 1.16 joerg m_freem(m0); 1255 1.1 drochner return error; 1256 1.16 joerg } 1257 1.1 drochner 1258 1.1 drochner sc->tx_queued++; 1259 1.1 drochner 1260 1.1 drochner return 0; 1261 1.1 drochner } 1262 1.1 drochner 1263 1.1 drochner Static int 1264 1.1 drochner ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1265 1.1 drochner { 1266 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 1267 1.1 drochner struct ural_tx_desc *desc; 1268 1.1 drochner struct ural_tx_data *data; 1269 1.1 drochner struct ieee80211_frame *wh; 1270 1.1 drochner struct ieee80211_key *k; 1271 1.1 drochner uint32_t flags = 0; 1272 1.1 drochner uint16_t dur; 1273 1.1 drochner usbd_status error; 1274 1.1 drochner int xferlen, rate; 1275 1.1 drochner 1276 1.2 drochner wh = mtod(m0, struct ieee80211_frame *); 1277 1.2 drochner 1278 1.12 perry if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1279 1.12 perry rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1280 1.12 perry else 1281 1.12 perry rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1282 1.1 drochner 1283 1.1 drochner rate &= IEEE80211_RATE_VAL; 1284 1.1 drochner 1285 1.2 drochner if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1286 1.1 drochner k = ieee80211_crypto_encap(ic, ni, m0); 1287 1.3 dyoung if (k == NULL) { 1288 1.3 dyoung m_freem(m0); 1289 1.1 drochner return ENOBUFS; 1290 1.3 dyoung } 1291 1.2 drochner 1292 1.2 drochner /* packet header may have moved, reset our local pointer */ 1293 1.2 drochner wh = mtod(m0, struct ieee80211_frame *); 1294 1.1 drochner } 1295 1.1 drochner 1296 1.12 perry data = &sc->tx_data[0]; 1297 1.12 perry desc = (struct ural_tx_desc *)data->buf; 1298 1.12 perry 1299 1.12 perry data->m = m0; 1300 1.12 perry data->ni = ni; 1301 1.12 perry 1302 1.12 perry if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1303 1.12 perry flags |= RAL_TX_ACK; 1304 1.12 perry flags |= RAL_TX_RETRY(7); 1305 1.12 perry 1306 1.12 perry dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1307 1.12 perry ic->ic_flags) + RAL_SIFS; 1308 1.12 perry *(uint16_t *)wh->i_dur = htole16(dur); 1309 1.12 perry } 1310 1.12 perry 1311 1.1 drochner if (sc->sc_drvbpf != NULL) { 1312 1.1 drochner struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1313 1.1 drochner 1314 1.1 drochner tap->wt_flags = 0; 1315 1.1 drochner tap->wt_rate = rate; 1316 1.9 skrll tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1317 1.9 skrll tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1318 1.1 drochner tap->wt_antenna = sc->tx_ant; 1319 1.1 drochner 1320 1.55 msaitoh bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1321 1.1 drochner } 1322 1.1 drochner 1323 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1324 1.1 drochner ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1325 1.1 drochner 1326 1.12 perry /* align end on a 2-bytes boundary */ 1327 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1328 1.1 drochner 1329 1.12 perry /* 1330 1.12 perry * No space left in the last URB to store the extra 2 bytes, force 1331 1.12 perry * sending of another URB. 1332 1.12 perry */ 1333 1.12 perry if ((xferlen % 64) == 0) 1334 1.12 perry xferlen += 2; 1335 1.12 perry 1336 1.1 drochner DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1337 1.1 drochner m0->m_pkthdr.len, rate, xferlen)); 1338 1.46 skrll usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1339 1.46 skrll USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1340 1.1 drochner 1341 1.1 drochner error = usbd_transfer(data->xfer); 1342 1.12 perry if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1343 1.1 drochner return error; 1344 1.1 drochner 1345 1.1 drochner sc->tx_queued++; 1346 1.1 drochner 1347 1.1 drochner return 0; 1348 1.1 drochner } 1349 1.1 drochner 1350 1.1 drochner Static void 1351 1.1 drochner ural_start(struct ifnet *ifp) 1352 1.1 drochner { 1353 1.1 drochner struct ural_softc *sc = ifp->if_softc; 1354 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 1355 1.12 perry struct mbuf *m0; 1356 1.1 drochner struct ether_header *eh; 1357 1.1 drochner struct ieee80211_node *ni; 1358 1.1 drochner 1359 1.1 drochner for (;;) { 1360 1.1 drochner IF_POLL(&ic->ic_mgtq, m0); 1361 1.1 drochner if (m0 != NULL) { 1362 1.1 drochner if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1363 1.1 drochner ifp->if_flags |= IFF_OACTIVE; 1364 1.1 drochner break; 1365 1.1 drochner } 1366 1.1 drochner IF_DEQUEUE(&ic->ic_mgtq, m0); 1367 1.1 drochner 1368 1.47 ozaki ni = M_GETCTX(m0, struct ieee80211_node *); 1369 1.48 ozaki M_CLEARCTX(m0); 1370 1.55 msaitoh bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1371 1.1 drochner if (ural_tx_mgt(sc, m0, ni) != 0) 1372 1.1 drochner break; 1373 1.1 drochner 1374 1.1 drochner } else { 1375 1.1 drochner if (ic->ic_state != IEEE80211_S_RUN) 1376 1.1 drochner break; 1377 1.66 thorpej IFQ_POLL(&ifp->if_snd, m0); 1378 1.1 drochner if (m0 == NULL) 1379 1.1 drochner break; 1380 1.1 drochner if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1381 1.1 drochner ifp->if_flags |= IFF_OACTIVE; 1382 1.1 drochner break; 1383 1.1 drochner } 1384 1.66 thorpej IFQ_DEQUEUE(&ifp->if_snd, m0); 1385 1.1 drochner 1386 1.46 skrll if (m0->m_len < sizeof(struct ether_header) && 1387 1.46 skrll !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1388 1.1 drochner continue; 1389 1.1 drochner 1390 1.1 drochner eh = mtod(m0, struct ether_header *); 1391 1.1 drochner ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1392 1.1 drochner if (ni == NULL) { 1393 1.1 drochner m_freem(m0); 1394 1.1 drochner continue; 1395 1.1 drochner } 1396 1.55 msaitoh bpf_mtap(ifp, m0, BPF_D_OUT); 1397 1.1 drochner m0 = ieee80211_encap(ic, m0, ni); 1398 1.4 drochner if (m0 == NULL) { 1399 1.4 drochner ieee80211_free_node(ni); 1400 1.1 drochner continue; 1401 1.4 drochner } 1402 1.55 msaitoh bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1403 1.1 drochner if (ural_tx_data(sc, m0, ni) != 0) { 1404 1.1 drochner ieee80211_free_node(ni); 1405 1.62 thorpej if_statinc(ifp, if_oerrors); 1406 1.1 drochner break; 1407 1.1 drochner } 1408 1.1 drochner } 1409 1.1 drochner 1410 1.1 drochner sc->sc_tx_timer = 5; 1411 1.1 drochner ifp->if_timer = 1; 1412 1.1 drochner } 1413 1.1 drochner } 1414 1.1 drochner 1415 1.1 drochner Static void 1416 1.1 drochner ural_watchdog(struct ifnet *ifp) 1417 1.1 drochner { 1418 1.1 drochner struct ural_softc *sc = ifp->if_softc; 1419 1.2 drochner struct ieee80211com *ic = &sc->sc_ic; 1420 1.1 drochner 1421 1.1 drochner ifp->if_timer = 0; 1422 1.1 drochner 1423 1.1 drochner if (sc->sc_tx_timer > 0) { 1424 1.1 drochner if (--sc->sc_tx_timer == 0) { 1425 1.36 dyoung printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1426 1.12 perry /*ural_init(sc); XXX needs a process context! */ 1427 1.62 thorpej if_statinc(ifp, if_oerrors); 1428 1.1 drochner return; 1429 1.1 drochner } 1430 1.1 drochner ifp->if_timer = 1; 1431 1.1 drochner } 1432 1.1 drochner 1433 1.2 drochner ieee80211_watchdog(ic); 1434 1.1 drochner } 1435 1.1 drochner 1436 1.12 perry /* 1437 1.12 perry * This function allows for fast channel switching in monitor mode (used by 1438 1.12 perry * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1439 1.12 perry * generate a new beacon frame. 1440 1.12 perry */ 1441 1.12 perry Static int 1442 1.12 perry ural_reset(struct ifnet *ifp) 1443 1.12 perry { 1444 1.12 perry struct ural_softc *sc = ifp->if_softc; 1445 1.12 perry struct ieee80211com *ic = &sc->sc_ic; 1446 1.12 perry 1447 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR) 1448 1.12 perry return ENETRESET; 1449 1.12 perry 1450 1.12 perry ural_set_chan(sc, ic->ic_curchan); 1451 1.12 perry 1452 1.12 perry return 0; 1453 1.12 perry } 1454 1.12 perry 1455 1.1 drochner Static int 1456 1.19 christos ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1457 1.1 drochner { 1458 1.37 jmcneill #define IS_RUNNING(ifp) \ 1459 1.37 jmcneill (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1460 1.37 jmcneill 1461 1.1 drochner struct ural_softc *sc = ifp->if_softc; 1462 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 1463 1.1 drochner int s, error = 0; 1464 1.1 drochner 1465 1.1 drochner s = splnet(); 1466 1.1 drochner 1467 1.1 drochner switch (cmd) { 1468 1.1 drochner case SIOCSIFFLAGS: 1469 1.31 dyoung if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1470 1.31 dyoung break; 1471 1.31 dyoung /* XXX re-use ether_ioctl() */ 1472 1.31 dyoung switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1473 1.31 dyoung case IFF_UP|IFF_RUNNING: 1474 1.31 dyoung ural_update_promisc(sc); 1475 1.31 dyoung break; 1476 1.31 dyoung case IFF_UP: 1477 1.31 dyoung ural_init(ifp); 1478 1.31 dyoung break; 1479 1.31 dyoung case IFF_RUNNING: 1480 1.31 dyoung ural_stop(ifp, 1); 1481 1.31 dyoung break; 1482 1.31 dyoung case 0: 1483 1.31 dyoung break; 1484 1.1 drochner } 1485 1.1 drochner break; 1486 1.2 drochner 1487 1.37 jmcneill case SIOCADDMULTI: 1488 1.37 jmcneill case SIOCDELMULTI: 1489 1.37 jmcneill if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1490 1.37 jmcneill error = 0; 1491 1.37 jmcneill } 1492 1.37 jmcneill break; 1493 1.37 jmcneill 1494 1.1 drochner default: 1495 1.1 drochner error = ieee80211_ioctl(ic, cmd, data); 1496 1.1 drochner } 1497 1.1 drochner 1498 1.1 drochner if (error == ENETRESET) { 1499 1.37 jmcneill if (IS_RUNNING(ifp) && 1500 1.37 jmcneill (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1501 1.1 drochner ural_init(ifp); 1502 1.1 drochner error = 0; 1503 1.1 drochner } 1504 1.1 drochner 1505 1.1 drochner splx(s); 1506 1.1 drochner 1507 1.1 drochner return error; 1508 1.37 jmcneill #undef IS_RUNNING 1509 1.1 drochner } 1510 1.1 drochner 1511 1.1 drochner Static void 1512 1.12 perry ural_set_testmode(struct ural_softc *sc) 1513 1.12 perry { 1514 1.12 perry usb_device_request_t req; 1515 1.12 perry usbd_status error; 1516 1.12 perry 1517 1.12 perry req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1518 1.12 perry req.bRequest = RAL_VENDOR_REQUEST; 1519 1.12 perry USETW(req.wValue, 4); 1520 1.12 perry USETW(req.wIndex, 1); 1521 1.12 perry USETW(req.wLength, 0); 1522 1.12 perry 1523 1.12 perry error = usbd_do_request(sc->sc_udev, &req, NULL); 1524 1.12 perry if (error != 0) { 1525 1.12 perry printf("%s: could not set test mode: %s\n", 1526 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error)); 1527 1.12 perry } 1528 1.12 perry } 1529 1.12 perry 1530 1.12 perry Static void 1531 1.1 drochner ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1532 1.1 drochner { 1533 1.1 drochner usb_device_request_t req; 1534 1.1 drochner usbd_status error; 1535 1.1 drochner 1536 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE; 1537 1.1 drochner req.bRequest = RAL_READ_EEPROM; 1538 1.1 drochner USETW(req.wValue, 0); 1539 1.1 drochner USETW(req.wIndex, addr); 1540 1.1 drochner USETW(req.wLength, len); 1541 1.1 drochner 1542 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf); 1543 1.1 drochner if (error != 0) { 1544 1.1 drochner printf("%s: could not read EEPROM: %s\n", 1545 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error)); 1546 1.1 drochner } 1547 1.1 drochner } 1548 1.1 drochner 1549 1.1 drochner Static uint16_t 1550 1.1 drochner ural_read(struct ural_softc *sc, uint16_t reg) 1551 1.1 drochner { 1552 1.1 drochner usb_device_request_t req; 1553 1.1 drochner usbd_status error; 1554 1.1 drochner uint16_t val; 1555 1.1 drochner 1556 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE; 1557 1.1 drochner req.bRequest = RAL_READ_MAC; 1558 1.1 drochner USETW(req.wValue, 0); 1559 1.1 drochner USETW(req.wIndex, reg); 1560 1.46 skrll USETW(req.wLength, sizeof(uint16_t)); 1561 1.1 drochner 1562 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, &val); 1563 1.1 drochner if (error != 0) { 1564 1.1 drochner printf("%s: could not read MAC register: %s\n", 1565 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error)); 1566 1.1 drochner return 0; 1567 1.1 drochner } 1568 1.1 drochner 1569 1.1 drochner return le16toh(val); 1570 1.1 drochner } 1571 1.1 drochner 1572 1.1 drochner Static void 1573 1.1 drochner ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1574 1.1 drochner { 1575 1.1 drochner usb_device_request_t req; 1576 1.1 drochner usbd_status error; 1577 1.1 drochner 1578 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE; 1579 1.1 drochner req.bRequest = RAL_READ_MULTI_MAC; 1580 1.1 drochner USETW(req.wValue, 0); 1581 1.1 drochner USETW(req.wIndex, reg); 1582 1.1 drochner USETW(req.wLength, len); 1583 1.1 drochner 1584 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf); 1585 1.1 drochner if (error != 0) { 1586 1.1 drochner printf("%s: could not read MAC register: %s\n", 1587 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error)); 1588 1.1 drochner } 1589 1.1 drochner } 1590 1.1 drochner 1591 1.1 drochner Static void 1592 1.1 drochner ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1593 1.1 drochner { 1594 1.1 drochner usb_device_request_t req; 1595 1.1 drochner usbd_status error; 1596 1.1 drochner 1597 1.1 drochner req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1598 1.1 drochner req.bRequest = RAL_WRITE_MAC; 1599 1.1 drochner USETW(req.wValue, val); 1600 1.1 drochner USETW(req.wIndex, reg); 1601 1.1 drochner USETW(req.wLength, 0); 1602 1.1 drochner 1603 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, NULL); 1604 1.1 drochner if (error != 0) { 1605 1.1 drochner printf("%s: could not write MAC register: %s\n", 1606 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error)); 1607 1.1 drochner } 1608 1.1 drochner } 1609 1.1 drochner 1610 1.1 drochner Static void 1611 1.1 drochner ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1612 1.1 drochner { 1613 1.1 drochner usb_device_request_t req; 1614 1.1 drochner usbd_status error; 1615 1.1 drochner 1616 1.1 drochner req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1617 1.1 drochner req.bRequest = RAL_WRITE_MULTI_MAC; 1618 1.1 drochner USETW(req.wValue, 0); 1619 1.1 drochner USETW(req.wIndex, reg); 1620 1.1 drochner USETW(req.wLength, len); 1621 1.1 drochner 1622 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf); 1623 1.1 drochner if (error != 0) { 1624 1.1 drochner printf("%s: could not write MAC register: %s\n", 1625 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error)); 1626 1.1 drochner } 1627 1.1 drochner } 1628 1.1 drochner 1629 1.1 drochner Static void 1630 1.1 drochner ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1631 1.1 drochner { 1632 1.1 drochner uint16_t tmp; 1633 1.1 drochner int ntries; 1634 1.1 drochner 1635 1.1 drochner for (ntries = 0; ntries < 5; ntries++) { 1636 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1637 1.1 drochner break; 1638 1.1 drochner } 1639 1.1 drochner if (ntries == 5) { 1640 1.36 dyoung printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1641 1.1 drochner return; 1642 1.1 drochner } 1643 1.1 drochner 1644 1.1 drochner tmp = reg << 8 | val; 1645 1.1 drochner ural_write(sc, RAL_PHY_CSR7, tmp); 1646 1.1 drochner } 1647 1.1 drochner 1648 1.1 drochner Static uint8_t 1649 1.1 drochner ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1650 1.1 drochner { 1651 1.1 drochner uint16_t val; 1652 1.1 drochner int ntries; 1653 1.1 drochner 1654 1.1 drochner val = RAL_BBP_WRITE | reg << 8; 1655 1.1 drochner ural_write(sc, RAL_PHY_CSR7, val); 1656 1.1 drochner 1657 1.1 drochner for (ntries = 0; ntries < 5; ntries++) { 1658 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1659 1.1 drochner break; 1660 1.1 drochner } 1661 1.1 drochner if (ntries == 5) { 1662 1.36 dyoung printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1663 1.1 drochner return 0; 1664 1.1 drochner } 1665 1.1 drochner 1666 1.1 drochner return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1667 1.1 drochner } 1668 1.1 drochner 1669 1.1 drochner Static void 1670 1.1 drochner ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1671 1.1 drochner { 1672 1.1 drochner uint32_t tmp; 1673 1.1 drochner int ntries; 1674 1.1 drochner 1675 1.1 drochner for (ntries = 0; ntries < 5; ntries++) { 1676 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1677 1.1 drochner break; 1678 1.1 drochner } 1679 1.1 drochner if (ntries == 5) { 1680 1.36 dyoung printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1681 1.1 drochner return; 1682 1.1 drochner } 1683 1.1 drochner 1684 1.1 drochner tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1685 1.1 drochner ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1686 1.1 drochner ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1687 1.1 drochner 1688 1.1 drochner /* remember last written value in sc */ 1689 1.1 drochner sc->rf_regs[reg] = val; 1690 1.1 drochner 1691 1.64 christos DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1692 1.1 drochner } 1693 1.1 drochner 1694 1.1 drochner Static void 1695 1.1 drochner ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1696 1.1 drochner { 1697 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 1698 1.1 drochner uint8_t power, tmp; 1699 1.1 drochner u_int i, chan; 1700 1.1 drochner 1701 1.1 drochner chan = ieee80211_chan2ieee(ic, c); 1702 1.1 drochner if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1703 1.1 drochner return; 1704 1.1 drochner 1705 1.1 drochner if (IEEE80211_IS_CHAN_2GHZ(c)) 1706 1.58 riastrad power = uimin(sc->txpow[chan - 1], 31); 1707 1.1 drochner else 1708 1.1 drochner power = 31; 1709 1.1 drochner 1710 1.12 perry /* adjust txpower using ifconfig settings */ 1711 1.12 perry power -= (100 - ic->ic_txpowlimit) / 8; 1712 1.12 perry 1713 1.1 drochner DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1714 1.1 drochner 1715 1.1 drochner switch (sc->rf_rev) { 1716 1.1 drochner case RAL_RF_2522: 1717 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x00814); 1718 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1719 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1720 1.1 drochner break; 1721 1.1 drochner 1722 1.1 drochner case RAL_RF_2523: 1723 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08804); 1724 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1725 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1726 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1727 1.1 drochner break; 1728 1.1 drochner 1729 1.1 drochner case RAL_RF_2524: 1730 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x0c808); 1731 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1732 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1733 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1734 1.1 drochner break; 1735 1.1 drochner 1736 1.1 drochner case RAL_RF_2525: 1737 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808); 1738 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1739 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1740 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1741 1.1 drochner 1742 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808); 1743 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1744 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1745 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1746 1.1 drochner break; 1747 1.1 drochner 1748 1.1 drochner case RAL_RF_2525E: 1749 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808); 1750 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1751 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1752 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1753 1.1 drochner break; 1754 1.1 drochner 1755 1.1 drochner case RAL_RF_2526: 1756 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1757 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1758 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08804); 1759 1.1 drochner 1760 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1761 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1762 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1763 1.1 drochner break; 1764 1.1 drochner 1765 1.1 drochner /* dual-band RF */ 1766 1.1 drochner case RAL_RF_5222: 1767 1.12 perry for (i = 0; ural_rf5222[i].chan != chan; i++); 1768 1.1 drochner 1769 1.12 perry ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1770 1.12 perry ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1771 1.12 perry ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1772 1.12 perry ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1773 1.1 drochner break; 1774 1.1 drochner } 1775 1.1 drochner 1776 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR && 1777 1.1 drochner ic->ic_state != IEEE80211_S_SCAN) { 1778 1.1 drochner /* set Japan filter bit for channel 14 */ 1779 1.1 drochner tmp = ural_bbp_read(sc, 70); 1780 1.1 drochner 1781 1.1 drochner tmp &= ~RAL_JAPAN_FILTER; 1782 1.1 drochner if (chan == 14) 1783 1.1 drochner tmp |= RAL_JAPAN_FILTER; 1784 1.1 drochner 1785 1.1 drochner ural_bbp_write(sc, 70, tmp); 1786 1.1 drochner 1787 1.1 drochner /* clear CRC errors */ 1788 1.1 drochner ural_read(sc, RAL_STA_CSR0); 1789 1.1 drochner 1790 1.12 perry DELAY(10000); 1791 1.1 drochner ural_disable_rf_tune(sc); 1792 1.1 drochner } 1793 1.1 drochner } 1794 1.1 drochner 1795 1.1 drochner /* 1796 1.1 drochner * Disable RF auto-tuning. 1797 1.1 drochner */ 1798 1.1 drochner Static void 1799 1.1 drochner ural_disable_rf_tune(struct ural_softc *sc) 1800 1.1 drochner { 1801 1.1 drochner uint32_t tmp; 1802 1.1 drochner 1803 1.1 drochner if (sc->rf_rev != RAL_RF_2523) { 1804 1.1 drochner tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1805 1.1 drochner ural_rf_write(sc, RAL_RF1, tmp); 1806 1.1 drochner } 1807 1.1 drochner 1808 1.1 drochner tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1809 1.1 drochner ural_rf_write(sc, RAL_RF3, tmp); 1810 1.1 drochner 1811 1.1 drochner DPRINTFN(2, ("disabling RF autotune\n")); 1812 1.1 drochner } 1813 1.1 drochner 1814 1.1 drochner /* 1815 1.1 drochner * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1816 1.1 drochner * synchronization. 1817 1.1 drochner */ 1818 1.1 drochner Static void 1819 1.1 drochner ural_enable_tsf_sync(struct ural_softc *sc) 1820 1.1 drochner { 1821 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 1822 1.1 drochner uint16_t logcwmin, preload, tmp; 1823 1.1 drochner 1824 1.1 drochner /* first, disable TSF synchronization */ 1825 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, 0); 1826 1.1 drochner 1827 1.1 drochner tmp = (16 * ic->ic_bss->ni_intval) << 4; 1828 1.1 drochner ural_write(sc, RAL_TXRX_CSR18, tmp); 1829 1.1 drochner 1830 1.1 drochner logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1831 1.1 drochner preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1832 1.1 drochner tmp = logcwmin << 12 | preload; 1833 1.1 drochner ural_write(sc, RAL_TXRX_CSR20, tmp); 1834 1.1 drochner 1835 1.1 drochner /* finally, enable TSF synchronization */ 1836 1.1 drochner tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1837 1.1 drochner if (ic->ic_opmode == IEEE80211_M_STA) 1838 1.1 drochner tmp |= RAL_ENABLE_TSF_SYNC(1); 1839 1.1 drochner else 1840 1.1 drochner tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1841 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, tmp); 1842 1.1 drochner 1843 1.1 drochner DPRINTF(("enabling TSF synchronization\n")); 1844 1.1 drochner } 1845 1.1 drochner 1846 1.1 drochner Static void 1847 1.12 perry ural_update_slot(struct ifnet *ifp) 1848 1.12 perry { 1849 1.12 perry struct ural_softc *sc = ifp->if_softc; 1850 1.12 perry struct ieee80211com *ic = &sc->sc_ic; 1851 1.12 perry uint16_t slottime, sifs, eifs; 1852 1.12 perry 1853 1.12 perry slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1854 1.12 perry 1855 1.12 perry /* 1856 1.12 perry * These settings may sound a bit inconsistent but this is what the 1857 1.12 perry * reference driver does. 1858 1.12 perry */ 1859 1.12 perry if (ic->ic_curmode == IEEE80211_MODE_11B) { 1860 1.12 perry sifs = 16 - RAL_RXTX_TURNAROUND; 1861 1.12 perry eifs = 364; 1862 1.12 perry } else { 1863 1.12 perry sifs = 10 - RAL_RXTX_TURNAROUND; 1864 1.12 perry eifs = 64; 1865 1.12 perry } 1866 1.12 perry 1867 1.12 perry ural_write(sc, RAL_MAC_CSR10, slottime); 1868 1.12 perry ural_write(sc, RAL_MAC_CSR11, sifs); 1869 1.12 perry ural_write(sc, RAL_MAC_CSR12, eifs); 1870 1.12 perry } 1871 1.12 perry 1872 1.12 perry Static void 1873 1.12 perry ural_set_txpreamble(struct ural_softc *sc) 1874 1.12 perry { 1875 1.12 perry uint16_t tmp; 1876 1.12 perry 1877 1.12 perry tmp = ural_read(sc, RAL_TXRX_CSR10); 1878 1.12 perry 1879 1.12 perry tmp &= ~RAL_SHORT_PREAMBLE; 1880 1.12 perry if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1881 1.12 perry tmp |= RAL_SHORT_PREAMBLE; 1882 1.12 perry 1883 1.12 perry ural_write(sc, RAL_TXRX_CSR10, tmp); 1884 1.12 perry } 1885 1.12 perry 1886 1.12 perry Static void 1887 1.12 perry ural_set_basicrates(struct ural_softc *sc) 1888 1.12 perry { 1889 1.12 perry struct ieee80211com *ic = &sc->sc_ic; 1890 1.12 perry 1891 1.12 perry /* update basic rate set */ 1892 1.12 perry if (ic->ic_curmode == IEEE80211_MODE_11B) { 1893 1.12 perry /* 11b basic rates: 1, 2Mbps */ 1894 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x3); 1895 1.12 perry } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1896 1.12 perry /* 11a basic rates: 6, 12, 24Mbps */ 1897 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x150); 1898 1.12 perry } else { 1899 1.12 perry /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1900 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1901 1.12 perry } 1902 1.12 perry } 1903 1.12 perry 1904 1.12 perry Static void 1905 1.1 drochner ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1906 1.1 drochner { 1907 1.1 drochner uint16_t tmp; 1908 1.1 drochner 1909 1.1 drochner tmp = bssid[0] | bssid[1] << 8; 1910 1.1 drochner ural_write(sc, RAL_MAC_CSR5, tmp); 1911 1.1 drochner 1912 1.1 drochner tmp = bssid[2] | bssid[3] << 8; 1913 1.1 drochner ural_write(sc, RAL_MAC_CSR6, tmp); 1914 1.1 drochner 1915 1.1 drochner tmp = bssid[4] | bssid[5] << 8; 1916 1.1 drochner ural_write(sc, RAL_MAC_CSR7, tmp); 1917 1.1 drochner 1918 1.1 drochner DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1919 1.1 drochner } 1920 1.1 drochner 1921 1.1 drochner Static void 1922 1.1 drochner ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1923 1.1 drochner { 1924 1.1 drochner uint16_t tmp; 1925 1.1 drochner 1926 1.1 drochner tmp = addr[0] | addr[1] << 8; 1927 1.1 drochner ural_write(sc, RAL_MAC_CSR2, tmp); 1928 1.1 drochner 1929 1.1 drochner tmp = addr[2] | addr[3] << 8; 1930 1.1 drochner ural_write(sc, RAL_MAC_CSR3, tmp); 1931 1.1 drochner 1932 1.1 drochner tmp = addr[4] | addr[5] << 8; 1933 1.1 drochner ural_write(sc, RAL_MAC_CSR4, tmp); 1934 1.1 drochner 1935 1.2 drochner DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1936 1.1 drochner } 1937 1.1 drochner 1938 1.1 drochner Static void 1939 1.1 drochner ural_update_promisc(struct ural_softc *sc) 1940 1.1 drochner { 1941 1.12 perry struct ifnet *ifp = sc->sc_ic.ic_ifp; 1942 1.12 perry uint32_t tmp; 1943 1.1 drochner 1944 1.1 drochner tmp = ural_read(sc, RAL_TXRX_CSR2); 1945 1.1 drochner 1946 1.1 drochner tmp &= ~RAL_DROP_NOT_TO_ME; 1947 1.1 drochner if (!(ifp->if_flags & IFF_PROMISC)) 1948 1.1 drochner tmp |= RAL_DROP_NOT_TO_ME; 1949 1.1 drochner 1950 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, tmp); 1951 1.1 drochner 1952 1.1 drochner DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1953 1.1 drochner "entering" : "leaving")); 1954 1.1 drochner } 1955 1.1 drochner 1956 1.1 drochner Static const char * 1957 1.1 drochner ural_get_rf(int rev) 1958 1.1 drochner { 1959 1.1 drochner switch (rev) { 1960 1.1 drochner case RAL_RF_2522: return "RT2522"; 1961 1.1 drochner case RAL_RF_2523: return "RT2523"; 1962 1.1 drochner case RAL_RF_2524: return "RT2524"; 1963 1.1 drochner case RAL_RF_2525: return "RT2525"; 1964 1.1 drochner case RAL_RF_2525E: return "RT2525e"; 1965 1.1 drochner case RAL_RF_2526: return "RT2526"; 1966 1.1 drochner case RAL_RF_5222: return "RT5222"; 1967 1.1 drochner default: return "unknown"; 1968 1.1 drochner } 1969 1.1 drochner } 1970 1.1 drochner 1971 1.1 drochner Static void 1972 1.1 drochner ural_read_eeprom(struct ural_softc *sc) 1973 1.1 drochner { 1974 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 1975 1.1 drochner uint16_t val; 1976 1.1 drochner 1977 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1978 1.1 drochner val = le16toh(val); 1979 1.1 drochner sc->rf_rev = (val >> 11) & 0x7; 1980 1.1 drochner sc->hw_radio = (val >> 10) & 0x1; 1981 1.1 drochner sc->led_mode = (val >> 6) & 0x7; 1982 1.1 drochner sc->rx_ant = (val >> 4) & 0x3; 1983 1.1 drochner sc->tx_ant = (val >> 2) & 0x3; 1984 1.1 drochner sc->nb_ant = val & 0x3; 1985 1.1 drochner 1986 1.1 drochner /* read MAC address */ 1987 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1988 1.1 drochner 1989 1.1 drochner /* read default values for BBP registers */ 1990 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1991 1.1 drochner 1992 1.1 drochner /* read Tx power for all b/g channels */ 1993 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1994 1.1 drochner } 1995 1.1 drochner 1996 1.1 drochner Static int 1997 1.1 drochner ural_bbp_init(struct ural_softc *sc) 1998 1.1 drochner { 1999 1.1 drochner int i, ntries; 2000 1.1 drochner 2001 1.1 drochner /* wait for BBP to be ready */ 2002 1.1 drochner for (ntries = 0; ntries < 100; ntries++) { 2003 1.1 drochner if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2004 1.1 drochner break; 2005 1.1 drochner DELAY(1000); 2006 1.1 drochner } 2007 1.1 drochner if (ntries == 100) { 2008 1.36 dyoung printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2009 1.1 drochner return EIO; 2010 1.1 drochner } 2011 1.1 drochner 2012 1.1 drochner /* initialize BBP registers to default values */ 2013 1.46 skrll for (i = 0; i < __arraycount(ural_def_bbp); i++) 2014 1.1 drochner ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2015 1.1 drochner 2016 1.1 drochner #if 0 2017 1.1 drochner /* initialize BBP registers to values stored in EEPROM */ 2018 1.1 drochner for (i = 0; i < 16; i++) { 2019 1.1 drochner if (sc->bbp_prom[i].reg == 0xff) 2020 1.1 drochner continue; 2021 1.1 drochner ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2022 1.1 drochner } 2023 1.1 drochner #endif 2024 1.1 drochner 2025 1.1 drochner return 0; 2026 1.1 drochner } 2027 1.1 drochner 2028 1.1 drochner Static void 2029 1.1 drochner ural_set_txantenna(struct ural_softc *sc, int antenna) 2030 1.1 drochner { 2031 1.1 drochner uint16_t tmp; 2032 1.1 drochner uint8_t tx; 2033 1.1 drochner 2034 1.1 drochner tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2035 1.1 drochner if (antenna == 1) 2036 1.1 drochner tx |= RAL_BBP_ANTA; 2037 1.1 drochner else if (antenna == 2) 2038 1.1 drochner tx |= RAL_BBP_ANTB; 2039 1.1 drochner else 2040 1.1 drochner tx |= RAL_BBP_DIVERSITY; 2041 1.1 drochner 2042 1.1 drochner /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2043 1.1 drochner if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2044 1.1 drochner sc->rf_rev == RAL_RF_5222) 2045 1.1 drochner tx |= RAL_BBP_FLIPIQ; 2046 1.1 drochner 2047 1.1 drochner ural_bbp_write(sc, RAL_BBP_TX, tx); 2048 1.1 drochner 2049 1.12 perry /* update values in PHY_CSR5 and PHY_CSR6 */ 2050 1.1 drochner tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2051 1.1 drochner ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2052 1.1 drochner 2053 1.1 drochner tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2054 1.1 drochner ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2055 1.1 drochner } 2056 1.1 drochner 2057 1.1 drochner Static void 2058 1.1 drochner ural_set_rxantenna(struct ural_softc *sc, int antenna) 2059 1.1 drochner { 2060 1.1 drochner uint8_t rx; 2061 1.1 drochner 2062 1.1 drochner rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2063 1.1 drochner if (antenna == 1) 2064 1.1 drochner rx |= RAL_BBP_ANTA; 2065 1.1 drochner else if (antenna == 2) 2066 1.1 drochner rx |= RAL_BBP_ANTB; 2067 1.1 drochner else 2068 1.1 drochner rx |= RAL_BBP_DIVERSITY; 2069 1.1 drochner 2070 1.1 drochner /* need to force no I/Q flip for RF 2525e and 2526 */ 2071 1.1 drochner if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2072 1.1 drochner rx &= ~RAL_BBP_FLIPIQ; 2073 1.1 drochner 2074 1.1 drochner ural_bbp_write(sc, RAL_BBP_RX, rx); 2075 1.1 drochner } 2076 1.1 drochner 2077 1.1 drochner Static int 2078 1.1 drochner ural_init(struct ifnet *ifp) 2079 1.1 drochner { 2080 1.1 drochner struct ural_softc *sc = ifp->if_softc; 2081 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 2082 1.1 drochner struct ieee80211_key *wk; 2083 1.12 perry uint16_t tmp; 2084 1.1 drochner usbd_status error; 2085 1.1 drochner int i, ntries; 2086 1.1 drochner 2087 1.12 perry ural_set_testmode(sc); 2088 1.12 perry ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2089 1.12 perry 2090 1.1 drochner ural_stop(ifp, 0); 2091 1.1 drochner 2092 1.1 drochner /* initialize MAC registers to default values */ 2093 1.46 skrll for (i = 0; i < __arraycount(ural_def_mac); i++) 2094 1.1 drochner ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2095 1.1 drochner 2096 1.1 drochner /* wait for BBP and RF to wake up (this can take a long time!) */ 2097 1.1 drochner for (ntries = 0; ntries < 100; ntries++) { 2098 1.1 drochner tmp = ural_read(sc, RAL_MAC_CSR17); 2099 1.1 drochner if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2100 1.1 drochner (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2101 1.1 drochner break; 2102 1.1 drochner DELAY(1000); 2103 1.1 drochner } 2104 1.1 drochner if (ntries == 100) { 2105 1.1 drochner printf("%s: timeout waiting for BBP/RF to wakeup\n", 2106 1.36 dyoung device_xname(sc->sc_dev)); 2107 1.1 drochner error = EIO; 2108 1.1 drochner goto fail; 2109 1.1 drochner } 2110 1.1 drochner 2111 1.1 drochner /* we're ready! */ 2112 1.1 drochner ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2113 1.1 drochner 2114 1.12 perry /* set basic rate set (will be updated later) */ 2115 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2116 1.1 drochner 2117 1.1 drochner error = ural_bbp_init(sc); 2118 1.1 drochner if (error != 0) 2119 1.1 drochner goto fail; 2120 1.1 drochner 2121 1.1 drochner /* set default BSS channel */ 2122 1.9 skrll ural_set_chan(sc, ic->ic_curchan); 2123 1.1 drochner 2124 1.1 drochner /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2125 1.46 skrll ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2126 1.1 drochner 2127 1.12 perry ural_set_txantenna(sc, sc->tx_ant); 2128 1.12 perry ural_set_rxantenna(sc, sc->rx_ant); 2129 1.1 drochner 2130 1.24 dyoung IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2131 1.1 drochner ural_set_macaddr(sc, ic->ic_myaddr); 2132 1.1 drochner 2133 1.1 drochner /* 2134 1.1 drochner * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2135 1.1 drochner */ 2136 1.1 drochner for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2137 1.12 perry wk = &ic->ic_crypto.cs_nw_keys[i]; 2138 1.4 drochner ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2139 1.4 drochner RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2140 1.1 drochner } 2141 1.1 drochner 2142 1.1 drochner /* 2143 1.12 perry * Allocate xfer for AMRR statistics requests. 2144 1.12 perry */ 2145 1.46 skrll struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2146 1.46 skrll error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2147 1.46 skrll if (error) { 2148 1.12 perry printf("%s: could not allocate AMRR xfer\n", 2149 1.36 dyoung device_xname(sc->sc_dev)); 2150 1.12 perry goto fail; 2151 1.12 perry } 2152 1.12 perry 2153 1.12 perry /* 2154 1.1 drochner * Open Tx and Rx USB bulk pipes. 2155 1.1 drochner */ 2156 1.1 drochner error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2157 1.1 drochner &sc->sc_tx_pipeh); 2158 1.1 drochner if (error != 0) { 2159 1.1 drochner printf("%s: could not open Tx pipe: %s\n", 2160 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error)); 2161 1.1 drochner goto fail; 2162 1.1 drochner } 2163 1.1 drochner 2164 1.1 drochner error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2165 1.1 drochner &sc->sc_rx_pipeh); 2166 1.1 drochner if (error != 0) { 2167 1.1 drochner printf("%s: could not open Rx pipe: %s\n", 2168 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error)); 2169 1.1 drochner goto fail; 2170 1.1 drochner } 2171 1.1 drochner 2172 1.1 drochner /* 2173 1.1 drochner * Allocate Tx and Rx xfer queues. 2174 1.1 drochner */ 2175 1.1 drochner error = ural_alloc_tx_list(sc); 2176 1.1 drochner if (error != 0) { 2177 1.1 drochner printf("%s: could not allocate Tx list\n", 2178 1.36 dyoung device_xname(sc->sc_dev)); 2179 1.1 drochner goto fail; 2180 1.1 drochner } 2181 1.1 drochner 2182 1.1 drochner error = ural_alloc_rx_list(sc); 2183 1.1 drochner if (error != 0) { 2184 1.1 drochner printf("%s: could not allocate Rx list\n", 2185 1.36 dyoung device_xname(sc->sc_dev)); 2186 1.1 drochner goto fail; 2187 1.1 drochner } 2188 1.1 drochner 2189 1.1 drochner /* 2190 1.1 drochner * Start up the receive pipe. 2191 1.1 drochner */ 2192 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2193 1.46 skrll struct ural_rx_data *data = &sc->rx_data[i]; 2194 1.1 drochner 2195 1.46 skrll usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2196 1.46 skrll USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2197 1.1 drochner usbd_transfer(data->xfer); 2198 1.1 drochner } 2199 1.1 drochner 2200 1.1 drochner /* kick Rx */ 2201 1.1 drochner tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2202 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2203 1.1 drochner tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2204 1.1 drochner if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2205 1.1 drochner tmp |= RAL_DROP_TODS; 2206 1.1 drochner if (!(ifp->if_flags & IFF_PROMISC)) 2207 1.1 drochner tmp |= RAL_DROP_NOT_TO_ME; 2208 1.1 drochner } 2209 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, tmp); 2210 1.1 drochner 2211 1.1 drochner ifp->if_flags &= ~IFF_OACTIVE; 2212 1.1 drochner ifp->if_flags |= IFF_RUNNING; 2213 1.1 drochner 2214 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2215 1.12 perry if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2216 1.12 perry ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2217 1.12 perry } else 2218 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2219 1.1 drochner 2220 1.1 drochner return 0; 2221 1.1 drochner 2222 1.1 drochner fail: ural_stop(ifp, 1); 2223 1.1 drochner return error; 2224 1.1 drochner } 2225 1.1 drochner 2226 1.1 drochner Static void 2227 1.18 christos ural_stop(struct ifnet *ifp, int disable) 2228 1.1 drochner { 2229 1.1 drochner struct ural_softc *sc = ifp->if_softc; 2230 1.1 drochner struct ieee80211com *ic = &sc->sc_ic; 2231 1.1 drochner 2232 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2233 1.1 drochner 2234 1.4 drochner sc->sc_tx_timer = 0; 2235 1.4 drochner ifp->if_timer = 0; 2236 1.4 drochner ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2237 1.4 drochner 2238 1.1 drochner /* disable Rx */ 2239 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2240 1.1 drochner 2241 1.1 drochner /* reset ASIC and BBP (but won't reset MAC registers!) */ 2242 1.1 drochner ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2243 1.1 drochner ural_write(sc, RAL_MAC_CSR1, 0); 2244 1.1 drochner 2245 1.12 perry if (sc->amrr_xfer != NULL) { 2246 1.46 skrll usbd_destroy_xfer(sc->amrr_xfer); 2247 1.12 perry sc->amrr_xfer = NULL; 2248 1.12 perry } 2249 1.12 perry 2250 1.1 drochner if (sc->sc_rx_pipeh != NULL) { 2251 1.1 drochner usbd_abort_pipe(sc->sc_rx_pipeh); 2252 1.46 skrll } 2253 1.46 skrll 2254 1.46 skrll if (sc->sc_tx_pipeh != NULL) { 2255 1.46 skrll usbd_abort_pipe(sc->sc_tx_pipeh); 2256 1.46 skrll } 2257 1.46 skrll 2258 1.46 skrll ural_free_rx_list(sc); 2259 1.46 skrll ural_free_tx_list(sc); 2260 1.46 skrll 2261 1.46 skrll if (sc->sc_rx_pipeh != NULL) { 2262 1.1 drochner usbd_close_pipe(sc->sc_rx_pipeh); 2263 1.1 drochner sc->sc_rx_pipeh = NULL; 2264 1.1 drochner } 2265 1.1 drochner 2266 1.1 drochner if (sc->sc_tx_pipeh != NULL) { 2267 1.1 drochner usbd_close_pipe(sc->sc_tx_pipeh); 2268 1.1 drochner sc->sc_tx_pipeh = NULL; 2269 1.1 drochner } 2270 1.1 drochner } 2271 1.1 drochner 2272 1.61 maxv static int 2273 1.36 dyoung ural_activate(device_t self, enum devact act) 2274 1.1 drochner { 2275 1.30 cube struct ural_softc *sc = device_private(self); 2276 1.2 drochner 2277 1.1 drochner switch (act) { 2278 1.1 drochner case DVACT_DEACTIVATE: 2279 1.2 drochner if_deactivate(&sc->sc_if); 2280 1.33 dyoung return 0; 2281 1.33 dyoung default: 2282 1.33 dyoung return EOPNOTSUPP; 2283 1.1 drochner } 2284 1.1 drochner } 2285 1.12 perry 2286 1.12 perry Static void 2287 1.12 perry ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2288 1.12 perry { 2289 1.12 perry int i; 2290 1.12 perry 2291 1.12 perry /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2292 1.46 skrll ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2293 1.12 perry 2294 1.17 joerg ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2295 1.12 perry 2296 1.12 perry /* set rate to some reasonable initial value */ 2297 1.12 perry for (i = ni->ni_rates.rs_nrates - 1; 2298 1.12 perry i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2299 1.12 perry i--); 2300 1.12 perry ni->ni_txrate = i; 2301 1.12 perry 2302 1.36 dyoung callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2303 1.12 perry } 2304 1.12 perry 2305 1.12 perry Static void 2306 1.12 perry ural_amrr_timeout(void *arg) 2307 1.12 perry { 2308 1.12 perry struct ural_softc *sc = (struct ural_softc *)arg; 2309 1.12 perry usb_device_request_t req; 2310 1.12 perry int s; 2311 1.12 perry 2312 1.12 perry s = splusb(); 2313 1.12 perry 2314 1.12 perry /* 2315 1.12 perry * Asynchronously read statistic registers (cleared by read). 2316 1.12 perry */ 2317 1.12 perry req.bmRequestType = UT_READ_VENDOR_DEVICE; 2318 1.12 perry req.bRequest = RAL_READ_MULTI_MAC; 2319 1.12 perry USETW(req.wValue, 0); 2320 1.12 perry USETW(req.wIndex, RAL_STA_CSR0); 2321 1.46 skrll USETW(req.wLength, sizeof(sc->sta)); 2322 1.12 perry 2323 1.12 perry usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2324 1.46 skrll USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2325 1.12 perry ural_amrr_update); 2326 1.12 perry (void)usbd_transfer(sc->amrr_xfer); 2327 1.12 perry 2328 1.12 perry splx(s); 2329 1.12 perry } 2330 1.12 perry 2331 1.12 perry Static void 2332 1.46 skrll ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2333 1.12 perry usbd_status status) 2334 1.12 perry { 2335 1.12 perry struct ural_softc *sc = (struct ural_softc *)priv; 2336 1.12 perry struct ifnet *ifp = sc->sc_ic.ic_ifp; 2337 1.12 perry 2338 1.12 perry if (status != USBD_NORMAL_COMPLETION) { 2339 1.12 perry printf("%s: could not retrieve Tx statistics - " 2340 1.12 perry "cancelling automatic rate control\n", 2341 1.36 dyoung device_xname(sc->sc_dev)); 2342 1.12 perry return; 2343 1.12 perry } 2344 1.12 perry 2345 1.12 perry /* count TX retry-fail as Tx errors */ 2346 1.62 thorpej if_statadd(ifp, if_oerrors, sc->sta[9]); 2347 1.12 perry 2348 1.17 joerg sc->amn.amn_retrycnt = 2349 1.12 perry sc->sta[7] + /* TX one-retry ok count */ 2350 1.12 perry sc->sta[8] + /* TX more-retry ok count */ 2351 1.12 perry sc->sta[9]; /* TX retry-fail count */ 2352 1.12 perry 2353 1.17 joerg sc->amn.amn_txcnt = 2354 1.17 joerg sc->amn.amn_retrycnt + 2355 1.12 perry sc->sta[6]; /* TX no-retry ok count */ 2356 1.12 perry 2357 1.17 joerg ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2358 1.12 perry 2359 1.36 dyoung callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2360 1.12 perry } 2361