if_ural.c revision 1.32 1 1.32 plunky /* $NetBSD: if_ural.c,v 1.32 2009/09/23 19:07:19 plunky Exp $ */
2 1.12 perry /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */
3 1.1 drochner
4 1.1 drochner /*-
5 1.12 perry * Copyright (c) 2005, 2006
6 1.1 drochner * Damien Bergamini <damien.bergamini (at) free.fr>
7 1.1 drochner *
8 1.1 drochner * Permission to use, copy, modify, and distribute this software for any
9 1.1 drochner * purpose with or without fee is hereby granted, provided that the above
10 1.1 drochner * copyright notice and this permission notice appear in all copies.
11 1.1 drochner *
12 1.1 drochner * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 1.1 drochner * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 1.1 drochner * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 1.1 drochner * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 1.1 drochner * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 1.1 drochner * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 1.1 drochner * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 1.1 drochner */
20 1.1 drochner
21 1.1 drochner /*-
22 1.1 drochner * Ralink Technology RT2500USB chipset driver
23 1.1 drochner * http://www.ralinktech.com/
24 1.1 drochner */
25 1.1 drochner
26 1.1 drochner #include <sys/cdefs.h>
27 1.32 plunky __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.32 2009/09/23 19:07:19 plunky Exp $");
28 1.1 drochner
29 1.1 drochner #include "bpfilter.h"
30 1.1 drochner
31 1.1 drochner #include <sys/param.h>
32 1.1 drochner #include <sys/sockio.h>
33 1.1 drochner #include <sys/sysctl.h>
34 1.1 drochner #include <sys/mbuf.h>
35 1.1 drochner #include <sys/kernel.h>
36 1.1 drochner #include <sys/socket.h>
37 1.1 drochner #include <sys/systm.h>
38 1.1 drochner #include <sys/malloc.h>
39 1.1 drochner #include <sys/conf.h>
40 1.1 drochner #include <sys/device.h>
41 1.1 drochner
42 1.25 ad #include <sys/bus.h>
43 1.1 drochner #include <machine/endian.h>
44 1.25 ad #include <sys/intr.h>
45 1.1 drochner
46 1.1 drochner #if NBPFILTER > 0
47 1.1 drochner #include <net/bpf.h>
48 1.1 drochner #endif
49 1.1 drochner #include <net/if.h>
50 1.1 drochner #include <net/if_arp.h>
51 1.1 drochner #include <net/if_dl.h>
52 1.1 drochner #include <net/if_ether.h>
53 1.1 drochner #include <net/if_media.h>
54 1.1 drochner #include <net/if_types.h>
55 1.1 drochner
56 1.1 drochner #include <netinet/in.h>
57 1.1 drochner #include <netinet/in_systm.h>
58 1.1 drochner #include <netinet/in_var.h>
59 1.1 drochner #include <netinet/ip.h>
60 1.1 drochner
61 1.2 drochner #include <net80211/ieee80211_netbsd.h>
62 1.1 drochner #include <net80211/ieee80211_var.h>
63 1.17 joerg #include <net80211/ieee80211_amrr.h>
64 1.1 drochner #include <net80211/ieee80211_radiotap.h>
65 1.1 drochner
66 1.1 drochner #include <dev/usb/usb.h>
67 1.1 drochner #include <dev/usb/usbdi.h>
68 1.1 drochner #include <dev/usb/usbdi_util.h>
69 1.1 drochner #include <dev/usb/usbdevs.h>
70 1.1 drochner
71 1.1 drochner #include <dev/usb/if_uralreg.h>
72 1.1 drochner #include <dev/usb/if_uralvar.h>
73 1.1 drochner
74 1.1 drochner #ifdef USB_DEBUG
75 1.1 drochner #define URAL_DEBUG
76 1.1 drochner #endif
77 1.1 drochner
78 1.1 drochner #ifdef URAL_DEBUG
79 1.1 drochner #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0)
80 1.1 drochner #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0)
81 1.1 drochner int ural_debug = 0;
82 1.1 drochner #else
83 1.1 drochner #define DPRINTF(x)
84 1.1 drochner #define DPRINTFN(n, x)
85 1.1 drochner #endif
86 1.1 drochner
87 1.1 drochner /* various supported device vendors/products */
88 1.1 drochner static const struct usb_devno ural_devs[] = {
89 1.1 drochner { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G },
90 1.1 drochner { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 },
91 1.2 drochner { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
92 1.4 drochner { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G },
93 1.4 drochner { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP },
94 1.21 xtraeme { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS },
95 1.1 drochner { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU },
96 1.1 drochner { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
97 1.4 drochner { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
98 1.4 drochner { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
99 1.1 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
100 1.1 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
101 1.4 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
102 1.21 xtraeme { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI },
103 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 },
104 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 },
105 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 },
106 1.21 xtraeme { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W },
107 1.1 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
108 1.1 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
109 1.4 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
110 1.8 jmcneill { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 },
111 1.1 drochner { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG },
112 1.21 xtraeme { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R },
113 1.4 drochner { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G },
114 1.4 drochner { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
115 1.4 drochner { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 },
116 1.1 drochner };
117 1.1 drochner
118 1.1 drochner Static int ural_alloc_tx_list(struct ural_softc *);
119 1.1 drochner Static void ural_free_tx_list(struct ural_softc *);
120 1.1 drochner Static int ural_alloc_rx_list(struct ural_softc *);
121 1.1 drochner Static void ural_free_rx_list(struct ural_softc *);
122 1.1 drochner Static int ural_media_change(struct ifnet *);
123 1.1 drochner Static void ural_next_scan(void *);
124 1.1 drochner Static void ural_task(void *);
125 1.1 drochner Static int ural_newstate(struct ieee80211com *,
126 1.1 drochner enum ieee80211_state, int);
127 1.12 perry Static int ural_rxrate(struct ural_rx_desc *);
128 1.1 drochner Static void ural_txeof(usbd_xfer_handle, usbd_private_handle,
129 1.1 drochner usbd_status);
130 1.1 drochner Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle,
131 1.1 drochner usbd_status);
132 1.12 perry Static int ural_ack_rate(struct ieee80211com *, int);
133 1.1 drochner Static uint16_t ural_txtime(int, int, uint32_t);
134 1.1 drochner Static uint8_t ural_plcp_signal(int);
135 1.1 drochner Static void ural_setup_tx_desc(struct ural_softc *,
136 1.1 drochner struct ural_tx_desc *, uint32_t, int, int);
137 1.1 drochner Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
138 1.1 drochner struct ieee80211_node *);
139 1.1 drochner Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
140 1.1 drochner struct ieee80211_node *);
141 1.1 drochner Static int ural_tx_data(struct ural_softc *, struct mbuf *,
142 1.1 drochner struct ieee80211_node *);
143 1.1 drochner Static void ural_start(struct ifnet *);
144 1.1 drochner Static void ural_watchdog(struct ifnet *);
145 1.12 perry Static int ural_reset(struct ifnet *);
146 1.19 christos Static int ural_ioctl(struct ifnet *, u_long, void *);
147 1.12 perry Static void ural_set_testmode(struct ural_softc *);
148 1.1 drochner Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
149 1.1 drochner int);
150 1.1 drochner Static uint16_t ural_read(struct ural_softc *, uint16_t);
151 1.1 drochner Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
152 1.1 drochner int);
153 1.1 drochner Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
154 1.1 drochner Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
155 1.1 drochner int);
156 1.1 drochner Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
157 1.1 drochner Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
158 1.1 drochner Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
159 1.1 drochner Static void ural_set_chan(struct ural_softc *,
160 1.1 drochner struct ieee80211_channel *);
161 1.1 drochner Static void ural_disable_rf_tune(struct ural_softc *);
162 1.1 drochner Static void ural_enable_tsf_sync(struct ural_softc *);
163 1.12 perry Static void ural_update_slot(struct ifnet *);
164 1.12 perry Static void ural_set_txpreamble(struct ural_softc *);
165 1.12 perry Static void ural_set_basicrates(struct ural_softc *);
166 1.1 drochner Static void ural_set_bssid(struct ural_softc *, uint8_t *);
167 1.1 drochner Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
168 1.1 drochner Static void ural_update_promisc(struct ural_softc *);
169 1.1 drochner Static const char *ural_get_rf(int);
170 1.1 drochner Static void ural_read_eeprom(struct ural_softc *);
171 1.1 drochner Static int ural_bbp_init(struct ural_softc *);
172 1.1 drochner Static void ural_set_txantenna(struct ural_softc *, int);
173 1.1 drochner Static void ural_set_rxantenna(struct ural_softc *, int);
174 1.1 drochner Static int ural_init(struct ifnet *);
175 1.1 drochner Static void ural_stop(struct ifnet *, int);
176 1.12 perry Static void ural_amrr_start(struct ural_softc *,
177 1.12 perry struct ieee80211_node *);
178 1.12 perry Static void ural_amrr_timeout(void *);
179 1.12 perry Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle,
180 1.12 perry usbd_status status);
181 1.1 drochner
182 1.1 drochner /*
183 1.1 drochner * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
184 1.1 drochner */
185 1.1 drochner static const struct ieee80211_rateset ural_rateset_11a =
186 1.1 drochner { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
187 1.1 drochner
188 1.1 drochner static const struct ieee80211_rateset ural_rateset_11b =
189 1.1 drochner { 4, { 2, 4, 11, 22 } };
190 1.1 drochner
191 1.1 drochner static const struct ieee80211_rateset ural_rateset_11g =
192 1.1 drochner { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
193 1.1 drochner
194 1.1 drochner /*
195 1.1 drochner * Default values for MAC registers; values taken from the reference driver.
196 1.1 drochner */
197 1.1 drochner static const struct {
198 1.1 drochner uint16_t reg;
199 1.1 drochner uint16_t val;
200 1.1 drochner } ural_def_mac[] = {
201 1.1 drochner { RAL_TXRX_CSR5, 0x8c8d },
202 1.1 drochner { RAL_TXRX_CSR6, 0x8b8a },
203 1.1 drochner { RAL_TXRX_CSR7, 0x8687 },
204 1.1 drochner { RAL_TXRX_CSR8, 0x0085 },
205 1.1 drochner { RAL_MAC_CSR13, 0x1111 },
206 1.1 drochner { RAL_MAC_CSR14, 0x1e11 },
207 1.1 drochner { RAL_TXRX_CSR21, 0xe78f },
208 1.1 drochner { RAL_MAC_CSR9, 0xff1d },
209 1.1 drochner { RAL_MAC_CSR11, 0x0002 },
210 1.1 drochner { RAL_MAC_CSR22, 0x0053 },
211 1.1 drochner { RAL_MAC_CSR15, 0x0000 },
212 1.1 drochner { RAL_MAC_CSR8, 0x0780 },
213 1.1 drochner { RAL_TXRX_CSR19, 0x0000 },
214 1.1 drochner { RAL_TXRX_CSR18, 0x005a },
215 1.1 drochner { RAL_PHY_CSR2, 0x0000 },
216 1.1 drochner { RAL_TXRX_CSR0, 0x1ec0 },
217 1.1 drochner { RAL_PHY_CSR4, 0x000f }
218 1.1 drochner };
219 1.1 drochner
220 1.1 drochner /*
221 1.1 drochner * Default values for BBP registers; values taken from the reference driver.
222 1.1 drochner */
223 1.1 drochner static const struct {
224 1.1 drochner uint8_t reg;
225 1.1 drochner uint8_t val;
226 1.1 drochner } ural_def_bbp[] = {
227 1.1 drochner { 3, 0x02 },
228 1.1 drochner { 4, 0x19 },
229 1.1 drochner { 14, 0x1c },
230 1.1 drochner { 15, 0x30 },
231 1.1 drochner { 16, 0xac },
232 1.1 drochner { 17, 0x48 },
233 1.1 drochner { 18, 0x18 },
234 1.1 drochner { 19, 0xff },
235 1.1 drochner { 20, 0x1e },
236 1.1 drochner { 21, 0x08 },
237 1.1 drochner { 22, 0x08 },
238 1.1 drochner { 23, 0x08 },
239 1.1 drochner { 24, 0x80 },
240 1.1 drochner { 25, 0x50 },
241 1.1 drochner { 26, 0x08 },
242 1.1 drochner { 27, 0x23 },
243 1.1 drochner { 30, 0x10 },
244 1.1 drochner { 31, 0x2b },
245 1.1 drochner { 32, 0xb9 },
246 1.1 drochner { 34, 0x12 },
247 1.1 drochner { 35, 0x50 },
248 1.1 drochner { 39, 0xc4 },
249 1.1 drochner { 40, 0x02 },
250 1.1 drochner { 41, 0x60 },
251 1.1 drochner { 53, 0x10 },
252 1.1 drochner { 54, 0x18 },
253 1.1 drochner { 56, 0x08 },
254 1.1 drochner { 57, 0x10 },
255 1.1 drochner { 58, 0x08 },
256 1.1 drochner { 61, 0x60 },
257 1.1 drochner { 62, 0x10 },
258 1.1 drochner { 75, 0xff }
259 1.1 drochner };
260 1.1 drochner
261 1.1 drochner /*
262 1.1 drochner * Default values for RF register R2 indexed by channel numbers.
263 1.1 drochner */
264 1.1 drochner static const uint32_t ural_rf2522_r2[] = {
265 1.1 drochner 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
266 1.1 drochner 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
267 1.1 drochner };
268 1.1 drochner
269 1.1 drochner static const uint32_t ural_rf2523_r2[] = {
270 1.1 drochner 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
271 1.1 drochner 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
272 1.1 drochner };
273 1.1 drochner
274 1.1 drochner static const uint32_t ural_rf2524_r2[] = {
275 1.1 drochner 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
276 1.1 drochner 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
277 1.1 drochner };
278 1.1 drochner
279 1.1 drochner static const uint32_t ural_rf2525_r2[] = {
280 1.1 drochner 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
281 1.1 drochner 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
282 1.1 drochner };
283 1.1 drochner
284 1.1 drochner static const uint32_t ural_rf2525_hi_r2[] = {
285 1.1 drochner 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
286 1.1 drochner 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
287 1.1 drochner };
288 1.1 drochner
289 1.1 drochner static const uint32_t ural_rf2525e_r2[] = {
290 1.1 drochner 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
291 1.1 drochner 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
292 1.1 drochner };
293 1.1 drochner
294 1.1 drochner static const uint32_t ural_rf2526_hi_r2[] = {
295 1.1 drochner 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
296 1.1 drochner 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
297 1.1 drochner };
298 1.1 drochner
299 1.1 drochner static const uint32_t ural_rf2526_r2[] = {
300 1.1 drochner 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
301 1.1 drochner 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
302 1.1 drochner };
303 1.1 drochner
304 1.1 drochner /*
305 1.1 drochner * For dual-band RF, RF registers R1 and R4 also depend on channel number;
306 1.1 drochner * values taken from the reference driver.
307 1.1 drochner */
308 1.1 drochner static const struct {
309 1.1 drochner uint8_t chan;
310 1.1 drochner uint32_t r1;
311 1.1 drochner uint32_t r2;
312 1.1 drochner uint32_t r4;
313 1.1 drochner } ural_rf5222[] = {
314 1.1 drochner { 1, 0x08808, 0x0044d, 0x00282 },
315 1.1 drochner { 2, 0x08808, 0x0044e, 0x00282 },
316 1.1 drochner { 3, 0x08808, 0x0044f, 0x00282 },
317 1.1 drochner { 4, 0x08808, 0x00460, 0x00282 },
318 1.1 drochner { 5, 0x08808, 0x00461, 0x00282 },
319 1.1 drochner { 6, 0x08808, 0x00462, 0x00282 },
320 1.1 drochner { 7, 0x08808, 0x00463, 0x00282 },
321 1.1 drochner { 8, 0x08808, 0x00464, 0x00282 },
322 1.1 drochner { 9, 0x08808, 0x00465, 0x00282 },
323 1.1 drochner { 10, 0x08808, 0x00466, 0x00282 },
324 1.1 drochner { 11, 0x08808, 0x00467, 0x00282 },
325 1.1 drochner { 12, 0x08808, 0x00468, 0x00282 },
326 1.1 drochner { 13, 0x08808, 0x00469, 0x00282 },
327 1.1 drochner { 14, 0x08808, 0x0046b, 0x00286 },
328 1.1 drochner
329 1.1 drochner { 36, 0x08804, 0x06225, 0x00287 },
330 1.1 drochner { 40, 0x08804, 0x06226, 0x00287 },
331 1.1 drochner { 44, 0x08804, 0x06227, 0x00287 },
332 1.1 drochner { 48, 0x08804, 0x06228, 0x00287 },
333 1.1 drochner { 52, 0x08804, 0x06229, 0x00287 },
334 1.1 drochner { 56, 0x08804, 0x0622a, 0x00287 },
335 1.1 drochner { 60, 0x08804, 0x0622b, 0x00287 },
336 1.1 drochner { 64, 0x08804, 0x0622c, 0x00287 },
337 1.1 drochner
338 1.1 drochner { 100, 0x08804, 0x02200, 0x00283 },
339 1.1 drochner { 104, 0x08804, 0x02201, 0x00283 },
340 1.1 drochner { 108, 0x08804, 0x02202, 0x00283 },
341 1.1 drochner { 112, 0x08804, 0x02203, 0x00283 },
342 1.1 drochner { 116, 0x08804, 0x02204, 0x00283 },
343 1.1 drochner { 120, 0x08804, 0x02205, 0x00283 },
344 1.1 drochner { 124, 0x08804, 0x02206, 0x00283 },
345 1.1 drochner { 128, 0x08804, 0x02207, 0x00283 },
346 1.1 drochner { 132, 0x08804, 0x02208, 0x00283 },
347 1.1 drochner { 136, 0x08804, 0x02209, 0x00283 },
348 1.1 drochner { 140, 0x08804, 0x0220a, 0x00283 },
349 1.1 drochner
350 1.1 drochner { 149, 0x08808, 0x02429, 0x00281 },
351 1.1 drochner { 153, 0x08808, 0x0242b, 0x00281 },
352 1.1 drochner { 157, 0x08808, 0x0242d, 0x00281 },
353 1.1 drochner { 161, 0x08808, 0x0242f, 0x00281 }
354 1.1 drochner };
355 1.1 drochner
356 1.1 drochner USB_DECLARE_DRIVER(ural);
357 1.1 drochner
358 1.1 drochner USB_MATCH(ural)
359 1.1 drochner {
360 1.1 drochner USB_MATCH_START(ural, uaa);
361 1.1 drochner
362 1.1 drochner return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
363 1.1 drochner UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
364 1.1 drochner }
365 1.1 drochner
366 1.1 drochner USB_ATTACH(ural)
367 1.1 drochner {
368 1.1 drochner USB_ATTACH_START(ural, sc, uaa);
369 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
370 1.2 drochner struct ifnet *ifp = &sc->sc_if;
371 1.1 drochner usb_interface_descriptor_t *id;
372 1.1 drochner usb_endpoint_descriptor_t *ed;
373 1.1 drochner usbd_status error;
374 1.1 drochner char *devinfop;
375 1.1 drochner int i;
376 1.1 drochner
377 1.30 cube sc->sc_dev = self;
378 1.1 drochner sc->sc_udev = uaa->device;
379 1.1 drochner
380 1.32 plunky aprint_naive("\n");
381 1.32 plunky aprint_normal("\n");
382 1.32 plunky
383 1.1 drochner devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
384 1.30 cube aprint_normal_dev(self, "%s\n", devinfop);
385 1.1 drochner usbd_devinfo_free(devinfop);
386 1.1 drochner
387 1.1 drochner if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
388 1.30 cube aprint_error_dev(self, "could not set configuration no\n");
389 1.1 drochner USB_ATTACH_ERROR_RETURN;
390 1.1 drochner }
391 1.1 drochner
392 1.1 drochner /* get the first interface handle */
393 1.1 drochner error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
394 1.1 drochner &sc->sc_iface);
395 1.1 drochner if (error != 0) {
396 1.30 cube aprint_error_dev(self, "could not get interface handle\n");
397 1.1 drochner USB_ATTACH_ERROR_RETURN;
398 1.1 drochner }
399 1.1 drochner
400 1.1 drochner /*
401 1.1 drochner * Find endpoints.
402 1.1 drochner */
403 1.1 drochner id = usbd_get_interface_descriptor(sc->sc_iface);
404 1.1 drochner
405 1.1 drochner sc->sc_rx_no = sc->sc_tx_no = -1;
406 1.1 drochner for (i = 0; i < id->bNumEndpoints; i++) {
407 1.1 drochner ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
408 1.1 drochner if (ed == NULL) {
409 1.30 cube aprint_error_dev(self,
410 1.30 cube "no endpoint descriptor for %d\n", i);
411 1.1 drochner USB_ATTACH_ERROR_RETURN;
412 1.1 drochner }
413 1.1 drochner
414 1.1 drochner if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
415 1.1 drochner UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
416 1.1 drochner sc->sc_rx_no = ed->bEndpointAddress;
417 1.1 drochner else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
418 1.1 drochner UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
419 1.1 drochner sc->sc_tx_no = ed->bEndpointAddress;
420 1.1 drochner }
421 1.1 drochner if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
422 1.30 cube aprint_error_dev(self, "missing endpoint\n");
423 1.1 drochner USB_ATTACH_ERROR_RETURN;
424 1.1 drochner }
425 1.1 drochner
426 1.1 drochner usb_init_task(&sc->sc_task, ural_task, sc);
427 1.22 kiyohara usb_callout_init(sc->sc_scan_ch);
428 1.17 joerg sc->amrr.amrr_min_success_threshold = 1;
429 1.29 nakayama sc->amrr.amrr_max_success_threshold = 15;
430 1.22 kiyohara usb_callout_init(sc->sc_amrr_ch);
431 1.1 drochner
432 1.1 drochner /* retrieve RT2570 rev. no */
433 1.1 drochner sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
434 1.1 drochner
435 1.1 drochner /* retrieve MAC address and various other things from EEPROM */
436 1.1 drochner ural_read_eeprom(sc);
437 1.1 drochner
438 1.30 cube aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
439 1.30 cube sc->asic_rev, ural_get_rf(sc->rf_rev));
440 1.12 perry
441 1.12 perry ifp->if_softc = sc;
442 1.12 perry memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ);
443 1.12 perry ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
444 1.12 perry ifp->if_init = ural_init;
445 1.12 perry ifp->if_ioctl = ural_ioctl;
446 1.12 perry ifp->if_start = ural_start;
447 1.12 perry ifp->if_watchdog = ural_watchdog;
448 1.12 perry IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
449 1.12 perry IFQ_SET_READY(&ifp->if_snd);
450 1.1 drochner
451 1.2 drochner ic->ic_ifp = ifp;
452 1.1 drochner ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
453 1.1 drochner ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
454 1.1 drochner ic->ic_state = IEEE80211_S_INIT;
455 1.1 drochner
456 1.1 drochner /* set device capabilities */
457 1.12 perry ic->ic_caps =
458 1.12 perry IEEE80211_C_IBSS | /* IBSS mode supported */
459 1.12 perry IEEE80211_C_MONITOR | /* monitor mode supported */
460 1.12 perry IEEE80211_C_HOSTAP | /* HostAp mode supported */
461 1.12 perry IEEE80211_C_TXPMGT | /* tx power management */
462 1.12 perry IEEE80211_C_SHPREAMBLE | /* short preamble supported */
463 1.12 perry IEEE80211_C_SHSLOT | /* short slot time supported */
464 1.12 perry IEEE80211_C_WPA; /* 802.11i */
465 1.1 drochner
466 1.1 drochner if (sc->rf_rev == RAL_RF_5222) {
467 1.1 drochner /* set supported .11a rates */
468 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a;
469 1.1 drochner
470 1.1 drochner /* set supported .11a channels */
471 1.1 drochner for (i = 36; i <= 64; i += 4) {
472 1.1 drochner ic->ic_channels[i].ic_freq =
473 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
474 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
475 1.1 drochner }
476 1.1 drochner for (i = 100; i <= 140; i += 4) {
477 1.1 drochner ic->ic_channels[i].ic_freq =
478 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
479 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
480 1.1 drochner }
481 1.1 drochner for (i = 149; i <= 161; i += 4) {
482 1.1 drochner ic->ic_channels[i].ic_freq =
483 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
484 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
485 1.1 drochner }
486 1.1 drochner }
487 1.1 drochner
488 1.1 drochner /* set supported .11b and .11g rates */
489 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b;
490 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g;
491 1.1 drochner
492 1.1 drochner /* set supported .11b and .11g channels (1 through 14) */
493 1.1 drochner for (i = 1; i <= 14; i++) {
494 1.1 drochner ic->ic_channels[i].ic_freq =
495 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
496 1.1 drochner ic->ic_channels[i].ic_flags =
497 1.1 drochner IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
498 1.1 drochner IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
499 1.1 drochner }
500 1.1 drochner
501 1.1 drochner if_attach(ifp);
502 1.1 drochner ieee80211_ifattach(ic);
503 1.12 perry ic->ic_reset = ural_reset;
504 1.1 drochner
505 1.1 drochner /* override state transition machine */
506 1.1 drochner sc->sc_newstate = ic->ic_newstate;
507 1.1 drochner ic->ic_newstate = ural_newstate;
508 1.1 drochner ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
509 1.1 drochner
510 1.1 drochner #if NBPFILTER > 0
511 1.1 drochner bpfattach2(ifp, DLT_IEEE802_11_RADIO,
512 1.1 drochner sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
513 1.1 drochner
514 1.1 drochner sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
515 1.1 drochner sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
516 1.1 drochner sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
517 1.1 drochner
518 1.1 drochner sc->sc_txtap_len = sizeof sc->sc_txtapu;
519 1.1 drochner sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
520 1.1 drochner sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
521 1.1 drochner #endif
522 1.1 drochner
523 1.4 drochner ieee80211_announce(ic);
524 1.4 drochner
525 1.1 drochner usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
526 1.1 drochner USBDEV(sc->sc_dev));
527 1.1 drochner
528 1.1 drochner USB_ATTACH_SUCCESS_RETURN;
529 1.1 drochner }
530 1.1 drochner
531 1.1 drochner USB_DETACH(ural)
532 1.1 drochner {
533 1.1 drochner USB_DETACH_START(ural, sc);
534 1.2 drochner struct ieee80211com *ic = &sc->sc_ic;
535 1.2 drochner struct ifnet *ifp = &sc->sc_if;
536 1.1 drochner int s;
537 1.1 drochner
538 1.1 drochner s = splusb();
539 1.1 drochner
540 1.12 perry ural_stop(ifp, 1);
541 1.1 drochner usb_rem_task(sc->sc_udev, &sc->sc_task);
542 1.22 kiyohara usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc);
543 1.22 kiyohara usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc);
544 1.12 perry
545 1.12 perry if (sc->amrr_xfer != NULL) {
546 1.12 perry usbd_free_xfer(sc->amrr_xfer);
547 1.12 perry sc->amrr_xfer = NULL;
548 1.12 perry }
549 1.1 drochner
550 1.1 drochner if (sc->sc_rx_pipeh != NULL) {
551 1.1 drochner usbd_abort_pipe(sc->sc_rx_pipeh);
552 1.1 drochner usbd_close_pipe(sc->sc_rx_pipeh);
553 1.1 drochner }
554 1.1 drochner
555 1.1 drochner if (sc->sc_tx_pipeh != NULL) {
556 1.1 drochner usbd_abort_pipe(sc->sc_tx_pipeh);
557 1.1 drochner usbd_close_pipe(sc->sc_tx_pipeh);
558 1.1 drochner }
559 1.1 drochner
560 1.1 drochner #if NBPFILTER > 0
561 1.1 drochner bpfdetach(ifp);
562 1.1 drochner #endif
563 1.2 drochner ieee80211_ifdetach(ic);
564 1.1 drochner if_detach(ifp);
565 1.1 drochner
566 1.1 drochner splx(s);
567 1.1 drochner
568 1.1 drochner usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
569 1.1 drochner USBDEV(sc->sc_dev));
570 1.1 drochner
571 1.1 drochner return 0;
572 1.1 drochner }
573 1.1 drochner
574 1.1 drochner Static int
575 1.1 drochner ural_alloc_tx_list(struct ural_softc *sc)
576 1.1 drochner {
577 1.1 drochner struct ural_tx_data *data;
578 1.1 drochner int i, error;
579 1.1 drochner
580 1.1 drochner sc->tx_queued = 0;
581 1.1 drochner
582 1.1 drochner for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
583 1.1 drochner data = &sc->tx_data[i];
584 1.1 drochner
585 1.1 drochner data->sc = sc;
586 1.1 drochner
587 1.1 drochner data->xfer = usbd_alloc_xfer(sc->sc_udev);
588 1.1 drochner if (data->xfer == NULL) {
589 1.1 drochner printf("%s: could not allocate tx xfer\n",
590 1.1 drochner USBDEVNAME(sc->sc_dev));
591 1.1 drochner error = ENOMEM;
592 1.1 drochner goto fail;
593 1.1 drochner }
594 1.1 drochner
595 1.1 drochner data->buf = usbd_alloc_buffer(data->xfer,
596 1.1 drochner RAL_TX_DESC_SIZE + MCLBYTES);
597 1.1 drochner if (data->buf == NULL) {
598 1.1 drochner printf("%s: could not allocate tx buffer\n",
599 1.1 drochner USBDEVNAME(sc->sc_dev));
600 1.1 drochner error = ENOMEM;
601 1.1 drochner goto fail;
602 1.1 drochner }
603 1.1 drochner }
604 1.1 drochner
605 1.1 drochner return 0;
606 1.1 drochner
607 1.1 drochner fail: ural_free_tx_list(sc);
608 1.1 drochner return error;
609 1.1 drochner }
610 1.1 drochner
611 1.1 drochner Static void
612 1.1 drochner ural_free_tx_list(struct ural_softc *sc)
613 1.1 drochner {
614 1.1 drochner struct ural_tx_data *data;
615 1.1 drochner int i;
616 1.1 drochner
617 1.1 drochner for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
618 1.1 drochner data = &sc->tx_data[i];
619 1.1 drochner
620 1.1 drochner if (data->xfer != NULL) {
621 1.1 drochner usbd_free_xfer(data->xfer);
622 1.1 drochner data->xfer = NULL;
623 1.1 drochner }
624 1.1 drochner
625 1.1 drochner if (data->ni != NULL) {
626 1.1 drochner ieee80211_free_node(data->ni);
627 1.1 drochner data->ni = NULL;
628 1.1 drochner }
629 1.1 drochner }
630 1.1 drochner }
631 1.1 drochner
632 1.1 drochner Static int
633 1.1 drochner ural_alloc_rx_list(struct ural_softc *sc)
634 1.1 drochner {
635 1.1 drochner struct ural_rx_data *data;
636 1.1 drochner int i, error;
637 1.1 drochner
638 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
639 1.1 drochner data = &sc->rx_data[i];
640 1.1 drochner
641 1.1 drochner data->sc = sc;
642 1.1 drochner
643 1.1 drochner data->xfer = usbd_alloc_xfer(sc->sc_udev);
644 1.1 drochner if (data->xfer == NULL) {
645 1.1 drochner printf("%s: could not allocate rx xfer\n",
646 1.1 drochner USBDEVNAME(sc->sc_dev));
647 1.1 drochner error = ENOMEM;
648 1.1 drochner goto fail;
649 1.1 drochner }
650 1.1 drochner
651 1.1 drochner if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
652 1.1 drochner printf("%s: could not allocate rx buffer\n",
653 1.1 drochner USBDEVNAME(sc->sc_dev));
654 1.1 drochner error = ENOMEM;
655 1.1 drochner goto fail;
656 1.1 drochner }
657 1.1 drochner
658 1.1 drochner MGETHDR(data->m, M_DONTWAIT, MT_DATA);
659 1.1 drochner if (data->m == NULL) {
660 1.1 drochner printf("%s: could not allocate rx mbuf\n",
661 1.1 drochner USBDEVNAME(sc->sc_dev));
662 1.1 drochner error = ENOMEM;
663 1.1 drochner goto fail;
664 1.1 drochner }
665 1.1 drochner
666 1.1 drochner MCLGET(data->m, M_DONTWAIT);
667 1.1 drochner if (!(data->m->m_flags & M_EXT)) {
668 1.1 drochner printf("%s: could not allocate rx mbuf cluster\n",
669 1.1 drochner USBDEVNAME(sc->sc_dev));
670 1.1 drochner error = ENOMEM;
671 1.1 drochner goto fail;
672 1.1 drochner }
673 1.1 drochner
674 1.1 drochner data->buf = mtod(data->m, uint8_t *);
675 1.1 drochner }
676 1.1 drochner
677 1.1 drochner return 0;
678 1.1 drochner
679 1.1 drochner fail: ural_free_tx_list(sc);
680 1.1 drochner return error;
681 1.1 drochner }
682 1.1 drochner
683 1.1 drochner Static void
684 1.1 drochner ural_free_rx_list(struct ural_softc *sc)
685 1.1 drochner {
686 1.1 drochner struct ural_rx_data *data;
687 1.1 drochner int i;
688 1.1 drochner
689 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
690 1.1 drochner data = &sc->rx_data[i];
691 1.1 drochner
692 1.1 drochner if (data->xfer != NULL) {
693 1.1 drochner usbd_free_xfer(data->xfer);
694 1.1 drochner data->xfer = NULL;
695 1.1 drochner }
696 1.1 drochner
697 1.1 drochner if (data->m != NULL) {
698 1.1 drochner m_freem(data->m);
699 1.1 drochner data->m = NULL;
700 1.1 drochner }
701 1.1 drochner }
702 1.1 drochner }
703 1.1 drochner
704 1.1 drochner Static int
705 1.1 drochner ural_media_change(struct ifnet *ifp)
706 1.1 drochner {
707 1.1 drochner int error;
708 1.1 drochner
709 1.1 drochner error = ieee80211_media_change(ifp);
710 1.1 drochner if (error != ENETRESET)
711 1.1 drochner return error;
712 1.1 drochner
713 1.1 drochner if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
714 1.1 drochner ural_init(ifp);
715 1.1 drochner
716 1.1 drochner return 0;
717 1.1 drochner }
718 1.1 drochner
719 1.1 drochner /*
720 1.1 drochner * This function is called periodically (every 200ms) during scanning to
721 1.1 drochner * switch from one channel to another.
722 1.1 drochner */
723 1.1 drochner Static void
724 1.1 drochner ural_next_scan(void *arg)
725 1.1 drochner {
726 1.1 drochner struct ural_softc *sc = arg;
727 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
728 1.1 drochner
729 1.1 drochner if (ic->ic_state == IEEE80211_S_SCAN)
730 1.1 drochner ieee80211_next_scan(ic);
731 1.1 drochner }
732 1.1 drochner
733 1.1 drochner Static void
734 1.1 drochner ural_task(void *arg)
735 1.1 drochner {
736 1.1 drochner struct ural_softc *sc = arg;
737 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
738 1.1 drochner enum ieee80211_state ostate;
739 1.12 perry struct ieee80211_node *ni;
740 1.1 drochner struct mbuf *m;
741 1.1 drochner
742 1.1 drochner ostate = ic->ic_state;
743 1.1 drochner
744 1.1 drochner switch (sc->sc_state) {
745 1.1 drochner case IEEE80211_S_INIT:
746 1.1 drochner if (ostate == IEEE80211_S_RUN) {
747 1.1 drochner /* abort TSF synchronization */
748 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, 0);
749 1.1 drochner
750 1.1 drochner /* force tx led to stop blinking */
751 1.1 drochner ural_write(sc, RAL_MAC_CSR20, 0);
752 1.1 drochner }
753 1.1 drochner break;
754 1.1 drochner
755 1.1 drochner case IEEE80211_S_SCAN:
756 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
757 1.22 kiyohara usb_callout(sc->sc_scan_ch, hz / 5, ural_next_scan, sc);
758 1.1 drochner break;
759 1.1 drochner
760 1.1 drochner case IEEE80211_S_AUTH:
761 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
762 1.1 drochner break;
763 1.1 drochner
764 1.1 drochner case IEEE80211_S_ASSOC:
765 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
766 1.1 drochner break;
767 1.1 drochner
768 1.1 drochner case IEEE80211_S_RUN:
769 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
770 1.1 drochner
771 1.12 perry ni = ic->ic_bss;
772 1.12 perry
773 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR) {
774 1.12 perry ural_update_slot(ic->ic_ifp);
775 1.12 perry ural_set_txpreamble(sc);
776 1.12 perry ural_set_basicrates(sc);
777 1.12 perry ural_set_bssid(sc, ni->ni_bssid);
778 1.12 perry }
779 1.1 drochner
780 1.1 drochner if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
781 1.1 drochner ic->ic_opmode == IEEE80211_M_IBSS) {
782 1.12 perry m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
783 1.1 drochner if (m == NULL) {
784 1.1 drochner printf("%s: could not allocate beacon\n",
785 1.1 drochner USBDEVNAME(sc->sc_dev));
786 1.1 drochner return;
787 1.1 drochner }
788 1.1 drochner
789 1.12 perry if (ural_tx_bcn(sc, m, ni) != 0) {
790 1.1 drochner m_freem(m);
791 1.12 perry printf("%s: could not send beacon\n",
792 1.1 drochner USBDEVNAME(sc->sc_dev));
793 1.1 drochner return;
794 1.1 drochner }
795 1.1 drochner
796 1.1 drochner /* beacon is no longer needed */
797 1.1 drochner m_freem(m);
798 1.1 drochner }
799 1.1 drochner
800 1.1 drochner /* make tx led blink on tx (controlled by ASIC) */
801 1.1 drochner ural_write(sc, RAL_MAC_CSR20, 1);
802 1.1 drochner
803 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR)
804 1.1 drochner ural_enable_tsf_sync(sc);
805 1.12 perry
806 1.12 perry /* enable automatic rate adaptation in STA mode */
807 1.12 perry if (ic->ic_opmode == IEEE80211_M_STA &&
808 1.12 perry ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE)
809 1.12 perry ural_amrr_start(sc, ni);
810 1.12 perry
811 1.1 drochner break;
812 1.1 drochner }
813 1.1 drochner
814 1.1 drochner sc->sc_newstate(ic, sc->sc_state, -1);
815 1.1 drochner }
816 1.1 drochner
817 1.1 drochner Static int
818 1.13 christos ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate,
819 1.18 christos int arg)
820 1.1 drochner {
821 1.1 drochner struct ural_softc *sc = ic->ic_ifp->if_softc;
822 1.1 drochner
823 1.1 drochner usb_rem_task(sc->sc_udev, &sc->sc_task);
824 1.22 kiyohara usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc);
825 1.22 kiyohara usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc);
826 1.1 drochner
827 1.1 drochner /* do it in a process context */
828 1.1 drochner sc->sc_state = nstate;
829 1.17 joerg usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
830 1.1 drochner
831 1.1 drochner return 0;
832 1.1 drochner }
833 1.1 drochner
834 1.1 drochner /* quickly determine if a given rate is CCK or OFDM */
835 1.1 drochner #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
836 1.1 drochner
837 1.1 drochner #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
838 1.1 drochner #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
839 1.12 perry
840 1.12 perry #define RAL_SIFS 10 /* us */
841 1.12 perry
842 1.12 perry #define RAL_RXTX_TURNAROUND 5 /* us */
843 1.12 perry
844 1.12 perry /*
845 1.12 perry * This function is only used by the Rx radiotap code.
846 1.12 perry */
847 1.12 perry Static int
848 1.12 perry ural_rxrate(struct ural_rx_desc *desc)
849 1.12 perry {
850 1.12 perry if (le32toh(desc->flags) & RAL_RX_OFDM) {
851 1.12 perry /* reverse function of ural_plcp_signal */
852 1.12 perry switch (desc->rate) {
853 1.12 perry case 0xb: return 12;
854 1.12 perry case 0xf: return 18;
855 1.12 perry case 0xa: return 24;
856 1.12 perry case 0xe: return 36;
857 1.12 perry case 0x9: return 48;
858 1.12 perry case 0xd: return 72;
859 1.12 perry case 0x8: return 96;
860 1.12 perry case 0xc: return 108;
861 1.12 perry }
862 1.12 perry } else {
863 1.12 perry if (desc->rate == 10)
864 1.12 perry return 2;
865 1.12 perry if (desc->rate == 20)
866 1.12 perry return 4;
867 1.12 perry if (desc->rate == 55)
868 1.12 perry return 11;
869 1.12 perry if (desc->rate == 110)
870 1.12 perry return 22;
871 1.12 perry }
872 1.12 perry return 2; /* should not get there */
873 1.12 perry }
874 1.1 drochner
875 1.1 drochner Static void
876 1.18 christos ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv,
877 1.13 christos usbd_status status)
878 1.1 drochner {
879 1.1 drochner struct ural_tx_data *data = priv;
880 1.1 drochner struct ural_softc *sc = data->sc;
881 1.2 drochner struct ifnet *ifp = &sc->sc_if;
882 1.1 drochner int s;
883 1.1 drochner
884 1.1 drochner if (status != USBD_NORMAL_COMPLETION) {
885 1.1 drochner if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
886 1.1 drochner return;
887 1.1 drochner
888 1.1 drochner printf("%s: could not transmit buffer: %s\n",
889 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(status));
890 1.1 drochner
891 1.1 drochner if (status == USBD_STALLED)
892 1.10 augustss usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
893 1.1 drochner
894 1.1 drochner ifp->if_oerrors++;
895 1.1 drochner return;
896 1.1 drochner }
897 1.1 drochner
898 1.1 drochner s = splnet();
899 1.1 drochner
900 1.1 drochner m_freem(data->m);
901 1.1 drochner data->m = NULL;
902 1.1 drochner ieee80211_free_node(data->ni);
903 1.1 drochner data->ni = NULL;
904 1.1 drochner
905 1.1 drochner sc->tx_queued--;
906 1.1 drochner ifp->if_opackets++;
907 1.1 drochner
908 1.1 drochner DPRINTFN(10, ("tx done\n"));
909 1.1 drochner
910 1.1 drochner sc->sc_tx_timer = 0;
911 1.1 drochner ifp->if_flags &= ~IFF_OACTIVE;
912 1.1 drochner ural_start(ifp);
913 1.1 drochner
914 1.1 drochner splx(s);
915 1.1 drochner }
916 1.1 drochner
917 1.1 drochner Static void
918 1.1 drochner ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
919 1.1 drochner {
920 1.1 drochner struct ural_rx_data *data = priv;
921 1.1 drochner struct ural_softc *sc = data->sc;
922 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
923 1.2 drochner struct ifnet *ifp = &sc->sc_if;
924 1.1 drochner struct ural_rx_desc *desc;
925 1.12 perry struct ieee80211_frame *wh;
926 1.1 drochner struct ieee80211_node *ni;
927 1.12 perry struct mbuf *mnew, *m;
928 1.1 drochner int s, len;
929 1.1 drochner
930 1.1 drochner if (status != USBD_NORMAL_COMPLETION) {
931 1.1 drochner if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
932 1.1 drochner return;
933 1.1 drochner
934 1.1 drochner if (status == USBD_STALLED)
935 1.10 augustss usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
936 1.1 drochner goto skip;
937 1.1 drochner }
938 1.1 drochner
939 1.1 drochner usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
940 1.1 drochner
941 1.12 perry if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
942 1.12 perry DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev),
943 1.12 perry len));
944 1.1 drochner ifp->if_ierrors++;
945 1.1 drochner goto skip;
946 1.1 drochner }
947 1.1 drochner
948 1.1 drochner /* rx descriptor is located at the end */
949 1.1 drochner desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
950 1.1 drochner
951 1.12 perry if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) ||
952 1.12 perry (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) {
953 1.1 drochner /*
954 1.1 drochner * This should not happen since we did not request to receive
955 1.1 drochner * those frames when we filled RAL_TXRX_CSR2.
956 1.1 drochner */
957 1.1 drochner DPRINTFN(5, ("PHY or CRC error\n"));
958 1.1 drochner ifp->if_ierrors++;
959 1.1 drochner goto skip;
960 1.1 drochner }
961 1.1 drochner
962 1.12 perry MGETHDR(mnew, M_DONTWAIT, MT_DATA);
963 1.12 perry if (mnew == NULL) {
964 1.12 perry ifp->if_ierrors++;
965 1.12 perry goto skip;
966 1.12 perry }
967 1.12 perry
968 1.12 perry MCLGET(mnew, M_DONTWAIT);
969 1.12 perry if (!(mnew->m_flags & M_EXT)) {
970 1.12 perry ifp->if_ierrors++;
971 1.12 perry m_freem(mnew);
972 1.12 perry goto skip;
973 1.12 perry }
974 1.12 perry
975 1.12 perry m = data->m;
976 1.12 perry data->m = mnew;
977 1.12 perry data->buf = mtod(data->m, uint8_t *);
978 1.12 perry
979 1.1 drochner /* finalize mbuf */
980 1.1 drochner m->m_pkthdr.rcvif = ifp;
981 1.1 drochner m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
982 1.12 perry m->m_flags |= M_HASFCS; /* h/w leaves FCS */
983 1.1 drochner
984 1.1 drochner s = splnet();
985 1.1 drochner
986 1.1 drochner #if NBPFILTER > 0
987 1.1 drochner if (sc->sc_drvbpf != NULL) {
988 1.1 drochner struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
989 1.1 drochner
990 1.5 drochner tap->wr_flags = IEEE80211_RADIOTAP_F_FCS;
991 1.12 perry tap->wr_rate = ural_rxrate(desc);
992 1.12 perry tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
993 1.12 perry tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
994 1.1 drochner tap->wr_antenna = sc->rx_ant;
995 1.1 drochner tap->wr_antsignal = desc->rssi;
996 1.1 drochner
997 1.1 drochner bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
998 1.1 drochner }
999 1.1 drochner #endif
1000 1.1 drochner
1001 1.12 perry wh = mtod(m, struct ieee80211_frame *);
1002 1.12 perry ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1003 1.1 drochner
1004 1.1 drochner /* send the frame to the 802.11 layer */
1005 1.1 drochner ieee80211_input(ic, m, ni, desc->rssi, 0);
1006 1.1 drochner
1007 1.1 drochner /* node is no longer needed */
1008 1.1 drochner ieee80211_free_node(ni);
1009 1.1 drochner
1010 1.1 drochner splx(s);
1011 1.1 drochner
1012 1.1 drochner DPRINTFN(15, ("rx done\n"));
1013 1.1 drochner
1014 1.1 drochner skip: /* setup a new transfer */
1015 1.1 drochner usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
1016 1.1 drochner USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
1017 1.1 drochner usbd_transfer(xfer);
1018 1.1 drochner }
1019 1.1 drochner
1020 1.1 drochner /*
1021 1.1 drochner * Return the expected ack rate for a frame transmitted at rate `rate'.
1022 1.1 drochner * XXX: this should depend on the destination node basic rate set.
1023 1.1 drochner */
1024 1.1 drochner Static int
1025 1.12 perry ural_ack_rate(struct ieee80211com *ic, int rate)
1026 1.1 drochner {
1027 1.1 drochner switch (rate) {
1028 1.1 drochner /* CCK rates */
1029 1.1 drochner case 2:
1030 1.1 drochner return 2;
1031 1.1 drochner case 4:
1032 1.1 drochner case 11:
1033 1.1 drochner case 22:
1034 1.12 perry return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1035 1.1 drochner
1036 1.1 drochner /* OFDM rates */
1037 1.1 drochner case 12:
1038 1.1 drochner case 18:
1039 1.1 drochner return 12;
1040 1.1 drochner case 24:
1041 1.1 drochner case 36:
1042 1.1 drochner return 24;
1043 1.1 drochner case 48:
1044 1.1 drochner case 72:
1045 1.1 drochner case 96:
1046 1.1 drochner case 108:
1047 1.1 drochner return 48;
1048 1.1 drochner }
1049 1.1 drochner
1050 1.1 drochner /* default to 1Mbps */
1051 1.1 drochner return 2;
1052 1.1 drochner }
1053 1.1 drochner
1054 1.1 drochner /*
1055 1.1 drochner * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1056 1.1 drochner * The function automatically determines the operating mode depending on the
1057 1.1 drochner * given rate. `flags' indicates whether short preamble is in use or not.
1058 1.1 drochner */
1059 1.1 drochner Static uint16_t
1060 1.1 drochner ural_txtime(int len, int rate, uint32_t flags)
1061 1.1 drochner {
1062 1.1 drochner uint16_t txtime;
1063 1.1 drochner
1064 1.1 drochner if (RAL_RATE_IS_OFDM(rate)) {
1065 1.17 joerg /* IEEE Std 802.11g-2003, pp. 37 */
1066 1.12 perry txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1067 1.12 perry txtime = 16 + 4 + 4 * txtime + 6;
1068 1.1 drochner } else {
1069 1.12 perry /* IEEE Std 802.11b-1999, pp. 28 */
1070 1.12 perry txtime = (16 * len + rate - 1) / rate;
1071 1.1 drochner if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1072 1.12 perry txtime += 72 + 24;
1073 1.1 drochner else
1074 1.12 perry txtime += 144 + 48;
1075 1.1 drochner }
1076 1.1 drochner return txtime;
1077 1.1 drochner }
1078 1.1 drochner
1079 1.1 drochner Static uint8_t
1080 1.1 drochner ural_plcp_signal(int rate)
1081 1.1 drochner {
1082 1.1 drochner switch (rate) {
1083 1.1 drochner /* CCK rates (returned values are device-dependent) */
1084 1.1 drochner case 2: return 0x0;
1085 1.1 drochner case 4: return 0x1;
1086 1.1 drochner case 11: return 0x2;
1087 1.1 drochner case 22: return 0x3;
1088 1.1 drochner
1089 1.1 drochner /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1090 1.1 drochner case 12: return 0xb;
1091 1.1 drochner case 18: return 0xf;
1092 1.1 drochner case 24: return 0xa;
1093 1.1 drochner case 36: return 0xe;
1094 1.1 drochner case 48: return 0x9;
1095 1.1 drochner case 72: return 0xd;
1096 1.1 drochner case 96: return 0x8;
1097 1.1 drochner case 108: return 0xc;
1098 1.1 drochner
1099 1.1 drochner /* unsupported rates (should not get there) */
1100 1.1 drochner default: return 0xff;
1101 1.1 drochner }
1102 1.1 drochner }
1103 1.1 drochner
1104 1.1 drochner Static void
1105 1.1 drochner ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1106 1.1 drochner uint32_t flags, int len, int rate)
1107 1.1 drochner {
1108 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1109 1.1 drochner uint16_t plcp_length;
1110 1.1 drochner int remainder;
1111 1.1 drochner
1112 1.1 drochner desc->flags = htole32(flags);
1113 1.1 drochner desc->flags |= htole32(RAL_TX_NEWSEQ);
1114 1.1 drochner desc->flags |= htole32(len << 16);
1115 1.1 drochner
1116 1.12 perry desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1117 1.4 drochner desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1118 1.1 drochner
1119 1.12 perry /* setup PLCP fields */
1120 1.12 perry desc->plcp_signal = ural_plcp_signal(rate);
1121 1.1 drochner desc->plcp_service = 4;
1122 1.1 drochner
1123 1.12 perry len += IEEE80211_CRC_LEN;
1124 1.1 drochner if (RAL_RATE_IS_OFDM(rate)) {
1125 1.12 perry desc->flags |= htole32(RAL_TX_OFDM);
1126 1.12 perry
1127 1.1 drochner plcp_length = len & 0xfff;
1128 1.12 perry desc->plcp_length_hi = plcp_length >> 6;
1129 1.12 perry desc->plcp_length_lo = plcp_length & 0x3f;
1130 1.1 drochner } else {
1131 1.12 perry plcp_length = (16 * len + rate - 1) / rate;
1132 1.12 perry if (rate == 22) {
1133 1.12 perry remainder = (16 * len) % 22;
1134 1.12 perry if (remainder != 0 && remainder < 7)
1135 1.1 drochner desc->plcp_service |= RAL_PLCP_LENGEXT;
1136 1.1 drochner }
1137 1.12 perry desc->plcp_length_hi = plcp_length >> 8;
1138 1.12 perry desc->plcp_length_lo = plcp_length & 0xff;
1139 1.12 perry
1140 1.12 perry if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1141 1.12 perry desc->plcp_signal |= 0x08;
1142 1.1 drochner }
1143 1.1 drochner
1144 1.1 drochner desc->iv = 0;
1145 1.1 drochner desc->eiv = 0;
1146 1.1 drochner }
1147 1.1 drochner
1148 1.1 drochner #define RAL_TX_TIMEOUT 5000
1149 1.1 drochner
1150 1.1 drochner Static int
1151 1.1 drochner ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1152 1.1 drochner {
1153 1.1 drochner struct ural_tx_desc *desc;
1154 1.1 drochner usbd_xfer_handle xfer;
1155 1.12 perry uint8_t cmd = 0;
1156 1.1 drochner usbd_status error;
1157 1.1 drochner uint8_t *buf;
1158 1.1 drochner int xferlen, rate;
1159 1.1 drochner
1160 1.12 perry rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1161 1.1 drochner
1162 1.1 drochner xfer = usbd_alloc_xfer(sc->sc_udev);
1163 1.1 drochner if (xfer == NULL)
1164 1.1 drochner return ENOMEM;
1165 1.1 drochner
1166 1.1 drochner /* xfer length needs to be a multiple of two! */
1167 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1168 1.1 drochner
1169 1.1 drochner buf = usbd_alloc_buffer(xfer, xferlen);
1170 1.1 drochner if (buf == NULL) {
1171 1.1 drochner usbd_free_xfer(xfer);
1172 1.1 drochner return ENOMEM;
1173 1.1 drochner }
1174 1.1 drochner
1175 1.1 drochner usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1176 1.1 drochner USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1177 1.1 drochner
1178 1.1 drochner error = usbd_sync_transfer(xfer);
1179 1.1 drochner if (error != 0) {
1180 1.1 drochner usbd_free_xfer(xfer);
1181 1.1 drochner return error;
1182 1.1 drochner }
1183 1.1 drochner
1184 1.1 drochner desc = (struct ural_tx_desc *)buf;
1185 1.1 drochner
1186 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1187 1.1 drochner ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1188 1.1 drochner m0->m_pkthdr.len, rate);
1189 1.1 drochner
1190 1.1 drochner DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1191 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1192 1.1 drochner
1193 1.1 drochner usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
1194 1.1 drochner USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1195 1.1 drochner
1196 1.1 drochner error = usbd_sync_transfer(xfer);
1197 1.1 drochner usbd_free_xfer(xfer);
1198 1.1 drochner
1199 1.1 drochner return error;
1200 1.1 drochner }
1201 1.1 drochner
1202 1.1 drochner Static int
1203 1.1 drochner ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1204 1.1 drochner {
1205 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1206 1.1 drochner struct ural_tx_desc *desc;
1207 1.1 drochner struct ural_tx_data *data;
1208 1.1 drochner struct ieee80211_frame *wh;
1209 1.26 degroote struct ieee80211_key *k;
1210 1.1 drochner uint32_t flags = 0;
1211 1.1 drochner uint16_t dur;
1212 1.1 drochner usbd_status error;
1213 1.1 drochner int xferlen, rate;
1214 1.1 drochner
1215 1.1 drochner data = &sc->tx_data[0];
1216 1.1 drochner desc = (struct ural_tx_desc *)data->buf;
1217 1.1 drochner
1218 1.12 perry rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1219 1.12 perry
1220 1.26 degroote wh = mtod(m0, struct ieee80211_frame *);
1221 1.26 degroote
1222 1.26 degroote if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1223 1.26 degroote k = ieee80211_crypto_encap(ic, ni, m0);
1224 1.26 degroote if (k == NULL) {
1225 1.26 degroote m_freem(m0);
1226 1.26 degroote return ENOBUFS;
1227 1.26 degroote }
1228 1.26 degroote }
1229 1.26 degroote
1230 1.1 drochner data->m = m0;
1231 1.1 drochner data->ni = ni;
1232 1.1 drochner
1233 1.1 drochner wh = mtod(m0, struct ieee80211_frame *);
1234 1.1 drochner
1235 1.1 drochner if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1236 1.1 drochner flags |= RAL_TX_ACK;
1237 1.1 drochner
1238 1.1 drochner dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS;
1239 1.1 drochner *(uint16_t *)wh->i_dur = htole16(dur);
1240 1.1 drochner
1241 1.1 drochner /* tell hardware to add timestamp for probe responses */
1242 1.12 perry if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1243 1.12 perry IEEE80211_FC0_TYPE_MGT &&
1244 1.12 perry (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1245 1.12 perry IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1246 1.1 drochner flags |= RAL_TX_TIMESTAMP;
1247 1.1 drochner }
1248 1.1 drochner
1249 1.7 drochner #if NBPFILTER > 0
1250 1.7 drochner if (sc->sc_drvbpf != NULL) {
1251 1.7 drochner struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1252 1.7 drochner
1253 1.7 drochner tap->wt_flags = 0;
1254 1.7 drochner tap->wt_rate = rate;
1255 1.9 skrll tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1256 1.9 skrll tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1257 1.7 drochner tap->wt_antenna = sc->tx_ant;
1258 1.7 drochner
1259 1.7 drochner bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1260 1.7 drochner }
1261 1.7 drochner #endif
1262 1.7 drochner
1263 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1264 1.1 drochner ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1265 1.1 drochner
1266 1.12 perry /* align end on a 2-bytes boundary */
1267 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1268 1.1 drochner
1269 1.12 perry /*
1270 1.12 perry * No space left in the last URB to store the extra 2 bytes, force
1271 1.12 perry * sending of another URB.
1272 1.12 perry */
1273 1.12 perry if ((xferlen % 64) == 0)
1274 1.12 perry xferlen += 2;
1275 1.12 perry
1276 1.1 drochner DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1277 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1278 1.1 drochner
1279 1.12 perry usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1280 1.12 perry xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1281 1.12 perry ural_txeof);
1282 1.1 drochner
1283 1.1 drochner error = usbd_transfer(data->xfer);
1284 1.16 joerg if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1285 1.16 joerg m_freem(m0);
1286 1.1 drochner return error;
1287 1.16 joerg }
1288 1.1 drochner
1289 1.1 drochner sc->tx_queued++;
1290 1.1 drochner
1291 1.1 drochner return 0;
1292 1.1 drochner }
1293 1.1 drochner
1294 1.1 drochner Static int
1295 1.1 drochner ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1296 1.1 drochner {
1297 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1298 1.1 drochner struct ural_tx_desc *desc;
1299 1.1 drochner struct ural_tx_data *data;
1300 1.1 drochner struct ieee80211_frame *wh;
1301 1.1 drochner struct ieee80211_key *k;
1302 1.1 drochner uint32_t flags = 0;
1303 1.1 drochner uint16_t dur;
1304 1.1 drochner usbd_status error;
1305 1.1 drochner int xferlen, rate;
1306 1.1 drochner
1307 1.2 drochner wh = mtod(m0, struct ieee80211_frame *);
1308 1.2 drochner
1309 1.12 perry if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE)
1310 1.12 perry rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate];
1311 1.12 perry else
1312 1.12 perry rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1313 1.1 drochner
1314 1.1 drochner rate &= IEEE80211_RATE_VAL;
1315 1.1 drochner
1316 1.2 drochner if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1317 1.1 drochner k = ieee80211_crypto_encap(ic, ni, m0);
1318 1.3 dyoung if (k == NULL) {
1319 1.3 dyoung m_freem(m0);
1320 1.1 drochner return ENOBUFS;
1321 1.3 dyoung }
1322 1.2 drochner
1323 1.2 drochner /* packet header may have moved, reset our local pointer */
1324 1.2 drochner wh = mtod(m0, struct ieee80211_frame *);
1325 1.1 drochner }
1326 1.1 drochner
1327 1.12 perry data = &sc->tx_data[0];
1328 1.12 perry desc = (struct ural_tx_desc *)data->buf;
1329 1.12 perry
1330 1.12 perry data->m = m0;
1331 1.12 perry data->ni = ni;
1332 1.12 perry
1333 1.12 perry if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1334 1.12 perry flags |= RAL_TX_ACK;
1335 1.12 perry flags |= RAL_TX_RETRY(7);
1336 1.12 perry
1337 1.12 perry dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate),
1338 1.12 perry ic->ic_flags) + RAL_SIFS;
1339 1.12 perry *(uint16_t *)wh->i_dur = htole16(dur);
1340 1.12 perry }
1341 1.12 perry
1342 1.1 drochner #if NBPFILTER > 0
1343 1.1 drochner if (sc->sc_drvbpf != NULL) {
1344 1.1 drochner struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1345 1.1 drochner
1346 1.1 drochner tap->wt_flags = 0;
1347 1.1 drochner tap->wt_rate = rate;
1348 1.9 skrll tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1349 1.9 skrll tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1350 1.1 drochner tap->wt_antenna = sc->tx_ant;
1351 1.1 drochner
1352 1.1 drochner bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1353 1.1 drochner }
1354 1.1 drochner #endif
1355 1.1 drochner
1356 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1357 1.1 drochner ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1358 1.1 drochner
1359 1.12 perry /* align end on a 2-bytes boundary */
1360 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1361 1.1 drochner
1362 1.12 perry /*
1363 1.12 perry * No space left in the last URB to store the extra 2 bytes, force
1364 1.12 perry * sending of another URB.
1365 1.12 perry */
1366 1.12 perry if ((xferlen % 64) == 0)
1367 1.12 perry xferlen += 2;
1368 1.12 perry
1369 1.1 drochner DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1370 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1371 1.1 drochner
1372 1.12 perry usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1373 1.12 perry xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1374 1.12 perry ural_txeof);
1375 1.1 drochner
1376 1.1 drochner error = usbd_transfer(data->xfer);
1377 1.12 perry if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1378 1.1 drochner return error;
1379 1.1 drochner
1380 1.1 drochner sc->tx_queued++;
1381 1.1 drochner
1382 1.1 drochner return 0;
1383 1.1 drochner }
1384 1.1 drochner
1385 1.1 drochner Static void
1386 1.1 drochner ural_start(struct ifnet *ifp)
1387 1.1 drochner {
1388 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1389 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1390 1.12 perry struct mbuf *m0;
1391 1.1 drochner struct ether_header *eh;
1392 1.1 drochner struct ieee80211_node *ni;
1393 1.1 drochner
1394 1.1 drochner for (;;) {
1395 1.1 drochner IF_POLL(&ic->ic_mgtq, m0);
1396 1.1 drochner if (m0 != NULL) {
1397 1.1 drochner if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1398 1.1 drochner ifp->if_flags |= IFF_OACTIVE;
1399 1.1 drochner break;
1400 1.1 drochner }
1401 1.1 drochner IF_DEQUEUE(&ic->ic_mgtq, m0);
1402 1.1 drochner
1403 1.1 drochner ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1404 1.1 drochner m0->m_pkthdr.rcvif = NULL;
1405 1.1 drochner #if NBPFILTER > 0
1406 1.1 drochner if (ic->ic_rawbpf != NULL)
1407 1.1 drochner bpf_mtap(ic->ic_rawbpf, m0);
1408 1.1 drochner #endif
1409 1.1 drochner if (ural_tx_mgt(sc, m0, ni) != 0)
1410 1.1 drochner break;
1411 1.1 drochner
1412 1.1 drochner } else {
1413 1.1 drochner if (ic->ic_state != IEEE80211_S_RUN)
1414 1.1 drochner break;
1415 1.1 drochner IFQ_DEQUEUE(&ifp->if_snd, m0);
1416 1.1 drochner if (m0 == NULL)
1417 1.1 drochner break;
1418 1.1 drochner if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1419 1.1 drochner IF_PREPEND(&ifp->if_snd, m0);
1420 1.1 drochner ifp->if_flags |= IFF_OACTIVE;
1421 1.1 drochner break;
1422 1.1 drochner }
1423 1.1 drochner
1424 1.2 drochner if (m0->m_len < sizeof (struct ether_header) &&
1425 1.2 drochner !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1426 1.1 drochner continue;
1427 1.1 drochner
1428 1.1 drochner eh = mtod(m0, struct ether_header *);
1429 1.1 drochner ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1430 1.1 drochner if (ni == NULL) {
1431 1.1 drochner m_freem(m0);
1432 1.1 drochner continue;
1433 1.1 drochner }
1434 1.1 drochner #if NBPFILTER > 0
1435 1.1 drochner if (ifp->if_bpf != NULL)
1436 1.1 drochner bpf_mtap(ifp->if_bpf, m0);
1437 1.1 drochner #endif
1438 1.1 drochner m0 = ieee80211_encap(ic, m0, ni);
1439 1.4 drochner if (m0 == NULL) {
1440 1.4 drochner ieee80211_free_node(ni);
1441 1.1 drochner continue;
1442 1.4 drochner }
1443 1.1 drochner #if NBPFILTER > 0
1444 1.1 drochner if (ic->ic_rawbpf != NULL)
1445 1.1 drochner bpf_mtap(ic->ic_rawbpf, m0);
1446 1.1 drochner #endif
1447 1.1 drochner if (ural_tx_data(sc, m0, ni) != 0) {
1448 1.1 drochner ieee80211_free_node(ni);
1449 1.1 drochner ifp->if_oerrors++;
1450 1.1 drochner break;
1451 1.1 drochner }
1452 1.1 drochner }
1453 1.1 drochner
1454 1.1 drochner sc->sc_tx_timer = 5;
1455 1.1 drochner ifp->if_timer = 1;
1456 1.1 drochner }
1457 1.1 drochner }
1458 1.1 drochner
1459 1.1 drochner Static void
1460 1.1 drochner ural_watchdog(struct ifnet *ifp)
1461 1.1 drochner {
1462 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1463 1.2 drochner struct ieee80211com *ic = &sc->sc_ic;
1464 1.1 drochner
1465 1.1 drochner ifp->if_timer = 0;
1466 1.1 drochner
1467 1.1 drochner if (sc->sc_tx_timer > 0) {
1468 1.1 drochner if (--sc->sc_tx_timer == 0) {
1469 1.1 drochner printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev));
1470 1.12 perry /*ural_init(sc); XXX needs a process context! */
1471 1.1 drochner ifp->if_oerrors++;
1472 1.1 drochner return;
1473 1.1 drochner }
1474 1.1 drochner ifp->if_timer = 1;
1475 1.1 drochner }
1476 1.1 drochner
1477 1.2 drochner ieee80211_watchdog(ic);
1478 1.1 drochner }
1479 1.1 drochner
1480 1.12 perry /*
1481 1.12 perry * This function allows for fast channel switching in monitor mode (used by
1482 1.12 perry * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1483 1.12 perry * generate a new beacon frame.
1484 1.12 perry */
1485 1.12 perry Static int
1486 1.12 perry ural_reset(struct ifnet *ifp)
1487 1.12 perry {
1488 1.12 perry struct ural_softc *sc = ifp->if_softc;
1489 1.12 perry struct ieee80211com *ic = &sc->sc_ic;
1490 1.12 perry
1491 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR)
1492 1.12 perry return ENETRESET;
1493 1.12 perry
1494 1.12 perry ural_set_chan(sc, ic->ic_curchan);
1495 1.12 perry
1496 1.12 perry return 0;
1497 1.12 perry }
1498 1.12 perry
1499 1.1 drochner Static int
1500 1.19 christos ural_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1501 1.1 drochner {
1502 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1503 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1504 1.1 drochner int s, error = 0;
1505 1.1 drochner
1506 1.1 drochner s = splnet();
1507 1.1 drochner
1508 1.1 drochner switch (cmd) {
1509 1.1 drochner case SIOCSIFFLAGS:
1510 1.31 dyoung if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1511 1.31 dyoung break;
1512 1.31 dyoung /* XXX re-use ether_ioctl() */
1513 1.31 dyoung switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
1514 1.31 dyoung case IFF_UP|IFF_RUNNING:
1515 1.31 dyoung ural_update_promisc(sc);
1516 1.31 dyoung break;
1517 1.31 dyoung case IFF_UP:
1518 1.31 dyoung ural_init(ifp);
1519 1.31 dyoung break;
1520 1.31 dyoung case IFF_RUNNING:
1521 1.31 dyoung ural_stop(ifp, 1);
1522 1.31 dyoung break;
1523 1.31 dyoung case 0:
1524 1.31 dyoung break;
1525 1.1 drochner }
1526 1.1 drochner break;
1527 1.2 drochner
1528 1.1 drochner default:
1529 1.1 drochner error = ieee80211_ioctl(ic, cmd, data);
1530 1.1 drochner }
1531 1.1 drochner
1532 1.1 drochner if (error == ENETRESET) {
1533 1.1 drochner if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1534 1.1 drochner (IFF_UP | IFF_RUNNING))
1535 1.1 drochner ural_init(ifp);
1536 1.1 drochner error = 0;
1537 1.1 drochner }
1538 1.1 drochner
1539 1.1 drochner splx(s);
1540 1.1 drochner
1541 1.1 drochner return error;
1542 1.1 drochner }
1543 1.1 drochner
1544 1.1 drochner Static void
1545 1.12 perry ural_set_testmode(struct ural_softc *sc)
1546 1.12 perry {
1547 1.12 perry usb_device_request_t req;
1548 1.12 perry usbd_status error;
1549 1.12 perry
1550 1.12 perry req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1551 1.12 perry req.bRequest = RAL_VENDOR_REQUEST;
1552 1.12 perry USETW(req.wValue, 4);
1553 1.12 perry USETW(req.wIndex, 1);
1554 1.12 perry USETW(req.wLength, 0);
1555 1.12 perry
1556 1.12 perry error = usbd_do_request(sc->sc_udev, &req, NULL);
1557 1.12 perry if (error != 0) {
1558 1.12 perry printf("%s: could not set test mode: %s\n",
1559 1.12 perry USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1560 1.12 perry }
1561 1.12 perry }
1562 1.12 perry
1563 1.12 perry Static void
1564 1.1 drochner ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1565 1.1 drochner {
1566 1.1 drochner usb_device_request_t req;
1567 1.1 drochner usbd_status error;
1568 1.1 drochner
1569 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1570 1.1 drochner req.bRequest = RAL_READ_EEPROM;
1571 1.1 drochner USETW(req.wValue, 0);
1572 1.1 drochner USETW(req.wIndex, addr);
1573 1.1 drochner USETW(req.wLength, len);
1574 1.1 drochner
1575 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1576 1.1 drochner if (error != 0) {
1577 1.1 drochner printf("%s: could not read EEPROM: %s\n",
1578 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1579 1.1 drochner }
1580 1.1 drochner }
1581 1.1 drochner
1582 1.1 drochner Static uint16_t
1583 1.1 drochner ural_read(struct ural_softc *sc, uint16_t reg)
1584 1.1 drochner {
1585 1.1 drochner usb_device_request_t req;
1586 1.1 drochner usbd_status error;
1587 1.1 drochner uint16_t val;
1588 1.1 drochner
1589 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1590 1.1 drochner req.bRequest = RAL_READ_MAC;
1591 1.1 drochner USETW(req.wValue, 0);
1592 1.1 drochner USETW(req.wIndex, reg);
1593 1.1 drochner USETW(req.wLength, sizeof (uint16_t));
1594 1.1 drochner
1595 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, &val);
1596 1.1 drochner if (error != 0) {
1597 1.1 drochner printf("%s: could not read MAC register: %s\n",
1598 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1599 1.1 drochner return 0;
1600 1.1 drochner }
1601 1.1 drochner
1602 1.1 drochner return le16toh(val);
1603 1.1 drochner }
1604 1.1 drochner
1605 1.1 drochner Static void
1606 1.1 drochner ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1607 1.1 drochner {
1608 1.1 drochner usb_device_request_t req;
1609 1.1 drochner usbd_status error;
1610 1.1 drochner
1611 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1612 1.1 drochner req.bRequest = RAL_READ_MULTI_MAC;
1613 1.1 drochner USETW(req.wValue, 0);
1614 1.1 drochner USETW(req.wIndex, reg);
1615 1.1 drochner USETW(req.wLength, len);
1616 1.1 drochner
1617 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1618 1.1 drochner if (error != 0) {
1619 1.1 drochner printf("%s: could not read MAC register: %s\n",
1620 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1621 1.1 drochner }
1622 1.1 drochner }
1623 1.1 drochner
1624 1.1 drochner Static void
1625 1.1 drochner ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1626 1.1 drochner {
1627 1.1 drochner usb_device_request_t req;
1628 1.1 drochner usbd_status error;
1629 1.1 drochner
1630 1.1 drochner req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1631 1.1 drochner req.bRequest = RAL_WRITE_MAC;
1632 1.1 drochner USETW(req.wValue, val);
1633 1.1 drochner USETW(req.wIndex, reg);
1634 1.1 drochner USETW(req.wLength, 0);
1635 1.1 drochner
1636 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, NULL);
1637 1.1 drochner if (error != 0) {
1638 1.1 drochner printf("%s: could not write MAC register: %s\n",
1639 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1640 1.1 drochner }
1641 1.1 drochner }
1642 1.1 drochner
1643 1.1 drochner Static void
1644 1.1 drochner ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1645 1.1 drochner {
1646 1.1 drochner usb_device_request_t req;
1647 1.1 drochner usbd_status error;
1648 1.1 drochner
1649 1.1 drochner req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1650 1.1 drochner req.bRequest = RAL_WRITE_MULTI_MAC;
1651 1.1 drochner USETW(req.wValue, 0);
1652 1.1 drochner USETW(req.wIndex, reg);
1653 1.1 drochner USETW(req.wLength, len);
1654 1.1 drochner
1655 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1656 1.1 drochner if (error != 0) {
1657 1.1 drochner printf("%s: could not write MAC register: %s\n",
1658 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1659 1.1 drochner }
1660 1.1 drochner }
1661 1.1 drochner
1662 1.1 drochner Static void
1663 1.1 drochner ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1664 1.1 drochner {
1665 1.1 drochner uint16_t tmp;
1666 1.1 drochner int ntries;
1667 1.1 drochner
1668 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1669 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1670 1.1 drochner break;
1671 1.1 drochner }
1672 1.1 drochner if (ntries == 5) {
1673 1.1 drochner printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev));
1674 1.1 drochner return;
1675 1.1 drochner }
1676 1.1 drochner
1677 1.1 drochner tmp = reg << 8 | val;
1678 1.1 drochner ural_write(sc, RAL_PHY_CSR7, tmp);
1679 1.1 drochner }
1680 1.1 drochner
1681 1.1 drochner Static uint8_t
1682 1.1 drochner ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1683 1.1 drochner {
1684 1.1 drochner uint16_t val;
1685 1.1 drochner int ntries;
1686 1.1 drochner
1687 1.1 drochner val = RAL_BBP_WRITE | reg << 8;
1688 1.1 drochner ural_write(sc, RAL_PHY_CSR7, val);
1689 1.1 drochner
1690 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1691 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1692 1.1 drochner break;
1693 1.1 drochner }
1694 1.1 drochner if (ntries == 5) {
1695 1.1 drochner printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev));
1696 1.1 drochner return 0;
1697 1.1 drochner }
1698 1.1 drochner
1699 1.1 drochner return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1700 1.1 drochner }
1701 1.1 drochner
1702 1.1 drochner Static void
1703 1.1 drochner ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1704 1.1 drochner {
1705 1.1 drochner uint32_t tmp;
1706 1.1 drochner int ntries;
1707 1.1 drochner
1708 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1709 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1710 1.1 drochner break;
1711 1.1 drochner }
1712 1.1 drochner if (ntries == 5) {
1713 1.1 drochner printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev));
1714 1.1 drochner return;
1715 1.1 drochner }
1716 1.1 drochner
1717 1.1 drochner tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1718 1.1 drochner ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1719 1.1 drochner ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1720 1.1 drochner
1721 1.1 drochner /* remember last written value in sc */
1722 1.1 drochner sc->rf_regs[reg] = val;
1723 1.1 drochner
1724 1.1 drochner DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1725 1.1 drochner }
1726 1.1 drochner
1727 1.1 drochner Static void
1728 1.1 drochner ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1729 1.1 drochner {
1730 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1731 1.1 drochner uint8_t power, tmp;
1732 1.1 drochner u_int i, chan;
1733 1.1 drochner
1734 1.1 drochner chan = ieee80211_chan2ieee(ic, c);
1735 1.1 drochner if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1736 1.1 drochner return;
1737 1.1 drochner
1738 1.1 drochner if (IEEE80211_IS_CHAN_2GHZ(c))
1739 1.1 drochner power = min(sc->txpow[chan - 1], 31);
1740 1.1 drochner else
1741 1.1 drochner power = 31;
1742 1.1 drochner
1743 1.12 perry /* adjust txpower using ifconfig settings */
1744 1.12 perry power -= (100 - ic->ic_txpowlimit) / 8;
1745 1.12 perry
1746 1.1 drochner DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1747 1.1 drochner
1748 1.1 drochner switch (sc->rf_rev) {
1749 1.1 drochner case RAL_RF_2522:
1750 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x00814);
1751 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1752 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1753 1.1 drochner break;
1754 1.1 drochner
1755 1.1 drochner case RAL_RF_2523:
1756 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08804);
1757 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1758 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1759 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1760 1.1 drochner break;
1761 1.1 drochner
1762 1.1 drochner case RAL_RF_2524:
1763 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x0c808);
1764 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1765 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1766 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1767 1.1 drochner break;
1768 1.1 drochner
1769 1.1 drochner case RAL_RF_2525:
1770 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1771 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1772 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1773 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1774 1.1 drochner
1775 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1776 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1777 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1778 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1779 1.1 drochner break;
1780 1.1 drochner
1781 1.1 drochner case RAL_RF_2525E:
1782 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1783 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1784 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1785 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1786 1.1 drochner break;
1787 1.1 drochner
1788 1.1 drochner case RAL_RF_2526:
1789 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1790 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1791 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08804);
1792 1.1 drochner
1793 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1794 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1795 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1796 1.1 drochner break;
1797 1.1 drochner
1798 1.1 drochner /* dual-band RF */
1799 1.1 drochner case RAL_RF_5222:
1800 1.12 perry for (i = 0; ural_rf5222[i].chan != chan; i++);
1801 1.1 drochner
1802 1.12 perry ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1803 1.12 perry ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1804 1.12 perry ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1805 1.12 perry ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1806 1.1 drochner break;
1807 1.1 drochner }
1808 1.1 drochner
1809 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1810 1.1 drochner ic->ic_state != IEEE80211_S_SCAN) {
1811 1.1 drochner /* set Japan filter bit for channel 14 */
1812 1.1 drochner tmp = ural_bbp_read(sc, 70);
1813 1.1 drochner
1814 1.1 drochner tmp &= ~RAL_JAPAN_FILTER;
1815 1.1 drochner if (chan == 14)
1816 1.1 drochner tmp |= RAL_JAPAN_FILTER;
1817 1.1 drochner
1818 1.1 drochner ural_bbp_write(sc, 70, tmp);
1819 1.1 drochner
1820 1.1 drochner /* clear CRC errors */
1821 1.1 drochner ural_read(sc, RAL_STA_CSR0);
1822 1.1 drochner
1823 1.12 perry DELAY(10000);
1824 1.1 drochner ural_disable_rf_tune(sc);
1825 1.1 drochner }
1826 1.1 drochner }
1827 1.1 drochner
1828 1.1 drochner /*
1829 1.1 drochner * Disable RF auto-tuning.
1830 1.1 drochner */
1831 1.1 drochner Static void
1832 1.1 drochner ural_disable_rf_tune(struct ural_softc *sc)
1833 1.1 drochner {
1834 1.1 drochner uint32_t tmp;
1835 1.1 drochner
1836 1.1 drochner if (sc->rf_rev != RAL_RF_2523) {
1837 1.1 drochner tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1838 1.1 drochner ural_rf_write(sc, RAL_RF1, tmp);
1839 1.1 drochner }
1840 1.1 drochner
1841 1.1 drochner tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1842 1.1 drochner ural_rf_write(sc, RAL_RF3, tmp);
1843 1.1 drochner
1844 1.1 drochner DPRINTFN(2, ("disabling RF autotune\n"));
1845 1.1 drochner }
1846 1.1 drochner
1847 1.1 drochner /*
1848 1.1 drochner * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1849 1.1 drochner * synchronization.
1850 1.1 drochner */
1851 1.1 drochner Static void
1852 1.1 drochner ural_enable_tsf_sync(struct ural_softc *sc)
1853 1.1 drochner {
1854 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1855 1.1 drochner uint16_t logcwmin, preload, tmp;
1856 1.1 drochner
1857 1.1 drochner /* first, disable TSF synchronization */
1858 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, 0);
1859 1.1 drochner
1860 1.1 drochner tmp = (16 * ic->ic_bss->ni_intval) << 4;
1861 1.1 drochner ural_write(sc, RAL_TXRX_CSR18, tmp);
1862 1.1 drochner
1863 1.1 drochner logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1864 1.1 drochner preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1865 1.1 drochner tmp = logcwmin << 12 | preload;
1866 1.1 drochner ural_write(sc, RAL_TXRX_CSR20, tmp);
1867 1.1 drochner
1868 1.1 drochner /* finally, enable TSF synchronization */
1869 1.1 drochner tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1870 1.1 drochner if (ic->ic_opmode == IEEE80211_M_STA)
1871 1.1 drochner tmp |= RAL_ENABLE_TSF_SYNC(1);
1872 1.1 drochner else
1873 1.1 drochner tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1874 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, tmp);
1875 1.1 drochner
1876 1.1 drochner DPRINTF(("enabling TSF synchronization\n"));
1877 1.1 drochner }
1878 1.1 drochner
1879 1.1 drochner Static void
1880 1.12 perry ural_update_slot(struct ifnet *ifp)
1881 1.12 perry {
1882 1.12 perry struct ural_softc *sc = ifp->if_softc;
1883 1.12 perry struct ieee80211com *ic = &sc->sc_ic;
1884 1.12 perry uint16_t slottime, sifs, eifs;
1885 1.12 perry
1886 1.12 perry slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1887 1.12 perry
1888 1.12 perry /*
1889 1.12 perry * These settings may sound a bit inconsistent but this is what the
1890 1.12 perry * reference driver does.
1891 1.12 perry */
1892 1.12 perry if (ic->ic_curmode == IEEE80211_MODE_11B) {
1893 1.12 perry sifs = 16 - RAL_RXTX_TURNAROUND;
1894 1.12 perry eifs = 364;
1895 1.12 perry } else {
1896 1.12 perry sifs = 10 - RAL_RXTX_TURNAROUND;
1897 1.12 perry eifs = 64;
1898 1.12 perry }
1899 1.12 perry
1900 1.12 perry ural_write(sc, RAL_MAC_CSR10, slottime);
1901 1.12 perry ural_write(sc, RAL_MAC_CSR11, sifs);
1902 1.12 perry ural_write(sc, RAL_MAC_CSR12, eifs);
1903 1.12 perry }
1904 1.12 perry
1905 1.12 perry Static void
1906 1.12 perry ural_set_txpreamble(struct ural_softc *sc)
1907 1.12 perry {
1908 1.12 perry uint16_t tmp;
1909 1.12 perry
1910 1.12 perry tmp = ural_read(sc, RAL_TXRX_CSR10);
1911 1.12 perry
1912 1.12 perry tmp &= ~RAL_SHORT_PREAMBLE;
1913 1.12 perry if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1914 1.12 perry tmp |= RAL_SHORT_PREAMBLE;
1915 1.12 perry
1916 1.12 perry ural_write(sc, RAL_TXRX_CSR10, tmp);
1917 1.12 perry }
1918 1.12 perry
1919 1.12 perry Static void
1920 1.12 perry ural_set_basicrates(struct ural_softc *sc)
1921 1.12 perry {
1922 1.12 perry struct ieee80211com *ic = &sc->sc_ic;
1923 1.12 perry
1924 1.12 perry /* update basic rate set */
1925 1.12 perry if (ic->ic_curmode == IEEE80211_MODE_11B) {
1926 1.12 perry /* 11b basic rates: 1, 2Mbps */
1927 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x3);
1928 1.12 perry } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1929 1.12 perry /* 11a basic rates: 6, 12, 24Mbps */
1930 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x150);
1931 1.12 perry } else {
1932 1.12 perry /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1933 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1934 1.12 perry }
1935 1.12 perry }
1936 1.12 perry
1937 1.12 perry Static void
1938 1.1 drochner ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1939 1.1 drochner {
1940 1.1 drochner uint16_t tmp;
1941 1.1 drochner
1942 1.1 drochner tmp = bssid[0] | bssid[1] << 8;
1943 1.1 drochner ural_write(sc, RAL_MAC_CSR5, tmp);
1944 1.1 drochner
1945 1.1 drochner tmp = bssid[2] | bssid[3] << 8;
1946 1.1 drochner ural_write(sc, RAL_MAC_CSR6, tmp);
1947 1.1 drochner
1948 1.1 drochner tmp = bssid[4] | bssid[5] << 8;
1949 1.1 drochner ural_write(sc, RAL_MAC_CSR7, tmp);
1950 1.1 drochner
1951 1.1 drochner DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
1952 1.1 drochner }
1953 1.1 drochner
1954 1.1 drochner Static void
1955 1.1 drochner ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1956 1.1 drochner {
1957 1.1 drochner uint16_t tmp;
1958 1.1 drochner
1959 1.1 drochner tmp = addr[0] | addr[1] << 8;
1960 1.1 drochner ural_write(sc, RAL_MAC_CSR2, tmp);
1961 1.1 drochner
1962 1.1 drochner tmp = addr[2] | addr[3] << 8;
1963 1.1 drochner ural_write(sc, RAL_MAC_CSR3, tmp);
1964 1.1 drochner
1965 1.1 drochner tmp = addr[4] | addr[5] << 8;
1966 1.1 drochner ural_write(sc, RAL_MAC_CSR4, tmp);
1967 1.1 drochner
1968 1.2 drochner DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
1969 1.1 drochner }
1970 1.1 drochner
1971 1.1 drochner Static void
1972 1.1 drochner ural_update_promisc(struct ural_softc *sc)
1973 1.1 drochner {
1974 1.12 perry struct ifnet *ifp = sc->sc_ic.ic_ifp;
1975 1.12 perry uint32_t tmp;
1976 1.1 drochner
1977 1.1 drochner tmp = ural_read(sc, RAL_TXRX_CSR2);
1978 1.1 drochner
1979 1.1 drochner tmp &= ~RAL_DROP_NOT_TO_ME;
1980 1.1 drochner if (!(ifp->if_flags & IFF_PROMISC))
1981 1.1 drochner tmp |= RAL_DROP_NOT_TO_ME;
1982 1.1 drochner
1983 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, tmp);
1984 1.1 drochner
1985 1.1 drochner DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1986 1.1 drochner "entering" : "leaving"));
1987 1.1 drochner }
1988 1.1 drochner
1989 1.1 drochner Static const char *
1990 1.1 drochner ural_get_rf(int rev)
1991 1.1 drochner {
1992 1.1 drochner switch (rev) {
1993 1.1 drochner case RAL_RF_2522: return "RT2522";
1994 1.1 drochner case RAL_RF_2523: return "RT2523";
1995 1.1 drochner case RAL_RF_2524: return "RT2524";
1996 1.1 drochner case RAL_RF_2525: return "RT2525";
1997 1.1 drochner case RAL_RF_2525E: return "RT2525e";
1998 1.1 drochner case RAL_RF_2526: return "RT2526";
1999 1.1 drochner case RAL_RF_5222: return "RT5222";
2000 1.1 drochner default: return "unknown";
2001 1.1 drochner }
2002 1.1 drochner }
2003 1.1 drochner
2004 1.1 drochner Static void
2005 1.1 drochner ural_read_eeprom(struct ural_softc *sc)
2006 1.1 drochner {
2007 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
2008 1.1 drochner uint16_t val;
2009 1.1 drochner
2010 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
2011 1.1 drochner val = le16toh(val);
2012 1.1 drochner sc->rf_rev = (val >> 11) & 0x7;
2013 1.1 drochner sc->hw_radio = (val >> 10) & 0x1;
2014 1.1 drochner sc->led_mode = (val >> 6) & 0x7;
2015 1.1 drochner sc->rx_ant = (val >> 4) & 0x3;
2016 1.1 drochner sc->tx_ant = (val >> 2) & 0x3;
2017 1.1 drochner sc->nb_ant = val & 0x3;
2018 1.1 drochner
2019 1.1 drochner /* read MAC address */
2020 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
2021 1.1 drochner
2022 1.1 drochner /* read default values for BBP registers */
2023 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
2024 1.1 drochner
2025 1.1 drochner /* read Tx power for all b/g channels */
2026 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
2027 1.1 drochner }
2028 1.1 drochner
2029 1.1 drochner Static int
2030 1.1 drochner ural_bbp_init(struct ural_softc *sc)
2031 1.1 drochner {
2032 1.1 drochner #define N(a) (sizeof (a) / sizeof ((a)[0]))
2033 1.1 drochner int i, ntries;
2034 1.1 drochner
2035 1.1 drochner /* wait for BBP to be ready */
2036 1.1 drochner for (ntries = 0; ntries < 100; ntries++) {
2037 1.1 drochner if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
2038 1.1 drochner break;
2039 1.1 drochner DELAY(1000);
2040 1.1 drochner }
2041 1.1 drochner if (ntries == 100) {
2042 1.1 drochner printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev));
2043 1.1 drochner return EIO;
2044 1.1 drochner }
2045 1.1 drochner
2046 1.1 drochner /* initialize BBP registers to default values */
2047 1.1 drochner for (i = 0; i < N(ural_def_bbp); i++)
2048 1.1 drochner ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
2049 1.1 drochner
2050 1.1 drochner #if 0
2051 1.1 drochner /* initialize BBP registers to values stored in EEPROM */
2052 1.1 drochner for (i = 0; i < 16; i++) {
2053 1.1 drochner if (sc->bbp_prom[i].reg == 0xff)
2054 1.1 drochner continue;
2055 1.1 drochner ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2056 1.1 drochner }
2057 1.1 drochner #endif
2058 1.1 drochner
2059 1.1 drochner return 0;
2060 1.1 drochner #undef N
2061 1.1 drochner }
2062 1.1 drochner
2063 1.1 drochner Static void
2064 1.1 drochner ural_set_txantenna(struct ural_softc *sc, int antenna)
2065 1.1 drochner {
2066 1.1 drochner uint16_t tmp;
2067 1.1 drochner uint8_t tx;
2068 1.1 drochner
2069 1.1 drochner tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2070 1.1 drochner if (antenna == 1)
2071 1.1 drochner tx |= RAL_BBP_ANTA;
2072 1.1 drochner else if (antenna == 2)
2073 1.1 drochner tx |= RAL_BBP_ANTB;
2074 1.1 drochner else
2075 1.1 drochner tx |= RAL_BBP_DIVERSITY;
2076 1.1 drochner
2077 1.1 drochner /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2078 1.1 drochner if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2079 1.1 drochner sc->rf_rev == RAL_RF_5222)
2080 1.1 drochner tx |= RAL_BBP_FLIPIQ;
2081 1.1 drochner
2082 1.1 drochner ural_bbp_write(sc, RAL_BBP_TX, tx);
2083 1.1 drochner
2084 1.12 perry /* update values in PHY_CSR5 and PHY_CSR6 */
2085 1.1 drochner tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2086 1.1 drochner ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2087 1.1 drochner
2088 1.1 drochner tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2089 1.1 drochner ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2090 1.1 drochner }
2091 1.1 drochner
2092 1.1 drochner Static void
2093 1.1 drochner ural_set_rxantenna(struct ural_softc *sc, int antenna)
2094 1.1 drochner {
2095 1.1 drochner uint8_t rx;
2096 1.1 drochner
2097 1.1 drochner rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2098 1.1 drochner if (antenna == 1)
2099 1.1 drochner rx |= RAL_BBP_ANTA;
2100 1.1 drochner else if (antenna == 2)
2101 1.1 drochner rx |= RAL_BBP_ANTB;
2102 1.1 drochner else
2103 1.1 drochner rx |= RAL_BBP_DIVERSITY;
2104 1.1 drochner
2105 1.1 drochner /* need to force no I/Q flip for RF 2525e and 2526 */
2106 1.1 drochner if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2107 1.1 drochner rx &= ~RAL_BBP_FLIPIQ;
2108 1.1 drochner
2109 1.1 drochner ural_bbp_write(sc, RAL_BBP_RX, rx);
2110 1.1 drochner }
2111 1.1 drochner
2112 1.1 drochner Static int
2113 1.1 drochner ural_init(struct ifnet *ifp)
2114 1.1 drochner {
2115 1.1 drochner #define N(a) (sizeof (a) / sizeof ((a)[0]))
2116 1.1 drochner struct ural_softc *sc = ifp->if_softc;
2117 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
2118 1.1 drochner struct ieee80211_key *wk;
2119 1.1 drochner struct ural_rx_data *data;
2120 1.12 perry uint16_t tmp;
2121 1.1 drochner usbd_status error;
2122 1.1 drochner int i, ntries;
2123 1.1 drochner
2124 1.12 perry ural_set_testmode(sc);
2125 1.12 perry ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2126 1.12 perry
2127 1.1 drochner ural_stop(ifp, 0);
2128 1.1 drochner
2129 1.1 drochner /* initialize MAC registers to default values */
2130 1.1 drochner for (i = 0; i < N(ural_def_mac); i++)
2131 1.1 drochner ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2132 1.1 drochner
2133 1.1 drochner /* wait for BBP and RF to wake up (this can take a long time!) */
2134 1.1 drochner for (ntries = 0; ntries < 100; ntries++) {
2135 1.1 drochner tmp = ural_read(sc, RAL_MAC_CSR17);
2136 1.1 drochner if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2137 1.1 drochner (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2138 1.1 drochner break;
2139 1.1 drochner DELAY(1000);
2140 1.1 drochner }
2141 1.1 drochner if (ntries == 100) {
2142 1.1 drochner printf("%s: timeout waiting for BBP/RF to wakeup\n",
2143 1.1 drochner USBDEVNAME(sc->sc_dev));
2144 1.1 drochner error = EIO;
2145 1.1 drochner goto fail;
2146 1.1 drochner }
2147 1.1 drochner
2148 1.1 drochner /* we're ready! */
2149 1.1 drochner ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2150 1.1 drochner
2151 1.12 perry /* set basic rate set (will be updated later) */
2152 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2153 1.1 drochner
2154 1.1 drochner error = ural_bbp_init(sc);
2155 1.1 drochner if (error != 0)
2156 1.1 drochner goto fail;
2157 1.1 drochner
2158 1.1 drochner /* set default BSS channel */
2159 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
2160 1.1 drochner
2161 1.1 drochner /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2162 1.12 perry ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2163 1.1 drochner
2164 1.12 perry ural_set_txantenna(sc, sc->tx_ant);
2165 1.12 perry ural_set_rxantenna(sc, sc->rx_ant);
2166 1.1 drochner
2167 1.24 dyoung IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
2168 1.1 drochner ural_set_macaddr(sc, ic->ic_myaddr);
2169 1.1 drochner
2170 1.1 drochner /*
2171 1.1 drochner * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
2172 1.1 drochner */
2173 1.1 drochner for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2174 1.12 perry wk = &ic->ic_crypto.cs_nw_keys[i];
2175 1.4 drochner ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE +
2176 1.4 drochner RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE);
2177 1.1 drochner }
2178 1.1 drochner
2179 1.1 drochner /*
2180 1.12 perry * Allocate xfer for AMRR statistics requests.
2181 1.12 perry */
2182 1.12 perry sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev);
2183 1.12 perry if (sc->amrr_xfer == NULL) {
2184 1.12 perry printf("%s: could not allocate AMRR xfer\n",
2185 1.12 perry USBDEVNAME(sc->sc_dev));
2186 1.12 perry goto fail;
2187 1.12 perry }
2188 1.12 perry
2189 1.12 perry /*
2190 1.1 drochner * Open Tx and Rx USB bulk pipes.
2191 1.1 drochner */
2192 1.1 drochner error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2193 1.1 drochner &sc->sc_tx_pipeh);
2194 1.1 drochner if (error != 0) {
2195 1.1 drochner printf("%s: could not open Tx pipe: %s\n",
2196 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2197 1.1 drochner goto fail;
2198 1.1 drochner }
2199 1.1 drochner
2200 1.1 drochner error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2201 1.1 drochner &sc->sc_rx_pipeh);
2202 1.1 drochner if (error != 0) {
2203 1.1 drochner printf("%s: could not open Rx pipe: %s\n",
2204 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2205 1.1 drochner goto fail;
2206 1.1 drochner }
2207 1.1 drochner
2208 1.1 drochner /*
2209 1.1 drochner * Allocate Tx and Rx xfer queues.
2210 1.1 drochner */
2211 1.1 drochner error = ural_alloc_tx_list(sc);
2212 1.1 drochner if (error != 0) {
2213 1.1 drochner printf("%s: could not allocate Tx list\n",
2214 1.1 drochner USBDEVNAME(sc->sc_dev));
2215 1.1 drochner goto fail;
2216 1.1 drochner }
2217 1.1 drochner
2218 1.1 drochner error = ural_alloc_rx_list(sc);
2219 1.1 drochner if (error != 0) {
2220 1.1 drochner printf("%s: could not allocate Rx list\n",
2221 1.1 drochner USBDEVNAME(sc->sc_dev));
2222 1.1 drochner goto fail;
2223 1.1 drochner }
2224 1.1 drochner
2225 1.1 drochner /*
2226 1.1 drochner * Start up the receive pipe.
2227 1.1 drochner */
2228 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2229 1.1 drochner data = &sc->rx_data[i];
2230 1.1 drochner
2231 1.1 drochner usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2232 1.1 drochner MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2233 1.1 drochner usbd_transfer(data->xfer);
2234 1.1 drochner }
2235 1.1 drochner
2236 1.1 drochner /* kick Rx */
2237 1.1 drochner tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
2238 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2239 1.1 drochner tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
2240 1.1 drochner if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2241 1.1 drochner tmp |= RAL_DROP_TODS;
2242 1.1 drochner if (!(ifp->if_flags & IFF_PROMISC))
2243 1.1 drochner tmp |= RAL_DROP_NOT_TO_ME;
2244 1.1 drochner }
2245 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, tmp);
2246 1.1 drochner
2247 1.1 drochner ifp->if_flags &= ~IFF_OACTIVE;
2248 1.1 drochner ifp->if_flags |= IFF_RUNNING;
2249 1.1 drochner
2250 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2251 1.12 perry if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2252 1.12 perry ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2253 1.12 perry } else
2254 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2255 1.1 drochner
2256 1.1 drochner return 0;
2257 1.1 drochner
2258 1.1 drochner fail: ural_stop(ifp, 1);
2259 1.1 drochner return error;
2260 1.1 drochner #undef N
2261 1.1 drochner }
2262 1.1 drochner
2263 1.1 drochner Static void
2264 1.18 christos ural_stop(struct ifnet *ifp, int disable)
2265 1.1 drochner {
2266 1.1 drochner struct ural_softc *sc = ifp->if_softc;
2267 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
2268 1.1 drochner
2269 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2270 1.1 drochner
2271 1.4 drochner sc->sc_tx_timer = 0;
2272 1.4 drochner ifp->if_timer = 0;
2273 1.4 drochner ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2274 1.4 drochner
2275 1.1 drochner /* disable Rx */
2276 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2277 1.1 drochner
2278 1.1 drochner /* reset ASIC and BBP (but won't reset MAC registers!) */
2279 1.1 drochner ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2280 1.1 drochner ural_write(sc, RAL_MAC_CSR1, 0);
2281 1.1 drochner
2282 1.12 perry if (sc->amrr_xfer != NULL) {
2283 1.12 perry usbd_free_xfer(sc->amrr_xfer);
2284 1.12 perry sc->amrr_xfer = NULL;
2285 1.12 perry }
2286 1.12 perry
2287 1.1 drochner if (sc->sc_rx_pipeh != NULL) {
2288 1.1 drochner usbd_abort_pipe(sc->sc_rx_pipeh);
2289 1.1 drochner usbd_close_pipe(sc->sc_rx_pipeh);
2290 1.1 drochner sc->sc_rx_pipeh = NULL;
2291 1.1 drochner }
2292 1.1 drochner
2293 1.1 drochner if (sc->sc_tx_pipeh != NULL) {
2294 1.1 drochner usbd_abort_pipe(sc->sc_tx_pipeh);
2295 1.1 drochner usbd_close_pipe(sc->sc_tx_pipeh);
2296 1.1 drochner sc->sc_tx_pipeh = NULL;
2297 1.1 drochner }
2298 1.1 drochner
2299 1.1 drochner ural_free_rx_list(sc);
2300 1.1 drochner ural_free_tx_list(sc);
2301 1.1 drochner }
2302 1.1 drochner
2303 1.1 drochner int
2304 1.1 drochner ural_activate(device_ptr_t self, enum devact act)
2305 1.1 drochner {
2306 1.30 cube struct ural_softc *sc = device_private(self);
2307 1.2 drochner
2308 1.1 drochner switch (act) {
2309 1.1 drochner case DVACT_ACTIVATE:
2310 1.1 drochner return EOPNOTSUPP;
2311 1.2 drochner break;
2312 1.1 drochner
2313 1.1 drochner case DVACT_DEACTIVATE:
2314 1.2 drochner if_deactivate(&sc->sc_if);
2315 1.1 drochner break;
2316 1.1 drochner }
2317 1.1 drochner
2318 1.1 drochner return 0;
2319 1.1 drochner }
2320 1.12 perry
2321 1.12 perry Static void
2322 1.12 perry ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
2323 1.12 perry {
2324 1.12 perry int i;
2325 1.12 perry
2326 1.12 perry /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2327 1.12 perry ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2328 1.12 perry
2329 1.17 joerg ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
2330 1.12 perry
2331 1.12 perry /* set rate to some reasonable initial value */
2332 1.12 perry for (i = ni->ni_rates.rs_nrates - 1;
2333 1.12 perry i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
2334 1.12 perry i--);
2335 1.12 perry ni->ni_txrate = i;
2336 1.12 perry
2337 1.22 kiyohara usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2338 1.12 perry }
2339 1.12 perry
2340 1.12 perry Static void
2341 1.12 perry ural_amrr_timeout(void *arg)
2342 1.12 perry {
2343 1.12 perry struct ural_softc *sc = (struct ural_softc *)arg;
2344 1.12 perry usb_device_request_t req;
2345 1.12 perry int s;
2346 1.12 perry
2347 1.12 perry s = splusb();
2348 1.12 perry
2349 1.12 perry /*
2350 1.12 perry * Asynchronously read statistic registers (cleared by read).
2351 1.12 perry */
2352 1.12 perry req.bmRequestType = UT_READ_VENDOR_DEVICE;
2353 1.12 perry req.bRequest = RAL_READ_MULTI_MAC;
2354 1.12 perry USETW(req.wValue, 0);
2355 1.12 perry USETW(req.wIndex, RAL_STA_CSR0);
2356 1.12 perry USETW(req.wLength, sizeof sc->sta);
2357 1.12 perry
2358 1.12 perry usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
2359 1.12 perry USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0,
2360 1.12 perry ural_amrr_update);
2361 1.12 perry (void)usbd_transfer(sc->amrr_xfer);
2362 1.12 perry
2363 1.12 perry splx(s);
2364 1.12 perry }
2365 1.12 perry
2366 1.12 perry Static void
2367 1.18 christos ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv,
2368 1.12 perry usbd_status status)
2369 1.12 perry {
2370 1.12 perry struct ural_softc *sc = (struct ural_softc *)priv;
2371 1.12 perry struct ifnet *ifp = sc->sc_ic.ic_ifp;
2372 1.12 perry
2373 1.12 perry if (status != USBD_NORMAL_COMPLETION) {
2374 1.12 perry printf("%s: could not retrieve Tx statistics - "
2375 1.12 perry "cancelling automatic rate control\n",
2376 1.12 perry USBDEVNAME(sc->sc_dev));
2377 1.12 perry return;
2378 1.12 perry }
2379 1.12 perry
2380 1.12 perry /* count TX retry-fail as Tx errors */
2381 1.12 perry ifp->if_oerrors += sc->sta[9];
2382 1.12 perry
2383 1.17 joerg sc->amn.amn_retrycnt =
2384 1.12 perry sc->sta[7] + /* TX one-retry ok count */
2385 1.12 perry sc->sta[8] + /* TX more-retry ok count */
2386 1.12 perry sc->sta[9]; /* TX retry-fail count */
2387 1.12 perry
2388 1.17 joerg sc->amn.amn_txcnt =
2389 1.17 joerg sc->amn.amn_retrycnt +
2390 1.12 perry sc->sta[6]; /* TX no-retry ok count */
2391 1.12 perry
2392 1.17 joerg ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
2393 1.12 perry
2394 1.22 kiyohara usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2395 1.12 perry }
2396