if_ural.c revision 1.37.4.1 1 1.37.4.1 yamt /* $NetBSD: if_ural.c,v 1.37.4.1 2012/10/30 17:22:05 yamt Exp $ */
2 1.12 perry /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */
3 1.1 drochner
4 1.1 drochner /*-
5 1.12 perry * Copyright (c) 2005, 2006
6 1.1 drochner * Damien Bergamini <damien.bergamini (at) free.fr>
7 1.1 drochner *
8 1.1 drochner * Permission to use, copy, modify, and distribute this software for any
9 1.1 drochner * purpose with or without fee is hereby granted, provided that the above
10 1.1 drochner * copyright notice and this permission notice appear in all copies.
11 1.1 drochner *
12 1.1 drochner * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 1.1 drochner * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 1.1 drochner * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 1.1 drochner * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 1.1 drochner * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 1.1 drochner * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 1.1 drochner * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 1.1 drochner */
20 1.1 drochner
21 1.1 drochner /*-
22 1.1 drochner * Ralink Technology RT2500USB chipset driver
23 1.1 drochner * http://www.ralinktech.com/
24 1.1 drochner */
25 1.1 drochner
26 1.1 drochner #include <sys/cdefs.h>
27 1.37.4.1 yamt __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.37.4.1 2012/10/30 17:22:05 yamt Exp $");
28 1.1 drochner
29 1.1 drochner
30 1.1 drochner #include <sys/param.h>
31 1.1 drochner #include <sys/sockio.h>
32 1.1 drochner #include <sys/sysctl.h>
33 1.1 drochner #include <sys/mbuf.h>
34 1.1 drochner #include <sys/kernel.h>
35 1.1 drochner #include <sys/socket.h>
36 1.1 drochner #include <sys/systm.h>
37 1.1 drochner #include <sys/malloc.h>
38 1.1 drochner #include <sys/conf.h>
39 1.1 drochner #include <sys/device.h>
40 1.1 drochner
41 1.25 ad #include <sys/bus.h>
42 1.1 drochner #include <machine/endian.h>
43 1.25 ad #include <sys/intr.h>
44 1.1 drochner
45 1.1 drochner #include <net/bpf.h>
46 1.1 drochner #include <net/if.h>
47 1.1 drochner #include <net/if_arp.h>
48 1.1 drochner #include <net/if_dl.h>
49 1.1 drochner #include <net/if_ether.h>
50 1.1 drochner #include <net/if_media.h>
51 1.1 drochner #include <net/if_types.h>
52 1.1 drochner
53 1.1 drochner #include <netinet/in.h>
54 1.1 drochner #include <netinet/in_systm.h>
55 1.1 drochner #include <netinet/in_var.h>
56 1.1 drochner #include <netinet/ip.h>
57 1.1 drochner
58 1.2 drochner #include <net80211/ieee80211_netbsd.h>
59 1.1 drochner #include <net80211/ieee80211_var.h>
60 1.17 joerg #include <net80211/ieee80211_amrr.h>
61 1.1 drochner #include <net80211/ieee80211_radiotap.h>
62 1.1 drochner
63 1.1 drochner #include <dev/usb/usb.h>
64 1.1 drochner #include <dev/usb/usbdi.h>
65 1.1 drochner #include <dev/usb/usbdi_util.h>
66 1.1 drochner #include <dev/usb/usbdevs.h>
67 1.1 drochner
68 1.1 drochner #include <dev/usb/if_uralreg.h>
69 1.1 drochner #include <dev/usb/if_uralvar.h>
70 1.1 drochner
71 1.1 drochner #ifdef USB_DEBUG
72 1.1 drochner #define URAL_DEBUG
73 1.1 drochner #endif
74 1.1 drochner
75 1.1 drochner #ifdef URAL_DEBUG
76 1.36 dyoung #define DPRINTF(x) do { if (ural_debug) printf x; } while (0)
77 1.36 dyoung #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0)
78 1.1 drochner int ural_debug = 0;
79 1.1 drochner #else
80 1.1 drochner #define DPRINTF(x)
81 1.1 drochner #define DPRINTFN(n, x)
82 1.1 drochner #endif
83 1.1 drochner
84 1.1 drochner /* various supported device vendors/products */
85 1.1 drochner static const struct usb_devno ural_devs[] = {
86 1.1 drochner { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G },
87 1.1 drochner { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 },
88 1.2 drochner { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
89 1.4 drochner { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G },
90 1.4 drochner { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP },
91 1.21 xtraeme { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS },
92 1.1 drochner { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU },
93 1.1 drochner { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
94 1.4 drochner { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
95 1.4 drochner { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
96 1.1 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
97 1.1 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
98 1.4 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
99 1.21 xtraeme { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI },
100 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 },
101 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 },
102 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 },
103 1.21 xtraeme { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W },
104 1.1 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
105 1.1 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
106 1.4 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
107 1.1 drochner { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG },
108 1.21 xtraeme { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R },
109 1.4 drochner { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G },
110 1.4 drochner { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
111 1.4 drochner { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 },
112 1.1 drochner };
113 1.1 drochner
114 1.1 drochner Static int ural_alloc_tx_list(struct ural_softc *);
115 1.1 drochner Static void ural_free_tx_list(struct ural_softc *);
116 1.1 drochner Static int ural_alloc_rx_list(struct ural_softc *);
117 1.1 drochner Static void ural_free_rx_list(struct ural_softc *);
118 1.1 drochner Static int ural_media_change(struct ifnet *);
119 1.1 drochner Static void ural_next_scan(void *);
120 1.1 drochner Static void ural_task(void *);
121 1.1 drochner Static int ural_newstate(struct ieee80211com *,
122 1.1 drochner enum ieee80211_state, int);
123 1.12 perry Static int ural_rxrate(struct ural_rx_desc *);
124 1.1 drochner Static void ural_txeof(usbd_xfer_handle, usbd_private_handle,
125 1.1 drochner usbd_status);
126 1.1 drochner Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle,
127 1.1 drochner usbd_status);
128 1.12 perry Static int ural_ack_rate(struct ieee80211com *, int);
129 1.1 drochner Static uint16_t ural_txtime(int, int, uint32_t);
130 1.1 drochner Static uint8_t ural_plcp_signal(int);
131 1.1 drochner Static void ural_setup_tx_desc(struct ural_softc *,
132 1.1 drochner struct ural_tx_desc *, uint32_t, int, int);
133 1.1 drochner Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
134 1.1 drochner struct ieee80211_node *);
135 1.1 drochner Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
136 1.1 drochner struct ieee80211_node *);
137 1.1 drochner Static int ural_tx_data(struct ural_softc *, struct mbuf *,
138 1.1 drochner struct ieee80211_node *);
139 1.1 drochner Static void ural_start(struct ifnet *);
140 1.1 drochner Static void ural_watchdog(struct ifnet *);
141 1.12 perry Static int ural_reset(struct ifnet *);
142 1.19 christos Static int ural_ioctl(struct ifnet *, u_long, void *);
143 1.12 perry Static void ural_set_testmode(struct ural_softc *);
144 1.1 drochner Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
145 1.1 drochner int);
146 1.1 drochner Static uint16_t ural_read(struct ural_softc *, uint16_t);
147 1.1 drochner Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
148 1.1 drochner int);
149 1.1 drochner Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
150 1.1 drochner Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
151 1.1 drochner int);
152 1.1 drochner Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
153 1.1 drochner Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
154 1.1 drochner Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
155 1.1 drochner Static void ural_set_chan(struct ural_softc *,
156 1.1 drochner struct ieee80211_channel *);
157 1.1 drochner Static void ural_disable_rf_tune(struct ural_softc *);
158 1.1 drochner Static void ural_enable_tsf_sync(struct ural_softc *);
159 1.12 perry Static void ural_update_slot(struct ifnet *);
160 1.12 perry Static void ural_set_txpreamble(struct ural_softc *);
161 1.12 perry Static void ural_set_basicrates(struct ural_softc *);
162 1.1 drochner Static void ural_set_bssid(struct ural_softc *, uint8_t *);
163 1.1 drochner Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
164 1.1 drochner Static void ural_update_promisc(struct ural_softc *);
165 1.1 drochner Static const char *ural_get_rf(int);
166 1.1 drochner Static void ural_read_eeprom(struct ural_softc *);
167 1.1 drochner Static int ural_bbp_init(struct ural_softc *);
168 1.1 drochner Static void ural_set_txantenna(struct ural_softc *, int);
169 1.1 drochner Static void ural_set_rxantenna(struct ural_softc *, int);
170 1.1 drochner Static int ural_init(struct ifnet *);
171 1.1 drochner Static void ural_stop(struct ifnet *, int);
172 1.12 perry Static void ural_amrr_start(struct ural_softc *,
173 1.12 perry struct ieee80211_node *);
174 1.12 perry Static void ural_amrr_timeout(void *);
175 1.12 perry Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle,
176 1.12 perry usbd_status status);
177 1.1 drochner
178 1.1 drochner /*
179 1.1 drochner * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
180 1.1 drochner */
181 1.1 drochner static const struct ieee80211_rateset ural_rateset_11a =
182 1.1 drochner { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
183 1.1 drochner
184 1.1 drochner static const struct ieee80211_rateset ural_rateset_11b =
185 1.1 drochner { 4, { 2, 4, 11, 22 } };
186 1.1 drochner
187 1.1 drochner static const struct ieee80211_rateset ural_rateset_11g =
188 1.1 drochner { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
189 1.1 drochner
190 1.1 drochner /*
191 1.1 drochner * Default values for MAC registers; values taken from the reference driver.
192 1.1 drochner */
193 1.1 drochner static const struct {
194 1.1 drochner uint16_t reg;
195 1.1 drochner uint16_t val;
196 1.1 drochner } ural_def_mac[] = {
197 1.1 drochner { RAL_TXRX_CSR5, 0x8c8d },
198 1.1 drochner { RAL_TXRX_CSR6, 0x8b8a },
199 1.1 drochner { RAL_TXRX_CSR7, 0x8687 },
200 1.1 drochner { RAL_TXRX_CSR8, 0x0085 },
201 1.1 drochner { RAL_MAC_CSR13, 0x1111 },
202 1.1 drochner { RAL_MAC_CSR14, 0x1e11 },
203 1.1 drochner { RAL_TXRX_CSR21, 0xe78f },
204 1.1 drochner { RAL_MAC_CSR9, 0xff1d },
205 1.1 drochner { RAL_MAC_CSR11, 0x0002 },
206 1.1 drochner { RAL_MAC_CSR22, 0x0053 },
207 1.1 drochner { RAL_MAC_CSR15, 0x0000 },
208 1.1 drochner { RAL_MAC_CSR8, 0x0780 },
209 1.1 drochner { RAL_TXRX_CSR19, 0x0000 },
210 1.1 drochner { RAL_TXRX_CSR18, 0x005a },
211 1.1 drochner { RAL_PHY_CSR2, 0x0000 },
212 1.1 drochner { RAL_TXRX_CSR0, 0x1ec0 },
213 1.1 drochner { RAL_PHY_CSR4, 0x000f }
214 1.1 drochner };
215 1.1 drochner
216 1.1 drochner /*
217 1.1 drochner * Default values for BBP registers; values taken from the reference driver.
218 1.1 drochner */
219 1.1 drochner static const struct {
220 1.1 drochner uint8_t reg;
221 1.1 drochner uint8_t val;
222 1.1 drochner } ural_def_bbp[] = {
223 1.1 drochner { 3, 0x02 },
224 1.1 drochner { 4, 0x19 },
225 1.1 drochner { 14, 0x1c },
226 1.1 drochner { 15, 0x30 },
227 1.1 drochner { 16, 0xac },
228 1.1 drochner { 17, 0x48 },
229 1.1 drochner { 18, 0x18 },
230 1.1 drochner { 19, 0xff },
231 1.1 drochner { 20, 0x1e },
232 1.1 drochner { 21, 0x08 },
233 1.1 drochner { 22, 0x08 },
234 1.1 drochner { 23, 0x08 },
235 1.1 drochner { 24, 0x80 },
236 1.1 drochner { 25, 0x50 },
237 1.1 drochner { 26, 0x08 },
238 1.1 drochner { 27, 0x23 },
239 1.1 drochner { 30, 0x10 },
240 1.1 drochner { 31, 0x2b },
241 1.1 drochner { 32, 0xb9 },
242 1.1 drochner { 34, 0x12 },
243 1.1 drochner { 35, 0x50 },
244 1.1 drochner { 39, 0xc4 },
245 1.1 drochner { 40, 0x02 },
246 1.1 drochner { 41, 0x60 },
247 1.1 drochner { 53, 0x10 },
248 1.1 drochner { 54, 0x18 },
249 1.1 drochner { 56, 0x08 },
250 1.1 drochner { 57, 0x10 },
251 1.1 drochner { 58, 0x08 },
252 1.1 drochner { 61, 0x60 },
253 1.1 drochner { 62, 0x10 },
254 1.1 drochner { 75, 0xff }
255 1.1 drochner };
256 1.1 drochner
257 1.1 drochner /*
258 1.1 drochner * Default values for RF register R2 indexed by channel numbers.
259 1.1 drochner */
260 1.1 drochner static const uint32_t ural_rf2522_r2[] = {
261 1.1 drochner 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
262 1.1 drochner 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
263 1.1 drochner };
264 1.1 drochner
265 1.1 drochner static const uint32_t ural_rf2523_r2[] = {
266 1.1 drochner 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
267 1.1 drochner 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
268 1.1 drochner };
269 1.1 drochner
270 1.1 drochner static const uint32_t ural_rf2524_r2[] = {
271 1.1 drochner 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
272 1.1 drochner 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
273 1.1 drochner };
274 1.1 drochner
275 1.1 drochner static const uint32_t ural_rf2525_r2[] = {
276 1.1 drochner 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
277 1.1 drochner 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
278 1.1 drochner };
279 1.1 drochner
280 1.1 drochner static const uint32_t ural_rf2525_hi_r2[] = {
281 1.1 drochner 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
282 1.1 drochner 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
283 1.1 drochner };
284 1.1 drochner
285 1.1 drochner static const uint32_t ural_rf2525e_r2[] = {
286 1.1 drochner 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
287 1.1 drochner 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
288 1.1 drochner };
289 1.1 drochner
290 1.1 drochner static const uint32_t ural_rf2526_hi_r2[] = {
291 1.1 drochner 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
292 1.1 drochner 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
293 1.1 drochner };
294 1.1 drochner
295 1.1 drochner static const uint32_t ural_rf2526_r2[] = {
296 1.1 drochner 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
297 1.1 drochner 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
298 1.1 drochner };
299 1.1 drochner
300 1.1 drochner /*
301 1.1 drochner * For dual-band RF, RF registers R1 and R4 also depend on channel number;
302 1.1 drochner * values taken from the reference driver.
303 1.1 drochner */
304 1.1 drochner static const struct {
305 1.1 drochner uint8_t chan;
306 1.1 drochner uint32_t r1;
307 1.1 drochner uint32_t r2;
308 1.1 drochner uint32_t r4;
309 1.1 drochner } ural_rf5222[] = {
310 1.1 drochner { 1, 0x08808, 0x0044d, 0x00282 },
311 1.1 drochner { 2, 0x08808, 0x0044e, 0x00282 },
312 1.1 drochner { 3, 0x08808, 0x0044f, 0x00282 },
313 1.1 drochner { 4, 0x08808, 0x00460, 0x00282 },
314 1.1 drochner { 5, 0x08808, 0x00461, 0x00282 },
315 1.1 drochner { 6, 0x08808, 0x00462, 0x00282 },
316 1.1 drochner { 7, 0x08808, 0x00463, 0x00282 },
317 1.1 drochner { 8, 0x08808, 0x00464, 0x00282 },
318 1.1 drochner { 9, 0x08808, 0x00465, 0x00282 },
319 1.1 drochner { 10, 0x08808, 0x00466, 0x00282 },
320 1.1 drochner { 11, 0x08808, 0x00467, 0x00282 },
321 1.1 drochner { 12, 0x08808, 0x00468, 0x00282 },
322 1.1 drochner { 13, 0x08808, 0x00469, 0x00282 },
323 1.1 drochner { 14, 0x08808, 0x0046b, 0x00286 },
324 1.1 drochner
325 1.1 drochner { 36, 0x08804, 0x06225, 0x00287 },
326 1.1 drochner { 40, 0x08804, 0x06226, 0x00287 },
327 1.1 drochner { 44, 0x08804, 0x06227, 0x00287 },
328 1.1 drochner { 48, 0x08804, 0x06228, 0x00287 },
329 1.1 drochner { 52, 0x08804, 0x06229, 0x00287 },
330 1.1 drochner { 56, 0x08804, 0x0622a, 0x00287 },
331 1.1 drochner { 60, 0x08804, 0x0622b, 0x00287 },
332 1.1 drochner { 64, 0x08804, 0x0622c, 0x00287 },
333 1.1 drochner
334 1.1 drochner { 100, 0x08804, 0x02200, 0x00283 },
335 1.1 drochner { 104, 0x08804, 0x02201, 0x00283 },
336 1.1 drochner { 108, 0x08804, 0x02202, 0x00283 },
337 1.1 drochner { 112, 0x08804, 0x02203, 0x00283 },
338 1.1 drochner { 116, 0x08804, 0x02204, 0x00283 },
339 1.1 drochner { 120, 0x08804, 0x02205, 0x00283 },
340 1.1 drochner { 124, 0x08804, 0x02206, 0x00283 },
341 1.1 drochner { 128, 0x08804, 0x02207, 0x00283 },
342 1.1 drochner { 132, 0x08804, 0x02208, 0x00283 },
343 1.1 drochner { 136, 0x08804, 0x02209, 0x00283 },
344 1.1 drochner { 140, 0x08804, 0x0220a, 0x00283 },
345 1.1 drochner
346 1.1 drochner { 149, 0x08808, 0x02429, 0x00281 },
347 1.1 drochner { 153, 0x08808, 0x0242b, 0x00281 },
348 1.1 drochner { 157, 0x08808, 0x0242d, 0x00281 },
349 1.1 drochner { 161, 0x08808, 0x0242f, 0x00281 }
350 1.1 drochner };
351 1.1 drochner
352 1.36 dyoung int ural_match(device_t, cfdata_t, void *);
353 1.36 dyoung void ural_attach(device_t, device_t, void *);
354 1.36 dyoung int ural_detach(device_t, int);
355 1.36 dyoung int ural_activate(device_t, enum devact);
356 1.36 dyoung extern struct cfdriver ural_cd;
357 1.36 dyoung CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate);
358 1.1 drochner
359 1.36 dyoung int
360 1.36 dyoung ural_match(device_t parent, cfdata_t match, void *aux)
361 1.1 drochner {
362 1.36 dyoung struct usb_attach_arg *uaa = aux;
363 1.1 drochner
364 1.1 drochner return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
365 1.1 drochner UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
366 1.1 drochner }
367 1.1 drochner
368 1.36 dyoung void
369 1.36 dyoung ural_attach(device_t parent, device_t self, void *aux)
370 1.1 drochner {
371 1.36 dyoung struct ural_softc *sc = device_private(self);
372 1.36 dyoung struct usb_attach_arg *uaa = aux;
373 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
374 1.2 drochner struct ifnet *ifp = &sc->sc_if;
375 1.1 drochner usb_interface_descriptor_t *id;
376 1.1 drochner usb_endpoint_descriptor_t *ed;
377 1.1 drochner usbd_status error;
378 1.1 drochner char *devinfop;
379 1.1 drochner int i;
380 1.1 drochner
381 1.30 cube sc->sc_dev = self;
382 1.1 drochner sc->sc_udev = uaa->device;
383 1.1 drochner
384 1.32 plunky aprint_naive("\n");
385 1.32 plunky aprint_normal("\n");
386 1.32 plunky
387 1.1 drochner devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
388 1.30 cube aprint_normal_dev(self, "%s\n", devinfop);
389 1.1 drochner usbd_devinfo_free(devinfop);
390 1.1 drochner
391 1.1 drochner if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
392 1.30 cube aprint_error_dev(self, "could not set configuration no\n");
393 1.36 dyoung return;
394 1.1 drochner }
395 1.1 drochner
396 1.1 drochner /* get the first interface handle */
397 1.1 drochner error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
398 1.1 drochner &sc->sc_iface);
399 1.1 drochner if (error != 0) {
400 1.30 cube aprint_error_dev(self, "could not get interface handle\n");
401 1.36 dyoung return;
402 1.1 drochner }
403 1.1 drochner
404 1.1 drochner /*
405 1.1 drochner * Find endpoints.
406 1.1 drochner */
407 1.1 drochner id = usbd_get_interface_descriptor(sc->sc_iface);
408 1.1 drochner
409 1.1 drochner sc->sc_rx_no = sc->sc_tx_no = -1;
410 1.1 drochner for (i = 0; i < id->bNumEndpoints; i++) {
411 1.1 drochner ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
412 1.1 drochner if (ed == NULL) {
413 1.30 cube aprint_error_dev(self,
414 1.30 cube "no endpoint descriptor for %d\n", i);
415 1.36 dyoung return;
416 1.1 drochner }
417 1.1 drochner
418 1.1 drochner if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
419 1.1 drochner UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
420 1.1 drochner sc->sc_rx_no = ed->bEndpointAddress;
421 1.1 drochner else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
422 1.1 drochner UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
423 1.1 drochner sc->sc_tx_no = ed->bEndpointAddress;
424 1.1 drochner }
425 1.1 drochner if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
426 1.30 cube aprint_error_dev(self, "missing endpoint\n");
427 1.36 dyoung return;
428 1.1 drochner }
429 1.1 drochner
430 1.1 drochner usb_init_task(&sc->sc_task, ural_task, sc);
431 1.36 dyoung callout_init(&sc->sc_scan_ch, 0);
432 1.17 joerg sc->amrr.amrr_min_success_threshold = 1;
433 1.29 nakayama sc->amrr.amrr_max_success_threshold = 15;
434 1.36 dyoung callout_init(&sc->sc_amrr_ch, 0);
435 1.1 drochner
436 1.1 drochner /* retrieve RT2570 rev. no */
437 1.1 drochner sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
438 1.1 drochner
439 1.1 drochner /* retrieve MAC address and various other things from EEPROM */
440 1.1 drochner ural_read_eeprom(sc);
441 1.1 drochner
442 1.30 cube aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
443 1.30 cube sc->asic_rev, ural_get_rf(sc->rf_rev));
444 1.12 perry
445 1.12 perry ifp->if_softc = sc;
446 1.36 dyoung memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
447 1.12 perry ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
448 1.12 perry ifp->if_init = ural_init;
449 1.12 perry ifp->if_ioctl = ural_ioctl;
450 1.12 perry ifp->if_start = ural_start;
451 1.12 perry ifp->if_watchdog = ural_watchdog;
452 1.12 perry IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
453 1.12 perry IFQ_SET_READY(&ifp->if_snd);
454 1.1 drochner
455 1.2 drochner ic->ic_ifp = ifp;
456 1.1 drochner ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
457 1.1 drochner ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
458 1.1 drochner ic->ic_state = IEEE80211_S_INIT;
459 1.1 drochner
460 1.1 drochner /* set device capabilities */
461 1.12 perry ic->ic_caps =
462 1.12 perry IEEE80211_C_IBSS | /* IBSS mode supported */
463 1.12 perry IEEE80211_C_MONITOR | /* monitor mode supported */
464 1.12 perry IEEE80211_C_HOSTAP | /* HostAp mode supported */
465 1.12 perry IEEE80211_C_TXPMGT | /* tx power management */
466 1.12 perry IEEE80211_C_SHPREAMBLE | /* short preamble supported */
467 1.12 perry IEEE80211_C_SHSLOT | /* short slot time supported */
468 1.12 perry IEEE80211_C_WPA; /* 802.11i */
469 1.1 drochner
470 1.1 drochner if (sc->rf_rev == RAL_RF_5222) {
471 1.1 drochner /* set supported .11a rates */
472 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a;
473 1.1 drochner
474 1.1 drochner /* set supported .11a channels */
475 1.1 drochner for (i = 36; i <= 64; i += 4) {
476 1.1 drochner ic->ic_channels[i].ic_freq =
477 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
478 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
479 1.1 drochner }
480 1.1 drochner for (i = 100; i <= 140; i += 4) {
481 1.1 drochner ic->ic_channels[i].ic_freq =
482 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
483 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
484 1.1 drochner }
485 1.1 drochner for (i = 149; i <= 161; i += 4) {
486 1.1 drochner ic->ic_channels[i].ic_freq =
487 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
488 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
489 1.1 drochner }
490 1.1 drochner }
491 1.1 drochner
492 1.1 drochner /* set supported .11b and .11g rates */
493 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b;
494 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g;
495 1.1 drochner
496 1.1 drochner /* set supported .11b and .11g channels (1 through 14) */
497 1.1 drochner for (i = 1; i <= 14; i++) {
498 1.1 drochner ic->ic_channels[i].ic_freq =
499 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
500 1.1 drochner ic->ic_channels[i].ic_flags =
501 1.1 drochner IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
502 1.1 drochner IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
503 1.1 drochner }
504 1.1 drochner
505 1.1 drochner if_attach(ifp);
506 1.1 drochner ieee80211_ifattach(ic);
507 1.12 perry ic->ic_reset = ural_reset;
508 1.1 drochner
509 1.1 drochner /* override state transition machine */
510 1.1 drochner sc->sc_newstate = ic->ic_newstate;
511 1.1 drochner ic->ic_newstate = ural_newstate;
512 1.1 drochner ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
513 1.1 drochner
514 1.35 joerg bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
515 1.1 drochner sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
516 1.1 drochner
517 1.1 drochner sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
518 1.1 drochner sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
519 1.1 drochner sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
520 1.1 drochner
521 1.1 drochner sc->sc_txtap_len = sizeof sc->sc_txtapu;
522 1.1 drochner sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
523 1.1 drochner sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
524 1.1 drochner
525 1.4 drochner ieee80211_announce(ic);
526 1.4 drochner
527 1.1 drochner usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
528 1.36 dyoung sc->sc_dev);
529 1.1 drochner
530 1.36 dyoung return;
531 1.1 drochner }
532 1.1 drochner
533 1.36 dyoung int
534 1.36 dyoung ural_detach(device_t self, int flags)
535 1.1 drochner {
536 1.36 dyoung struct ural_softc *sc = device_private(self);
537 1.2 drochner struct ieee80211com *ic = &sc->sc_ic;
538 1.2 drochner struct ifnet *ifp = &sc->sc_if;
539 1.1 drochner int s;
540 1.1 drochner
541 1.1 drochner s = splusb();
542 1.1 drochner
543 1.12 perry ural_stop(ifp, 1);
544 1.1 drochner usb_rem_task(sc->sc_udev, &sc->sc_task);
545 1.36 dyoung callout_stop(&sc->sc_scan_ch);
546 1.36 dyoung callout_stop(&sc->sc_amrr_ch);
547 1.12 perry
548 1.12 perry if (sc->amrr_xfer != NULL) {
549 1.12 perry usbd_free_xfer(sc->amrr_xfer);
550 1.12 perry sc->amrr_xfer = NULL;
551 1.12 perry }
552 1.1 drochner
553 1.1 drochner if (sc->sc_rx_pipeh != NULL) {
554 1.1 drochner usbd_abort_pipe(sc->sc_rx_pipeh);
555 1.1 drochner usbd_close_pipe(sc->sc_rx_pipeh);
556 1.1 drochner }
557 1.1 drochner
558 1.1 drochner if (sc->sc_tx_pipeh != NULL) {
559 1.1 drochner usbd_abort_pipe(sc->sc_tx_pipeh);
560 1.1 drochner usbd_close_pipe(sc->sc_tx_pipeh);
561 1.1 drochner }
562 1.1 drochner
563 1.35 joerg bpf_detach(ifp);
564 1.2 drochner ieee80211_ifdetach(ic);
565 1.1 drochner if_detach(ifp);
566 1.1 drochner
567 1.1 drochner splx(s);
568 1.1 drochner
569 1.1 drochner usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
570 1.36 dyoung sc->sc_dev);
571 1.1 drochner
572 1.1 drochner return 0;
573 1.1 drochner }
574 1.1 drochner
575 1.1 drochner Static int
576 1.1 drochner ural_alloc_tx_list(struct ural_softc *sc)
577 1.1 drochner {
578 1.1 drochner struct ural_tx_data *data;
579 1.1 drochner int i, error;
580 1.1 drochner
581 1.1 drochner sc->tx_queued = 0;
582 1.1 drochner
583 1.1 drochner for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
584 1.1 drochner data = &sc->tx_data[i];
585 1.1 drochner
586 1.1 drochner data->sc = sc;
587 1.1 drochner
588 1.1 drochner data->xfer = usbd_alloc_xfer(sc->sc_udev);
589 1.1 drochner if (data->xfer == NULL) {
590 1.1 drochner printf("%s: could not allocate tx xfer\n",
591 1.36 dyoung device_xname(sc->sc_dev));
592 1.1 drochner error = ENOMEM;
593 1.1 drochner goto fail;
594 1.1 drochner }
595 1.1 drochner
596 1.1 drochner data->buf = usbd_alloc_buffer(data->xfer,
597 1.1 drochner RAL_TX_DESC_SIZE + MCLBYTES);
598 1.1 drochner if (data->buf == NULL) {
599 1.1 drochner printf("%s: could not allocate tx buffer\n",
600 1.36 dyoung device_xname(sc->sc_dev));
601 1.1 drochner error = ENOMEM;
602 1.1 drochner goto fail;
603 1.1 drochner }
604 1.1 drochner }
605 1.1 drochner
606 1.1 drochner return 0;
607 1.1 drochner
608 1.1 drochner fail: ural_free_tx_list(sc);
609 1.1 drochner return error;
610 1.1 drochner }
611 1.1 drochner
612 1.1 drochner Static void
613 1.1 drochner ural_free_tx_list(struct ural_softc *sc)
614 1.1 drochner {
615 1.1 drochner struct ural_tx_data *data;
616 1.1 drochner int i;
617 1.1 drochner
618 1.1 drochner for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
619 1.1 drochner data = &sc->tx_data[i];
620 1.1 drochner
621 1.1 drochner if (data->xfer != NULL) {
622 1.1 drochner usbd_free_xfer(data->xfer);
623 1.1 drochner data->xfer = NULL;
624 1.1 drochner }
625 1.1 drochner
626 1.1 drochner if (data->ni != NULL) {
627 1.1 drochner ieee80211_free_node(data->ni);
628 1.1 drochner data->ni = NULL;
629 1.1 drochner }
630 1.1 drochner }
631 1.1 drochner }
632 1.1 drochner
633 1.1 drochner Static int
634 1.1 drochner ural_alloc_rx_list(struct ural_softc *sc)
635 1.1 drochner {
636 1.1 drochner struct ural_rx_data *data;
637 1.1 drochner int i, error;
638 1.1 drochner
639 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
640 1.1 drochner data = &sc->rx_data[i];
641 1.1 drochner
642 1.1 drochner data->sc = sc;
643 1.1 drochner
644 1.1 drochner data->xfer = usbd_alloc_xfer(sc->sc_udev);
645 1.1 drochner if (data->xfer == NULL) {
646 1.1 drochner printf("%s: could not allocate rx xfer\n",
647 1.36 dyoung device_xname(sc->sc_dev));
648 1.1 drochner error = ENOMEM;
649 1.1 drochner goto fail;
650 1.1 drochner }
651 1.1 drochner
652 1.1 drochner if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
653 1.1 drochner printf("%s: could not allocate rx buffer\n",
654 1.36 dyoung device_xname(sc->sc_dev));
655 1.1 drochner error = ENOMEM;
656 1.1 drochner goto fail;
657 1.1 drochner }
658 1.1 drochner
659 1.1 drochner MGETHDR(data->m, M_DONTWAIT, MT_DATA);
660 1.1 drochner if (data->m == NULL) {
661 1.1 drochner printf("%s: could not allocate rx mbuf\n",
662 1.36 dyoung device_xname(sc->sc_dev));
663 1.1 drochner error = ENOMEM;
664 1.1 drochner goto fail;
665 1.1 drochner }
666 1.1 drochner
667 1.1 drochner MCLGET(data->m, M_DONTWAIT);
668 1.1 drochner if (!(data->m->m_flags & M_EXT)) {
669 1.1 drochner printf("%s: could not allocate rx mbuf cluster\n",
670 1.36 dyoung device_xname(sc->sc_dev));
671 1.1 drochner error = ENOMEM;
672 1.1 drochner goto fail;
673 1.1 drochner }
674 1.1 drochner
675 1.1 drochner data->buf = mtod(data->m, uint8_t *);
676 1.1 drochner }
677 1.1 drochner
678 1.1 drochner return 0;
679 1.1 drochner
680 1.1 drochner fail: ural_free_tx_list(sc);
681 1.1 drochner return error;
682 1.1 drochner }
683 1.1 drochner
684 1.1 drochner Static void
685 1.1 drochner ural_free_rx_list(struct ural_softc *sc)
686 1.1 drochner {
687 1.1 drochner struct ural_rx_data *data;
688 1.1 drochner int i;
689 1.1 drochner
690 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
691 1.1 drochner data = &sc->rx_data[i];
692 1.1 drochner
693 1.1 drochner if (data->xfer != NULL) {
694 1.1 drochner usbd_free_xfer(data->xfer);
695 1.1 drochner data->xfer = NULL;
696 1.1 drochner }
697 1.1 drochner
698 1.1 drochner if (data->m != NULL) {
699 1.1 drochner m_freem(data->m);
700 1.1 drochner data->m = NULL;
701 1.1 drochner }
702 1.1 drochner }
703 1.1 drochner }
704 1.1 drochner
705 1.1 drochner Static int
706 1.1 drochner ural_media_change(struct ifnet *ifp)
707 1.1 drochner {
708 1.1 drochner int error;
709 1.1 drochner
710 1.1 drochner error = ieee80211_media_change(ifp);
711 1.1 drochner if (error != ENETRESET)
712 1.1 drochner return error;
713 1.1 drochner
714 1.1 drochner if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
715 1.1 drochner ural_init(ifp);
716 1.1 drochner
717 1.1 drochner return 0;
718 1.1 drochner }
719 1.1 drochner
720 1.1 drochner /*
721 1.1 drochner * This function is called periodically (every 200ms) during scanning to
722 1.1 drochner * switch from one channel to another.
723 1.1 drochner */
724 1.1 drochner Static void
725 1.1 drochner ural_next_scan(void *arg)
726 1.1 drochner {
727 1.1 drochner struct ural_softc *sc = arg;
728 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
729 1.1 drochner
730 1.1 drochner if (ic->ic_state == IEEE80211_S_SCAN)
731 1.1 drochner ieee80211_next_scan(ic);
732 1.1 drochner }
733 1.1 drochner
734 1.1 drochner Static void
735 1.1 drochner ural_task(void *arg)
736 1.1 drochner {
737 1.1 drochner struct ural_softc *sc = arg;
738 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
739 1.1 drochner enum ieee80211_state ostate;
740 1.12 perry struct ieee80211_node *ni;
741 1.1 drochner struct mbuf *m;
742 1.1 drochner
743 1.1 drochner ostate = ic->ic_state;
744 1.1 drochner
745 1.1 drochner switch (sc->sc_state) {
746 1.1 drochner case IEEE80211_S_INIT:
747 1.1 drochner if (ostate == IEEE80211_S_RUN) {
748 1.1 drochner /* abort TSF synchronization */
749 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, 0);
750 1.1 drochner
751 1.1 drochner /* force tx led to stop blinking */
752 1.1 drochner ural_write(sc, RAL_MAC_CSR20, 0);
753 1.1 drochner }
754 1.1 drochner break;
755 1.1 drochner
756 1.1 drochner case IEEE80211_S_SCAN:
757 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
758 1.36 dyoung callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc);
759 1.1 drochner break;
760 1.1 drochner
761 1.1 drochner case IEEE80211_S_AUTH:
762 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
763 1.1 drochner break;
764 1.1 drochner
765 1.1 drochner case IEEE80211_S_ASSOC:
766 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
767 1.1 drochner break;
768 1.1 drochner
769 1.1 drochner case IEEE80211_S_RUN:
770 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
771 1.1 drochner
772 1.12 perry ni = ic->ic_bss;
773 1.12 perry
774 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR) {
775 1.12 perry ural_update_slot(ic->ic_ifp);
776 1.12 perry ural_set_txpreamble(sc);
777 1.12 perry ural_set_basicrates(sc);
778 1.12 perry ural_set_bssid(sc, ni->ni_bssid);
779 1.12 perry }
780 1.1 drochner
781 1.1 drochner if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
782 1.1 drochner ic->ic_opmode == IEEE80211_M_IBSS) {
783 1.12 perry m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
784 1.1 drochner if (m == NULL) {
785 1.1 drochner printf("%s: could not allocate beacon\n",
786 1.36 dyoung device_xname(sc->sc_dev));
787 1.1 drochner return;
788 1.1 drochner }
789 1.1 drochner
790 1.12 perry if (ural_tx_bcn(sc, m, ni) != 0) {
791 1.1 drochner m_freem(m);
792 1.12 perry printf("%s: could not send beacon\n",
793 1.36 dyoung device_xname(sc->sc_dev));
794 1.1 drochner return;
795 1.1 drochner }
796 1.1 drochner
797 1.1 drochner /* beacon is no longer needed */
798 1.1 drochner m_freem(m);
799 1.1 drochner }
800 1.1 drochner
801 1.1 drochner /* make tx led blink on tx (controlled by ASIC) */
802 1.1 drochner ural_write(sc, RAL_MAC_CSR20, 1);
803 1.1 drochner
804 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR)
805 1.1 drochner ural_enable_tsf_sync(sc);
806 1.12 perry
807 1.12 perry /* enable automatic rate adaptation in STA mode */
808 1.12 perry if (ic->ic_opmode == IEEE80211_M_STA &&
809 1.12 perry ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE)
810 1.12 perry ural_amrr_start(sc, ni);
811 1.12 perry
812 1.1 drochner break;
813 1.1 drochner }
814 1.1 drochner
815 1.1 drochner sc->sc_newstate(ic, sc->sc_state, -1);
816 1.1 drochner }
817 1.1 drochner
818 1.1 drochner Static int
819 1.13 christos ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate,
820 1.18 christos int arg)
821 1.1 drochner {
822 1.1 drochner struct ural_softc *sc = ic->ic_ifp->if_softc;
823 1.1 drochner
824 1.1 drochner usb_rem_task(sc->sc_udev, &sc->sc_task);
825 1.36 dyoung callout_stop(&sc->sc_scan_ch);
826 1.36 dyoung callout_stop(&sc->sc_amrr_ch);
827 1.1 drochner
828 1.1 drochner /* do it in a process context */
829 1.1 drochner sc->sc_state = nstate;
830 1.17 joerg usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
831 1.1 drochner
832 1.1 drochner return 0;
833 1.1 drochner }
834 1.1 drochner
835 1.1 drochner /* quickly determine if a given rate is CCK or OFDM */
836 1.1 drochner #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
837 1.1 drochner
838 1.1 drochner #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
839 1.1 drochner #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
840 1.12 perry
841 1.12 perry #define RAL_SIFS 10 /* us */
842 1.12 perry
843 1.12 perry #define RAL_RXTX_TURNAROUND 5 /* us */
844 1.12 perry
845 1.12 perry /*
846 1.12 perry * This function is only used by the Rx radiotap code.
847 1.12 perry */
848 1.12 perry Static int
849 1.12 perry ural_rxrate(struct ural_rx_desc *desc)
850 1.12 perry {
851 1.12 perry if (le32toh(desc->flags) & RAL_RX_OFDM) {
852 1.12 perry /* reverse function of ural_plcp_signal */
853 1.12 perry switch (desc->rate) {
854 1.12 perry case 0xb: return 12;
855 1.12 perry case 0xf: return 18;
856 1.12 perry case 0xa: return 24;
857 1.12 perry case 0xe: return 36;
858 1.12 perry case 0x9: return 48;
859 1.12 perry case 0xd: return 72;
860 1.12 perry case 0x8: return 96;
861 1.12 perry case 0xc: return 108;
862 1.12 perry }
863 1.12 perry } else {
864 1.12 perry if (desc->rate == 10)
865 1.12 perry return 2;
866 1.12 perry if (desc->rate == 20)
867 1.12 perry return 4;
868 1.12 perry if (desc->rate == 55)
869 1.12 perry return 11;
870 1.12 perry if (desc->rate == 110)
871 1.12 perry return 22;
872 1.12 perry }
873 1.12 perry return 2; /* should not get there */
874 1.12 perry }
875 1.1 drochner
876 1.1 drochner Static void
877 1.18 christos ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv,
878 1.13 christos usbd_status status)
879 1.1 drochner {
880 1.1 drochner struct ural_tx_data *data = priv;
881 1.1 drochner struct ural_softc *sc = data->sc;
882 1.2 drochner struct ifnet *ifp = &sc->sc_if;
883 1.1 drochner int s;
884 1.1 drochner
885 1.1 drochner if (status != USBD_NORMAL_COMPLETION) {
886 1.1 drochner if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
887 1.1 drochner return;
888 1.1 drochner
889 1.1 drochner printf("%s: could not transmit buffer: %s\n",
890 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(status));
891 1.1 drochner
892 1.1 drochner if (status == USBD_STALLED)
893 1.10 augustss usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
894 1.1 drochner
895 1.1 drochner ifp->if_oerrors++;
896 1.1 drochner return;
897 1.1 drochner }
898 1.1 drochner
899 1.1 drochner s = splnet();
900 1.1 drochner
901 1.1 drochner m_freem(data->m);
902 1.1 drochner data->m = NULL;
903 1.1 drochner ieee80211_free_node(data->ni);
904 1.1 drochner data->ni = NULL;
905 1.1 drochner
906 1.1 drochner sc->tx_queued--;
907 1.1 drochner ifp->if_opackets++;
908 1.1 drochner
909 1.1 drochner DPRINTFN(10, ("tx done\n"));
910 1.1 drochner
911 1.1 drochner sc->sc_tx_timer = 0;
912 1.1 drochner ifp->if_flags &= ~IFF_OACTIVE;
913 1.1 drochner ural_start(ifp);
914 1.1 drochner
915 1.1 drochner splx(s);
916 1.1 drochner }
917 1.1 drochner
918 1.1 drochner Static void
919 1.1 drochner ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
920 1.1 drochner {
921 1.1 drochner struct ural_rx_data *data = priv;
922 1.1 drochner struct ural_softc *sc = data->sc;
923 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
924 1.2 drochner struct ifnet *ifp = &sc->sc_if;
925 1.1 drochner struct ural_rx_desc *desc;
926 1.12 perry struct ieee80211_frame *wh;
927 1.1 drochner struct ieee80211_node *ni;
928 1.12 perry struct mbuf *mnew, *m;
929 1.1 drochner int s, len;
930 1.1 drochner
931 1.1 drochner if (status != USBD_NORMAL_COMPLETION) {
932 1.1 drochner if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
933 1.1 drochner return;
934 1.1 drochner
935 1.1 drochner if (status == USBD_STALLED)
936 1.10 augustss usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
937 1.1 drochner goto skip;
938 1.1 drochner }
939 1.1 drochner
940 1.1 drochner usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
941 1.1 drochner
942 1.12 perry if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
943 1.36 dyoung DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev),
944 1.12 perry len));
945 1.1 drochner ifp->if_ierrors++;
946 1.1 drochner goto skip;
947 1.1 drochner }
948 1.1 drochner
949 1.1 drochner /* rx descriptor is located at the end */
950 1.1 drochner desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
951 1.1 drochner
952 1.12 perry if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) ||
953 1.12 perry (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) {
954 1.1 drochner /*
955 1.1 drochner * This should not happen since we did not request to receive
956 1.1 drochner * those frames when we filled RAL_TXRX_CSR2.
957 1.1 drochner */
958 1.1 drochner DPRINTFN(5, ("PHY or CRC error\n"));
959 1.1 drochner ifp->if_ierrors++;
960 1.1 drochner goto skip;
961 1.1 drochner }
962 1.1 drochner
963 1.12 perry MGETHDR(mnew, M_DONTWAIT, MT_DATA);
964 1.12 perry if (mnew == NULL) {
965 1.12 perry ifp->if_ierrors++;
966 1.12 perry goto skip;
967 1.12 perry }
968 1.12 perry
969 1.12 perry MCLGET(mnew, M_DONTWAIT);
970 1.12 perry if (!(mnew->m_flags & M_EXT)) {
971 1.12 perry ifp->if_ierrors++;
972 1.12 perry m_freem(mnew);
973 1.12 perry goto skip;
974 1.12 perry }
975 1.12 perry
976 1.12 perry m = data->m;
977 1.12 perry data->m = mnew;
978 1.12 perry data->buf = mtod(data->m, uint8_t *);
979 1.12 perry
980 1.1 drochner /* finalize mbuf */
981 1.1 drochner m->m_pkthdr.rcvif = ifp;
982 1.1 drochner m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
983 1.12 perry m->m_flags |= M_HASFCS; /* h/w leaves FCS */
984 1.1 drochner
985 1.1 drochner s = splnet();
986 1.1 drochner
987 1.1 drochner if (sc->sc_drvbpf != NULL) {
988 1.1 drochner struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
989 1.1 drochner
990 1.5 drochner tap->wr_flags = IEEE80211_RADIOTAP_F_FCS;
991 1.12 perry tap->wr_rate = ural_rxrate(desc);
992 1.12 perry tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
993 1.12 perry tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
994 1.1 drochner tap->wr_antenna = sc->rx_ant;
995 1.1 drochner tap->wr_antsignal = desc->rssi;
996 1.1 drochner
997 1.35 joerg bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
998 1.1 drochner }
999 1.1 drochner
1000 1.12 perry wh = mtod(m, struct ieee80211_frame *);
1001 1.12 perry ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1002 1.1 drochner
1003 1.1 drochner /* send the frame to the 802.11 layer */
1004 1.1 drochner ieee80211_input(ic, m, ni, desc->rssi, 0);
1005 1.1 drochner
1006 1.1 drochner /* node is no longer needed */
1007 1.1 drochner ieee80211_free_node(ni);
1008 1.1 drochner
1009 1.1 drochner splx(s);
1010 1.1 drochner
1011 1.1 drochner DPRINTFN(15, ("rx done\n"));
1012 1.1 drochner
1013 1.1 drochner skip: /* setup a new transfer */
1014 1.1 drochner usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
1015 1.1 drochner USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
1016 1.1 drochner usbd_transfer(xfer);
1017 1.1 drochner }
1018 1.1 drochner
1019 1.1 drochner /*
1020 1.1 drochner * Return the expected ack rate for a frame transmitted at rate `rate'.
1021 1.1 drochner * XXX: this should depend on the destination node basic rate set.
1022 1.1 drochner */
1023 1.1 drochner Static int
1024 1.12 perry ural_ack_rate(struct ieee80211com *ic, int rate)
1025 1.1 drochner {
1026 1.1 drochner switch (rate) {
1027 1.1 drochner /* CCK rates */
1028 1.1 drochner case 2:
1029 1.1 drochner return 2;
1030 1.1 drochner case 4:
1031 1.1 drochner case 11:
1032 1.1 drochner case 22:
1033 1.12 perry return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1034 1.1 drochner
1035 1.1 drochner /* OFDM rates */
1036 1.1 drochner case 12:
1037 1.1 drochner case 18:
1038 1.1 drochner return 12;
1039 1.1 drochner case 24:
1040 1.1 drochner case 36:
1041 1.1 drochner return 24;
1042 1.1 drochner case 48:
1043 1.1 drochner case 72:
1044 1.1 drochner case 96:
1045 1.1 drochner case 108:
1046 1.1 drochner return 48;
1047 1.1 drochner }
1048 1.1 drochner
1049 1.1 drochner /* default to 1Mbps */
1050 1.1 drochner return 2;
1051 1.1 drochner }
1052 1.1 drochner
1053 1.1 drochner /*
1054 1.1 drochner * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1055 1.1 drochner * The function automatically determines the operating mode depending on the
1056 1.1 drochner * given rate. `flags' indicates whether short preamble is in use or not.
1057 1.1 drochner */
1058 1.1 drochner Static uint16_t
1059 1.1 drochner ural_txtime(int len, int rate, uint32_t flags)
1060 1.1 drochner {
1061 1.1 drochner uint16_t txtime;
1062 1.1 drochner
1063 1.1 drochner if (RAL_RATE_IS_OFDM(rate)) {
1064 1.17 joerg /* IEEE Std 802.11g-2003, pp. 37 */
1065 1.12 perry txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1066 1.12 perry txtime = 16 + 4 + 4 * txtime + 6;
1067 1.1 drochner } else {
1068 1.12 perry /* IEEE Std 802.11b-1999, pp. 28 */
1069 1.12 perry txtime = (16 * len + rate - 1) / rate;
1070 1.1 drochner if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1071 1.12 perry txtime += 72 + 24;
1072 1.1 drochner else
1073 1.12 perry txtime += 144 + 48;
1074 1.1 drochner }
1075 1.1 drochner return txtime;
1076 1.1 drochner }
1077 1.1 drochner
1078 1.1 drochner Static uint8_t
1079 1.1 drochner ural_plcp_signal(int rate)
1080 1.1 drochner {
1081 1.1 drochner switch (rate) {
1082 1.1 drochner /* CCK rates (returned values are device-dependent) */
1083 1.1 drochner case 2: return 0x0;
1084 1.1 drochner case 4: return 0x1;
1085 1.1 drochner case 11: return 0x2;
1086 1.1 drochner case 22: return 0x3;
1087 1.1 drochner
1088 1.1 drochner /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1089 1.1 drochner case 12: return 0xb;
1090 1.1 drochner case 18: return 0xf;
1091 1.1 drochner case 24: return 0xa;
1092 1.1 drochner case 36: return 0xe;
1093 1.1 drochner case 48: return 0x9;
1094 1.1 drochner case 72: return 0xd;
1095 1.1 drochner case 96: return 0x8;
1096 1.1 drochner case 108: return 0xc;
1097 1.1 drochner
1098 1.1 drochner /* unsupported rates (should not get there) */
1099 1.1 drochner default: return 0xff;
1100 1.1 drochner }
1101 1.1 drochner }
1102 1.1 drochner
1103 1.1 drochner Static void
1104 1.1 drochner ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1105 1.1 drochner uint32_t flags, int len, int rate)
1106 1.1 drochner {
1107 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1108 1.1 drochner uint16_t plcp_length;
1109 1.1 drochner int remainder;
1110 1.1 drochner
1111 1.1 drochner desc->flags = htole32(flags);
1112 1.1 drochner desc->flags |= htole32(RAL_TX_NEWSEQ);
1113 1.1 drochner desc->flags |= htole32(len << 16);
1114 1.1 drochner
1115 1.12 perry desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1116 1.4 drochner desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1117 1.1 drochner
1118 1.12 perry /* setup PLCP fields */
1119 1.12 perry desc->plcp_signal = ural_plcp_signal(rate);
1120 1.1 drochner desc->plcp_service = 4;
1121 1.1 drochner
1122 1.12 perry len += IEEE80211_CRC_LEN;
1123 1.1 drochner if (RAL_RATE_IS_OFDM(rate)) {
1124 1.12 perry desc->flags |= htole32(RAL_TX_OFDM);
1125 1.12 perry
1126 1.1 drochner plcp_length = len & 0xfff;
1127 1.12 perry desc->plcp_length_hi = plcp_length >> 6;
1128 1.12 perry desc->plcp_length_lo = plcp_length & 0x3f;
1129 1.1 drochner } else {
1130 1.12 perry plcp_length = (16 * len + rate - 1) / rate;
1131 1.12 perry if (rate == 22) {
1132 1.12 perry remainder = (16 * len) % 22;
1133 1.12 perry if (remainder != 0 && remainder < 7)
1134 1.1 drochner desc->plcp_service |= RAL_PLCP_LENGEXT;
1135 1.1 drochner }
1136 1.12 perry desc->plcp_length_hi = plcp_length >> 8;
1137 1.12 perry desc->plcp_length_lo = plcp_length & 0xff;
1138 1.12 perry
1139 1.12 perry if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1140 1.12 perry desc->plcp_signal |= 0x08;
1141 1.1 drochner }
1142 1.1 drochner
1143 1.1 drochner desc->iv = 0;
1144 1.1 drochner desc->eiv = 0;
1145 1.1 drochner }
1146 1.1 drochner
1147 1.1 drochner #define RAL_TX_TIMEOUT 5000
1148 1.1 drochner
1149 1.1 drochner Static int
1150 1.1 drochner ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1151 1.1 drochner {
1152 1.1 drochner struct ural_tx_desc *desc;
1153 1.1 drochner usbd_xfer_handle xfer;
1154 1.12 perry uint8_t cmd = 0;
1155 1.1 drochner usbd_status error;
1156 1.1 drochner uint8_t *buf;
1157 1.1 drochner int xferlen, rate;
1158 1.1 drochner
1159 1.12 perry rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1160 1.1 drochner
1161 1.1 drochner xfer = usbd_alloc_xfer(sc->sc_udev);
1162 1.1 drochner if (xfer == NULL)
1163 1.1 drochner return ENOMEM;
1164 1.1 drochner
1165 1.1 drochner /* xfer length needs to be a multiple of two! */
1166 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1167 1.1 drochner
1168 1.1 drochner buf = usbd_alloc_buffer(xfer, xferlen);
1169 1.1 drochner if (buf == NULL) {
1170 1.1 drochner usbd_free_xfer(xfer);
1171 1.1 drochner return ENOMEM;
1172 1.1 drochner }
1173 1.1 drochner
1174 1.1 drochner usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1175 1.1 drochner USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1176 1.1 drochner
1177 1.1 drochner error = usbd_sync_transfer(xfer);
1178 1.1 drochner if (error != 0) {
1179 1.1 drochner usbd_free_xfer(xfer);
1180 1.1 drochner return error;
1181 1.1 drochner }
1182 1.1 drochner
1183 1.1 drochner desc = (struct ural_tx_desc *)buf;
1184 1.1 drochner
1185 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1186 1.1 drochner ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1187 1.1 drochner m0->m_pkthdr.len, rate);
1188 1.1 drochner
1189 1.1 drochner DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1190 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1191 1.1 drochner
1192 1.1 drochner usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
1193 1.1 drochner USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1194 1.1 drochner
1195 1.1 drochner error = usbd_sync_transfer(xfer);
1196 1.1 drochner usbd_free_xfer(xfer);
1197 1.1 drochner
1198 1.1 drochner return error;
1199 1.1 drochner }
1200 1.1 drochner
1201 1.1 drochner Static int
1202 1.1 drochner ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1203 1.1 drochner {
1204 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1205 1.1 drochner struct ural_tx_desc *desc;
1206 1.1 drochner struct ural_tx_data *data;
1207 1.1 drochner struct ieee80211_frame *wh;
1208 1.26 degroote struct ieee80211_key *k;
1209 1.1 drochner uint32_t flags = 0;
1210 1.1 drochner uint16_t dur;
1211 1.1 drochner usbd_status error;
1212 1.1 drochner int xferlen, rate;
1213 1.1 drochner
1214 1.1 drochner data = &sc->tx_data[0];
1215 1.1 drochner desc = (struct ural_tx_desc *)data->buf;
1216 1.1 drochner
1217 1.12 perry rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1218 1.12 perry
1219 1.26 degroote wh = mtod(m0, struct ieee80211_frame *);
1220 1.26 degroote
1221 1.26 degroote if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1222 1.26 degroote k = ieee80211_crypto_encap(ic, ni, m0);
1223 1.26 degroote if (k == NULL) {
1224 1.26 degroote m_freem(m0);
1225 1.26 degroote return ENOBUFS;
1226 1.26 degroote }
1227 1.26 degroote }
1228 1.26 degroote
1229 1.1 drochner data->m = m0;
1230 1.1 drochner data->ni = ni;
1231 1.1 drochner
1232 1.1 drochner wh = mtod(m0, struct ieee80211_frame *);
1233 1.1 drochner
1234 1.1 drochner if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1235 1.1 drochner flags |= RAL_TX_ACK;
1236 1.1 drochner
1237 1.1 drochner dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS;
1238 1.1 drochner *(uint16_t *)wh->i_dur = htole16(dur);
1239 1.1 drochner
1240 1.1 drochner /* tell hardware to add timestamp for probe responses */
1241 1.12 perry if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1242 1.12 perry IEEE80211_FC0_TYPE_MGT &&
1243 1.12 perry (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1244 1.12 perry IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1245 1.1 drochner flags |= RAL_TX_TIMESTAMP;
1246 1.1 drochner }
1247 1.1 drochner
1248 1.7 drochner if (sc->sc_drvbpf != NULL) {
1249 1.7 drochner struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1250 1.7 drochner
1251 1.7 drochner tap->wt_flags = 0;
1252 1.7 drochner tap->wt_rate = rate;
1253 1.9 skrll tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1254 1.9 skrll tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1255 1.7 drochner tap->wt_antenna = sc->tx_ant;
1256 1.7 drochner
1257 1.35 joerg bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1258 1.7 drochner }
1259 1.7 drochner
1260 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1261 1.1 drochner ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1262 1.1 drochner
1263 1.12 perry /* align end on a 2-bytes boundary */
1264 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1265 1.1 drochner
1266 1.12 perry /*
1267 1.12 perry * No space left in the last URB to store the extra 2 bytes, force
1268 1.12 perry * sending of another URB.
1269 1.12 perry */
1270 1.12 perry if ((xferlen % 64) == 0)
1271 1.12 perry xferlen += 2;
1272 1.12 perry
1273 1.1 drochner DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1274 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1275 1.1 drochner
1276 1.12 perry usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1277 1.12 perry xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1278 1.12 perry ural_txeof);
1279 1.1 drochner
1280 1.1 drochner error = usbd_transfer(data->xfer);
1281 1.16 joerg if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1282 1.16 joerg m_freem(m0);
1283 1.1 drochner return error;
1284 1.16 joerg }
1285 1.1 drochner
1286 1.1 drochner sc->tx_queued++;
1287 1.1 drochner
1288 1.1 drochner return 0;
1289 1.1 drochner }
1290 1.1 drochner
1291 1.1 drochner Static int
1292 1.1 drochner ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1293 1.1 drochner {
1294 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1295 1.1 drochner struct ural_tx_desc *desc;
1296 1.1 drochner struct ural_tx_data *data;
1297 1.1 drochner struct ieee80211_frame *wh;
1298 1.1 drochner struct ieee80211_key *k;
1299 1.1 drochner uint32_t flags = 0;
1300 1.1 drochner uint16_t dur;
1301 1.1 drochner usbd_status error;
1302 1.1 drochner int xferlen, rate;
1303 1.1 drochner
1304 1.2 drochner wh = mtod(m0, struct ieee80211_frame *);
1305 1.2 drochner
1306 1.12 perry if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE)
1307 1.12 perry rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate];
1308 1.12 perry else
1309 1.12 perry rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1310 1.1 drochner
1311 1.1 drochner rate &= IEEE80211_RATE_VAL;
1312 1.1 drochner
1313 1.2 drochner if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1314 1.1 drochner k = ieee80211_crypto_encap(ic, ni, m0);
1315 1.3 dyoung if (k == NULL) {
1316 1.3 dyoung m_freem(m0);
1317 1.1 drochner return ENOBUFS;
1318 1.3 dyoung }
1319 1.2 drochner
1320 1.2 drochner /* packet header may have moved, reset our local pointer */
1321 1.2 drochner wh = mtod(m0, struct ieee80211_frame *);
1322 1.1 drochner }
1323 1.1 drochner
1324 1.12 perry data = &sc->tx_data[0];
1325 1.12 perry desc = (struct ural_tx_desc *)data->buf;
1326 1.12 perry
1327 1.12 perry data->m = m0;
1328 1.12 perry data->ni = ni;
1329 1.12 perry
1330 1.12 perry if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1331 1.12 perry flags |= RAL_TX_ACK;
1332 1.12 perry flags |= RAL_TX_RETRY(7);
1333 1.12 perry
1334 1.12 perry dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate),
1335 1.12 perry ic->ic_flags) + RAL_SIFS;
1336 1.12 perry *(uint16_t *)wh->i_dur = htole16(dur);
1337 1.12 perry }
1338 1.12 perry
1339 1.1 drochner if (sc->sc_drvbpf != NULL) {
1340 1.1 drochner struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1341 1.1 drochner
1342 1.1 drochner tap->wt_flags = 0;
1343 1.1 drochner tap->wt_rate = rate;
1344 1.9 skrll tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1345 1.9 skrll tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1346 1.1 drochner tap->wt_antenna = sc->tx_ant;
1347 1.1 drochner
1348 1.35 joerg bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1349 1.1 drochner }
1350 1.1 drochner
1351 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1352 1.1 drochner ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1353 1.1 drochner
1354 1.12 perry /* align end on a 2-bytes boundary */
1355 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1356 1.1 drochner
1357 1.12 perry /*
1358 1.12 perry * No space left in the last URB to store the extra 2 bytes, force
1359 1.12 perry * sending of another URB.
1360 1.12 perry */
1361 1.12 perry if ((xferlen % 64) == 0)
1362 1.12 perry xferlen += 2;
1363 1.12 perry
1364 1.1 drochner DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1365 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1366 1.1 drochner
1367 1.12 perry usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1368 1.12 perry xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1369 1.12 perry ural_txeof);
1370 1.1 drochner
1371 1.1 drochner error = usbd_transfer(data->xfer);
1372 1.12 perry if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS)
1373 1.1 drochner return error;
1374 1.1 drochner
1375 1.1 drochner sc->tx_queued++;
1376 1.1 drochner
1377 1.1 drochner return 0;
1378 1.1 drochner }
1379 1.1 drochner
1380 1.1 drochner Static void
1381 1.1 drochner ural_start(struct ifnet *ifp)
1382 1.1 drochner {
1383 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1384 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1385 1.12 perry struct mbuf *m0;
1386 1.1 drochner struct ether_header *eh;
1387 1.1 drochner struct ieee80211_node *ni;
1388 1.1 drochner
1389 1.1 drochner for (;;) {
1390 1.1 drochner IF_POLL(&ic->ic_mgtq, m0);
1391 1.1 drochner if (m0 != NULL) {
1392 1.1 drochner if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1393 1.1 drochner ifp->if_flags |= IFF_OACTIVE;
1394 1.1 drochner break;
1395 1.1 drochner }
1396 1.1 drochner IF_DEQUEUE(&ic->ic_mgtq, m0);
1397 1.1 drochner
1398 1.1 drochner ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1399 1.1 drochner m0->m_pkthdr.rcvif = NULL;
1400 1.35 joerg bpf_mtap3(ic->ic_rawbpf, m0);
1401 1.1 drochner if (ural_tx_mgt(sc, m0, ni) != 0)
1402 1.1 drochner break;
1403 1.1 drochner
1404 1.1 drochner } else {
1405 1.1 drochner if (ic->ic_state != IEEE80211_S_RUN)
1406 1.1 drochner break;
1407 1.1 drochner IFQ_DEQUEUE(&ifp->if_snd, m0);
1408 1.1 drochner if (m0 == NULL)
1409 1.1 drochner break;
1410 1.1 drochner if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1411 1.1 drochner IF_PREPEND(&ifp->if_snd, m0);
1412 1.1 drochner ifp->if_flags |= IFF_OACTIVE;
1413 1.1 drochner break;
1414 1.1 drochner }
1415 1.1 drochner
1416 1.2 drochner if (m0->m_len < sizeof (struct ether_header) &&
1417 1.2 drochner !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1418 1.1 drochner continue;
1419 1.1 drochner
1420 1.1 drochner eh = mtod(m0, struct ether_header *);
1421 1.1 drochner ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1422 1.1 drochner if (ni == NULL) {
1423 1.1 drochner m_freem(m0);
1424 1.1 drochner continue;
1425 1.1 drochner }
1426 1.35 joerg bpf_mtap(ifp, m0);
1427 1.1 drochner m0 = ieee80211_encap(ic, m0, ni);
1428 1.4 drochner if (m0 == NULL) {
1429 1.4 drochner ieee80211_free_node(ni);
1430 1.1 drochner continue;
1431 1.4 drochner }
1432 1.35 joerg bpf_mtap3(ic->ic_rawbpf, m0);
1433 1.1 drochner if (ural_tx_data(sc, m0, ni) != 0) {
1434 1.1 drochner ieee80211_free_node(ni);
1435 1.1 drochner ifp->if_oerrors++;
1436 1.1 drochner break;
1437 1.1 drochner }
1438 1.1 drochner }
1439 1.1 drochner
1440 1.1 drochner sc->sc_tx_timer = 5;
1441 1.1 drochner ifp->if_timer = 1;
1442 1.1 drochner }
1443 1.1 drochner }
1444 1.1 drochner
1445 1.1 drochner Static void
1446 1.1 drochner ural_watchdog(struct ifnet *ifp)
1447 1.1 drochner {
1448 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1449 1.2 drochner struct ieee80211com *ic = &sc->sc_ic;
1450 1.1 drochner
1451 1.1 drochner ifp->if_timer = 0;
1452 1.1 drochner
1453 1.1 drochner if (sc->sc_tx_timer > 0) {
1454 1.1 drochner if (--sc->sc_tx_timer == 0) {
1455 1.36 dyoung printf("%s: device timeout\n", device_xname(sc->sc_dev));
1456 1.12 perry /*ural_init(sc); XXX needs a process context! */
1457 1.1 drochner ifp->if_oerrors++;
1458 1.1 drochner return;
1459 1.1 drochner }
1460 1.1 drochner ifp->if_timer = 1;
1461 1.1 drochner }
1462 1.1 drochner
1463 1.2 drochner ieee80211_watchdog(ic);
1464 1.1 drochner }
1465 1.1 drochner
1466 1.12 perry /*
1467 1.12 perry * This function allows for fast channel switching in monitor mode (used by
1468 1.12 perry * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1469 1.12 perry * generate a new beacon frame.
1470 1.12 perry */
1471 1.12 perry Static int
1472 1.12 perry ural_reset(struct ifnet *ifp)
1473 1.12 perry {
1474 1.12 perry struct ural_softc *sc = ifp->if_softc;
1475 1.12 perry struct ieee80211com *ic = &sc->sc_ic;
1476 1.12 perry
1477 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR)
1478 1.12 perry return ENETRESET;
1479 1.12 perry
1480 1.12 perry ural_set_chan(sc, ic->ic_curchan);
1481 1.12 perry
1482 1.12 perry return 0;
1483 1.12 perry }
1484 1.12 perry
1485 1.1 drochner Static int
1486 1.19 christos ural_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1487 1.1 drochner {
1488 1.37 jmcneill #define IS_RUNNING(ifp) \
1489 1.37 jmcneill (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING))
1490 1.37 jmcneill
1491 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1492 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1493 1.1 drochner int s, error = 0;
1494 1.1 drochner
1495 1.1 drochner s = splnet();
1496 1.1 drochner
1497 1.1 drochner switch (cmd) {
1498 1.1 drochner case SIOCSIFFLAGS:
1499 1.31 dyoung if ((error = ifioctl_common(ifp, cmd, data)) != 0)
1500 1.31 dyoung break;
1501 1.31 dyoung /* XXX re-use ether_ioctl() */
1502 1.31 dyoung switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
1503 1.31 dyoung case IFF_UP|IFF_RUNNING:
1504 1.31 dyoung ural_update_promisc(sc);
1505 1.31 dyoung break;
1506 1.31 dyoung case IFF_UP:
1507 1.31 dyoung ural_init(ifp);
1508 1.31 dyoung break;
1509 1.31 dyoung case IFF_RUNNING:
1510 1.31 dyoung ural_stop(ifp, 1);
1511 1.31 dyoung break;
1512 1.31 dyoung case 0:
1513 1.31 dyoung break;
1514 1.1 drochner }
1515 1.1 drochner break;
1516 1.2 drochner
1517 1.37 jmcneill case SIOCADDMULTI:
1518 1.37 jmcneill case SIOCDELMULTI:
1519 1.37 jmcneill if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) {
1520 1.37 jmcneill error = 0;
1521 1.37 jmcneill }
1522 1.37 jmcneill break;
1523 1.37 jmcneill
1524 1.1 drochner default:
1525 1.1 drochner error = ieee80211_ioctl(ic, cmd, data);
1526 1.1 drochner }
1527 1.1 drochner
1528 1.1 drochner if (error == ENETRESET) {
1529 1.37 jmcneill if (IS_RUNNING(ifp) &&
1530 1.37 jmcneill (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
1531 1.1 drochner ural_init(ifp);
1532 1.1 drochner error = 0;
1533 1.1 drochner }
1534 1.1 drochner
1535 1.1 drochner splx(s);
1536 1.1 drochner
1537 1.1 drochner return error;
1538 1.37 jmcneill #undef IS_RUNNING
1539 1.1 drochner }
1540 1.1 drochner
1541 1.1 drochner Static void
1542 1.12 perry ural_set_testmode(struct ural_softc *sc)
1543 1.12 perry {
1544 1.12 perry usb_device_request_t req;
1545 1.12 perry usbd_status error;
1546 1.12 perry
1547 1.12 perry req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1548 1.12 perry req.bRequest = RAL_VENDOR_REQUEST;
1549 1.12 perry USETW(req.wValue, 4);
1550 1.12 perry USETW(req.wIndex, 1);
1551 1.12 perry USETW(req.wLength, 0);
1552 1.12 perry
1553 1.12 perry error = usbd_do_request(sc->sc_udev, &req, NULL);
1554 1.12 perry if (error != 0) {
1555 1.12 perry printf("%s: could not set test mode: %s\n",
1556 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error));
1557 1.12 perry }
1558 1.12 perry }
1559 1.12 perry
1560 1.12 perry Static void
1561 1.1 drochner ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1562 1.1 drochner {
1563 1.1 drochner usb_device_request_t req;
1564 1.1 drochner usbd_status error;
1565 1.1 drochner
1566 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1567 1.1 drochner req.bRequest = RAL_READ_EEPROM;
1568 1.1 drochner USETW(req.wValue, 0);
1569 1.1 drochner USETW(req.wIndex, addr);
1570 1.1 drochner USETW(req.wLength, len);
1571 1.1 drochner
1572 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1573 1.1 drochner if (error != 0) {
1574 1.1 drochner printf("%s: could not read EEPROM: %s\n",
1575 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error));
1576 1.1 drochner }
1577 1.1 drochner }
1578 1.1 drochner
1579 1.1 drochner Static uint16_t
1580 1.1 drochner ural_read(struct ural_softc *sc, uint16_t reg)
1581 1.1 drochner {
1582 1.1 drochner usb_device_request_t req;
1583 1.1 drochner usbd_status error;
1584 1.1 drochner uint16_t val;
1585 1.1 drochner
1586 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1587 1.1 drochner req.bRequest = RAL_READ_MAC;
1588 1.1 drochner USETW(req.wValue, 0);
1589 1.1 drochner USETW(req.wIndex, reg);
1590 1.1 drochner USETW(req.wLength, sizeof (uint16_t));
1591 1.1 drochner
1592 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, &val);
1593 1.1 drochner if (error != 0) {
1594 1.1 drochner printf("%s: could not read MAC register: %s\n",
1595 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error));
1596 1.1 drochner return 0;
1597 1.1 drochner }
1598 1.1 drochner
1599 1.1 drochner return le16toh(val);
1600 1.1 drochner }
1601 1.1 drochner
1602 1.1 drochner Static void
1603 1.1 drochner ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1604 1.1 drochner {
1605 1.1 drochner usb_device_request_t req;
1606 1.1 drochner usbd_status error;
1607 1.1 drochner
1608 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1609 1.1 drochner req.bRequest = RAL_READ_MULTI_MAC;
1610 1.1 drochner USETW(req.wValue, 0);
1611 1.1 drochner USETW(req.wIndex, reg);
1612 1.1 drochner USETW(req.wLength, len);
1613 1.1 drochner
1614 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1615 1.1 drochner if (error != 0) {
1616 1.1 drochner printf("%s: could not read MAC register: %s\n",
1617 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error));
1618 1.1 drochner }
1619 1.1 drochner }
1620 1.1 drochner
1621 1.1 drochner Static void
1622 1.1 drochner ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1623 1.1 drochner {
1624 1.1 drochner usb_device_request_t req;
1625 1.1 drochner usbd_status error;
1626 1.1 drochner
1627 1.1 drochner req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1628 1.1 drochner req.bRequest = RAL_WRITE_MAC;
1629 1.1 drochner USETW(req.wValue, val);
1630 1.1 drochner USETW(req.wIndex, reg);
1631 1.1 drochner USETW(req.wLength, 0);
1632 1.1 drochner
1633 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, NULL);
1634 1.1 drochner if (error != 0) {
1635 1.1 drochner printf("%s: could not write MAC register: %s\n",
1636 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error));
1637 1.1 drochner }
1638 1.1 drochner }
1639 1.1 drochner
1640 1.1 drochner Static void
1641 1.1 drochner ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1642 1.1 drochner {
1643 1.1 drochner usb_device_request_t req;
1644 1.1 drochner usbd_status error;
1645 1.1 drochner
1646 1.1 drochner req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1647 1.1 drochner req.bRequest = RAL_WRITE_MULTI_MAC;
1648 1.1 drochner USETW(req.wValue, 0);
1649 1.1 drochner USETW(req.wIndex, reg);
1650 1.1 drochner USETW(req.wLength, len);
1651 1.1 drochner
1652 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1653 1.1 drochner if (error != 0) {
1654 1.1 drochner printf("%s: could not write MAC register: %s\n",
1655 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error));
1656 1.1 drochner }
1657 1.1 drochner }
1658 1.1 drochner
1659 1.1 drochner Static void
1660 1.1 drochner ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1661 1.1 drochner {
1662 1.1 drochner uint16_t tmp;
1663 1.1 drochner int ntries;
1664 1.1 drochner
1665 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1666 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1667 1.1 drochner break;
1668 1.1 drochner }
1669 1.1 drochner if (ntries == 5) {
1670 1.36 dyoung printf("%s: could not write to BBP\n", device_xname(sc->sc_dev));
1671 1.1 drochner return;
1672 1.1 drochner }
1673 1.1 drochner
1674 1.1 drochner tmp = reg << 8 | val;
1675 1.1 drochner ural_write(sc, RAL_PHY_CSR7, tmp);
1676 1.1 drochner }
1677 1.1 drochner
1678 1.1 drochner Static uint8_t
1679 1.1 drochner ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1680 1.1 drochner {
1681 1.1 drochner uint16_t val;
1682 1.1 drochner int ntries;
1683 1.1 drochner
1684 1.1 drochner val = RAL_BBP_WRITE | reg << 8;
1685 1.1 drochner ural_write(sc, RAL_PHY_CSR7, val);
1686 1.1 drochner
1687 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1688 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1689 1.1 drochner break;
1690 1.1 drochner }
1691 1.1 drochner if (ntries == 5) {
1692 1.36 dyoung printf("%s: could not read BBP\n", device_xname(sc->sc_dev));
1693 1.1 drochner return 0;
1694 1.1 drochner }
1695 1.1 drochner
1696 1.1 drochner return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1697 1.1 drochner }
1698 1.1 drochner
1699 1.1 drochner Static void
1700 1.1 drochner ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1701 1.1 drochner {
1702 1.1 drochner uint32_t tmp;
1703 1.1 drochner int ntries;
1704 1.1 drochner
1705 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1706 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1707 1.1 drochner break;
1708 1.1 drochner }
1709 1.1 drochner if (ntries == 5) {
1710 1.36 dyoung printf("%s: could not write to RF\n", device_xname(sc->sc_dev));
1711 1.1 drochner return;
1712 1.1 drochner }
1713 1.1 drochner
1714 1.1 drochner tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1715 1.1 drochner ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1716 1.1 drochner ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1717 1.1 drochner
1718 1.1 drochner /* remember last written value in sc */
1719 1.1 drochner sc->rf_regs[reg] = val;
1720 1.1 drochner
1721 1.1 drochner DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1722 1.1 drochner }
1723 1.1 drochner
1724 1.1 drochner Static void
1725 1.1 drochner ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1726 1.1 drochner {
1727 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1728 1.1 drochner uint8_t power, tmp;
1729 1.1 drochner u_int i, chan;
1730 1.1 drochner
1731 1.1 drochner chan = ieee80211_chan2ieee(ic, c);
1732 1.1 drochner if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1733 1.1 drochner return;
1734 1.1 drochner
1735 1.1 drochner if (IEEE80211_IS_CHAN_2GHZ(c))
1736 1.1 drochner power = min(sc->txpow[chan - 1], 31);
1737 1.1 drochner else
1738 1.1 drochner power = 31;
1739 1.1 drochner
1740 1.12 perry /* adjust txpower using ifconfig settings */
1741 1.12 perry power -= (100 - ic->ic_txpowlimit) / 8;
1742 1.12 perry
1743 1.1 drochner DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1744 1.1 drochner
1745 1.1 drochner switch (sc->rf_rev) {
1746 1.1 drochner case RAL_RF_2522:
1747 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x00814);
1748 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1749 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1750 1.1 drochner break;
1751 1.1 drochner
1752 1.1 drochner case RAL_RF_2523:
1753 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08804);
1754 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1755 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1756 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1757 1.1 drochner break;
1758 1.1 drochner
1759 1.1 drochner case RAL_RF_2524:
1760 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x0c808);
1761 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1762 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1763 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1764 1.1 drochner break;
1765 1.1 drochner
1766 1.1 drochner case RAL_RF_2525:
1767 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1768 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1769 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1770 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1771 1.1 drochner
1772 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1773 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1774 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1775 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1776 1.1 drochner break;
1777 1.1 drochner
1778 1.1 drochner case RAL_RF_2525E:
1779 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1780 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1781 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1782 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1783 1.1 drochner break;
1784 1.1 drochner
1785 1.1 drochner case RAL_RF_2526:
1786 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1787 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1788 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08804);
1789 1.1 drochner
1790 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1791 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1792 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1793 1.1 drochner break;
1794 1.1 drochner
1795 1.1 drochner /* dual-band RF */
1796 1.1 drochner case RAL_RF_5222:
1797 1.12 perry for (i = 0; ural_rf5222[i].chan != chan; i++);
1798 1.1 drochner
1799 1.12 perry ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1800 1.12 perry ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1801 1.12 perry ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1802 1.12 perry ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1803 1.1 drochner break;
1804 1.1 drochner }
1805 1.1 drochner
1806 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1807 1.1 drochner ic->ic_state != IEEE80211_S_SCAN) {
1808 1.1 drochner /* set Japan filter bit for channel 14 */
1809 1.1 drochner tmp = ural_bbp_read(sc, 70);
1810 1.1 drochner
1811 1.1 drochner tmp &= ~RAL_JAPAN_FILTER;
1812 1.1 drochner if (chan == 14)
1813 1.1 drochner tmp |= RAL_JAPAN_FILTER;
1814 1.1 drochner
1815 1.1 drochner ural_bbp_write(sc, 70, tmp);
1816 1.1 drochner
1817 1.1 drochner /* clear CRC errors */
1818 1.1 drochner ural_read(sc, RAL_STA_CSR0);
1819 1.1 drochner
1820 1.12 perry DELAY(10000);
1821 1.1 drochner ural_disable_rf_tune(sc);
1822 1.1 drochner }
1823 1.1 drochner }
1824 1.1 drochner
1825 1.1 drochner /*
1826 1.1 drochner * Disable RF auto-tuning.
1827 1.1 drochner */
1828 1.1 drochner Static void
1829 1.1 drochner ural_disable_rf_tune(struct ural_softc *sc)
1830 1.1 drochner {
1831 1.1 drochner uint32_t tmp;
1832 1.1 drochner
1833 1.1 drochner if (sc->rf_rev != RAL_RF_2523) {
1834 1.1 drochner tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1835 1.1 drochner ural_rf_write(sc, RAL_RF1, tmp);
1836 1.1 drochner }
1837 1.1 drochner
1838 1.1 drochner tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1839 1.1 drochner ural_rf_write(sc, RAL_RF3, tmp);
1840 1.1 drochner
1841 1.1 drochner DPRINTFN(2, ("disabling RF autotune\n"));
1842 1.1 drochner }
1843 1.1 drochner
1844 1.1 drochner /*
1845 1.1 drochner * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1846 1.1 drochner * synchronization.
1847 1.1 drochner */
1848 1.1 drochner Static void
1849 1.1 drochner ural_enable_tsf_sync(struct ural_softc *sc)
1850 1.1 drochner {
1851 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1852 1.1 drochner uint16_t logcwmin, preload, tmp;
1853 1.1 drochner
1854 1.1 drochner /* first, disable TSF synchronization */
1855 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, 0);
1856 1.1 drochner
1857 1.1 drochner tmp = (16 * ic->ic_bss->ni_intval) << 4;
1858 1.1 drochner ural_write(sc, RAL_TXRX_CSR18, tmp);
1859 1.1 drochner
1860 1.1 drochner logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1861 1.1 drochner preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1862 1.1 drochner tmp = logcwmin << 12 | preload;
1863 1.1 drochner ural_write(sc, RAL_TXRX_CSR20, tmp);
1864 1.1 drochner
1865 1.1 drochner /* finally, enable TSF synchronization */
1866 1.1 drochner tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1867 1.1 drochner if (ic->ic_opmode == IEEE80211_M_STA)
1868 1.1 drochner tmp |= RAL_ENABLE_TSF_SYNC(1);
1869 1.1 drochner else
1870 1.1 drochner tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1871 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, tmp);
1872 1.1 drochner
1873 1.1 drochner DPRINTF(("enabling TSF synchronization\n"));
1874 1.1 drochner }
1875 1.1 drochner
1876 1.1 drochner Static void
1877 1.12 perry ural_update_slot(struct ifnet *ifp)
1878 1.12 perry {
1879 1.12 perry struct ural_softc *sc = ifp->if_softc;
1880 1.12 perry struct ieee80211com *ic = &sc->sc_ic;
1881 1.12 perry uint16_t slottime, sifs, eifs;
1882 1.12 perry
1883 1.12 perry slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1884 1.12 perry
1885 1.12 perry /*
1886 1.12 perry * These settings may sound a bit inconsistent but this is what the
1887 1.12 perry * reference driver does.
1888 1.12 perry */
1889 1.12 perry if (ic->ic_curmode == IEEE80211_MODE_11B) {
1890 1.12 perry sifs = 16 - RAL_RXTX_TURNAROUND;
1891 1.12 perry eifs = 364;
1892 1.12 perry } else {
1893 1.12 perry sifs = 10 - RAL_RXTX_TURNAROUND;
1894 1.12 perry eifs = 64;
1895 1.12 perry }
1896 1.12 perry
1897 1.12 perry ural_write(sc, RAL_MAC_CSR10, slottime);
1898 1.12 perry ural_write(sc, RAL_MAC_CSR11, sifs);
1899 1.12 perry ural_write(sc, RAL_MAC_CSR12, eifs);
1900 1.12 perry }
1901 1.12 perry
1902 1.12 perry Static void
1903 1.12 perry ural_set_txpreamble(struct ural_softc *sc)
1904 1.12 perry {
1905 1.12 perry uint16_t tmp;
1906 1.12 perry
1907 1.12 perry tmp = ural_read(sc, RAL_TXRX_CSR10);
1908 1.12 perry
1909 1.12 perry tmp &= ~RAL_SHORT_PREAMBLE;
1910 1.12 perry if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1911 1.12 perry tmp |= RAL_SHORT_PREAMBLE;
1912 1.12 perry
1913 1.12 perry ural_write(sc, RAL_TXRX_CSR10, tmp);
1914 1.12 perry }
1915 1.12 perry
1916 1.12 perry Static void
1917 1.12 perry ural_set_basicrates(struct ural_softc *sc)
1918 1.12 perry {
1919 1.12 perry struct ieee80211com *ic = &sc->sc_ic;
1920 1.12 perry
1921 1.12 perry /* update basic rate set */
1922 1.12 perry if (ic->ic_curmode == IEEE80211_MODE_11B) {
1923 1.12 perry /* 11b basic rates: 1, 2Mbps */
1924 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x3);
1925 1.12 perry } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1926 1.12 perry /* 11a basic rates: 6, 12, 24Mbps */
1927 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x150);
1928 1.12 perry } else {
1929 1.12 perry /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1930 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1931 1.12 perry }
1932 1.12 perry }
1933 1.12 perry
1934 1.12 perry Static void
1935 1.1 drochner ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1936 1.1 drochner {
1937 1.1 drochner uint16_t tmp;
1938 1.1 drochner
1939 1.1 drochner tmp = bssid[0] | bssid[1] << 8;
1940 1.1 drochner ural_write(sc, RAL_MAC_CSR5, tmp);
1941 1.1 drochner
1942 1.1 drochner tmp = bssid[2] | bssid[3] << 8;
1943 1.1 drochner ural_write(sc, RAL_MAC_CSR6, tmp);
1944 1.1 drochner
1945 1.1 drochner tmp = bssid[4] | bssid[5] << 8;
1946 1.1 drochner ural_write(sc, RAL_MAC_CSR7, tmp);
1947 1.1 drochner
1948 1.1 drochner DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
1949 1.1 drochner }
1950 1.1 drochner
1951 1.1 drochner Static void
1952 1.1 drochner ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1953 1.1 drochner {
1954 1.1 drochner uint16_t tmp;
1955 1.1 drochner
1956 1.1 drochner tmp = addr[0] | addr[1] << 8;
1957 1.1 drochner ural_write(sc, RAL_MAC_CSR2, tmp);
1958 1.1 drochner
1959 1.1 drochner tmp = addr[2] | addr[3] << 8;
1960 1.1 drochner ural_write(sc, RAL_MAC_CSR3, tmp);
1961 1.1 drochner
1962 1.1 drochner tmp = addr[4] | addr[5] << 8;
1963 1.1 drochner ural_write(sc, RAL_MAC_CSR4, tmp);
1964 1.1 drochner
1965 1.2 drochner DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
1966 1.1 drochner }
1967 1.1 drochner
1968 1.1 drochner Static void
1969 1.1 drochner ural_update_promisc(struct ural_softc *sc)
1970 1.1 drochner {
1971 1.12 perry struct ifnet *ifp = sc->sc_ic.ic_ifp;
1972 1.12 perry uint32_t tmp;
1973 1.1 drochner
1974 1.1 drochner tmp = ural_read(sc, RAL_TXRX_CSR2);
1975 1.1 drochner
1976 1.1 drochner tmp &= ~RAL_DROP_NOT_TO_ME;
1977 1.1 drochner if (!(ifp->if_flags & IFF_PROMISC))
1978 1.1 drochner tmp |= RAL_DROP_NOT_TO_ME;
1979 1.1 drochner
1980 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, tmp);
1981 1.1 drochner
1982 1.1 drochner DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1983 1.1 drochner "entering" : "leaving"));
1984 1.1 drochner }
1985 1.1 drochner
1986 1.1 drochner Static const char *
1987 1.1 drochner ural_get_rf(int rev)
1988 1.1 drochner {
1989 1.1 drochner switch (rev) {
1990 1.1 drochner case RAL_RF_2522: return "RT2522";
1991 1.1 drochner case RAL_RF_2523: return "RT2523";
1992 1.1 drochner case RAL_RF_2524: return "RT2524";
1993 1.1 drochner case RAL_RF_2525: return "RT2525";
1994 1.1 drochner case RAL_RF_2525E: return "RT2525e";
1995 1.1 drochner case RAL_RF_2526: return "RT2526";
1996 1.1 drochner case RAL_RF_5222: return "RT5222";
1997 1.1 drochner default: return "unknown";
1998 1.1 drochner }
1999 1.1 drochner }
2000 1.1 drochner
2001 1.1 drochner Static void
2002 1.1 drochner ural_read_eeprom(struct ural_softc *sc)
2003 1.1 drochner {
2004 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
2005 1.1 drochner uint16_t val;
2006 1.1 drochner
2007 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
2008 1.1 drochner val = le16toh(val);
2009 1.1 drochner sc->rf_rev = (val >> 11) & 0x7;
2010 1.1 drochner sc->hw_radio = (val >> 10) & 0x1;
2011 1.1 drochner sc->led_mode = (val >> 6) & 0x7;
2012 1.1 drochner sc->rx_ant = (val >> 4) & 0x3;
2013 1.1 drochner sc->tx_ant = (val >> 2) & 0x3;
2014 1.1 drochner sc->nb_ant = val & 0x3;
2015 1.1 drochner
2016 1.1 drochner /* read MAC address */
2017 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
2018 1.1 drochner
2019 1.1 drochner /* read default values for BBP registers */
2020 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
2021 1.1 drochner
2022 1.1 drochner /* read Tx power for all b/g channels */
2023 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
2024 1.1 drochner }
2025 1.1 drochner
2026 1.1 drochner Static int
2027 1.1 drochner ural_bbp_init(struct ural_softc *sc)
2028 1.1 drochner {
2029 1.1 drochner #define N(a) (sizeof (a) / sizeof ((a)[0]))
2030 1.1 drochner int i, ntries;
2031 1.1 drochner
2032 1.1 drochner /* wait for BBP to be ready */
2033 1.1 drochner for (ntries = 0; ntries < 100; ntries++) {
2034 1.1 drochner if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
2035 1.1 drochner break;
2036 1.1 drochner DELAY(1000);
2037 1.1 drochner }
2038 1.1 drochner if (ntries == 100) {
2039 1.36 dyoung printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev));
2040 1.1 drochner return EIO;
2041 1.1 drochner }
2042 1.1 drochner
2043 1.1 drochner /* initialize BBP registers to default values */
2044 1.1 drochner for (i = 0; i < N(ural_def_bbp); i++)
2045 1.1 drochner ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
2046 1.1 drochner
2047 1.1 drochner #if 0
2048 1.1 drochner /* initialize BBP registers to values stored in EEPROM */
2049 1.1 drochner for (i = 0; i < 16; i++) {
2050 1.1 drochner if (sc->bbp_prom[i].reg == 0xff)
2051 1.1 drochner continue;
2052 1.1 drochner ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2053 1.1 drochner }
2054 1.1 drochner #endif
2055 1.1 drochner
2056 1.1 drochner return 0;
2057 1.1 drochner #undef N
2058 1.1 drochner }
2059 1.1 drochner
2060 1.1 drochner Static void
2061 1.1 drochner ural_set_txantenna(struct ural_softc *sc, int antenna)
2062 1.1 drochner {
2063 1.1 drochner uint16_t tmp;
2064 1.1 drochner uint8_t tx;
2065 1.1 drochner
2066 1.1 drochner tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2067 1.1 drochner if (antenna == 1)
2068 1.1 drochner tx |= RAL_BBP_ANTA;
2069 1.1 drochner else if (antenna == 2)
2070 1.1 drochner tx |= RAL_BBP_ANTB;
2071 1.1 drochner else
2072 1.1 drochner tx |= RAL_BBP_DIVERSITY;
2073 1.1 drochner
2074 1.1 drochner /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2075 1.1 drochner if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2076 1.1 drochner sc->rf_rev == RAL_RF_5222)
2077 1.1 drochner tx |= RAL_BBP_FLIPIQ;
2078 1.1 drochner
2079 1.1 drochner ural_bbp_write(sc, RAL_BBP_TX, tx);
2080 1.1 drochner
2081 1.12 perry /* update values in PHY_CSR5 and PHY_CSR6 */
2082 1.1 drochner tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2083 1.1 drochner ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2084 1.1 drochner
2085 1.1 drochner tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2086 1.1 drochner ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2087 1.1 drochner }
2088 1.1 drochner
2089 1.1 drochner Static void
2090 1.1 drochner ural_set_rxantenna(struct ural_softc *sc, int antenna)
2091 1.1 drochner {
2092 1.1 drochner uint8_t rx;
2093 1.1 drochner
2094 1.1 drochner rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2095 1.1 drochner if (antenna == 1)
2096 1.1 drochner rx |= RAL_BBP_ANTA;
2097 1.1 drochner else if (antenna == 2)
2098 1.1 drochner rx |= RAL_BBP_ANTB;
2099 1.1 drochner else
2100 1.1 drochner rx |= RAL_BBP_DIVERSITY;
2101 1.1 drochner
2102 1.1 drochner /* need to force no I/Q flip for RF 2525e and 2526 */
2103 1.1 drochner if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2104 1.1 drochner rx &= ~RAL_BBP_FLIPIQ;
2105 1.1 drochner
2106 1.1 drochner ural_bbp_write(sc, RAL_BBP_RX, rx);
2107 1.1 drochner }
2108 1.1 drochner
2109 1.1 drochner Static int
2110 1.1 drochner ural_init(struct ifnet *ifp)
2111 1.1 drochner {
2112 1.1 drochner #define N(a) (sizeof (a) / sizeof ((a)[0]))
2113 1.1 drochner struct ural_softc *sc = ifp->if_softc;
2114 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
2115 1.1 drochner struct ieee80211_key *wk;
2116 1.1 drochner struct ural_rx_data *data;
2117 1.12 perry uint16_t tmp;
2118 1.1 drochner usbd_status error;
2119 1.1 drochner int i, ntries;
2120 1.1 drochner
2121 1.12 perry ural_set_testmode(sc);
2122 1.12 perry ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2123 1.12 perry
2124 1.1 drochner ural_stop(ifp, 0);
2125 1.1 drochner
2126 1.1 drochner /* initialize MAC registers to default values */
2127 1.1 drochner for (i = 0; i < N(ural_def_mac); i++)
2128 1.1 drochner ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2129 1.1 drochner
2130 1.1 drochner /* wait for BBP and RF to wake up (this can take a long time!) */
2131 1.1 drochner for (ntries = 0; ntries < 100; ntries++) {
2132 1.1 drochner tmp = ural_read(sc, RAL_MAC_CSR17);
2133 1.1 drochner if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2134 1.1 drochner (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2135 1.1 drochner break;
2136 1.1 drochner DELAY(1000);
2137 1.1 drochner }
2138 1.1 drochner if (ntries == 100) {
2139 1.1 drochner printf("%s: timeout waiting for BBP/RF to wakeup\n",
2140 1.36 dyoung device_xname(sc->sc_dev));
2141 1.1 drochner error = EIO;
2142 1.1 drochner goto fail;
2143 1.1 drochner }
2144 1.1 drochner
2145 1.1 drochner /* we're ready! */
2146 1.1 drochner ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2147 1.1 drochner
2148 1.12 perry /* set basic rate set (will be updated later) */
2149 1.12 perry ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2150 1.1 drochner
2151 1.1 drochner error = ural_bbp_init(sc);
2152 1.1 drochner if (error != 0)
2153 1.1 drochner goto fail;
2154 1.1 drochner
2155 1.1 drochner /* set default BSS channel */
2156 1.9 skrll ural_set_chan(sc, ic->ic_curchan);
2157 1.1 drochner
2158 1.1 drochner /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2159 1.12 perry ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2160 1.1 drochner
2161 1.12 perry ural_set_txantenna(sc, sc->tx_ant);
2162 1.12 perry ural_set_rxantenna(sc, sc->rx_ant);
2163 1.1 drochner
2164 1.24 dyoung IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
2165 1.1 drochner ural_set_macaddr(sc, ic->ic_myaddr);
2166 1.1 drochner
2167 1.1 drochner /*
2168 1.1 drochner * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
2169 1.1 drochner */
2170 1.1 drochner for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2171 1.12 perry wk = &ic->ic_crypto.cs_nw_keys[i];
2172 1.4 drochner ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE +
2173 1.4 drochner RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE);
2174 1.1 drochner }
2175 1.1 drochner
2176 1.1 drochner /*
2177 1.12 perry * Allocate xfer for AMRR statistics requests.
2178 1.12 perry */
2179 1.12 perry sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev);
2180 1.12 perry if (sc->amrr_xfer == NULL) {
2181 1.12 perry printf("%s: could not allocate AMRR xfer\n",
2182 1.36 dyoung device_xname(sc->sc_dev));
2183 1.12 perry goto fail;
2184 1.12 perry }
2185 1.12 perry
2186 1.12 perry /*
2187 1.1 drochner * Open Tx and Rx USB bulk pipes.
2188 1.1 drochner */
2189 1.1 drochner error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2190 1.1 drochner &sc->sc_tx_pipeh);
2191 1.1 drochner if (error != 0) {
2192 1.1 drochner printf("%s: could not open Tx pipe: %s\n",
2193 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error));
2194 1.1 drochner goto fail;
2195 1.1 drochner }
2196 1.1 drochner
2197 1.1 drochner error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2198 1.1 drochner &sc->sc_rx_pipeh);
2199 1.1 drochner if (error != 0) {
2200 1.1 drochner printf("%s: could not open Rx pipe: %s\n",
2201 1.36 dyoung device_xname(sc->sc_dev), usbd_errstr(error));
2202 1.1 drochner goto fail;
2203 1.1 drochner }
2204 1.1 drochner
2205 1.1 drochner /*
2206 1.1 drochner * Allocate Tx and Rx xfer queues.
2207 1.1 drochner */
2208 1.1 drochner error = ural_alloc_tx_list(sc);
2209 1.1 drochner if (error != 0) {
2210 1.1 drochner printf("%s: could not allocate Tx list\n",
2211 1.36 dyoung device_xname(sc->sc_dev));
2212 1.1 drochner goto fail;
2213 1.1 drochner }
2214 1.1 drochner
2215 1.1 drochner error = ural_alloc_rx_list(sc);
2216 1.1 drochner if (error != 0) {
2217 1.1 drochner printf("%s: could not allocate Rx list\n",
2218 1.36 dyoung device_xname(sc->sc_dev));
2219 1.1 drochner goto fail;
2220 1.1 drochner }
2221 1.1 drochner
2222 1.1 drochner /*
2223 1.1 drochner * Start up the receive pipe.
2224 1.1 drochner */
2225 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2226 1.1 drochner data = &sc->rx_data[i];
2227 1.1 drochner
2228 1.1 drochner usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2229 1.1 drochner MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2230 1.1 drochner usbd_transfer(data->xfer);
2231 1.1 drochner }
2232 1.1 drochner
2233 1.1 drochner /* kick Rx */
2234 1.1 drochner tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
2235 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2236 1.1 drochner tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
2237 1.1 drochner if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2238 1.1 drochner tmp |= RAL_DROP_TODS;
2239 1.1 drochner if (!(ifp->if_flags & IFF_PROMISC))
2240 1.1 drochner tmp |= RAL_DROP_NOT_TO_ME;
2241 1.1 drochner }
2242 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, tmp);
2243 1.1 drochner
2244 1.1 drochner ifp->if_flags &= ~IFF_OACTIVE;
2245 1.1 drochner ifp->if_flags |= IFF_RUNNING;
2246 1.1 drochner
2247 1.12 perry if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2248 1.12 perry if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2249 1.12 perry ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2250 1.12 perry } else
2251 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2252 1.1 drochner
2253 1.1 drochner return 0;
2254 1.1 drochner
2255 1.1 drochner fail: ural_stop(ifp, 1);
2256 1.1 drochner return error;
2257 1.1 drochner #undef N
2258 1.1 drochner }
2259 1.1 drochner
2260 1.1 drochner Static void
2261 1.18 christos ural_stop(struct ifnet *ifp, int disable)
2262 1.1 drochner {
2263 1.1 drochner struct ural_softc *sc = ifp->if_softc;
2264 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
2265 1.1 drochner
2266 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2267 1.1 drochner
2268 1.4 drochner sc->sc_tx_timer = 0;
2269 1.4 drochner ifp->if_timer = 0;
2270 1.4 drochner ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2271 1.4 drochner
2272 1.1 drochner /* disable Rx */
2273 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2274 1.1 drochner
2275 1.1 drochner /* reset ASIC and BBP (but won't reset MAC registers!) */
2276 1.1 drochner ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2277 1.1 drochner ural_write(sc, RAL_MAC_CSR1, 0);
2278 1.1 drochner
2279 1.12 perry if (sc->amrr_xfer != NULL) {
2280 1.12 perry usbd_free_xfer(sc->amrr_xfer);
2281 1.12 perry sc->amrr_xfer = NULL;
2282 1.12 perry }
2283 1.12 perry
2284 1.1 drochner if (sc->sc_rx_pipeh != NULL) {
2285 1.1 drochner usbd_abort_pipe(sc->sc_rx_pipeh);
2286 1.1 drochner usbd_close_pipe(sc->sc_rx_pipeh);
2287 1.1 drochner sc->sc_rx_pipeh = NULL;
2288 1.1 drochner }
2289 1.1 drochner
2290 1.1 drochner if (sc->sc_tx_pipeh != NULL) {
2291 1.1 drochner usbd_abort_pipe(sc->sc_tx_pipeh);
2292 1.1 drochner usbd_close_pipe(sc->sc_tx_pipeh);
2293 1.1 drochner sc->sc_tx_pipeh = NULL;
2294 1.1 drochner }
2295 1.1 drochner
2296 1.1 drochner ural_free_rx_list(sc);
2297 1.1 drochner ural_free_tx_list(sc);
2298 1.1 drochner }
2299 1.1 drochner
2300 1.1 drochner int
2301 1.36 dyoung ural_activate(device_t self, enum devact act)
2302 1.1 drochner {
2303 1.30 cube struct ural_softc *sc = device_private(self);
2304 1.2 drochner
2305 1.1 drochner switch (act) {
2306 1.1 drochner case DVACT_DEACTIVATE:
2307 1.2 drochner if_deactivate(&sc->sc_if);
2308 1.33 dyoung return 0;
2309 1.33 dyoung default:
2310 1.33 dyoung return EOPNOTSUPP;
2311 1.1 drochner }
2312 1.1 drochner }
2313 1.12 perry
2314 1.12 perry Static void
2315 1.12 perry ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
2316 1.12 perry {
2317 1.12 perry int i;
2318 1.12 perry
2319 1.12 perry /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2320 1.12 perry ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2321 1.12 perry
2322 1.17 joerg ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
2323 1.12 perry
2324 1.12 perry /* set rate to some reasonable initial value */
2325 1.12 perry for (i = ni->ni_rates.rs_nrates - 1;
2326 1.12 perry i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
2327 1.12 perry i--);
2328 1.12 perry ni->ni_txrate = i;
2329 1.12 perry
2330 1.36 dyoung callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2331 1.12 perry }
2332 1.12 perry
2333 1.12 perry Static void
2334 1.12 perry ural_amrr_timeout(void *arg)
2335 1.12 perry {
2336 1.12 perry struct ural_softc *sc = (struct ural_softc *)arg;
2337 1.12 perry usb_device_request_t req;
2338 1.12 perry int s;
2339 1.12 perry
2340 1.12 perry s = splusb();
2341 1.12 perry
2342 1.12 perry /*
2343 1.12 perry * Asynchronously read statistic registers (cleared by read).
2344 1.12 perry */
2345 1.12 perry req.bmRequestType = UT_READ_VENDOR_DEVICE;
2346 1.12 perry req.bRequest = RAL_READ_MULTI_MAC;
2347 1.12 perry USETW(req.wValue, 0);
2348 1.12 perry USETW(req.wIndex, RAL_STA_CSR0);
2349 1.12 perry USETW(req.wLength, sizeof sc->sta);
2350 1.12 perry
2351 1.12 perry usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
2352 1.12 perry USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0,
2353 1.12 perry ural_amrr_update);
2354 1.12 perry (void)usbd_transfer(sc->amrr_xfer);
2355 1.12 perry
2356 1.12 perry splx(s);
2357 1.12 perry }
2358 1.12 perry
2359 1.12 perry Static void
2360 1.18 christos ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv,
2361 1.12 perry usbd_status status)
2362 1.12 perry {
2363 1.12 perry struct ural_softc *sc = (struct ural_softc *)priv;
2364 1.12 perry struct ifnet *ifp = sc->sc_ic.ic_ifp;
2365 1.12 perry
2366 1.12 perry if (status != USBD_NORMAL_COMPLETION) {
2367 1.12 perry printf("%s: could not retrieve Tx statistics - "
2368 1.12 perry "cancelling automatic rate control\n",
2369 1.36 dyoung device_xname(sc->sc_dev));
2370 1.12 perry return;
2371 1.12 perry }
2372 1.12 perry
2373 1.12 perry /* count TX retry-fail as Tx errors */
2374 1.12 perry ifp->if_oerrors += sc->sta[9];
2375 1.12 perry
2376 1.17 joerg sc->amn.amn_retrycnt =
2377 1.12 perry sc->sta[7] + /* TX one-retry ok count */
2378 1.12 perry sc->sta[8] + /* TX more-retry ok count */
2379 1.12 perry sc->sta[9]; /* TX retry-fail count */
2380 1.12 perry
2381 1.17 joerg sc->amn.amn_txcnt =
2382 1.17 joerg sc->amn.amn_retrycnt +
2383 1.12 perry sc->sta[6]; /* TX no-retry ok count */
2384 1.12 perry
2385 1.17 joerg ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
2386 1.12 perry
2387 1.36 dyoung callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc);
2388 1.12 perry }
2389