if_ural.c revision 1.4 1 1.4 drochner /* $NetBSD: if_ural.c,v 1.4 2005/07/12 12:13:00 drochner Exp $ */
2 1.4 drochner /* $OpenBSD: if_ral.c,v 1.38 2005/07/07 08:33:22 jsg Exp $ */
3 1.4 drochner /* $FreeBSD: src/sys/dev/usb/if_ural.c,v 1.9 2005/07/08 19:19:06 damien Exp $ */
4 1.1 drochner
5 1.1 drochner /*-
6 1.1 drochner * Copyright (c) 2005
7 1.1 drochner * Damien Bergamini <damien.bergamini (at) free.fr>
8 1.1 drochner *
9 1.1 drochner * Permission to use, copy, modify, and distribute this software for any
10 1.1 drochner * purpose with or without fee is hereby granted, provided that the above
11 1.1 drochner * copyright notice and this permission notice appear in all copies.
12 1.1 drochner *
13 1.1 drochner * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 1.1 drochner * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 1.1 drochner * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 1.1 drochner * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 1.1 drochner * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 1.1 drochner * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 1.1 drochner * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 1.1 drochner */
21 1.1 drochner
22 1.1 drochner /*-
23 1.1 drochner * Ralink Technology RT2500USB chipset driver
24 1.1 drochner * http://www.ralinktech.com/
25 1.1 drochner */
26 1.1 drochner
27 1.1 drochner #include <sys/cdefs.h>
28 1.4 drochner __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.4 2005/07/12 12:13:00 drochner Exp $");
29 1.1 drochner
30 1.1 drochner #include "bpfilter.h"
31 1.1 drochner
32 1.1 drochner #include <sys/param.h>
33 1.1 drochner #include <sys/sockio.h>
34 1.1 drochner #include <sys/sysctl.h>
35 1.1 drochner #include <sys/mbuf.h>
36 1.1 drochner #include <sys/kernel.h>
37 1.1 drochner #include <sys/socket.h>
38 1.1 drochner #include <sys/systm.h>
39 1.1 drochner #include <sys/malloc.h>
40 1.1 drochner #include <sys/conf.h>
41 1.1 drochner #include <sys/device.h>
42 1.1 drochner
43 1.1 drochner #include <machine/bus.h>
44 1.1 drochner #include <machine/endian.h>
45 1.1 drochner #include <machine/intr.h>
46 1.1 drochner
47 1.1 drochner #if NBPFILTER > 0
48 1.1 drochner #include <net/bpf.h>
49 1.1 drochner #endif
50 1.1 drochner #include <net/if.h>
51 1.1 drochner #include <net/if_arp.h>
52 1.1 drochner #include <net/if_dl.h>
53 1.1 drochner #include <net/if_ether.h>
54 1.1 drochner #include <net/if_media.h>
55 1.1 drochner #include <net/if_types.h>
56 1.1 drochner
57 1.1 drochner #include <netinet/in.h>
58 1.1 drochner #include <netinet/in_systm.h>
59 1.1 drochner #include <netinet/in_var.h>
60 1.1 drochner #include <netinet/ip.h>
61 1.1 drochner
62 1.2 drochner #include <net80211/ieee80211_netbsd.h>
63 1.1 drochner #include <net80211/ieee80211_var.h>
64 1.1 drochner #include <net80211/ieee80211_radiotap.h>
65 1.1 drochner
66 1.1 drochner #include <dev/usb/usb.h>
67 1.1 drochner #include <dev/usb/usbdi.h>
68 1.1 drochner #include <dev/usb/usbdi_util.h>
69 1.1 drochner #include <dev/usb/usbdevs.h>
70 1.1 drochner
71 1.1 drochner #include <dev/usb/if_uralreg.h>
72 1.1 drochner #include <dev/usb/if_uralvar.h>
73 1.1 drochner
74 1.1 drochner #ifdef USB_DEBUG
75 1.1 drochner #define URAL_DEBUG
76 1.1 drochner #endif
77 1.1 drochner
78 1.1 drochner #ifdef URAL_DEBUG
79 1.1 drochner #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0)
80 1.1 drochner #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0)
81 1.1 drochner int ural_debug = 0;
82 1.1 drochner #else
83 1.1 drochner #define DPRINTF(x)
84 1.1 drochner #define DPRINTFN(n, x)
85 1.1 drochner #endif
86 1.1 drochner
87 1.1 drochner /* various supported device vendors/products */
88 1.1 drochner static const struct usb_devno ural_devs[] = {
89 1.1 drochner { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G },
90 1.1 drochner { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 },
91 1.2 drochner { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
92 1.4 drochner { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G },
93 1.4 drochner { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP },
94 1.1 drochner { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU },
95 1.1 drochner { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
96 1.4 drochner { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
97 1.4 drochner { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
98 1.1 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
99 1.1 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
100 1.4 drochner { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
101 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 },
102 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 },
103 1.4 drochner { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 },
104 1.1 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
105 1.1 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
106 1.4 drochner { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
107 1.1 drochner { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG },
108 1.4 drochner { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G },
109 1.4 drochner { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
110 1.4 drochner { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 },
111 1.1 drochner };
112 1.1 drochner
113 1.1 drochner Static int ural_alloc_tx_list(struct ural_softc *);
114 1.1 drochner Static void ural_free_tx_list(struct ural_softc *);
115 1.1 drochner Static int ural_alloc_rx_list(struct ural_softc *);
116 1.1 drochner Static void ural_free_rx_list(struct ural_softc *);
117 1.4 drochner Static int ural_key_alloc(struct ieee80211com *,
118 1.4 drochner const struct ieee80211_key *);
119 1.1 drochner Static int ural_media_change(struct ifnet *);
120 1.1 drochner Static void ural_next_scan(void *);
121 1.1 drochner Static void ural_task(void *);
122 1.1 drochner Static int ural_newstate(struct ieee80211com *,
123 1.1 drochner enum ieee80211_state, int);
124 1.1 drochner Static void ural_txeof(usbd_xfer_handle, usbd_private_handle,
125 1.1 drochner usbd_status);
126 1.1 drochner Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle,
127 1.1 drochner usbd_status);
128 1.1 drochner Static int ural_ack_rate(int);
129 1.1 drochner Static uint16_t ural_txtime(int, int, uint32_t);
130 1.1 drochner Static uint8_t ural_plcp_signal(int);
131 1.1 drochner Static void ural_setup_tx_desc(struct ural_softc *,
132 1.1 drochner struct ural_tx_desc *, uint32_t, int, int);
133 1.1 drochner Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
134 1.1 drochner struct ieee80211_node *);
135 1.1 drochner Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
136 1.1 drochner struct ieee80211_node *);
137 1.1 drochner Static int ural_tx_data(struct ural_softc *, struct mbuf *,
138 1.1 drochner struct ieee80211_node *);
139 1.1 drochner Static void ural_start(struct ifnet *);
140 1.1 drochner Static void ural_watchdog(struct ifnet *);
141 1.1 drochner Static int ural_ioctl(struct ifnet *, u_long, caddr_t);
142 1.1 drochner Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
143 1.1 drochner int);
144 1.1 drochner Static uint16_t ural_read(struct ural_softc *, uint16_t);
145 1.1 drochner Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
146 1.1 drochner int);
147 1.1 drochner Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
148 1.1 drochner Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
149 1.1 drochner int);
150 1.1 drochner Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
151 1.1 drochner Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
152 1.1 drochner Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
153 1.1 drochner Static void ural_set_chan(struct ural_softc *,
154 1.1 drochner struct ieee80211_channel *);
155 1.1 drochner Static void ural_disable_rf_tune(struct ural_softc *);
156 1.1 drochner Static void ural_enable_tsf_sync(struct ural_softc *);
157 1.1 drochner Static void ural_set_bssid(struct ural_softc *, uint8_t *);
158 1.1 drochner Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
159 1.1 drochner Static void ural_update_promisc(struct ural_softc *);
160 1.1 drochner Static const char *ural_get_rf(int);
161 1.1 drochner Static void ural_read_eeprom(struct ural_softc *);
162 1.1 drochner Static int ural_bbp_init(struct ural_softc *);
163 1.1 drochner Static void ural_set_txantenna(struct ural_softc *, int);
164 1.1 drochner Static void ural_set_rxantenna(struct ural_softc *, int);
165 1.1 drochner Static int ural_init(struct ifnet *);
166 1.1 drochner Static void ural_stop(struct ifnet *, int);
167 1.1 drochner
168 1.1 drochner /*
169 1.1 drochner * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
170 1.1 drochner */
171 1.1 drochner static const struct ieee80211_rateset ural_rateset_11a =
172 1.1 drochner { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
173 1.1 drochner
174 1.1 drochner static const struct ieee80211_rateset ural_rateset_11b =
175 1.1 drochner { 4, { 2, 4, 11, 22 } };
176 1.1 drochner
177 1.1 drochner static const struct ieee80211_rateset ural_rateset_11g =
178 1.1 drochner { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
179 1.1 drochner
180 1.1 drochner /*
181 1.1 drochner * Default values for MAC registers; values taken from the reference driver.
182 1.1 drochner */
183 1.1 drochner static const struct {
184 1.1 drochner uint16_t reg;
185 1.1 drochner uint16_t val;
186 1.1 drochner } ural_def_mac[] = {
187 1.1 drochner { RAL_TXRX_CSR5, 0x8c8d },
188 1.1 drochner { RAL_TXRX_CSR6, 0x8b8a },
189 1.1 drochner { RAL_TXRX_CSR7, 0x8687 },
190 1.1 drochner { RAL_TXRX_CSR8, 0x0085 },
191 1.1 drochner { RAL_MAC_CSR13, 0x1111 },
192 1.1 drochner { RAL_MAC_CSR14, 0x1e11 },
193 1.1 drochner { RAL_TXRX_CSR21, 0xe78f },
194 1.1 drochner { RAL_MAC_CSR9, 0xff1d },
195 1.1 drochner { RAL_MAC_CSR11, 0x0002 },
196 1.1 drochner { RAL_MAC_CSR22, 0x0053 },
197 1.1 drochner { RAL_MAC_CSR15, 0x0000 },
198 1.1 drochner { RAL_MAC_CSR8, 0x0780 },
199 1.1 drochner { RAL_TXRX_CSR19, 0x0000 },
200 1.1 drochner { RAL_TXRX_CSR18, 0x005a },
201 1.1 drochner { RAL_PHY_CSR2, 0x0000 },
202 1.1 drochner { RAL_TXRX_CSR0, 0x1ec0 },
203 1.1 drochner { RAL_PHY_CSR4, 0x000f }
204 1.1 drochner };
205 1.1 drochner
206 1.1 drochner /*
207 1.1 drochner * Default values for BBP registers; values taken from the reference driver.
208 1.1 drochner */
209 1.1 drochner static const struct {
210 1.1 drochner uint8_t reg;
211 1.1 drochner uint8_t val;
212 1.1 drochner } ural_def_bbp[] = {
213 1.1 drochner { 3, 0x02 },
214 1.1 drochner { 4, 0x19 },
215 1.1 drochner { 14, 0x1c },
216 1.1 drochner { 15, 0x30 },
217 1.1 drochner { 16, 0xac },
218 1.1 drochner { 17, 0x48 },
219 1.1 drochner { 18, 0x18 },
220 1.1 drochner { 19, 0xff },
221 1.1 drochner { 20, 0x1e },
222 1.1 drochner { 21, 0x08 },
223 1.1 drochner { 22, 0x08 },
224 1.1 drochner { 23, 0x08 },
225 1.1 drochner { 24, 0x80 },
226 1.1 drochner { 25, 0x50 },
227 1.1 drochner { 26, 0x08 },
228 1.1 drochner { 27, 0x23 },
229 1.1 drochner { 30, 0x10 },
230 1.1 drochner { 31, 0x2b },
231 1.1 drochner { 32, 0xb9 },
232 1.1 drochner { 34, 0x12 },
233 1.1 drochner { 35, 0x50 },
234 1.1 drochner { 39, 0xc4 },
235 1.1 drochner { 40, 0x02 },
236 1.1 drochner { 41, 0x60 },
237 1.1 drochner { 53, 0x10 },
238 1.1 drochner { 54, 0x18 },
239 1.1 drochner { 56, 0x08 },
240 1.1 drochner { 57, 0x10 },
241 1.1 drochner { 58, 0x08 },
242 1.1 drochner { 61, 0x60 },
243 1.1 drochner { 62, 0x10 },
244 1.1 drochner { 75, 0xff }
245 1.1 drochner };
246 1.1 drochner
247 1.1 drochner /*
248 1.1 drochner * Default values for RF register R2 indexed by channel numbers.
249 1.1 drochner */
250 1.1 drochner static const uint32_t ural_rf2522_r2[] = {
251 1.1 drochner 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
252 1.1 drochner 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
253 1.1 drochner };
254 1.1 drochner
255 1.1 drochner static const uint32_t ural_rf2523_r2[] = {
256 1.1 drochner 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
257 1.1 drochner 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
258 1.1 drochner };
259 1.1 drochner
260 1.1 drochner static const uint32_t ural_rf2524_r2[] = {
261 1.1 drochner 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
262 1.1 drochner 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
263 1.1 drochner };
264 1.1 drochner
265 1.1 drochner static const uint32_t ural_rf2525_r2[] = {
266 1.1 drochner 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
267 1.1 drochner 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
268 1.1 drochner };
269 1.1 drochner
270 1.1 drochner static const uint32_t ural_rf2525_hi_r2[] = {
271 1.1 drochner 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
272 1.1 drochner 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
273 1.1 drochner };
274 1.1 drochner
275 1.1 drochner static const uint32_t ural_rf2525e_r2[] = {
276 1.1 drochner 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
277 1.1 drochner 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
278 1.1 drochner };
279 1.1 drochner
280 1.1 drochner static const uint32_t ural_rf2526_hi_r2[] = {
281 1.1 drochner 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
282 1.1 drochner 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
283 1.1 drochner };
284 1.1 drochner
285 1.1 drochner static const uint32_t ural_rf2526_r2[] = {
286 1.1 drochner 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
287 1.1 drochner 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
288 1.1 drochner };
289 1.1 drochner
290 1.1 drochner /*
291 1.1 drochner * For dual-band RF, RF registers R1 and R4 also depend on channel number;
292 1.1 drochner * values taken from the reference driver.
293 1.1 drochner */
294 1.1 drochner static const struct {
295 1.1 drochner uint8_t chan;
296 1.1 drochner uint32_t r1;
297 1.1 drochner uint32_t r2;
298 1.1 drochner uint32_t r4;
299 1.1 drochner } ural_rf5222[] = {
300 1.1 drochner /* channels in the 2.4GHz band */
301 1.1 drochner { 1, 0x08808, 0x0044d, 0x00282 },
302 1.1 drochner { 2, 0x08808, 0x0044e, 0x00282 },
303 1.1 drochner { 3, 0x08808, 0x0044f, 0x00282 },
304 1.1 drochner { 4, 0x08808, 0x00460, 0x00282 },
305 1.1 drochner { 5, 0x08808, 0x00461, 0x00282 },
306 1.1 drochner { 6, 0x08808, 0x00462, 0x00282 },
307 1.1 drochner { 7, 0x08808, 0x00463, 0x00282 },
308 1.1 drochner { 8, 0x08808, 0x00464, 0x00282 },
309 1.1 drochner { 9, 0x08808, 0x00465, 0x00282 },
310 1.1 drochner { 10, 0x08808, 0x00466, 0x00282 },
311 1.1 drochner { 11, 0x08808, 0x00467, 0x00282 },
312 1.1 drochner { 12, 0x08808, 0x00468, 0x00282 },
313 1.1 drochner { 13, 0x08808, 0x00469, 0x00282 },
314 1.1 drochner { 14, 0x08808, 0x0046b, 0x00286 },
315 1.1 drochner
316 1.1 drochner /* channels in the 5.2GHz band */
317 1.1 drochner { 36, 0x08804, 0x06225, 0x00287 },
318 1.1 drochner { 40, 0x08804, 0x06226, 0x00287 },
319 1.1 drochner { 44, 0x08804, 0x06227, 0x00287 },
320 1.1 drochner { 48, 0x08804, 0x06228, 0x00287 },
321 1.1 drochner { 52, 0x08804, 0x06229, 0x00287 },
322 1.1 drochner { 56, 0x08804, 0x0622a, 0x00287 },
323 1.1 drochner { 60, 0x08804, 0x0622b, 0x00287 },
324 1.1 drochner { 64, 0x08804, 0x0622c, 0x00287 },
325 1.1 drochner
326 1.1 drochner { 100, 0x08804, 0x02200, 0x00283 },
327 1.1 drochner { 104, 0x08804, 0x02201, 0x00283 },
328 1.1 drochner { 108, 0x08804, 0x02202, 0x00283 },
329 1.1 drochner { 112, 0x08804, 0x02203, 0x00283 },
330 1.1 drochner { 116, 0x08804, 0x02204, 0x00283 },
331 1.1 drochner { 120, 0x08804, 0x02205, 0x00283 },
332 1.1 drochner { 124, 0x08804, 0x02206, 0x00283 },
333 1.1 drochner { 128, 0x08804, 0x02207, 0x00283 },
334 1.1 drochner { 132, 0x08804, 0x02208, 0x00283 },
335 1.1 drochner { 136, 0x08804, 0x02209, 0x00283 },
336 1.1 drochner { 140, 0x08804, 0x0220a, 0x00283 },
337 1.1 drochner
338 1.1 drochner { 149, 0x08808, 0x02429, 0x00281 },
339 1.1 drochner { 153, 0x08808, 0x0242b, 0x00281 },
340 1.1 drochner { 157, 0x08808, 0x0242d, 0x00281 },
341 1.1 drochner { 161, 0x08808, 0x0242f, 0x00281 }
342 1.1 drochner };
343 1.1 drochner
344 1.1 drochner USB_DECLARE_DRIVER(ural);
345 1.1 drochner
346 1.1 drochner USB_MATCH(ural)
347 1.1 drochner {
348 1.1 drochner USB_MATCH_START(ural, uaa);
349 1.1 drochner
350 1.1 drochner if (uaa->iface != NULL)
351 1.1 drochner return UMATCH_NONE;
352 1.1 drochner
353 1.1 drochner return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
354 1.1 drochner UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
355 1.1 drochner }
356 1.1 drochner
357 1.1 drochner USB_ATTACH(ural)
358 1.1 drochner {
359 1.1 drochner USB_ATTACH_START(ural, sc, uaa);
360 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
361 1.2 drochner struct ifnet *ifp = &sc->sc_if;
362 1.1 drochner usb_interface_descriptor_t *id;
363 1.1 drochner usb_endpoint_descriptor_t *ed;
364 1.1 drochner usbd_status error;
365 1.1 drochner char *devinfop;
366 1.1 drochner int i;
367 1.1 drochner
368 1.1 drochner sc->sc_udev = uaa->device;
369 1.1 drochner
370 1.1 drochner devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
371 1.1 drochner USB_ATTACH_SETUP;
372 1.1 drochner printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop);
373 1.1 drochner usbd_devinfo_free(devinfop);
374 1.1 drochner
375 1.1 drochner if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
376 1.1 drochner printf("%s: could not set configuration no\n",
377 1.1 drochner USBDEVNAME(sc->sc_dev));
378 1.1 drochner USB_ATTACH_ERROR_RETURN;
379 1.1 drochner }
380 1.1 drochner
381 1.1 drochner /* get the first interface handle */
382 1.1 drochner error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
383 1.1 drochner &sc->sc_iface);
384 1.1 drochner if (error != 0) {
385 1.1 drochner printf("%s: could not get interface handle\n",
386 1.1 drochner USBDEVNAME(sc->sc_dev));
387 1.1 drochner USB_ATTACH_ERROR_RETURN;
388 1.1 drochner }
389 1.1 drochner
390 1.1 drochner /*
391 1.1 drochner * Find endpoints.
392 1.1 drochner */
393 1.1 drochner id = usbd_get_interface_descriptor(sc->sc_iface);
394 1.1 drochner
395 1.1 drochner sc->sc_rx_no = sc->sc_tx_no = -1;
396 1.1 drochner for (i = 0; i < id->bNumEndpoints; i++) {
397 1.1 drochner ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
398 1.1 drochner if (ed == NULL) {
399 1.1 drochner printf("%s: no endpoint descriptor for iface %d\n",
400 1.1 drochner USBDEVNAME(sc->sc_dev), i);
401 1.1 drochner USB_ATTACH_ERROR_RETURN;
402 1.1 drochner }
403 1.1 drochner
404 1.1 drochner if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
405 1.1 drochner UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
406 1.1 drochner sc->sc_rx_no = ed->bEndpointAddress;
407 1.1 drochner else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
408 1.1 drochner UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
409 1.1 drochner sc->sc_tx_no = ed->bEndpointAddress;
410 1.1 drochner }
411 1.1 drochner if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
412 1.1 drochner printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev));
413 1.1 drochner USB_ATTACH_ERROR_RETURN;
414 1.1 drochner }
415 1.1 drochner
416 1.1 drochner usb_init_task(&sc->sc_task, ural_task, sc);
417 1.1 drochner callout_init(&sc->scan_ch);
418 1.1 drochner
419 1.1 drochner /* retrieve RT2570 rev. no */
420 1.1 drochner sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
421 1.1 drochner
422 1.1 drochner /* retrieve MAC address and various other things from EEPROM */
423 1.1 drochner ural_read_eeprom(sc);
424 1.1 drochner
425 1.1 drochner printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s, address %s\n",
426 1.1 drochner USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev),
427 1.1 drochner ether_sprintf(ic->ic_myaddr));
428 1.1 drochner
429 1.2 drochner ic->ic_ifp = ifp;
430 1.1 drochner ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
431 1.1 drochner ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
432 1.1 drochner ic->ic_state = IEEE80211_S_INIT;
433 1.1 drochner
434 1.1 drochner /* set device capabilities */
435 1.1 drochner ic->ic_caps = IEEE80211_C_MONITOR | IEEE80211_C_IBSS |
436 1.2 drochner IEEE80211_C_HOSTAP | IEEE80211_C_SHPREAMBLE | IEEE80211_C_SHSLOT |
437 1.4 drochner IEEE80211_C_PMGT | IEEE80211_C_TXPMGT | IEEE80211_C_WPA;
438 1.1 drochner
439 1.1 drochner if (sc->rf_rev == RAL_RF_5222) {
440 1.1 drochner /* set supported .11a rates */
441 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a;
442 1.1 drochner
443 1.1 drochner /* set supported .11a channels */
444 1.1 drochner for (i = 36; i <= 64; i += 4) {
445 1.1 drochner ic->ic_channels[i].ic_freq =
446 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
447 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
448 1.1 drochner }
449 1.1 drochner for (i = 100; i <= 140; i += 4) {
450 1.1 drochner ic->ic_channels[i].ic_freq =
451 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
452 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
453 1.1 drochner }
454 1.1 drochner for (i = 149; i <= 161; i += 4) {
455 1.1 drochner ic->ic_channels[i].ic_freq =
456 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
457 1.1 drochner ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
458 1.1 drochner }
459 1.1 drochner }
460 1.1 drochner
461 1.1 drochner /* set supported .11b and .11g rates */
462 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b;
463 1.1 drochner ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g;
464 1.1 drochner
465 1.1 drochner /* set supported .11b and .11g channels (1 through 14) */
466 1.1 drochner for (i = 1; i <= 14; i++) {
467 1.1 drochner ic->ic_channels[i].ic_freq =
468 1.1 drochner ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
469 1.1 drochner ic->ic_channels[i].ic_flags =
470 1.1 drochner IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
471 1.1 drochner IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
472 1.1 drochner }
473 1.1 drochner
474 1.1 drochner ifp->if_softc = sc;
475 1.1 drochner ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
476 1.1 drochner ifp->if_init = ural_init;
477 1.1 drochner ifp->if_stop = ural_stop;
478 1.1 drochner ifp->if_ioctl = ural_ioctl;
479 1.1 drochner ifp->if_start = ural_start;
480 1.1 drochner ifp->if_watchdog = ural_watchdog;
481 1.1 drochner IFQ_SET_READY(&ifp->if_snd);
482 1.1 drochner memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ);
483 1.1 drochner
484 1.1 drochner if_attach(ifp);
485 1.1 drochner ieee80211_ifattach(ic);
486 1.1 drochner
487 1.1 drochner /* override state transition machine */
488 1.1 drochner sc->sc_newstate = ic->ic_newstate;
489 1.1 drochner ic->ic_newstate = ural_newstate;
490 1.4 drochner ic->ic_crypto.cs_key_alloc = ural_key_alloc;
491 1.1 drochner ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
492 1.1 drochner
493 1.1 drochner #if NBPFILTER > 0
494 1.1 drochner bpfattach2(ifp, DLT_IEEE802_11_RADIO,
495 1.1 drochner sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
496 1.1 drochner
497 1.1 drochner sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
498 1.1 drochner sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
499 1.1 drochner sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
500 1.1 drochner
501 1.1 drochner sc->sc_txtap_len = sizeof sc->sc_txtapu;
502 1.1 drochner sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
503 1.1 drochner sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
504 1.1 drochner #endif
505 1.1 drochner
506 1.4 drochner ieee80211_announce(ic);
507 1.4 drochner
508 1.1 drochner usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
509 1.1 drochner USBDEV(sc->sc_dev));
510 1.1 drochner
511 1.1 drochner USB_ATTACH_SUCCESS_RETURN;
512 1.1 drochner }
513 1.1 drochner
514 1.1 drochner USB_DETACH(ural)
515 1.1 drochner {
516 1.1 drochner USB_DETACH_START(ural, sc);
517 1.2 drochner struct ieee80211com *ic = &sc->sc_ic;
518 1.2 drochner struct ifnet *ifp = &sc->sc_if;
519 1.1 drochner int s;
520 1.1 drochner
521 1.1 drochner s = splusb();
522 1.1 drochner
523 1.1 drochner usb_rem_task(sc->sc_udev, &sc->sc_task);
524 1.1 drochner callout_stop(&sc->scan_ch);
525 1.1 drochner
526 1.1 drochner if (sc->sc_rx_pipeh != NULL) {
527 1.1 drochner usbd_abort_pipe(sc->sc_rx_pipeh);
528 1.1 drochner usbd_close_pipe(sc->sc_rx_pipeh);
529 1.1 drochner }
530 1.1 drochner
531 1.1 drochner if (sc->sc_tx_pipeh != NULL) {
532 1.1 drochner usbd_abort_pipe(sc->sc_tx_pipeh);
533 1.1 drochner usbd_close_pipe(sc->sc_tx_pipeh);
534 1.1 drochner }
535 1.1 drochner
536 1.1 drochner ural_free_rx_list(sc);
537 1.1 drochner ural_free_tx_list(sc);
538 1.1 drochner
539 1.1 drochner #if NBPFILTER > 0
540 1.1 drochner bpfdetach(ifp);
541 1.1 drochner #endif
542 1.2 drochner ieee80211_ifdetach(ic);
543 1.1 drochner if_detach(ifp);
544 1.1 drochner
545 1.1 drochner splx(s);
546 1.1 drochner
547 1.1 drochner usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
548 1.1 drochner USBDEV(sc->sc_dev));
549 1.1 drochner
550 1.1 drochner return 0;
551 1.1 drochner }
552 1.1 drochner
553 1.1 drochner Static int
554 1.1 drochner ural_alloc_tx_list(struct ural_softc *sc)
555 1.1 drochner {
556 1.1 drochner struct ural_tx_data *data;
557 1.1 drochner int i, error;
558 1.1 drochner
559 1.1 drochner sc->tx_queued = 0;
560 1.1 drochner
561 1.1 drochner for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
562 1.1 drochner data = &sc->tx_data[i];
563 1.1 drochner
564 1.1 drochner data->sc = sc;
565 1.1 drochner
566 1.1 drochner data->xfer = usbd_alloc_xfer(sc->sc_udev);
567 1.1 drochner if (data->xfer == NULL) {
568 1.1 drochner printf("%s: could not allocate tx xfer\n",
569 1.1 drochner USBDEVNAME(sc->sc_dev));
570 1.1 drochner error = ENOMEM;
571 1.1 drochner goto fail;
572 1.1 drochner }
573 1.1 drochner
574 1.1 drochner data->buf = usbd_alloc_buffer(data->xfer,
575 1.1 drochner RAL_TX_DESC_SIZE + MCLBYTES);
576 1.1 drochner if (data->buf == NULL) {
577 1.1 drochner printf("%s: could not allocate tx buffer\n",
578 1.1 drochner USBDEVNAME(sc->sc_dev));
579 1.1 drochner error = ENOMEM;
580 1.1 drochner goto fail;
581 1.1 drochner }
582 1.1 drochner }
583 1.1 drochner
584 1.1 drochner return 0;
585 1.1 drochner
586 1.1 drochner fail: ural_free_tx_list(sc);
587 1.1 drochner return error;
588 1.1 drochner }
589 1.1 drochner
590 1.1 drochner Static void
591 1.1 drochner ural_free_tx_list(struct ural_softc *sc)
592 1.1 drochner {
593 1.1 drochner struct ural_tx_data *data;
594 1.1 drochner int i;
595 1.1 drochner
596 1.1 drochner for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
597 1.1 drochner data = &sc->tx_data[i];
598 1.1 drochner
599 1.1 drochner if (data->xfer != NULL) {
600 1.1 drochner usbd_free_xfer(data->xfer);
601 1.1 drochner data->xfer = NULL;
602 1.1 drochner }
603 1.1 drochner
604 1.1 drochner if (data->ni != NULL) {
605 1.1 drochner ieee80211_free_node(data->ni);
606 1.1 drochner data->ni = NULL;
607 1.1 drochner }
608 1.1 drochner }
609 1.1 drochner }
610 1.1 drochner
611 1.1 drochner Static int
612 1.1 drochner ural_alloc_rx_list(struct ural_softc *sc)
613 1.1 drochner {
614 1.1 drochner struct ural_rx_data *data;
615 1.1 drochner int i, error;
616 1.1 drochner
617 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
618 1.1 drochner data = &sc->rx_data[i];
619 1.1 drochner
620 1.1 drochner data->sc = sc;
621 1.1 drochner
622 1.1 drochner data->xfer = usbd_alloc_xfer(sc->sc_udev);
623 1.1 drochner if (data->xfer == NULL) {
624 1.1 drochner printf("%s: could not allocate rx xfer\n",
625 1.1 drochner USBDEVNAME(sc->sc_dev));
626 1.1 drochner error = ENOMEM;
627 1.1 drochner goto fail;
628 1.1 drochner }
629 1.1 drochner
630 1.1 drochner if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
631 1.1 drochner printf("%s: could not allocate rx buffer\n",
632 1.1 drochner USBDEVNAME(sc->sc_dev));
633 1.1 drochner error = ENOMEM;
634 1.1 drochner goto fail;
635 1.1 drochner }
636 1.1 drochner
637 1.1 drochner MGETHDR(data->m, M_DONTWAIT, MT_DATA);
638 1.1 drochner if (data->m == NULL) {
639 1.1 drochner printf("%s: could not allocate rx mbuf\n",
640 1.1 drochner USBDEVNAME(sc->sc_dev));
641 1.1 drochner error = ENOMEM;
642 1.1 drochner goto fail;
643 1.1 drochner }
644 1.1 drochner
645 1.1 drochner MCLGET(data->m, M_DONTWAIT);
646 1.1 drochner if (!(data->m->m_flags & M_EXT)) {
647 1.1 drochner printf("%s: could not allocate rx mbuf cluster\n",
648 1.1 drochner USBDEVNAME(sc->sc_dev));
649 1.1 drochner error = ENOMEM;
650 1.1 drochner goto fail;
651 1.1 drochner }
652 1.1 drochner
653 1.1 drochner data->buf = mtod(data->m, uint8_t *);
654 1.1 drochner }
655 1.1 drochner
656 1.1 drochner return 0;
657 1.1 drochner
658 1.1 drochner fail: ural_free_tx_list(sc);
659 1.1 drochner return error;
660 1.1 drochner }
661 1.1 drochner
662 1.1 drochner Static void
663 1.1 drochner ural_free_rx_list(struct ural_softc *sc)
664 1.1 drochner {
665 1.1 drochner struct ural_rx_data *data;
666 1.1 drochner int i;
667 1.1 drochner
668 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
669 1.1 drochner data = &sc->rx_data[i];
670 1.1 drochner
671 1.1 drochner if (data->xfer != NULL) {
672 1.1 drochner usbd_free_xfer(data->xfer);
673 1.1 drochner data->xfer = NULL;
674 1.1 drochner }
675 1.1 drochner
676 1.1 drochner if (data->m != NULL) {
677 1.1 drochner m_freem(data->m);
678 1.1 drochner data->m = NULL;
679 1.1 drochner }
680 1.1 drochner }
681 1.1 drochner }
682 1.1 drochner
683 1.1 drochner Static int
684 1.4 drochner ural_key_alloc(struct ieee80211com *ic, const struct ieee80211_key *k)
685 1.4 drochner {
686 1.4 drochner if (k >= ic->ic_nw_keys && k < &ic->ic_nw_keys[IEEE80211_WEP_NKID])
687 1.4 drochner return k - ic->ic_nw_keys;
688 1.4 drochner
689 1.4 drochner return IEEE80211_KEYIX_NONE;
690 1.4 drochner }
691 1.4 drochner
692 1.4 drochner Static int
693 1.1 drochner ural_media_change(struct ifnet *ifp)
694 1.1 drochner {
695 1.1 drochner int error;
696 1.1 drochner
697 1.1 drochner error = ieee80211_media_change(ifp);
698 1.1 drochner if (error != ENETRESET)
699 1.1 drochner return error;
700 1.1 drochner
701 1.1 drochner if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
702 1.1 drochner ural_init(ifp);
703 1.1 drochner
704 1.1 drochner return 0;
705 1.1 drochner }
706 1.1 drochner
707 1.1 drochner /*
708 1.1 drochner * This function is called periodically (every 200ms) during scanning to
709 1.1 drochner * switch from one channel to another.
710 1.1 drochner */
711 1.1 drochner Static void
712 1.1 drochner ural_next_scan(void *arg)
713 1.1 drochner {
714 1.1 drochner struct ural_softc *sc = arg;
715 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
716 1.1 drochner
717 1.1 drochner if (ic->ic_state == IEEE80211_S_SCAN)
718 1.1 drochner ieee80211_next_scan(ic);
719 1.1 drochner }
720 1.1 drochner
721 1.1 drochner Static void
722 1.1 drochner ural_task(void *arg)
723 1.1 drochner {
724 1.1 drochner struct ural_softc *sc = arg;
725 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
726 1.1 drochner enum ieee80211_state ostate;
727 1.1 drochner struct mbuf *m;
728 1.1 drochner
729 1.1 drochner ostate = ic->ic_state;
730 1.1 drochner
731 1.1 drochner switch (sc->sc_state) {
732 1.1 drochner case IEEE80211_S_INIT:
733 1.1 drochner if (ostate == IEEE80211_S_RUN) {
734 1.1 drochner /* abort TSF synchronization */
735 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, 0);
736 1.1 drochner
737 1.1 drochner /* force tx led to stop blinking */
738 1.1 drochner ural_write(sc, RAL_MAC_CSR20, 0);
739 1.1 drochner }
740 1.1 drochner break;
741 1.1 drochner
742 1.1 drochner case IEEE80211_S_SCAN:
743 1.1 drochner ural_set_chan(sc, ic->ic_bss->ni_chan);
744 1.1 drochner callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc);
745 1.1 drochner break;
746 1.1 drochner
747 1.1 drochner case IEEE80211_S_AUTH:
748 1.1 drochner ural_set_chan(sc, ic->ic_bss->ni_chan);
749 1.1 drochner break;
750 1.1 drochner
751 1.1 drochner case IEEE80211_S_ASSOC:
752 1.1 drochner ural_set_chan(sc, ic->ic_bss->ni_chan);
753 1.1 drochner break;
754 1.1 drochner
755 1.1 drochner case IEEE80211_S_RUN:
756 1.1 drochner ural_set_chan(sc, ic->ic_bss->ni_chan);
757 1.1 drochner
758 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR)
759 1.1 drochner ural_set_bssid(sc, ic->ic_bss->ni_bssid);
760 1.1 drochner
761 1.1 drochner if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
762 1.1 drochner ic->ic_opmode == IEEE80211_M_IBSS) {
763 1.1 drochner m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo);
764 1.1 drochner if (m == NULL) {
765 1.1 drochner printf("%s: could not allocate beacon\n",
766 1.1 drochner USBDEVNAME(sc->sc_dev));
767 1.1 drochner return;
768 1.1 drochner }
769 1.1 drochner
770 1.1 drochner if (ural_tx_bcn(sc, m, ic->ic_bss) != 0) {
771 1.1 drochner m_freem(m);
772 1.1 drochner printf("%s: could not transmit beacon\n",
773 1.1 drochner USBDEVNAME(sc->sc_dev));
774 1.1 drochner return;
775 1.1 drochner }
776 1.1 drochner
777 1.1 drochner /* beacon is no longer needed */
778 1.1 drochner m_freem(m);
779 1.1 drochner }
780 1.1 drochner
781 1.1 drochner /* make tx led blink on tx (controlled by ASIC) */
782 1.1 drochner ural_write(sc, RAL_MAC_CSR20, 1);
783 1.1 drochner
784 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR)
785 1.1 drochner ural_enable_tsf_sync(sc);
786 1.1 drochner break;
787 1.1 drochner }
788 1.1 drochner
789 1.1 drochner sc->sc_newstate(ic, sc->sc_state, -1);
790 1.1 drochner }
791 1.1 drochner
792 1.1 drochner Static int
793 1.1 drochner ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
794 1.1 drochner {
795 1.1 drochner struct ural_softc *sc = ic->ic_ifp->if_softc;
796 1.1 drochner
797 1.1 drochner usb_rem_task(sc->sc_udev, &sc->sc_task);
798 1.1 drochner callout_stop(&sc->scan_ch);
799 1.1 drochner
800 1.1 drochner /* do it in a process context */
801 1.1 drochner sc->sc_state = nstate;
802 1.1 drochner usb_add_task(sc->sc_udev, &sc->sc_task);
803 1.1 drochner
804 1.1 drochner return 0;
805 1.1 drochner }
806 1.1 drochner
807 1.1 drochner /* quickly determine if a given rate is CCK or OFDM */
808 1.1 drochner #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
809 1.1 drochner
810 1.1 drochner #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
811 1.1 drochner #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
812 1.1 drochner #define RAL_SIFS 10
813 1.1 drochner
814 1.1 drochner Static void
815 1.1 drochner ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
816 1.1 drochner {
817 1.1 drochner struct ural_tx_data *data = priv;
818 1.1 drochner struct ural_softc *sc = data->sc;
819 1.2 drochner struct ifnet *ifp = &sc->sc_if;
820 1.1 drochner int s;
821 1.1 drochner
822 1.1 drochner if (status != USBD_NORMAL_COMPLETION) {
823 1.1 drochner if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
824 1.1 drochner return;
825 1.1 drochner
826 1.1 drochner printf("%s: could not transmit buffer: %s\n",
827 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(status));
828 1.1 drochner
829 1.1 drochner if (status == USBD_STALLED)
830 1.1 drochner usbd_clear_endpoint_stall(sc->sc_tx_pipeh);
831 1.1 drochner
832 1.1 drochner ifp->if_oerrors++;
833 1.1 drochner return;
834 1.1 drochner }
835 1.1 drochner
836 1.1 drochner s = splnet();
837 1.1 drochner
838 1.1 drochner m_freem(data->m);
839 1.1 drochner data->m = NULL;
840 1.1 drochner ieee80211_free_node(data->ni);
841 1.1 drochner data->ni = NULL;
842 1.1 drochner
843 1.1 drochner sc->tx_queued--;
844 1.1 drochner ifp->if_opackets++;
845 1.1 drochner
846 1.1 drochner DPRINTFN(10, ("tx done\n"));
847 1.1 drochner
848 1.1 drochner sc->sc_tx_timer = 0;
849 1.1 drochner ifp->if_flags &= ~IFF_OACTIVE;
850 1.1 drochner ural_start(ifp);
851 1.1 drochner
852 1.1 drochner splx(s);
853 1.1 drochner }
854 1.1 drochner
855 1.1 drochner Static void
856 1.1 drochner ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
857 1.1 drochner {
858 1.1 drochner struct ural_rx_data *data = priv;
859 1.1 drochner struct ural_softc *sc = data->sc;
860 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
861 1.2 drochner struct ifnet *ifp = &sc->sc_if;
862 1.1 drochner struct ural_rx_desc *desc;
863 1.1 drochner struct ieee80211_frame_min *wh;
864 1.1 drochner struct ieee80211_node *ni;
865 1.1 drochner struct mbuf *m;
866 1.1 drochner int s, len;
867 1.1 drochner
868 1.1 drochner if (status != USBD_NORMAL_COMPLETION) {
869 1.1 drochner if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
870 1.1 drochner return;
871 1.1 drochner
872 1.1 drochner if (status == USBD_STALLED)
873 1.1 drochner usbd_clear_endpoint_stall(sc->sc_rx_pipeh);
874 1.1 drochner goto skip;
875 1.1 drochner }
876 1.1 drochner
877 1.1 drochner usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
878 1.1 drochner
879 1.1 drochner if (len < RAL_RX_DESC_SIZE) {
880 1.1 drochner printf("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), len);
881 1.1 drochner ifp->if_ierrors++;
882 1.1 drochner goto skip;
883 1.1 drochner }
884 1.1 drochner
885 1.1 drochner /* rx descriptor is located at the end */
886 1.1 drochner desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
887 1.1 drochner
888 1.1 drochner if (le32toh(desc->flags) & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
889 1.1 drochner /*
890 1.1 drochner * This should not happen since we did not request to receive
891 1.1 drochner * those frames when we filled RAL_TXRX_CSR2.
892 1.1 drochner */
893 1.1 drochner DPRINTFN(5, ("PHY or CRC error\n"));
894 1.1 drochner ifp->if_ierrors++;
895 1.1 drochner goto skip;
896 1.1 drochner }
897 1.1 drochner
898 1.1 drochner /* finalize mbuf */
899 1.1 drochner m = data->m;
900 1.1 drochner m->m_pkthdr.rcvif = ifp;
901 1.1 drochner m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff;
902 1.1 drochner m->m_flags |= M_HASFCS; /* hardware appends FCS */
903 1.1 drochner
904 1.1 drochner s = splnet();
905 1.1 drochner
906 1.1 drochner #if NBPFILTER > 0
907 1.1 drochner if (sc->sc_drvbpf != NULL) {
908 1.1 drochner struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
909 1.1 drochner
910 1.1 drochner tap->wr_flags = 0;
911 1.1 drochner tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
912 1.1 drochner tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
913 1.1 drochner tap->wr_antenna = sc->rx_ant;
914 1.1 drochner tap->wr_antsignal = desc->rssi;
915 1.1 drochner
916 1.1 drochner bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
917 1.1 drochner }
918 1.1 drochner #endif
919 1.1 drochner
920 1.1 drochner wh = mtod(m, struct ieee80211_frame_min *);
921 1.1 drochner ni = ieee80211_find_rxnode(ic, wh);
922 1.1 drochner
923 1.1 drochner /* send the frame to the 802.11 layer */
924 1.1 drochner ieee80211_input(ic, m, ni, desc->rssi, 0);
925 1.1 drochner
926 1.1 drochner /* node is no longer needed */
927 1.1 drochner ieee80211_free_node(ni);
928 1.1 drochner
929 1.1 drochner splx(s);
930 1.1 drochner
931 1.1 drochner MGETHDR(data->m, M_DONTWAIT, MT_DATA);
932 1.1 drochner if (data->m == NULL) {
933 1.1 drochner printf("%s: could not allocate rx mbuf\n",
934 1.1 drochner USBDEVNAME(sc->sc_dev));
935 1.1 drochner return;
936 1.1 drochner }
937 1.1 drochner
938 1.1 drochner MCLGET(data->m, M_DONTWAIT);
939 1.1 drochner if (!(data->m->m_flags & M_EXT)) {
940 1.1 drochner printf("%s: could not allocate rx mbuf cluster\n",
941 1.1 drochner USBDEVNAME(sc->sc_dev));
942 1.1 drochner m_freem(data->m);
943 1.1 drochner data->m = NULL;
944 1.1 drochner return;
945 1.1 drochner }
946 1.1 drochner
947 1.1 drochner data->buf = mtod(data->m, uint8_t *);
948 1.1 drochner
949 1.1 drochner DPRINTFN(15, ("rx done\n"));
950 1.1 drochner
951 1.1 drochner skip: /* setup a new transfer */
952 1.1 drochner usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
953 1.1 drochner USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
954 1.1 drochner usbd_transfer(xfer);
955 1.1 drochner }
956 1.1 drochner
957 1.1 drochner /*
958 1.1 drochner * Return the expected ack rate for a frame transmitted at rate `rate'.
959 1.1 drochner * XXX: this should depend on the destination node basic rate set.
960 1.1 drochner */
961 1.1 drochner Static int
962 1.1 drochner ural_ack_rate(int rate)
963 1.1 drochner {
964 1.1 drochner switch (rate) {
965 1.1 drochner /* CCK rates */
966 1.1 drochner case 2:
967 1.1 drochner return 2;
968 1.1 drochner case 4:
969 1.1 drochner case 11:
970 1.1 drochner case 22:
971 1.1 drochner return 4;
972 1.1 drochner
973 1.1 drochner /* OFDM rates */
974 1.1 drochner case 12:
975 1.1 drochner case 18:
976 1.1 drochner return 12;
977 1.1 drochner case 24:
978 1.1 drochner case 36:
979 1.1 drochner return 24;
980 1.1 drochner case 48:
981 1.1 drochner case 72:
982 1.1 drochner case 96:
983 1.1 drochner case 108:
984 1.1 drochner return 48;
985 1.1 drochner }
986 1.1 drochner
987 1.1 drochner /* default to 1Mbps */
988 1.1 drochner return 2;
989 1.1 drochner }
990 1.1 drochner
991 1.1 drochner /*
992 1.1 drochner * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
993 1.1 drochner * The function automatically determines the operating mode depending on the
994 1.1 drochner * given rate. `flags' indicates whether short preamble is in use or not.
995 1.1 drochner */
996 1.1 drochner Static uint16_t
997 1.1 drochner ural_txtime(int len, int rate, uint32_t flags)
998 1.1 drochner {
999 1.1 drochner uint16_t txtime;
1000 1.1 drochner int ceil, dbps;
1001 1.1 drochner
1002 1.1 drochner if (RAL_RATE_IS_OFDM(rate)) {
1003 1.1 drochner /*
1004 1.1 drochner * OFDM TXTIME calculation.
1005 1.1 drochner * From IEEE Std 802.11a-1999, pp. 37.
1006 1.1 drochner */
1007 1.1 drochner dbps = rate * 2; /* data bits per OFDM symbol */
1008 1.1 drochner
1009 1.1 drochner ceil = (16 + 8 * len + 6) / dbps;
1010 1.1 drochner if ((16 + 8 * len + 6) % dbps != 0)
1011 1.1 drochner ceil++;
1012 1.1 drochner
1013 1.1 drochner txtime = 16 + 4 + 4 * ceil + 6;
1014 1.1 drochner } else {
1015 1.1 drochner /*
1016 1.1 drochner * High Rate TXTIME calculation.
1017 1.1 drochner * From IEEE Std 802.11b-1999, pp. 28.
1018 1.1 drochner */
1019 1.1 drochner ceil = (8 * len * 2) / rate;
1020 1.1 drochner if ((8 * len * 2) % rate != 0)
1021 1.1 drochner ceil++;
1022 1.1 drochner
1023 1.1 drochner if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1024 1.1 drochner txtime = 72 + 24 + ceil;
1025 1.1 drochner else
1026 1.1 drochner txtime = 144 + 48 + ceil;
1027 1.1 drochner }
1028 1.1 drochner
1029 1.1 drochner return txtime;
1030 1.1 drochner }
1031 1.1 drochner
1032 1.1 drochner Static uint8_t
1033 1.1 drochner ural_plcp_signal(int rate)
1034 1.1 drochner {
1035 1.1 drochner switch (rate) {
1036 1.1 drochner /* CCK rates (returned values are device-dependent) */
1037 1.1 drochner case 2: return 0x0;
1038 1.1 drochner case 4: return 0x1;
1039 1.1 drochner case 11: return 0x2;
1040 1.1 drochner case 22: return 0x3;
1041 1.1 drochner
1042 1.1 drochner /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1043 1.1 drochner case 12: return 0xb;
1044 1.1 drochner case 18: return 0xf;
1045 1.1 drochner case 24: return 0xa;
1046 1.1 drochner case 36: return 0xe;
1047 1.1 drochner case 48: return 0x9;
1048 1.1 drochner case 72: return 0xd;
1049 1.1 drochner case 96: return 0x8;
1050 1.1 drochner case 108: return 0xc;
1051 1.1 drochner
1052 1.1 drochner /* unsupported rates (should not get there) */
1053 1.1 drochner default: return 0xff;
1054 1.1 drochner }
1055 1.1 drochner }
1056 1.1 drochner
1057 1.1 drochner Static void
1058 1.1 drochner ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1059 1.1 drochner uint32_t flags, int len, int rate)
1060 1.1 drochner {
1061 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1062 1.1 drochner uint16_t plcp_length;
1063 1.1 drochner int remainder;
1064 1.1 drochner
1065 1.1 drochner desc->flags = htole32(flags);
1066 1.1 drochner desc->flags |= htole32(RAL_TX_NEWSEQ);
1067 1.1 drochner desc->flags |= htole32(len << 16);
1068 1.1 drochner
1069 1.1 drochner if (RAL_RATE_IS_OFDM(rate))
1070 1.1 drochner desc->flags |= htole32(RAL_TX_OFDM);
1071 1.1 drochner
1072 1.1 drochner desc->wme = htole16(RAL_LOGCWMAX(5) | RAL_LOGCWMIN(3) | RAL_AIFSN(2));
1073 1.4 drochner desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1074 1.1 drochner
1075 1.1 drochner /*
1076 1.1 drochner * Fill PLCP fields.
1077 1.1 drochner */
1078 1.1 drochner desc->plcp_service = 4;
1079 1.1 drochner
1080 1.1 drochner len += 4; /* account for FCS */
1081 1.1 drochner if (RAL_RATE_IS_OFDM(rate)) {
1082 1.1 drochner /*
1083 1.1 drochner * PLCP length field (LENGTH).
1084 1.1 drochner * From IEEE Std 802.11a-1999, pp. 14.
1085 1.1 drochner */
1086 1.1 drochner plcp_length = len & 0xfff;
1087 1.1 drochner desc->plcp_length = htole16((plcp_length >> 6) << 8 |
1088 1.1 drochner (plcp_length & 0x3f));
1089 1.1 drochner } else {
1090 1.1 drochner /*
1091 1.1 drochner * Long PLCP LENGTH field.
1092 1.1 drochner * From IEEE Std 802.11b-1999, pp. 16.
1093 1.1 drochner */
1094 1.1 drochner plcp_length = (8 * len * 2) / rate;
1095 1.1 drochner remainder = (8 * len * 2) % rate;
1096 1.1 drochner if (remainder != 0) {
1097 1.1 drochner if (rate == 22 && (rate - remainder) / 16 != 0)
1098 1.1 drochner desc->plcp_service |= RAL_PLCP_LENGEXT;
1099 1.1 drochner plcp_length++;
1100 1.1 drochner }
1101 1.1 drochner desc->plcp_length = htole16(plcp_length);
1102 1.1 drochner }
1103 1.1 drochner
1104 1.1 drochner desc->plcp_signal = ural_plcp_signal(rate);
1105 1.1 drochner if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1106 1.1 drochner desc->plcp_signal |= 0x08;
1107 1.1 drochner
1108 1.1 drochner desc->iv = 0;
1109 1.1 drochner desc->eiv = 0;
1110 1.1 drochner }
1111 1.1 drochner
1112 1.1 drochner #define RAL_TX_TIMEOUT 5000
1113 1.1 drochner
1114 1.1 drochner Static int
1115 1.1 drochner ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1116 1.1 drochner {
1117 1.1 drochner struct ural_tx_desc *desc;
1118 1.1 drochner usbd_xfer_handle xfer;
1119 1.1 drochner usbd_status error;
1120 1.1 drochner uint8_t cmd = 0;
1121 1.1 drochner uint8_t *buf;
1122 1.1 drochner int xferlen, rate;
1123 1.1 drochner
1124 1.1 drochner rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 4;
1125 1.1 drochner
1126 1.1 drochner xfer = usbd_alloc_xfer(sc->sc_udev);
1127 1.1 drochner if (xfer == NULL)
1128 1.1 drochner return ENOMEM;
1129 1.1 drochner
1130 1.1 drochner /* xfer length needs to be a multiple of two! */
1131 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1132 1.1 drochner
1133 1.1 drochner buf = usbd_alloc_buffer(xfer, xferlen);
1134 1.1 drochner if (buf == NULL) {
1135 1.1 drochner usbd_free_xfer(xfer);
1136 1.1 drochner return ENOMEM;
1137 1.1 drochner }
1138 1.1 drochner
1139 1.1 drochner usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1140 1.1 drochner USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1141 1.1 drochner
1142 1.1 drochner error = usbd_sync_transfer(xfer);
1143 1.1 drochner if (error != 0) {
1144 1.1 drochner usbd_free_xfer(xfer);
1145 1.1 drochner return error;
1146 1.1 drochner }
1147 1.1 drochner
1148 1.1 drochner desc = (struct ural_tx_desc *)buf;
1149 1.1 drochner
1150 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1151 1.1 drochner ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1152 1.1 drochner m0->m_pkthdr.len, rate);
1153 1.1 drochner
1154 1.1 drochner DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1155 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1156 1.1 drochner
1157 1.1 drochner usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
1158 1.1 drochner USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1159 1.1 drochner
1160 1.1 drochner error = usbd_sync_transfer(xfer);
1161 1.1 drochner usbd_free_xfer(xfer);
1162 1.1 drochner
1163 1.1 drochner return error;
1164 1.1 drochner }
1165 1.1 drochner
1166 1.1 drochner Static int
1167 1.1 drochner ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1168 1.1 drochner {
1169 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1170 1.1 drochner struct ural_tx_desc *desc;
1171 1.1 drochner struct ural_tx_data *data;
1172 1.1 drochner struct ieee80211_frame *wh;
1173 1.1 drochner uint32_t flags = 0;
1174 1.1 drochner uint16_t dur;
1175 1.1 drochner usbd_status error;
1176 1.1 drochner int xferlen, rate;
1177 1.1 drochner
1178 1.1 drochner data = &sc->tx_data[0];
1179 1.1 drochner desc = (struct ural_tx_desc *)data->buf;
1180 1.1 drochner
1181 1.1 drochner rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 4;
1182 1.1 drochner
1183 1.1 drochner #if NBPFILTER > 0
1184 1.1 drochner if (sc->sc_drvbpf != NULL) {
1185 1.1 drochner struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1186 1.1 drochner
1187 1.1 drochner tap->wt_flags = 0;
1188 1.1 drochner tap->wt_rate = rate;
1189 1.1 drochner tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1190 1.1 drochner tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1191 1.1 drochner tap->wt_antenna = sc->tx_ant;
1192 1.1 drochner
1193 1.1 drochner bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1194 1.1 drochner }
1195 1.1 drochner #endif
1196 1.1 drochner
1197 1.1 drochner data->m = m0;
1198 1.1 drochner data->ni = ni;
1199 1.1 drochner
1200 1.1 drochner wh = mtod(m0, struct ieee80211_frame *);
1201 1.1 drochner
1202 1.1 drochner if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1203 1.1 drochner flags |= RAL_TX_ACK;
1204 1.1 drochner
1205 1.1 drochner dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS;
1206 1.1 drochner *(uint16_t *)wh->i_dur = htole16(dur);
1207 1.1 drochner
1208 1.1 drochner /* tell hardware to add timestamp for probe responses */
1209 1.1 drochner if ((wh->i_fc[0] &
1210 1.1 drochner (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1211 1.1 drochner (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1212 1.1 drochner flags |= RAL_TX_TIMESTAMP;
1213 1.1 drochner }
1214 1.1 drochner
1215 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1216 1.1 drochner ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1217 1.1 drochner
1218 1.1 drochner /* xfer length needs to be a multiple of two! */
1219 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1220 1.1 drochner
1221 1.1 drochner DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1222 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1223 1.1 drochner
1224 1.1 drochner usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen,
1225 1.1 drochner USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, ural_txeof);
1226 1.1 drochner
1227 1.1 drochner error = usbd_transfer(data->xfer);
1228 1.1 drochner if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1229 1.1 drochner m_freem(m0);
1230 1.1 drochner return error;
1231 1.1 drochner }
1232 1.1 drochner
1233 1.1 drochner sc->tx_queued++;
1234 1.1 drochner
1235 1.1 drochner return 0;
1236 1.1 drochner }
1237 1.1 drochner
1238 1.1 drochner Static int
1239 1.1 drochner ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1240 1.1 drochner {
1241 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1242 1.1 drochner struct ieee80211_rateset *rs;
1243 1.1 drochner struct ural_tx_desc *desc;
1244 1.1 drochner struct ural_tx_data *data;
1245 1.1 drochner struct ieee80211_frame *wh;
1246 1.1 drochner struct ieee80211_key *k;
1247 1.1 drochner uint32_t flags = 0;
1248 1.1 drochner uint16_t dur;
1249 1.1 drochner usbd_status error;
1250 1.1 drochner int xferlen, rate;
1251 1.1 drochner
1252 1.2 drochner wh = mtod(m0, struct ieee80211_frame *);
1253 1.2 drochner
1254 1.1 drochner /* XXX this should be reworked! */
1255 1.1 drochner if (ic->ic_fixed_rate != -1) {
1256 1.1 drochner if (ic->ic_curmode != IEEE80211_MODE_AUTO)
1257 1.1 drochner rs = &ic->ic_sup_rates[ic->ic_curmode];
1258 1.1 drochner else
1259 1.1 drochner rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
1260 1.1 drochner
1261 1.1 drochner rate = rs->rs_rates[ic->ic_fixed_rate];
1262 1.1 drochner } else {
1263 1.1 drochner rs = &ni->ni_rates;
1264 1.1 drochner rate = rs->rs_rates[ni->ni_txrate];
1265 1.1 drochner }
1266 1.1 drochner rate &= IEEE80211_RATE_VAL;
1267 1.1 drochner
1268 1.2 drochner if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1269 1.1 drochner k = ieee80211_crypto_encap(ic, ni, m0);
1270 1.3 dyoung if (k == NULL) {
1271 1.3 dyoung m_freem(m0);
1272 1.1 drochner return ENOBUFS;
1273 1.3 dyoung }
1274 1.2 drochner
1275 1.2 drochner /* packet header may have moved, reset our local pointer */
1276 1.2 drochner wh = mtod(m0, struct ieee80211_frame *);
1277 1.1 drochner }
1278 1.1 drochner
1279 1.1 drochner #if NBPFILTER > 0
1280 1.1 drochner if (sc->sc_drvbpf != NULL) {
1281 1.1 drochner struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1282 1.1 drochner
1283 1.1 drochner tap->wt_flags = 0;
1284 1.1 drochner tap->wt_rate = rate;
1285 1.1 drochner tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1286 1.1 drochner tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1287 1.1 drochner tap->wt_antenna = sc->tx_ant;
1288 1.1 drochner
1289 1.1 drochner bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1290 1.1 drochner }
1291 1.1 drochner #endif
1292 1.1 drochner
1293 1.1 drochner data = &sc->tx_data[0];
1294 1.1 drochner desc = (struct ural_tx_desc *)data->buf;
1295 1.1 drochner
1296 1.1 drochner data->m = m0;
1297 1.1 drochner data->ni = ni;
1298 1.1 drochner
1299 1.1 drochner if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1300 1.1 drochner flags |= RAL_TX_ACK;
1301 1.1 drochner flags |= RAL_TX_RETRY(7);
1302 1.1 drochner
1303 1.1 drochner dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(rate),
1304 1.1 drochner ic->ic_flags) + RAL_SIFS;
1305 1.1 drochner *(uint16_t *)wh->i_dur = htole16(dur);
1306 1.1 drochner }
1307 1.1 drochner
1308 1.1 drochner m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1309 1.1 drochner ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1310 1.1 drochner
1311 1.1 drochner /* xfer length needs to be a multiple of two! */
1312 1.1 drochner xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1313 1.1 drochner
1314 1.1 drochner DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1315 1.1 drochner m0->m_pkthdr.len, rate, xferlen));
1316 1.1 drochner
1317 1.1 drochner usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen,
1318 1.1 drochner USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, ural_txeof);
1319 1.1 drochner
1320 1.1 drochner error = usbd_transfer(data->xfer);
1321 1.1 drochner if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1322 1.1 drochner m_freem(m0);
1323 1.1 drochner return error;
1324 1.1 drochner }
1325 1.1 drochner
1326 1.1 drochner sc->tx_queued++;
1327 1.1 drochner
1328 1.1 drochner return 0;
1329 1.1 drochner }
1330 1.1 drochner
1331 1.1 drochner Static void
1332 1.1 drochner ural_start(struct ifnet *ifp)
1333 1.1 drochner {
1334 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1335 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1336 1.1 drochner struct ether_header *eh;
1337 1.1 drochner struct ieee80211_node *ni;
1338 1.1 drochner struct mbuf *m0;
1339 1.1 drochner
1340 1.1 drochner for (;;) {
1341 1.1 drochner IF_POLL(&ic->ic_mgtq, m0);
1342 1.1 drochner if (m0 != NULL) {
1343 1.1 drochner if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1344 1.1 drochner ifp->if_flags |= IFF_OACTIVE;
1345 1.1 drochner break;
1346 1.1 drochner }
1347 1.1 drochner IF_DEQUEUE(&ic->ic_mgtq, m0);
1348 1.1 drochner
1349 1.1 drochner ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1350 1.1 drochner m0->m_pkthdr.rcvif = NULL;
1351 1.1 drochner #if NBPFILTER > 0
1352 1.1 drochner if (ic->ic_rawbpf != NULL)
1353 1.1 drochner bpf_mtap(ic->ic_rawbpf, m0);
1354 1.1 drochner #endif
1355 1.1 drochner if (ural_tx_mgt(sc, m0, ni) != 0)
1356 1.1 drochner break;
1357 1.1 drochner
1358 1.1 drochner } else {
1359 1.1 drochner if (ic->ic_state != IEEE80211_S_RUN)
1360 1.1 drochner break;
1361 1.1 drochner IFQ_DEQUEUE(&ifp->if_snd, m0);
1362 1.1 drochner if (m0 == NULL)
1363 1.1 drochner break;
1364 1.1 drochner if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1365 1.1 drochner IF_PREPEND(&ifp->if_snd, m0);
1366 1.1 drochner ifp->if_flags |= IFF_OACTIVE;
1367 1.1 drochner break;
1368 1.1 drochner }
1369 1.1 drochner
1370 1.2 drochner if (m0->m_len < sizeof (struct ether_header) &&
1371 1.2 drochner !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1372 1.1 drochner continue;
1373 1.1 drochner
1374 1.1 drochner eh = mtod(m0, struct ether_header *);
1375 1.1 drochner ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1376 1.1 drochner if (ni == NULL) {
1377 1.1 drochner m_freem(m0);
1378 1.1 drochner continue;
1379 1.1 drochner }
1380 1.1 drochner #if NBPFILTER > 0
1381 1.1 drochner if (ifp->if_bpf != NULL)
1382 1.1 drochner bpf_mtap(ifp->if_bpf, m0);
1383 1.1 drochner #endif
1384 1.1 drochner m0 = ieee80211_encap(ic, m0, ni);
1385 1.4 drochner if (m0 == NULL) {
1386 1.4 drochner ieee80211_free_node(ni);
1387 1.1 drochner continue;
1388 1.4 drochner }
1389 1.1 drochner #if NBPFILTER > 0
1390 1.1 drochner if (ic->ic_rawbpf != NULL)
1391 1.1 drochner bpf_mtap(ic->ic_rawbpf, m0);
1392 1.1 drochner #endif
1393 1.1 drochner if (ural_tx_data(sc, m0, ni) != 0) {
1394 1.1 drochner ieee80211_free_node(ni);
1395 1.1 drochner ifp->if_oerrors++;
1396 1.1 drochner break;
1397 1.1 drochner }
1398 1.1 drochner }
1399 1.1 drochner
1400 1.1 drochner sc->sc_tx_timer = 5;
1401 1.1 drochner ifp->if_timer = 1;
1402 1.1 drochner }
1403 1.1 drochner }
1404 1.1 drochner
1405 1.1 drochner Static void
1406 1.1 drochner ural_watchdog(struct ifnet *ifp)
1407 1.1 drochner {
1408 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1409 1.2 drochner struct ieee80211com *ic = &sc->sc_ic;
1410 1.1 drochner
1411 1.1 drochner ifp->if_timer = 0;
1412 1.1 drochner
1413 1.1 drochner if (sc->sc_tx_timer > 0) {
1414 1.1 drochner if (--sc->sc_tx_timer == 0) {
1415 1.1 drochner printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev));
1416 1.1 drochner /*ural_init(ifp); XXX needs a process context! */
1417 1.1 drochner ifp->if_oerrors++;
1418 1.1 drochner return;
1419 1.1 drochner }
1420 1.1 drochner ifp->if_timer = 1;
1421 1.1 drochner }
1422 1.1 drochner
1423 1.2 drochner ieee80211_watchdog(ic);
1424 1.1 drochner }
1425 1.1 drochner
1426 1.1 drochner Static int
1427 1.1 drochner ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1428 1.1 drochner {
1429 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1430 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1431 1.1 drochner struct ifreq *ifr;
1432 1.1 drochner int s, error = 0;
1433 1.1 drochner
1434 1.1 drochner s = splnet();
1435 1.1 drochner
1436 1.1 drochner switch (cmd) {
1437 1.1 drochner case SIOCSIFFLAGS:
1438 1.1 drochner if (ifp->if_flags & IFF_UP) {
1439 1.1 drochner if (ifp->if_flags & IFF_RUNNING)
1440 1.1 drochner ural_update_promisc(sc);
1441 1.1 drochner else
1442 1.1 drochner ural_init(ifp);
1443 1.1 drochner } else {
1444 1.1 drochner if (ifp->if_flags & IFF_RUNNING)
1445 1.1 drochner ural_stop(ifp, 1);
1446 1.1 drochner }
1447 1.1 drochner break;
1448 1.2 drochner
1449 1.1 drochner case SIOCADDMULTI:
1450 1.1 drochner case SIOCDELMULTI:
1451 1.1 drochner ifr = (struct ifreq *)data;
1452 1.1 drochner error = (cmd == SIOCADDMULTI) ?
1453 1.2 drochner ether_addmulti(ifr, &sc->sc_ec) :
1454 1.2 drochner ether_delmulti(ifr, &sc->sc_ec);
1455 1.1 drochner
1456 1.1 drochner if (error == ENETRESET)
1457 1.1 drochner error = 0;
1458 1.1 drochner break;
1459 1.1 drochner
1460 1.1 drochner case SIOCS80211CHANNEL:
1461 1.1 drochner /*
1462 1.1 drochner * This allows for fast channel switching in monitor mode
1463 1.1 drochner * (used by kismet). In IBSS mode, we must explicitly reset
1464 1.1 drochner * the interface to generate a new beacon frame.
1465 1.1 drochner */
1466 1.1 drochner error = ieee80211_ioctl(ic, cmd, data);
1467 1.1 drochner if (error == ENETRESET &&
1468 1.1 drochner ic->ic_opmode == IEEE80211_M_MONITOR) {
1469 1.1 drochner ural_set_chan(sc, ic->ic_ibss_chan);
1470 1.1 drochner error = 0;
1471 1.1 drochner }
1472 1.1 drochner break;
1473 1.2 drochner
1474 1.1 drochner default:
1475 1.1 drochner error = ieee80211_ioctl(ic, cmd, data);
1476 1.1 drochner }
1477 1.1 drochner
1478 1.1 drochner if (error == ENETRESET) {
1479 1.1 drochner if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1480 1.1 drochner (IFF_UP | IFF_RUNNING))
1481 1.1 drochner ural_init(ifp);
1482 1.1 drochner error = 0;
1483 1.1 drochner }
1484 1.1 drochner
1485 1.1 drochner splx(s);
1486 1.1 drochner
1487 1.1 drochner return error;
1488 1.1 drochner }
1489 1.1 drochner
1490 1.1 drochner Static void
1491 1.1 drochner ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1492 1.1 drochner {
1493 1.1 drochner usb_device_request_t req;
1494 1.1 drochner usbd_status error;
1495 1.1 drochner
1496 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1497 1.1 drochner req.bRequest = RAL_READ_EEPROM;
1498 1.1 drochner USETW(req.wValue, 0);
1499 1.1 drochner USETW(req.wIndex, addr);
1500 1.1 drochner USETW(req.wLength, len);
1501 1.1 drochner
1502 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1503 1.1 drochner if (error != 0) {
1504 1.1 drochner printf("%s: could not read EEPROM: %s\n",
1505 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1506 1.1 drochner }
1507 1.1 drochner }
1508 1.1 drochner
1509 1.1 drochner Static uint16_t
1510 1.1 drochner ural_read(struct ural_softc *sc, uint16_t reg)
1511 1.1 drochner {
1512 1.1 drochner usb_device_request_t req;
1513 1.1 drochner usbd_status error;
1514 1.1 drochner uint16_t val;
1515 1.1 drochner
1516 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1517 1.1 drochner req.bRequest = RAL_READ_MAC;
1518 1.1 drochner USETW(req.wValue, 0);
1519 1.1 drochner USETW(req.wIndex, reg);
1520 1.1 drochner USETW(req.wLength, sizeof (uint16_t));
1521 1.1 drochner
1522 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, &val);
1523 1.1 drochner if (error != 0) {
1524 1.1 drochner printf("%s: could not read MAC register: %s\n",
1525 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1526 1.1 drochner return 0;
1527 1.1 drochner }
1528 1.1 drochner
1529 1.1 drochner return le16toh(val);
1530 1.1 drochner }
1531 1.1 drochner
1532 1.1 drochner Static void
1533 1.1 drochner ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1534 1.1 drochner {
1535 1.1 drochner usb_device_request_t req;
1536 1.1 drochner usbd_status error;
1537 1.1 drochner
1538 1.1 drochner req.bmRequestType = UT_READ_VENDOR_DEVICE;
1539 1.1 drochner req.bRequest = RAL_READ_MULTI_MAC;
1540 1.1 drochner USETW(req.wValue, 0);
1541 1.1 drochner USETW(req.wIndex, reg);
1542 1.1 drochner USETW(req.wLength, len);
1543 1.1 drochner
1544 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1545 1.1 drochner if (error != 0) {
1546 1.1 drochner printf("%s: could not read MAC register: %s\n",
1547 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1548 1.1 drochner return;
1549 1.1 drochner }
1550 1.1 drochner }
1551 1.1 drochner
1552 1.1 drochner Static void
1553 1.1 drochner ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1554 1.1 drochner {
1555 1.1 drochner usb_device_request_t req;
1556 1.1 drochner usbd_status error;
1557 1.1 drochner
1558 1.1 drochner req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1559 1.1 drochner req.bRequest = RAL_WRITE_MAC;
1560 1.1 drochner USETW(req.wValue, val);
1561 1.1 drochner USETW(req.wIndex, reg);
1562 1.1 drochner USETW(req.wLength, 0);
1563 1.1 drochner
1564 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, NULL);
1565 1.1 drochner if (error != 0) {
1566 1.1 drochner printf("%s: could not write MAC register: %s\n",
1567 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1568 1.1 drochner }
1569 1.1 drochner }
1570 1.1 drochner
1571 1.1 drochner Static void
1572 1.1 drochner ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1573 1.1 drochner {
1574 1.1 drochner usb_device_request_t req;
1575 1.1 drochner usbd_status error;
1576 1.1 drochner
1577 1.1 drochner req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1578 1.1 drochner req.bRequest = RAL_WRITE_MULTI_MAC;
1579 1.1 drochner USETW(req.wValue, 0);
1580 1.1 drochner USETW(req.wIndex, reg);
1581 1.1 drochner USETW(req.wLength, len);
1582 1.1 drochner
1583 1.1 drochner error = usbd_do_request(sc->sc_udev, &req, buf);
1584 1.1 drochner if (error != 0) {
1585 1.1 drochner printf("%s: could not write MAC register: %s\n",
1586 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1587 1.1 drochner }
1588 1.1 drochner }
1589 1.1 drochner
1590 1.1 drochner Static void
1591 1.1 drochner ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1592 1.1 drochner {
1593 1.1 drochner uint16_t tmp;
1594 1.1 drochner int ntries;
1595 1.1 drochner
1596 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1597 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1598 1.1 drochner break;
1599 1.1 drochner }
1600 1.1 drochner if (ntries == 5) {
1601 1.1 drochner printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev));
1602 1.1 drochner return;
1603 1.1 drochner }
1604 1.1 drochner
1605 1.1 drochner tmp = reg << 8 | val;
1606 1.1 drochner ural_write(sc, RAL_PHY_CSR7, tmp);
1607 1.1 drochner }
1608 1.1 drochner
1609 1.1 drochner Static uint8_t
1610 1.1 drochner ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1611 1.1 drochner {
1612 1.1 drochner uint16_t val;
1613 1.1 drochner int ntries;
1614 1.1 drochner
1615 1.1 drochner val = RAL_BBP_WRITE | reg << 8;
1616 1.1 drochner ural_write(sc, RAL_PHY_CSR7, val);
1617 1.1 drochner
1618 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1619 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1620 1.1 drochner break;
1621 1.1 drochner }
1622 1.1 drochner if (ntries == 5) {
1623 1.1 drochner printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev));
1624 1.1 drochner return 0;
1625 1.1 drochner }
1626 1.1 drochner
1627 1.1 drochner return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1628 1.1 drochner }
1629 1.1 drochner
1630 1.1 drochner Static void
1631 1.1 drochner ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1632 1.1 drochner {
1633 1.1 drochner uint32_t tmp;
1634 1.1 drochner int ntries;
1635 1.1 drochner
1636 1.1 drochner for (ntries = 0; ntries < 5; ntries++) {
1637 1.1 drochner if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1638 1.1 drochner break;
1639 1.1 drochner }
1640 1.1 drochner if (ntries == 5) {
1641 1.1 drochner printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev));
1642 1.1 drochner return;
1643 1.1 drochner }
1644 1.1 drochner
1645 1.1 drochner tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1646 1.1 drochner ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1647 1.1 drochner ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1648 1.1 drochner
1649 1.1 drochner /* remember last written value in sc */
1650 1.1 drochner sc->rf_regs[reg] = val;
1651 1.1 drochner
1652 1.1 drochner DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1653 1.1 drochner }
1654 1.1 drochner
1655 1.1 drochner Static void
1656 1.1 drochner ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1657 1.1 drochner {
1658 1.1 drochner #define N(a) (sizeof (a) / sizeof ((a)[0]))
1659 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1660 1.1 drochner uint8_t power, tmp;
1661 1.1 drochner u_int i, chan;
1662 1.1 drochner
1663 1.1 drochner chan = ieee80211_chan2ieee(ic, c);
1664 1.1 drochner if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1665 1.1 drochner return;
1666 1.1 drochner
1667 1.1 drochner if (IEEE80211_IS_CHAN_2GHZ(c))
1668 1.1 drochner power = min(sc->txpow[chan - 1], 31);
1669 1.1 drochner else
1670 1.1 drochner power = 31;
1671 1.1 drochner
1672 1.1 drochner DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1673 1.1 drochner
1674 1.1 drochner switch (sc->rf_rev) {
1675 1.1 drochner case RAL_RF_2522:
1676 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x00814);
1677 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1678 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1679 1.1 drochner break;
1680 1.1 drochner
1681 1.1 drochner case RAL_RF_2523:
1682 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08804);
1683 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1684 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1685 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1686 1.1 drochner break;
1687 1.1 drochner
1688 1.1 drochner case RAL_RF_2524:
1689 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x0c808);
1690 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1691 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1692 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1693 1.1 drochner break;
1694 1.1 drochner
1695 1.1 drochner case RAL_RF_2525:
1696 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1697 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1698 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1699 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1700 1.1 drochner
1701 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1702 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1703 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1704 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1705 1.1 drochner break;
1706 1.1 drochner
1707 1.1 drochner case RAL_RF_2525E:
1708 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08808);
1709 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1710 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1711 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1712 1.1 drochner break;
1713 1.1 drochner
1714 1.1 drochner case RAL_RF_2526:
1715 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1716 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1717 1.1 drochner ural_rf_write(sc, RAL_RF1, 0x08804);
1718 1.1 drochner
1719 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1720 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1721 1.1 drochner ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1722 1.1 drochner break;
1723 1.1 drochner
1724 1.1 drochner /* dual-band RF */
1725 1.1 drochner case RAL_RF_5222:
1726 1.1 drochner for (i = 0; i < N(ural_rf5222); i++)
1727 1.1 drochner if (ural_rf5222[i].chan == chan)
1728 1.1 drochner break;
1729 1.1 drochner
1730 1.1 drochner if (i < N(ural_rf5222)) {
1731 1.1 drochner ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1732 1.1 drochner ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1733 1.1 drochner ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1734 1.1 drochner ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1735 1.1 drochner }
1736 1.1 drochner break;
1737 1.1 drochner }
1738 1.1 drochner
1739 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1740 1.1 drochner ic->ic_state != IEEE80211_S_SCAN) {
1741 1.1 drochner /* set Japan filter bit for channel 14 */
1742 1.1 drochner tmp = ural_bbp_read(sc, 70);
1743 1.1 drochner
1744 1.1 drochner tmp &= ~RAL_JAPAN_FILTER;
1745 1.1 drochner if (chan == 14)
1746 1.1 drochner tmp |= RAL_JAPAN_FILTER;
1747 1.1 drochner
1748 1.1 drochner ural_bbp_write(sc, 70, tmp);
1749 1.1 drochner
1750 1.1 drochner /* clear CRC errors */
1751 1.1 drochner ural_read(sc, RAL_STA_CSR0);
1752 1.1 drochner
1753 1.1 drochner DELAY(1000); /* RF needs a 1ms delay here */
1754 1.1 drochner ural_disable_rf_tune(sc);
1755 1.1 drochner }
1756 1.1 drochner #undef N
1757 1.1 drochner }
1758 1.1 drochner
1759 1.1 drochner /*
1760 1.1 drochner * Disable RF auto-tuning.
1761 1.1 drochner */
1762 1.1 drochner Static void
1763 1.1 drochner ural_disable_rf_tune(struct ural_softc *sc)
1764 1.1 drochner {
1765 1.1 drochner uint32_t tmp;
1766 1.1 drochner
1767 1.1 drochner if (sc->rf_rev != RAL_RF_2523) {
1768 1.1 drochner tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1769 1.1 drochner ural_rf_write(sc, RAL_RF1, tmp);
1770 1.1 drochner }
1771 1.1 drochner
1772 1.1 drochner tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1773 1.1 drochner ural_rf_write(sc, RAL_RF3, tmp);
1774 1.1 drochner
1775 1.1 drochner DPRINTFN(2, ("disabling RF autotune\n"));
1776 1.1 drochner }
1777 1.1 drochner
1778 1.1 drochner /*
1779 1.1 drochner * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1780 1.1 drochner * synchronization.
1781 1.1 drochner */
1782 1.1 drochner Static void
1783 1.1 drochner ural_enable_tsf_sync(struct ural_softc *sc)
1784 1.1 drochner {
1785 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1786 1.1 drochner uint16_t logcwmin, preload, tmp;
1787 1.1 drochner
1788 1.1 drochner /* first, disable TSF synchronization */
1789 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, 0);
1790 1.1 drochner
1791 1.1 drochner tmp = (16 * ic->ic_bss->ni_intval) << 4;
1792 1.1 drochner ural_write(sc, RAL_TXRX_CSR18, tmp);
1793 1.1 drochner
1794 1.1 drochner logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1795 1.1 drochner preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1796 1.1 drochner tmp = logcwmin << 12 | preload;
1797 1.1 drochner ural_write(sc, RAL_TXRX_CSR20, tmp);
1798 1.1 drochner
1799 1.1 drochner /* finally, enable TSF synchronization */
1800 1.1 drochner tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1801 1.1 drochner if (ic->ic_opmode == IEEE80211_M_STA)
1802 1.1 drochner tmp |= RAL_ENABLE_TSF_SYNC(1);
1803 1.1 drochner else
1804 1.1 drochner tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1805 1.1 drochner ural_write(sc, RAL_TXRX_CSR19, tmp);
1806 1.1 drochner
1807 1.1 drochner DPRINTF(("enabling TSF synchronization\n"));
1808 1.1 drochner }
1809 1.1 drochner
1810 1.1 drochner Static void
1811 1.1 drochner ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1812 1.1 drochner {
1813 1.1 drochner uint16_t tmp;
1814 1.1 drochner
1815 1.1 drochner tmp = bssid[0] | bssid[1] << 8;
1816 1.1 drochner ural_write(sc, RAL_MAC_CSR5, tmp);
1817 1.1 drochner
1818 1.1 drochner tmp = bssid[2] | bssid[3] << 8;
1819 1.1 drochner ural_write(sc, RAL_MAC_CSR6, tmp);
1820 1.1 drochner
1821 1.1 drochner tmp = bssid[4] | bssid[5] << 8;
1822 1.1 drochner ural_write(sc, RAL_MAC_CSR7, tmp);
1823 1.1 drochner
1824 1.1 drochner DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
1825 1.1 drochner }
1826 1.1 drochner
1827 1.1 drochner Static void
1828 1.1 drochner ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1829 1.1 drochner {
1830 1.1 drochner uint16_t tmp;
1831 1.1 drochner
1832 1.1 drochner tmp = addr[0] | addr[1] << 8;
1833 1.1 drochner ural_write(sc, RAL_MAC_CSR2, tmp);
1834 1.1 drochner
1835 1.1 drochner tmp = addr[2] | addr[3] << 8;
1836 1.1 drochner ural_write(sc, RAL_MAC_CSR3, tmp);
1837 1.1 drochner
1838 1.1 drochner tmp = addr[4] | addr[5] << 8;
1839 1.1 drochner ural_write(sc, RAL_MAC_CSR4, tmp);
1840 1.1 drochner
1841 1.2 drochner DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
1842 1.1 drochner }
1843 1.1 drochner
1844 1.1 drochner Static void
1845 1.1 drochner ural_update_promisc(struct ural_softc *sc)
1846 1.1 drochner {
1847 1.2 drochner struct ifnet *ifp = &sc->sc_if;
1848 1.1 drochner uint16_t tmp;
1849 1.1 drochner
1850 1.1 drochner tmp = ural_read(sc, RAL_TXRX_CSR2);
1851 1.1 drochner
1852 1.1 drochner tmp &= ~RAL_DROP_NOT_TO_ME;
1853 1.1 drochner if (!(ifp->if_flags & IFF_PROMISC))
1854 1.1 drochner tmp |= RAL_DROP_NOT_TO_ME;
1855 1.1 drochner
1856 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, tmp);
1857 1.1 drochner
1858 1.1 drochner DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1859 1.1 drochner "entering" : "leaving"));
1860 1.1 drochner }
1861 1.1 drochner
1862 1.1 drochner Static const char *
1863 1.1 drochner ural_get_rf(int rev)
1864 1.1 drochner {
1865 1.1 drochner switch (rev) {
1866 1.1 drochner case RAL_RF_2522: return "RT2522";
1867 1.1 drochner case RAL_RF_2523: return "RT2523";
1868 1.1 drochner case RAL_RF_2524: return "RT2524";
1869 1.1 drochner case RAL_RF_2525: return "RT2525";
1870 1.1 drochner case RAL_RF_2525E: return "RT2525e";
1871 1.1 drochner case RAL_RF_2526: return "RT2526";
1872 1.1 drochner case RAL_RF_5222: return "RT5222";
1873 1.1 drochner default: return "unknown";
1874 1.1 drochner }
1875 1.1 drochner }
1876 1.1 drochner
1877 1.1 drochner Static void
1878 1.1 drochner ural_read_eeprom(struct ural_softc *sc)
1879 1.1 drochner {
1880 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1881 1.1 drochner uint16_t val;
1882 1.1 drochner
1883 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1884 1.1 drochner val = le16toh(val);
1885 1.1 drochner sc->rf_rev = (val >> 11) & 0x7;
1886 1.1 drochner sc->hw_radio = (val >> 10) & 0x1;
1887 1.1 drochner sc->led_mode = (val >> 6) & 0x7;
1888 1.1 drochner sc->rx_ant = (val >> 4) & 0x3;
1889 1.1 drochner sc->tx_ant = (val >> 2) & 0x3;
1890 1.1 drochner sc->nb_ant = val & 0x3;
1891 1.1 drochner
1892 1.1 drochner /* read MAC address */
1893 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
1894 1.1 drochner
1895 1.1 drochner /* read default values for BBP registers */
1896 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1897 1.1 drochner
1898 1.1 drochner /* read Tx power for all b/g channels */
1899 1.1 drochner ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1900 1.1 drochner }
1901 1.1 drochner
1902 1.1 drochner Static int
1903 1.1 drochner ural_bbp_init(struct ural_softc *sc)
1904 1.1 drochner {
1905 1.1 drochner #define N(a) (sizeof (a) / sizeof ((a)[0]))
1906 1.1 drochner int i, ntries;
1907 1.1 drochner
1908 1.1 drochner /* wait for BBP to be ready */
1909 1.1 drochner for (ntries = 0; ntries < 100; ntries++) {
1910 1.1 drochner if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1911 1.1 drochner break;
1912 1.1 drochner DELAY(1000);
1913 1.1 drochner }
1914 1.1 drochner if (ntries == 100) {
1915 1.1 drochner printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev));
1916 1.1 drochner return EIO;
1917 1.1 drochner }
1918 1.1 drochner
1919 1.1 drochner /* initialize BBP registers to default values */
1920 1.1 drochner for (i = 0; i < N(ural_def_bbp); i++)
1921 1.1 drochner ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1922 1.1 drochner
1923 1.1 drochner #if 0
1924 1.1 drochner /* initialize BBP registers to values stored in EEPROM */
1925 1.1 drochner for (i = 0; i < 16; i++) {
1926 1.1 drochner if (sc->bbp_prom[i].reg == 0xff)
1927 1.1 drochner continue;
1928 1.1 drochner ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1929 1.1 drochner }
1930 1.1 drochner #endif
1931 1.1 drochner
1932 1.1 drochner return 0;
1933 1.1 drochner #undef N
1934 1.1 drochner }
1935 1.1 drochner
1936 1.1 drochner Static void
1937 1.1 drochner ural_set_txantenna(struct ural_softc *sc, int antenna)
1938 1.1 drochner {
1939 1.1 drochner uint16_t tmp;
1940 1.1 drochner uint8_t tx;
1941 1.1 drochner
1942 1.1 drochner tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
1943 1.1 drochner if (antenna == 1)
1944 1.1 drochner tx |= RAL_BBP_ANTA;
1945 1.1 drochner else if (antenna == 2)
1946 1.1 drochner tx |= RAL_BBP_ANTB;
1947 1.1 drochner else
1948 1.1 drochner tx |= RAL_BBP_DIVERSITY;
1949 1.1 drochner
1950 1.1 drochner /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
1951 1.1 drochner if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
1952 1.1 drochner sc->rf_rev == RAL_RF_5222)
1953 1.1 drochner tx |= RAL_BBP_FLIPIQ;
1954 1.1 drochner
1955 1.1 drochner ural_bbp_write(sc, RAL_BBP_TX, tx);
1956 1.1 drochner
1957 1.1 drochner /* update flags in PHY_CSR5 and PHY_CSR6 too */
1958 1.1 drochner tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
1959 1.1 drochner ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
1960 1.1 drochner
1961 1.1 drochner tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
1962 1.1 drochner ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
1963 1.1 drochner }
1964 1.1 drochner
1965 1.1 drochner Static void
1966 1.1 drochner ural_set_rxantenna(struct ural_softc *sc, int antenna)
1967 1.1 drochner {
1968 1.1 drochner uint8_t rx;
1969 1.1 drochner
1970 1.1 drochner rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
1971 1.1 drochner if (antenna == 1)
1972 1.1 drochner rx |= RAL_BBP_ANTA;
1973 1.1 drochner else if (antenna == 2)
1974 1.1 drochner rx |= RAL_BBP_ANTB;
1975 1.1 drochner else
1976 1.1 drochner rx |= RAL_BBP_DIVERSITY;
1977 1.1 drochner
1978 1.1 drochner /* need to force no I/Q flip for RF 2525e and 2526 */
1979 1.1 drochner if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
1980 1.1 drochner rx &= ~RAL_BBP_FLIPIQ;
1981 1.1 drochner
1982 1.1 drochner ural_bbp_write(sc, RAL_BBP_RX, rx);
1983 1.1 drochner }
1984 1.1 drochner
1985 1.1 drochner Static int
1986 1.1 drochner ural_init(struct ifnet *ifp)
1987 1.1 drochner {
1988 1.1 drochner #define N(a) (sizeof (a) / sizeof ((a)[0]))
1989 1.1 drochner struct ural_softc *sc = ifp->if_softc;
1990 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
1991 1.1 drochner struct ieee80211_key *wk;
1992 1.1 drochner struct ural_rx_data *data;
1993 1.1 drochner uint16_t sta[11], tmp;
1994 1.1 drochner usbd_status error;
1995 1.1 drochner int i, ntries;
1996 1.1 drochner
1997 1.1 drochner ural_stop(ifp, 0);
1998 1.1 drochner
1999 1.1 drochner /* initialize MAC registers to default values */
2000 1.1 drochner for (i = 0; i < N(ural_def_mac); i++)
2001 1.1 drochner ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2002 1.1 drochner
2003 1.1 drochner /* wait for BBP and RF to wake up (this can take a long time!) */
2004 1.1 drochner for (ntries = 0; ntries < 100; ntries++) {
2005 1.1 drochner tmp = ural_read(sc, RAL_MAC_CSR17);
2006 1.1 drochner if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2007 1.1 drochner (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2008 1.1 drochner break;
2009 1.1 drochner DELAY(1000);
2010 1.1 drochner }
2011 1.1 drochner if (ntries == 100) {
2012 1.1 drochner printf("%s: timeout waiting for BBP/RF to wakeup\n",
2013 1.1 drochner USBDEVNAME(sc->sc_dev));
2014 1.1 drochner error = EIO;
2015 1.1 drochner goto fail;
2016 1.1 drochner }
2017 1.1 drochner
2018 1.1 drochner /* we're ready! */
2019 1.1 drochner ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2020 1.1 drochner
2021 1.1 drochner /* set supported basic rates (1, 2, 6, 12, 24) */
2022 1.1 drochner ural_write(sc, RAL_TXRX_CSR11, 0x153);
2023 1.1 drochner
2024 1.1 drochner error = ural_bbp_init(sc);
2025 1.1 drochner if (error != 0)
2026 1.1 drochner goto fail;
2027 1.1 drochner
2028 1.1 drochner /* set default BSS channel */
2029 1.1 drochner ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2030 1.1 drochner ural_set_chan(sc, ic->ic_bss->ni_chan);
2031 1.1 drochner
2032 1.1 drochner /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2033 1.1 drochner ural_read_multi(sc, RAL_STA_CSR0, sta, sizeof sta);
2034 1.1 drochner
2035 1.1 drochner ural_set_txantenna(sc, 1);
2036 1.1 drochner ural_set_rxantenna(sc, 1);
2037 1.1 drochner
2038 1.1 drochner IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
2039 1.1 drochner ural_set_macaddr(sc, ic->ic_myaddr);
2040 1.1 drochner
2041 1.1 drochner /*
2042 1.1 drochner * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
2043 1.1 drochner */
2044 1.1 drochner for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2045 1.1 drochner wk = &ic->ic_nw_keys[i];
2046 1.4 drochner ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE +
2047 1.4 drochner RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE);
2048 1.1 drochner }
2049 1.1 drochner
2050 1.1 drochner /*
2051 1.1 drochner * Open Tx and Rx USB bulk pipes.
2052 1.1 drochner */
2053 1.1 drochner error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2054 1.1 drochner &sc->sc_tx_pipeh);
2055 1.1 drochner if (error != 0) {
2056 1.1 drochner printf("%s: could not open Tx pipe: %s\n",
2057 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2058 1.1 drochner goto fail;
2059 1.1 drochner }
2060 1.1 drochner
2061 1.1 drochner error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2062 1.1 drochner &sc->sc_rx_pipeh);
2063 1.1 drochner if (error != 0) {
2064 1.1 drochner printf("%s: could not open Rx pipe: %s\n",
2065 1.1 drochner USBDEVNAME(sc->sc_dev), usbd_errstr(error));
2066 1.1 drochner goto fail;
2067 1.1 drochner }
2068 1.1 drochner
2069 1.1 drochner /*
2070 1.1 drochner * Allocate Tx and Rx xfer queues.
2071 1.1 drochner */
2072 1.1 drochner error = ural_alloc_tx_list(sc);
2073 1.1 drochner if (error != 0) {
2074 1.1 drochner printf("%s: could not allocate Tx list\n",
2075 1.1 drochner USBDEVNAME(sc->sc_dev));
2076 1.1 drochner goto fail;
2077 1.1 drochner }
2078 1.1 drochner
2079 1.1 drochner error = ural_alloc_rx_list(sc);
2080 1.1 drochner if (error != 0) {
2081 1.1 drochner printf("%s: could not allocate Rx list\n",
2082 1.1 drochner USBDEVNAME(sc->sc_dev));
2083 1.1 drochner goto fail;
2084 1.1 drochner }
2085 1.1 drochner
2086 1.1 drochner /*
2087 1.1 drochner * Start up the receive pipe.
2088 1.1 drochner */
2089 1.1 drochner for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2090 1.1 drochner data = &sc->rx_data[i];
2091 1.1 drochner
2092 1.1 drochner usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2093 1.1 drochner MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2094 1.1 drochner usbd_transfer(data->xfer);
2095 1.1 drochner }
2096 1.1 drochner
2097 1.1 drochner /* kick Rx */
2098 1.1 drochner tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
2099 1.1 drochner if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2100 1.1 drochner tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
2101 1.1 drochner if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2102 1.1 drochner tmp |= RAL_DROP_TODS;
2103 1.1 drochner if (!(ifp->if_flags & IFF_PROMISC))
2104 1.1 drochner tmp |= RAL_DROP_NOT_TO_ME;
2105 1.1 drochner }
2106 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, tmp);
2107 1.1 drochner
2108 1.1 drochner ifp->if_flags &= ~IFF_OACTIVE;
2109 1.1 drochner ifp->if_flags |= IFF_RUNNING;
2110 1.1 drochner
2111 1.1 drochner if (ic->ic_opmode == IEEE80211_M_MONITOR)
2112 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2113 1.1 drochner else
2114 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2115 1.1 drochner
2116 1.1 drochner return 0;
2117 1.1 drochner
2118 1.1 drochner fail: ural_stop(ifp, 1);
2119 1.1 drochner return error;
2120 1.1 drochner #undef N
2121 1.1 drochner }
2122 1.1 drochner
2123 1.1 drochner Static void
2124 1.1 drochner ural_stop(struct ifnet *ifp, int disable)
2125 1.1 drochner {
2126 1.1 drochner struct ural_softc *sc = ifp->if_softc;
2127 1.1 drochner struct ieee80211com *ic = &sc->sc_ic;
2128 1.1 drochner
2129 1.1 drochner ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2130 1.1 drochner
2131 1.4 drochner sc->sc_tx_timer = 0;
2132 1.4 drochner ifp->if_timer = 0;
2133 1.4 drochner ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2134 1.4 drochner
2135 1.1 drochner /* disable Rx */
2136 1.1 drochner ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2137 1.1 drochner
2138 1.1 drochner /* reset ASIC and BBP (but won't reset MAC registers!) */
2139 1.1 drochner ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2140 1.1 drochner ural_write(sc, RAL_MAC_CSR1, 0);
2141 1.1 drochner
2142 1.1 drochner if (sc->sc_rx_pipeh != NULL) {
2143 1.1 drochner usbd_abort_pipe(sc->sc_rx_pipeh);
2144 1.1 drochner usbd_close_pipe(sc->sc_rx_pipeh);
2145 1.1 drochner sc->sc_rx_pipeh = NULL;
2146 1.1 drochner }
2147 1.1 drochner
2148 1.1 drochner if (sc->sc_tx_pipeh != NULL) {
2149 1.1 drochner usbd_abort_pipe(sc->sc_tx_pipeh);
2150 1.1 drochner usbd_close_pipe(sc->sc_tx_pipeh);
2151 1.1 drochner sc->sc_tx_pipeh = NULL;
2152 1.1 drochner }
2153 1.1 drochner
2154 1.1 drochner ural_free_rx_list(sc);
2155 1.1 drochner ural_free_tx_list(sc);
2156 1.1 drochner }
2157 1.1 drochner
2158 1.1 drochner int
2159 1.1 drochner ural_activate(device_ptr_t self, enum devact act)
2160 1.1 drochner {
2161 1.2 drochner struct ural_softc *sc = (struct ural_softc *)self;
2162 1.2 drochner
2163 1.1 drochner switch (act) {
2164 1.1 drochner case DVACT_ACTIVATE:
2165 1.1 drochner return EOPNOTSUPP;
2166 1.2 drochner break;
2167 1.1 drochner
2168 1.1 drochner case DVACT_DEACTIVATE:
2169 1.2 drochner if_deactivate(&sc->sc_if);
2170 1.1 drochner break;
2171 1.1 drochner }
2172 1.1 drochner
2173 1.1 drochner return 0;
2174 1.1 drochner }
2175