if_ural.c revision 1.1
1 /* $NetBSD: if_ural.c,v 1.1 2005/07/01 20:06:56 drochner Exp $ */ 2 /* $OpenBSD: if_ral.c,v 1.34 2005/05/18 20:10:17 damien Exp $ */ 3 4 /*- 5 * Copyright (c) 2005 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.1 2005/07/01 20:06:56 drochner Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_rssadapt.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usbdevs.h> 69 70 #include <dev/usb/if_uralreg.h> 71 #include <dev/usb/if_uralvar.h> 72 73 #ifdef USB_DEBUG 74 #define URAL_DEBUG 75 #endif 76 77 #ifdef URAL_DEBUG 78 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 79 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 80 int ural_debug = 0; 81 #else 82 #define DPRINTF(x) 83 #define DPRINTFN(n, x) 84 #endif 85 86 /* various supported device vendors/products */ 87 static const struct usb_devno ural_devs[] = { 88 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 90 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 91 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 92 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 93 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 96 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 97 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 98 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 99 }; 100 101 Static int ural_alloc_tx_list(struct ural_softc *); 102 Static void ural_free_tx_list(struct ural_softc *); 103 Static int ural_alloc_rx_list(struct ural_softc *); 104 Static void ural_free_rx_list(struct ural_softc *); 105 Static int ural_media_change(struct ifnet *); 106 Static void ural_next_scan(void *); 107 Static void ural_task(void *); 108 Static int ural_newstate(struct ieee80211com *, 109 enum ieee80211_state, int); 110 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 111 usbd_status); 112 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 113 usbd_status); 114 Static int ural_ack_rate(int); 115 Static uint16_t ural_txtime(int, int, uint32_t); 116 Static uint8_t ural_plcp_signal(int); 117 Static void ural_setup_tx_desc(struct ural_softc *, 118 struct ural_tx_desc *, uint32_t, int, int); 119 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 120 struct ieee80211_node *); 121 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 122 struct ieee80211_node *); 123 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 124 struct ieee80211_node *); 125 Static void ural_start(struct ifnet *); 126 Static void ural_watchdog(struct ifnet *); 127 Static int ural_ioctl(struct ifnet *, u_long, caddr_t); 128 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 129 int); 130 Static uint16_t ural_read(struct ural_softc *, uint16_t); 131 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 132 int); 133 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 134 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 135 int); 136 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 137 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 138 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 139 Static void ural_set_chan(struct ural_softc *, 140 struct ieee80211_channel *); 141 Static void ural_disable_rf_tune(struct ural_softc *); 142 Static void ural_enable_tsf_sync(struct ural_softc *); 143 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 144 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 145 Static void ural_update_promisc(struct ural_softc *); 146 Static const char *ural_get_rf(int); 147 Static void ural_read_eeprom(struct ural_softc *); 148 Static int ural_bbp_init(struct ural_softc *); 149 Static void ural_set_txantenna(struct ural_softc *, int); 150 Static void ural_set_rxantenna(struct ural_softc *, int); 151 Static int ural_init(struct ifnet *); 152 Static void ural_stop(struct ifnet *, int); 153 Static struct mbuf *ural_getmbuf(int, int, u_int); 154 Static struct mbuf *ural_beacon_alloc(struct ieee80211com *, 155 struct ieee80211_node *); 156 157 /* 158 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 159 */ 160 static const struct ieee80211_rateset ural_rateset_11a = 161 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 162 163 static const struct ieee80211_rateset ural_rateset_11b = 164 { 4, { 2, 4, 11, 22 } }; 165 166 static const struct ieee80211_rateset ural_rateset_11g = 167 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 168 169 /* 170 * Default values for MAC registers; values taken from the reference driver. 171 */ 172 static const struct { 173 uint16_t reg; 174 uint16_t val; 175 } ural_def_mac[] = { 176 { RAL_TXRX_CSR5, 0x8c8d }, 177 { RAL_TXRX_CSR6, 0x8b8a }, 178 { RAL_TXRX_CSR7, 0x8687 }, 179 { RAL_TXRX_CSR8, 0x0085 }, 180 { RAL_MAC_CSR13, 0x1111 }, 181 { RAL_MAC_CSR14, 0x1e11 }, 182 { RAL_TXRX_CSR21, 0xe78f }, 183 { RAL_MAC_CSR9, 0xff1d }, 184 { RAL_MAC_CSR11, 0x0002 }, 185 { RAL_MAC_CSR22, 0x0053 }, 186 { RAL_MAC_CSR15, 0x0000 }, 187 { RAL_MAC_CSR8, 0x0780 }, 188 { RAL_TXRX_CSR19, 0x0000 }, 189 { RAL_TXRX_CSR18, 0x005a }, 190 { RAL_PHY_CSR2, 0x0000 }, 191 { RAL_TXRX_CSR0, 0x1ec0 }, 192 { RAL_PHY_CSR4, 0x000f } 193 }; 194 195 /* 196 * Default values for BBP registers; values taken from the reference driver. 197 */ 198 static const struct { 199 uint8_t reg; 200 uint8_t val; 201 } ural_def_bbp[] = { 202 { 3, 0x02 }, 203 { 4, 0x19 }, 204 { 14, 0x1c }, 205 { 15, 0x30 }, 206 { 16, 0xac }, 207 { 17, 0x48 }, 208 { 18, 0x18 }, 209 { 19, 0xff }, 210 { 20, 0x1e }, 211 { 21, 0x08 }, 212 { 22, 0x08 }, 213 { 23, 0x08 }, 214 { 24, 0x80 }, 215 { 25, 0x50 }, 216 { 26, 0x08 }, 217 { 27, 0x23 }, 218 { 30, 0x10 }, 219 { 31, 0x2b }, 220 { 32, 0xb9 }, 221 { 34, 0x12 }, 222 { 35, 0x50 }, 223 { 39, 0xc4 }, 224 { 40, 0x02 }, 225 { 41, 0x60 }, 226 { 53, 0x10 }, 227 { 54, 0x18 }, 228 { 56, 0x08 }, 229 { 57, 0x10 }, 230 { 58, 0x08 }, 231 { 61, 0x60 }, 232 { 62, 0x10 }, 233 { 75, 0xff } 234 }; 235 236 /* 237 * Default values for RF register R2 indexed by channel numbers. 238 */ 239 static const uint32_t ural_rf2522_r2[] = { 240 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 241 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 242 }; 243 244 static const uint32_t ural_rf2523_r2[] = { 245 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 246 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 247 }; 248 249 static const uint32_t ural_rf2524_r2[] = { 250 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 251 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 252 }; 253 254 static const uint32_t ural_rf2525_r2[] = { 255 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 256 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 257 }; 258 259 static const uint32_t ural_rf2525_hi_r2[] = { 260 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 261 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 262 }; 263 264 static const uint32_t ural_rf2525e_r2[] = { 265 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 266 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 267 }; 268 269 static const uint32_t ural_rf2526_hi_r2[] = { 270 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 271 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 272 }; 273 274 static const uint32_t ural_rf2526_r2[] = { 275 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 276 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 277 }; 278 279 /* 280 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 281 * values taken from the reference driver. 282 */ 283 static const struct { 284 uint8_t chan; 285 uint32_t r1; 286 uint32_t r2; 287 uint32_t r4; 288 } ural_rf5222[] = { 289 /* channels in the 2.4GHz band */ 290 { 1, 0x08808, 0x0044d, 0x00282 }, 291 { 2, 0x08808, 0x0044e, 0x00282 }, 292 { 3, 0x08808, 0x0044f, 0x00282 }, 293 { 4, 0x08808, 0x00460, 0x00282 }, 294 { 5, 0x08808, 0x00461, 0x00282 }, 295 { 6, 0x08808, 0x00462, 0x00282 }, 296 { 7, 0x08808, 0x00463, 0x00282 }, 297 { 8, 0x08808, 0x00464, 0x00282 }, 298 { 9, 0x08808, 0x00465, 0x00282 }, 299 { 10, 0x08808, 0x00466, 0x00282 }, 300 { 11, 0x08808, 0x00467, 0x00282 }, 301 { 12, 0x08808, 0x00468, 0x00282 }, 302 { 13, 0x08808, 0x00469, 0x00282 }, 303 { 14, 0x08808, 0x0046b, 0x00286 }, 304 305 /* channels in the 5.2GHz band */ 306 { 36, 0x08804, 0x06225, 0x00287 }, 307 { 40, 0x08804, 0x06226, 0x00287 }, 308 { 44, 0x08804, 0x06227, 0x00287 }, 309 { 48, 0x08804, 0x06228, 0x00287 }, 310 { 52, 0x08804, 0x06229, 0x00287 }, 311 { 56, 0x08804, 0x0622a, 0x00287 }, 312 { 60, 0x08804, 0x0622b, 0x00287 }, 313 { 64, 0x08804, 0x0622c, 0x00287 }, 314 315 { 100, 0x08804, 0x02200, 0x00283 }, 316 { 104, 0x08804, 0x02201, 0x00283 }, 317 { 108, 0x08804, 0x02202, 0x00283 }, 318 { 112, 0x08804, 0x02203, 0x00283 }, 319 { 116, 0x08804, 0x02204, 0x00283 }, 320 { 120, 0x08804, 0x02205, 0x00283 }, 321 { 124, 0x08804, 0x02206, 0x00283 }, 322 { 128, 0x08804, 0x02207, 0x00283 }, 323 { 132, 0x08804, 0x02208, 0x00283 }, 324 { 136, 0x08804, 0x02209, 0x00283 }, 325 { 140, 0x08804, 0x0220a, 0x00283 }, 326 327 { 149, 0x08808, 0x02429, 0x00281 }, 328 { 153, 0x08808, 0x0242b, 0x00281 }, 329 { 157, 0x08808, 0x0242d, 0x00281 }, 330 { 161, 0x08808, 0x0242f, 0x00281 } 331 }; 332 333 USB_DECLARE_DRIVER(ural); 334 335 USB_MATCH(ural) 336 { 337 USB_MATCH_START(ural, uaa); 338 339 if (uaa->iface != NULL) 340 return UMATCH_NONE; 341 342 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 343 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 344 } 345 346 USB_ATTACH(ural) 347 { 348 USB_ATTACH_START(ural, sc, uaa); 349 struct ieee80211com *ic = &sc->sc_ic; 350 struct ifnet *ifp = &sc->sc_ec.ec_if; 351 usb_interface_descriptor_t *id; 352 usb_endpoint_descriptor_t *ed; 353 usbd_status error; 354 char *devinfop; 355 int i; 356 357 sc->sc_udev = uaa->device; 358 359 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 360 USB_ATTACH_SETUP; 361 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 362 usbd_devinfo_free(devinfop); 363 364 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 365 printf("%s: could not set configuration no\n", 366 USBDEVNAME(sc->sc_dev)); 367 USB_ATTACH_ERROR_RETURN; 368 } 369 370 /* get the first interface handle */ 371 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 372 &sc->sc_iface); 373 if (error != 0) { 374 printf("%s: could not get interface handle\n", 375 USBDEVNAME(sc->sc_dev)); 376 USB_ATTACH_ERROR_RETURN; 377 } 378 379 /* 380 * Find endpoints. 381 */ 382 id = usbd_get_interface_descriptor(sc->sc_iface); 383 384 sc->sc_rx_no = sc->sc_tx_no = -1; 385 for (i = 0; i < id->bNumEndpoints; i++) { 386 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 387 if (ed == NULL) { 388 printf("%s: no endpoint descriptor for iface %d\n", 389 USBDEVNAME(sc->sc_dev), i); 390 USB_ATTACH_ERROR_RETURN; 391 } 392 393 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 394 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 395 sc->sc_rx_no = ed->bEndpointAddress; 396 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 397 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 398 sc->sc_tx_no = ed->bEndpointAddress; 399 } 400 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 401 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 402 USB_ATTACH_ERROR_RETURN; 403 } 404 405 usb_init_task(&sc->sc_task, ural_task, sc); 406 callout_init(&sc->scan_ch); 407 408 /* retrieve RT2570 rev. no */ 409 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 410 411 /* retrieve MAC address and various other things from EEPROM */ 412 ural_read_eeprom(sc); 413 414 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s, address %s\n", 415 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev), 416 ether_sprintf(ic->ic_myaddr)); 417 418 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 419 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 420 ic->ic_state = IEEE80211_S_INIT; 421 422 /* set device capabilities */ 423 ic->ic_caps = IEEE80211_C_MONITOR | IEEE80211_C_IBSS | 424 IEEE80211_C_HOSTAP | IEEE80211_C_SHPREAMBLE | IEEE80211_C_PMGT | 425 IEEE80211_C_TXPMGT | IEEE80211_C_WEP; 426 427 if (sc->rf_rev == RAL_RF_5222) { 428 /* set supported .11a rates */ 429 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 430 431 /* set supported .11a channels */ 432 for (i = 36; i <= 64; i += 4) { 433 ic->ic_channels[i].ic_freq = 434 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 435 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 436 } 437 for (i = 100; i <= 140; i += 4) { 438 ic->ic_channels[i].ic_freq = 439 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 440 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 441 } 442 for (i = 149; i <= 161; i += 4) { 443 ic->ic_channels[i].ic_freq = 444 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 445 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 446 } 447 } 448 449 /* set supported .11b and .11g rates */ 450 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 451 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 452 453 /* set supported .11b and .11g channels (1 through 14) */ 454 for (i = 1; i <= 14; i++) { 455 ic->ic_channels[i].ic_freq = 456 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 457 ic->ic_channels[i].ic_flags = 458 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 459 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 460 } 461 462 ifp->if_softc = sc; 463 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 464 ifp->if_init = ural_init; 465 ifp->if_stop = ural_stop; 466 ifp->if_ioctl = ural_ioctl; 467 ifp->if_start = ural_start; 468 ifp->if_watchdog = ural_watchdog; 469 IFQ_SET_READY(&ifp->if_snd); 470 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 471 472 ic->ic_ifp = ifp; 473 474 if_attach(ifp); 475 ieee80211_ifattach(ic); 476 477 /* override state transition machine */ 478 sc->sc_newstate = ic->ic_newstate; 479 ic->ic_newstate = ural_newstate; 480 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 481 482 #if NBPFILTER > 0 483 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 484 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 485 486 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 487 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 488 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 489 490 sc->sc_txtap_len = sizeof sc->sc_txtapu; 491 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 492 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 493 #endif 494 495 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 496 USBDEV(sc->sc_dev)); 497 498 USB_ATTACH_SUCCESS_RETURN; 499 } 500 501 USB_DETACH(ural) 502 { 503 USB_DETACH_START(ural, sc); 504 struct ifnet *ifp = sc->sc_ic.ic_ifp; 505 int s; 506 507 s = splusb(); 508 509 usb_rem_task(sc->sc_udev, &sc->sc_task); 510 callout_stop(&sc->scan_ch); 511 512 if (sc->sc_rx_pipeh != NULL) { 513 usbd_abort_pipe(sc->sc_rx_pipeh); 514 usbd_close_pipe(sc->sc_rx_pipeh); 515 } 516 517 if (sc->sc_tx_pipeh != NULL) { 518 usbd_abort_pipe(sc->sc_tx_pipeh); 519 usbd_close_pipe(sc->sc_tx_pipeh); 520 } 521 522 ural_free_rx_list(sc); 523 ural_free_tx_list(sc); 524 525 #if NBPFILTER > 0 526 bpfdetach(ifp); 527 #endif 528 ieee80211_ifdetach(&sc->sc_ic); 529 if_detach(ifp); 530 531 splx(s); 532 533 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 534 USBDEV(sc->sc_dev)); 535 536 return 0; 537 } 538 539 Static int 540 ural_alloc_tx_list(struct ural_softc *sc) 541 { 542 struct ural_tx_data *data; 543 int i, error; 544 545 sc->tx_queued = 0; 546 547 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 548 data = &sc->tx_data[i]; 549 550 data->sc = sc; 551 552 data->xfer = usbd_alloc_xfer(sc->sc_udev); 553 if (data->xfer == NULL) { 554 printf("%s: could not allocate tx xfer\n", 555 USBDEVNAME(sc->sc_dev)); 556 error = ENOMEM; 557 goto fail; 558 } 559 560 data->buf = usbd_alloc_buffer(data->xfer, 561 RAL_TX_DESC_SIZE + MCLBYTES); 562 if (data->buf == NULL) { 563 printf("%s: could not allocate tx buffer\n", 564 USBDEVNAME(sc->sc_dev)); 565 error = ENOMEM; 566 goto fail; 567 } 568 } 569 570 return 0; 571 572 fail: ural_free_tx_list(sc); 573 return error; 574 } 575 576 Static void 577 ural_free_tx_list(struct ural_softc *sc) 578 { 579 struct ural_tx_data *data; 580 int i; 581 582 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 583 data = &sc->tx_data[i]; 584 585 if (data->xfer != NULL) { 586 usbd_free_xfer(data->xfer); 587 data->xfer = NULL; 588 } 589 590 if (data->ni != NULL) { 591 ieee80211_free_node(data->ni); 592 data->ni = NULL; 593 } 594 } 595 } 596 597 Static int 598 ural_alloc_rx_list(struct ural_softc *sc) 599 { 600 struct ural_rx_data *data; 601 int i, error; 602 603 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 604 data = &sc->rx_data[i]; 605 606 data->sc = sc; 607 608 data->xfer = usbd_alloc_xfer(sc->sc_udev); 609 if (data->xfer == NULL) { 610 printf("%s: could not allocate rx xfer\n", 611 USBDEVNAME(sc->sc_dev)); 612 error = ENOMEM; 613 goto fail; 614 } 615 616 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 617 printf("%s: could not allocate rx buffer\n", 618 USBDEVNAME(sc->sc_dev)); 619 error = ENOMEM; 620 goto fail; 621 } 622 623 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 624 if (data->m == NULL) { 625 printf("%s: could not allocate rx mbuf\n", 626 USBDEVNAME(sc->sc_dev)); 627 error = ENOMEM; 628 goto fail; 629 } 630 631 MCLGET(data->m, M_DONTWAIT); 632 if (!(data->m->m_flags & M_EXT)) { 633 printf("%s: could not allocate rx mbuf cluster\n", 634 USBDEVNAME(sc->sc_dev)); 635 error = ENOMEM; 636 goto fail; 637 } 638 639 data->buf = mtod(data->m, uint8_t *); 640 } 641 642 return 0; 643 644 fail: ural_free_tx_list(sc); 645 return error; 646 } 647 648 Static void 649 ural_free_rx_list(struct ural_softc *sc) 650 { 651 struct ural_rx_data *data; 652 int i; 653 654 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 655 data = &sc->rx_data[i]; 656 657 if (data->xfer != NULL) { 658 usbd_free_xfer(data->xfer); 659 data->xfer = NULL; 660 } 661 662 if (data->m != NULL) { 663 m_freem(data->m); 664 data->m = NULL; 665 } 666 } 667 } 668 669 Static int 670 ural_media_change(struct ifnet *ifp) 671 { 672 int error; 673 674 error = ieee80211_media_change(ifp); 675 if (error != ENETRESET) 676 return error; 677 678 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 679 ural_init(ifp); 680 681 return 0; 682 } 683 684 /* 685 * This function is called periodically (every 200ms) during scanning to 686 * switch from one channel to another. 687 */ 688 Static void 689 ural_next_scan(void *arg) 690 { 691 struct ural_softc *sc = arg; 692 struct ieee80211com *ic = &sc->sc_ic; 693 694 if (ic->ic_state == IEEE80211_S_SCAN) 695 ieee80211_next_scan(ic); 696 } 697 698 Static void 699 ural_task(void *arg) 700 { 701 struct ural_softc *sc = arg; 702 struct ieee80211com *ic = &sc->sc_ic; 703 enum ieee80211_state ostate; 704 struct mbuf *m; 705 706 ostate = ic->ic_state; 707 708 switch (sc->sc_state) { 709 case IEEE80211_S_INIT: 710 if (ostate == IEEE80211_S_RUN) { 711 /* abort TSF synchronization */ 712 ural_write(sc, RAL_TXRX_CSR19, 0); 713 714 /* force tx led to stop blinking */ 715 ural_write(sc, RAL_MAC_CSR20, 0); 716 } 717 break; 718 719 case IEEE80211_S_SCAN: 720 ural_set_chan(sc, ic->ic_bss->ni_chan); 721 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc); 722 break; 723 724 case IEEE80211_S_AUTH: 725 ural_set_chan(sc, ic->ic_bss->ni_chan); 726 break; 727 728 case IEEE80211_S_ASSOC: 729 ural_set_chan(sc, ic->ic_bss->ni_chan); 730 break; 731 732 case IEEE80211_S_RUN: 733 ural_set_chan(sc, ic->ic_bss->ni_chan); 734 735 if (ic->ic_opmode != IEEE80211_M_MONITOR) 736 ural_set_bssid(sc, ic->ic_bss->ni_bssid); 737 738 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 739 ic->ic_opmode == IEEE80211_M_IBSS) { 740 m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo); 741 if (m == NULL) { 742 printf("%s: could not allocate beacon\n", 743 USBDEVNAME(sc->sc_dev)); 744 return; 745 } 746 747 if (ural_tx_bcn(sc, m, ic->ic_bss) != 0) { 748 m_freem(m); 749 printf("%s: could not transmit beacon\n", 750 USBDEVNAME(sc->sc_dev)); 751 return; 752 } 753 754 /* beacon is no longer needed */ 755 m_freem(m); 756 } 757 758 /* make tx led blink on tx (controlled by ASIC) */ 759 ural_write(sc, RAL_MAC_CSR20, 1); 760 761 if (ic->ic_opmode != IEEE80211_M_MONITOR) 762 ural_enable_tsf_sync(sc); 763 break; 764 } 765 766 sc->sc_newstate(ic, sc->sc_state, -1); 767 } 768 769 Static int 770 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 771 { 772 struct ural_softc *sc = ic->ic_ifp->if_softc; 773 774 usb_rem_task(sc->sc_udev, &sc->sc_task); 775 callout_stop(&sc->scan_ch); 776 777 /* do it in a process context */ 778 sc->sc_state = nstate; 779 usb_add_task(sc->sc_udev, &sc->sc_task); 780 781 return 0; 782 } 783 784 /* quickly determine if a given rate is CCK or OFDM */ 785 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 786 787 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 788 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 789 #define RAL_SIFS 10 790 791 Static void 792 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 793 { 794 struct ural_tx_data *data = priv; 795 struct ural_softc *sc = data->sc; 796 struct ifnet *ifp = sc->sc_ic.ic_ifp; 797 int s; 798 799 if (status != USBD_NORMAL_COMPLETION) { 800 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 801 return; 802 803 printf("%s: could not transmit buffer: %s\n", 804 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 805 806 if (status == USBD_STALLED) 807 usbd_clear_endpoint_stall(sc->sc_tx_pipeh); 808 809 ifp->if_oerrors++; 810 return; 811 } 812 813 s = splnet(); 814 815 m_freem(data->m); 816 data->m = NULL; 817 ieee80211_free_node(data->ni); 818 data->ni = NULL; 819 820 sc->tx_queued--; 821 ifp->if_opackets++; 822 823 DPRINTFN(10, ("tx done\n")); 824 825 sc->sc_tx_timer = 0; 826 ifp->if_flags &= ~IFF_OACTIVE; 827 ural_start(ifp); 828 829 splx(s); 830 } 831 832 Static void 833 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 834 { 835 struct ural_rx_data *data = priv; 836 struct ural_softc *sc = data->sc; 837 struct ieee80211com *ic = &sc->sc_ic; 838 struct ifnet *ifp = ic->ic_ifp; 839 struct ural_rx_desc *desc; 840 struct ieee80211_frame_min *wh; 841 struct ieee80211_node *ni; 842 struct mbuf *m; 843 int s, len; 844 845 if (status != USBD_NORMAL_COMPLETION) { 846 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 847 return; 848 849 if (status == USBD_STALLED) 850 usbd_clear_endpoint_stall(sc->sc_rx_pipeh); 851 goto skip; 852 } 853 854 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 855 856 if (len < RAL_RX_DESC_SIZE) { 857 printf("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), len); 858 ifp->if_ierrors++; 859 goto skip; 860 } 861 862 /* rx descriptor is located at the end */ 863 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 864 865 if (le32toh(desc->flags) & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) { 866 /* 867 * This should not happen since we did not request to receive 868 * those frames when we filled RAL_TXRX_CSR2. 869 */ 870 DPRINTFN(5, ("PHY or CRC error\n")); 871 ifp->if_ierrors++; 872 goto skip; 873 } 874 875 /* finalize mbuf */ 876 m = data->m; 877 m->m_pkthdr.rcvif = ifp; 878 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 879 m->m_flags |= M_HASFCS; /* hardware appends FCS */ 880 881 s = splnet(); 882 883 #if NBPFILTER > 0 884 if (sc->sc_drvbpf != NULL) { 885 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 886 887 tap->wr_flags = 0; 888 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 889 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 890 tap->wr_antenna = sc->rx_ant; 891 tap->wr_antsignal = desc->rssi; 892 893 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 894 } 895 #endif 896 897 wh = mtod(m, struct ieee80211_frame_min *); 898 ni = ieee80211_find_rxnode(ic, wh); 899 900 /* send the frame to the 802.11 layer */ 901 ieee80211_input(ic, m, ni, desc->rssi, 0); 902 903 /* node is no longer needed */ 904 ieee80211_free_node(ni); 905 906 splx(s); 907 908 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 909 if (data->m == NULL) { 910 printf("%s: could not allocate rx mbuf\n", 911 USBDEVNAME(sc->sc_dev)); 912 return; 913 } 914 915 MCLGET(data->m, M_DONTWAIT); 916 if (!(data->m->m_flags & M_EXT)) { 917 printf("%s: could not allocate rx mbuf cluster\n", 918 USBDEVNAME(sc->sc_dev)); 919 m_freem(data->m); 920 data->m = NULL; 921 return; 922 } 923 924 data->buf = mtod(data->m, uint8_t *); 925 926 DPRINTFN(15, ("rx done\n")); 927 928 skip: /* setup a new transfer */ 929 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 930 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 931 usbd_transfer(xfer); 932 } 933 934 /* 935 * Return the expected ack rate for a frame transmitted at rate `rate'. 936 * XXX: this should depend on the destination node basic rate set. 937 */ 938 Static int 939 ural_ack_rate(int rate) 940 { 941 switch (rate) { 942 /* CCK rates */ 943 case 2: 944 return 2; 945 case 4: 946 case 11: 947 case 22: 948 return 4; 949 950 /* OFDM rates */ 951 case 12: 952 case 18: 953 return 12; 954 case 24: 955 case 36: 956 return 24; 957 case 48: 958 case 72: 959 case 96: 960 case 108: 961 return 48; 962 } 963 964 /* default to 1Mbps */ 965 return 2; 966 } 967 968 /* 969 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 970 * The function automatically determines the operating mode depending on the 971 * given rate. `flags' indicates whether short preamble is in use or not. 972 */ 973 Static uint16_t 974 ural_txtime(int len, int rate, uint32_t flags) 975 { 976 uint16_t txtime; 977 int ceil, dbps; 978 979 if (RAL_RATE_IS_OFDM(rate)) { 980 /* 981 * OFDM TXTIME calculation. 982 * From IEEE Std 802.11a-1999, pp. 37. 983 */ 984 dbps = rate * 2; /* data bits per OFDM symbol */ 985 986 ceil = (16 + 8 * len + 6) / dbps; 987 if ((16 + 8 * len + 6) % dbps != 0) 988 ceil++; 989 990 txtime = 16 + 4 + 4 * ceil + 6; 991 } else { 992 /* 993 * High Rate TXTIME calculation. 994 * From IEEE Std 802.11b-1999, pp. 28. 995 */ 996 ceil = (8 * len * 2) / rate; 997 if ((8 * len * 2) % rate != 0) 998 ceil++; 999 1000 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1001 txtime = 72 + 24 + ceil; 1002 else 1003 txtime = 144 + 48 + ceil; 1004 } 1005 1006 return txtime; 1007 } 1008 1009 Static uint8_t 1010 ural_plcp_signal(int rate) 1011 { 1012 switch (rate) { 1013 /* CCK rates (returned values are device-dependent) */ 1014 case 2: return 0x0; 1015 case 4: return 0x1; 1016 case 11: return 0x2; 1017 case 22: return 0x3; 1018 1019 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1020 case 12: return 0xb; 1021 case 18: return 0xf; 1022 case 24: return 0xa; 1023 case 36: return 0xe; 1024 case 48: return 0x9; 1025 case 72: return 0xd; 1026 case 96: return 0x8; 1027 case 108: return 0xc; 1028 1029 /* unsupported rates (should not get there) */ 1030 default: return 0xff; 1031 } 1032 } 1033 1034 Static void 1035 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1036 uint32_t flags, int len, int rate) 1037 { 1038 struct ieee80211com *ic = &sc->sc_ic; 1039 uint16_t plcp_length; 1040 int remainder; 1041 1042 desc->flags = htole32(flags); 1043 desc->flags |= htole32(RAL_TX_NEWSEQ); 1044 desc->flags |= htole32(len << 16); 1045 1046 if (RAL_RATE_IS_OFDM(rate)) 1047 desc->flags |= htole32(RAL_TX_OFDM); 1048 1049 desc->wme = htole16(RAL_LOGCWMAX(5) | RAL_LOGCWMIN(3) | RAL_AIFSN(2)); 1050 1051 /* 1052 * Fill PLCP fields. 1053 */ 1054 desc->plcp_service = 4; 1055 1056 len += 4; /* account for FCS */ 1057 if (RAL_RATE_IS_OFDM(rate)) { 1058 /* 1059 * PLCP length field (LENGTH). 1060 * From IEEE Std 802.11a-1999, pp. 14. 1061 */ 1062 plcp_length = len & 0xfff; 1063 desc->plcp_length = htole16((plcp_length >> 6) << 8 | 1064 (plcp_length & 0x3f)); 1065 } else { 1066 /* 1067 * Long PLCP LENGTH field. 1068 * From IEEE Std 802.11b-1999, pp. 16. 1069 */ 1070 plcp_length = (8 * len * 2) / rate; 1071 remainder = (8 * len * 2) % rate; 1072 if (remainder != 0) { 1073 if (rate == 22 && (rate - remainder) / 16 != 0) 1074 desc->plcp_service |= RAL_PLCP_LENGEXT; 1075 plcp_length++; 1076 } 1077 desc->plcp_length = htole16(plcp_length); 1078 } 1079 1080 desc->plcp_signal = ural_plcp_signal(rate); 1081 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1082 desc->plcp_signal |= 0x08; 1083 1084 desc->iv = 0; 1085 desc->eiv = 0; 1086 } 1087 1088 #define RAL_TX_TIMEOUT 5000 1089 1090 Static int 1091 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1092 { 1093 struct ural_tx_desc *desc; 1094 usbd_xfer_handle xfer; 1095 usbd_status error; 1096 uint8_t cmd = 0; 1097 uint8_t *buf; 1098 int xferlen, rate; 1099 1100 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 4; 1101 1102 xfer = usbd_alloc_xfer(sc->sc_udev); 1103 if (xfer == NULL) 1104 return ENOMEM; 1105 1106 /* xfer length needs to be a multiple of two! */ 1107 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1108 1109 buf = usbd_alloc_buffer(xfer, xferlen); 1110 if (buf == NULL) { 1111 usbd_free_xfer(xfer); 1112 return ENOMEM; 1113 } 1114 1115 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1116 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1117 1118 error = usbd_sync_transfer(xfer); 1119 if (error != 0) { 1120 usbd_free_xfer(xfer); 1121 return error; 1122 } 1123 1124 desc = (struct ural_tx_desc *)buf; 1125 1126 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1127 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1128 m0->m_pkthdr.len, rate); 1129 1130 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1131 m0->m_pkthdr.len, rate, xferlen)); 1132 1133 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1134 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1135 1136 error = usbd_sync_transfer(xfer); 1137 usbd_free_xfer(xfer); 1138 1139 return error; 1140 } 1141 1142 Static int 1143 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1144 { 1145 struct ieee80211com *ic = &sc->sc_ic; 1146 struct ural_tx_desc *desc; 1147 struct ural_tx_data *data; 1148 struct ieee80211_frame *wh; 1149 uint32_t flags = 0; 1150 uint16_t dur; 1151 usbd_status error; 1152 int xferlen, rate; 1153 1154 data = &sc->tx_data[0]; 1155 desc = (struct ural_tx_desc *)data->buf; 1156 1157 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 4; 1158 1159 #if NBPFILTER > 0 1160 if (sc->sc_drvbpf != NULL) { 1161 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1162 1163 tap->wt_flags = 0; 1164 tap->wt_rate = rate; 1165 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1166 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1167 tap->wt_antenna = sc->tx_ant; 1168 1169 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1170 } 1171 #endif 1172 1173 data->m = m0; 1174 data->ni = ni; 1175 1176 wh = mtod(m0, struct ieee80211_frame *); 1177 1178 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1179 flags |= RAL_TX_ACK; 1180 1181 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1182 *(uint16_t *)wh->i_dur = htole16(dur); 1183 1184 /* tell hardware to add timestamp for probe responses */ 1185 if ((wh->i_fc[0] & 1186 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1187 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1188 flags |= RAL_TX_TIMESTAMP; 1189 } 1190 1191 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1192 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1193 1194 /* xfer length needs to be a multiple of two! */ 1195 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1196 1197 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1198 m0->m_pkthdr.len, rate, xferlen)); 1199 1200 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen, 1201 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, ural_txeof); 1202 1203 error = usbd_transfer(data->xfer); 1204 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1205 m_freem(m0); 1206 return error; 1207 } 1208 1209 sc->tx_queued++; 1210 1211 return 0; 1212 } 1213 1214 Static int 1215 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1216 { 1217 struct ieee80211com *ic = &sc->sc_ic; 1218 struct ieee80211_rateset *rs; 1219 struct ural_tx_desc *desc; 1220 struct ural_tx_data *data; 1221 struct ieee80211_frame *wh; 1222 struct ieee80211_key *k; 1223 uint32_t flags = 0; 1224 uint16_t dur; 1225 usbd_status error; 1226 int xferlen, rate; 1227 1228 /* XXX this should be reworked! */ 1229 if (ic->ic_fixed_rate != -1) { 1230 if (ic->ic_curmode != IEEE80211_MODE_AUTO) 1231 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1232 else 1233 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G]; 1234 1235 rate = rs->rs_rates[ic->ic_fixed_rate]; 1236 } else { 1237 rs = &ni->ni_rates; 1238 rate = rs->rs_rates[ni->ni_txrate]; 1239 } 1240 rate &= IEEE80211_RATE_VAL; 1241 1242 if (ic->ic_flags & IEEE80211_F_PRIVACY) { 1243 k = ieee80211_crypto_encap(ic, ni, m0); 1244 if (k == NULL) 1245 return ENOBUFS; 1246 } 1247 1248 #if NBPFILTER > 0 1249 if (sc->sc_drvbpf != NULL) { 1250 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1251 1252 tap->wt_flags = 0; 1253 tap->wt_rate = rate; 1254 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1255 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1256 tap->wt_antenna = sc->tx_ant; 1257 1258 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1259 } 1260 #endif 1261 1262 data = &sc->tx_data[0]; 1263 desc = (struct ural_tx_desc *)data->buf; 1264 1265 data->m = m0; 1266 data->ni = ni; 1267 1268 wh = mtod(m0, struct ieee80211_frame *); 1269 1270 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1271 flags |= RAL_TX_ACK; 1272 flags |= RAL_TX_RETRY(7); 1273 1274 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(rate), 1275 ic->ic_flags) + RAL_SIFS; 1276 *(uint16_t *)wh->i_dur = htole16(dur); 1277 } 1278 1279 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1280 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1281 1282 /* xfer length needs to be a multiple of two! */ 1283 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1284 1285 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1286 m0->m_pkthdr.len, rate, xferlen)); 1287 1288 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen, 1289 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, ural_txeof); 1290 1291 error = usbd_transfer(data->xfer); 1292 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1293 m_freem(m0); 1294 return error; 1295 } 1296 1297 sc->tx_queued++; 1298 1299 return 0; 1300 } 1301 1302 Static void 1303 ural_start(struct ifnet *ifp) 1304 { 1305 struct ural_softc *sc = ifp->if_softc; 1306 struct ieee80211com *ic = &sc->sc_ic; 1307 struct ether_header *eh; 1308 struct ieee80211_node *ni; 1309 struct mbuf *m0; 1310 1311 for (;;) { 1312 IF_POLL(&ic->ic_mgtq, m0); 1313 if (m0 != NULL) { 1314 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1315 ifp->if_flags |= IFF_OACTIVE; 1316 break; 1317 } 1318 IF_DEQUEUE(&ic->ic_mgtq, m0); 1319 1320 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1321 m0->m_pkthdr.rcvif = NULL; 1322 #if NBPFILTER > 0 1323 if (ic->ic_rawbpf != NULL) 1324 bpf_mtap(ic->ic_rawbpf, m0); 1325 #endif 1326 if (ural_tx_mgt(sc, m0, ni) != 0) 1327 break; 1328 1329 } else { 1330 if (ic->ic_state != IEEE80211_S_RUN) 1331 break; 1332 IFQ_DEQUEUE(&ifp->if_snd, m0); 1333 if (m0 == NULL) 1334 break; 1335 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1336 IF_PREPEND(&ifp->if_snd, m0); 1337 ifp->if_flags |= IFF_OACTIVE; 1338 break; 1339 } 1340 1341 if (m0->m_len < sizeof(struct ether_header) && 1342 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1343 continue; 1344 1345 eh = mtod(m0, struct ether_header *); 1346 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1347 if (ni == NULL) { 1348 m_freem(m0); 1349 continue; 1350 } 1351 #if NBPFILTER > 0 1352 if (ifp->if_bpf != NULL) 1353 bpf_mtap(ifp->if_bpf, m0); 1354 #endif 1355 m0 = ieee80211_encap(ic, m0, ni); 1356 if (m0 == NULL) 1357 continue; 1358 #if NBPFILTER > 0 1359 if (ic->ic_rawbpf != NULL) 1360 bpf_mtap(ic->ic_rawbpf, m0); 1361 #endif 1362 if (ural_tx_data(sc, m0, ni) != 0) { 1363 ieee80211_free_node(ni); 1364 ifp->if_oerrors++; 1365 break; 1366 } 1367 } 1368 1369 sc->sc_tx_timer = 5; 1370 ifp->if_timer = 1; 1371 } 1372 } 1373 1374 Static void 1375 ural_watchdog(struct ifnet *ifp) 1376 { 1377 struct ural_softc *sc = ifp->if_softc; 1378 1379 ifp->if_timer = 0; 1380 1381 if (sc->sc_tx_timer > 0) { 1382 if (--sc->sc_tx_timer == 0) { 1383 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1384 /*ural_init(ifp); XXX needs a process context! */ 1385 ifp->if_oerrors++; 1386 return; 1387 } 1388 ifp->if_timer = 1; 1389 } 1390 1391 ieee80211_watchdog(&sc->sc_ic); 1392 } 1393 1394 Static int 1395 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1396 { 1397 struct ural_softc *sc = ifp->if_softc; 1398 struct ieee80211com *ic = &sc->sc_ic; 1399 #if 0 1400 struct ifreq *ifr; 1401 #endif 1402 int s, error = 0; 1403 1404 s = splnet(); 1405 1406 switch (cmd) { 1407 case SIOCSIFFLAGS: 1408 if (ifp->if_flags & IFF_UP) { 1409 if (ifp->if_flags & IFF_RUNNING) 1410 ural_update_promisc(sc); 1411 else 1412 ural_init(ifp); 1413 } else { 1414 if (ifp->if_flags & IFF_RUNNING) 1415 ural_stop(ifp, 1); 1416 } 1417 break; 1418 #if 0 1419 case SIOCADDMULTI: 1420 case SIOCDELMULTI: 1421 ifr = (struct ifreq *)data; 1422 error = (cmd == SIOCADDMULTI) ? 1423 ether_addmulti(ifr, ic->ic_ec) : 1424 ether_delmulti(ifr, ic->ic_ec); 1425 1426 if (error == ENETRESET) 1427 error = 0; 1428 break; 1429 1430 case SIOCS80211CHANNEL: 1431 /* 1432 * This allows for fast channel switching in monitor mode 1433 * (used by kismet). In IBSS mode, we must explicitly reset 1434 * the interface to generate a new beacon frame. 1435 */ 1436 error = ieee80211_ioctl(ic, cmd, data); 1437 if (error == ENETRESET && 1438 ic->ic_opmode == IEEE80211_M_MONITOR) { 1439 ural_set_chan(sc, ic->ic_ibss_chan); 1440 error = 0; 1441 } 1442 break; 1443 #endif 1444 default: 1445 error = ieee80211_ioctl(ic, cmd, data); 1446 } 1447 1448 if (error == ENETRESET) { 1449 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1450 (IFF_UP | IFF_RUNNING)) 1451 ural_init(ifp); 1452 error = 0; 1453 } 1454 1455 splx(s); 1456 1457 return error; 1458 } 1459 1460 Static void 1461 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1462 { 1463 usb_device_request_t req; 1464 usbd_status error; 1465 1466 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1467 req.bRequest = RAL_READ_EEPROM; 1468 USETW(req.wValue, 0); 1469 USETW(req.wIndex, addr); 1470 USETW(req.wLength, len); 1471 1472 error = usbd_do_request(sc->sc_udev, &req, buf); 1473 if (error != 0) { 1474 printf("%s: could not read EEPROM: %s\n", 1475 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1476 } 1477 } 1478 1479 Static uint16_t 1480 ural_read(struct ural_softc *sc, uint16_t reg) 1481 { 1482 usb_device_request_t req; 1483 usbd_status error; 1484 uint16_t val; 1485 1486 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1487 req.bRequest = RAL_READ_MAC; 1488 USETW(req.wValue, 0); 1489 USETW(req.wIndex, reg); 1490 USETW(req.wLength, sizeof (uint16_t)); 1491 1492 error = usbd_do_request(sc->sc_udev, &req, &val); 1493 if (error != 0) { 1494 printf("%s: could not read MAC register: %s\n", 1495 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1496 return 0; 1497 } 1498 1499 return le16toh(val); 1500 } 1501 1502 Static void 1503 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1504 { 1505 usb_device_request_t req; 1506 usbd_status error; 1507 1508 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1509 req.bRequest = RAL_READ_MULTI_MAC; 1510 USETW(req.wValue, 0); 1511 USETW(req.wIndex, reg); 1512 USETW(req.wLength, len); 1513 1514 error = usbd_do_request(sc->sc_udev, &req, buf); 1515 if (error != 0) { 1516 printf("%s: could not read MAC register: %s\n", 1517 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1518 return; 1519 } 1520 } 1521 1522 Static void 1523 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1524 { 1525 usb_device_request_t req; 1526 usbd_status error; 1527 1528 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1529 req.bRequest = RAL_WRITE_MAC; 1530 USETW(req.wValue, val); 1531 USETW(req.wIndex, reg); 1532 USETW(req.wLength, 0); 1533 1534 error = usbd_do_request(sc->sc_udev, &req, NULL); 1535 if (error != 0) { 1536 printf("%s: could not write MAC register: %s\n", 1537 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1538 } 1539 } 1540 1541 Static void 1542 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1543 { 1544 usb_device_request_t req; 1545 usbd_status error; 1546 1547 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1548 req.bRequest = RAL_WRITE_MULTI_MAC; 1549 USETW(req.wValue, 0); 1550 USETW(req.wIndex, reg); 1551 USETW(req.wLength, len); 1552 1553 error = usbd_do_request(sc->sc_udev, &req, buf); 1554 if (error != 0) { 1555 printf("%s: could not write MAC register: %s\n", 1556 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1557 } 1558 } 1559 1560 Static void 1561 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1562 { 1563 uint16_t tmp; 1564 int ntries; 1565 1566 for (ntries = 0; ntries < 5; ntries++) { 1567 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1568 break; 1569 } 1570 if (ntries == 5) { 1571 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1572 return; 1573 } 1574 1575 tmp = reg << 8 | val; 1576 ural_write(sc, RAL_PHY_CSR7, tmp); 1577 } 1578 1579 Static uint8_t 1580 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1581 { 1582 uint16_t val; 1583 int ntries; 1584 1585 val = RAL_BBP_WRITE | reg << 8; 1586 ural_write(sc, RAL_PHY_CSR7, val); 1587 1588 for (ntries = 0; ntries < 5; ntries++) { 1589 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1590 break; 1591 } 1592 if (ntries == 5) { 1593 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1594 return 0; 1595 } 1596 1597 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1598 } 1599 1600 Static void 1601 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1602 { 1603 uint32_t tmp; 1604 int ntries; 1605 1606 for (ntries = 0; ntries < 5; ntries++) { 1607 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1608 break; 1609 } 1610 if (ntries == 5) { 1611 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1612 return; 1613 } 1614 1615 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1616 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1617 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1618 1619 /* remember last written value in sc */ 1620 sc->rf_regs[reg] = val; 1621 1622 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1623 } 1624 1625 Static void 1626 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1627 { 1628 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1629 struct ieee80211com *ic = &sc->sc_ic; 1630 uint8_t power, tmp; 1631 u_int i, chan; 1632 1633 chan = ieee80211_chan2ieee(ic, c); 1634 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1635 return; 1636 1637 if (IEEE80211_IS_CHAN_2GHZ(c)) 1638 power = min(sc->txpow[chan - 1], 31); 1639 else 1640 power = 31; 1641 1642 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1643 1644 switch (sc->rf_rev) { 1645 case RAL_RF_2522: 1646 ural_rf_write(sc, RAL_RF1, 0x00814); 1647 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1648 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1649 break; 1650 1651 case RAL_RF_2523: 1652 ural_rf_write(sc, RAL_RF1, 0x08804); 1653 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1654 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1655 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1656 break; 1657 1658 case RAL_RF_2524: 1659 ural_rf_write(sc, RAL_RF1, 0x0c808); 1660 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1661 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1662 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1663 break; 1664 1665 case RAL_RF_2525: 1666 ural_rf_write(sc, RAL_RF1, 0x08808); 1667 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1668 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1669 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1670 1671 ural_rf_write(sc, RAL_RF1, 0x08808); 1672 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1673 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1674 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1675 break; 1676 1677 case RAL_RF_2525E: 1678 ural_rf_write(sc, RAL_RF1, 0x08808); 1679 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1680 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1681 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1682 break; 1683 1684 case RAL_RF_2526: 1685 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1686 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1687 ural_rf_write(sc, RAL_RF1, 0x08804); 1688 1689 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1690 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1691 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1692 break; 1693 1694 /* dual-band RF */ 1695 case RAL_RF_5222: 1696 for (i = 0; i < N(ural_rf5222); i++) 1697 if (ural_rf5222[i].chan == chan) 1698 break; 1699 1700 if (i < N(ural_rf5222)) { 1701 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1702 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1703 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1704 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1705 } 1706 break; 1707 } 1708 1709 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1710 ic->ic_state != IEEE80211_S_SCAN) { 1711 /* set Japan filter bit for channel 14 */ 1712 tmp = ural_bbp_read(sc, 70); 1713 1714 tmp &= ~RAL_JAPAN_FILTER; 1715 if (chan == 14) 1716 tmp |= RAL_JAPAN_FILTER; 1717 1718 ural_bbp_write(sc, 70, tmp); 1719 1720 /* clear CRC errors */ 1721 ural_read(sc, RAL_STA_CSR0); 1722 1723 DELAY(1000); /* RF needs a 1ms delay here */ 1724 ural_disable_rf_tune(sc); 1725 } 1726 #undef N 1727 } 1728 1729 /* 1730 * Disable RF auto-tuning. 1731 */ 1732 Static void 1733 ural_disable_rf_tune(struct ural_softc *sc) 1734 { 1735 uint32_t tmp; 1736 1737 if (sc->rf_rev != RAL_RF_2523) { 1738 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1739 ural_rf_write(sc, RAL_RF1, tmp); 1740 } 1741 1742 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1743 ural_rf_write(sc, RAL_RF3, tmp); 1744 1745 DPRINTFN(2, ("disabling RF autotune\n")); 1746 } 1747 1748 /* 1749 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1750 * synchronization. 1751 */ 1752 Static void 1753 ural_enable_tsf_sync(struct ural_softc *sc) 1754 { 1755 struct ieee80211com *ic = &sc->sc_ic; 1756 uint16_t logcwmin, preload, tmp; 1757 1758 /* first, disable TSF synchronization */ 1759 ural_write(sc, RAL_TXRX_CSR19, 0); 1760 1761 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1762 ural_write(sc, RAL_TXRX_CSR18, tmp); 1763 1764 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1765 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1766 tmp = logcwmin << 12 | preload; 1767 ural_write(sc, RAL_TXRX_CSR20, tmp); 1768 1769 /* finally, enable TSF synchronization */ 1770 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1771 if (ic->ic_opmode == IEEE80211_M_STA) 1772 tmp |= RAL_ENABLE_TSF_SYNC(1); 1773 else 1774 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1775 ural_write(sc, RAL_TXRX_CSR19, tmp); 1776 1777 DPRINTF(("enabling TSF synchronization\n")); 1778 } 1779 1780 Static void 1781 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1782 { 1783 uint16_t tmp; 1784 1785 tmp = bssid[0] | bssid[1] << 8; 1786 ural_write(sc, RAL_MAC_CSR5, tmp); 1787 1788 tmp = bssid[2] | bssid[3] << 8; 1789 ural_write(sc, RAL_MAC_CSR6, tmp); 1790 1791 tmp = bssid[4] | bssid[5] << 8; 1792 ural_write(sc, RAL_MAC_CSR7, tmp); 1793 1794 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1795 } 1796 1797 Static void 1798 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1799 { 1800 uint16_t tmp; 1801 1802 tmp = addr[0] | addr[1] << 8; 1803 ural_write(sc, RAL_MAC_CSR2, tmp); 1804 1805 tmp = addr[2] | addr[3] << 8; 1806 ural_write(sc, RAL_MAC_CSR3, tmp); 1807 1808 tmp = addr[4] | addr[5] << 8; 1809 ural_write(sc, RAL_MAC_CSR4, tmp); 1810 1811 DPRINTF(("setting MAC address to %6s\n", ether_sprintf(addr))); 1812 } 1813 1814 Static void 1815 ural_update_promisc(struct ural_softc *sc) 1816 { 1817 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1818 uint16_t tmp; 1819 1820 tmp = ural_read(sc, RAL_TXRX_CSR2); 1821 1822 tmp &= ~RAL_DROP_NOT_TO_ME; 1823 if (!(ifp->if_flags & IFF_PROMISC)) 1824 tmp |= RAL_DROP_NOT_TO_ME; 1825 1826 ural_write(sc, RAL_TXRX_CSR2, tmp); 1827 1828 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1829 "entering" : "leaving")); 1830 } 1831 1832 Static const char * 1833 ural_get_rf(int rev) 1834 { 1835 switch (rev) { 1836 case RAL_RF_2522: return "RT2522"; 1837 case RAL_RF_2523: return "RT2523"; 1838 case RAL_RF_2524: return "RT2524"; 1839 case RAL_RF_2525: return "RT2525"; 1840 case RAL_RF_2525E: return "RT2525e"; 1841 case RAL_RF_2526: return "RT2526"; 1842 case RAL_RF_5222: return "RT5222"; 1843 default: return "unknown"; 1844 } 1845 } 1846 1847 Static void 1848 ural_read_eeprom(struct ural_softc *sc) 1849 { 1850 struct ieee80211com *ic = &sc->sc_ic; 1851 uint16_t val; 1852 1853 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1854 val = le16toh(val); 1855 sc->rf_rev = (val >> 11) & 0x7; 1856 sc->hw_radio = (val >> 10) & 0x1; 1857 sc->led_mode = (val >> 6) & 0x7; 1858 sc->rx_ant = (val >> 4) & 0x3; 1859 sc->tx_ant = (val >> 2) & 0x3; 1860 sc->nb_ant = val & 0x3; 1861 1862 /* read MAC address */ 1863 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1864 1865 /* read default values for BBP registers */ 1866 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1867 1868 /* read Tx power for all b/g channels */ 1869 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1870 } 1871 1872 Static int 1873 ural_bbp_init(struct ural_softc *sc) 1874 { 1875 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1876 int i, ntries; 1877 1878 /* wait for BBP to be ready */ 1879 for (ntries = 0; ntries < 100; ntries++) { 1880 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1881 break; 1882 DELAY(1000); 1883 } 1884 if (ntries == 100) { 1885 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 1886 return EIO; 1887 } 1888 1889 /* initialize BBP registers to default values */ 1890 for (i = 0; i < N(ural_def_bbp); i++) 1891 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 1892 1893 #if 0 1894 /* initialize BBP registers to values stored in EEPROM */ 1895 for (i = 0; i < 16; i++) { 1896 if (sc->bbp_prom[i].reg == 0xff) 1897 continue; 1898 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 1899 } 1900 #endif 1901 1902 return 0; 1903 #undef N 1904 } 1905 1906 Static void 1907 ural_set_txantenna(struct ural_softc *sc, int antenna) 1908 { 1909 uint16_t tmp; 1910 uint8_t tx; 1911 1912 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 1913 if (antenna == 1) 1914 tx |= RAL_BBP_ANTA; 1915 else if (antenna == 2) 1916 tx |= RAL_BBP_ANTB; 1917 else 1918 tx |= RAL_BBP_DIVERSITY; 1919 1920 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 1921 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 1922 sc->rf_rev == RAL_RF_5222) 1923 tx |= RAL_BBP_FLIPIQ; 1924 1925 ural_bbp_write(sc, RAL_BBP_TX, tx); 1926 1927 /* update flags in PHY_CSR5 and PHY_CSR6 too */ 1928 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 1929 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 1930 1931 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 1932 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 1933 } 1934 1935 Static void 1936 ural_set_rxantenna(struct ural_softc *sc, int antenna) 1937 { 1938 uint8_t rx; 1939 1940 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 1941 if (antenna == 1) 1942 rx |= RAL_BBP_ANTA; 1943 else if (antenna == 2) 1944 rx |= RAL_BBP_ANTB; 1945 else 1946 rx |= RAL_BBP_DIVERSITY; 1947 1948 /* need to force no I/Q flip for RF 2525e and 2526 */ 1949 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 1950 rx &= ~RAL_BBP_FLIPIQ; 1951 1952 ural_bbp_write(sc, RAL_BBP_RX, rx); 1953 } 1954 1955 Static int 1956 ural_init(struct ifnet *ifp) 1957 { 1958 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1959 struct ural_softc *sc = ifp->if_softc; 1960 struct ieee80211com *ic = &sc->sc_ic; 1961 struct ieee80211_key *wk; 1962 struct ural_rx_data *data; 1963 uint16_t sta[11], tmp; 1964 usbd_status error; 1965 int i, ntries; 1966 1967 ural_stop(ifp, 0); 1968 1969 /* initialize MAC registers to default values */ 1970 for (i = 0; i < N(ural_def_mac); i++) 1971 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 1972 1973 /* wait for BBP and RF to wake up (this can take a long time!) */ 1974 for (ntries = 0; ntries < 100; ntries++) { 1975 tmp = ural_read(sc, RAL_MAC_CSR17); 1976 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 1977 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 1978 break; 1979 DELAY(1000); 1980 } 1981 if (ntries == 100) { 1982 printf("%s: timeout waiting for BBP/RF to wakeup\n", 1983 USBDEVNAME(sc->sc_dev)); 1984 error = EIO; 1985 goto fail; 1986 } 1987 1988 /* we're ready! */ 1989 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 1990 1991 /* set supported basic rates (1, 2, 6, 12, 24) */ 1992 ural_write(sc, RAL_TXRX_CSR11, 0x153); 1993 1994 error = ural_bbp_init(sc); 1995 if (error != 0) 1996 goto fail; 1997 1998 /* set default BSS channel */ 1999 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2000 ural_set_chan(sc, ic->ic_bss->ni_chan); 2001 2002 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2003 ural_read_multi(sc, RAL_STA_CSR0, sta, sizeof sta); 2004 2005 /* set default sensitivity */ 2006 ural_bbp_write(sc, 17, 0x48); 2007 2008 ural_set_txantenna(sc, 1); 2009 ural_set_rxantenna(sc, 1); 2010 2011 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2012 ural_set_macaddr(sc, ic->ic_myaddr); 2013 2014 /* 2015 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2016 */ 2017 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2018 wk = &ic->ic_nw_keys[i]; 2019 ural_write_multi(sc, RAL_SEC_CSR0 + i * IEEE80211_KEYBUF_SIZE, 2020 wk->wk_key, IEEE80211_KEYBUF_SIZE); 2021 } 2022 2023 /* 2024 * Open Tx and Rx USB bulk pipes. 2025 */ 2026 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2027 &sc->sc_tx_pipeh); 2028 if (error != 0) { 2029 printf("%s: could not open Tx pipe: %s\n", 2030 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2031 goto fail; 2032 } 2033 2034 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2035 &sc->sc_rx_pipeh); 2036 if (error != 0) { 2037 printf("%s: could not open Rx pipe: %s\n", 2038 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2039 goto fail; 2040 } 2041 2042 /* 2043 * Allocate Tx and Rx xfer queues. 2044 */ 2045 error = ural_alloc_tx_list(sc); 2046 if (error != 0) { 2047 printf("%s: could not allocate Tx list\n", 2048 USBDEVNAME(sc->sc_dev)); 2049 goto fail; 2050 } 2051 2052 error = ural_alloc_rx_list(sc); 2053 if (error != 0) { 2054 printf("%s: could not allocate Rx list\n", 2055 USBDEVNAME(sc->sc_dev)); 2056 goto fail; 2057 } 2058 2059 /* 2060 * Start up the receive pipe. 2061 */ 2062 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2063 data = &sc->rx_data[i]; 2064 2065 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2066 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2067 usbd_transfer(data->xfer); 2068 } 2069 2070 /* kick Rx */ 2071 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2072 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2073 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2074 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2075 tmp |= RAL_DROP_TODS; 2076 if (!(ifp->if_flags & IFF_PROMISC)) 2077 tmp |= RAL_DROP_NOT_TO_ME; 2078 } 2079 ural_write(sc, RAL_TXRX_CSR2, tmp); 2080 2081 ifp->if_flags &= ~IFF_OACTIVE; 2082 ifp->if_flags |= IFF_RUNNING; 2083 2084 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2085 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2086 else 2087 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2088 2089 return 0; 2090 2091 fail: ural_stop(ifp, 1); 2092 return error; 2093 #undef N 2094 } 2095 2096 Static void 2097 ural_stop(struct ifnet *ifp, int disable) 2098 { 2099 struct ural_softc *sc = ifp->if_softc; 2100 struct ieee80211com *ic = &sc->sc_ic; 2101 2102 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2103 2104 /* disable Rx */ 2105 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2106 2107 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2108 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2109 ural_write(sc, RAL_MAC_CSR1, 0); 2110 2111 sc->sc_tx_timer = 0; 2112 ifp->if_timer = 0; 2113 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2114 2115 if (sc->sc_rx_pipeh != NULL) { 2116 usbd_abort_pipe(sc->sc_rx_pipeh); 2117 usbd_close_pipe(sc->sc_rx_pipeh); 2118 sc->sc_rx_pipeh = NULL; 2119 } 2120 2121 if (sc->sc_tx_pipeh != NULL) { 2122 usbd_abort_pipe(sc->sc_tx_pipeh); 2123 usbd_close_pipe(sc->sc_tx_pipeh); 2124 sc->sc_tx_pipeh = NULL; 2125 } 2126 2127 ural_free_rx_list(sc); 2128 ural_free_tx_list(sc); 2129 } 2130 2131 int 2132 ural_activate(device_ptr_t self, enum devact act) 2133 { 2134 switch (act) { 2135 case DVACT_ACTIVATE: 2136 return EOPNOTSUPP; 2137 2138 case DVACT_DEACTIVATE: 2139 /*if_deactivate(&sc->sc_ic.ic_if);*/ 2140 break; 2141 } 2142 2143 return 0; 2144 } 2145 2146 #if 0 2147 Static struct mbuf * 2148 ural_getmbuf(int flags, int type, u_int pktlen) 2149 { 2150 struct mbuf *m; 2151 2152 MGETHDR(m, flags, type); 2153 if (m != NULL && pktlen > MHLEN) 2154 MCLGET(m, flags); 2155 2156 return m; 2157 } 2158 2159 Static struct mbuf * 2160 ural_beacon_alloc(struct ieee80211com *ic, struct ieee80211_node *ni) 2161 { 2162 struct ieee80211_frame *wh; 2163 struct mbuf *m; 2164 int pktlen; 2165 u_int8_t *frm; 2166 u_int16_t capinfo; 2167 struct ieee80211_rateset *rs; 2168 2169 rs = &ni->ni_rates; 2170 pktlen = sizeof (struct ieee80211_frame) 2171 + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6; 2172 if (rs->rs_nrates > IEEE80211_RATE_SIZE) 2173 pktlen += 2; 2174 m = ural_getmbuf(M_DONTWAIT, MT_DATA, 2175 2 + ic->ic_des_esslen 2176 + 2 + IEEE80211_RATE_SIZE 2177 + 2 + (IEEE80211_RATE_MAXSIZE - IEEE80211_RATE_SIZE)); 2178 if (m == NULL) 2179 return NULL; 2180 2181 wh = mtod(m, struct ieee80211_frame *); 2182 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 2183 IEEE80211_FC0_SUBTYPE_BEACON; 2184 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 2185 *(u_int16_t *)wh->i_dur = 0; 2186 IEEE80211_ADDR_COPY(wh->i_addr1, etherbroadcastaddr); 2187 IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_myaddr); 2188 IEEE80211_ADDR_COPY(wh->i_addr3, ni->ni_bssid); 2189 *(u_int16_t *)wh->i_seq = 0; 2190 2191 /* 2192 * beacon frame format 2193 * [8] time stamp 2194 * [2] beacon interval 2195 * [2] cabability information 2196 * [tlv] ssid 2197 * [tlv] supported rates 2198 * [tlv] parameter set (IBSS) 2199 * [tlv] extended supported rates 2200 */ 2201 frm = (u_int8_t *)&wh[1]; 2202 memset(frm, 0, 8); /* timestamp is set by hardware */ 2203 frm += 8; 2204 *(u_int16_t *)frm = htole16(ni->ni_intval); 2205 frm += 2; 2206 if (ic->ic_opmode == IEEE80211_M_IBSS) { 2207 capinfo = IEEE80211_CAPINFO_IBSS; 2208 } else { 2209 capinfo = IEEE80211_CAPINFO_ESS; 2210 } 2211 if (ic->ic_flags & IEEE80211_F_PRIVACY) 2212 capinfo |= IEEE80211_CAPINFO_PRIVACY; 2213 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 2214 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) 2215 capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE; 2216 if (ic->ic_flags & IEEE80211_F_SHSLOT) 2217 capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME; 2218 *(u_int16_t *)frm = htole16(capinfo); 2219 frm += 2; 2220 *frm++ = IEEE80211_ELEMID_SSID; 2221 *frm++ = ni->ni_esslen; 2222 memcpy(frm, ni->ni_essid, ni->ni_esslen); 2223 frm += ni->ni_esslen; 2224 frm = ieee80211_add_rates(frm, rs); 2225 *frm++ = IEEE80211_ELEMID_DSPARMS; 2226 *frm++ = 1; 2227 *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan); 2228 if (ic->ic_opmode == IEEE80211_M_IBSS) { 2229 *frm++ = IEEE80211_ELEMID_IBSSPARMS; 2230 *frm++ = 2; 2231 *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */ 2232 } else { 2233 /* TODO: TIM */ 2234 *frm++ = IEEE80211_ELEMID_TIM; 2235 *frm++ = 4; /* length */ 2236 *frm++ = 0; /* DTIM count */ 2237 *frm++ = 1; /* DTIM period */ 2238 *frm++ = 0; /* bitmap control */ 2239 *frm++ = 0; /* Partial Virtual Bitmap (variable length) */ 2240 } 2241 frm = ieee80211_add_xrates(frm, rs); 2242 m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *); 2243 2244 return m; 2245 } 2246 #endif 2247
Indexes created Mon Sep 29 21:09:56 GMT 2025