if_ural.c revision 1.10.4.1
1 /* $NetBSD: if_ural.c,v 1.10.4.1 2006/09/09 02:55:33 rpaulo Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.10.4.1 2006/09/09 02:55:33 rpaulo Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usbdevs.h> 69 70 #include <dev/usb/if_uralreg.h> 71 #include <dev/usb/if_uralvar.h> 72 73 #ifdef USB_DEBUG 74 #define URAL_DEBUG 75 #endif 76 77 #ifdef URAL_DEBUG 78 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 79 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 80 int ural_debug = 0; 81 #else 82 #define DPRINTF(x) 83 #define DPRINTFN(n, x) 84 #endif 85 86 /* various supported device vendors/products */ 87 static const struct usb_devno ural_devs[] = { 88 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 90 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 91 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 93 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 94 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 95 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 96 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 98 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 101 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 106 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 107 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 108 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 109 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 110 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 111 }; 112 113 Static int ural_alloc_tx_list(struct ural_softc *); 114 Static void ural_free_tx_list(struct ural_softc *); 115 Static int ural_alloc_rx_list(struct ural_softc *); 116 Static void ural_free_rx_list(struct ural_softc *); 117 Static int ural_media_change(struct ifnet *); 118 Static void ural_next_scan(void *); 119 Static void ural_task(void *); 120 Static int ural_newstate(struct ieee80211com *, 121 enum ieee80211_state, int); 122 Static int ural_rxrate(struct ural_rx_desc *); 123 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 124 usbd_status); 125 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 126 usbd_status); 127 Static int ural_ack_rate(struct ieee80211com *, int); 128 Static uint16_t ural_txtime(int, int, uint32_t); 129 Static uint8_t ural_plcp_signal(int); 130 Static void ural_setup_tx_desc(struct ural_softc *, 131 struct ural_tx_desc *, uint32_t, int, int); 132 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 133 struct ieee80211_node *); 134 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 135 struct ieee80211_node *); 136 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 137 struct ieee80211_node *); 138 Static void ural_start(struct ifnet *); 139 Static void ural_watchdog(struct ifnet *); 140 Static int ural_reset(struct ifnet *); 141 Static int ural_ioctl(struct ifnet *, u_long, caddr_t); 142 Static void ural_set_testmode(struct ural_softc *); 143 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 144 int); 145 Static uint16_t ural_read(struct ural_softc *, uint16_t); 146 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 147 int); 148 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 149 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 150 int); 151 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 152 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 153 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 154 Static void ural_set_chan(struct ural_softc *, 155 struct ieee80211_channel *); 156 Static void ural_disable_rf_tune(struct ural_softc *); 157 Static void ural_enable_tsf_sync(struct ural_softc *); 158 Static void ural_update_slot(struct ifnet *); 159 Static void ural_set_txpreamble(struct ural_softc *); 160 Static void ural_set_basicrates(struct ural_softc *); 161 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 162 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 163 Static void ural_update_promisc(struct ural_softc *); 164 Static const char *ural_get_rf(int); 165 Static void ural_read_eeprom(struct ural_softc *); 166 Static int ural_bbp_init(struct ural_softc *); 167 Static void ural_set_txantenna(struct ural_softc *, int); 168 Static void ural_set_rxantenna(struct ural_softc *, int); 169 Static int ural_init(struct ifnet *); 170 Static void ural_stop(struct ifnet *, int); 171 Static void ural_amrr_start(struct ural_softc *, 172 struct ieee80211_node *); 173 Static void ural_amrr_timeout(void *); 174 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 175 usbd_status status); 176 Static void ural_ratectl(struct ural_amrr *, 177 struct ieee80211_node *); 178 179 /* 180 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 181 */ 182 static const struct ieee80211_rateset ural_rateset_11a = 183 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 184 185 static const struct ieee80211_rateset ural_rateset_11b = 186 { 4, { 2, 4, 11, 22 } }; 187 188 static const struct ieee80211_rateset ural_rateset_11g = 189 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 190 191 /* 192 * Default values for MAC registers; values taken from the reference driver. 193 */ 194 static const struct { 195 uint16_t reg; 196 uint16_t val; 197 } ural_def_mac[] = { 198 { RAL_TXRX_CSR5, 0x8c8d }, 199 { RAL_TXRX_CSR6, 0x8b8a }, 200 { RAL_TXRX_CSR7, 0x8687 }, 201 { RAL_TXRX_CSR8, 0x0085 }, 202 { RAL_MAC_CSR13, 0x1111 }, 203 { RAL_MAC_CSR14, 0x1e11 }, 204 { RAL_TXRX_CSR21, 0xe78f }, 205 { RAL_MAC_CSR9, 0xff1d }, 206 { RAL_MAC_CSR11, 0x0002 }, 207 { RAL_MAC_CSR22, 0x0053 }, 208 { RAL_MAC_CSR15, 0x0000 }, 209 { RAL_MAC_CSR8, 0x0780 }, 210 { RAL_TXRX_CSR19, 0x0000 }, 211 { RAL_TXRX_CSR18, 0x005a }, 212 { RAL_PHY_CSR2, 0x0000 }, 213 { RAL_TXRX_CSR0, 0x1ec0 }, 214 { RAL_PHY_CSR4, 0x000f } 215 }; 216 217 /* 218 * Default values for BBP registers; values taken from the reference driver. 219 */ 220 static const struct { 221 uint8_t reg; 222 uint8_t val; 223 } ural_def_bbp[] = { 224 { 3, 0x02 }, 225 { 4, 0x19 }, 226 { 14, 0x1c }, 227 { 15, 0x30 }, 228 { 16, 0xac }, 229 { 17, 0x48 }, 230 { 18, 0x18 }, 231 { 19, 0xff }, 232 { 20, 0x1e }, 233 { 21, 0x08 }, 234 { 22, 0x08 }, 235 { 23, 0x08 }, 236 { 24, 0x80 }, 237 { 25, 0x50 }, 238 { 26, 0x08 }, 239 { 27, 0x23 }, 240 { 30, 0x10 }, 241 { 31, 0x2b }, 242 { 32, 0xb9 }, 243 { 34, 0x12 }, 244 { 35, 0x50 }, 245 { 39, 0xc4 }, 246 { 40, 0x02 }, 247 { 41, 0x60 }, 248 { 53, 0x10 }, 249 { 54, 0x18 }, 250 { 56, 0x08 }, 251 { 57, 0x10 }, 252 { 58, 0x08 }, 253 { 61, 0x60 }, 254 { 62, 0x10 }, 255 { 75, 0xff } 256 }; 257 258 /* 259 * Default values for RF register R2 indexed by channel numbers. 260 */ 261 static const uint32_t ural_rf2522_r2[] = { 262 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 263 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 264 }; 265 266 static const uint32_t ural_rf2523_r2[] = { 267 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 268 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 269 }; 270 271 static const uint32_t ural_rf2524_r2[] = { 272 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 273 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 274 }; 275 276 static const uint32_t ural_rf2525_r2[] = { 277 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 278 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 279 }; 280 281 static const uint32_t ural_rf2525_hi_r2[] = { 282 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 283 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 284 }; 285 286 static const uint32_t ural_rf2525e_r2[] = { 287 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 288 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 289 }; 290 291 static const uint32_t ural_rf2526_hi_r2[] = { 292 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 293 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 294 }; 295 296 static const uint32_t ural_rf2526_r2[] = { 297 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 298 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 299 }; 300 301 /* 302 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 303 * values taken from the reference driver. 304 */ 305 static const struct { 306 uint8_t chan; 307 uint32_t r1; 308 uint32_t r2; 309 uint32_t r4; 310 } ural_rf5222[] = { 311 { 1, 0x08808, 0x0044d, 0x00282 }, 312 { 2, 0x08808, 0x0044e, 0x00282 }, 313 { 3, 0x08808, 0x0044f, 0x00282 }, 314 { 4, 0x08808, 0x00460, 0x00282 }, 315 { 5, 0x08808, 0x00461, 0x00282 }, 316 { 6, 0x08808, 0x00462, 0x00282 }, 317 { 7, 0x08808, 0x00463, 0x00282 }, 318 { 8, 0x08808, 0x00464, 0x00282 }, 319 { 9, 0x08808, 0x00465, 0x00282 }, 320 { 10, 0x08808, 0x00466, 0x00282 }, 321 { 11, 0x08808, 0x00467, 0x00282 }, 322 { 12, 0x08808, 0x00468, 0x00282 }, 323 { 13, 0x08808, 0x00469, 0x00282 }, 324 { 14, 0x08808, 0x0046b, 0x00286 }, 325 326 { 36, 0x08804, 0x06225, 0x00287 }, 327 { 40, 0x08804, 0x06226, 0x00287 }, 328 { 44, 0x08804, 0x06227, 0x00287 }, 329 { 48, 0x08804, 0x06228, 0x00287 }, 330 { 52, 0x08804, 0x06229, 0x00287 }, 331 { 56, 0x08804, 0x0622a, 0x00287 }, 332 { 60, 0x08804, 0x0622b, 0x00287 }, 333 { 64, 0x08804, 0x0622c, 0x00287 }, 334 335 { 100, 0x08804, 0x02200, 0x00283 }, 336 { 104, 0x08804, 0x02201, 0x00283 }, 337 { 108, 0x08804, 0x02202, 0x00283 }, 338 { 112, 0x08804, 0x02203, 0x00283 }, 339 { 116, 0x08804, 0x02204, 0x00283 }, 340 { 120, 0x08804, 0x02205, 0x00283 }, 341 { 124, 0x08804, 0x02206, 0x00283 }, 342 { 128, 0x08804, 0x02207, 0x00283 }, 343 { 132, 0x08804, 0x02208, 0x00283 }, 344 { 136, 0x08804, 0x02209, 0x00283 }, 345 { 140, 0x08804, 0x0220a, 0x00283 }, 346 347 { 149, 0x08808, 0x02429, 0x00281 }, 348 { 153, 0x08808, 0x0242b, 0x00281 }, 349 { 157, 0x08808, 0x0242d, 0x00281 }, 350 { 161, 0x08808, 0x0242f, 0x00281 } 351 }; 352 353 USB_DECLARE_DRIVER(ural); 354 355 USB_MATCH(ural) 356 { 357 USB_MATCH_START(ural, uaa); 358 359 if (uaa->iface != NULL) 360 return UMATCH_NONE; 361 362 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 363 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 364 } 365 366 USB_ATTACH(ural) 367 { 368 USB_ATTACH_START(ural, sc, uaa); 369 struct ieee80211com *ic = &sc->sc_ic; 370 struct ifnet *ifp = &sc->sc_if; 371 usb_interface_descriptor_t *id; 372 usb_endpoint_descriptor_t *ed; 373 usbd_status error; 374 char *devinfop; 375 int i; 376 377 sc->sc_udev = uaa->device; 378 379 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 380 USB_ATTACH_SETUP; 381 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 382 usbd_devinfo_free(devinfop); 383 384 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 385 printf("%s: could not set configuration no\n", 386 USBDEVNAME(sc->sc_dev)); 387 USB_ATTACH_ERROR_RETURN; 388 } 389 390 /* get the first interface handle */ 391 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 392 &sc->sc_iface); 393 if (error != 0) { 394 printf("%s: could not get interface handle\n", 395 USBDEVNAME(sc->sc_dev)); 396 USB_ATTACH_ERROR_RETURN; 397 } 398 399 /* 400 * Find endpoints. 401 */ 402 id = usbd_get_interface_descriptor(sc->sc_iface); 403 404 sc->sc_rx_no = sc->sc_tx_no = -1; 405 for (i = 0; i < id->bNumEndpoints; i++) { 406 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 407 if (ed == NULL) { 408 printf("%s: no endpoint descriptor for %d\n", 409 USBDEVNAME(sc->sc_dev), i); 410 USB_ATTACH_ERROR_RETURN; 411 } 412 413 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 414 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 415 sc->sc_rx_no = ed->bEndpointAddress; 416 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 417 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 418 sc->sc_tx_no = ed->bEndpointAddress; 419 } 420 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 421 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 422 USB_ATTACH_ERROR_RETURN; 423 } 424 425 usb_init_task(&sc->sc_task, ural_task, sc); 426 callout_init(&sc->scan_ch); 427 callout_init(&sc->amrr_ch); 428 429 /* retrieve RT2570 rev. no */ 430 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 431 432 /* retrieve MAC address and various other things from EEPROM */ 433 ural_read_eeprom(sc); 434 435 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 436 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 437 438 ifp->if_softc = sc; 439 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 440 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 441 ifp->if_init = ural_init; 442 ifp->if_ioctl = ural_ioctl; 443 ifp->if_start = ural_start; 444 ifp->if_watchdog = ural_watchdog; 445 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 446 IFQ_SET_READY(&ifp->if_snd); 447 448 ic->ic_ifp = ifp; 449 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 450 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 451 ic->ic_state = IEEE80211_S_INIT; 452 453 /* set device capabilities */ 454 ic->ic_caps = 455 IEEE80211_C_IBSS | /* IBSS mode supported */ 456 IEEE80211_C_MONITOR | /* monitor mode supported */ 457 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 458 IEEE80211_C_TXPMGT | /* tx power management */ 459 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 460 IEEE80211_C_SHSLOT | /* short slot time supported */ 461 IEEE80211_C_WPA; /* 802.11i */ 462 463 if (sc->rf_rev == RAL_RF_5222) { 464 /* set supported .11a rates */ 465 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 466 467 /* set supported .11a channels */ 468 for (i = 36; i <= 64; i += 4) { 469 ic->ic_channels[i].ic_freq = 470 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 471 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 472 } 473 for (i = 100; i <= 140; i += 4) { 474 ic->ic_channels[i].ic_freq = 475 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 476 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 477 } 478 for (i = 149; i <= 161; i += 4) { 479 ic->ic_channels[i].ic_freq = 480 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 481 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 482 } 483 } 484 485 /* set supported .11b and .11g rates */ 486 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 487 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 488 489 /* set supported .11b and .11g channels (1 through 14) */ 490 for (i = 1; i <= 14; i++) { 491 ic->ic_channels[i].ic_freq = 492 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 493 ic->ic_channels[i].ic_flags = 494 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 495 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 496 } 497 498 if_attach(ifp); 499 ieee80211_ifattach(ic); 500 ic->ic_reset = ural_reset; 501 502 /* override state transition machine */ 503 sc->sc_newstate = ic->ic_newstate; 504 ic->ic_newstate = ural_newstate; 505 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 506 507 #if NBPFILTER > 0 508 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 509 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 510 511 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 512 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 513 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 514 515 sc->sc_txtap_len = sizeof sc->sc_txtapu; 516 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 517 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 518 #endif 519 520 ieee80211_announce(ic); 521 522 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 523 USBDEV(sc->sc_dev)); 524 525 USB_ATTACH_SUCCESS_RETURN; 526 } 527 528 USB_DETACH(ural) 529 { 530 USB_DETACH_START(ural, sc); 531 struct ieee80211com *ic = &sc->sc_ic; 532 struct ifnet *ifp = &sc->sc_if; 533 int s; 534 535 s = splusb(); 536 537 ural_stop(ifp, 1); 538 usb_rem_task(sc->sc_udev, &sc->sc_task); 539 callout_stop(&sc->scan_ch); 540 callout_stop(&sc->amrr_ch); 541 542 if (sc->amrr_xfer != NULL) { 543 usbd_free_xfer(sc->amrr_xfer); 544 sc->amrr_xfer = NULL; 545 } 546 547 if (sc->sc_rx_pipeh != NULL) { 548 usbd_abort_pipe(sc->sc_rx_pipeh); 549 usbd_close_pipe(sc->sc_rx_pipeh); 550 } 551 552 if (sc->sc_tx_pipeh != NULL) { 553 usbd_abort_pipe(sc->sc_tx_pipeh); 554 usbd_close_pipe(sc->sc_tx_pipeh); 555 } 556 557 ural_free_rx_list(sc); 558 ural_free_tx_list(sc); 559 560 #if NBPFILTER > 0 561 bpfdetach(ifp); 562 #endif 563 ieee80211_ifdetach(ic); 564 if_detach(ifp); 565 566 splx(s); 567 568 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 569 USBDEV(sc->sc_dev)); 570 571 return 0; 572 } 573 574 Static int 575 ural_alloc_tx_list(struct ural_softc *sc) 576 { 577 struct ural_tx_data *data; 578 int i, error; 579 580 sc->tx_queued = 0; 581 582 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 583 data = &sc->tx_data[i]; 584 585 data->sc = sc; 586 587 data->xfer = usbd_alloc_xfer(sc->sc_udev); 588 if (data->xfer == NULL) { 589 printf("%s: could not allocate tx xfer\n", 590 USBDEVNAME(sc->sc_dev)); 591 error = ENOMEM; 592 goto fail; 593 } 594 595 data->buf = usbd_alloc_buffer(data->xfer, 596 RAL_TX_DESC_SIZE + MCLBYTES); 597 if (data->buf == NULL) { 598 printf("%s: could not allocate tx buffer\n", 599 USBDEVNAME(sc->sc_dev)); 600 error = ENOMEM; 601 goto fail; 602 } 603 } 604 605 return 0; 606 607 fail: ural_free_tx_list(sc); 608 return error; 609 } 610 611 Static void 612 ural_free_tx_list(struct ural_softc *sc) 613 { 614 struct ural_tx_data *data; 615 int i; 616 617 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 618 data = &sc->tx_data[i]; 619 620 if (data->xfer != NULL) { 621 usbd_free_xfer(data->xfer); 622 data->xfer = NULL; 623 } 624 625 if (data->ni != NULL) { 626 ieee80211_free_node(data->ni); 627 data->ni = NULL; 628 } 629 } 630 } 631 632 Static int 633 ural_alloc_rx_list(struct ural_softc *sc) 634 { 635 struct ural_rx_data *data; 636 int i, error; 637 638 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 639 data = &sc->rx_data[i]; 640 641 data->sc = sc; 642 643 data->xfer = usbd_alloc_xfer(sc->sc_udev); 644 if (data->xfer == NULL) { 645 printf("%s: could not allocate rx xfer\n", 646 USBDEVNAME(sc->sc_dev)); 647 error = ENOMEM; 648 goto fail; 649 } 650 651 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 652 printf("%s: could not allocate rx buffer\n", 653 USBDEVNAME(sc->sc_dev)); 654 error = ENOMEM; 655 goto fail; 656 } 657 658 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 659 if (data->m == NULL) { 660 printf("%s: could not allocate rx mbuf\n", 661 USBDEVNAME(sc->sc_dev)); 662 error = ENOMEM; 663 goto fail; 664 } 665 666 MCLGET(data->m, M_DONTWAIT); 667 if (!(data->m->m_flags & M_EXT)) { 668 printf("%s: could not allocate rx mbuf cluster\n", 669 USBDEVNAME(sc->sc_dev)); 670 error = ENOMEM; 671 goto fail; 672 } 673 674 data->buf = mtod(data->m, uint8_t *); 675 } 676 677 return 0; 678 679 fail: ural_free_tx_list(sc); 680 return error; 681 } 682 683 Static void 684 ural_free_rx_list(struct ural_softc *sc) 685 { 686 struct ural_rx_data *data; 687 int i; 688 689 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 690 data = &sc->rx_data[i]; 691 692 if (data->xfer != NULL) { 693 usbd_free_xfer(data->xfer); 694 data->xfer = NULL; 695 } 696 697 if (data->m != NULL) { 698 m_freem(data->m); 699 data->m = NULL; 700 } 701 } 702 } 703 704 Static int 705 ural_media_change(struct ifnet *ifp) 706 { 707 int error; 708 709 error = ieee80211_media_change(ifp); 710 if (error != ENETRESET) 711 return error; 712 713 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 714 ural_init(ifp); 715 716 return 0; 717 } 718 719 /* 720 * This function is called periodically (every 200ms) during scanning to 721 * switch from one channel to another. 722 */ 723 Static void 724 ural_next_scan(void *arg) 725 { 726 struct ural_softc *sc = arg; 727 struct ieee80211com *ic = &sc->sc_ic; 728 729 if (ic->ic_state == IEEE80211_S_SCAN) 730 ieee80211_next_scan(ic); 731 } 732 733 Static void 734 ural_task(void *arg) 735 { 736 struct ural_softc *sc = arg; 737 struct ieee80211com *ic = &sc->sc_ic; 738 enum ieee80211_state ostate; 739 struct ieee80211_node *ni; 740 struct mbuf *m; 741 742 ostate = ic->ic_state; 743 744 switch (sc->sc_state) { 745 case IEEE80211_S_INIT: 746 if (ostate == IEEE80211_S_RUN) { 747 /* abort TSF synchronization */ 748 ural_write(sc, RAL_TXRX_CSR19, 0); 749 750 /* force tx led to stop blinking */ 751 ural_write(sc, RAL_MAC_CSR20, 0); 752 } 753 break; 754 755 case IEEE80211_S_SCAN: 756 ural_set_chan(sc, ic->ic_curchan); 757 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc); 758 break; 759 760 case IEEE80211_S_AUTH: 761 ural_set_chan(sc, ic->ic_curchan); 762 break; 763 764 case IEEE80211_S_ASSOC: 765 ural_set_chan(sc, ic->ic_curchan); 766 break; 767 768 case IEEE80211_S_RUN: 769 ural_set_chan(sc, ic->ic_curchan); 770 771 ni = ic->ic_bss; 772 773 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 774 ural_update_slot(ic->ic_ifp); 775 ural_set_txpreamble(sc); 776 ural_set_basicrates(sc); 777 ural_set_bssid(sc, ni->ni_bssid); 778 } 779 780 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 781 ic->ic_opmode == IEEE80211_M_IBSS) { 782 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 783 if (m == NULL) { 784 printf("%s: could not allocate beacon\n", 785 USBDEVNAME(sc->sc_dev)); 786 return; 787 } 788 789 if (ural_tx_bcn(sc, m, ni) != 0) { 790 m_freem(m); 791 printf("%s: could not send beacon\n", 792 USBDEVNAME(sc->sc_dev)); 793 return; 794 } 795 796 /* beacon is no longer needed */ 797 m_freem(m); 798 } 799 800 /* make tx led blink on tx (controlled by ASIC) */ 801 ural_write(sc, RAL_MAC_CSR20, 1); 802 803 if (ic->ic_opmode != IEEE80211_M_MONITOR) 804 ural_enable_tsf_sync(sc); 805 806 /* enable automatic rate adaptation in STA mode */ 807 if (ic->ic_opmode == IEEE80211_M_STA && 808 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 809 ural_amrr_start(sc, ni); 810 811 break; 812 } 813 814 sc->sc_newstate(ic, sc->sc_state, -1); 815 } 816 817 Static int 818 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 819 { 820 struct ural_softc *sc = ic->ic_ifp->if_softc; 821 822 usb_rem_task(sc->sc_udev, &sc->sc_task); 823 callout_stop(&sc->scan_ch); 824 callout_stop(&sc->amrr_ch); 825 826 /* do it in a process context */ 827 sc->sc_state = nstate; 828 usb_add_task(sc->sc_udev, &sc->sc_task); 829 830 return 0; 831 } 832 833 /* quickly determine if a given rate is CCK or OFDM */ 834 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 835 836 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 837 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 838 839 #define RAL_SIFS 10 /* us */ 840 841 #define RAL_RXTX_TURNAROUND 5 /* us */ 842 843 /* 844 * This function is only used by the Rx radiotap code. 845 */ 846 Static int 847 ural_rxrate(struct ural_rx_desc *desc) 848 { 849 if (le32toh(desc->flags) & RAL_RX_OFDM) { 850 /* reverse function of ural_plcp_signal */ 851 switch (desc->rate) { 852 case 0xb: return 12; 853 case 0xf: return 18; 854 case 0xa: return 24; 855 case 0xe: return 36; 856 case 0x9: return 48; 857 case 0xd: return 72; 858 case 0x8: return 96; 859 case 0xc: return 108; 860 } 861 } else { 862 if (desc->rate == 10) 863 return 2; 864 if (desc->rate == 20) 865 return 4; 866 if (desc->rate == 55) 867 return 11; 868 if (desc->rate == 110) 869 return 22; 870 } 871 return 2; /* should not get there */ 872 } 873 874 Static void 875 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 876 { 877 struct ural_tx_data *data = priv; 878 struct ural_softc *sc = data->sc; 879 struct ifnet *ifp = &sc->sc_if; 880 int s; 881 882 if (status != USBD_NORMAL_COMPLETION) { 883 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 884 return; 885 886 printf("%s: could not transmit buffer: %s\n", 887 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 888 889 if (status == USBD_STALLED) 890 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 891 892 ifp->if_oerrors++; 893 return; 894 } 895 896 s = splnet(); 897 898 m_freem(data->m); 899 data->m = NULL; 900 ieee80211_free_node(data->ni); 901 data->ni = NULL; 902 903 sc->tx_queued--; 904 ifp->if_opackets++; 905 906 DPRINTFN(10, ("tx done\n")); 907 908 sc->sc_tx_timer = 0; 909 ifp->if_flags &= ~IFF_OACTIVE; 910 ural_start(ifp); 911 912 splx(s); 913 } 914 915 Static void 916 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 917 { 918 struct ural_rx_data *data = priv; 919 struct ural_softc *sc = data->sc; 920 struct ieee80211com *ic = &sc->sc_ic; 921 struct ifnet *ifp = &sc->sc_if; 922 struct ural_rx_desc *desc; 923 struct ieee80211_frame *wh; 924 struct ieee80211_node *ni; 925 struct mbuf *mnew, *m; 926 int s, len; 927 928 if (status != USBD_NORMAL_COMPLETION) { 929 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 930 return; 931 932 if (status == USBD_STALLED) 933 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 934 goto skip; 935 } 936 937 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 938 939 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 940 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 941 len)); 942 ifp->if_ierrors++; 943 goto skip; 944 } 945 946 /* rx descriptor is located at the end */ 947 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 948 949 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 950 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 951 /* 952 * This should not happen since we did not request to receive 953 * those frames when we filled RAL_TXRX_CSR2. 954 */ 955 DPRINTFN(5, ("PHY or CRC error\n")); 956 ifp->if_ierrors++; 957 goto skip; 958 } 959 960 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 961 if (mnew == NULL) { 962 ifp->if_ierrors++; 963 goto skip; 964 } 965 966 MCLGET(mnew, M_DONTWAIT); 967 if (!(mnew->m_flags & M_EXT)) { 968 ifp->if_ierrors++; 969 m_freem(mnew); 970 goto skip; 971 } 972 973 m = data->m; 974 data->m = mnew; 975 data->buf = mtod(data->m, uint8_t *); 976 977 /* finalize mbuf */ 978 m->m_pkthdr.rcvif = ifp; 979 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 980 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 981 982 s = splnet(); 983 984 #if NBPFILTER > 0 985 if (sc->sc_drvbpf != NULL) { 986 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 987 988 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 989 tap->wr_rate = ural_rxrate(desc); 990 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 991 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 992 tap->wr_antenna = sc->rx_ant; 993 tap->wr_antsignal = desc->rssi; 994 995 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 996 } 997 #endif 998 999 wh = mtod(m, struct ieee80211_frame *); 1000 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1001 1002 /* send the frame to the 802.11 layer */ 1003 ieee80211_input(ic, m, ni, desc->rssi, 0); 1004 1005 /* node is no longer needed */ 1006 ieee80211_free_node(ni); 1007 1008 splx(s); 1009 1010 DPRINTFN(15, ("rx done\n")); 1011 1012 skip: /* setup a new transfer */ 1013 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1014 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1015 usbd_transfer(xfer); 1016 } 1017 1018 /* 1019 * Return the expected ack rate for a frame transmitted at rate `rate'. 1020 * XXX: this should depend on the destination node basic rate set. 1021 */ 1022 Static int 1023 ural_ack_rate(struct ieee80211com *ic, int rate) 1024 { 1025 switch (rate) { 1026 /* CCK rates */ 1027 case 2: 1028 return 2; 1029 case 4: 1030 case 11: 1031 case 22: 1032 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1033 1034 /* OFDM rates */ 1035 case 12: 1036 case 18: 1037 return 12; 1038 case 24: 1039 case 36: 1040 return 24; 1041 case 48: 1042 case 72: 1043 case 96: 1044 case 108: 1045 return 48; 1046 } 1047 1048 /* default to 1Mbps */ 1049 return 2; 1050 } 1051 1052 /* 1053 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1054 * The function automatically determines the operating mode depending on the 1055 * given rate. `flags' indicates whether short preamble is in use or not. 1056 */ 1057 Static uint16_t 1058 ural_txtime(int len, int rate, uint32_t flags) 1059 { 1060 uint16_t txtime; 1061 1062 if (RAL_RATE_IS_OFDM(rate)) { 1063 /* IEEE Std 802.11a-1999, pp. 37 */ 1064 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1065 txtime = 16 + 4 + 4 * txtime + 6; 1066 } else { 1067 /* IEEE Std 802.11b-1999, pp. 28 */ 1068 txtime = (16 * len + rate - 1) / rate; 1069 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1070 txtime += 72 + 24; 1071 else 1072 txtime += 144 + 48; 1073 } 1074 return txtime; 1075 } 1076 1077 Static uint8_t 1078 ural_plcp_signal(int rate) 1079 { 1080 switch (rate) { 1081 /* CCK rates (returned values are device-dependent) */ 1082 case 2: return 0x0; 1083 case 4: return 0x1; 1084 case 11: return 0x2; 1085 case 22: return 0x3; 1086 1087 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1088 case 12: return 0xb; 1089 case 18: return 0xf; 1090 case 24: return 0xa; 1091 case 36: return 0xe; 1092 case 48: return 0x9; 1093 case 72: return 0xd; 1094 case 96: return 0x8; 1095 case 108: return 0xc; 1096 1097 /* unsupported rates (should not get there) */ 1098 default: return 0xff; 1099 } 1100 } 1101 1102 Static void 1103 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1104 uint32_t flags, int len, int rate) 1105 { 1106 struct ieee80211com *ic = &sc->sc_ic; 1107 uint16_t plcp_length; 1108 int remainder; 1109 1110 desc->flags = htole32(flags); 1111 desc->flags |= htole32(RAL_TX_NEWSEQ); 1112 desc->flags |= htole32(len << 16); 1113 1114 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1115 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1116 1117 /* setup PLCP fields */ 1118 desc->plcp_signal = ural_plcp_signal(rate); 1119 desc->plcp_service = 4; 1120 1121 len += IEEE80211_CRC_LEN; 1122 if (RAL_RATE_IS_OFDM(rate)) { 1123 desc->flags |= htole32(RAL_TX_OFDM); 1124 1125 plcp_length = len & 0xfff; 1126 desc->plcp_length_hi = plcp_length >> 6; 1127 desc->plcp_length_lo = plcp_length & 0x3f; 1128 } else { 1129 plcp_length = (16 * len + rate - 1) / rate; 1130 if (rate == 22) { 1131 remainder = (16 * len) % 22; 1132 if (remainder != 0 && remainder < 7) 1133 desc->plcp_service |= RAL_PLCP_LENGEXT; 1134 } 1135 desc->plcp_length_hi = plcp_length >> 8; 1136 desc->plcp_length_lo = plcp_length & 0xff; 1137 1138 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1139 desc->plcp_signal |= 0x08; 1140 } 1141 1142 desc->iv = 0; 1143 desc->eiv = 0; 1144 } 1145 1146 #define RAL_TX_TIMEOUT 5000 1147 1148 Static int 1149 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1150 { 1151 struct ural_tx_desc *desc; 1152 usbd_xfer_handle xfer; 1153 uint8_t cmd = 0; 1154 usbd_status error; 1155 uint8_t *buf; 1156 int xferlen, rate; 1157 1158 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1159 1160 xfer = usbd_alloc_xfer(sc->sc_udev); 1161 if (xfer == NULL) 1162 return ENOMEM; 1163 1164 /* xfer length needs to be a multiple of two! */ 1165 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1166 1167 buf = usbd_alloc_buffer(xfer, xferlen); 1168 if (buf == NULL) { 1169 usbd_free_xfer(xfer); 1170 return ENOMEM; 1171 } 1172 1173 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1174 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1175 1176 error = usbd_sync_transfer(xfer); 1177 if (error != 0) { 1178 usbd_free_xfer(xfer); 1179 return error; 1180 } 1181 1182 desc = (struct ural_tx_desc *)buf; 1183 1184 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1185 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1186 m0->m_pkthdr.len, rate); 1187 1188 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1189 m0->m_pkthdr.len, rate, xferlen)); 1190 1191 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1192 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1193 1194 error = usbd_sync_transfer(xfer); 1195 usbd_free_xfer(xfer); 1196 1197 return error; 1198 } 1199 1200 Static int 1201 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1202 { 1203 struct ieee80211com *ic = &sc->sc_ic; 1204 struct ural_tx_desc *desc; 1205 struct ural_tx_data *data; 1206 struct ieee80211_frame *wh; 1207 uint32_t flags = 0; 1208 uint16_t dur; 1209 usbd_status error; 1210 int xferlen, rate; 1211 1212 data = &sc->tx_data[0]; 1213 desc = (struct ural_tx_desc *)data->buf; 1214 1215 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1216 1217 data->m = m0; 1218 data->ni = ni; 1219 1220 wh = mtod(m0, struct ieee80211_frame *); 1221 1222 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1223 flags |= RAL_TX_ACK; 1224 1225 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1226 *(uint16_t *)wh->i_dur = htole16(dur); 1227 1228 /* tell hardware to add timestamp for probe responses */ 1229 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1230 IEEE80211_FC0_TYPE_MGT && 1231 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1232 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1233 flags |= RAL_TX_TIMESTAMP; 1234 } 1235 1236 #if NBPFILTER > 0 1237 if (sc->sc_drvbpf != NULL) { 1238 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1239 1240 tap->wt_flags = 0; 1241 tap->wt_rate = rate; 1242 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1243 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1244 tap->wt_antenna = sc->tx_ant; 1245 1246 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1247 } 1248 #endif 1249 1250 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1251 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1252 1253 /* align end on a 2-bytes boundary */ 1254 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1255 1256 /* 1257 * No space left in the last URB to store the extra 2 bytes, force 1258 * sending of another URB. 1259 */ 1260 if ((xferlen % 64) == 0) 1261 xferlen += 2; 1262 1263 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1264 m0->m_pkthdr.len, rate, xferlen)); 1265 1266 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1267 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1268 ural_txeof); 1269 1270 error = usbd_transfer(data->xfer); 1271 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1272 return error; 1273 1274 sc->tx_queued++; 1275 1276 return 0; 1277 } 1278 1279 Static int 1280 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1281 { 1282 struct ieee80211com *ic = &sc->sc_ic; 1283 struct ural_tx_desc *desc; 1284 struct ural_tx_data *data; 1285 struct ieee80211_frame *wh; 1286 struct ieee80211_key *k; 1287 uint32_t flags = 0; 1288 uint16_t dur; 1289 usbd_status error; 1290 int xferlen, rate; 1291 1292 wh = mtod(m0, struct ieee80211_frame *); 1293 1294 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1295 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1296 else 1297 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1298 1299 rate &= IEEE80211_RATE_VAL; 1300 1301 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1302 k = ieee80211_crypto_encap(ic, ni, m0); 1303 if (k == NULL) { 1304 m_freem(m0); 1305 return ENOBUFS; 1306 } 1307 1308 /* packet header may have moved, reset our local pointer */ 1309 wh = mtod(m0, struct ieee80211_frame *); 1310 } 1311 1312 data = &sc->tx_data[0]; 1313 desc = (struct ural_tx_desc *)data->buf; 1314 1315 data->m = m0; 1316 data->ni = ni; 1317 1318 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1319 flags |= RAL_TX_ACK; 1320 flags |= RAL_TX_RETRY(7); 1321 1322 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1323 ic->ic_flags) + RAL_SIFS; 1324 *(uint16_t *)wh->i_dur = htole16(dur); 1325 } 1326 1327 #if NBPFILTER > 0 1328 if (sc->sc_drvbpf != NULL) { 1329 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1330 1331 tap->wt_flags = 0; 1332 tap->wt_rate = rate; 1333 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1334 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1335 tap->wt_antenna = sc->tx_ant; 1336 1337 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1338 } 1339 #endif 1340 1341 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1342 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1343 1344 /* align end on a 2-bytes boundary */ 1345 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1346 1347 /* 1348 * No space left in the last URB to store the extra 2 bytes, force 1349 * sending of another URB. 1350 */ 1351 if ((xferlen % 64) == 0) 1352 xferlen += 2; 1353 1354 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1355 m0->m_pkthdr.len, rate, xferlen)); 1356 1357 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1358 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1359 ural_txeof); 1360 1361 error = usbd_transfer(data->xfer); 1362 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1363 return error; 1364 1365 sc->tx_queued++; 1366 1367 return 0; 1368 } 1369 1370 Static void 1371 ural_start(struct ifnet *ifp) 1372 { 1373 struct ural_softc *sc = ifp->if_softc; 1374 struct ieee80211com *ic = &sc->sc_ic; 1375 struct mbuf *m0; 1376 struct ether_header *eh; 1377 struct ieee80211_node *ni; 1378 1379 for (;;) { 1380 IF_POLL(&ic->ic_mgtq, m0); 1381 if (m0 != NULL) { 1382 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1383 ifp->if_flags |= IFF_OACTIVE; 1384 break; 1385 } 1386 IF_DEQUEUE(&ic->ic_mgtq, m0); 1387 1388 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1389 m0->m_pkthdr.rcvif = NULL; 1390 #if NBPFILTER > 0 1391 if (ic->ic_rawbpf != NULL) 1392 bpf_mtap(ic->ic_rawbpf, m0); 1393 #endif 1394 if (ural_tx_mgt(sc, m0, ni) != 0) 1395 break; 1396 1397 } else { 1398 if (ic->ic_state != IEEE80211_S_RUN) 1399 break; 1400 IFQ_DEQUEUE(&ifp->if_snd, m0); 1401 if (m0 == NULL) 1402 break; 1403 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1404 IF_PREPEND(&ifp->if_snd, m0); 1405 ifp->if_flags |= IFF_OACTIVE; 1406 break; 1407 } 1408 1409 if (m0->m_len < sizeof (struct ether_header) && 1410 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1411 continue; 1412 1413 eh = mtod(m0, struct ether_header *); 1414 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1415 if (ni == NULL) { 1416 m_freem(m0); 1417 continue; 1418 } 1419 #if NBPFILTER > 0 1420 if (ifp->if_bpf != NULL) 1421 bpf_mtap(ifp->if_bpf, m0); 1422 #endif 1423 m0 = ieee80211_encap(ic, m0, ni); 1424 if (m0 == NULL) { 1425 ieee80211_free_node(ni); 1426 continue; 1427 } 1428 #if NBPFILTER > 0 1429 if (ic->ic_rawbpf != NULL) 1430 bpf_mtap(ic->ic_rawbpf, m0); 1431 #endif 1432 if (ural_tx_data(sc, m0, ni) != 0) { 1433 ieee80211_free_node(ni); 1434 ifp->if_oerrors++; 1435 break; 1436 } 1437 } 1438 1439 sc->sc_tx_timer = 5; 1440 ifp->if_timer = 1; 1441 } 1442 } 1443 1444 Static void 1445 ural_watchdog(struct ifnet *ifp) 1446 { 1447 struct ural_softc *sc = ifp->if_softc; 1448 struct ieee80211com *ic = &sc->sc_ic; 1449 1450 ifp->if_timer = 0; 1451 1452 if (sc->sc_tx_timer > 0) { 1453 if (--sc->sc_tx_timer == 0) { 1454 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1455 /*ural_init(sc); XXX needs a process context! */ 1456 ifp->if_oerrors++; 1457 return; 1458 } 1459 ifp->if_timer = 1; 1460 } 1461 1462 ieee80211_watchdog(ic); 1463 } 1464 1465 /* 1466 * This function allows for fast channel switching in monitor mode (used by 1467 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1468 * generate a new beacon frame. 1469 */ 1470 Static int 1471 ural_reset(struct ifnet *ifp) 1472 { 1473 struct ural_softc *sc = ifp->if_softc; 1474 struct ieee80211com *ic = &sc->sc_ic; 1475 1476 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1477 return ENETRESET; 1478 1479 ural_set_chan(sc, ic->ic_curchan); 1480 1481 return 0; 1482 } 1483 1484 Static int 1485 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1486 { 1487 struct ural_softc *sc = ifp->if_softc; 1488 struct ieee80211com *ic = &sc->sc_ic; 1489 int s, error = 0; 1490 1491 s = splnet(); 1492 1493 switch (cmd) { 1494 case SIOCSIFFLAGS: 1495 if (ifp->if_flags & IFF_UP) { 1496 if (ifp->if_flags & IFF_RUNNING) 1497 ural_update_promisc(sc); 1498 else 1499 ural_init(ifp); 1500 } else { 1501 if (ifp->if_flags & IFF_RUNNING) 1502 ural_stop(ifp, 1); 1503 } 1504 break; 1505 1506 default: 1507 error = ieee80211_ioctl(ic, cmd, data); 1508 } 1509 1510 if (error == ENETRESET) { 1511 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1512 (IFF_UP | IFF_RUNNING)) 1513 ural_init(ifp); 1514 error = 0; 1515 } 1516 1517 splx(s); 1518 1519 return error; 1520 } 1521 1522 Static void 1523 ural_set_testmode(struct ural_softc *sc) 1524 { 1525 usb_device_request_t req; 1526 usbd_status error; 1527 1528 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1529 req.bRequest = RAL_VENDOR_REQUEST; 1530 USETW(req.wValue, 4); 1531 USETW(req.wIndex, 1); 1532 USETW(req.wLength, 0); 1533 1534 error = usbd_do_request(sc->sc_udev, &req, NULL); 1535 if (error != 0) { 1536 printf("%s: could not set test mode: %s\n", 1537 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1538 } 1539 } 1540 1541 Static void 1542 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1543 { 1544 usb_device_request_t req; 1545 usbd_status error; 1546 1547 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1548 req.bRequest = RAL_READ_EEPROM; 1549 USETW(req.wValue, 0); 1550 USETW(req.wIndex, addr); 1551 USETW(req.wLength, len); 1552 1553 error = usbd_do_request(sc->sc_udev, &req, buf); 1554 if (error != 0) { 1555 printf("%s: could not read EEPROM: %s\n", 1556 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1557 } 1558 } 1559 1560 Static uint16_t 1561 ural_read(struct ural_softc *sc, uint16_t reg) 1562 { 1563 usb_device_request_t req; 1564 usbd_status error; 1565 uint16_t val; 1566 1567 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1568 req.bRequest = RAL_READ_MAC; 1569 USETW(req.wValue, 0); 1570 USETW(req.wIndex, reg); 1571 USETW(req.wLength, sizeof (uint16_t)); 1572 1573 error = usbd_do_request(sc->sc_udev, &req, &val); 1574 if (error != 0) { 1575 printf("%s: could not read MAC register: %s\n", 1576 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1577 return 0; 1578 } 1579 1580 return le16toh(val); 1581 } 1582 1583 Static void 1584 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1585 { 1586 usb_device_request_t req; 1587 usbd_status error; 1588 1589 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1590 req.bRequest = RAL_READ_MULTI_MAC; 1591 USETW(req.wValue, 0); 1592 USETW(req.wIndex, reg); 1593 USETW(req.wLength, len); 1594 1595 error = usbd_do_request(sc->sc_udev, &req, buf); 1596 if (error != 0) { 1597 printf("%s: could not read MAC register: %s\n", 1598 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1599 } 1600 } 1601 1602 Static void 1603 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1604 { 1605 usb_device_request_t req; 1606 usbd_status error; 1607 1608 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1609 req.bRequest = RAL_WRITE_MAC; 1610 USETW(req.wValue, val); 1611 USETW(req.wIndex, reg); 1612 USETW(req.wLength, 0); 1613 1614 error = usbd_do_request(sc->sc_udev, &req, NULL); 1615 if (error != 0) { 1616 printf("%s: could not write MAC register: %s\n", 1617 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1618 } 1619 } 1620 1621 Static void 1622 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1623 { 1624 usb_device_request_t req; 1625 usbd_status error; 1626 1627 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1628 req.bRequest = RAL_WRITE_MULTI_MAC; 1629 USETW(req.wValue, 0); 1630 USETW(req.wIndex, reg); 1631 USETW(req.wLength, len); 1632 1633 error = usbd_do_request(sc->sc_udev, &req, buf); 1634 if (error != 0) { 1635 printf("%s: could not write MAC register: %s\n", 1636 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1637 } 1638 } 1639 1640 Static void 1641 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1642 { 1643 uint16_t tmp; 1644 int ntries; 1645 1646 for (ntries = 0; ntries < 5; ntries++) { 1647 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1648 break; 1649 } 1650 if (ntries == 5) { 1651 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1652 return; 1653 } 1654 1655 tmp = reg << 8 | val; 1656 ural_write(sc, RAL_PHY_CSR7, tmp); 1657 } 1658 1659 Static uint8_t 1660 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1661 { 1662 uint16_t val; 1663 int ntries; 1664 1665 val = RAL_BBP_WRITE | reg << 8; 1666 ural_write(sc, RAL_PHY_CSR7, val); 1667 1668 for (ntries = 0; ntries < 5; ntries++) { 1669 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1670 break; 1671 } 1672 if (ntries == 5) { 1673 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1674 return 0; 1675 } 1676 1677 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1678 } 1679 1680 Static void 1681 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1682 { 1683 uint32_t tmp; 1684 int ntries; 1685 1686 for (ntries = 0; ntries < 5; ntries++) { 1687 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1688 break; 1689 } 1690 if (ntries == 5) { 1691 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1692 return; 1693 } 1694 1695 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1696 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1697 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1698 1699 /* remember last written value in sc */ 1700 sc->rf_regs[reg] = val; 1701 1702 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1703 } 1704 1705 Static void 1706 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1707 { 1708 struct ieee80211com *ic = &sc->sc_ic; 1709 uint8_t power, tmp; 1710 u_int i, chan; 1711 1712 chan = ieee80211_chan2ieee(ic, c); 1713 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1714 return; 1715 1716 if (IEEE80211_IS_CHAN_2GHZ(c)) 1717 power = min(sc->txpow[chan - 1], 31); 1718 else 1719 power = 31; 1720 1721 /* adjust txpower using ifconfig settings */ 1722 power -= (100 - ic->ic_txpowlimit) / 8; 1723 1724 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1725 1726 switch (sc->rf_rev) { 1727 case RAL_RF_2522: 1728 ural_rf_write(sc, RAL_RF1, 0x00814); 1729 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1730 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1731 break; 1732 1733 case RAL_RF_2523: 1734 ural_rf_write(sc, RAL_RF1, 0x08804); 1735 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1736 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1737 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1738 break; 1739 1740 case RAL_RF_2524: 1741 ural_rf_write(sc, RAL_RF1, 0x0c808); 1742 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1743 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1744 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1745 break; 1746 1747 case RAL_RF_2525: 1748 ural_rf_write(sc, RAL_RF1, 0x08808); 1749 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1750 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1751 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1752 1753 ural_rf_write(sc, RAL_RF1, 0x08808); 1754 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1755 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1756 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1757 break; 1758 1759 case RAL_RF_2525E: 1760 ural_rf_write(sc, RAL_RF1, 0x08808); 1761 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1762 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1763 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1764 break; 1765 1766 case RAL_RF_2526: 1767 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1768 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1769 ural_rf_write(sc, RAL_RF1, 0x08804); 1770 1771 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1772 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1773 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1774 break; 1775 1776 /* dual-band RF */ 1777 case RAL_RF_5222: 1778 for (i = 0; ural_rf5222[i].chan != chan; i++); 1779 1780 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1781 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1782 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1783 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1784 break; 1785 } 1786 1787 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1788 ic->ic_state != IEEE80211_S_SCAN) { 1789 /* set Japan filter bit for channel 14 */ 1790 tmp = ural_bbp_read(sc, 70); 1791 1792 tmp &= ~RAL_JAPAN_FILTER; 1793 if (chan == 14) 1794 tmp |= RAL_JAPAN_FILTER; 1795 1796 ural_bbp_write(sc, 70, tmp); 1797 1798 /* clear CRC errors */ 1799 ural_read(sc, RAL_STA_CSR0); 1800 1801 DELAY(10000); 1802 ural_disable_rf_tune(sc); 1803 } 1804 } 1805 1806 /* 1807 * Disable RF auto-tuning. 1808 */ 1809 Static void 1810 ural_disable_rf_tune(struct ural_softc *sc) 1811 { 1812 uint32_t tmp; 1813 1814 if (sc->rf_rev != RAL_RF_2523) { 1815 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1816 ural_rf_write(sc, RAL_RF1, tmp); 1817 } 1818 1819 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1820 ural_rf_write(sc, RAL_RF3, tmp); 1821 1822 DPRINTFN(2, ("disabling RF autotune\n")); 1823 } 1824 1825 /* 1826 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1827 * synchronization. 1828 */ 1829 Static void 1830 ural_enable_tsf_sync(struct ural_softc *sc) 1831 { 1832 struct ieee80211com *ic = &sc->sc_ic; 1833 uint16_t logcwmin, preload, tmp; 1834 1835 /* first, disable TSF synchronization */ 1836 ural_write(sc, RAL_TXRX_CSR19, 0); 1837 1838 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1839 ural_write(sc, RAL_TXRX_CSR18, tmp); 1840 1841 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1842 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1843 tmp = logcwmin << 12 | preload; 1844 ural_write(sc, RAL_TXRX_CSR20, tmp); 1845 1846 /* finally, enable TSF synchronization */ 1847 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1848 if (ic->ic_opmode == IEEE80211_M_STA) 1849 tmp |= RAL_ENABLE_TSF_SYNC(1); 1850 else 1851 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1852 ural_write(sc, RAL_TXRX_CSR19, tmp); 1853 1854 DPRINTF(("enabling TSF synchronization\n")); 1855 } 1856 1857 Static void 1858 ural_update_slot(struct ifnet *ifp) 1859 { 1860 struct ural_softc *sc = ifp->if_softc; 1861 struct ieee80211com *ic = &sc->sc_ic; 1862 uint16_t slottime, sifs, eifs; 1863 1864 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1865 1866 /* 1867 * These settings may sound a bit inconsistent but this is what the 1868 * reference driver does. 1869 */ 1870 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1871 sifs = 16 - RAL_RXTX_TURNAROUND; 1872 eifs = 364; 1873 } else { 1874 sifs = 10 - RAL_RXTX_TURNAROUND; 1875 eifs = 64; 1876 } 1877 1878 ural_write(sc, RAL_MAC_CSR10, slottime); 1879 ural_write(sc, RAL_MAC_CSR11, sifs); 1880 ural_write(sc, RAL_MAC_CSR12, eifs); 1881 } 1882 1883 Static void 1884 ural_set_txpreamble(struct ural_softc *sc) 1885 { 1886 uint16_t tmp; 1887 1888 tmp = ural_read(sc, RAL_TXRX_CSR10); 1889 1890 tmp &= ~RAL_SHORT_PREAMBLE; 1891 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1892 tmp |= RAL_SHORT_PREAMBLE; 1893 1894 ural_write(sc, RAL_TXRX_CSR10, tmp); 1895 } 1896 1897 Static void 1898 ural_set_basicrates(struct ural_softc *sc) 1899 { 1900 struct ieee80211com *ic = &sc->sc_ic; 1901 1902 /* update basic rate set */ 1903 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1904 /* 11b basic rates: 1, 2Mbps */ 1905 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1906 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1907 /* 11a basic rates: 6, 12, 24Mbps */ 1908 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1909 } else { 1910 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1911 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1912 } 1913 } 1914 1915 Static void 1916 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1917 { 1918 uint16_t tmp; 1919 1920 tmp = bssid[0] | bssid[1] << 8; 1921 ural_write(sc, RAL_MAC_CSR5, tmp); 1922 1923 tmp = bssid[2] | bssid[3] << 8; 1924 ural_write(sc, RAL_MAC_CSR6, tmp); 1925 1926 tmp = bssid[4] | bssid[5] << 8; 1927 ural_write(sc, RAL_MAC_CSR7, tmp); 1928 1929 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1930 } 1931 1932 Static void 1933 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1934 { 1935 uint16_t tmp; 1936 1937 tmp = addr[0] | addr[1] << 8; 1938 ural_write(sc, RAL_MAC_CSR2, tmp); 1939 1940 tmp = addr[2] | addr[3] << 8; 1941 ural_write(sc, RAL_MAC_CSR3, tmp); 1942 1943 tmp = addr[4] | addr[5] << 8; 1944 ural_write(sc, RAL_MAC_CSR4, tmp); 1945 1946 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1947 } 1948 1949 Static void 1950 ural_update_promisc(struct ural_softc *sc) 1951 { 1952 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1953 uint32_t tmp; 1954 1955 tmp = ural_read(sc, RAL_TXRX_CSR2); 1956 1957 tmp &= ~RAL_DROP_NOT_TO_ME; 1958 if (!(ifp->if_flags & IFF_PROMISC)) 1959 tmp |= RAL_DROP_NOT_TO_ME; 1960 1961 ural_write(sc, RAL_TXRX_CSR2, tmp); 1962 1963 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1964 "entering" : "leaving")); 1965 } 1966 1967 Static const char * 1968 ural_get_rf(int rev) 1969 { 1970 switch (rev) { 1971 case RAL_RF_2522: return "RT2522"; 1972 case RAL_RF_2523: return "RT2523"; 1973 case RAL_RF_2524: return "RT2524"; 1974 case RAL_RF_2525: return "RT2525"; 1975 case RAL_RF_2525E: return "RT2525e"; 1976 case RAL_RF_2526: return "RT2526"; 1977 case RAL_RF_5222: return "RT5222"; 1978 default: return "unknown"; 1979 } 1980 } 1981 1982 Static void 1983 ural_read_eeprom(struct ural_softc *sc) 1984 { 1985 struct ieee80211com *ic = &sc->sc_ic; 1986 uint16_t val; 1987 1988 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1989 val = le16toh(val); 1990 sc->rf_rev = (val >> 11) & 0x7; 1991 sc->hw_radio = (val >> 10) & 0x1; 1992 sc->led_mode = (val >> 6) & 0x7; 1993 sc->rx_ant = (val >> 4) & 0x3; 1994 sc->tx_ant = (val >> 2) & 0x3; 1995 sc->nb_ant = val & 0x3; 1996 1997 /* read MAC address */ 1998 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1999 2000 /* read default values for BBP registers */ 2001 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2002 2003 /* read Tx power for all b/g channels */ 2004 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2005 } 2006 2007 Static int 2008 ural_bbp_init(struct ural_softc *sc) 2009 { 2010 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2011 int i, ntries; 2012 2013 /* wait for BBP to be ready */ 2014 for (ntries = 0; ntries < 100; ntries++) { 2015 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2016 break; 2017 DELAY(1000); 2018 } 2019 if (ntries == 100) { 2020 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 2021 return EIO; 2022 } 2023 2024 /* initialize BBP registers to default values */ 2025 for (i = 0; i < N(ural_def_bbp); i++) 2026 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2027 2028 #if 0 2029 /* initialize BBP registers to values stored in EEPROM */ 2030 for (i = 0; i < 16; i++) { 2031 if (sc->bbp_prom[i].reg == 0xff) 2032 continue; 2033 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2034 } 2035 #endif 2036 2037 return 0; 2038 #undef N 2039 } 2040 2041 Static void 2042 ural_set_txantenna(struct ural_softc *sc, int antenna) 2043 { 2044 uint16_t tmp; 2045 uint8_t tx; 2046 2047 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2048 if (antenna == 1) 2049 tx |= RAL_BBP_ANTA; 2050 else if (antenna == 2) 2051 tx |= RAL_BBP_ANTB; 2052 else 2053 tx |= RAL_BBP_DIVERSITY; 2054 2055 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2056 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2057 sc->rf_rev == RAL_RF_5222) 2058 tx |= RAL_BBP_FLIPIQ; 2059 2060 ural_bbp_write(sc, RAL_BBP_TX, tx); 2061 2062 /* update values in PHY_CSR5 and PHY_CSR6 */ 2063 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2064 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2065 2066 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2067 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2068 } 2069 2070 Static void 2071 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2072 { 2073 uint8_t rx; 2074 2075 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2076 if (antenna == 1) 2077 rx |= RAL_BBP_ANTA; 2078 else if (antenna == 2) 2079 rx |= RAL_BBP_ANTB; 2080 else 2081 rx |= RAL_BBP_DIVERSITY; 2082 2083 /* need to force no I/Q flip for RF 2525e and 2526 */ 2084 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2085 rx &= ~RAL_BBP_FLIPIQ; 2086 2087 ural_bbp_write(sc, RAL_BBP_RX, rx); 2088 } 2089 2090 Static int 2091 ural_init(struct ifnet *ifp) 2092 { 2093 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2094 struct ural_softc *sc = ifp->if_softc; 2095 struct ieee80211com *ic = &sc->sc_ic; 2096 struct ieee80211_key *wk; 2097 struct ural_rx_data *data; 2098 uint16_t tmp; 2099 usbd_status error; 2100 int i, ntries; 2101 2102 ural_set_testmode(sc); 2103 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2104 2105 ural_stop(ifp, 0); 2106 2107 /* initialize MAC registers to default values */ 2108 for (i = 0; i < N(ural_def_mac); i++) 2109 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2110 2111 /* wait for BBP and RF to wake up (this can take a long time!) */ 2112 for (ntries = 0; ntries < 100; ntries++) { 2113 tmp = ural_read(sc, RAL_MAC_CSR17); 2114 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2115 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2116 break; 2117 DELAY(1000); 2118 } 2119 if (ntries == 100) { 2120 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2121 USBDEVNAME(sc->sc_dev)); 2122 error = EIO; 2123 goto fail; 2124 } 2125 2126 /* we're ready! */ 2127 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2128 2129 /* set basic rate set (will be updated later) */ 2130 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2131 2132 error = ural_bbp_init(sc); 2133 if (error != 0) 2134 goto fail; 2135 2136 /* set default BSS channel */ 2137 ural_set_chan(sc, ic->ic_curchan); 2138 2139 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2140 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2141 2142 ural_set_txantenna(sc, sc->tx_ant); 2143 ural_set_rxantenna(sc, sc->rx_ant); 2144 2145 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2146 ural_set_macaddr(sc, ic->ic_myaddr); 2147 2148 /* 2149 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2150 */ 2151 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2152 wk = &ic->ic_crypto.cs_nw_keys[i]; 2153 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2154 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2155 } 2156 2157 /* 2158 * Allocate xfer for AMRR statistics requests. 2159 */ 2160 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2161 if (sc->amrr_xfer == NULL) { 2162 printf("%s: could not allocate AMRR xfer\n", 2163 USBDEVNAME(sc->sc_dev)); 2164 goto fail; 2165 } 2166 2167 /* 2168 * Open Tx and Rx USB bulk pipes. 2169 */ 2170 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2171 &sc->sc_tx_pipeh); 2172 if (error != 0) { 2173 printf("%s: could not open Tx pipe: %s\n", 2174 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2175 goto fail; 2176 } 2177 2178 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2179 &sc->sc_rx_pipeh); 2180 if (error != 0) { 2181 printf("%s: could not open Rx pipe: %s\n", 2182 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2183 goto fail; 2184 } 2185 2186 /* 2187 * Allocate Tx and Rx xfer queues. 2188 */ 2189 error = ural_alloc_tx_list(sc); 2190 if (error != 0) { 2191 printf("%s: could not allocate Tx list\n", 2192 USBDEVNAME(sc->sc_dev)); 2193 goto fail; 2194 } 2195 2196 error = ural_alloc_rx_list(sc); 2197 if (error != 0) { 2198 printf("%s: could not allocate Rx list\n", 2199 USBDEVNAME(sc->sc_dev)); 2200 goto fail; 2201 } 2202 2203 /* 2204 * Start up the receive pipe. 2205 */ 2206 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2207 data = &sc->rx_data[i]; 2208 2209 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2210 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2211 usbd_transfer(data->xfer); 2212 } 2213 2214 /* kick Rx */ 2215 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2216 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2217 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2218 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2219 tmp |= RAL_DROP_TODS; 2220 if (!(ifp->if_flags & IFF_PROMISC)) 2221 tmp |= RAL_DROP_NOT_TO_ME; 2222 } 2223 ural_write(sc, RAL_TXRX_CSR2, tmp); 2224 2225 ifp->if_flags &= ~IFF_OACTIVE; 2226 ifp->if_flags |= IFF_RUNNING; 2227 2228 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2229 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2230 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2231 } else 2232 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2233 2234 return 0; 2235 2236 fail: ural_stop(ifp, 1); 2237 return error; 2238 #undef N 2239 } 2240 2241 Static void 2242 ural_stop(struct ifnet *ifp, int disable) 2243 { 2244 struct ural_softc *sc = ifp->if_softc; 2245 struct ieee80211com *ic = &sc->sc_ic; 2246 2247 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2248 2249 sc->sc_tx_timer = 0; 2250 ifp->if_timer = 0; 2251 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2252 2253 /* disable Rx */ 2254 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2255 2256 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2257 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2258 ural_write(sc, RAL_MAC_CSR1, 0); 2259 2260 if (sc->amrr_xfer != NULL) { 2261 usbd_free_xfer(sc->amrr_xfer); 2262 sc->amrr_xfer = NULL; 2263 } 2264 2265 if (sc->sc_rx_pipeh != NULL) { 2266 usbd_abort_pipe(sc->sc_rx_pipeh); 2267 usbd_close_pipe(sc->sc_rx_pipeh); 2268 sc->sc_rx_pipeh = NULL; 2269 } 2270 2271 if (sc->sc_tx_pipeh != NULL) { 2272 usbd_abort_pipe(sc->sc_tx_pipeh); 2273 usbd_close_pipe(sc->sc_tx_pipeh); 2274 sc->sc_tx_pipeh = NULL; 2275 } 2276 2277 ural_free_rx_list(sc); 2278 ural_free_tx_list(sc); 2279 } 2280 2281 int 2282 ural_activate(device_ptr_t self, enum devact act) 2283 { 2284 struct ural_softc *sc = (struct ural_softc *)self; 2285 2286 switch (act) { 2287 case DVACT_ACTIVATE: 2288 return EOPNOTSUPP; 2289 break; 2290 2291 case DVACT_DEACTIVATE: 2292 if_deactivate(&sc->sc_if); 2293 break; 2294 } 2295 2296 return 0; 2297 } 2298 2299 #define URAL_AMRR_MIN_SUCCESS_THRESHOLD 1 2300 #define URAL_AMRR_MAX_SUCCESS_THRESHOLD 10 2301 2302 Static void 2303 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2304 { 2305 struct ural_amrr *amrr = &sc->amrr; 2306 int i; 2307 2308 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2309 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2310 2311 amrr->success = 0; 2312 amrr->recovery = 0; 2313 amrr->txcnt = amrr->retrycnt = 0; 2314 amrr->success_threshold = URAL_AMRR_MIN_SUCCESS_THRESHOLD; 2315 2316 /* set rate to some reasonable initial value */ 2317 for (i = ni->ni_rates.rs_nrates - 1; 2318 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2319 i--); 2320 2321 ni->ni_txrate = i; 2322 2323 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2324 } 2325 2326 Static void 2327 ural_amrr_timeout(void *arg) 2328 { 2329 struct ural_softc *sc = (struct ural_softc *)arg; 2330 usb_device_request_t req; 2331 int s; 2332 2333 s = splusb(); 2334 2335 /* 2336 * Asynchronously read statistic registers (cleared by read). 2337 */ 2338 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2339 req.bRequest = RAL_READ_MULTI_MAC; 2340 USETW(req.wValue, 0); 2341 USETW(req.wIndex, RAL_STA_CSR0); 2342 USETW(req.wLength, sizeof sc->sta); 2343 2344 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2345 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2346 ural_amrr_update); 2347 (void)usbd_transfer(sc->amrr_xfer); 2348 2349 splx(s); 2350 } 2351 2352 Static void 2353 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2354 usbd_status status) 2355 { 2356 struct ural_softc *sc = (struct ural_softc *)priv; 2357 struct ural_amrr *amrr = &sc->amrr; 2358 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2359 2360 if (status != USBD_NORMAL_COMPLETION) { 2361 printf("%s: could not retrieve Tx statistics - " 2362 "cancelling automatic rate control\n", 2363 USBDEVNAME(sc->sc_dev)); 2364 return; 2365 } 2366 2367 /* count TX retry-fail as Tx errors */ 2368 ifp->if_oerrors += sc->sta[9]; 2369 2370 amrr->retrycnt = 2371 sc->sta[7] + /* TX one-retry ok count */ 2372 sc->sta[8] + /* TX more-retry ok count */ 2373 sc->sta[9]; /* TX retry-fail count */ 2374 2375 amrr->txcnt = 2376 amrr->retrycnt + 2377 sc->sta[6]; /* TX no-retry ok count */ 2378 2379 ural_ratectl(amrr, sc->sc_ic.ic_bss); 2380 2381 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2382 } 2383 2384 /*- 2385 * Naive implementation of the Adaptive Multi Rate Retry algorithm: 2386 * "IEEE 802.11 Rate Adaptation: A Practical Approach" 2387 * Mathieu Lacage, Hossein Manshaei, Thierry Turletti 2388 * INRIA Sophia - Projet Planete 2389 * http://www-sop.inria.fr/rapports/sophia/RR-5208.html 2390 * 2391 * This algorithm is particularly well suited for ural since it does not 2392 * require per-frame retry statistics. Note however that since h/w does 2393 * not provide per-frame stats, we can't do per-node rate adaptation and 2394 * thus automatic rate adaptation is only enabled in STA operating mode. 2395 */ 2396 #define is_success(amrr) \ 2397 ((amrr)->retrycnt < (amrr)->txcnt / 10) 2398 #define is_failure(amrr) \ 2399 ((amrr)->retrycnt > (amrr)->txcnt / 3) 2400 #define is_enough(amrr) \ 2401 ((amrr)->txcnt > 10) 2402 #define is_min_rate(ni) \ 2403 ((ni)->ni_txrate == 0) 2404 #define is_max_rate(ni) \ 2405 ((ni)->ni_txrate == (ni)->ni_rates.rs_nrates - 1) 2406 #define increase_rate(ni) \ 2407 ((ni)->ni_txrate++) 2408 #define decrease_rate(ni) \ 2409 ((ni)->ni_txrate--) 2410 #define reset_cnt(amrr) \ 2411 do { (amrr)->txcnt = (amrr)->retrycnt = 0; } while (0) 2412 Static void 2413 ural_ratectl(struct ural_amrr *amrr, struct ieee80211_node *ni) 2414 { 2415 int need_change = 0; 2416 2417 if (is_success(amrr) && is_enough(amrr)) { 2418 amrr->success++; 2419 if (amrr->success >= amrr->success_threshold && 2420 !is_max_rate(ni)) { 2421 amrr->recovery = 1; 2422 amrr->success = 0; 2423 increase_rate(ni); 2424 need_change = 1; 2425 } else { 2426 amrr->recovery = 0; 2427 } 2428 } else if (is_failure(amrr)) { 2429 amrr->success = 0; 2430 if (!is_min_rate(ni)) { 2431 if (amrr->recovery) { 2432 amrr->success_threshold *= 2; 2433 if (amrr->success_threshold > 2434 URAL_AMRR_MAX_SUCCESS_THRESHOLD) 2435 amrr->success_threshold = 2436 URAL_AMRR_MAX_SUCCESS_THRESHOLD; 2437 } else { 2438 amrr->success_threshold = 2439 URAL_AMRR_MIN_SUCCESS_THRESHOLD; 2440 } 2441 decrease_rate(ni); 2442 need_change = 1; 2443 } 2444 amrr->recovery = 0; /* original paper was incorrect */ 2445 } 2446 2447 if (is_enough(amrr) || need_change) 2448 reset_cnt(amrr); 2449 } 2450
Indexes created Fri Oct 03 02:09:57 GMT 2025