if_ural.c revision 1.16
1 /* $NetBSD: if_ural.c,v 1.16 2006/10/31 20:43:31 joerg Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.16 2006/10/31 20:43:31 joerg Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usbdevs.h> 69 70 #include <dev/usb/if_uralreg.h> 71 #include <dev/usb/if_uralvar.h> 72 73 #ifdef USB_DEBUG 74 #define URAL_DEBUG 75 #endif 76 77 #ifdef URAL_DEBUG 78 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 79 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 80 int ural_debug = 0; 81 #else 82 #define DPRINTF(x) 83 #define DPRINTFN(n, x) 84 #endif 85 86 /* various supported device vendors/products */ 87 static const struct usb_devno ural_devs[] = { 88 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 90 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 91 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 93 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 94 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 95 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 96 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 98 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 101 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 106 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 107 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 108 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 109 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 110 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 111 }; 112 113 Static int ural_alloc_tx_list(struct ural_softc *); 114 Static void ural_free_tx_list(struct ural_softc *); 115 Static int ural_alloc_rx_list(struct ural_softc *); 116 Static void ural_free_rx_list(struct ural_softc *); 117 Static int ural_media_change(struct ifnet *); 118 Static void ural_next_scan(void *); 119 Static void ural_task(void *); 120 Static int ural_newstate(struct ieee80211com *, 121 enum ieee80211_state, int); 122 Static int ural_rxrate(struct ural_rx_desc *); 123 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 124 usbd_status); 125 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 126 usbd_status); 127 Static int ural_ack_rate(struct ieee80211com *, int); 128 Static uint16_t ural_txtime(int, int, uint32_t); 129 Static uint8_t ural_plcp_signal(int); 130 Static void ural_setup_tx_desc(struct ural_softc *, 131 struct ural_tx_desc *, uint32_t, int, int); 132 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 133 struct ieee80211_node *); 134 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 135 struct ieee80211_node *); 136 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 137 struct ieee80211_node *); 138 Static void ural_start(struct ifnet *); 139 Static void ural_watchdog(struct ifnet *); 140 Static int ural_reset(struct ifnet *); 141 Static int ural_ioctl(struct ifnet *, u_long, caddr_t); 142 Static void ural_set_testmode(struct ural_softc *); 143 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 144 int); 145 Static uint16_t ural_read(struct ural_softc *, uint16_t); 146 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 147 int); 148 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 149 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 150 int); 151 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 152 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 153 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 154 Static void ural_set_chan(struct ural_softc *, 155 struct ieee80211_channel *); 156 Static void ural_disable_rf_tune(struct ural_softc *); 157 Static void ural_enable_tsf_sync(struct ural_softc *); 158 Static void ural_update_slot(struct ifnet *); 159 Static void ural_set_txpreamble(struct ural_softc *); 160 Static void ural_set_basicrates(struct ural_softc *); 161 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 162 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 163 Static void ural_update_promisc(struct ural_softc *); 164 Static const char *ural_get_rf(int); 165 Static void ural_read_eeprom(struct ural_softc *); 166 Static int ural_bbp_init(struct ural_softc *); 167 Static void ural_set_txantenna(struct ural_softc *, int); 168 Static void ural_set_rxantenna(struct ural_softc *, int); 169 Static int ural_init(struct ifnet *); 170 Static void ural_stop(struct ifnet *, int); 171 Static void ural_amrr_start(struct ural_softc *, 172 struct ieee80211_node *); 173 Static void ural_amrr_timeout(void *); 174 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 175 usbd_status status); 176 Static void ural_ratectl(struct ural_amrr *, 177 struct ieee80211_node *); 178 179 /* 180 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 181 */ 182 static const struct ieee80211_rateset ural_rateset_11a = 183 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 184 185 static const struct ieee80211_rateset ural_rateset_11b = 186 { 4, { 2, 4, 11, 22 } }; 187 188 static const struct ieee80211_rateset ural_rateset_11g = 189 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 190 191 /* 192 * Default values for MAC registers; values taken from the reference driver. 193 */ 194 static const struct { 195 uint16_t reg; 196 uint16_t val; 197 } ural_def_mac[] = { 198 { RAL_TXRX_CSR5, 0x8c8d }, 199 { RAL_TXRX_CSR6, 0x8b8a }, 200 { RAL_TXRX_CSR7, 0x8687 }, 201 { RAL_TXRX_CSR8, 0x0085 }, 202 { RAL_MAC_CSR13, 0x1111 }, 203 { RAL_MAC_CSR14, 0x1e11 }, 204 { RAL_TXRX_CSR21, 0xe78f }, 205 { RAL_MAC_CSR9, 0xff1d }, 206 { RAL_MAC_CSR11, 0x0002 }, 207 { RAL_MAC_CSR22, 0x0053 }, 208 { RAL_MAC_CSR15, 0x0000 }, 209 { RAL_MAC_CSR8, 0x0780 }, 210 { RAL_TXRX_CSR19, 0x0000 }, 211 { RAL_TXRX_CSR18, 0x005a }, 212 { RAL_PHY_CSR2, 0x0000 }, 213 { RAL_TXRX_CSR0, 0x1ec0 }, 214 { RAL_PHY_CSR4, 0x000f } 215 }; 216 217 /* 218 * Default values for BBP registers; values taken from the reference driver. 219 */ 220 static const struct { 221 uint8_t reg; 222 uint8_t val; 223 } ural_def_bbp[] = { 224 { 3, 0x02 }, 225 { 4, 0x19 }, 226 { 14, 0x1c }, 227 { 15, 0x30 }, 228 { 16, 0xac }, 229 { 17, 0x48 }, 230 { 18, 0x18 }, 231 { 19, 0xff }, 232 { 20, 0x1e }, 233 { 21, 0x08 }, 234 { 22, 0x08 }, 235 { 23, 0x08 }, 236 { 24, 0x80 }, 237 { 25, 0x50 }, 238 { 26, 0x08 }, 239 { 27, 0x23 }, 240 { 30, 0x10 }, 241 { 31, 0x2b }, 242 { 32, 0xb9 }, 243 { 34, 0x12 }, 244 { 35, 0x50 }, 245 { 39, 0xc4 }, 246 { 40, 0x02 }, 247 { 41, 0x60 }, 248 { 53, 0x10 }, 249 { 54, 0x18 }, 250 { 56, 0x08 }, 251 { 57, 0x10 }, 252 { 58, 0x08 }, 253 { 61, 0x60 }, 254 { 62, 0x10 }, 255 { 75, 0xff } 256 }; 257 258 /* 259 * Default values for RF register R2 indexed by channel numbers. 260 */ 261 static const uint32_t ural_rf2522_r2[] = { 262 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 263 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 264 }; 265 266 static const uint32_t ural_rf2523_r2[] = { 267 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 268 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 269 }; 270 271 static const uint32_t ural_rf2524_r2[] = { 272 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 273 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 274 }; 275 276 static const uint32_t ural_rf2525_r2[] = { 277 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 278 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 279 }; 280 281 static const uint32_t ural_rf2525_hi_r2[] = { 282 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 283 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 284 }; 285 286 static const uint32_t ural_rf2525e_r2[] = { 287 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 288 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 289 }; 290 291 static const uint32_t ural_rf2526_hi_r2[] = { 292 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 293 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 294 }; 295 296 static const uint32_t ural_rf2526_r2[] = { 297 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 298 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 299 }; 300 301 /* 302 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 303 * values taken from the reference driver. 304 */ 305 static const struct { 306 uint8_t chan; 307 uint32_t r1; 308 uint32_t r2; 309 uint32_t r4; 310 } ural_rf5222[] = { 311 { 1, 0x08808, 0x0044d, 0x00282 }, 312 { 2, 0x08808, 0x0044e, 0x00282 }, 313 { 3, 0x08808, 0x0044f, 0x00282 }, 314 { 4, 0x08808, 0x00460, 0x00282 }, 315 { 5, 0x08808, 0x00461, 0x00282 }, 316 { 6, 0x08808, 0x00462, 0x00282 }, 317 { 7, 0x08808, 0x00463, 0x00282 }, 318 { 8, 0x08808, 0x00464, 0x00282 }, 319 { 9, 0x08808, 0x00465, 0x00282 }, 320 { 10, 0x08808, 0x00466, 0x00282 }, 321 { 11, 0x08808, 0x00467, 0x00282 }, 322 { 12, 0x08808, 0x00468, 0x00282 }, 323 { 13, 0x08808, 0x00469, 0x00282 }, 324 { 14, 0x08808, 0x0046b, 0x00286 }, 325 326 { 36, 0x08804, 0x06225, 0x00287 }, 327 { 40, 0x08804, 0x06226, 0x00287 }, 328 { 44, 0x08804, 0x06227, 0x00287 }, 329 { 48, 0x08804, 0x06228, 0x00287 }, 330 { 52, 0x08804, 0x06229, 0x00287 }, 331 { 56, 0x08804, 0x0622a, 0x00287 }, 332 { 60, 0x08804, 0x0622b, 0x00287 }, 333 { 64, 0x08804, 0x0622c, 0x00287 }, 334 335 { 100, 0x08804, 0x02200, 0x00283 }, 336 { 104, 0x08804, 0x02201, 0x00283 }, 337 { 108, 0x08804, 0x02202, 0x00283 }, 338 { 112, 0x08804, 0x02203, 0x00283 }, 339 { 116, 0x08804, 0x02204, 0x00283 }, 340 { 120, 0x08804, 0x02205, 0x00283 }, 341 { 124, 0x08804, 0x02206, 0x00283 }, 342 { 128, 0x08804, 0x02207, 0x00283 }, 343 { 132, 0x08804, 0x02208, 0x00283 }, 344 { 136, 0x08804, 0x02209, 0x00283 }, 345 { 140, 0x08804, 0x0220a, 0x00283 }, 346 347 { 149, 0x08808, 0x02429, 0x00281 }, 348 { 153, 0x08808, 0x0242b, 0x00281 }, 349 { 157, 0x08808, 0x0242d, 0x00281 }, 350 { 161, 0x08808, 0x0242f, 0x00281 } 351 }; 352 353 USB_DECLARE_DRIVER(ural); 354 355 USB_MATCH(ural) 356 { 357 USB_MATCH_START(ural, uaa); 358 359 if (uaa->iface != NULL) 360 return UMATCH_NONE; 361 362 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 363 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 364 } 365 366 USB_ATTACH(ural) 367 { 368 USB_ATTACH_START(ural, sc, uaa); 369 struct ieee80211com *ic = &sc->sc_ic; 370 struct ifnet *ifp = &sc->sc_if; 371 usb_interface_descriptor_t *id; 372 usb_endpoint_descriptor_t *ed; 373 usbd_status error; 374 char *devinfop; 375 int i; 376 377 sc->sc_udev = uaa->device; 378 379 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 380 USB_ATTACH_SETUP; 381 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 382 usbd_devinfo_free(devinfop); 383 384 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 385 printf("%s: could not set configuration no\n", 386 USBDEVNAME(sc->sc_dev)); 387 USB_ATTACH_ERROR_RETURN; 388 } 389 390 /* get the first interface handle */ 391 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 392 &sc->sc_iface); 393 if (error != 0) { 394 printf("%s: could not get interface handle\n", 395 USBDEVNAME(sc->sc_dev)); 396 USB_ATTACH_ERROR_RETURN; 397 } 398 399 /* 400 * Find endpoints. 401 */ 402 id = usbd_get_interface_descriptor(sc->sc_iface); 403 404 sc->sc_rx_no = sc->sc_tx_no = -1; 405 for (i = 0; i < id->bNumEndpoints; i++) { 406 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 407 if (ed == NULL) { 408 printf("%s: no endpoint descriptor for %d\n", 409 USBDEVNAME(sc->sc_dev), i); 410 USB_ATTACH_ERROR_RETURN; 411 } 412 413 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 414 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 415 sc->sc_rx_no = ed->bEndpointAddress; 416 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 417 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 418 sc->sc_tx_no = ed->bEndpointAddress; 419 } 420 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 421 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 422 USB_ATTACH_ERROR_RETURN; 423 } 424 425 usb_init_task(&sc->sc_task, ural_task, sc); 426 callout_init(&sc->scan_ch); 427 callout_init(&sc->amrr_ch); 428 429 /* retrieve RT2570 rev. no */ 430 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 431 432 /* retrieve MAC address and various other things from EEPROM */ 433 ural_read_eeprom(sc); 434 435 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 436 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 437 438 ifp->if_softc = sc; 439 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 440 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 441 ifp->if_init = ural_init; 442 ifp->if_ioctl = ural_ioctl; 443 ifp->if_start = ural_start; 444 ifp->if_watchdog = ural_watchdog; 445 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 446 IFQ_SET_READY(&ifp->if_snd); 447 448 ic->ic_ifp = ifp; 449 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 450 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 451 ic->ic_state = IEEE80211_S_INIT; 452 453 /* set device capabilities */ 454 ic->ic_caps = 455 IEEE80211_C_IBSS | /* IBSS mode supported */ 456 IEEE80211_C_MONITOR | /* monitor mode supported */ 457 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 458 IEEE80211_C_TXPMGT | /* tx power management */ 459 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 460 IEEE80211_C_SHSLOT | /* short slot time supported */ 461 IEEE80211_C_WPA; /* 802.11i */ 462 463 if (sc->rf_rev == RAL_RF_5222) { 464 /* set supported .11a rates */ 465 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 466 467 /* set supported .11a channels */ 468 for (i = 36; i <= 64; i += 4) { 469 ic->ic_channels[i].ic_freq = 470 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 471 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 472 } 473 for (i = 100; i <= 140; i += 4) { 474 ic->ic_channels[i].ic_freq = 475 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 476 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 477 } 478 for (i = 149; i <= 161; i += 4) { 479 ic->ic_channels[i].ic_freq = 480 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 481 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 482 } 483 } 484 485 /* set supported .11b and .11g rates */ 486 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 487 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 488 489 /* set supported .11b and .11g channels (1 through 14) */ 490 for (i = 1; i <= 14; i++) { 491 ic->ic_channels[i].ic_freq = 492 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 493 ic->ic_channels[i].ic_flags = 494 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 495 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 496 } 497 498 if_attach(ifp); 499 ieee80211_ifattach(ic); 500 ic->ic_reset = ural_reset; 501 502 /* override state transition machine */ 503 sc->sc_newstate = ic->ic_newstate; 504 ic->ic_newstate = ural_newstate; 505 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 506 507 #if NBPFILTER > 0 508 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 509 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 510 511 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 512 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 513 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 514 515 sc->sc_txtap_len = sizeof sc->sc_txtapu; 516 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 517 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 518 #endif 519 520 ieee80211_announce(ic); 521 522 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 523 USBDEV(sc->sc_dev)); 524 525 USB_ATTACH_SUCCESS_RETURN; 526 } 527 528 USB_DETACH(ural) 529 { 530 USB_DETACH_START(ural, sc); 531 struct ieee80211com *ic = &sc->sc_ic; 532 struct ifnet *ifp = &sc->sc_if; 533 int s; 534 535 s = splusb(); 536 537 ural_stop(ifp, 1); 538 usb_rem_task(sc->sc_udev, &sc->sc_task); 539 callout_stop(&sc->scan_ch); 540 callout_stop(&sc->amrr_ch); 541 542 if (sc->amrr_xfer != NULL) { 543 usbd_free_xfer(sc->amrr_xfer); 544 sc->amrr_xfer = NULL; 545 } 546 547 if (sc->sc_rx_pipeh != NULL) { 548 usbd_abort_pipe(sc->sc_rx_pipeh); 549 usbd_close_pipe(sc->sc_rx_pipeh); 550 } 551 552 if (sc->sc_tx_pipeh != NULL) { 553 usbd_abort_pipe(sc->sc_tx_pipeh); 554 usbd_close_pipe(sc->sc_tx_pipeh); 555 } 556 557 ural_free_rx_list(sc); 558 ural_free_tx_list(sc); 559 560 #if NBPFILTER > 0 561 bpfdetach(ifp); 562 #endif 563 ieee80211_ifdetach(ic); 564 if_detach(ifp); 565 566 splx(s); 567 568 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 569 USBDEV(sc->sc_dev)); 570 571 return 0; 572 } 573 574 Static int 575 ural_alloc_tx_list(struct ural_softc *sc) 576 { 577 struct ural_tx_data *data; 578 int i, error; 579 580 sc->tx_queued = 0; 581 582 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 583 data = &sc->tx_data[i]; 584 585 data->sc = sc; 586 587 data->xfer = usbd_alloc_xfer(sc->sc_udev); 588 if (data->xfer == NULL) { 589 printf("%s: could not allocate tx xfer\n", 590 USBDEVNAME(sc->sc_dev)); 591 error = ENOMEM; 592 goto fail; 593 } 594 595 data->buf = usbd_alloc_buffer(data->xfer, 596 RAL_TX_DESC_SIZE + MCLBYTES); 597 if (data->buf == NULL) { 598 printf("%s: could not allocate tx buffer\n", 599 USBDEVNAME(sc->sc_dev)); 600 error = ENOMEM; 601 goto fail; 602 } 603 } 604 605 return 0; 606 607 fail: ural_free_tx_list(sc); 608 return error; 609 } 610 611 Static void 612 ural_free_tx_list(struct ural_softc *sc) 613 { 614 struct ural_tx_data *data; 615 int i; 616 617 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 618 data = &sc->tx_data[i]; 619 620 if (data->xfer != NULL) { 621 usbd_free_xfer(data->xfer); 622 data->xfer = NULL; 623 } 624 625 if (data->ni != NULL) { 626 ieee80211_free_node(data->ni); 627 data->ni = NULL; 628 } 629 } 630 } 631 632 Static int 633 ural_alloc_rx_list(struct ural_softc *sc) 634 { 635 struct ural_rx_data *data; 636 int i, error; 637 638 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 639 data = &sc->rx_data[i]; 640 641 data->sc = sc; 642 643 data->xfer = usbd_alloc_xfer(sc->sc_udev); 644 if (data->xfer == NULL) { 645 printf("%s: could not allocate rx xfer\n", 646 USBDEVNAME(sc->sc_dev)); 647 error = ENOMEM; 648 goto fail; 649 } 650 651 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 652 printf("%s: could not allocate rx buffer\n", 653 USBDEVNAME(sc->sc_dev)); 654 error = ENOMEM; 655 goto fail; 656 } 657 658 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 659 if (data->m == NULL) { 660 printf("%s: could not allocate rx mbuf\n", 661 USBDEVNAME(sc->sc_dev)); 662 error = ENOMEM; 663 goto fail; 664 } 665 666 MCLGET(data->m, M_DONTWAIT); 667 if (!(data->m->m_flags & M_EXT)) { 668 printf("%s: could not allocate rx mbuf cluster\n", 669 USBDEVNAME(sc->sc_dev)); 670 error = ENOMEM; 671 goto fail; 672 } 673 674 data->buf = mtod(data->m, uint8_t *); 675 } 676 677 return 0; 678 679 fail: ural_free_tx_list(sc); 680 return error; 681 } 682 683 Static void 684 ural_free_rx_list(struct ural_softc *sc) 685 { 686 struct ural_rx_data *data; 687 int i; 688 689 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 690 data = &sc->rx_data[i]; 691 692 if (data->xfer != NULL) { 693 usbd_free_xfer(data->xfer); 694 data->xfer = NULL; 695 } 696 697 if (data->m != NULL) { 698 m_freem(data->m); 699 data->m = NULL; 700 } 701 } 702 } 703 704 Static int 705 ural_media_change(struct ifnet *ifp) 706 { 707 int error; 708 709 error = ieee80211_media_change(ifp); 710 if (error != ENETRESET) 711 return error; 712 713 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 714 ural_init(ifp); 715 716 return 0; 717 } 718 719 /* 720 * This function is called periodically (every 200ms) during scanning to 721 * switch from one channel to another. 722 */ 723 Static void 724 ural_next_scan(void *arg) 725 { 726 struct ural_softc *sc = arg; 727 struct ieee80211com *ic = &sc->sc_ic; 728 729 if (ic->ic_state == IEEE80211_S_SCAN) 730 ieee80211_next_scan(ic); 731 } 732 733 Static void 734 ural_task(void *arg) 735 { 736 struct ural_softc *sc = arg; 737 struct ieee80211com *ic = &sc->sc_ic; 738 enum ieee80211_state ostate; 739 struct ieee80211_node *ni; 740 struct mbuf *m; 741 742 ostate = ic->ic_state; 743 744 switch (sc->sc_state) { 745 case IEEE80211_S_INIT: 746 if (ostate == IEEE80211_S_RUN) { 747 /* abort TSF synchronization */ 748 ural_write(sc, RAL_TXRX_CSR19, 0); 749 750 /* force tx led to stop blinking */ 751 ural_write(sc, RAL_MAC_CSR20, 0); 752 } 753 break; 754 755 case IEEE80211_S_SCAN: 756 ural_set_chan(sc, ic->ic_curchan); 757 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc); 758 break; 759 760 case IEEE80211_S_AUTH: 761 ural_set_chan(sc, ic->ic_curchan); 762 break; 763 764 case IEEE80211_S_ASSOC: 765 ural_set_chan(sc, ic->ic_curchan); 766 break; 767 768 case IEEE80211_S_RUN: 769 ural_set_chan(sc, ic->ic_curchan); 770 771 ni = ic->ic_bss; 772 773 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 774 ural_update_slot(ic->ic_ifp); 775 ural_set_txpreamble(sc); 776 ural_set_basicrates(sc); 777 ural_set_bssid(sc, ni->ni_bssid); 778 } 779 780 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 781 ic->ic_opmode == IEEE80211_M_IBSS) { 782 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 783 if (m == NULL) { 784 printf("%s: could not allocate beacon\n", 785 USBDEVNAME(sc->sc_dev)); 786 return; 787 } 788 789 if (ural_tx_bcn(sc, m, ni) != 0) { 790 m_freem(m); 791 printf("%s: could not send beacon\n", 792 USBDEVNAME(sc->sc_dev)); 793 return; 794 } 795 796 /* beacon is no longer needed */ 797 m_freem(m); 798 } 799 800 /* make tx led blink on tx (controlled by ASIC) */ 801 ural_write(sc, RAL_MAC_CSR20, 1); 802 803 if (ic->ic_opmode != IEEE80211_M_MONITOR) 804 ural_enable_tsf_sync(sc); 805 806 /* enable automatic rate adaptation in STA mode */ 807 if (ic->ic_opmode == IEEE80211_M_STA && 808 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 809 ural_amrr_start(sc, ni); 810 811 break; 812 } 813 814 sc->sc_newstate(ic, sc->sc_state, -1); 815 } 816 817 Static int 818 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 819 int arg __unused) 820 { 821 struct ural_softc *sc = ic->ic_ifp->if_softc; 822 823 usb_rem_task(sc->sc_udev, &sc->sc_task); 824 callout_stop(&sc->scan_ch); 825 callout_stop(&sc->amrr_ch); 826 827 /* do it in a process context */ 828 sc->sc_state = nstate; 829 usb_add_task(sc->sc_udev, &sc->sc_task); 830 831 return 0; 832 } 833 834 /* quickly determine if a given rate is CCK or OFDM */ 835 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 836 837 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 838 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 839 840 #define RAL_SIFS 10 /* us */ 841 842 #define RAL_RXTX_TURNAROUND 5 /* us */ 843 844 /* 845 * This function is only used by the Rx radiotap code. 846 */ 847 Static int 848 ural_rxrate(struct ural_rx_desc *desc) 849 { 850 if (le32toh(desc->flags) & RAL_RX_OFDM) { 851 /* reverse function of ural_plcp_signal */ 852 switch (desc->rate) { 853 case 0xb: return 12; 854 case 0xf: return 18; 855 case 0xa: return 24; 856 case 0xe: return 36; 857 case 0x9: return 48; 858 case 0xd: return 72; 859 case 0x8: return 96; 860 case 0xc: return 108; 861 } 862 } else { 863 if (desc->rate == 10) 864 return 2; 865 if (desc->rate == 20) 866 return 4; 867 if (desc->rate == 55) 868 return 11; 869 if (desc->rate == 110) 870 return 22; 871 } 872 return 2; /* should not get there */ 873 } 874 875 Static void 876 ural_txeof(usbd_xfer_handle xfer __unused, usbd_private_handle priv, 877 usbd_status status) 878 { 879 struct ural_tx_data *data = priv; 880 struct ural_softc *sc = data->sc; 881 struct ifnet *ifp = &sc->sc_if; 882 int s; 883 884 if (status != USBD_NORMAL_COMPLETION) { 885 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 886 return; 887 888 printf("%s: could not transmit buffer: %s\n", 889 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 890 891 if (status == USBD_STALLED) 892 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 893 894 ifp->if_oerrors++; 895 return; 896 } 897 898 s = splnet(); 899 900 m_freem(data->m); 901 data->m = NULL; 902 ieee80211_free_node(data->ni); 903 data->ni = NULL; 904 905 sc->tx_queued--; 906 ifp->if_opackets++; 907 908 DPRINTFN(10, ("tx done\n")); 909 910 sc->sc_tx_timer = 0; 911 ifp->if_flags &= ~IFF_OACTIVE; 912 ural_start(ifp); 913 914 splx(s); 915 } 916 917 Static void 918 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 919 { 920 struct ural_rx_data *data = priv; 921 struct ural_softc *sc = data->sc; 922 struct ieee80211com *ic = &sc->sc_ic; 923 struct ifnet *ifp = &sc->sc_if; 924 struct ural_rx_desc *desc; 925 struct ieee80211_frame *wh; 926 struct ieee80211_node *ni; 927 struct mbuf *mnew, *m; 928 int s, len; 929 930 if (status != USBD_NORMAL_COMPLETION) { 931 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 932 return; 933 934 if (status == USBD_STALLED) 935 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 936 goto skip; 937 } 938 939 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 940 941 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 942 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 943 len)); 944 ifp->if_ierrors++; 945 goto skip; 946 } 947 948 /* rx descriptor is located at the end */ 949 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 950 951 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 952 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 953 /* 954 * This should not happen since we did not request to receive 955 * those frames when we filled RAL_TXRX_CSR2. 956 */ 957 DPRINTFN(5, ("PHY or CRC error\n")); 958 ifp->if_ierrors++; 959 goto skip; 960 } 961 962 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 963 if (mnew == NULL) { 964 ifp->if_ierrors++; 965 goto skip; 966 } 967 968 MCLGET(mnew, M_DONTWAIT); 969 if (!(mnew->m_flags & M_EXT)) { 970 ifp->if_ierrors++; 971 m_freem(mnew); 972 goto skip; 973 } 974 975 m = data->m; 976 data->m = mnew; 977 data->buf = mtod(data->m, uint8_t *); 978 979 /* finalize mbuf */ 980 m->m_pkthdr.rcvif = ifp; 981 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 982 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 983 984 s = splnet(); 985 986 #if NBPFILTER > 0 987 if (sc->sc_drvbpf != NULL) { 988 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 989 990 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 991 tap->wr_rate = ural_rxrate(desc); 992 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 993 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 994 tap->wr_antenna = sc->rx_ant; 995 tap->wr_antsignal = desc->rssi; 996 997 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 998 } 999 #endif 1000 1001 wh = mtod(m, struct ieee80211_frame *); 1002 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1003 1004 /* send the frame to the 802.11 layer */ 1005 ieee80211_input(ic, m, ni, desc->rssi, 0); 1006 1007 /* node is no longer needed */ 1008 ieee80211_free_node(ni); 1009 1010 splx(s); 1011 1012 DPRINTFN(15, ("rx done\n")); 1013 1014 skip: /* setup a new transfer */ 1015 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1016 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1017 usbd_transfer(xfer); 1018 } 1019 1020 /* 1021 * Return the expected ack rate for a frame transmitted at rate `rate'. 1022 * XXX: this should depend on the destination node basic rate set. 1023 */ 1024 Static int 1025 ural_ack_rate(struct ieee80211com *ic, int rate) 1026 { 1027 switch (rate) { 1028 /* CCK rates */ 1029 case 2: 1030 return 2; 1031 case 4: 1032 case 11: 1033 case 22: 1034 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1035 1036 /* OFDM rates */ 1037 case 12: 1038 case 18: 1039 return 12; 1040 case 24: 1041 case 36: 1042 return 24; 1043 case 48: 1044 case 72: 1045 case 96: 1046 case 108: 1047 return 48; 1048 } 1049 1050 /* default to 1Mbps */ 1051 return 2; 1052 } 1053 1054 /* 1055 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1056 * The function automatically determines the operating mode depending on the 1057 * given rate. `flags' indicates whether short preamble is in use or not. 1058 */ 1059 Static uint16_t 1060 ural_txtime(int len, int rate, uint32_t flags) 1061 { 1062 uint16_t txtime; 1063 1064 if (RAL_RATE_IS_OFDM(rate)) { 1065 /* IEEE Std 802.11a-1999, pp. 37 */ 1066 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1067 txtime = 16 + 4 + 4 * txtime + 6; 1068 } else { 1069 /* IEEE Std 802.11b-1999, pp. 28 */ 1070 txtime = (16 * len + rate - 1) / rate; 1071 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1072 txtime += 72 + 24; 1073 else 1074 txtime += 144 + 48; 1075 } 1076 return txtime; 1077 } 1078 1079 Static uint8_t 1080 ural_plcp_signal(int rate) 1081 { 1082 switch (rate) { 1083 /* CCK rates (returned values are device-dependent) */ 1084 case 2: return 0x0; 1085 case 4: return 0x1; 1086 case 11: return 0x2; 1087 case 22: return 0x3; 1088 1089 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1090 case 12: return 0xb; 1091 case 18: return 0xf; 1092 case 24: return 0xa; 1093 case 36: return 0xe; 1094 case 48: return 0x9; 1095 case 72: return 0xd; 1096 case 96: return 0x8; 1097 case 108: return 0xc; 1098 1099 /* unsupported rates (should not get there) */ 1100 default: return 0xff; 1101 } 1102 } 1103 1104 Static void 1105 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1106 uint32_t flags, int len, int rate) 1107 { 1108 struct ieee80211com *ic = &sc->sc_ic; 1109 uint16_t plcp_length; 1110 int remainder; 1111 1112 desc->flags = htole32(flags); 1113 desc->flags |= htole32(RAL_TX_NEWSEQ); 1114 desc->flags |= htole32(len << 16); 1115 1116 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1117 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1118 1119 /* setup PLCP fields */ 1120 desc->plcp_signal = ural_plcp_signal(rate); 1121 desc->plcp_service = 4; 1122 1123 len += IEEE80211_CRC_LEN; 1124 if (RAL_RATE_IS_OFDM(rate)) { 1125 desc->flags |= htole32(RAL_TX_OFDM); 1126 1127 plcp_length = len & 0xfff; 1128 desc->plcp_length_hi = plcp_length >> 6; 1129 desc->plcp_length_lo = plcp_length & 0x3f; 1130 } else { 1131 plcp_length = (16 * len + rate - 1) / rate; 1132 if (rate == 22) { 1133 remainder = (16 * len) % 22; 1134 if (remainder != 0 && remainder < 7) 1135 desc->plcp_service |= RAL_PLCP_LENGEXT; 1136 } 1137 desc->plcp_length_hi = plcp_length >> 8; 1138 desc->plcp_length_lo = plcp_length & 0xff; 1139 1140 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1141 desc->plcp_signal |= 0x08; 1142 } 1143 1144 desc->iv = 0; 1145 desc->eiv = 0; 1146 } 1147 1148 #define RAL_TX_TIMEOUT 5000 1149 1150 Static int 1151 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1152 { 1153 struct ural_tx_desc *desc; 1154 usbd_xfer_handle xfer; 1155 uint8_t cmd = 0; 1156 usbd_status error; 1157 uint8_t *buf; 1158 int xferlen, rate; 1159 1160 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1161 1162 xfer = usbd_alloc_xfer(sc->sc_udev); 1163 if (xfer == NULL) 1164 return ENOMEM; 1165 1166 /* xfer length needs to be a multiple of two! */ 1167 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1168 1169 buf = usbd_alloc_buffer(xfer, xferlen); 1170 if (buf == NULL) { 1171 usbd_free_xfer(xfer); 1172 return ENOMEM; 1173 } 1174 1175 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1176 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1177 1178 error = usbd_sync_transfer(xfer); 1179 if (error != 0) { 1180 usbd_free_xfer(xfer); 1181 return error; 1182 } 1183 1184 desc = (struct ural_tx_desc *)buf; 1185 1186 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1187 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1188 m0->m_pkthdr.len, rate); 1189 1190 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1191 m0->m_pkthdr.len, rate, xferlen)); 1192 1193 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1194 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1195 1196 error = usbd_sync_transfer(xfer); 1197 usbd_free_xfer(xfer); 1198 1199 return error; 1200 } 1201 1202 Static int 1203 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1204 { 1205 struct ieee80211com *ic = &sc->sc_ic; 1206 struct ural_tx_desc *desc; 1207 struct ural_tx_data *data; 1208 struct ieee80211_frame *wh; 1209 uint32_t flags = 0; 1210 uint16_t dur; 1211 usbd_status error; 1212 int xferlen, rate; 1213 1214 data = &sc->tx_data[0]; 1215 desc = (struct ural_tx_desc *)data->buf; 1216 1217 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1218 1219 data->m = m0; 1220 data->ni = ni; 1221 1222 wh = mtod(m0, struct ieee80211_frame *); 1223 1224 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1225 flags |= RAL_TX_ACK; 1226 1227 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1228 *(uint16_t *)wh->i_dur = htole16(dur); 1229 1230 /* tell hardware to add timestamp for probe responses */ 1231 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1232 IEEE80211_FC0_TYPE_MGT && 1233 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1234 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1235 flags |= RAL_TX_TIMESTAMP; 1236 } 1237 1238 #if NBPFILTER > 0 1239 if (sc->sc_drvbpf != NULL) { 1240 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1241 1242 tap->wt_flags = 0; 1243 tap->wt_rate = rate; 1244 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1245 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1246 tap->wt_antenna = sc->tx_ant; 1247 1248 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1249 } 1250 #endif 1251 1252 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1253 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1254 1255 /* align end on a 2-bytes boundary */ 1256 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1257 1258 /* 1259 * No space left in the last URB to store the extra 2 bytes, force 1260 * sending of another URB. 1261 */ 1262 if ((xferlen % 64) == 0) 1263 xferlen += 2; 1264 1265 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1266 m0->m_pkthdr.len, rate, xferlen)); 1267 1268 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1269 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1270 ural_txeof); 1271 1272 error = usbd_transfer(data->xfer); 1273 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1274 m_freem(m0); 1275 return error; 1276 } 1277 1278 sc->tx_queued++; 1279 1280 return 0; 1281 } 1282 1283 Static int 1284 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1285 { 1286 struct ieee80211com *ic = &sc->sc_ic; 1287 struct ural_tx_desc *desc; 1288 struct ural_tx_data *data; 1289 struct ieee80211_frame *wh; 1290 struct ieee80211_key *k; 1291 uint32_t flags = 0; 1292 uint16_t dur; 1293 usbd_status error; 1294 int xferlen, rate; 1295 1296 wh = mtod(m0, struct ieee80211_frame *); 1297 1298 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1299 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1300 else 1301 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1302 1303 rate &= IEEE80211_RATE_VAL; 1304 1305 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1306 k = ieee80211_crypto_encap(ic, ni, m0); 1307 if (k == NULL) { 1308 m_freem(m0); 1309 return ENOBUFS; 1310 } 1311 1312 /* packet header may have moved, reset our local pointer */ 1313 wh = mtod(m0, struct ieee80211_frame *); 1314 } 1315 1316 data = &sc->tx_data[0]; 1317 desc = (struct ural_tx_desc *)data->buf; 1318 1319 data->m = m0; 1320 data->ni = ni; 1321 1322 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1323 flags |= RAL_TX_ACK; 1324 flags |= RAL_TX_RETRY(7); 1325 1326 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1327 ic->ic_flags) + RAL_SIFS; 1328 *(uint16_t *)wh->i_dur = htole16(dur); 1329 } 1330 1331 #if NBPFILTER > 0 1332 if (sc->sc_drvbpf != NULL) { 1333 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1334 1335 tap->wt_flags = 0; 1336 tap->wt_rate = rate; 1337 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1338 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1339 tap->wt_antenna = sc->tx_ant; 1340 1341 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1342 } 1343 #endif 1344 1345 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1346 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1347 1348 /* align end on a 2-bytes boundary */ 1349 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1350 1351 /* 1352 * No space left in the last URB to store the extra 2 bytes, force 1353 * sending of another URB. 1354 */ 1355 if ((xferlen % 64) == 0) 1356 xferlen += 2; 1357 1358 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1359 m0->m_pkthdr.len, rate, xferlen)); 1360 1361 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1362 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1363 ural_txeof); 1364 1365 error = usbd_transfer(data->xfer); 1366 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1367 return error; 1368 1369 sc->tx_queued++; 1370 1371 return 0; 1372 } 1373 1374 Static void 1375 ural_start(struct ifnet *ifp) 1376 { 1377 struct ural_softc *sc = ifp->if_softc; 1378 struct ieee80211com *ic = &sc->sc_ic; 1379 struct mbuf *m0; 1380 struct ether_header *eh; 1381 struct ieee80211_node *ni; 1382 1383 for (;;) { 1384 IF_POLL(&ic->ic_mgtq, m0); 1385 if (m0 != NULL) { 1386 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1387 ifp->if_flags |= IFF_OACTIVE; 1388 break; 1389 } 1390 IF_DEQUEUE(&ic->ic_mgtq, m0); 1391 1392 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1393 m0->m_pkthdr.rcvif = NULL; 1394 #if NBPFILTER > 0 1395 if (ic->ic_rawbpf != NULL) 1396 bpf_mtap(ic->ic_rawbpf, m0); 1397 #endif 1398 if (ural_tx_mgt(sc, m0, ni) != 0) 1399 break; 1400 1401 } else { 1402 if (ic->ic_state != IEEE80211_S_RUN) 1403 break; 1404 IFQ_DEQUEUE(&ifp->if_snd, m0); 1405 if (m0 == NULL) 1406 break; 1407 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1408 IF_PREPEND(&ifp->if_snd, m0); 1409 ifp->if_flags |= IFF_OACTIVE; 1410 break; 1411 } 1412 1413 if (m0->m_len < sizeof (struct ether_header) && 1414 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1415 continue; 1416 1417 eh = mtod(m0, struct ether_header *); 1418 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1419 if (ni == NULL) { 1420 m_freem(m0); 1421 continue; 1422 } 1423 #if NBPFILTER > 0 1424 if (ifp->if_bpf != NULL) 1425 bpf_mtap(ifp->if_bpf, m0); 1426 #endif 1427 m0 = ieee80211_encap(ic, m0, ni); 1428 if (m0 == NULL) { 1429 ieee80211_free_node(ni); 1430 continue; 1431 } 1432 #if NBPFILTER > 0 1433 if (ic->ic_rawbpf != NULL) 1434 bpf_mtap(ic->ic_rawbpf, m0); 1435 #endif 1436 if (ural_tx_data(sc, m0, ni) != 0) { 1437 ieee80211_free_node(ni); 1438 ifp->if_oerrors++; 1439 break; 1440 } 1441 } 1442 1443 sc->sc_tx_timer = 5; 1444 ifp->if_timer = 1; 1445 } 1446 } 1447 1448 Static void 1449 ural_watchdog(struct ifnet *ifp) 1450 { 1451 struct ural_softc *sc = ifp->if_softc; 1452 struct ieee80211com *ic = &sc->sc_ic; 1453 1454 ifp->if_timer = 0; 1455 1456 if (sc->sc_tx_timer > 0) { 1457 if (--sc->sc_tx_timer == 0) { 1458 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1459 /*ural_init(sc); XXX needs a process context! */ 1460 ifp->if_oerrors++; 1461 return; 1462 } 1463 ifp->if_timer = 1; 1464 } 1465 1466 ieee80211_watchdog(ic); 1467 } 1468 1469 /* 1470 * This function allows for fast channel switching in monitor mode (used by 1471 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1472 * generate a new beacon frame. 1473 */ 1474 Static int 1475 ural_reset(struct ifnet *ifp) 1476 { 1477 struct ural_softc *sc = ifp->if_softc; 1478 struct ieee80211com *ic = &sc->sc_ic; 1479 1480 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1481 return ENETRESET; 1482 1483 ural_set_chan(sc, ic->ic_curchan); 1484 1485 return 0; 1486 } 1487 1488 Static int 1489 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1490 { 1491 struct ural_softc *sc = ifp->if_softc; 1492 struct ieee80211com *ic = &sc->sc_ic; 1493 int s, error = 0; 1494 1495 s = splnet(); 1496 1497 switch (cmd) { 1498 case SIOCSIFFLAGS: 1499 if (ifp->if_flags & IFF_UP) { 1500 if (ifp->if_flags & IFF_RUNNING) 1501 ural_update_promisc(sc); 1502 else 1503 ural_init(ifp); 1504 } else { 1505 if (ifp->if_flags & IFF_RUNNING) 1506 ural_stop(ifp, 1); 1507 } 1508 break; 1509 1510 default: 1511 error = ieee80211_ioctl(ic, cmd, data); 1512 } 1513 1514 if (error == ENETRESET) { 1515 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1516 (IFF_UP | IFF_RUNNING)) 1517 ural_init(ifp); 1518 error = 0; 1519 } 1520 1521 splx(s); 1522 1523 return error; 1524 } 1525 1526 Static void 1527 ural_set_testmode(struct ural_softc *sc) 1528 { 1529 usb_device_request_t req; 1530 usbd_status error; 1531 1532 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1533 req.bRequest = RAL_VENDOR_REQUEST; 1534 USETW(req.wValue, 4); 1535 USETW(req.wIndex, 1); 1536 USETW(req.wLength, 0); 1537 1538 error = usbd_do_request(sc->sc_udev, &req, NULL); 1539 if (error != 0) { 1540 printf("%s: could not set test mode: %s\n", 1541 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1542 } 1543 } 1544 1545 Static void 1546 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1547 { 1548 usb_device_request_t req; 1549 usbd_status error; 1550 1551 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1552 req.bRequest = RAL_READ_EEPROM; 1553 USETW(req.wValue, 0); 1554 USETW(req.wIndex, addr); 1555 USETW(req.wLength, len); 1556 1557 error = usbd_do_request(sc->sc_udev, &req, buf); 1558 if (error != 0) { 1559 printf("%s: could not read EEPROM: %s\n", 1560 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1561 } 1562 } 1563 1564 Static uint16_t 1565 ural_read(struct ural_softc *sc, uint16_t reg) 1566 { 1567 usb_device_request_t req; 1568 usbd_status error; 1569 uint16_t val; 1570 1571 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1572 req.bRequest = RAL_READ_MAC; 1573 USETW(req.wValue, 0); 1574 USETW(req.wIndex, reg); 1575 USETW(req.wLength, sizeof (uint16_t)); 1576 1577 error = usbd_do_request(sc->sc_udev, &req, &val); 1578 if (error != 0) { 1579 printf("%s: could not read MAC register: %s\n", 1580 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1581 return 0; 1582 } 1583 1584 return le16toh(val); 1585 } 1586 1587 Static void 1588 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1589 { 1590 usb_device_request_t req; 1591 usbd_status error; 1592 1593 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1594 req.bRequest = RAL_READ_MULTI_MAC; 1595 USETW(req.wValue, 0); 1596 USETW(req.wIndex, reg); 1597 USETW(req.wLength, len); 1598 1599 error = usbd_do_request(sc->sc_udev, &req, buf); 1600 if (error != 0) { 1601 printf("%s: could not read MAC register: %s\n", 1602 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1603 } 1604 } 1605 1606 Static void 1607 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1608 { 1609 usb_device_request_t req; 1610 usbd_status error; 1611 1612 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1613 req.bRequest = RAL_WRITE_MAC; 1614 USETW(req.wValue, val); 1615 USETW(req.wIndex, reg); 1616 USETW(req.wLength, 0); 1617 1618 error = usbd_do_request(sc->sc_udev, &req, NULL); 1619 if (error != 0) { 1620 printf("%s: could not write MAC register: %s\n", 1621 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1622 } 1623 } 1624 1625 Static void 1626 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1627 { 1628 usb_device_request_t req; 1629 usbd_status error; 1630 1631 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1632 req.bRequest = RAL_WRITE_MULTI_MAC; 1633 USETW(req.wValue, 0); 1634 USETW(req.wIndex, reg); 1635 USETW(req.wLength, len); 1636 1637 error = usbd_do_request(sc->sc_udev, &req, buf); 1638 if (error != 0) { 1639 printf("%s: could not write MAC register: %s\n", 1640 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1641 } 1642 } 1643 1644 Static void 1645 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1646 { 1647 uint16_t tmp; 1648 int ntries; 1649 1650 for (ntries = 0; ntries < 5; ntries++) { 1651 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1652 break; 1653 } 1654 if (ntries == 5) { 1655 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1656 return; 1657 } 1658 1659 tmp = reg << 8 | val; 1660 ural_write(sc, RAL_PHY_CSR7, tmp); 1661 } 1662 1663 Static uint8_t 1664 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1665 { 1666 uint16_t val; 1667 int ntries; 1668 1669 val = RAL_BBP_WRITE | reg << 8; 1670 ural_write(sc, RAL_PHY_CSR7, val); 1671 1672 for (ntries = 0; ntries < 5; ntries++) { 1673 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1674 break; 1675 } 1676 if (ntries == 5) { 1677 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1678 return 0; 1679 } 1680 1681 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1682 } 1683 1684 Static void 1685 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1686 { 1687 uint32_t tmp; 1688 int ntries; 1689 1690 for (ntries = 0; ntries < 5; ntries++) { 1691 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1692 break; 1693 } 1694 if (ntries == 5) { 1695 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1696 return; 1697 } 1698 1699 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1700 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1701 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1702 1703 /* remember last written value in sc */ 1704 sc->rf_regs[reg] = val; 1705 1706 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1707 } 1708 1709 Static void 1710 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1711 { 1712 struct ieee80211com *ic = &sc->sc_ic; 1713 uint8_t power, tmp; 1714 u_int i, chan; 1715 1716 chan = ieee80211_chan2ieee(ic, c); 1717 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1718 return; 1719 1720 if (IEEE80211_IS_CHAN_2GHZ(c)) 1721 power = min(sc->txpow[chan - 1], 31); 1722 else 1723 power = 31; 1724 1725 /* adjust txpower using ifconfig settings */ 1726 power -= (100 - ic->ic_txpowlimit) / 8; 1727 1728 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1729 1730 switch (sc->rf_rev) { 1731 case RAL_RF_2522: 1732 ural_rf_write(sc, RAL_RF1, 0x00814); 1733 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1734 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1735 break; 1736 1737 case RAL_RF_2523: 1738 ural_rf_write(sc, RAL_RF1, 0x08804); 1739 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1740 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1741 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1742 break; 1743 1744 case RAL_RF_2524: 1745 ural_rf_write(sc, RAL_RF1, 0x0c808); 1746 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1747 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1748 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1749 break; 1750 1751 case RAL_RF_2525: 1752 ural_rf_write(sc, RAL_RF1, 0x08808); 1753 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1754 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1755 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1756 1757 ural_rf_write(sc, RAL_RF1, 0x08808); 1758 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1759 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1760 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1761 break; 1762 1763 case RAL_RF_2525E: 1764 ural_rf_write(sc, RAL_RF1, 0x08808); 1765 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1766 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1767 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1768 break; 1769 1770 case RAL_RF_2526: 1771 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1772 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1773 ural_rf_write(sc, RAL_RF1, 0x08804); 1774 1775 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1776 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1777 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1778 break; 1779 1780 /* dual-band RF */ 1781 case RAL_RF_5222: 1782 for (i = 0; ural_rf5222[i].chan != chan; i++); 1783 1784 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1785 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1786 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1787 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1788 break; 1789 } 1790 1791 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1792 ic->ic_state != IEEE80211_S_SCAN) { 1793 /* set Japan filter bit for channel 14 */ 1794 tmp = ural_bbp_read(sc, 70); 1795 1796 tmp &= ~RAL_JAPAN_FILTER; 1797 if (chan == 14) 1798 tmp |= RAL_JAPAN_FILTER; 1799 1800 ural_bbp_write(sc, 70, tmp); 1801 1802 /* clear CRC errors */ 1803 ural_read(sc, RAL_STA_CSR0); 1804 1805 DELAY(10000); 1806 ural_disable_rf_tune(sc); 1807 } 1808 } 1809 1810 /* 1811 * Disable RF auto-tuning. 1812 */ 1813 Static void 1814 ural_disable_rf_tune(struct ural_softc *sc) 1815 { 1816 uint32_t tmp; 1817 1818 if (sc->rf_rev != RAL_RF_2523) { 1819 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1820 ural_rf_write(sc, RAL_RF1, tmp); 1821 } 1822 1823 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1824 ural_rf_write(sc, RAL_RF3, tmp); 1825 1826 DPRINTFN(2, ("disabling RF autotune\n")); 1827 } 1828 1829 /* 1830 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1831 * synchronization. 1832 */ 1833 Static void 1834 ural_enable_tsf_sync(struct ural_softc *sc) 1835 { 1836 struct ieee80211com *ic = &sc->sc_ic; 1837 uint16_t logcwmin, preload, tmp; 1838 1839 /* first, disable TSF synchronization */ 1840 ural_write(sc, RAL_TXRX_CSR19, 0); 1841 1842 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1843 ural_write(sc, RAL_TXRX_CSR18, tmp); 1844 1845 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1846 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1847 tmp = logcwmin << 12 | preload; 1848 ural_write(sc, RAL_TXRX_CSR20, tmp); 1849 1850 /* finally, enable TSF synchronization */ 1851 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1852 if (ic->ic_opmode == IEEE80211_M_STA) 1853 tmp |= RAL_ENABLE_TSF_SYNC(1); 1854 else 1855 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1856 ural_write(sc, RAL_TXRX_CSR19, tmp); 1857 1858 DPRINTF(("enabling TSF synchronization\n")); 1859 } 1860 1861 Static void 1862 ural_update_slot(struct ifnet *ifp) 1863 { 1864 struct ural_softc *sc = ifp->if_softc; 1865 struct ieee80211com *ic = &sc->sc_ic; 1866 uint16_t slottime, sifs, eifs; 1867 1868 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1869 1870 /* 1871 * These settings may sound a bit inconsistent but this is what the 1872 * reference driver does. 1873 */ 1874 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1875 sifs = 16 - RAL_RXTX_TURNAROUND; 1876 eifs = 364; 1877 } else { 1878 sifs = 10 - RAL_RXTX_TURNAROUND; 1879 eifs = 64; 1880 } 1881 1882 ural_write(sc, RAL_MAC_CSR10, slottime); 1883 ural_write(sc, RAL_MAC_CSR11, sifs); 1884 ural_write(sc, RAL_MAC_CSR12, eifs); 1885 } 1886 1887 Static void 1888 ural_set_txpreamble(struct ural_softc *sc) 1889 { 1890 uint16_t tmp; 1891 1892 tmp = ural_read(sc, RAL_TXRX_CSR10); 1893 1894 tmp &= ~RAL_SHORT_PREAMBLE; 1895 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1896 tmp |= RAL_SHORT_PREAMBLE; 1897 1898 ural_write(sc, RAL_TXRX_CSR10, tmp); 1899 } 1900 1901 Static void 1902 ural_set_basicrates(struct ural_softc *sc) 1903 { 1904 struct ieee80211com *ic = &sc->sc_ic; 1905 1906 /* update basic rate set */ 1907 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1908 /* 11b basic rates: 1, 2Mbps */ 1909 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1910 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1911 /* 11a basic rates: 6, 12, 24Mbps */ 1912 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1913 } else { 1914 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1915 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1916 } 1917 } 1918 1919 Static void 1920 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1921 { 1922 uint16_t tmp; 1923 1924 tmp = bssid[0] | bssid[1] << 8; 1925 ural_write(sc, RAL_MAC_CSR5, tmp); 1926 1927 tmp = bssid[2] | bssid[3] << 8; 1928 ural_write(sc, RAL_MAC_CSR6, tmp); 1929 1930 tmp = bssid[4] | bssid[5] << 8; 1931 ural_write(sc, RAL_MAC_CSR7, tmp); 1932 1933 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1934 } 1935 1936 Static void 1937 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1938 { 1939 uint16_t tmp; 1940 1941 tmp = addr[0] | addr[1] << 8; 1942 ural_write(sc, RAL_MAC_CSR2, tmp); 1943 1944 tmp = addr[2] | addr[3] << 8; 1945 ural_write(sc, RAL_MAC_CSR3, tmp); 1946 1947 tmp = addr[4] | addr[5] << 8; 1948 ural_write(sc, RAL_MAC_CSR4, tmp); 1949 1950 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1951 } 1952 1953 Static void 1954 ural_update_promisc(struct ural_softc *sc) 1955 { 1956 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1957 uint32_t tmp; 1958 1959 tmp = ural_read(sc, RAL_TXRX_CSR2); 1960 1961 tmp &= ~RAL_DROP_NOT_TO_ME; 1962 if (!(ifp->if_flags & IFF_PROMISC)) 1963 tmp |= RAL_DROP_NOT_TO_ME; 1964 1965 ural_write(sc, RAL_TXRX_CSR2, tmp); 1966 1967 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1968 "entering" : "leaving")); 1969 } 1970 1971 Static const char * 1972 ural_get_rf(int rev) 1973 { 1974 switch (rev) { 1975 case RAL_RF_2522: return "RT2522"; 1976 case RAL_RF_2523: return "RT2523"; 1977 case RAL_RF_2524: return "RT2524"; 1978 case RAL_RF_2525: return "RT2525"; 1979 case RAL_RF_2525E: return "RT2525e"; 1980 case RAL_RF_2526: return "RT2526"; 1981 case RAL_RF_5222: return "RT5222"; 1982 default: return "unknown"; 1983 } 1984 } 1985 1986 Static void 1987 ural_read_eeprom(struct ural_softc *sc) 1988 { 1989 struct ieee80211com *ic = &sc->sc_ic; 1990 uint16_t val; 1991 1992 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1993 val = le16toh(val); 1994 sc->rf_rev = (val >> 11) & 0x7; 1995 sc->hw_radio = (val >> 10) & 0x1; 1996 sc->led_mode = (val >> 6) & 0x7; 1997 sc->rx_ant = (val >> 4) & 0x3; 1998 sc->tx_ant = (val >> 2) & 0x3; 1999 sc->nb_ant = val & 0x3; 2000 2001 /* read MAC address */ 2002 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2003 2004 /* read default values for BBP registers */ 2005 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2006 2007 /* read Tx power for all b/g channels */ 2008 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2009 } 2010 2011 Static int 2012 ural_bbp_init(struct ural_softc *sc) 2013 { 2014 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2015 int i, ntries; 2016 2017 /* wait for BBP to be ready */ 2018 for (ntries = 0; ntries < 100; ntries++) { 2019 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2020 break; 2021 DELAY(1000); 2022 } 2023 if (ntries == 100) { 2024 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 2025 return EIO; 2026 } 2027 2028 /* initialize BBP registers to default values */ 2029 for (i = 0; i < N(ural_def_bbp); i++) 2030 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2031 2032 #if 0 2033 /* initialize BBP registers to values stored in EEPROM */ 2034 for (i = 0; i < 16; i++) { 2035 if (sc->bbp_prom[i].reg == 0xff) 2036 continue; 2037 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2038 } 2039 #endif 2040 2041 return 0; 2042 #undef N 2043 } 2044 2045 Static void 2046 ural_set_txantenna(struct ural_softc *sc, int antenna) 2047 { 2048 uint16_t tmp; 2049 uint8_t tx; 2050 2051 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2052 if (antenna == 1) 2053 tx |= RAL_BBP_ANTA; 2054 else if (antenna == 2) 2055 tx |= RAL_BBP_ANTB; 2056 else 2057 tx |= RAL_BBP_DIVERSITY; 2058 2059 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2060 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2061 sc->rf_rev == RAL_RF_5222) 2062 tx |= RAL_BBP_FLIPIQ; 2063 2064 ural_bbp_write(sc, RAL_BBP_TX, tx); 2065 2066 /* update values in PHY_CSR5 and PHY_CSR6 */ 2067 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2068 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2069 2070 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2071 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2072 } 2073 2074 Static void 2075 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2076 { 2077 uint8_t rx; 2078 2079 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2080 if (antenna == 1) 2081 rx |= RAL_BBP_ANTA; 2082 else if (antenna == 2) 2083 rx |= RAL_BBP_ANTB; 2084 else 2085 rx |= RAL_BBP_DIVERSITY; 2086 2087 /* need to force no I/Q flip for RF 2525e and 2526 */ 2088 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2089 rx &= ~RAL_BBP_FLIPIQ; 2090 2091 ural_bbp_write(sc, RAL_BBP_RX, rx); 2092 } 2093 2094 Static int 2095 ural_init(struct ifnet *ifp) 2096 { 2097 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2098 struct ural_softc *sc = ifp->if_softc; 2099 struct ieee80211com *ic = &sc->sc_ic; 2100 struct ieee80211_key *wk; 2101 struct ural_rx_data *data; 2102 uint16_t tmp; 2103 usbd_status error; 2104 int i, ntries; 2105 2106 ural_set_testmode(sc); 2107 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2108 2109 ural_stop(ifp, 0); 2110 2111 /* initialize MAC registers to default values */ 2112 for (i = 0; i < N(ural_def_mac); i++) 2113 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2114 2115 /* wait for BBP and RF to wake up (this can take a long time!) */ 2116 for (ntries = 0; ntries < 100; ntries++) { 2117 tmp = ural_read(sc, RAL_MAC_CSR17); 2118 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2119 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2120 break; 2121 DELAY(1000); 2122 } 2123 if (ntries == 100) { 2124 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2125 USBDEVNAME(sc->sc_dev)); 2126 error = EIO; 2127 goto fail; 2128 } 2129 2130 /* we're ready! */ 2131 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2132 2133 /* set basic rate set (will be updated later) */ 2134 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2135 2136 error = ural_bbp_init(sc); 2137 if (error != 0) 2138 goto fail; 2139 2140 /* set default BSS channel */ 2141 ural_set_chan(sc, ic->ic_curchan); 2142 2143 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2144 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2145 2146 ural_set_txantenna(sc, sc->tx_ant); 2147 ural_set_rxantenna(sc, sc->rx_ant); 2148 2149 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2150 ural_set_macaddr(sc, ic->ic_myaddr); 2151 2152 /* 2153 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2154 */ 2155 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2156 wk = &ic->ic_crypto.cs_nw_keys[i]; 2157 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2158 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2159 } 2160 2161 /* 2162 * Allocate xfer for AMRR statistics requests. 2163 */ 2164 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2165 if (sc->amrr_xfer == NULL) { 2166 printf("%s: could not allocate AMRR xfer\n", 2167 USBDEVNAME(sc->sc_dev)); 2168 goto fail; 2169 } 2170 2171 /* 2172 * Open Tx and Rx USB bulk pipes. 2173 */ 2174 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2175 &sc->sc_tx_pipeh); 2176 if (error != 0) { 2177 printf("%s: could not open Tx pipe: %s\n", 2178 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2179 goto fail; 2180 } 2181 2182 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2183 &sc->sc_rx_pipeh); 2184 if (error != 0) { 2185 printf("%s: could not open Rx pipe: %s\n", 2186 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2187 goto fail; 2188 } 2189 2190 /* 2191 * Allocate Tx and Rx xfer queues. 2192 */ 2193 error = ural_alloc_tx_list(sc); 2194 if (error != 0) { 2195 printf("%s: could not allocate Tx list\n", 2196 USBDEVNAME(sc->sc_dev)); 2197 goto fail; 2198 } 2199 2200 error = ural_alloc_rx_list(sc); 2201 if (error != 0) { 2202 printf("%s: could not allocate Rx list\n", 2203 USBDEVNAME(sc->sc_dev)); 2204 goto fail; 2205 } 2206 2207 /* 2208 * Start up the receive pipe. 2209 */ 2210 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2211 data = &sc->rx_data[i]; 2212 2213 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2214 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2215 usbd_transfer(data->xfer); 2216 } 2217 2218 /* kick Rx */ 2219 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2220 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2221 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2222 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2223 tmp |= RAL_DROP_TODS; 2224 if (!(ifp->if_flags & IFF_PROMISC)) 2225 tmp |= RAL_DROP_NOT_TO_ME; 2226 } 2227 ural_write(sc, RAL_TXRX_CSR2, tmp); 2228 2229 ifp->if_flags &= ~IFF_OACTIVE; 2230 ifp->if_flags |= IFF_RUNNING; 2231 2232 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2233 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2234 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2235 } else 2236 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2237 2238 return 0; 2239 2240 fail: ural_stop(ifp, 1); 2241 return error; 2242 #undef N 2243 } 2244 2245 Static void 2246 ural_stop(struct ifnet *ifp, int disable __unused) 2247 { 2248 struct ural_softc *sc = ifp->if_softc; 2249 struct ieee80211com *ic = &sc->sc_ic; 2250 2251 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2252 2253 sc->sc_tx_timer = 0; 2254 ifp->if_timer = 0; 2255 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2256 2257 /* disable Rx */ 2258 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2259 2260 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2261 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2262 ural_write(sc, RAL_MAC_CSR1, 0); 2263 2264 if (sc->amrr_xfer != NULL) { 2265 usbd_free_xfer(sc->amrr_xfer); 2266 sc->amrr_xfer = NULL; 2267 } 2268 2269 if (sc->sc_rx_pipeh != NULL) { 2270 usbd_abort_pipe(sc->sc_rx_pipeh); 2271 usbd_close_pipe(sc->sc_rx_pipeh); 2272 sc->sc_rx_pipeh = NULL; 2273 } 2274 2275 if (sc->sc_tx_pipeh != NULL) { 2276 usbd_abort_pipe(sc->sc_tx_pipeh); 2277 usbd_close_pipe(sc->sc_tx_pipeh); 2278 sc->sc_tx_pipeh = NULL; 2279 } 2280 2281 ural_free_rx_list(sc); 2282 ural_free_tx_list(sc); 2283 } 2284 2285 int 2286 ural_activate(device_ptr_t self, enum devact act) 2287 { 2288 struct ural_softc *sc = (struct ural_softc *)self; 2289 2290 switch (act) { 2291 case DVACT_ACTIVATE: 2292 return EOPNOTSUPP; 2293 break; 2294 2295 case DVACT_DEACTIVATE: 2296 if_deactivate(&sc->sc_if); 2297 break; 2298 } 2299 2300 return 0; 2301 } 2302 2303 #define URAL_AMRR_MIN_SUCCESS_THRESHOLD 1 2304 #define URAL_AMRR_MAX_SUCCESS_THRESHOLD 10 2305 2306 Static void 2307 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2308 { 2309 struct ural_amrr *amrr = &sc->amrr; 2310 int i; 2311 2312 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2313 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2314 2315 amrr->success = 0; 2316 amrr->recovery = 0; 2317 amrr->txcnt = amrr->retrycnt = 0; 2318 amrr->success_threshold = URAL_AMRR_MIN_SUCCESS_THRESHOLD; 2319 2320 /* set rate to some reasonable initial value */ 2321 for (i = ni->ni_rates.rs_nrates - 1; 2322 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2323 i--); 2324 2325 ni->ni_txrate = i; 2326 2327 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2328 } 2329 2330 Static void 2331 ural_amrr_timeout(void *arg) 2332 { 2333 struct ural_softc *sc = (struct ural_softc *)arg; 2334 usb_device_request_t req; 2335 int s; 2336 2337 s = splusb(); 2338 2339 /* 2340 * Asynchronously read statistic registers (cleared by read). 2341 */ 2342 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2343 req.bRequest = RAL_READ_MULTI_MAC; 2344 USETW(req.wValue, 0); 2345 USETW(req.wIndex, RAL_STA_CSR0); 2346 USETW(req.wLength, sizeof sc->sta); 2347 2348 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2349 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2350 ural_amrr_update); 2351 (void)usbd_transfer(sc->amrr_xfer); 2352 2353 splx(s); 2354 } 2355 2356 Static void 2357 ural_amrr_update(usbd_xfer_handle xfer __unused, usbd_private_handle priv, 2358 usbd_status status) 2359 { 2360 struct ural_softc *sc = (struct ural_softc *)priv; 2361 struct ural_amrr *amrr = &sc->amrr; 2362 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2363 2364 if (status != USBD_NORMAL_COMPLETION) { 2365 printf("%s: could not retrieve Tx statistics - " 2366 "cancelling automatic rate control\n", 2367 USBDEVNAME(sc->sc_dev)); 2368 return; 2369 } 2370 2371 /* count TX retry-fail as Tx errors */ 2372 ifp->if_oerrors += sc->sta[9]; 2373 2374 amrr->retrycnt = 2375 sc->sta[7] + /* TX one-retry ok count */ 2376 sc->sta[8] + /* TX more-retry ok count */ 2377 sc->sta[9]; /* TX retry-fail count */ 2378 2379 amrr->txcnt = 2380 amrr->retrycnt + 2381 sc->sta[6]; /* TX no-retry ok count */ 2382 2383 ural_ratectl(amrr, sc->sc_ic.ic_bss); 2384 2385 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2386 } 2387 2388 /*- 2389 * Naive implementation of the Adaptive Multi Rate Retry algorithm: 2390 * "IEEE 802.11 Rate Adaptation: A Practical Approach" 2391 * Mathieu Lacage, Hossein Manshaei, Thierry Turletti 2392 * INRIA Sophia - Projet Planete 2393 * http://www-sop.inria.fr/rapports/sophia/RR-5208.html 2394 * 2395 * This algorithm is particularly well suited for ural since it does not 2396 * require per-frame retry statistics. Note however that since h/w does 2397 * not provide per-frame stats, we can't do per-node rate adaptation and 2398 * thus automatic rate adaptation is only enabled in STA operating mode. 2399 */ 2400 #define is_success(amrr) \ 2401 ((amrr)->retrycnt < (amrr)->txcnt / 10) 2402 #define is_failure(amrr) \ 2403 ((amrr)->retrycnt > (amrr)->txcnt / 3) 2404 #define is_enough(amrr) \ 2405 ((amrr)->txcnt > 10) 2406 #define is_min_rate(ni) \ 2407 ((ni)->ni_txrate == 0) 2408 #define is_max_rate(ni) \ 2409 ((ni)->ni_txrate == (ni)->ni_rates.rs_nrates - 1) 2410 #define increase_rate(ni) \ 2411 ((ni)->ni_txrate++) 2412 #define decrease_rate(ni) \ 2413 ((ni)->ni_txrate--) 2414 #define reset_cnt(amrr) \ 2415 do { (amrr)->txcnt = (amrr)->retrycnt = 0; } while (0) 2416 Static void 2417 ural_ratectl(struct ural_amrr *amrr, struct ieee80211_node *ni) 2418 { 2419 int need_change = 0; 2420 2421 if (is_success(amrr) && is_enough(amrr)) { 2422 amrr->success++; 2423 if (amrr->success >= amrr->success_threshold && 2424 !is_max_rate(ni)) { 2425 amrr->recovery = 1; 2426 amrr->success = 0; 2427 increase_rate(ni); 2428 need_change = 1; 2429 } else { 2430 amrr->recovery = 0; 2431 } 2432 } else if (is_failure(amrr)) { 2433 amrr->success = 0; 2434 if (!is_min_rate(ni)) { 2435 if (amrr->recovery) { 2436 amrr->success_threshold *= 2; 2437 if (amrr->success_threshold > 2438 URAL_AMRR_MAX_SUCCESS_THRESHOLD) 2439 amrr->success_threshold = 2440 URAL_AMRR_MAX_SUCCESS_THRESHOLD; 2441 } else { 2442 amrr->success_threshold = 2443 URAL_AMRR_MIN_SUCCESS_THRESHOLD; 2444 } 2445 decrease_rate(ni); 2446 need_change = 1; 2447 } 2448 amrr->recovery = 0; /* original paper was incorrect */ 2449 } 2450 2451 if (is_enough(amrr) || need_change) 2452 reset_cnt(amrr); 2453 } 2454
Indexes created Mon Sep 29 18:09:42 GMT 2025