if_ural.c revision 1.17
1 /* $NetBSD: if_ural.c,v 1.17 2006/10/31 21:53:41 joerg Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.17 2006/10/31 21:53:41 joerg Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 71 #include <dev/usb/if_uralreg.h> 72 #include <dev/usb/if_uralvar.h> 73 74 #ifdef USB_DEBUG 75 #define URAL_DEBUG 76 #endif 77 78 #ifdef URAL_DEBUG 79 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 81 int ural_debug = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n, x) 85 #endif 86 87 /* various supported device vendors/products */ 88 static const struct usb_devno ural_devs[] = { 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 95 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 96 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 97 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 98 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 101 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 106 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 107 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 108 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 109 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 110 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 111 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 112 }; 113 114 Static int ural_alloc_tx_list(struct ural_softc *); 115 Static void ural_free_tx_list(struct ural_softc *); 116 Static int ural_alloc_rx_list(struct ural_softc *); 117 Static void ural_free_rx_list(struct ural_softc *); 118 Static int ural_media_change(struct ifnet *); 119 Static void ural_next_scan(void *); 120 Static void ural_task(void *); 121 Static int ural_newstate(struct ieee80211com *, 122 enum ieee80211_state, int); 123 Static int ural_rxrate(struct ural_rx_desc *); 124 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 125 usbd_status); 126 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 127 usbd_status); 128 Static int ural_ack_rate(struct ieee80211com *, int); 129 Static uint16_t ural_txtime(int, int, uint32_t); 130 Static uint8_t ural_plcp_signal(int); 131 Static void ural_setup_tx_desc(struct ural_softc *, 132 struct ural_tx_desc *, uint32_t, int, int); 133 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 138 struct ieee80211_node *); 139 Static void ural_start(struct ifnet *); 140 Static void ural_watchdog(struct ifnet *); 141 Static int ural_reset(struct ifnet *); 142 Static int ural_ioctl(struct ifnet *, u_long, caddr_t); 143 Static void ural_set_testmode(struct ural_softc *); 144 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 145 int); 146 Static uint16_t ural_read(struct ural_softc *, uint16_t); 147 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 148 int); 149 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 150 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 151 int); 152 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 153 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 154 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 155 Static void ural_set_chan(struct ural_softc *, 156 struct ieee80211_channel *); 157 Static void ural_disable_rf_tune(struct ural_softc *); 158 Static void ural_enable_tsf_sync(struct ural_softc *); 159 Static void ural_update_slot(struct ifnet *); 160 Static void ural_set_txpreamble(struct ural_softc *); 161 Static void ural_set_basicrates(struct ural_softc *); 162 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 163 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 164 Static void ural_update_promisc(struct ural_softc *); 165 Static const char *ural_get_rf(int); 166 Static void ural_read_eeprom(struct ural_softc *); 167 Static int ural_bbp_init(struct ural_softc *); 168 Static void ural_set_txantenna(struct ural_softc *, int); 169 Static void ural_set_rxantenna(struct ural_softc *, int); 170 Static int ural_init(struct ifnet *); 171 Static void ural_stop(struct ifnet *, int); 172 Static void ural_amrr_start(struct ural_softc *, 173 struct ieee80211_node *); 174 Static void ural_amrr_timeout(void *); 175 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 176 usbd_status status); 177 178 /* 179 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 180 */ 181 static const struct ieee80211_rateset ural_rateset_11a = 182 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 183 184 static const struct ieee80211_rateset ural_rateset_11b = 185 { 4, { 2, 4, 11, 22 } }; 186 187 static const struct ieee80211_rateset ural_rateset_11g = 188 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 189 190 /* 191 * Default values for MAC registers; values taken from the reference driver. 192 */ 193 static const struct { 194 uint16_t reg; 195 uint16_t val; 196 } ural_def_mac[] = { 197 { RAL_TXRX_CSR5, 0x8c8d }, 198 { RAL_TXRX_CSR6, 0x8b8a }, 199 { RAL_TXRX_CSR7, 0x8687 }, 200 { RAL_TXRX_CSR8, 0x0085 }, 201 { RAL_MAC_CSR13, 0x1111 }, 202 { RAL_MAC_CSR14, 0x1e11 }, 203 { RAL_TXRX_CSR21, 0xe78f }, 204 { RAL_MAC_CSR9, 0xff1d }, 205 { RAL_MAC_CSR11, 0x0002 }, 206 { RAL_MAC_CSR22, 0x0053 }, 207 { RAL_MAC_CSR15, 0x0000 }, 208 { RAL_MAC_CSR8, 0x0780 }, 209 { RAL_TXRX_CSR19, 0x0000 }, 210 { RAL_TXRX_CSR18, 0x005a }, 211 { RAL_PHY_CSR2, 0x0000 }, 212 { RAL_TXRX_CSR0, 0x1ec0 }, 213 { RAL_PHY_CSR4, 0x000f } 214 }; 215 216 /* 217 * Default values for BBP registers; values taken from the reference driver. 218 */ 219 static const struct { 220 uint8_t reg; 221 uint8_t val; 222 } ural_def_bbp[] = { 223 { 3, 0x02 }, 224 { 4, 0x19 }, 225 { 14, 0x1c }, 226 { 15, 0x30 }, 227 { 16, 0xac }, 228 { 17, 0x48 }, 229 { 18, 0x18 }, 230 { 19, 0xff }, 231 { 20, 0x1e }, 232 { 21, 0x08 }, 233 { 22, 0x08 }, 234 { 23, 0x08 }, 235 { 24, 0x80 }, 236 { 25, 0x50 }, 237 { 26, 0x08 }, 238 { 27, 0x23 }, 239 { 30, 0x10 }, 240 { 31, 0x2b }, 241 { 32, 0xb9 }, 242 { 34, 0x12 }, 243 { 35, 0x50 }, 244 { 39, 0xc4 }, 245 { 40, 0x02 }, 246 { 41, 0x60 }, 247 { 53, 0x10 }, 248 { 54, 0x18 }, 249 { 56, 0x08 }, 250 { 57, 0x10 }, 251 { 58, 0x08 }, 252 { 61, 0x60 }, 253 { 62, 0x10 }, 254 { 75, 0xff } 255 }; 256 257 /* 258 * Default values for RF register R2 indexed by channel numbers. 259 */ 260 static const uint32_t ural_rf2522_r2[] = { 261 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 262 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 263 }; 264 265 static const uint32_t ural_rf2523_r2[] = { 266 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 267 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 268 }; 269 270 static const uint32_t ural_rf2524_r2[] = { 271 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 272 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 273 }; 274 275 static const uint32_t ural_rf2525_r2[] = { 276 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 277 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 278 }; 279 280 static const uint32_t ural_rf2525_hi_r2[] = { 281 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 282 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 283 }; 284 285 static const uint32_t ural_rf2525e_r2[] = { 286 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 287 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 288 }; 289 290 static const uint32_t ural_rf2526_hi_r2[] = { 291 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 292 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 293 }; 294 295 static const uint32_t ural_rf2526_r2[] = { 296 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 297 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 298 }; 299 300 /* 301 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 302 * values taken from the reference driver. 303 */ 304 static const struct { 305 uint8_t chan; 306 uint32_t r1; 307 uint32_t r2; 308 uint32_t r4; 309 } ural_rf5222[] = { 310 { 1, 0x08808, 0x0044d, 0x00282 }, 311 { 2, 0x08808, 0x0044e, 0x00282 }, 312 { 3, 0x08808, 0x0044f, 0x00282 }, 313 { 4, 0x08808, 0x00460, 0x00282 }, 314 { 5, 0x08808, 0x00461, 0x00282 }, 315 { 6, 0x08808, 0x00462, 0x00282 }, 316 { 7, 0x08808, 0x00463, 0x00282 }, 317 { 8, 0x08808, 0x00464, 0x00282 }, 318 { 9, 0x08808, 0x00465, 0x00282 }, 319 { 10, 0x08808, 0x00466, 0x00282 }, 320 { 11, 0x08808, 0x00467, 0x00282 }, 321 { 12, 0x08808, 0x00468, 0x00282 }, 322 { 13, 0x08808, 0x00469, 0x00282 }, 323 { 14, 0x08808, 0x0046b, 0x00286 }, 324 325 { 36, 0x08804, 0x06225, 0x00287 }, 326 { 40, 0x08804, 0x06226, 0x00287 }, 327 { 44, 0x08804, 0x06227, 0x00287 }, 328 { 48, 0x08804, 0x06228, 0x00287 }, 329 { 52, 0x08804, 0x06229, 0x00287 }, 330 { 56, 0x08804, 0x0622a, 0x00287 }, 331 { 60, 0x08804, 0x0622b, 0x00287 }, 332 { 64, 0x08804, 0x0622c, 0x00287 }, 333 334 { 100, 0x08804, 0x02200, 0x00283 }, 335 { 104, 0x08804, 0x02201, 0x00283 }, 336 { 108, 0x08804, 0x02202, 0x00283 }, 337 { 112, 0x08804, 0x02203, 0x00283 }, 338 { 116, 0x08804, 0x02204, 0x00283 }, 339 { 120, 0x08804, 0x02205, 0x00283 }, 340 { 124, 0x08804, 0x02206, 0x00283 }, 341 { 128, 0x08804, 0x02207, 0x00283 }, 342 { 132, 0x08804, 0x02208, 0x00283 }, 343 { 136, 0x08804, 0x02209, 0x00283 }, 344 { 140, 0x08804, 0x0220a, 0x00283 }, 345 346 { 149, 0x08808, 0x02429, 0x00281 }, 347 { 153, 0x08808, 0x0242b, 0x00281 }, 348 { 157, 0x08808, 0x0242d, 0x00281 }, 349 { 161, 0x08808, 0x0242f, 0x00281 } 350 }; 351 352 USB_DECLARE_DRIVER(ural); 353 354 USB_MATCH(ural) 355 { 356 USB_MATCH_START(ural, uaa); 357 358 if (uaa->iface != NULL) 359 return UMATCH_NONE; 360 361 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 362 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 363 } 364 365 USB_ATTACH(ural) 366 { 367 USB_ATTACH_START(ural, sc, uaa); 368 struct ieee80211com *ic = &sc->sc_ic; 369 struct ifnet *ifp = &sc->sc_if; 370 usb_interface_descriptor_t *id; 371 usb_endpoint_descriptor_t *ed; 372 usbd_status error; 373 char *devinfop; 374 int i; 375 376 sc->sc_udev = uaa->device; 377 378 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 379 USB_ATTACH_SETUP; 380 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 381 usbd_devinfo_free(devinfop); 382 383 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 384 printf("%s: could not set configuration no\n", 385 USBDEVNAME(sc->sc_dev)); 386 USB_ATTACH_ERROR_RETURN; 387 } 388 389 /* get the first interface handle */ 390 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 391 &sc->sc_iface); 392 if (error != 0) { 393 printf("%s: could not get interface handle\n", 394 USBDEVNAME(sc->sc_dev)); 395 USB_ATTACH_ERROR_RETURN; 396 } 397 398 /* 399 * Find endpoints. 400 */ 401 id = usbd_get_interface_descriptor(sc->sc_iface); 402 403 sc->sc_rx_no = sc->sc_tx_no = -1; 404 for (i = 0; i < id->bNumEndpoints; i++) { 405 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 406 if (ed == NULL) { 407 printf("%s: no endpoint descriptor for %d\n", 408 USBDEVNAME(sc->sc_dev), i); 409 USB_ATTACH_ERROR_RETURN; 410 } 411 412 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 413 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 414 sc->sc_rx_no = ed->bEndpointAddress; 415 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 416 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 417 sc->sc_tx_no = ed->bEndpointAddress; 418 } 419 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 420 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 421 USB_ATTACH_ERROR_RETURN; 422 } 423 424 usb_init_task(&sc->sc_task, ural_task, sc); 425 callout_init(&sc->scan_ch); 426 sc->amrr.amrr_min_success_threshold = 1; 427 sc->amrr.amrr_min_success_threshold = 15; 428 callout_init(&sc->amrr_ch); 429 430 /* retrieve RT2570 rev. no */ 431 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 432 433 /* retrieve MAC address and various other things from EEPROM */ 434 ural_read_eeprom(sc); 435 436 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 437 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 438 439 ifp->if_softc = sc; 440 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 441 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 442 ifp->if_init = ural_init; 443 ifp->if_ioctl = ural_ioctl; 444 ifp->if_start = ural_start; 445 ifp->if_watchdog = ural_watchdog; 446 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 447 IFQ_SET_READY(&ifp->if_snd); 448 449 ic->ic_ifp = ifp; 450 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 451 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 452 ic->ic_state = IEEE80211_S_INIT; 453 454 /* set device capabilities */ 455 ic->ic_caps = 456 IEEE80211_C_IBSS | /* IBSS mode supported */ 457 IEEE80211_C_MONITOR | /* monitor mode supported */ 458 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 459 IEEE80211_C_TXPMGT | /* tx power management */ 460 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 461 IEEE80211_C_SHSLOT | /* short slot time supported */ 462 IEEE80211_C_WPA; /* 802.11i */ 463 464 if (sc->rf_rev == RAL_RF_5222) { 465 /* set supported .11a rates */ 466 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 467 468 /* set supported .11a channels */ 469 for (i = 36; i <= 64; i += 4) { 470 ic->ic_channels[i].ic_freq = 471 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 472 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 473 } 474 for (i = 100; i <= 140; i += 4) { 475 ic->ic_channels[i].ic_freq = 476 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 477 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 478 } 479 for (i = 149; i <= 161; i += 4) { 480 ic->ic_channels[i].ic_freq = 481 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 482 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 483 } 484 } 485 486 /* set supported .11b and .11g rates */ 487 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 488 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 489 490 /* set supported .11b and .11g channels (1 through 14) */ 491 for (i = 1; i <= 14; i++) { 492 ic->ic_channels[i].ic_freq = 493 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 494 ic->ic_channels[i].ic_flags = 495 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 496 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 497 } 498 499 if_attach(ifp); 500 ieee80211_ifattach(ic); 501 ic->ic_reset = ural_reset; 502 503 /* override state transition machine */ 504 sc->sc_newstate = ic->ic_newstate; 505 ic->ic_newstate = ural_newstate; 506 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 507 508 #if NBPFILTER > 0 509 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 510 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 511 512 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 513 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 514 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 515 516 sc->sc_txtap_len = sizeof sc->sc_txtapu; 517 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 518 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 519 #endif 520 521 ieee80211_announce(ic); 522 523 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 524 USBDEV(sc->sc_dev)); 525 526 USB_ATTACH_SUCCESS_RETURN; 527 } 528 529 USB_DETACH(ural) 530 { 531 USB_DETACH_START(ural, sc); 532 struct ieee80211com *ic = &sc->sc_ic; 533 struct ifnet *ifp = &sc->sc_if; 534 int s; 535 536 s = splusb(); 537 538 ural_stop(ifp, 1); 539 usb_rem_task(sc->sc_udev, &sc->sc_task); 540 callout_stop(&sc->scan_ch); 541 callout_stop(&sc->amrr_ch); 542 543 if (sc->amrr_xfer != NULL) { 544 usbd_free_xfer(sc->amrr_xfer); 545 sc->amrr_xfer = NULL; 546 } 547 548 if (sc->sc_rx_pipeh != NULL) { 549 usbd_abort_pipe(sc->sc_rx_pipeh); 550 usbd_close_pipe(sc->sc_rx_pipeh); 551 } 552 553 if (sc->sc_tx_pipeh != NULL) { 554 usbd_abort_pipe(sc->sc_tx_pipeh); 555 usbd_close_pipe(sc->sc_tx_pipeh); 556 } 557 558 ural_free_rx_list(sc); 559 ural_free_tx_list(sc); 560 561 #if NBPFILTER > 0 562 bpfdetach(ifp); 563 #endif 564 ieee80211_ifdetach(ic); 565 if_detach(ifp); 566 567 splx(s); 568 569 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 570 USBDEV(sc->sc_dev)); 571 572 return 0; 573 } 574 575 Static int 576 ural_alloc_tx_list(struct ural_softc *sc) 577 { 578 struct ural_tx_data *data; 579 int i, error; 580 581 sc->tx_queued = 0; 582 583 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 584 data = &sc->tx_data[i]; 585 586 data->sc = sc; 587 588 data->xfer = usbd_alloc_xfer(sc->sc_udev); 589 if (data->xfer == NULL) { 590 printf("%s: could not allocate tx xfer\n", 591 USBDEVNAME(sc->sc_dev)); 592 error = ENOMEM; 593 goto fail; 594 } 595 596 data->buf = usbd_alloc_buffer(data->xfer, 597 RAL_TX_DESC_SIZE + MCLBYTES); 598 if (data->buf == NULL) { 599 printf("%s: could not allocate tx buffer\n", 600 USBDEVNAME(sc->sc_dev)); 601 error = ENOMEM; 602 goto fail; 603 } 604 } 605 606 return 0; 607 608 fail: ural_free_tx_list(sc); 609 return error; 610 } 611 612 Static void 613 ural_free_tx_list(struct ural_softc *sc) 614 { 615 struct ural_tx_data *data; 616 int i; 617 618 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 619 data = &sc->tx_data[i]; 620 621 if (data->xfer != NULL) { 622 usbd_free_xfer(data->xfer); 623 data->xfer = NULL; 624 } 625 626 if (data->ni != NULL) { 627 ieee80211_free_node(data->ni); 628 data->ni = NULL; 629 } 630 } 631 } 632 633 Static int 634 ural_alloc_rx_list(struct ural_softc *sc) 635 { 636 struct ural_rx_data *data; 637 int i, error; 638 639 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 640 data = &sc->rx_data[i]; 641 642 data->sc = sc; 643 644 data->xfer = usbd_alloc_xfer(sc->sc_udev); 645 if (data->xfer == NULL) { 646 printf("%s: could not allocate rx xfer\n", 647 USBDEVNAME(sc->sc_dev)); 648 error = ENOMEM; 649 goto fail; 650 } 651 652 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 653 printf("%s: could not allocate rx buffer\n", 654 USBDEVNAME(sc->sc_dev)); 655 error = ENOMEM; 656 goto fail; 657 } 658 659 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 660 if (data->m == NULL) { 661 printf("%s: could not allocate rx mbuf\n", 662 USBDEVNAME(sc->sc_dev)); 663 error = ENOMEM; 664 goto fail; 665 } 666 667 MCLGET(data->m, M_DONTWAIT); 668 if (!(data->m->m_flags & M_EXT)) { 669 printf("%s: could not allocate rx mbuf cluster\n", 670 USBDEVNAME(sc->sc_dev)); 671 error = ENOMEM; 672 goto fail; 673 } 674 675 data->buf = mtod(data->m, uint8_t *); 676 } 677 678 return 0; 679 680 fail: ural_free_tx_list(sc); 681 return error; 682 } 683 684 Static void 685 ural_free_rx_list(struct ural_softc *sc) 686 { 687 struct ural_rx_data *data; 688 int i; 689 690 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 691 data = &sc->rx_data[i]; 692 693 if (data->xfer != NULL) { 694 usbd_free_xfer(data->xfer); 695 data->xfer = NULL; 696 } 697 698 if (data->m != NULL) { 699 m_freem(data->m); 700 data->m = NULL; 701 } 702 } 703 } 704 705 Static int 706 ural_media_change(struct ifnet *ifp) 707 { 708 int error; 709 710 error = ieee80211_media_change(ifp); 711 if (error != ENETRESET) 712 return error; 713 714 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 715 ural_init(ifp); 716 717 return 0; 718 } 719 720 /* 721 * This function is called periodically (every 200ms) during scanning to 722 * switch from one channel to another. 723 */ 724 Static void 725 ural_next_scan(void *arg) 726 { 727 struct ural_softc *sc = arg; 728 struct ieee80211com *ic = &sc->sc_ic; 729 730 if (ic->ic_state == IEEE80211_S_SCAN) 731 ieee80211_next_scan(ic); 732 } 733 734 Static void 735 ural_task(void *arg) 736 { 737 struct ural_softc *sc = arg; 738 struct ieee80211com *ic = &sc->sc_ic; 739 enum ieee80211_state ostate; 740 struct ieee80211_node *ni; 741 struct mbuf *m; 742 743 ostate = ic->ic_state; 744 745 switch (sc->sc_state) { 746 case IEEE80211_S_INIT: 747 if (ostate == IEEE80211_S_RUN) { 748 /* abort TSF synchronization */ 749 ural_write(sc, RAL_TXRX_CSR19, 0); 750 751 /* force tx led to stop blinking */ 752 ural_write(sc, RAL_MAC_CSR20, 0); 753 } 754 break; 755 756 case IEEE80211_S_SCAN: 757 ural_set_chan(sc, ic->ic_curchan); 758 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc); 759 break; 760 761 case IEEE80211_S_AUTH: 762 ural_set_chan(sc, ic->ic_curchan); 763 break; 764 765 case IEEE80211_S_ASSOC: 766 ural_set_chan(sc, ic->ic_curchan); 767 break; 768 769 case IEEE80211_S_RUN: 770 ural_set_chan(sc, ic->ic_curchan); 771 772 ni = ic->ic_bss; 773 774 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 775 ural_update_slot(ic->ic_ifp); 776 ural_set_txpreamble(sc); 777 ural_set_basicrates(sc); 778 ural_set_bssid(sc, ni->ni_bssid); 779 } 780 781 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 782 ic->ic_opmode == IEEE80211_M_IBSS) { 783 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 784 if (m == NULL) { 785 printf("%s: could not allocate beacon\n", 786 USBDEVNAME(sc->sc_dev)); 787 return; 788 } 789 790 if (ural_tx_bcn(sc, m, ni) != 0) { 791 m_freem(m); 792 printf("%s: could not send beacon\n", 793 USBDEVNAME(sc->sc_dev)); 794 return; 795 } 796 797 /* beacon is no longer needed */ 798 m_freem(m); 799 } 800 801 /* make tx led blink on tx (controlled by ASIC) */ 802 ural_write(sc, RAL_MAC_CSR20, 1); 803 804 if (ic->ic_opmode != IEEE80211_M_MONITOR) 805 ural_enable_tsf_sync(sc); 806 807 /* enable automatic rate adaptation in STA mode */ 808 if (ic->ic_opmode == IEEE80211_M_STA && 809 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 810 ural_amrr_start(sc, ni); 811 812 break; 813 } 814 815 sc->sc_newstate(ic, sc->sc_state, -1); 816 } 817 818 Static int 819 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 820 int arg __unused) 821 { 822 struct ural_softc *sc = ic->ic_ifp->if_softc; 823 824 usb_rem_task(sc->sc_udev, &sc->sc_task); 825 callout_stop(&sc->scan_ch); 826 callout_stop(&sc->amrr_ch); 827 828 /* do it in a process context */ 829 sc->sc_state = nstate; 830 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 831 832 return 0; 833 } 834 835 /* quickly determine if a given rate is CCK or OFDM */ 836 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 837 838 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 839 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 840 841 #define RAL_SIFS 10 /* us */ 842 843 #define RAL_RXTX_TURNAROUND 5 /* us */ 844 845 /* 846 * This function is only used by the Rx radiotap code. 847 */ 848 Static int 849 ural_rxrate(struct ural_rx_desc *desc) 850 { 851 if (le32toh(desc->flags) & RAL_RX_OFDM) { 852 /* reverse function of ural_plcp_signal */ 853 switch (desc->rate) { 854 case 0xb: return 12; 855 case 0xf: return 18; 856 case 0xa: return 24; 857 case 0xe: return 36; 858 case 0x9: return 48; 859 case 0xd: return 72; 860 case 0x8: return 96; 861 case 0xc: return 108; 862 } 863 } else { 864 if (desc->rate == 10) 865 return 2; 866 if (desc->rate == 20) 867 return 4; 868 if (desc->rate == 55) 869 return 11; 870 if (desc->rate == 110) 871 return 22; 872 } 873 return 2; /* should not get there */ 874 } 875 876 Static void 877 ural_txeof(usbd_xfer_handle xfer __unused, usbd_private_handle priv, 878 usbd_status status) 879 { 880 struct ural_tx_data *data = priv; 881 struct ural_softc *sc = data->sc; 882 struct ifnet *ifp = &sc->sc_if; 883 int s; 884 885 if (status != USBD_NORMAL_COMPLETION) { 886 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 887 return; 888 889 printf("%s: could not transmit buffer: %s\n", 890 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 891 892 if (status == USBD_STALLED) 893 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 894 895 ifp->if_oerrors++; 896 return; 897 } 898 899 s = splnet(); 900 901 m_freem(data->m); 902 data->m = NULL; 903 ieee80211_free_node(data->ni); 904 data->ni = NULL; 905 906 sc->tx_queued--; 907 ifp->if_opackets++; 908 909 DPRINTFN(10, ("tx done\n")); 910 911 sc->sc_tx_timer = 0; 912 ifp->if_flags &= ~IFF_OACTIVE; 913 ural_start(ifp); 914 915 splx(s); 916 } 917 918 Static void 919 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 920 { 921 struct ural_rx_data *data = priv; 922 struct ural_softc *sc = data->sc; 923 struct ieee80211com *ic = &sc->sc_ic; 924 struct ifnet *ifp = &sc->sc_if; 925 struct ural_rx_desc *desc; 926 struct ieee80211_frame *wh; 927 struct ieee80211_node *ni; 928 struct mbuf *mnew, *m; 929 int s, len; 930 931 if (status != USBD_NORMAL_COMPLETION) { 932 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 933 return; 934 935 if (status == USBD_STALLED) 936 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 937 goto skip; 938 } 939 940 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 941 942 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 943 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 944 len)); 945 ifp->if_ierrors++; 946 goto skip; 947 } 948 949 /* rx descriptor is located at the end */ 950 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 951 952 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 953 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 954 /* 955 * This should not happen since we did not request to receive 956 * those frames when we filled RAL_TXRX_CSR2. 957 */ 958 DPRINTFN(5, ("PHY or CRC error\n")); 959 ifp->if_ierrors++; 960 goto skip; 961 } 962 963 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 964 if (mnew == NULL) { 965 ifp->if_ierrors++; 966 goto skip; 967 } 968 969 MCLGET(mnew, M_DONTWAIT); 970 if (!(mnew->m_flags & M_EXT)) { 971 ifp->if_ierrors++; 972 m_freem(mnew); 973 goto skip; 974 } 975 976 m = data->m; 977 data->m = mnew; 978 data->buf = mtod(data->m, uint8_t *); 979 980 /* finalize mbuf */ 981 m->m_pkthdr.rcvif = ifp; 982 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 983 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 984 985 s = splnet(); 986 987 #if NBPFILTER > 0 988 if (sc->sc_drvbpf != NULL) { 989 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 990 991 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 992 tap->wr_rate = ural_rxrate(desc); 993 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 994 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 995 tap->wr_antenna = sc->rx_ant; 996 tap->wr_antsignal = desc->rssi; 997 998 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 999 } 1000 #endif 1001 1002 wh = mtod(m, struct ieee80211_frame *); 1003 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1004 1005 /* send the frame to the 802.11 layer */ 1006 ieee80211_input(ic, m, ni, desc->rssi, 0); 1007 1008 /* node is no longer needed */ 1009 ieee80211_free_node(ni); 1010 1011 splx(s); 1012 1013 DPRINTFN(15, ("rx done\n")); 1014 1015 skip: /* setup a new transfer */ 1016 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1017 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1018 usbd_transfer(xfer); 1019 } 1020 1021 /* 1022 * Return the expected ack rate for a frame transmitted at rate `rate'. 1023 * XXX: this should depend on the destination node basic rate set. 1024 */ 1025 Static int 1026 ural_ack_rate(struct ieee80211com *ic, int rate) 1027 { 1028 switch (rate) { 1029 /* CCK rates */ 1030 case 2: 1031 return 2; 1032 case 4: 1033 case 11: 1034 case 22: 1035 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1036 1037 /* OFDM rates */ 1038 case 12: 1039 case 18: 1040 return 12; 1041 case 24: 1042 case 36: 1043 return 24; 1044 case 48: 1045 case 72: 1046 case 96: 1047 case 108: 1048 return 48; 1049 } 1050 1051 /* default to 1Mbps */ 1052 return 2; 1053 } 1054 1055 /* 1056 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1057 * The function automatically determines the operating mode depending on the 1058 * given rate. `flags' indicates whether short preamble is in use or not. 1059 */ 1060 Static uint16_t 1061 ural_txtime(int len, int rate, uint32_t flags) 1062 { 1063 uint16_t txtime; 1064 1065 if (RAL_RATE_IS_OFDM(rate)) { 1066 /* IEEE Std 802.11g-2003, pp. 37 */ 1067 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1068 txtime = 16 + 4 + 4 * txtime + 6; 1069 } else { 1070 /* IEEE Std 802.11b-1999, pp. 28 */ 1071 txtime = (16 * len + rate - 1) / rate; 1072 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1073 txtime += 72 + 24; 1074 else 1075 txtime += 144 + 48; 1076 } 1077 return txtime; 1078 } 1079 1080 Static uint8_t 1081 ural_plcp_signal(int rate) 1082 { 1083 switch (rate) { 1084 /* CCK rates (returned values are device-dependent) */ 1085 case 2: return 0x0; 1086 case 4: return 0x1; 1087 case 11: return 0x2; 1088 case 22: return 0x3; 1089 1090 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1091 case 12: return 0xb; 1092 case 18: return 0xf; 1093 case 24: return 0xa; 1094 case 36: return 0xe; 1095 case 48: return 0x9; 1096 case 72: return 0xd; 1097 case 96: return 0x8; 1098 case 108: return 0xc; 1099 1100 /* unsupported rates (should not get there) */ 1101 default: return 0xff; 1102 } 1103 } 1104 1105 Static void 1106 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1107 uint32_t flags, int len, int rate) 1108 { 1109 struct ieee80211com *ic = &sc->sc_ic; 1110 uint16_t plcp_length; 1111 int remainder; 1112 1113 desc->flags = htole32(flags); 1114 desc->flags |= htole32(RAL_TX_NEWSEQ); 1115 desc->flags |= htole32(len << 16); 1116 1117 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1118 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1119 1120 /* setup PLCP fields */ 1121 desc->plcp_signal = ural_plcp_signal(rate); 1122 desc->plcp_service = 4; 1123 1124 len += IEEE80211_CRC_LEN; 1125 if (RAL_RATE_IS_OFDM(rate)) { 1126 desc->flags |= htole32(RAL_TX_OFDM); 1127 1128 plcp_length = len & 0xfff; 1129 desc->plcp_length_hi = plcp_length >> 6; 1130 desc->plcp_length_lo = plcp_length & 0x3f; 1131 } else { 1132 plcp_length = (16 * len + rate - 1) / rate; 1133 if (rate == 22) { 1134 remainder = (16 * len) % 22; 1135 if (remainder != 0 && remainder < 7) 1136 desc->plcp_service |= RAL_PLCP_LENGEXT; 1137 } 1138 desc->plcp_length_hi = plcp_length >> 8; 1139 desc->plcp_length_lo = plcp_length & 0xff; 1140 1141 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1142 desc->plcp_signal |= 0x08; 1143 } 1144 1145 desc->iv = 0; 1146 desc->eiv = 0; 1147 } 1148 1149 #define RAL_TX_TIMEOUT 5000 1150 1151 Static int 1152 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1153 { 1154 struct ural_tx_desc *desc; 1155 usbd_xfer_handle xfer; 1156 uint8_t cmd = 0; 1157 usbd_status error; 1158 uint8_t *buf; 1159 int xferlen, rate; 1160 1161 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1162 1163 xfer = usbd_alloc_xfer(sc->sc_udev); 1164 if (xfer == NULL) 1165 return ENOMEM; 1166 1167 /* xfer length needs to be a multiple of two! */ 1168 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1169 1170 buf = usbd_alloc_buffer(xfer, xferlen); 1171 if (buf == NULL) { 1172 usbd_free_xfer(xfer); 1173 return ENOMEM; 1174 } 1175 1176 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1177 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1178 1179 error = usbd_sync_transfer(xfer); 1180 if (error != 0) { 1181 usbd_free_xfer(xfer); 1182 return error; 1183 } 1184 1185 desc = (struct ural_tx_desc *)buf; 1186 1187 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1188 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1189 m0->m_pkthdr.len, rate); 1190 1191 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1192 m0->m_pkthdr.len, rate, xferlen)); 1193 1194 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1195 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1196 1197 error = usbd_sync_transfer(xfer); 1198 usbd_free_xfer(xfer); 1199 1200 return error; 1201 } 1202 1203 Static int 1204 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1205 { 1206 struct ieee80211com *ic = &sc->sc_ic; 1207 struct ural_tx_desc *desc; 1208 struct ural_tx_data *data; 1209 struct ieee80211_frame *wh; 1210 uint32_t flags = 0; 1211 uint16_t dur; 1212 usbd_status error; 1213 int xferlen, rate; 1214 1215 data = &sc->tx_data[0]; 1216 desc = (struct ural_tx_desc *)data->buf; 1217 1218 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1219 1220 data->m = m0; 1221 data->ni = ni; 1222 1223 wh = mtod(m0, struct ieee80211_frame *); 1224 1225 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1226 flags |= RAL_TX_ACK; 1227 1228 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1229 *(uint16_t *)wh->i_dur = htole16(dur); 1230 1231 /* tell hardware to add timestamp for probe responses */ 1232 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1233 IEEE80211_FC0_TYPE_MGT && 1234 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1235 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1236 flags |= RAL_TX_TIMESTAMP; 1237 } 1238 1239 #if NBPFILTER > 0 1240 if (sc->sc_drvbpf != NULL) { 1241 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1242 1243 tap->wt_flags = 0; 1244 tap->wt_rate = rate; 1245 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1246 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1247 tap->wt_antenna = sc->tx_ant; 1248 1249 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1250 } 1251 #endif 1252 1253 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1254 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1255 1256 /* align end on a 2-bytes boundary */ 1257 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1258 1259 /* 1260 * No space left in the last URB to store the extra 2 bytes, force 1261 * sending of another URB. 1262 */ 1263 if ((xferlen % 64) == 0) 1264 xferlen += 2; 1265 1266 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1267 m0->m_pkthdr.len, rate, xferlen)); 1268 1269 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1270 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1271 ural_txeof); 1272 1273 error = usbd_transfer(data->xfer); 1274 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1275 m_freem(m0); 1276 return error; 1277 } 1278 1279 sc->tx_queued++; 1280 1281 return 0; 1282 } 1283 1284 Static int 1285 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1286 { 1287 struct ieee80211com *ic = &sc->sc_ic; 1288 struct ural_tx_desc *desc; 1289 struct ural_tx_data *data; 1290 struct ieee80211_frame *wh; 1291 struct ieee80211_key *k; 1292 uint32_t flags = 0; 1293 uint16_t dur; 1294 usbd_status error; 1295 int xferlen, rate; 1296 1297 wh = mtod(m0, struct ieee80211_frame *); 1298 1299 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1300 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1301 else 1302 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1303 1304 rate &= IEEE80211_RATE_VAL; 1305 1306 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1307 k = ieee80211_crypto_encap(ic, ni, m0); 1308 if (k == NULL) { 1309 m_freem(m0); 1310 return ENOBUFS; 1311 } 1312 1313 /* packet header may have moved, reset our local pointer */ 1314 wh = mtod(m0, struct ieee80211_frame *); 1315 } 1316 1317 data = &sc->tx_data[0]; 1318 desc = (struct ural_tx_desc *)data->buf; 1319 1320 data->m = m0; 1321 data->ni = ni; 1322 1323 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1324 flags |= RAL_TX_ACK; 1325 flags |= RAL_TX_RETRY(7); 1326 1327 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1328 ic->ic_flags) + RAL_SIFS; 1329 *(uint16_t *)wh->i_dur = htole16(dur); 1330 } 1331 1332 #if NBPFILTER > 0 1333 if (sc->sc_drvbpf != NULL) { 1334 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1335 1336 tap->wt_flags = 0; 1337 tap->wt_rate = rate; 1338 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1339 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1340 tap->wt_antenna = sc->tx_ant; 1341 1342 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1343 } 1344 #endif 1345 1346 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1347 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1348 1349 /* align end on a 2-bytes boundary */ 1350 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1351 1352 /* 1353 * No space left in the last URB to store the extra 2 bytes, force 1354 * sending of another URB. 1355 */ 1356 if ((xferlen % 64) == 0) 1357 xferlen += 2; 1358 1359 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1360 m0->m_pkthdr.len, rate, xferlen)); 1361 1362 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1363 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1364 ural_txeof); 1365 1366 error = usbd_transfer(data->xfer); 1367 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1368 return error; 1369 1370 sc->tx_queued++; 1371 1372 return 0; 1373 } 1374 1375 Static void 1376 ural_start(struct ifnet *ifp) 1377 { 1378 struct ural_softc *sc = ifp->if_softc; 1379 struct ieee80211com *ic = &sc->sc_ic; 1380 struct mbuf *m0; 1381 struct ether_header *eh; 1382 struct ieee80211_node *ni; 1383 1384 for (;;) { 1385 IF_POLL(&ic->ic_mgtq, m0); 1386 if (m0 != NULL) { 1387 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1388 ifp->if_flags |= IFF_OACTIVE; 1389 break; 1390 } 1391 IF_DEQUEUE(&ic->ic_mgtq, m0); 1392 1393 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1394 m0->m_pkthdr.rcvif = NULL; 1395 #if NBPFILTER > 0 1396 if (ic->ic_rawbpf != NULL) 1397 bpf_mtap(ic->ic_rawbpf, m0); 1398 #endif 1399 if (ural_tx_mgt(sc, m0, ni) != 0) 1400 break; 1401 1402 } else { 1403 if (ic->ic_state != IEEE80211_S_RUN) 1404 break; 1405 IFQ_DEQUEUE(&ifp->if_snd, m0); 1406 if (m0 == NULL) 1407 break; 1408 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1409 IF_PREPEND(&ifp->if_snd, m0); 1410 ifp->if_flags |= IFF_OACTIVE; 1411 break; 1412 } 1413 1414 if (m0->m_len < sizeof (struct ether_header) && 1415 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1416 continue; 1417 1418 eh = mtod(m0, struct ether_header *); 1419 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1420 if (ni == NULL) { 1421 m_freem(m0); 1422 continue; 1423 } 1424 #if NBPFILTER > 0 1425 if (ifp->if_bpf != NULL) 1426 bpf_mtap(ifp->if_bpf, m0); 1427 #endif 1428 m0 = ieee80211_encap(ic, m0, ni); 1429 if (m0 == NULL) { 1430 ieee80211_free_node(ni); 1431 continue; 1432 } 1433 #if NBPFILTER > 0 1434 if (ic->ic_rawbpf != NULL) 1435 bpf_mtap(ic->ic_rawbpf, m0); 1436 #endif 1437 if (ural_tx_data(sc, m0, ni) != 0) { 1438 ieee80211_free_node(ni); 1439 ifp->if_oerrors++; 1440 break; 1441 } 1442 } 1443 1444 sc->sc_tx_timer = 5; 1445 ifp->if_timer = 1; 1446 } 1447 } 1448 1449 Static void 1450 ural_watchdog(struct ifnet *ifp) 1451 { 1452 struct ural_softc *sc = ifp->if_softc; 1453 struct ieee80211com *ic = &sc->sc_ic; 1454 1455 ifp->if_timer = 0; 1456 1457 if (sc->sc_tx_timer > 0) { 1458 if (--sc->sc_tx_timer == 0) { 1459 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1460 /*ural_init(sc); XXX needs a process context! */ 1461 ifp->if_oerrors++; 1462 return; 1463 } 1464 ifp->if_timer = 1; 1465 } 1466 1467 ieee80211_watchdog(ic); 1468 } 1469 1470 /* 1471 * This function allows for fast channel switching in monitor mode (used by 1472 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1473 * generate a new beacon frame. 1474 */ 1475 Static int 1476 ural_reset(struct ifnet *ifp) 1477 { 1478 struct ural_softc *sc = ifp->if_softc; 1479 struct ieee80211com *ic = &sc->sc_ic; 1480 1481 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1482 return ENETRESET; 1483 1484 ural_set_chan(sc, ic->ic_curchan); 1485 1486 return 0; 1487 } 1488 1489 Static int 1490 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1491 { 1492 struct ural_softc *sc = ifp->if_softc; 1493 struct ieee80211com *ic = &sc->sc_ic; 1494 int s, error = 0; 1495 1496 s = splnet(); 1497 1498 switch (cmd) { 1499 case SIOCSIFFLAGS: 1500 if (ifp->if_flags & IFF_UP) { 1501 if (ifp->if_flags & IFF_RUNNING) 1502 ural_update_promisc(sc); 1503 else 1504 ural_init(ifp); 1505 } else { 1506 if (ifp->if_flags & IFF_RUNNING) 1507 ural_stop(ifp, 1); 1508 } 1509 break; 1510 1511 default: 1512 error = ieee80211_ioctl(ic, cmd, data); 1513 } 1514 1515 if (error == ENETRESET) { 1516 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1517 (IFF_UP | IFF_RUNNING)) 1518 ural_init(ifp); 1519 error = 0; 1520 } 1521 1522 splx(s); 1523 1524 return error; 1525 } 1526 1527 Static void 1528 ural_set_testmode(struct ural_softc *sc) 1529 { 1530 usb_device_request_t req; 1531 usbd_status error; 1532 1533 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1534 req.bRequest = RAL_VENDOR_REQUEST; 1535 USETW(req.wValue, 4); 1536 USETW(req.wIndex, 1); 1537 USETW(req.wLength, 0); 1538 1539 error = usbd_do_request(sc->sc_udev, &req, NULL); 1540 if (error != 0) { 1541 printf("%s: could not set test mode: %s\n", 1542 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1543 } 1544 } 1545 1546 Static void 1547 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1548 { 1549 usb_device_request_t req; 1550 usbd_status error; 1551 1552 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1553 req.bRequest = RAL_READ_EEPROM; 1554 USETW(req.wValue, 0); 1555 USETW(req.wIndex, addr); 1556 USETW(req.wLength, len); 1557 1558 error = usbd_do_request(sc->sc_udev, &req, buf); 1559 if (error != 0) { 1560 printf("%s: could not read EEPROM: %s\n", 1561 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1562 } 1563 } 1564 1565 Static uint16_t 1566 ural_read(struct ural_softc *sc, uint16_t reg) 1567 { 1568 usb_device_request_t req; 1569 usbd_status error; 1570 uint16_t val; 1571 1572 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1573 req.bRequest = RAL_READ_MAC; 1574 USETW(req.wValue, 0); 1575 USETW(req.wIndex, reg); 1576 USETW(req.wLength, sizeof (uint16_t)); 1577 1578 error = usbd_do_request(sc->sc_udev, &req, &val); 1579 if (error != 0) { 1580 printf("%s: could not read MAC register: %s\n", 1581 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1582 return 0; 1583 } 1584 1585 return le16toh(val); 1586 } 1587 1588 Static void 1589 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1590 { 1591 usb_device_request_t req; 1592 usbd_status error; 1593 1594 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1595 req.bRequest = RAL_READ_MULTI_MAC; 1596 USETW(req.wValue, 0); 1597 USETW(req.wIndex, reg); 1598 USETW(req.wLength, len); 1599 1600 error = usbd_do_request(sc->sc_udev, &req, buf); 1601 if (error != 0) { 1602 printf("%s: could not read MAC register: %s\n", 1603 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1604 } 1605 } 1606 1607 Static void 1608 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1609 { 1610 usb_device_request_t req; 1611 usbd_status error; 1612 1613 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1614 req.bRequest = RAL_WRITE_MAC; 1615 USETW(req.wValue, val); 1616 USETW(req.wIndex, reg); 1617 USETW(req.wLength, 0); 1618 1619 error = usbd_do_request(sc->sc_udev, &req, NULL); 1620 if (error != 0) { 1621 printf("%s: could not write MAC register: %s\n", 1622 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1623 } 1624 } 1625 1626 Static void 1627 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1628 { 1629 usb_device_request_t req; 1630 usbd_status error; 1631 1632 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1633 req.bRequest = RAL_WRITE_MULTI_MAC; 1634 USETW(req.wValue, 0); 1635 USETW(req.wIndex, reg); 1636 USETW(req.wLength, len); 1637 1638 error = usbd_do_request(sc->sc_udev, &req, buf); 1639 if (error != 0) { 1640 printf("%s: could not write MAC register: %s\n", 1641 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1642 } 1643 } 1644 1645 Static void 1646 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1647 { 1648 uint16_t tmp; 1649 int ntries; 1650 1651 for (ntries = 0; ntries < 5; ntries++) { 1652 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1653 break; 1654 } 1655 if (ntries == 5) { 1656 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1657 return; 1658 } 1659 1660 tmp = reg << 8 | val; 1661 ural_write(sc, RAL_PHY_CSR7, tmp); 1662 } 1663 1664 Static uint8_t 1665 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1666 { 1667 uint16_t val; 1668 int ntries; 1669 1670 val = RAL_BBP_WRITE | reg << 8; 1671 ural_write(sc, RAL_PHY_CSR7, val); 1672 1673 for (ntries = 0; ntries < 5; ntries++) { 1674 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1675 break; 1676 } 1677 if (ntries == 5) { 1678 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1679 return 0; 1680 } 1681 1682 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1683 } 1684 1685 Static void 1686 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1687 { 1688 uint32_t tmp; 1689 int ntries; 1690 1691 for (ntries = 0; ntries < 5; ntries++) { 1692 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1693 break; 1694 } 1695 if (ntries == 5) { 1696 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1697 return; 1698 } 1699 1700 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1701 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1702 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1703 1704 /* remember last written value in sc */ 1705 sc->rf_regs[reg] = val; 1706 1707 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1708 } 1709 1710 Static void 1711 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1712 { 1713 struct ieee80211com *ic = &sc->sc_ic; 1714 uint8_t power, tmp; 1715 u_int i, chan; 1716 1717 chan = ieee80211_chan2ieee(ic, c); 1718 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1719 return; 1720 1721 if (IEEE80211_IS_CHAN_2GHZ(c)) 1722 power = min(sc->txpow[chan - 1], 31); 1723 else 1724 power = 31; 1725 1726 /* adjust txpower using ifconfig settings */ 1727 power -= (100 - ic->ic_txpowlimit) / 8; 1728 1729 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1730 1731 switch (sc->rf_rev) { 1732 case RAL_RF_2522: 1733 ural_rf_write(sc, RAL_RF1, 0x00814); 1734 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1735 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1736 break; 1737 1738 case RAL_RF_2523: 1739 ural_rf_write(sc, RAL_RF1, 0x08804); 1740 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1741 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1742 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1743 break; 1744 1745 case RAL_RF_2524: 1746 ural_rf_write(sc, RAL_RF1, 0x0c808); 1747 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1748 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1749 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1750 break; 1751 1752 case RAL_RF_2525: 1753 ural_rf_write(sc, RAL_RF1, 0x08808); 1754 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1755 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1756 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1757 1758 ural_rf_write(sc, RAL_RF1, 0x08808); 1759 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1760 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1761 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1762 break; 1763 1764 case RAL_RF_2525E: 1765 ural_rf_write(sc, RAL_RF1, 0x08808); 1766 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1767 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1768 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1769 break; 1770 1771 case RAL_RF_2526: 1772 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1773 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1774 ural_rf_write(sc, RAL_RF1, 0x08804); 1775 1776 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1777 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1778 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1779 break; 1780 1781 /* dual-band RF */ 1782 case RAL_RF_5222: 1783 for (i = 0; ural_rf5222[i].chan != chan; i++); 1784 1785 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1786 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1787 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1788 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1789 break; 1790 } 1791 1792 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1793 ic->ic_state != IEEE80211_S_SCAN) { 1794 /* set Japan filter bit for channel 14 */ 1795 tmp = ural_bbp_read(sc, 70); 1796 1797 tmp &= ~RAL_JAPAN_FILTER; 1798 if (chan == 14) 1799 tmp |= RAL_JAPAN_FILTER; 1800 1801 ural_bbp_write(sc, 70, tmp); 1802 1803 /* clear CRC errors */ 1804 ural_read(sc, RAL_STA_CSR0); 1805 1806 DELAY(10000); 1807 ural_disable_rf_tune(sc); 1808 } 1809 } 1810 1811 /* 1812 * Disable RF auto-tuning. 1813 */ 1814 Static void 1815 ural_disable_rf_tune(struct ural_softc *sc) 1816 { 1817 uint32_t tmp; 1818 1819 if (sc->rf_rev != RAL_RF_2523) { 1820 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1821 ural_rf_write(sc, RAL_RF1, tmp); 1822 } 1823 1824 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1825 ural_rf_write(sc, RAL_RF3, tmp); 1826 1827 DPRINTFN(2, ("disabling RF autotune\n")); 1828 } 1829 1830 /* 1831 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1832 * synchronization. 1833 */ 1834 Static void 1835 ural_enable_tsf_sync(struct ural_softc *sc) 1836 { 1837 struct ieee80211com *ic = &sc->sc_ic; 1838 uint16_t logcwmin, preload, tmp; 1839 1840 /* first, disable TSF synchronization */ 1841 ural_write(sc, RAL_TXRX_CSR19, 0); 1842 1843 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1844 ural_write(sc, RAL_TXRX_CSR18, tmp); 1845 1846 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1847 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1848 tmp = logcwmin << 12 | preload; 1849 ural_write(sc, RAL_TXRX_CSR20, tmp); 1850 1851 /* finally, enable TSF synchronization */ 1852 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1853 if (ic->ic_opmode == IEEE80211_M_STA) 1854 tmp |= RAL_ENABLE_TSF_SYNC(1); 1855 else 1856 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1857 ural_write(sc, RAL_TXRX_CSR19, tmp); 1858 1859 DPRINTF(("enabling TSF synchronization\n")); 1860 } 1861 1862 Static void 1863 ural_update_slot(struct ifnet *ifp) 1864 { 1865 struct ural_softc *sc = ifp->if_softc; 1866 struct ieee80211com *ic = &sc->sc_ic; 1867 uint16_t slottime, sifs, eifs; 1868 1869 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1870 1871 /* 1872 * These settings may sound a bit inconsistent but this is what the 1873 * reference driver does. 1874 */ 1875 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1876 sifs = 16 - RAL_RXTX_TURNAROUND; 1877 eifs = 364; 1878 } else { 1879 sifs = 10 - RAL_RXTX_TURNAROUND; 1880 eifs = 64; 1881 } 1882 1883 ural_write(sc, RAL_MAC_CSR10, slottime); 1884 ural_write(sc, RAL_MAC_CSR11, sifs); 1885 ural_write(sc, RAL_MAC_CSR12, eifs); 1886 } 1887 1888 Static void 1889 ural_set_txpreamble(struct ural_softc *sc) 1890 { 1891 uint16_t tmp; 1892 1893 tmp = ural_read(sc, RAL_TXRX_CSR10); 1894 1895 tmp &= ~RAL_SHORT_PREAMBLE; 1896 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1897 tmp |= RAL_SHORT_PREAMBLE; 1898 1899 ural_write(sc, RAL_TXRX_CSR10, tmp); 1900 } 1901 1902 Static void 1903 ural_set_basicrates(struct ural_softc *sc) 1904 { 1905 struct ieee80211com *ic = &sc->sc_ic; 1906 1907 /* update basic rate set */ 1908 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1909 /* 11b basic rates: 1, 2Mbps */ 1910 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1911 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1912 /* 11a basic rates: 6, 12, 24Mbps */ 1913 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1914 } else { 1915 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1916 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1917 } 1918 } 1919 1920 Static void 1921 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1922 { 1923 uint16_t tmp; 1924 1925 tmp = bssid[0] | bssid[1] << 8; 1926 ural_write(sc, RAL_MAC_CSR5, tmp); 1927 1928 tmp = bssid[2] | bssid[3] << 8; 1929 ural_write(sc, RAL_MAC_CSR6, tmp); 1930 1931 tmp = bssid[4] | bssid[5] << 8; 1932 ural_write(sc, RAL_MAC_CSR7, tmp); 1933 1934 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1935 } 1936 1937 Static void 1938 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1939 { 1940 uint16_t tmp; 1941 1942 tmp = addr[0] | addr[1] << 8; 1943 ural_write(sc, RAL_MAC_CSR2, tmp); 1944 1945 tmp = addr[2] | addr[3] << 8; 1946 ural_write(sc, RAL_MAC_CSR3, tmp); 1947 1948 tmp = addr[4] | addr[5] << 8; 1949 ural_write(sc, RAL_MAC_CSR4, tmp); 1950 1951 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1952 } 1953 1954 Static void 1955 ural_update_promisc(struct ural_softc *sc) 1956 { 1957 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1958 uint32_t tmp; 1959 1960 tmp = ural_read(sc, RAL_TXRX_CSR2); 1961 1962 tmp &= ~RAL_DROP_NOT_TO_ME; 1963 if (!(ifp->if_flags & IFF_PROMISC)) 1964 tmp |= RAL_DROP_NOT_TO_ME; 1965 1966 ural_write(sc, RAL_TXRX_CSR2, tmp); 1967 1968 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1969 "entering" : "leaving")); 1970 } 1971 1972 Static const char * 1973 ural_get_rf(int rev) 1974 { 1975 switch (rev) { 1976 case RAL_RF_2522: return "RT2522"; 1977 case RAL_RF_2523: return "RT2523"; 1978 case RAL_RF_2524: return "RT2524"; 1979 case RAL_RF_2525: return "RT2525"; 1980 case RAL_RF_2525E: return "RT2525e"; 1981 case RAL_RF_2526: return "RT2526"; 1982 case RAL_RF_5222: return "RT5222"; 1983 default: return "unknown"; 1984 } 1985 } 1986 1987 Static void 1988 ural_read_eeprom(struct ural_softc *sc) 1989 { 1990 struct ieee80211com *ic = &sc->sc_ic; 1991 uint16_t val; 1992 1993 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1994 val = le16toh(val); 1995 sc->rf_rev = (val >> 11) & 0x7; 1996 sc->hw_radio = (val >> 10) & 0x1; 1997 sc->led_mode = (val >> 6) & 0x7; 1998 sc->rx_ant = (val >> 4) & 0x3; 1999 sc->tx_ant = (val >> 2) & 0x3; 2000 sc->nb_ant = val & 0x3; 2001 2002 /* read MAC address */ 2003 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2004 2005 /* read default values for BBP registers */ 2006 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2007 2008 /* read Tx power for all b/g channels */ 2009 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2010 } 2011 2012 Static int 2013 ural_bbp_init(struct ural_softc *sc) 2014 { 2015 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2016 int i, ntries; 2017 2018 /* wait for BBP to be ready */ 2019 for (ntries = 0; ntries < 100; ntries++) { 2020 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2021 break; 2022 DELAY(1000); 2023 } 2024 if (ntries == 100) { 2025 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 2026 return EIO; 2027 } 2028 2029 /* initialize BBP registers to default values */ 2030 for (i = 0; i < N(ural_def_bbp); i++) 2031 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2032 2033 #if 0 2034 /* initialize BBP registers to values stored in EEPROM */ 2035 for (i = 0; i < 16; i++) { 2036 if (sc->bbp_prom[i].reg == 0xff) 2037 continue; 2038 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2039 } 2040 #endif 2041 2042 return 0; 2043 #undef N 2044 } 2045 2046 Static void 2047 ural_set_txantenna(struct ural_softc *sc, int antenna) 2048 { 2049 uint16_t tmp; 2050 uint8_t tx; 2051 2052 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2053 if (antenna == 1) 2054 tx |= RAL_BBP_ANTA; 2055 else if (antenna == 2) 2056 tx |= RAL_BBP_ANTB; 2057 else 2058 tx |= RAL_BBP_DIVERSITY; 2059 2060 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2061 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2062 sc->rf_rev == RAL_RF_5222) 2063 tx |= RAL_BBP_FLIPIQ; 2064 2065 ural_bbp_write(sc, RAL_BBP_TX, tx); 2066 2067 /* update values in PHY_CSR5 and PHY_CSR6 */ 2068 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2069 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2070 2071 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2072 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2073 } 2074 2075 Static void 2076 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2077 { 2078 uint8_t rx; 2079 2080 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2081 if (antenna == 1) 2082 rx |= RAL_BBP_ANTA; 2083 else if (antenna == 2) 2084 rx |= RAL_BBP_ANTB; 2085 else 2086 rx |= RAL_BBP_DIVERSITY; 2087 2088 /* need to force no I/Q flip for RF 2525e and 2526 */ 2089 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2090 rx &= ~RAL_BBP_FLIPIQ; 2091 2092 ural_bbp_write(sc, RAL_BBP_RX, rx); 2093 } 2094 2095 Static int 2096 ural_init(struct ifnet *ifp) 2097 { 2098 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2099 struct ural_softc *sc = ifp->if_softc; 2100 struct ieee80211com *ic = &sc->sc_ic; 2101 struct ieee80211_key *wk; 2102 struct ural_rx_data *data; 2103 uint16_t tmp; 2104 usbd_status error; 2105 int i, ntries; 2106 2107 ural_set_testmode(sc); 2108 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2109 2110 ural_stop(ifp, 0); 2111 2112 /* initialize MAC registers to default values */ 2113 for (i = 0; i < N(ural_def_mac); i++) 2114 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2115 2116 /* wait for BBP and RF to wake up (this can take a long time!) */ 2117 for (ntries = 0; ntries < 100; ntries++) { 2118 tmp = ural_read(sc, RAL_MAC_CSR17); 2119 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2120 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2121 break; 2122 DELAY(1000); 2123 } 2124 if (ntries == 100) { 2125 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2126 USBDEVNAME(sc->sc_dev)); 2127 error = EIO; 2128 goto fail; 2129 } 2130 2131 /* we're ready! */ 2132 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2133 2134 /* set basic rate set (will be updated later) */ 2135 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2136 2137 error = ural_bbp_init(sc); 2138 if (error != 0) 2139 goto fail; 2140 2141 /* set default BSS channel */ 2142 ural_set_chan(sc, ic->ic_curchan); 2143 2144 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2145 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2146 2147 ural_set_txantenna(sc, sc->tx_ant); 2148 ural_set_rxantenna(sc, sc->rx_ant); 2149 2150 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2151 ural_set_macaddr(sc, ic->ic_myaddr); 2152 2153 /* 2154 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2155 */ 2156 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2157 wk = &ic->ic_crypto.cs_nw_keys[i]; 2158 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2159 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2160 } 2161 2162 /* 2163 * Allocate xfer for AMRR statistics requests. 2164 */ 2165 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2166 if (sc->amrr_xfer == NULL) { 2167 printf("%s: could not allocate AMRR xfer\n", 2168 USBDEVNAME(sc->sc_dev)); 2169 goto fail; 2170 } 2171 2172 /* 2173 * Open Tx and Rx USB bulk pipes. 2174 */ 2175 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2176 &sc->sc_tx_pipeh); 2177 if (error != 0) { 2178 printf("%s: could not open Tx pipe: %s\n", 2179 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2180 goto fail; 2181 } 2182 2183 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2184 &sc->sc_rx_pipeh); 2185 if (error != 0) { 2186 printf("%s: could not open Rx pipe: %s\n", 2187 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2188 goto fail; 2189 } 2190 2191 /* 2192 * Allocate Tx and Rx xfer queues. 2193 */ 2194 error = ural_alloc_tx_list(sc); 2195 if (error != 0) { 2196 printf("%s: could not allocate Tx list\n", 2197 USBDEVNAME(sc->sc_dev)); 2198 goto fail; 2199 } 2200 2201 error = ural_alloc_rx_list(sc); 2202 if (error != 0) { 2203 printf("%s: could not allocate Rx list\n", 2204 USBDEVNAME(sc->sc_dev)); 2205 goto fail; 2206 } 2207 2208 /* 2209 * Start up the receive pipe. 2210 */ 2211 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2212 data = &sc->rx_data[i]; 2213 2214 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2215 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2216 usbd_transfer(data->xfer); 2217 } 2218 2219 /* kick Rx */ 2220 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2221 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2222 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2223 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2224 tmp |= RAL_DROP_TODS; 2225 if (!(ifp->if_flags & IFF_PROMISC)) 2226 tmp |= RAL_DROP_NOT_TO_ME; 2227 } 2228 ural_write(sc, RAL_TXRX_CSR2, tmp); 2229 2230 ifp->if_flags &= ~IFF_OACTIVE; 2231 ifp->if_flags |= IFF_RUNNING; 2232 2233 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2234 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2235 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2236 } else 2237 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2238 2239 return 0; 2240 2241 fail: ural_stop(ifp, 1); 2242 return error; 2243 #undef N 2244 } 2245 2246 Static void 2247 ural_stop(struct ifnet *ifp, int disable __unused) 2248 { 2249 struct ural_softc *sc = ifp->if_softc; 2250 struct ieee80211com *ic = &sc->sc_ic; 2251 2252 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2253 2254 sc->sc_tx_timer = 0; 2255 ifp->if_timer = 0; 2256 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2257 2258 /* disable Rx */ 2259 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2260 2261 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2262 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2263 ural_write(sc, RAL_MAC_CSR1, 0); 2264 2265 if (sc->amrr_xfer != NULL) { 2266 usbd_free_xfer(sc->amrr_xfer); 2267 sc->amrr_xfer = NULL; 2268 } 2269 2270 if (sc->sc_rx_pipeh != NULL) { 2271 usbd_abort_pipe(sc->sc_rx_pipeh); 2272 usbd_close_pipe(sc->sc_rx_pipeh); 2273 sc->sc_rx_pipeh = NULL; 2274 } 2275 2276 if (sc->sc_tx_pipeh != NULL) { 2277 usbd_abort_pipe(sc->sc_tx_pipeh); 2278 usbd_close_pipe(sc->sc_tx_pipeh); 2279 sc->sc_tx_pipeh = NULL; 2280 } 2281 2282 ural_free_rx_list(sc); 2283 ural_free_tx_list(sc); 2284 } 2285 2286 int 2287 ural_activate(device_ptr_t self, enum devact act) 2288 { 2289 struct ural_softc *sc = (struct ural_softc *)self; 2290 2291 switch (act) { 2292 case DVACT_ACTIVATE: 2293 return EOPNOTSUPP; 2294 break; 2295 2296 case DVACT_DEACTIVATE: 2297 if_deactivate(&sc->sc_if); 2298 break; 2299 } 2300 2301 return 0; 2302 } 2303 2304 Static void 2305 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2306 { 2307 int i; 2308 2309 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2310 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2311 2312 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2313 2314 /* set rate to some reasonable initial value */ 2315 for (i = ni->ni_rates.rs_nrates - 1; 2316 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2317 i--); 2318 ni->ni_txrate = i; 2319 2320 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2321 } 2322 2323 Static void 2324 ural_amrr_timeout(void *arg) 2325 { 2326 struct ural_softc *sc = (struct ural_softc *)arg; 2327 usb_device_request_t req; 2328 int s; 2329 2330 s = splusb(); 2331 2332 /* 2333 * Asynchronously read statistic registers (cleared by read). 2334 */ 2335 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2336 req.bRequest = RAL_READ_MULTI_MAC; 2337 USETW(req.wValue, 0); 2338 USETW(req.wIndex, RAL_STA_CSR0); 2339 USETW(req.wLength, sizeof sc->sta); 2340 2341 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2342 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2343 ural_amrr_update); 2344 (void)usbd_transfer(sc->amrr_xfer); 2345 2346 splx(s); 2347 } 2348 2349 Static void 2350 ural_amrr_update(usbd_xfer_handle xfer __unused, usbd_private_handle priv, 2351 usbd_status status) 2352 { 2353 struct ural_softc *sc = (struct ural_softc *)priv; 2354 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2355 2356 if (status != USBD_NORMAL_COMPLETION) { 2357 printf("%s: could not retrieve Tx statistics - " 2358 "cancelling automatic rate control\n", 2359 USBDEVNAME(sc->sc_dev)); 2360 return; 2361 } 2362 2363 /* count TX retry-fail as Tx errors */ 2364 ifp->if_oerrors += sc->sta[9]; 2365 2366 sc->amn.amn_retrycnt = 2367 sc->sta[7] + /* TX one-retry ok count */ 2368 sc->sta[8] + /* TX more-retry ok count */ 2369 sc->sta[9]; /* TX retry-fail count */ 2370 2371 sc->amn.amn_txcnt = 2372 sc->amn.amn_retrycnt + 2373 sc->sta[6]; /* TX no-retry ok count */ 2374 2375 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2376 2377 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2378 } 2379
Indexes created Mon Sep 29 21:09:56 GMT 2025