if_ural.c revision 1.18.10.3
1 /* $NetBSD: if_ural.c,v 1.18.10.3 2007/06/17 00:58:16 itohy Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.18.10.3 2007/06/17 00:58:16 itohy Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 #include <dev/usb/usb_ethersubr.h> 71 72 #include <dev/usb/if_uralreg.h> 73 #include <dev/usb/if_uralvar.h> 74 75 #ifdef USB_DEBUG 76 #define URAL_DEBUG 77 #endif 78 79 #ifdef URAL_DEBUG 80 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 81 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 82 int ural_debug = 0; 83 #else 84 #define DPRINTF(x) 85 #define DPRINTFN(n, x) 86 #endif 87 88 /* various supported device vendors/products */ 89 static const struct usb_devno ural_devs[] = { 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 91 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 92 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 95 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 96 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 97 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 98 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 101 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 104 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 106 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 107 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 108 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 109 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 110 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 111 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 112 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 113 }; 114 115 #if 0 116 Static int ural_alloc_tx_list(struct ural_softc *); 117 #endif 118 Static void ural_free_tx_list(struct ural_softc *); 119 #if 0 120 Static int ural_alloc_rx_list(struct ural_softc *); 121 #endif 122 Static void ural_free_rx_list(struct ural_softc *); 123 Static int ural_media_change(struct ifnet *); 124 Static void ural_next_scan(void *); 125 Static void ural_task(void *); 126 Static int ural_newstate(struct ieee80211com *, 127 enum ieee80211_state, int); 128 Static int ural_rxrate(struct ural_rx_desc *); 129 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 130 usbd_status); 131 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 132 usbd_status); 133 Static int ural_ack_rate(struct ieee80211com *, int); 134 Static uint16_t ural_txtime(int, int, uint32_t); 135 Static uint8_t ural_plcp_signal(int); 136 Static void ural_setup_tx_desc(struct ural_softc *, 137 struct ural_tx_desc *, uint32_t, int, int); 138 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 139 struct ieee80211_node *); 140 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 141 struct ieee80211_node *); 142 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 143 struct ieee80211_node *); 144 Static void ural_start(struct ifnet *); 145 Static void ural_watchdog(struct ifnet *); 146 Static int ural_reset(struct ifnet *); 147 Static int ural_ioctl(struct ifnet *, u_long, usb_ioctlarg_t); 148 Static void ural_set_testmode(struct ural_softc *); 149 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 150 int); 151 Static uint16_t ural_read(struct ural_softc *, uint16_t); 152 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 153 int); 154 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 155 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 156 int); 157 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 158 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 159 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 160 Static void ural_set_chan(struct ural_softc *, 161 struct ieee80211_channel *); 162 Static void ural_disable_rf_tune(struct ural_softc *); 163 Static void ural_enable_tsf_sync(struct ural_softc *); 164 Static void ural_update_slot(struct ifnet *); 165 Static void ural_set_txpreamble(struct ural_softc *); 166 Static void ural_set_basicrates(struct ural_softc *); 167 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 168 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 169 Static void ural_update_promisc(struct ural_softc *); 170 Static const char *ural_get_rf(int); 171 Static void ural_read_eeprom(struct ural_softc *); 172 Static int ural_bbp_init(struct ural_softc *); 173 Static void ural_set_txantenna(struct ural_softc *, int); 174 Static void ural_set_rxantenna(struct ural_softc *, int); 175 Static int ural_init(struct ifnet *); 176 Static void ural_stop(struct ifnet *, int); 177 Static void ural_amrr_start(struct ural_softc *, 178 struct ieee80211_node *); 179 Static void ural_amrr_timeout(void *); 180 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 181 usbd_status status); 182 183 /* 184 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 185 */ 186 static const struct ieee80211_rateset ural_rateset_11a = 187 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 188 189 static const struct ieee80211_rateset ural_rateset_11b = 190 { 4, { 2, 4, 11, 22 } }; 191 192 static const struct ieee80211_rateset ural_rateset_11g = 193 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 194 195 /* 196 * Default values for MAC registers; values taken from the reference driver. 197 */ 198 static const struct { 199 uint16_t reg; 200 uint16_t val; 201 } ural_def_mac[] = { 202 { RAL_TXRX_CSR5, 0x8c8d }, 203 { RAL_TXRX_CSR6, 0x8b8a }, 204 { RAL_TXRX_CSR7, 0x8687 }, 205 { RAL_TXRX_CSR8, 0x0085 }, 206 { RAL_MAC_CSR13, 0x1111 }, 207 { RAL_MAC_CSR14, 0x1e11 }, 208 { RAL_TXRX_CSR21, 0xe78f }, 209 { RAL_MAC_CSR9, 0xff1d }, 210 { RAL_MAC_CSR11, 0x0002 }, 211 { RAL_MAC_CSR22, 0x0053 }, 212 { RAL_MAC_CSR15, 0x0000 }, 213 { RAL_MAC_CSR8, 0x0780 }, 214 { RAL_TXRX_CSR19, 0x0000 }, 215 { RAL_TXRX_CSR18, 0x005a }, 216 { RAL_PHY_CSR2, 0x0000 }, 217 { RAL_TXRX_CSR0, 0x1ec0 }, 218 { RAL_PHY_CSR4, 0x000f } 219 }; 220 221 /* 222 * Default values for BBP registers; values taken from the reference driver. 223 */ 224 static const struct { 225 uint8_t reg; 226 uint8_t val; 227 } ural_def_bbp[] = { 228 { 3, 0x02 }, 229 { 4, 0x19 }, 230 { 14, 0x1c }, 231 { 15, 0x30 }, 232 { 16, 0xac }, 233 { 17, 0x48 }, 234 { 18, 0x18 }, 235 { 19, 0xff }, 236 { 20, 0x1e }, 237 { 21, 0x08 }, 238 { 22, 0x08 }, 239 { 23, 0x08 }, 240 { 24, 0x80 }, 241 { 25, 0x50 }, 242 { 26, 0x08 }, 243 { 27, 0x23 }, 244 { 30, 0x10 }, 245 { 31, 0x2b }, 246 { 32, 0xb9 }, 247 { 34, 0x12 }, 248 { 35, 0x50 }, 249 { 39, 0xc4 }, 250 { 40, 0x02 }, 251 { 41, 0x60 }, 252 { 53, 0x10 }, 253 { 54, 0x18 }, 254 { 56, 0x08 }, 255 { 57, 0x10 }, 256 { 58, 0x08 }, 257 { 61, 0x60 }, 258 { 62, 0x10 }, 259 { 75, 0xff } 260 }; 261 262 /* 263 * Default values for RF register R2 indexed by channel numbers. 264 */ 265 static const uint32_t ural_rf2522_r2[] = { 266 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 267 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 268 }; 269 270 static const uint32_t ural_rf2523_r2[] = { 271 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 272 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 273 }; 274 275 static const uint32_t ural_rf2524_r2[] = { 276 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 277 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 278 }; 279 280 static const uint32_t ural_rf2525_r2[] = { 281 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 282 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 283 }; 284 285 static const uint32_t ural_rf2525_hi_r2[] = { 286 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 287 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 288 }; 289 290 static const uint32_t ural_rf2525e_r2[] = { 291 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 292 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 293 }; 294 295 static const uint32_t ural_rf2526_hi_r2[] = { 296 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 297 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 298 }; 299 300 static const uint32_t ural_rf2526_r2[] = { 301 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 302 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 303 }; 304 305 /* 306 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 307 * values taken from the reference driver. 308 */ 309 static const struct { 310 uint8_t chan; 311 uint32_t r1; 312 uint32_t r2; 313 uint32_t r4; 314 } ural_rf5222[] = { 315 { 1, 0x08808, 0x0044d, 0x00282 }, 316 { 2, 0x08808, 0x0044e, 0x00282 }, 317 { 3, 0x08808, 0x0044f, 0x00282 }, 318 { 4, 0x08808, 0x00460, 0x00282 }, 319 { 5, 0x08808, 0x00461, 0x00282 }, 320 { 6, 0x08808, 0x00462, 0x00282 }, 321 { 7, 0x08808, 0x00463, 0x00282 }, 322 { 8, 0x08808, 0x00464, 0x00282 }, 323 { 9, 0x08808, 0x00465, 0x00282 }, 324 { 10, 0x08808, 0x00466, 0x00282 }, 325 { 11, 0x08808, 0x00467, 0x00282 }, 326 { 12, 0x08808, 0x00468, 0x00282 }, 327 { 13, 0x08808, 0x00469, 0x00282 }, 328 { 14, 0x08808, 0x0046b, 0x00286 }, 329 330 { 36, 0x08804, 0x06225, 0x00287 }, 331 { 40, 0x08804, 0x06226, 0x00287 }, 332 { 44, 0x08804, 0x06227, 0x00287 }, 333 { 48, 0x08804, 0x06228, 0x00287 }, 334 { 52, 0x08804, 0x06229, 0x00287 }, 335 { 56, 0x08804, 0x0622a, 0x00287 }, 336 { 60, 0x08804, 0x0622b, 0x00287 }, 337 { 64, 0x08804, 0x0622c, 0x00287 }, 338 339 { 100, 0x08804, 0x02200, 0x00283 }, 340 { 104, 0x08804, 0x02201, 0x00283 }, 341 { 108, 0x08804, 0x02202, 0x00283 }, 342 { 112, 0x08804, 0x02203, 0x00283 }, 343 { 116, 0x08804, 0x02204, 0x00283 }, 344 { 120, 0x08804, 0x02205, 0x00283 }, 345 { 124, 0x08804, 0x02206, 0x00283 }, 346 { 128, 0x08804, 0x02207, 0x00283 }, 347 { 132, 0x08804, 0x02208, 0x00283 }, 348 { 136, 0x08804, 0x02209, 0x00283 }, 349 { 140, 0x08804, 0x0220a, 0x00283 }, 350 351 { 149, 0x08808, 0x02429, 0x00281 }, 352 { 153, 0x08808, 0x0242b, 0x00281 }, 353 { 157, 0x08808, 0x0242d, 0x00281 }, 354 { 161, 0x08808, 0x0242f, 0x00281 } 355 }; 356 357 USB_DECLARE_DRIVER(ural); 358 359 USB_MATCH(ural) 360 { 361 USB_MATCH_START(ural, uaa); 362 363 if (uaa->iface != NULL) 364 return UMATCH_NONE; 365 366 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 367 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 368 } 369 370 USB_ATTACH(ural) 371 { 372 USB_ATTACH_START(ural, sc, uaa); 373 struct ieee80211com *ic = &sc->sc_ic; 374 struct ifnet *ifp = &sc->sc_if; 375 usb_interface_descriptor_t *id; 376 usb_endpoint_descriptor_t *ed; 377 usbd_status error; 378 char *devinfop; 379 int i; 380 381 sc->sc_udev = uaa->device; 382 383 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 384 USB_ATTACH_SETUP; 385 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 386 usbd_devinfo_free(devinfop); 387 388 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 389 printf("%s: could not set configuration no\n", 390 USBDEVNAME(sc->sc_dev)); 391 USB_ATTACH_ERROR_RETURN; 392 } 393 394 /* get the first interface handle */ 395 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 396 &sc->sc_iface); 397 if (error != 0) { 398 printf("%s: could not get interface handle\n", 399 USBDEVNAME(sc->sc_dev)); 400 USB_ATTACH_ERROR_RETURN; 401 } 402 403 /* 404 * Find endpoints. 405 */ 406 id = usbd_get_interface_descriptor(sc->sc_iface); 407 408 sc->sc_rx_no = sc->sc_tx_no = -1; 409 for (i = 0; i < id->bNumEndpoints; i++) { 410 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 411 if (ed == NULL) { 412 printf("%s: no endpoint descriptor for %d\n", 413 USBDEVNAME(sc->sc_dev), i); 414 USB_ATTACH_ERROR_RETURN; 415 } 416 417 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 418 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 419 sc->sc_rx_no = ed->bEndpointAddress; 420 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 421 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 422 sc->sc_tx_no = ed->bEndpointAddress; 423 } 424 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 425 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 426 USB_ATTACH_ERROR_RETURN; 427 } 428 429 usb_init_task(&sc->sc_task, ural_task, sc); 430 callout_init(&sc->scan_ch); 431 sc->amrr.amrr_min_success_threshold = 1; 432 sc->amrr.amrr_min_success_threshold = 15; 433 callout_init(&sc->amrr_ch); 434 435 /* retrieve RT2570 rev. no */ 436 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 437 438 /* retrieve MAC address and various other things from EEPROM */ 439 ural_read_eeprom(sc); 440 441 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 442 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 443 444 ifp->if_softc = sc; 445 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 446 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 447 ifp->if_init = ural_init; 448 ifp->if_ioctl = ural_ioctl; 449 ifp->if_start = ural_start; 450 ifp->if_watchdog = ural_watchdog; 451 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 452 IFQ_SET_READY(&ifp->if_snd); 453 454 ic->ic_ifp = ifp; 455 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 456 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 457 ic->ic_state = IEEE80211_S_INIT; 458 459 /* set device capabilities */ 460 ic->ic_caps = 461 IEEE80211_C_IBSS | /* IBSS mode supported */ 462 IEEE80211_C_MONITOR | /* monitor mode supported */ 463 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 464 IEEE80211_C_TXPMGT | /* tx power management */ 465 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 466 IEEE80211_C_SHSLOT | /* short slot time supported */ 467 IEEE80211_C_WPA; /* 802.11i */ 468 469 if (sc->rf_rev == RAL_RF_5222) { 470 /* set supported .11a rates */ 471 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 472 473 /* set supported .11a channels */ 474 for (i = 36; i <= 64; i += 4) { 475 ic->ic_channels[i].ic_freq = 476 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 477 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 478 } 479 for (i = 100; i <= 140; i += 4) { 480 ic->ic_channels[i].ic_freq = 481 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 482 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 483 } 484 for (i = 149; i <= 161; i += 4) { 485 ic->ic_channels[i].ic_freq = 486 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 487 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 488 } 489 } 490 491 /* set supported .11b and .11g rates */ 492 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 493 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 494 495 /* set supported .11b and .11g channels (1 through 14) */ 496 for (i = 1; i <= 14; i++) { 497 ic->ic_channels[i].ic_freq = 498 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 499 ic->ic_channels[i].ic_flags = 500 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 501 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 502 } 503 504 if_attach(ifp); 505 ieee80211_ifattach(ic); 506 ic->ic_reset = ural_reset; 507 508 /* override state transition machine */ 509 sc->sc_newstate = ic->ic_newstate; 510 ic->ic_newstate = ural_newstate; 511 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 512 513 #if NBPFILTER > 0 514 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 515 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 516 517 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 518 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 519 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 520 521 sc->sc_txtap_len = sizeof sc->sc_txtapu; 522 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 523 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 524 #endif 525 526 ieee80211_announce(ic); 527 528 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 529 USBDEV(sc->sc_dev)); 530 531 USB_ATTACH_SUCCESS_RETURN; 532 } 533 534 USB_DETACH(ural) 535 { 536 USB_DETACH_START(ural, sc); 537 struct ieee80211com *ic = &sc->sc_ic; 538 struct ifnet *ifp = &sc->sc_if; 539 int s; 540 541 s = splusb(); 542 543 ural_stop(ifp, 1); 544 usb_rem_task(sc->sc_udev, &sc->sc_task); 545 callout_stop(&sc->scan_ch); 546 callout_stop(&sc->amrr_ch); 547 548 if (sc->sc_rx_pipeh != NULL) 549 usbd_abort_pipe(sc->sc_rx_pipeh); 550 551 if (sc->sc_tx_pipeh != NULL) 552 usbd_abort_pipe(sc->sc_tx_pipeh); 553 554 ural_free_rx_list(sc); 555 ural_free_tx_list(sc); 556 557 if (sc->amrr_xfer != NULL) { 558 usbd_free_xfer(sc->amrr_xfer); 559 sc->amrr_xfer = NULL; 560 } 561 562 if (sc->sc_rx_pipeh != NULL) 563 usbd_close_pipe(sc->sc_rx_pipeh); 564 565 if (sc->sc_tx_pipeh != NULL) 566 usbd_close_pipe(sc->sc_tx_pipeh); 567 568 #if NBPFILTER > 0 569 bpfdetach(ifp); 570 #endif 571 ieee80211_ifdetach(ic); 572 if_detach(ifp); 573 574 splx(s); 575 576 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 577 USBDEV(sc->sc_dev)); 578 579 return 0; 580 } 581 582 Static void 583 ural_free_tx_list(struct ural_softc *sc) 584 { 585 int i; 586 587 usb_ether_tx_list_free(sc->tx_data, RAL_TX_LIST_COUNT); 588 589 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 590 if (sc->tx_ni[i] != NULL) { 591 ieee80211_free_node(sc->tx_ni[i]); 592 sc->tx_ni[i] = NULL; 593 } 594 } 595 } 596 597 Static void 598 ural_free_rx_list(struct ural_softc *sc) 599 { 600 601 usb_ether_rx_list_free(sc->rx_data, RAL_RX_LIST_COUNT); 602 } 603 604 Static int 605 ural_media_change(struct ifnet *ifp) 606 { 607 int error; 608 609 error = ieee80211_media_change(ifp); 610 if (error != ENETRESET) 611 return error; 612 613 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 614 ural_init(ifp); 615 616 return 0; 617 } 618 619 /* 620 * This function is called periodically (every 200ms) during scanning to 621 * switch from one channel to another. 622 */ 623 Static void 624 ural_next_scan(void *arg) 625 { 626 struct ural_softc *sc = arg; 627 struct ieee80211com *ic = &sc->sc_ic; 628 629 if (ic->ic_state == IEEE80211_S_SCAN) 630 ieee80211_next_scan(ic); 631 } 632 633 Static void 634 ural_task(void *arg) 635 { 636 struct ural_softc *sc = arg; 637 struct ieee80211com *ic = &sc->sc_ic; 638 enum ieee80211_state ostate; 639 struct ieee80211_node *ni; 640 struct mbuf *m; 641 642 ostate = ic->ic_state; 643 644 switch (sc->sc_state) { 645 case IEEE80211_S_INIT: 646 if (ostate == IEEE80211_S_RUN) { 647 /* abort TSF synchronization */ 648 ural_write(sc, RAL_TXRX_CSR19, 0); 649 650 /* force tx led to stop blinking */ 651 ural_write(sc, RAL_MAC_CSR20, 0); 652 } 653 break; 654 655 case IEEE80211_S_SCAN: 656 ural_set_chan(sc, ic->ic_curchan); 657 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc); 658 break; 659 660 case IEEE80211_S_AUTH: 661 ural_set_chan(sc, ic->ic_curchan); 662 break; 663 664 case IEEE80211_S_ASSOC: 665 ural_set_chan(sc, ic->ic_curchan); 666 break; 667 668 case IEEE80211_S_RUN: 669 ural_set_chan(sc, ic->ic_curchan); 670 671 ni = ic->ic_bss; 672 673 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 674 ural_update_slot(ic->ic_ifp); 675 ural_set_txpreamble(sc); 676 ural_set_basicrates(sc); 677 ural_set_bssid(sc, ni->ni_bssid); 678 } 679 680 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 681 ic->ic_opmode == IEEE80211_M_IBSS) { 682 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 683 if (m == NULL) { 684 printf("%s: could not allocate beacon\n", 685 USBDEVNAME(sc->sc_dev)); 686 return; 687 } 688 689 if (ural_tx_bcn(sc, m, ni) != 0) { 690 printf("%s: could not send beacon\n", 691 USBDEVNAME(sc->sc_dev)); 692 return; 693 } 694 } 695 696 /* make tx led blink on tx (controlled by ASIC) */ 697 ural_write(sc, RAL_MAC_CSR20, 1); 698 699 if (ic->ic_opmode != IEEE80211_M_MONITOR) 700 ural_enable_tsf_sync(sc); 701 702 /* enable automatic rate adaptation in STA mode */ 703 if (ic->ic_opmode == IEEE80211_M_STA && 704 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 705 ural_amrr_start(sc, ni); 706 707 break; 708 } 709 710 sc->sc_newstate(ic, sc->sc_state, -1); 711 } 712 713 Static int 714 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 715 int arg) 716 { 717 struct ural_softc *sc = ic->ic_ifp->if_softc; 718 719 usb_rem_task(sc->sc_udev, &sc->sc_task); 720 callout_stop(&sc->scan_ch); 721 callout_stop(&sc->amrr_ch); 722 723 /* do it in a process context */ 724 sc->sc_state = nstate; 725 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 726 727 return 0; 728 } 729 730 /* quickly determine if a given rate is CCK or OFDM */ 731 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 732 733 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 734 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 735 736 #define RAL_SIFS 10 /* us */ 737 738 #define RAL_RXTX_TURNAROUND 5 /* us */ 739 740 /* 741 * This function is only used by the Rx radiotap code. 742 */ 743 Static int 744 ural_rxrate(struct ural_rx_desc *desc) 745 { 746 if (le32toh(desc->flags) & RAL_RX_OFDM) { 747 /* reverse function of ural_plcp_signal */ 748 switch (desc->rate) { 749 case 0xb: return 12; 750 case 0xf: return 18; 751 case 0xa: return 24; 752 case 0xe: return 36; 753 case 0x9: return 48; 754 case 0xd: return 72; 755 case 0x8: return 96; 756 case 0xc: return 108; 757 } 758 } else { 759 if (desc->rate == 10) 760 return 2; 761 if (desc->rate == 20) 762 return 4; 763 if (desc->rate == 55) 764 return 11; 765 if (desc->rate == 110) 766 return 22; 767 } 768 return 2; /* should not get there */ 769 } 770 771 Static void 772 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 773 usbd_status status) 774 { 775 struct ue_chain *data = priv; 776 struct ural_softc *sc = (void *)data->ue_dev; 777 struct ifnet *ifp = &sc->sc_if; 778 int s; 779 780 usbd_unmap_buffer(xfer); 781 782 if (status != USBD_NORMAL_COMPLETION) { 783 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 784 return; 785 786 printf("%s: could not transmit buffer: %s\n", 787 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 788 789 if (status == USBD_STALLED) 790 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 791 792 ifp->if_oerrors++; 793 return; 794 } 795 796 s = splnet(); 797 798 m_freem(data->ue_mbuf); 799 data->ue_mbuf = NULL; 800 ieee80211_free_node(sc->tx_ni[data->ue_idx]); 801 sc->tx_ni[data->ue_idx] = NULL; 802 803 sc->tx_queued--; 804 ifp->if_opackets++; 805 806 DPRINTFN(10, ("tx done\n")); 807 808 sc->sc_tx_timer = 0; 809 ifp->if_flags &= ~IFF_OACTIVE; 810 ural_start(ifp); 811 812 splx(s); 813 } 814 815 Static void 816 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 817 { 818 struct ue_chain *data = priv; 819 struct ural_softc *sc = (void *)data->ue_dev; 820 struct ieee80211com *ic = &sc->sc_ic; 821 struct ifnet *ifp = &sc->sc_if; 822 struct ural_rx_desc *desc; 823 struct ieee80211_frame *wh; 824 struct ieee80211_node *ni; 825 struct mbuf *m; 826 int s, len; 827 u_int32_t rxflags; 828 829 usbd_unmap_buffer(xfer); 830 831 if (status != USBD_NORMAL_COMPLETION) { 832 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 833 return; 834 835 if (status == USBD_STALLED) 836 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 837 goto skip; 838 } 839 840 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 841 842 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 843 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 844 len)); 845 ifp->if_ierrors++; 846 goto skip; 847 } 848 849 m = data->ue_mbuf; 850 851 /* rx descriptor is located at the end */ 852 desc = (void *)(mtod(m, char *) + len - RAL_RX_DESC_SIZE); 853 rxflags = UGETDW((u_int8_t *)&desc->flags); 854 855 if ((rxflags & RAL_RX_PHY_ERROR) || 856 (rxflags & RAL_RX_CRC_ERROR)) { 857 /* 858 * This should not happen since we did not request to receive 859 * those frames when we filled RAL_TXRX_CSR2. 860 */ 861 DPRINTFN(5, ("PHY or CRC error\n")); 862 ifp->if_ierrors++; 863 goto skip; 864 } 865 866 /* 867 * Allocate new mbuf cluster for the next transfer. 868 * If that failed, discard current packet and recycle the mbuf. 869 */ 870 if ((data->ue_mbuf = usb_ether_newbuf(NULL)) == NULL) { 871 printf("%s: no memory for rx list -- packet dropped!\n", 872 USBDEVNAME(sc->sc_dev)); 873 ifp->if_ierrors++; 874 data->ue_mbuf = usb_ether_newbuf(m); 875 goto skip; 876 } 877 878 /* finalize mbuf */ 879 m->m_pkthdr.rcvif = ifp; 880 m->m_pkthdr.len = m->m_len = (rxflags >> 16) & 0xfff; 881 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 882 883 s = splnet(); 884 885 #if NBPFILTER > 0 886 if (sc->sc_drvbpf != NULL) { 887 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 888 889 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 890 tap->wr_rate = ural_rxrate(desc); 891 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 892 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 893 tap->wr_antenna = sc->rx_ant; 894 tap->wr_antsignal = desc->rssi; 895 896 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 897 } 898 #endif 899 900 wh = mtod(m, struct ieee80211_frame *); 901 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 902 903 /* send the frame to the 802.11 layer */ 904 ieee80211_input(ic, m, ni, desc->rssi, 0); 905 906 /* node is no longer needed */ 907 ieee80211_free_node(ni); 908 909 splx(s); 910 911 DPRINTFN(15, ("rx done\n")); 912 913 skip: /* setup a new transfer */ 914 (void)usbd_map_buffer_mbuf(xfer, data->ue_mbuf); 915 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, NULL /* XXX buf */, MCLBYTES, 916 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 917 usbd_transfer(xfer); 918 } 919 920 /* 921 * Return the expected ack rate for a frame transmitted at rate `rate'. 922 * XXX: this should depend on the destination node basic rate set. 923 */ 924 Static int 925 ural_ack_rate(struct ieee80211com *ic, int rate) 926 { 927 switch (rate) { 928 /* CCK rates */ 929 case 2: 930 return 2; 931 case 4: 932 case 11: 933 case 22: 934 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 935 936 /* OFDM rates */ 937 case 12: 938 case 18: 939 return 12; 940 case 24: 941 case 36: 942 return 24; 943 case 48: 944 case 72: 945 case 96: 946 case 108: 947 return 48; 948 } 949 950 /* default to 1Mbps */ 951 return 2; 952 } 953 954 /* 955 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 956 * The function automatically determines the operating mode depending on the 957 * given rate. `flags' indicates whether short preamble is in use or not. 958 */ 959 Static uint16_t 960 ural_txtime(int len, int rate, uint32_t flags) 961 { 962 uint16_t txtime; 963 964 if (RAL_RATE_IS_OFDM(rate)) { 965 /* IEEE Std 802.11g-2003, pp. 37 */ 966 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 967 txtime = 16 + 4 + 4 * txtime + 6; 968 } else { 969 /* IEEE Std 802.11b-1999, pp. 28 */ 970 txtime = (16 * len + rate - 1) / rate; 971 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 972 txtime += 72 + 24; 973 else 974 txtime += 144 + 48; 975 } 976 return txtime; 977 } 978 979 Static uint8_t 980 ural_plcp_signal(int rate) 981 { 982 switch (rate) { 983 /* CCK rates (returned values are device-dependent) */ 984 case 2: return 0x0; 985 case 4: return 0x1; 986 case 11: return 0x2; 987 case 22: return 0x3; 988 989 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 990 case 12: return 0xb; 991 case 18: return 0xf; 992 case 24: return 0xa; 993 case 36: return 0xe; 994 case 48: return 0x9; 995 case 72: return 0xd; 996 case 96: return 0x8; 997 case 108: return 0xc; 998 999 /* unsupported rates (should not get there) */ 1000 default: return 0xff; 1001 } 1002 } 1003 1004 Static void 1005 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1006 uint32_t flags, int len, int rate) 1007 { 1008 struct ieee80211com *ic = &sc->sc_ic; 1009 uint16_t plcp_length; 1010 int remainder; 1011 1012 desc->flags = htole32(flags); 1013 desc->flags |= htole32(RAL_TX_NEWSEQ); 1014 desc->flags |= htole32(len << 16); 1015 1016 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1017 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1018 1019 /* setup PLCP fields */ 1020 desc->plcp_signal = ural_plcp_signal(rate); 1021 desc->plcp_service = 4; 1022 1023 len += IEEE80211_CRC_LEN; 1024 if (RAL_RATE_IS_OFDM(rate)) { 1025 desc->flags |= htole32(RAL_TX_OFDM); 1026 1027 plcp_length = len & 0xfff; 1028 desc->plcp_length_hi = plcp_length >> 6; 1029 desc->plcp_length_lo = plcp_length & 0x3f; 1030 } else { 1031 plcp_length = (16 * len + rate - 1) / rate; 1032 if (rate == 22) { 1033 remainder = (16 * len) % 22; 1034 if (remainder != 0 && remainder < 7) 1035 desc->plcp_service |= RAL_PLCP_LENGEXT; 1036 } 1037 desc->plcp_length_hi = plcp_length >> 8; 1038 desc->plcp_length_lo = plcp_length & 0xff; 1039 1040 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1041 desc->plcp_signal |= 0x08; 1042 } 1043 1044 desc->iv = 0; 1045 desc->eiv = 0; 1046 } 1047 1048 #define RAL_TX_TIMEOUT 5000 1049 1050 Static int 1051 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1052 { 1053 struct ural_tx_desc *desc; 1054 usbd_xfer_handle xfer; 1055 uint8_t cmd = 0; 1056 usbd_status error; 1057 int xferlen, rate; 1058 1059 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1060 1061 xfer = usbd_alloc_xfer(sc->sc_udev, sc->sc_tx_pipeh); 1062 if (xfer == NULL) { 1063 m_freem(m0); 1064 return ENOMEM; 1065 } 1066 1067 if (usbd_map_alloc(xfer)) { 1068 usbd_free_xfer(xfer); 1069 m_freem(m0); 1070 return ENOMEM; 1071 } 1072 1073 /* Prepend Tx descriptor */ 1074 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_WAIT); 1075 if (m0 != NULL) 1076 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */ 1077 if (m0 == NULL) 1078 return ENOBUFS; 1079 desc = mtod(m0, struct ural_tx_desc *); 1080 1081 /* xfer length needs to be a multiple of two! */ 1082 xferlen = (m0->m_pkthdr.len + 1) & ~1; 1083 if (m0->m_pkthdr.len != xferlen) { 1084 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */ 1085 if (m0->m_pkthdr.len != xferlen) { 1086 m_freem(m0); 1087 return ENOBUFS; 1088 } 1089 } 1090 1091 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1092 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1093 1094 error = usbd_sync_transfer(xfer); 1095 if (error != 0) { 1096 usbd_free_xfer(xfer); 1097 m_freem(m0); 1098 return error; 1099 } 1100 1101 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1102 m0->m_pkthdr.len, rate); 1103 1104 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1105 m0->m_pkthdr.len, rate, xferlen)); 1106 1107 error = usbd_map_buffer_mbuf(xfer, m0); 1108 if (error != 0) { 1109 usbd_free_xfer(xfer); 1110 m_freem(m0); 1111 return error; 1112 } 1113 1114 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, NULL /* XXX buf */, xferlen, 1115 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1116 1117 error = usbd_sync_transfer(xfer); 1118 usbd_free_xfer(xfer); 1119 1120 m_freem(m0); 1121 return error; 1122 } 1123 1124 Static int 1125 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1126 { 1127 struct ieee80211com *ic = &sc->sc_ic; 1128 struct ural_tx_desc *desc; 1129 struct ue_chain *data; 1130 struct ieee80211_frame *wh; 1131 uint32_t flags = 0; 1132 uint16_t dur; 1133 usbd_status error; 1134 int xferlen, rate; 1135 int ret; 1136 1137 data = &sc->tx_data[0]; 1138 1139 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1140 1141 data->ue_mbuf = m0; 1142 sc->tx_ni[data->ue_idx] = ni; 1143 1144 wh = mtod(m0, struct ieee80211_frame *); 1145 1146 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1147 flags |= RAL_TX_ACK; 1148 1149 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1150 *(uint16_t *)wh->i_dur = htole16(dur); 1151 1152 /* tell hardware to add timestamp for probe responses */ 1153 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1154 IEEE80211_FC0_TYPE_MGT && 1155 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1156 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1157 flags |= RAL_TX_TIMESTAMP; 1158 } 1159 1160 #if NBPFILTER > 0 1161 if (sc->sc_drvbpf != NULL) { 1162 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1163 1164 tap->wt_flags = 0; 1165 tap->wt_rate = rate; 1166 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1167 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1168 tap->wt_antenna = sc->tx_ant; 1169 1170 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1171 } 1172 #endif 1173 1174 /* Prepend Tx descriptor */ 1175 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_DONTWAIT); 1176 if (m0 != NULL) 1177 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */ 1178 if (m0 == NULL) { 1179 return ENOBUFS; 1180 } 1181 desc = mtod(m0, struct ural_tx_desc *); 1182 1183 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1184 1185 /* align end on a 2-bytes boundary */ 1186 xferlen = (m0->m_pkthdr.len + 1) & ~1; 1187 1188 /* 1189 * No space left in the last URB to store the extra 2 bytes, force 1190 * sending of another URB. 1191 */ 1192 if ((xferlen % 64) == 0) 1193 xferlen += 2; 1194 1195 if (m0->m_pkthdr.len != xferlen) { 1196 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */ 1197 if (m0->m_pkthdr.len != xferlen) { 1198 m_freem(m0); 1199 return ENOBUFS; 1200 } 1201 } 1202 1203 ret = usb_ether_map_tx_buffer_mbuf(data, m0); 1204 if (ret) { 1205 m_freem(m0); 1206 return ret; 1207 } 1208 1209 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1210 m0->m_pkthdr.len, rate, xferlen)); 1211 1212 usbd_setup_xfer(data->ue_xfer, sc->sc_tx_pipeh, data, NULL /* XXX buf */, 1213 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1214 ural_txeof); 1215 1216 error = usbd_transfer(data->ue_xfer); 1217 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1218 data->ue_mbuf = NULL; 1219 m_freem(m0); 1220 return error; 1221 } 1222 1223 sc->tx_queued++; 1224 1225 return 0; 1226 } 1227 1228 Static int 1229 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1230 { 1231 struct ieee80211com *ic = &sc->sc_ic; 1232 struct ural_tx_desc *desc; 1233 struct ue_chain *data; 1234 struct ieee80211_frame *wh; 1235 struct ieee80211_key *k; 1236 uint32_t flags = 0; 1237 uint16_t dur; 1238 usbd_status error; 1239 int xferlen, rate; 1240 int ret; 1241 1242 wh = mtod(m0, struct ieee80211_frame *); 1243 1244 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1245 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1246 else 1247 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1248 1249 rate &= IEEE80211_RATE_VAL; 1250 1251 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1252 k = ieee80211_crypto_encap(ic, ni, m0); 1253 if (k == NULL) { 1254 m_freem(m0); 1255 return ENOBUFS; 1256 } 1257 1258 /* packet header may have moved, reset our local pointer */ 1259 wh = mtod(m0, struct ieee80211_frame *); 1260 } 1261 1262 data = &sc->tx_data[0]; 1263 1264 data->ue_mbuf = m0; 1265 sc->tx_ni[data->ue_idx] = ni; 1266 1267 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1268 flags |= RAL_TX_ACK; 1269 flags |= RAL_TX_RETRY(7); 1270 1271 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1272 ic->ic_flags) + RAL_SIFS; 1273 *(uint16_t *)wh->i_dur = htole16(dur); 1274 } 1275 1276 #if NBPFILTER > 0 1277 if (sc->sc_drvbpf != NULL) { 1278 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1279 1280 tap->wt_flags = 0; 1281 tap->wt_rate = rate; 1282 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1283 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1284 tap->wt_antenna = sc->tx_ant; 1285 1286 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1287 } 1288 #endif 1289 1290 /* Prepend Tx descriptor */ 1291 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_DONTWAIT); 1292 if (m0 != NULL) 1293 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */ 1294 if (m0 == NULL) { 1295 return ENOBUFS; 1296 } 1297 desc = mtod(m0, struct ural_tx_desc *); 1298 1299 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1300 1301 /* align end on a 2-bytes boundary */ 1302 xferlen = (m0->m_pkthdr.len + 1) & ~1; 1303 1304 /* 1305 * No space left in the last URB to store the extra 2 bytes, force 1306 * sending of another URB. 1307 */ 1308 if ((xferlen % 64) == 0) 1309 xferlen += 2; 1310 1311 if (m0->m_pkthdr.len != xferlen) { 1312 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */ 1313 if (m0->m_pkthdr.len != xferlen) { 1314 m_freem(m0); 1315 return ENOBUFS; 1316 } 1317 } 1318 1319 ret = usb_ether_map_tx_buffer_mbuf(data, m0); 1320 if (ret) { 1321 m_freem(m0); 1322 return ret; 1323 } 1324 1325 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1326 m0->m_pkthdr.len, rate, xferlen)); 1327 1328 usbd_setup_xfer(data->ue_xfer, sc->sc_tx_pipeh, data, NULL /* XXX buf */, 1329 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1330 ural_txeof); 1331 1332 error = usbd_transfer(data->ue_xfer); 1333 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1334 data->ue_mbuf = NULL; 1335 m_freem(m0); 1336 return error; 1337 } 1338 1339 sc->tx_queued++; 1340 1341 return 0; 1342 } 1343 1344 Static void 1345 ural_start(struct ifnet *ifp) 1346 { 1347 struct ural_softc *sc = ifp->if_softc; 1348 struct ieee80211com *ic = &sc->sc_ic; 1349 struct mbuf *m0; 1350 struct ether_header *eh; 1351 struct ieee80211_node *ni; 1352 1353 for (;;) { 1354 IF_POLL(&ic->ic_mgtq, m0); 1355 if (m0 != NULL) { 1356 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1357 ifp->if_flags |= IFF_OACTIVE; 1358 break; 1359 } 1360 IF_DEQUEUE(&ic->ic_mgtq, m0); 1361 1362 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1363 m0->m_pkthdr.rcvif = NULL; 1364 #if NBPFILTER > 0 1365 if (ic->ic_rawbpf != NULL) 1366 bpf_mtap(ic->ic_rawbpf, m0); 1367 #endif 1368 if (ural_tx_mgt(sc, m0, ni) != 0) 1369 break; 1370 1371 } else { 1372 if (ic->ic_state != IEEE80211_S_RUN) 1373 break; 1374 IFQ_DEQUEUE(&ifp->if_snd, m0); 1375 if (m0 == NULL) 1376 break; 1377 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1378 IF_PREPEND(&ifp->if_snd, m0); 1379 ifp->if_flags |= IFF_OACTIVE; 1380 break; 1381 } 1382 1383 if (m0->m_len < sizeof (struct ether_header) && 1384 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1385 continue; 1386 1387 eh = mtod(m0, struct ether_header *); 1388 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1389 if (ni == NULL) { 1390 m_freem(m0); 1391 continue; 1392 } 1393 #if NBPFILTER > 0 1394 if (ifp->if_bpf != NULL) 1395 bpf_mtap(ifp->if_bpf, m0); 1396 #endif 1397 m0 = ieee80211_encap(ic, m0, ni); 1398 if (m0 == NULL) { 1399 ieee80211_free_node(ni); 1400 continue; 1401 } 1402 #if NBPFILTER > 0 1403 if (ic->ic_rawbpf != NULL) 1404 bpf_mtap(ic->ic_rawbpf, m0); 1405 #endif 1406 if (ural_tx_data(sc, m0, ni) != 0) { 1407 ieee80211_free_node(ni); 1408 ifp->if_oerrors++; 1409 break; 1410 } 1411 } 1412 1413 sc->sc_tx_timer = 5; 1414 ifp->if_timer = 1; 1415 } 1416 } 1417 1418 Static void 1419 ural_watchdog(struct ifnet *ifp) 1420 { 1421 struct ural_softc *sc = ifp->if_softc; 1422 struct ieee80211com *ic = &sc->sc_ic; 1423 1424 ifp->if_timer = 0; 1425 1426 if (sc->sc_tx_timer > 0) { 1427 if (--sc->sc_tx_timer == 0) { 1428 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1429 /*ural_init(sc); XXX needs a process context! */ 1430 ifp->if_oerrors++; 1431 return; 1432 } 1433 ifp->if_timer = 1; 1434 } 1435 1436 ieee80211_watchdog(ic); 1437 } 1438 1439 /* 1440 * This function allows for fast channel switching in monitor mode (used by 1441 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1442 * generate a new beacon frame. 1443 */ 1444 Static int 1445 ural_reset(struct ifnet *ifp) 1446 { 1447 struct ural_softc *sc = ifp->if_softc; 1448 struct ieee80211com *ic = &sc->sc_ic; 1449 1450 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1451 return ENETRESET; 1452 1453 ural_set_chan(sc, ic->ic_curchan); 1454 1455 return 0; 1456 } 1457 1458 Static int 1459 ural_ioctl(struct ifnet *ifp, u_long cmd, usb_ioctlarg_t data) 1460 { 1461 struct ural_softc *sc = ifp->if_softc; 1462 struct ieee80211com *ic = &sc->sc_ic; 1463 int s, error = 0; 1464 1465 s = splnet(); 1466 1467 switch (cmd) { 1468 case SIOCSIFFLAGS: 1469 if (ifp->if_flags & IFF_UP) { 1470 if (ifp->if_flags & IFF_RUNNING) 1471 ural_update_promisc(sc); 1472 else 1473 ural_init(ifp); 1474 } else { 1475 if (ifp->if_flags & IFF_RUNNING) 1476 ural_stop(ifp, 1); 1477 } 1478 break; 1479 1480 default: 1481 error = ieee80211_ioctl(ic, cmd, data); 1482 } 1483 1484 if (error == ENETRESET) { 1485 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1486 (IFF_UP | IFF_RUNNING)) 1487 ural_init(ifp); 1488 error = 0; 1489 } 1490 1491 splx(s); 1492 1493 return error; 1494 } 1495 1496 Static void 1497 ural_set_testmode(struct ural_softc *sc) 1498 { 1499 usb_device_request_t req; 1500 usbd_status error; 1501 1502 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1503 req.bRequest = RAL_VENDOR_REQUEST; 1504 USETW(req.wValue, 4); 1505 USETW(req.wIndex, 1); 1506 USETW(req.wLength, 0); 1507 1508 error = usbd_do_request(sc->sc_udev, &req, NULL); 1509 if (error != 0) { 1510 printf("%s: could not set test mode: %s\n", 1511 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1512 } 1513 } 1514 1515 Static void 1516 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1517 { 1518 usb_device_request_t req; 1519 usbd_status error; 1520 1521 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1522 req.bRequest = RAL_READ_EEPROM; 1523 USETW(req.wValue, 0); 1524 USETW(req.wIndex, addr); 1525 USETW(req.wLength, len); 1526 1527 error = usbd_do_request(sc->sc_udev, &req, buf); 1528 if (error != 0) { 1529 printf("%s: could not read EEPROM: %s\n", 1530 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1531 } 1532 } 1533 1534 Static uint16_t 1535 ural_read(struct ural_softc *sc, uint16_t reg) 1536 { 1537 usb_device_request_t req; 1538 usbd_status error; 1539 uint16_t val; 1540 1541 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1542 req.bRequest = RAL_READ_MAC; 1543 USETW(req.wValue, 0); 1544 USETW(req.wIndex, reg); 1545 USETW(req.wLength, sizeof (uint16_t)); 1546 1547 error = usbd_do_request(sc->sc_udev, &req, &val); 1548 if (error != 0) { 1549 printf("%s: could not read MAC register: %s\n", 1550 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1551 return 0; 1552 } 1553 1554 return le16toh(val); 1555 } 1556 1557 Static void 1558 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1559 { 1560 usb_device_request_t req; 1561 usbd_status error; 1562 1563 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1564 req.bRequest = RAL_READ_MULTI_MAC; 1565 USETW(req.wValue, 0); 1566 USETW(req.wIndex, reg); 1567 USETW(req.wLength, len); 1568 1569 error = usbd_do_request(sc->sc_udev, &req, buf); 1570 if (error != 0) { 1571 printf("%s: could not read MAC register: %s\n", 1572 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1573 } 1574 } 1575 1576 Static void 1577 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1578 { 1579 usb_device_request_t req; 1580 usbd_status error; 1581 1582 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1583 req.bRequest = RAL_WRITE_MAC; 1584 USETW(req.wValue, val); 1585 USETW(req.wIndex, reg); 1586 USETW(req.wLength, 0); 1587 1588 error = usbd_do_request(sc->sc_udev, &req, NULL); 1589 if (error != 0) { 1590 printf("%s: could not write MAC register: %s\n", 1591 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1592 } 1593 } 1594 1595 Static void 1596 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1597 { 1598 usb_device_request_t req; 1599 usbd_status error; 1600 1601 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1602 req.bRequest = RAL_WRITE_MULTI_MAC; 1603 USETW(req.wValue, 0); 1604 USETW(req.wIndex, reg); 1605 USETW(req.wLength, len); 1606 1607 error = usbd_do_request(sc->sc_udev, &req, buf); 1608 if (error != 0) { 1609 printf("%s: could not write MAC register: %s\n", 1610 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1611 } 1612 } 1613 1614 Static void 1615 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1616 { 1617 uint16_t tmp; 1618 int ntries; 1619 1620 for (ntries = 0; ntries < 5; ntries++) { 1621 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1622 break; 1623 } 1624 if (ntries == 5) { 1625 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1626 return; 1627 } 1628 1629 tmp = reg << 8 | val; 1630 ural_write(sc, RAL_PHY_CSR7, tmp); 1631 } 1632 1633 Static uint8_t 1634 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1635 { 1636 uint16_t val; 1637 int ntries; 1638 1639 val = RAL_BBP_WRITE | reg << 8; 1640 ural_write(sc, RAL_PHY_CSR7, val); 1641 1642 for (ntries = 0; ntries < 5; ntries++) { 1643 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1644 break; 1645 } 1646 if (ntries == 5) { 1647 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1648 return 0; 1649 } 1650 1651 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1652 } 1653 1654 Static void 1655 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1656 { 1657 uint32_t tmp; 1658 int ntries; 1659 1660 for (ntries = 0; ntries < 5; ntries++) { 1661 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1662 break; 1663 } 1664 if (ntries == 5) { 1665 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1666 return; 1667 } 1668 1669 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1670 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1671 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1672 1673 /* remember last written value in sc */ 1674 sc->rf_regs[reg] = val; 1675 1676 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1677 } 1678 1679 Static void 1680 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1681 { 1682 struct ieee80211com *ic = &sc->sc_ic; 1683 uint8_t power, tmp; 1684 u_int i, chan; 1685 1686 chan = ieee80211_chan2ieee(ic, c); 1687 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1688 return; 1689 1690 if (IEEE80211_IS_CHAN_2GHZ(c)) 1691 power = min(sc->txpow[chan - 1], 31); 1692 else 1693 power = 31; 1694 1695 /* adjust txpower using ifconfig settings */ 1696 power -= (100 - ic->ic_txpowlimit) / 8; 1697 1698 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1699 1700 switch (sc->rf_rev) { 1701 case RAL_RF_2522: 1702 ural_rf_write(sc, RAL_RF1, 0x00814); 1703 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1704 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1705 break; 1706 1707 case RAL_RF_2523: 1708 ural_rf_write(sc, RAL_RF1, 0x08804); 1709 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1710 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1711 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1712 break; 1713 1714 case RAL_RF_2524: 1715 ural_rf_write(sc, RAL_RF1, 0x0c808); 1716 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1717 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1718 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1719 break; 1720 1721 case RAL_RF_2525: 1722 ural_rf_write(sc, RAL_RF1, 0x08808); 1723 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1724 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1725 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1726 1727 ural_rf_write(sc, RAL_RF1, 0x08808); 1728 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1729 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1730 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1731 break; 1732 1733 case RAL_RF_2525E: 1734 ural_rf_write(sc, RAL_RF1, 0x08808); 1735 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1736 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1737 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1738 break; 1739 1740 case RAL_RF_2526: 1741 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1742 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1743 ural_rf_write(sc, RAL_RF1, 0x08804); 1744 1745 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1746 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1747 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1748 break; 1749 1750 /* dual-band RF */ 1751 case RAL_RF_5222: 1752 for (i = 0; ural_rf5222[i].chan != chan; i++); 1753 1754 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1755 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1756 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1757 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1758 break; 1759 } 1760 1761 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1762 ic->ic_state != IEEE80211_S_SCAN) { 1763 /* set Japan filter bit for channel 14 */ 1764 tmp = ural_bbp_read(sc, 70); 1765 1766 tmp &= ~RAL_JAPAN_FILTER; 1767 if (chan == 14) 1768 tmp |= RAL_JAPAN_FILTER; 1769 1770 ural_bbp_write(sc, 70, tmp); 1771 1772 /* clear CRC errors */ 1773 ural_read(sc, RAL_STA_CSR0); 1774 1775 DELAY(10000); 1776 ural_disable_rf_tune(sc); 1777 } 1778 } 1779 1780 /* 1781 * Disable RF auto-tuning. 1782 */ 1783 Static void 1784 ural_disable_rf_tune(struct ural_softc *sc) 1785 { 1786 uint32_t tmp; 1787 1788 if (sc->rf_rev != RAL_RF_2523) { 1789 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1790 ural_rf_write(sc, RAL_RF1, tmp); 1791 } 1792 1793 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1794 ural_rf_write(sc, RAL_RF3, tmp); 1795 1796 DPRINTFN(2, ("disabling RF autotune\n")); 1797 } 1798 1799 /* 1800 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1801 * synchronization. 1802 */ 1803 Static void 1804 ural_enable_tsf_sync(struct ural_softc *sc) 1805 { 1806 struct ieee80211com *ic = &sc->sc_ic; 1807 uint16_t logcwmin, preload, tmp; 1808 1809 /* first, disable TSF synchronization */ 1810 ural_write(sc, RAL_TXRX_CSR19, 0); 1811 1812 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1813 ural_write(sc, RAL_TXRX_CSR18, tmp); 1814 1815 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1816 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1817 tmp = logcwmin << 12 | preload; 1818 ural_write(sc, RAL_TXRX_CSR20, tmp); 1819 1820 /* finally, enable TSF synchronization */ 1821 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1822 if (ic->ic_opmode == IEEE80211_M_STA) 1823 tmp |= RAL_ENABLE_TSF_SYNC(1); 1824 else 1825 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1826 ural_write(sc, RAL_TXRX_CSR19, tmp); 1827 1828 DPRINTF(("enabling TSF synchronization\n")); 1829 } 1830 1831 Static void 1832 ural_update_slot(struct ifnet *ifp) 1833 { 1834 struct ural_softc *sc = ifp->if_softc; 1835 struct ieee80211com *ic = &sc->sc_ic; 1836 uint16_t slottime, sifs, eifs; 1837 1838 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1839 1840 /* 1841 * These settings may sound a bit inconsistent but this is what the 1842 * reference driver does. 1843 */ 1844 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1845 sifs = 16 - RAL_RXTX_TURNAROUND; 1846 eifs = 364; 1847 } else { 1848 sifs = 10 - RAL_RXTX_TURNAROUND; 1849 eifs = 64; 1850 } 1851 1852 ural_write(sc, RAL_MAC_CSR10, slottime); 1853 ural_write(sc, RAL_MAC_CSR11, sifs); 1854 ural_write(sc, RAL_MAC_CSR12, eifs); 1855 } 1856 1857 Static void 1858 ural_set_txpreamble(struct ural_softc *sc) 1859 { 1860 uint16_t tmp; 1861 1862 tmp = ural_read(sc, RAL_TXRX_CSR10); 1863 1864 tmp &= ~RAL_SHORT_PREAMBLE; 1865 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1866 tmp |= RAL_SHORT_PREAMBLE; 1867 1868 ural_write(sc, RAL_TXRX_CSR10, tmp); 1869 } 1870 1871 Static void 1872 ural_set_basicrates(struct ural_softc *sc) 1873 { 1874 struct ieee80211com *ic = &sc->sc_ic; 1875 1876 /* update basic rate set */ 1877 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1878 /* 11b basic rates: 1, 2Mbps */ 1879 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1880 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1881 /* 11a basic rates: 6, 12, 24Mbps */ 1882 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1883 } else { 1884 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1885 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1886 } 1887 } 1888 1889 Static void 1890 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1891 { 1892 uint16_t tmp; 1893 1894 tmp = bssid[0] | bssid[1] << 8; 1895 ural_write(sc, RAL_MAC_CSR5, tmp); 1896 1897 tmp = bssid[2] | bssid[3] << 8; 1898 ural_write(sc, RAL_MAC_CSR6, tmp); 1899 1900 tmp = bssid[4] | bssid[5] << 8; 1901 ural_write(sc, RAL_MAC_CSR7, tmp); 1902 1903 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1904 } 1905 1906 Static void 1907 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1908 { 1909 uint16_t tmp; 1910 1911 tmp = addr[0] | addr[1] << 8; 1912 ural_write(sc, RAL_MAC_CSR2, tmp); 1913 1914 tmp = addr[2] | addr[3] << 8; 1915 ural_write(sc, RAL_MAC_CSR3, tmp); 1916 1917 tmp = addr[4] | addr[5] << 8; 1918 ural_write(sc, RAL_MAC_CSR4, tmp); 1919 1920 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1921 } 1922 1923 Static void 1924 ural_update_promisc(struct ural_softc *sc) 1925 { 1926 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1927 uint32_t tmp; 1928 1929 tmp = ural_read(sc, RAL_TXRX_CSR2); 1930 1931 tmp &= ~RAL_DROP_NOT_TO_ME; 1932 if (!(ifp->if_flags & IFF_PROMISC)) 1933 tmp |= RAL_DROP_NOT_TO_ME; 1934 1935 ural_write(sc, RAL_TXRX_CSR2, tmp); 1936 1937 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1938 "entering" : "leaving")); 1939 } 1940 1941 Static const char * 1942 ural_get_rf(int rev) 1943 { 1944 switch (rev) { 1945 case RAL_RF_2522: return "RT2522"; 1946 case RAL_RF_2523: return "RT2523"; 1947 case RAL_RF_2524: return "RT2524"; 1948 case RAL_RF_2525: return "RT2525"; 1949 case RAL_RF_2525E: return "RT2525e"; 1950 case RAL_RF_2526: return "RT2526"; 1951 case RAL_RF_5222: return "RT5222"; 1952 default: return "unknown"; 1953 } 1954 } 1955 1956 Static void 1957 ural_read_eeprom(struct ural_softc *sc) 1958 { 1959 struct ieee80211com *ic = &sc->sc_ic; 1960 uint16_t val; 1961 1962 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1963 val = le16toh(val); 1964 sc->rf_rev = (val >> 11) & 0x7; 1965 sc->hw_radio = (val >> 10) & 0x1; 1966 sc->led_mode = (val >> 6) & 0x7; 1967 sc->rx_ant = (val >> 4) & 0x3; 1968 sc->tx_ant = (val >> 2) & 0x3; 1969 sc->nb_ant = val & 0x3; 1970 1971 /* read MAC address */ 1972 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1973 1974 /* read default values for BBP registers */ 1975 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1976 1977 /* read Tx power for all b/g channels */ 1978 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1979 } 1980 1981 Static int 1982 ural_bbp_init(struct ural_softc *sc) 1983 { 1984 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1985 int i, ntries; 1986 1987 /* wait for BBP to be ready */ 1988 for (ntries = 0; ntries < 100; ntries++) { 1989 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1990 break; 1991 DELAY(1000); 1992 } 1993 if (ntries == 100) { 1994 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 1995 return EIO; 1996 } 1997 1998 /* initialize BBP registers to default values */ 1999 for (i = 0; i < N(ural_def_bbp); i++) 2000 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2001 2002 #if 0 2003 /* initialize BBP registers to values stored in EEPROM */ 2004 for (i = 0; i < 16; i++) { 2005 if (sc->bbp_prom[i].reg == 0xff) 2006 continue; 2007 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2008 } 2009 #endif 2010 2011 return 0; 2012 #undef N 2013 } 2014 2015 Static void 2016 ural_set_txantenna(struct ural_softc *sc, int antenna) 2017 { 2018 uint16_t tmp; 2019 uint8_t tx; 2020 2021 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2022 if (antenna == 1) 2023 tx |= RAL_BBP_ANTA; 2024 else if (antenna == 2) 2025 tx |= RAL_BBP_ANTB; 2026 else 2027 tx |= RAL_BBP_DIVERSITY; 2028 2029 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2030 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2031 sc->rf_rev == RAL_RF_5222) 2032 tx |= RAL_BBP_FLIPIQ; 2033 2034 ural_bbp_write(sc, RAL_BBP_TX, tx); 2035 2036 /* update values in PHY_CSR5 and PHY_CSR6 */ 2037 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2038 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2039 2040 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2041 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2042 } 2043 2044 Static void 2045 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2046 { 2047 uint8_t rx; 2048 2049 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2050 if (antenna == 1) 2051 rx |= RAL_BBP_ANTA; 2052 else if (antenna == 2) 2053 rx |= RAL_BBP_ANTB; 2054 else 2055 rx |= RAL_BBP_DIVERSITY; 2056 2057 /* need to force no I/Q flip for RF 2525e and 2526 */ 2058 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2059 rx &= ~RAL_BBP_FLIPIQ; 2060 2061 ural_bbp_write(sc, RAL_BBP_RX, rx); 2062 } 2063 2064 Static int 2065 ural_init(struct ifnet *ifp) 2066 { 2067 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2068 struct ural_softc *sc = ifp->if_softc; 2069 struct ieee80211com *ic = &sc->sc_ic; 2070 struct ieee80211_key *wk; 2071 struct ue_chain *data; 2072 uint16_t tmp; 2073 usbd_status uerror; 2074 int error; 2075 int i, ntries; 2076 2077 ural_set_testmode(sc); 2078 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2079 2080 ural_stop(ifp, 0); 2081 2082 /* initialize MAC registers to default values */ 2083 for (i = 0; i < N(ural_def_mac); i++) 2084 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2085 2086 /* wait for BBP and RF to wake up (this can take a long time!) */ 2087 for (ntries = 0; ntries < 100; ntries++) { 2088 tmp = ural_read(sc, RAL_MAC_CSR17); 2089 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2090 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2091 break; 2092 DELAY(1000); 2093 } 2094 if (ntries == 100) { 2095 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2096 USBDEVNAME(sc->sc_dev)); 2097 error = EIO; 2098 goto fail; 2099 } 2100 2101 /* we're ready! */ 2102 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2103 2104 /* set basic rate set (will be updated later) */ 2105 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2106 2107 error = ural_bbp_init(sc); 2108 if (error != 0) 2109 goto fail; 2110 2111 /* set default BSS channel */ 2112 ural_set_chan(sc, ic->ic_curchan); 2113 2114 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2115 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2116 2117 ural_set_txantenna(sc, sc->tx_ant); 2118 ural_set_rxantenna(sc, sc->rx_ant); 2119 2120 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2121 ural_set_macaddr(sc, ic->ic_myaddr); 2122 2123 /* 2124 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2125 */ 2126 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2127 wk = &ic->ic_crypto.cs_nw_keys[i]; 2128 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2129 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2130 } 2131 2132 /* 2133 * Allocate xfer for AMRR statistics requests. 2134 */ 2135 sc->amrr_xfer = usbd_alloc_default_xfer(sc->sc_udev); 2136 if (sc->amrr_xfer == NULL) { 2137 printf("%s: could not allocate AMRR xfer\n", 2138 USBDEVNAME(sc->sc_dev)); 2139 goto fail; 2140 } 2141 2142 /* 2143 * Open Tx and Rx USB bulk pipes. 2144 */ 2145 uerror = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2146 &sc->sc_tx_pipeh); 2147 if (uerror != USBD_NORMAL_COMPLETION) { 2148 printf("%s: could not open Tx pipe: %s\n", 2149 USBDEVNAME(sc->sc_dev), usbd_errstr(uerror)); 2150 error = EIO; 2151 goto fail; 2152 } 2153 2154 uerror = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2155 &sc->sc_rx_pipeh); 2156 if (uerror != USBD_NORMAL_COMPLETION) { 2157 printf("%s: could not open Rx pipe: %s\n", 2158 USBDEVNAME(sc->sc_dev), usbd_errstr(uerror)); 2159 error = EIO; 2160 goto fail; 2161 } 2162 2163 /* 2164 * Allocate Tx and Rx xfer queues. 2165 */ 2166 sc->tx_queued = 0; 2167 error = usb_ether_tx_list_init(USBDEV(sc->sc_dev), 2168 sc->tx_data, RAL_TX_LIST_COUNT, 2169 sc->sc_udev, sc->sc_tx_pipeh, NULL); 2170 if (error != 0) { 2171 printf("%s: could not allocate Tx list\n", 2172 USBDEVNAME(sc->sc_dev)); 2173 goto fail; 2174 } 2175 2176 error = usb_ether_rx_list_init(USBDEV(sc->sc_dev), 2177 sc->rx_data, RAL_RX_LIST_COUNT, 2178 sc->sc_udev, sc->sc_rx_pipeh); 2179 if (error != 0) { 2180 printf("%s: could not allocate Rx list\n", 2181 USBDEVNAME(sc->sc_dev)); 2182 goto fail; 2183 } 2184 2185 /* 2186 * Start up the receive pipe. 2187 */ 2188 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2189 data = &sc->rx_data[i]; 2190 2191 (void)usbd_map_buffer_mbuf(data->ue_xfer, data->ue_mbuf); 2192 usbd_setup_xfer(data->ue_xfer, sc->sc_rx_pipeh, data, NULL /* XXX buf */, 2193 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2194 usbd_transfer(data->ue_xfer); 2195 } 2196 2197 /* kick Rx */ 2198 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2199 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2200 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2201 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2202 tmp |= RAL_DROP_TODS; 2203 if (!(ifp->if_flags & IFF_PROMISC)) 2204 tmp |= RAL_DROP_NOT_TO_ME; 2205 } 2206 ural_write(sc, RAL_TXRX_CSR2, tmp); 2207 2208 ifp->if_flags &= ~IFF_OACTIVE; 2209 ifp->if_flags |= IFF_RUNNING; 2210 2211 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2212 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2213 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2214 } else 2215 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2216 2217 return 0; 2218 2219 fail: ural_stop(ifp, 1); 2220 return error; 2221 #undef N 2222 } 2223 2224 Static void 2225 ural_stop(struct ifnet *ifp, int disable) 2226 { 2227 struct ural_softc *sc = ifp->if_softc; 2228 struct ieee80211com *ic = &sc->sc_ic; 2229 2230 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2231 2232 sc->sc_tx_timer = 0; 2233 ifp->if_timer = 0; 2234 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2235 2236 /* disable Rx */ 2237 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2238 2239 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2240 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2241 ural_write(sc, RAL_MAC_CSR1, 0); 2242 2243 /* Stop transfers. */ 2244 if (sc->sc_rx_pipeh != NULL) 2245 usbd_abort_pipe(sc->sc_rx_pipeh); 2246 2247 if (sc->sc_tx_pipeh != NULL) 2248 usbd_abort_pipe(sc->sc_tx_pipeh); 2249 2250 /* Free RX/TX resources. */ 2251 ural_free_rx_list(sc); 2252 ural_free_tx_list(sc); 2253 2254 /* Close pipes. */ 2255 if (sc->amrr_xfer != NULL) { 2256 usbd_free_xfer(sc->amrr_xfer); 2257 sc->amrr_xfer = NULL; 2258 } 2259 2260 if (sc->sc_rx_pipeh != NULL) { 2261 usbd_close_pipe(sc->sc_rx_pipeh); 2262 sc->sc_rx_pipeh = NULL; 2263 } 2264 2265 if (sc->sc_tx_pipeh != NULL) { 2266 usbd_close_pipe(sc->sc_tx_pipeh); 2267 sc->sc_tx_pipeh = NULL; 2268 } 2269 } 2270 2271 int 2272 ural_activate(device_ptr_t self, enum devact act) 2273 { 2274 struct ural_softc *sc = (struct ural_softc *)self; 2275 2276 switch (act) { 2277 case DVACT_ACTIVATE: 2278 return EOPNOTSUPP; 2279 break; 2280 2281 case DVACT_DEACTIVATE: 2282 if_deactivate(&sc->sc_if); 2283 break; 2284 } 2285 2286 return 0; 2287 } 2288 2289 Static void 2290 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2291 { 2292 int i; 2293 2294 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2295 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2296 2297 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2298 2299 /* set rate to some reasonable initial value */ 2300 for (i = ni->ni_rates.rs_nrates - 1; 2301 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2302 i--); 2303 ni->ni_txrate = i; 2304 2305 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2306 } 2307 2308 Static void 2309 ural_amrr_timeout(void *arg) 2310 { 2311 struct ural_softc *sc = (struct ural_softc *)arg; 2312 usb_device_request_t req; 2313 int s; 2314 2315 s = splusb(); 2316 2317 /* 2318 * Asynchronously read statistic registers (cleared by read). 2319 */ 2320 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2321 req.bRequest = RAL_READ_MULTI_MAC; 2322 USETW(req.wValue, 0); 2323 USETW(req.wIndex, RAL_STA_CSR0); 2324 USETW(req.wLength, sizeof sc->sta); 2325 2326 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2327 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2328 ural_amrr_update); 2329 (void)usbd_transfer(sc->amrr_xfer); 2330 2331 splx(s); 2332 } 2333 2334 Static void 2335 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2336 usbd_status status) 2337 { 2338 struct ural_softc *sc = (struct ural_softc *)priv; 2339 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2340 2341 if (status != USBD_NORMAL_COMPLETION) { 2342 printf("%s: could not retrieve Tx statistics - " 2343 "cancelling automatic rate control\n", 2344 USBDEVNAME(sc->sc_dev)); 2345 return; 2346 } 2347 2348 /* count TX retry-fail as Tx errors */ 2349 ifp->if_oerrors += sc->sta[9]; 2350 2351 sc->amn.amn_retrycnt = 2352 sc->sta[7] + /* TX one-retry ok count */ 2353 sc->sta[8] + /* TX more-retry ok count */ 2354 sc->sta[9]; /* TX retry-fail count */ 2355 2356 sc->amn.amn_txcnt = 2357 sc->amn.amn_retrycnt + 2358 sc->sta[6]; /* TX no-retry ok count */ 2359 2360 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2361 2362 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2363 } 2364
Indexes created Fri Oct 03 02:09:57 GMT 2025