if_ural.c revision 1.18.10.4 1 /* $NetBSD: if_ural.c,v 1.18.10.4 2007/06/18 13:43:50 itohy Exp $ */
2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */
3
4 /*-
5 * Copyright (c) 2005, 2006
6 * Damien Bergamini <damien.bergamini (at) free.fr>
7 *
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21 /*-
22 * Ralink Technology RT2500USB chipset driver
23 * http://www.ralinktech.com/
24 */
25
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.18.10.4 2007/06/18 13:43:50 itohy Exp $");
28
29 #include "bpfilter.h"
30
31 #include <sys/param.h>
32 #include <sys/sockio.h>
33 #include <sys/sysctl.h>
34 #include <sys/mbuf.h>
35 #include <sys/kernel.h>
36 #include <sys/socket.h>
37 #include <sys/systm.h>
38 #include <sys/malloc.h>
39 #include <sys/conf.h>
40 #include <sys/device.h>
41
42 #include <machine/bus.h>
43 #include <machine/endian.h>
44 #include <machine/intr.h>
45
46 #if NBPFILTER > 0
47 #include <net/bpf.h>
48 #endif
49 #include <net/if.h>
50 #include <net/if_arp.h>
51 #include <net/if_dl.h>
52 #include <net/if_ether.h>
53 #include <net/if_media.h>
54 #include <net/if_types.h>
55
56 #include <netinet/in.h>
57 #include <netinet/in_systm.h>
58 #include <netinet/in_var.h>
59 #include <netinet/ip.h>
60
61 #include <net80211/ieee80211_netbsd.h>
62 #include <net80211/ieee80211_var.h>
63 #include <net80211/ieee80211_amrr.h>
64 #include <net80211/ieee80211_radiotap.h>
65
66 #include <dev/usb/usb.h>
67 #include <dev/usb/usbdi.h>
68 #include <dev/usb/usbdi_util.h>
69 #include <dev/usb/usbdevs.h>
70 #include <dev/usb/usb_ethersubr.h>
71
72 #include <dev/usb/if_uralreg.h>
73 #include <dev/usb/if_uralvar.h>
74
75 #ifdef USB_DEBUG
76 #define URAL_DEBUG
77 #endif
78
79 #ifdef URAL_DEBUG
80 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0)
81 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0)
82 int ural_debug = 0;
83 #else
84 #define DPRINTF(x)
85 #define DPRINTFN(n, x)
86 #endif
87
88 /* various supported device vendors/products */
89 static const struct usb_devno ural_devs[] = {
90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G },
91 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 },
92 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G },
94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP },
95 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU },
96 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 },
97 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
98 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
101 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 },
103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 },
104 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 },
105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
106 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
107 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
108 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 },
109 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG },
110 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G },
111 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
112 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 },
113 };
114
115 #if 0
116 Static int ural_alloc_tx_list(struct ural_softc *);
117 #endif
118 Static void ural_free_tx_list(struct ural_softc *);
119 #if 0
120 Static int ural_alloc_rx_list(struct ural_softc *);
121 #endif
122 Static void ural_free_rx_list(struct ural_softc *);
123 Static int ural_media_change(struct ifnet *);
124 Static void ural_next_scan(void *);
125 Static void ural_task(void *);
126 Static int ural_newstate(struct ieee80211com *,
127 enum ieee80211_state, int);
128 Static int ural_rxrate(struct ural_rx_desc *);
129 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle,
130 usbd_status);
131 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle,
132 usbd_status);
133 Static int ural_ack_rate(struct ieee80211com *, int);
134 Static uint16_t ural_txtime(int, int, uint32_t);
135 Static uint8_t ural_plcp_signal(int);
136 Static void ural_setup_tx_desc(struct ural_softc *,
137 struct ural_tx_desc *, uint32_t, int, int);
138 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
139 struct ieee80211_node *);
140 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
141 struct ieee80211_node *);
142 Static int ural_tx_data(struct ural_softc *, struct mbuf *,
143 struct ieee80211_node *);
144 Static void ural_start(struct ifnet *);
145 Static void ural_watchdog(struct ifnet *);
146 Static int ural_reset(struct ifnet *);
147 Static int ural_ioctl(struct ifnet *, u_long, usb_ioctlarg_t);
148 Static void ural_set_testmode(struct ural_softc *);
149 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
150 int);
151 Static uint16_t ural_read(struct ural_softc *, uint16_t);
152 Static void ural_read_multi(struct ural_softc *, uint16_t, void *,
153 int);
154 Static void ural_write(struct ural_softc *, uint16_t, uint16_t);
155 Static void ural_write_multi(struct ural_softc *, uint16_t, void *,
156 int);
157 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
158 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
159 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
160 Static void ural_set_chan(struct ural_softc *,
161 struct ieee80211_channel *);
162 Static void ural_disable_rf_tune(struct ural_softc *);
163 Static void ural_enable_tsf_sync(struct ural_softc *);
164 Static void ural_update_slot(struct ifnet *);
165 Static void ural_set_txpreamble(struct ural_softc *);
166 Static void ural_set_basicrates(struct ural_softc *);
167 Static void ural_set_bssid(struct ural_softc *, uint8_t *);
168 Static void ural_set_macaddr(struct ural_softc *, uint8_t *);
169 Static void ural_update_promisc(struct ural_softc *);
170 Static const char *ural_get_rf(int);
171 Static void ural_read_eeprom(struct ural_softc *);
172 Static int ural_bbp_init(struct ural_softc *);
173 Static void ural_set_txantenna(struct ural_softc *, int);
174 Static void ural_set_rxantenna(struct ural_softc *, int);
175 Static int ural_init(struct ifnet *);
176 Static void ural_stop(struct ifnet *, int);
177 Static void ural_amrr_start(struct ural_softc *,
178 struct ieee80211_node *);
179 Static void ural_amrr_timeout(void *);
180 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle,
181 usbd_status status);
182
183 /*
184 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
185 */
186 static const struct ieee80211_rateset ural_rateset_11a =
187 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
188
189 static const struct ieee80211_rateset ural_rateset_11b =
190 { 4, { 2, 4, 11, 22 } };
191
192 static const struct ieee80211_rateset ural_rateset_11g =
193 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
194
195 /*
196 * Default values for MAC registers; values taken from the reference driver.
197 */
198 static const struct {
199 uint16_t reg;
200 uint16_t val;
201 } ural_def_mac[] = {
202 { RAL_TXRX_CSR5, 0x8c8d },
203 { RAL_TXRX_CSR6, 0x8b8a },
204 { RAL_TXRX_CSR7, 0x8687 },
205 { RAL_TXRX_CSR8, 0x0085 },
206 { RAL_MAC_CSR13, 0x1111 },
207 { RAL_MAC_CSR14, 0x1e11 },
208 { RAL_TXRX_CSR21, 0xe78f },
209 { RAL_MAC_CSR9, 0xff1d },
210 { RAL_MAC_CSR11, 0x0002 },
211 { RAL_MAC_CSR22, 0x0053 },
212 { RAL_MAC_CSR15, 0x0000 },
213 { RAL_MAC_CSR8, 0x0780 },
214 { RAL_TXRX_CSR19, 0x0000 },
215 { RAL_TXRX_CSR18, 0x005a },
216 { RAL_PHY_CSR2, 0x0000 },
217 { RAL_TXRX_CSR0, 0x1ec0 },
218 { RAL_PHY_CSR4, 0x000f }
219 };
220
221 /*
222 * Default values for BBP registers; values taken from the reference driver.
223 */
224 static const struct {
225 uint8_t reg;
226 uint8_t val;
227 } ural_def_bbp[] = {
228 { 3, 0x02 },
229 { 4, 0x19 },
230 { 14, 0x1c },
231 { 15, 0x30 },
232 { 16, 0xac },
233 { 17, 0x48 },
234 { 18, 0x18 },
235 { 19, 0xff },
236 { 20, 0x1e },
237 { 21, 0x08 },
238 { 22, 0x08 },
239 { 23, 0x08 },
240 { 24, 0x80 },
241 { 25, 0x50 },
242 { 26, 0x08 },
243 { 27, 0x23 },
244 { 30, 0x10 },
245 { 31, 0x2b },
246 { 32, 0xb9 },
247 { 34, 0x12 },
248 { 35, 0x50 },
249 { 39, 0xc4 },
250 { 40, 0x02 },
251 { 41, 0x60 },
252 { 53, 0x10 },
253 { 54, 0x18 },
254 { 56, 0x08 },
255 { 57, 0x10 },
256 { 58, 0x08 },
257 { 61, 0x60 },
258 { 62, 0x10 },
259 { 75, 0xff }
260 };
261
262 /*
263 * Default values for RF register R2 indexed by channel numbers.
264 */
265 static const uint32_t ural_rf2522_r2[] = {
266 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
267 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
268 };
269
270 static const uint32_t ural_rf2523_r2[] = {
271 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
272 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
273 };
274
275 static const uint32_t ural_rf2524_r2[] = {
276 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
277 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
278 };
279
280 static const uint32_t ural_rf2525_r2[] = {
281 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
282 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
283 };
284
285 static const uint32_t ural_rf2525_hi_r2[] = {
286 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
287 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
288 };
289
290 static const uint32_t ural_rf2525e_r2[] = {
291 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
292 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
293 };
294
295 static const uint32_t ural_rf2526_hi_r2[] = {
296 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
297 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
298 };
299
300 static const uint32_t ural_rf2526_r2[] = {
301 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
302 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
303 };
304
305 /*
306 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
307 * values taken from the reference driver.
308 */
309 static const struct {
310 uint8_t chan;
311 uint32_t r1;
312 uint32_t r2;
313 uint32_t r4;
314 } ural_rf5222[] = {
315 { 1, 0x08808, 0x0044d, 0x00282 },
316 { 2, 0x08808, 0x0044e, 0x00282 },
317 { 3, 0x08808, 0x0044f, 0x00282 },
318 { 4, 0x08808, 0x00460, 0x00282 },
319 { 5, 0x08808, 0x00461, 0x00282 },
320 { 6, 0x08808, 0x00462, 0x00282 },
321 { 7, 0x08808, 0x00463, 0x00282 },
322 { 8, 0x08808, 0x00464, 0x00282 },
323 { 9, 0x08808, 0x00465, 0x00282 },
324 { 10, 0x08808, 0x00466, 0x00282 },
325 { 11, 0x08808, 0x00467, 0x00282 },
326 { 12, 0x08808, 0x00468, 0x00282 },
327 { 13, 0x08808, 0x00469, 0x00282 },
328 { 14, 0x08808, 0x0046b, 0x00286 },
329
330 { 36, 0x08804, 0x06225, 0x00287 },
331 { 40, 0x08804, 0x06226, 0x00287 },
332 { 44, 0x08804, 0x06227, 0x00287 },
333 { 48, 0x08804, 0x06228, 0x00287 },
334 { 52, 0x08804, 0x06229, 0x00287 },
335 { 56, 0x08804, 0x0622a, 0x00287 },
336 { 60, 0x08804, 0x0622b, 0x00287 },
337 { 64, 0x08804, 0x0622c, 0x00287 },
338
339 { 100, 0x08804, 0x02200, 0x00283 },
340 { 104, 0x08804, 0x02201, 0x00283 },
341 { 108, 0x08804, 0x02202, 0x00283 },
342 { 112, 0x08804, 0x02203, 0x00283 },
343 { 116, 0x08804, 0x02204, 0x00283 },
344 { 120, 0x08804, 0x02205, 0x00283 },
345 { 124, 0x08804, 0x02206, 0x00283 },
346 { 128, 0x08804, 0x02207, 0x00283 },
347 { 132, 0x08804, 0x02208, 0x00283 },
348 { 136, 0x08804, 0x02209, 0x00283 },
349 { 140, 0x08804, 0x0220a, 0x00283 },
350
351 { 149, 0x08808, 0x02429, 0x00281 },
352 { 153, 0x08808, 0x0242b, 0x00281 },
353 { 157, 0x08808, 0x0242d, 0x00281 },
354 { 161, 0x08808, 0x0242f, 0x00281 }
355 };
356
357 USB_DECLARE_DRIVER(ural);
358
359 USB_MATCH(ural)
360 {
361 USB_MATCH_START(ural, uaa);
362
363 #ifndef USB_USE_IFATTACH
364 if (uaa->iface != NULL)
365 return UMATCH_NONE;
366 #endif /* USB_USE_IFATTACH */
367
368 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
369 UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
370 }
371
372 USB_ATTACH(ural)
373 {
374 USB_ATTACH_START(ural, sc, uaa);
375 struct ieee80211com *ic = &sc->sc_ic;
376 struct ifnet *ifp = &sc->sc_if;
377 usb_interface_descriptor_t *id;
378 usb_endpoint_descriptor_t *ed;
379 usbd_status error;
380 char *devinfop;
381 int i;
382
383 sc->sc_udev = uaa->device;
384
385 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
386 USB_ATTACH_SETUP;
387 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop);
388 usbd_devinfo_free(devinfop);
389
390 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
391 printf("%s: could not set configuration no\n",
392 USBDEVNAME(sc->sc_dev));
393 USB_ATTACH_ERROR_RETURN;
394 }
395
396 /* get the first interface handle */
397 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
398 &sc->sc_iface);
399 if (error != 0) {
400 printf("%s: could not get interface handle\n",
401 USBDEVNAME(sc->sc_dev));
402 USB_ATTACH_ERROR_RETURN;
403 }
404
405 /*
406 * Find endpoints.
407 */
408 id = usbd_get_interface_descriptor(sc->sc_iface);
409
410 sc->sc_rx_no = sc->sc_tx_no = -1;
411 for (i = 0; i < id->bNumEndpoints; i++) {
412 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
413 if (ed == NULL) {
414 printf("%s: no endpoint descriptor for %d\n",
415 USBDEVNAME(sc->sc_dev), i);
416 USB_ATTACH_ERROR_RETURN;
417 }
418
419 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
420 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
421 sc->sc_rx_no = ed->bEndpointAddress;
422 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
423 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
424 sc->sc_tx_no = ed->bEndpointAddress;
425 }
426 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
427 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev));
428 USB_ATTACH_ERROR_RETURN;
429 }
430
431 usb_init_task(&sc->sc_task, ural_task, sc);
432 callout_init(&sc->scan_ch);
433 sc->amrr.amrr_min_success_threshold = 1;
434 sc->amrr.amrr_min_success_threshold = 15;
435 callout_init(&sc->amrr_ch);
436
437 /* retrieve RT2570 rev. no */
438 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
439
440 /* retrieve MAC address and various other things from EEPROM */
441 ural_read_eeprom(sc);
442
443 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
444 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev));
445
446 ifp->if_softc = sc;
447 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ);
448 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
449 ifp->if_init = ural_init;
450 ifp->if_ioctl = ural_ioctl;
451 ifp->if_start = ural_start;
452 ifp->if_watchdog = ural_watchdog;
453 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
454 IFQ_SET_READY(&ifp->if_snd);
455
456 ic->ic_ifp = ifp;
457 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
458 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
459 ic->ic_state = IEEE80211_S_INIT;
460
461 /* set device capabilities */
462 ic->ic_caps =
463 IEEE80211_C_IBSS | /* IBSS mode supported */
464 IEEE80211_C_MONITOR | /* monitor mode supported */
465 IEEE80211_C_HOSTAP | /* HostAp mode supported */
466 IEEE80211_C_TXPMGT | /* tx power management */
467 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
468 IEEE80211_C_SHSLOT | /* short slot time supported */
469 IEEE80211_C_WPA; /* 802.11i */
470
471 if (sc->rf_rev == RAL_RF_5222) {
472 /* set supported .11a rates */
473 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a;
474
475 /* set supported .11a channels */
476 for (i = 36; i <= 64; i += 4) {
477 ic->ic_channels[i].ic_freq =
478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
480 }
481 for (i = 100; i <= 140; i += 4) {
482 ic->ic_channels[i].ic_freq =
483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
485 }
486 for (i = 149; i <= 161; i += 4) {
487 ic->ic_channels[i].ic_freq =
488 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
489 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
490 }
491 }
492
493 /* set supported .11b and .11g rates */
494 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b;
495 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g;
496
497 /* set supported .11b and .11g channels (1 through 14) */
498 for (i = 1; i <= 14; i++) {
499 ic->ic_channels[i].ic_freq =
500 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
501 ic->ic_channels[i].ic_flags =
502 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
503 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
504 }
505
506 if_attach(ifp);
507 ieee80211_ifattach(ic);
508 ic->ic_reset = ural_reset;
509
510 /* override state transition machine */
511 sc->sc_newstate = ic->ic_newstate;
512 ic->ic_newstate = ural_newstate;
513 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status);
514
515 #if NBPFILTER > 0
516 bpfattach2(ifp, DLT_IEEE802_11_RADIO,
517 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
518
519 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
520 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
521 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
522
523 sc->sc_txtap_len = sizeof sc->sc_txtapu;
524 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
525 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
526 #endif
527
528 ieee80211_announce(ic);
529
530 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
531 USBDEV(sc->sc_dev));
532
533 USB_ATTACH_SUCCESS_RETURN;
534 }
535
536 USB_DETACH(ural)
537 {
538 USB_DETACH_START(ural, sc);
539 struct ieee80211com *ic = &sc->sc_ic;
540 struct ifnet *ifp = &sc->sc_if;
541 int s;
542
543 s = splusb();
544
545 ural_stop(ifp, 1);
546 usb_rem_task(sc->sc_udev, &sc->sc_task);
547 callout_stop(&sc->scan_ch);
548 callout_stop(&sc->amrr_ch);
549
550 if (sc->sc_rx_pipeh != NULL)
551 usbd_abort_pipe(sc->sc_rx_pipeh);
552
553 if (sc->sc_tx_pipeh != NULL)
554 usbd_abort_pipe(sc->sc_tx_pipeh);
555
556 ural_free_rx_list(sc);
557 ural_free_tx_list(sc);
558
559 if (sc->amrr_xfer != NULL) {
560 usbd_free_xfer(sc->amrr_xfer);
561 sc->amrr_xfer = NULL;
562 }
563
564 if (sc->sc_rx_pipeh != NULL)
565 usbd_close_pipe(sc->sc_rx_pipeh);
566
567 if (sc->sc_tx_pipeh != NULL)
568 usbd_close_pipe(sc->sc_tx_pipeh);
569
570 #if NBPFILTER > 0
571 bpfdetach(ifp);
572 #endif
573 ieee80211_ifdetach(ic);
574 if_detach(ifp);
575
576 splx(s);
577
578 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
579 USBDEV(sc->sc_dev));
580
581 return 0;
582 }
583
584 Static void
585 ural_free_tx_list(struct ural_softc *sc)
586 {
587 int i;
588
589 usb_ether_tx_list_free(sc->tx_data, RAL_TX_LIST_COUNT);
590
591 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
592 if (sc->tx_ni[i] != NULL) {
593 ieee80211_free_node(sc->tx_ni[i]);
594 sc->tx_ni[i] = NULL;
595 }
596 }
597 }
598
599 Static void
600 ural_free_rx_list(struct ural_softc *sc)
601 {
602
603 usb_ether_rx_list_free(sc->rx_data, RAL_RX_LIST_COUNT);
604 }
605
606 Static int
607 ural_media_change(struct ifnet *ifp)
608 {
609 int error;
610
611 error = ieee80211_media_change(ifp);
612 if (error != ENETRESET)
613 return error;
614
615 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
616 ural_init(ifp);
617
618 return 0;
619 }
620
621 /*
622 * This function is called periodically (every 200ms) during scanning to
623 * switch from one channel to another.
624 */
625 Static void
626 ural_next_scan(void *arg)
627 {
628 struct ural_softc *sc = arg;
629 struct ieee80211com *ic = &sc->sc_ic;
630
631 if (ic->ic_state == IEEE80211_S_SCAN)
632 ieee80211_next_scan(ic);
633 }
634
635 Static void
636 ural_task(void *arg)
637 {
638 struct ural_softc *sc = arg;
639 struct ieee80211com *ic = &sc->sc_ic;
640 enum ieee80211_state ostate;
641 struct ieee80211_node *ni;
642 struct mbuf *m;
643
644 ostate = ic->ic_state;
645
646 switch (sc->sc_state) {
647 case IEEE80211_S_INIT:
648 if (ostate == IEEE80211_S_RUN) {
649 /* abort TSF synchronization */
650 ural_write(sc, RAL_TXRX_CSR19, 0);
651
652 /* force tx led to stop blinking */
653 ural_write(sc, RAL_MAC_CSR20, 0);
654 }
655 break;
656
657 case IEEE80211_S_SCAN:
658 ural_set_chan(sc, ic->ic_curchan);
659 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc);
660 break;
661
662 case IEEE80211_S_AUTH:
663 ural_set_chan(sc, ic->ic_curchan);
664 break;
665
666 case IEEE80211_S_ASSOC:
667 ural_set_chan(sc, ic->ic_curchan);
668 break;
669
670 case IEEE80211_S_RUN:
671 ural_set_chan(sc, ic->ic_curchan);
672
673 ni = ic->ic_bss;
674
675 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
676 ural_update_slot(ic->ic_ifp);
677 ural_set_txpreamble(sc);
678 ural_set_basicrates(sc);
679 ural_set_bssid(sc, ni->ni_bssid);
680 }
681
682 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
683 ic->ic_opmode == IEEE80211_M_IBSS) {
684 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
685 if (m == NULL) {
686 printf("%s: could not allocate beacon\n",
687 USBDEVNAME(sc->sc_dev));
688 return;
689 }
690
691 if (ural_tx_bcn(sc, m, ni) != 0) {
692 printf("%s: could not send beacon\n",
693 USBDEVNAME(sc->sc_dev));
694 return;
695 }
696 }
697
698 /* make tx led blink on tx (controlled by ASIC) */
699 ural_write(sc, RAL_MAC_CSR20, 1);
700
701 if (ic->ic_opmode != IEEE80211_M_MONITOR)
702 ural_enable_tsf_sync(sc);
703
704 /* enable automatic rate adaptation in STA mode */
705 if (ic->ic_opmode == IEEE80211_M_STA &&
706 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE)
707 ural_amrr_start(sc, ni);
708
709 break;
710 }
711
712 sc->sc_newstate(ic, sc->sc_state, -1);
713 }
714
715 Static int
716 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate,
717 int arg)
718 {
719 struct ural_softc *sc = ic->ic_ifp->if_softc;
720
721 usb_rem_task(sc->sc_udev, &sc->sc_task);
722 callout_stop(&sc->scan_ch);
723 callout_stop(&sc->amrr_ch);
724
725 /* do it in a process context */
726 sc->sc_state = nstate;
727 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER);
728
729 return 0;
730 }
731
732 /* quickly determine if a given rate is CCK or OFDM */
733 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
734
735 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
736 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
737
738 #define RAL_SIFS 10 /* us */
739
740 #define RAL_RXTX_TURNAROUND 5 /* us */
741
742 /*
743 * This function is only used by the Rx radiotap code.
744 */
745 Static int
746 ural_rxrate(struct ural_rx_desc *desc)
747 {
748 if (le32toh(desc->flags) & RAL_RX_OFDM) {
749 /* reverse function of ural_plcp_signal */
750 switch (desc->rate) {
751 case 0xb: return 12;
752 case 0xf: return 18;
753 case 0xa: return 24;
754 case 0xe: return 36;
755 case 0x9: return 48;
756 case 0xd: return 72;
757 case 0x8: return 96;
758 case 0xc: return 108;
759 }
760 } else {
761 if (desc->rate == 10)
762 return 2;
763 if (desc->rate == 20)
764 return 4;
765 if (desc->rate == 55)
766 return 11;
767 if (desc->rate == 110)
768 return 22;
769 }
770 return 2; /* should not get there */
771 }
772
773 Static void
774 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv,
775 usbd_status status)
776 {
777 struct ue_chain *data = priv;
778 struct ural_softc *sc = (void *)data->ue_dev;
779 struct ifnet *ifp = &sc->sc_if;
780 int s;
781
782 usbd_unmap_buffer(xfer);
783
784 if (status != USBD_NORMAL_COMPLETION) {
785 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
786 return;
787
788 printf("%s: could not transmit buffer: %s\n",
789 USBDEVNAME(sc->sc_dev), usbd_errstr(status));
790
791 if (status == USBD_STALLED)
792 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
793
794 ifp->if_oerrors++;
795 return;
796 }
797
798 s = splnet();
799
800 m_freem(data->ue_mbuf);
801 data->ue_mbuf = NULL;
802 ieee80211_free_node(sc->tx_ni[data->ue_idx]);
803 sc->tx_ni[data->ue_idx] = NULL;
804
805 sc->tx_queued--;
806 ifp->if_opackets++;
807
808 DPRINTFN(10, ("tx done\n"));
809
810 sc->sc_tx_timer = 0;
811 ifp->if_flags &= ~IFF_OACTIVE;
812 ural_start(ifp);
813
814 splx(s);
815 }
816
817 Static void
818 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
819 {
820 struct ue_chain *data = priv;
821 struct ural_softc *sc = (void *)data->ue_dev;
822 struct ieee80211com *ic = &sc->sc_ic;
823 struct ifnet *ifp = &sc->sc_if;
824 struct ural_rx_desc *desc;
825 struct ieee80211_frame *wh;
826 struct ieee80211_node *ni;
827 struct mbuf *m;
828 int s, len;
829 u_int32_t rxflags;
830
831 usbd_unmap_buffer(xfer);
832
833 if (status != USBD_NORMAL_COMPLETION) {
834 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
835 return;
836
837 if (status == USBD_STALLED)
838 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
839 goto skip;
840 }
841
842 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
843
844 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
845 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev),
846 len));
847 ifp->if_ierrors++;
848 goto skip;
849 }
850
851 m = data->ue_mbuf;
852
853 /* rx descriptor is located at the end */
854 desc = (void *)(mtod(m, char *) + len - RAL_RX_DESC_SIZE);
855 rxflags = UGETDW((u_int8_t *)&desc->flags);
856
857 if ((rxflags & RAL_RX_PHY_ERROR) ||
858 (rxflags & RAL_RX_CRC_ERROR)) {
859 /*
860 * This should not happen since we did not request to receive
861 * those frames when we filled RAL_TXRX_CSR2.
862 */
863 DPRINTFN(5, ("PHY or CRC error\n"));
864 ifp->if_ierrors++;
865 goto skip;
866 }
867
868 /*
869 * Allocate new mbuf cluster for the next transfer.
870 * If that failed, discard current packet and recycle the mbuf.
871 */
872 if ((data->ue_mbuf = usb_ether_newbuf(NULL)) == NULL) {
873 printf("%s: no memory for rx list -- packet dropped!\n",
874 USBDEVNAME(sc->sc_dev));
875 ifp->if_ierrors++;
876 data->ue_mbuf = usb_ether_newbuf(m);
877 goto skip;
878 }
879
880 /* finalize mbuf */
881 m->m_pkthdr.rcvif = ifp;
882 m->m_pkthdr.len = m->m_len = (rxflags >> 16) & 0xfff;
883 m->m_flags |= M_HASFCS; /* h/w leaves FCS */
884
885 s = splnet();
886
887 #if NBPFILTER > 0
888 if (sc->sc_drvbpf != NULL) {
889 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
890
891 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS;
892 tap->wr_rate = ural_rxrate(desc);
893 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
894 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
895 tap->wr_antenna = sc->rx_ant;
896 tap->wr_antsignal = desc->rssi;
897
898 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
899 }
900 #endif
901
902 wh = mtod(m, struct ieee80211_frame *);
903 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
904
905 /* send the frame to the 802.11 layer */
906 ieee80211_input(ic, m, ni, desc->rssi, 0);
907
908 /* node is no longer needed */
909 ieee80211_free_node(ni);
910
911 splx(s);
912
913 DPRINTFN(15, ("rx done\n"));
914
915 skip: /* setup a new transfer */
916 (void)usbd_map_buffer_mbuf(xfer, data->ue_mbuf);
917 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, NULL /* XXX buf */, MCLBYTES,
918 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
919 usbd_transfer(xfer);
920 }
921
922 /*
923 * Return the expected ack rate for a frame transmitted at rate `rate'.
924 * XXX: this should depend on the destination node basic rate set.
925 */
926 Static int
927 ural_ack_rate(struct ieee80211com *ic, int rate)
928 {
929 switch (rate) {
930 /* CCK rates */
931 case 2:
932 return 2;
933 case 4:
934 case 11:
935 case 22:
936 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
937
938 /* OFDM rates */
939 case 12:
940 case 18:
941 return 12;
942 case 24:
943 case 36:
944 return 24;
945 case 48:
946 case 72:
947 case 96:
948 case 108:
949 return 48;
950 }
951
952 /* default to 1Mbps */
953 return 2;
954 }
955
956 /*
957 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
958 * The function automatically determines the operating mode depending on the
959 * given rate. `flags' indicates whether short preamble is in use or not.
960 */
961 Static uint16_t
962 ural_txtime(int len, int rate, uint32_t flags)
963 {
964 uint16_t txtime;
965
966 if (RAL_RATE_IS_OFDM(rate)) {
967 /* IEEE Std 802.11g-2003, pp. 37 */
968 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
969 txtime = 16 + 4 + 4 * txtime + 6;
970 } else {
971 /* IEEE Std 802.11b-1999, pp. 28 */
972 txtime = (16 * len + rate - 1) / rate;
973 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
974 txtime += 72 + 24;
975 else
976 txtime += 144 + 48;
977 }
978 return txtime;
979 }
980
981 Static uint8_t
982 ural_plcp_signal(int rate)
983 {
984 switch (rate) {
985 /* CCK rates (returned values are device-dependent) */
986 case 2: return 0x0;
987 case 4: return 0x1;
988 case 11: return 0x2;
989 case 22: return 0x3;
990
991 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
992 case 12: return 0xb;
993 case 18: return 0xf;
994 case 24: return 0xa;
995 case 36: return 0xe;
996 case 48: return 0x9;
997 case 72: return 0xd;
998 case 96: return 0x8;
999 case 108: return 0xc;
1000
1001 /* unsupported rates (should not get there) */
1002 default: return 0xff;
1003 }
1004 }
1005
1006 Static void
1007 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1008 uint32_t flags, int len, int rate)
1009 {
1010 struct ieee80211com *ic = &sc->sc_ic;
1011 uint16_t plcp_length;
1012 int remainder;
1013
1014 desc->flags = htole32(flags);
1015 desc->flags |= htole32(RAL_TX_NEWSEQ);
1016 desc->flags |= htole32(len << 16);
1017
1018 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1019 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1020
1021 /* setup PLCP fields */
1022 desc->plcp_signal = ural_plcp_signal(rate);
1023 desc->plcp_service = 4;
1024
1025 len += IEEE80211_CRC_LEN;
1026 if (RAL_RATE_IS_OFDM(rate)) {
1027 desc->flags |= htole32(RAL_TX_OFDM);
1028
1029 plcp_length = len & 0xfff;
1030 desc->plcp_length_hi = plcp_length >> 6;
1031 desc->plcp_length_lo = plcp_length & 0x3f;
1032 } else {
1033 plcp_length = (16 * len + rate - 1) / rate;
1034 if (rate == 22) {
1035 remainder = (16 * len) % 22;
1036 if (remainder != 0 && remainder < 7)
1037 desc->plcp_service |= RAL_PLCP_LENGEXT;
1038 }
1039 desc->plcp_length_hi = plcp_length >> 8;
1040 desc->plcp_length_lo = plcp_length & 0xff;
1041
1042 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1043 desc->plcp_signal |= 0x08;
1044 }
1045
1046 desc->iv = 0;
1047 desc->eiv = 0;
1048 }
1049
1050 #define RAL_TX_TIMEOUT 5000
1051
1052 Static int
1053 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1054 {
1055 struct ural_tx_desc *desc;
1056 usbd_xfer_handle xfer;
1057 uint8_t cmd = 0;
1058 usbd_status error;
1059 int xferlen, rate;
1060
1061 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1062
1063 xfer = usbd_alloc_xfer(sc->sc_udev, sc->sc_tx_pipeh);
1064 if (xfer == NULL) {
1065 m_freem(m0);
1066 return ENOMEM;
1067 }
1068
1069 if (usbd_map_alloc(xfer)) {
1070 usbd_free_xfer(xfer);
1071 m_freem(m0);
1072 return ENOMEM;
1073 }
1074
1075 /* Prepend Tx descriptor */
1076 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_WAIT);
1077 if (m0 != NULL)
1078 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */
1079 if (m0 == NULL)
1080 return ENOBUFS;
1081 desc = mtod(m0, struct ural_tx_desc *);
1082
1083 /* xfer length needs to be a multiple of two! */
1084 xferlen = (m0->m_pkthdr.len + 1) & ~1;
1085 if (m0->m_pkthdr.len != xferlen) {
1086 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */
1087 if (m0->m_pkthdr.len != xferlen) {
1088 m_freem(m0);
1089 return ENOBUFS;
1090 }
1091 }
1092
1093 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1094 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1095
1096 error = usbd_sync_transfer(xfer);
1097 if (error != 0) {
1098 usbd_free_xfer(xfer);
1099 m_freem(m0);
1100 return error;
1101 }
1102
1103 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1104 m0->m_pkthdr.len, rate);
1105
1106 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1107 m0->m_pkthdr.len, rate, xferlen));
1108
1109 error = usbd_map_buffer_mbuf(xfer, m0);
1110 if (error != 0) {
1111 usbd_free_xfer(xfer);
1112 m_freem(m0);
1113 return error;
1114 }
1115
1116 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, NULL /* XXX buf */, xferlen,
1117 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1118
1119 error = usbd_sync_transfer(xfer);
1120 usbd_free_xfer(xfer);
1121
1122 m_freem(m0);
1123 return error;
1124 }
1125
1126 Static int
1127 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1128 {
1129 struct ieee80211com *ic = &sc->sc_ic;
1130 struct ural_tx_desc *desc;
1131 struct ue_chain *data;
1132 struct ieee80211_frame *wh;
1133 uint32_t flags = 0;
1134 uint16_t dur;
1135 usbd_status error;
1136 int xferlen, rate;
1137 int ret;
1138
1139 data = &sc->tx_data[0];
1140
1141 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1142
1143 data->ue_mbuf = m0;
1144 sc->tx_ni[data->ue_idx] = ni;
1145
1146 wh = mtod(m0, struct ieee80211_frame *);
1147
1148 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1149 flags |= RAL_TX_ACK;
1150
1151 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS;
1152 *(uint16_t *)wh->i_dur = htole16(dur);
1153
1154 /* tell hardware to add timestamp for probe responses */
1155 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1156 IEEE80211_FC0_TYPE_MGT &&
1157 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1158 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1159 flags |= RAL_TX_TIMESTAMP;
1160 }
1161
1162 #if NBPFILTER > 0
1163 if (sc->sc_drvbpf != NULL) {
1164 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1165
1166 tap->wt_flags = 0;
1167 tap->wt_rate = rate;
1168 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1169 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1170 tap->wt_antenna = sc->tx_ant;
1171
1172 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1173 }
1174 #endif
1175
1176 /* Prepend Tx descriptor */
1177 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_DONTWAIT);
1178 if (m0 != NULL)
1179 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */
1180 if (m0 == NULL) {
1181 return ENOBUFS;
1182 }
1183 desc = mtod(m0, struct ural_tx_desc *);
1184
1185 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1186
1187 /* align end on a 2-bytes boundary */
1188 xferlen = (m0->m_pkthdr.len + 1) & ~1;
1189
1190 /*
1191 * No space left in the last URB to store the extra 2 bytes, force
1192 * sending of another URB.
1193 */
1194 if ((xferlen % 64) == 0)
1195 xferlen += 2;
1196
1197 if (m0->m_pkthdr.len != xferlen) {
1198 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */
1199 if (m0->m_pkthdr.len != xferlen) {
1200 m_freem(m0);
1201 return ENOBUFS;
1202 }
1203 }
1204
1205 ret = usb_ether_map_tx_buffer_mbuf(data, m0);
1206 if (ret) {
1207 m_freem(m0);
1208 return ret;
1209 }
1210
1211 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n",
1212 m0->m_pkthdr.len, rate, xferlen));
1213
1214 usbd_setup_xfer(data->ue_xfer, sc->sc_tx_pipeh, data, NULL /* XXX buf */,
1215 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1216 ural_txeof);
1217
1218 error = usbd_transfer(data->ue_xfer);
1219 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1220 data->ue_mbuf = NULL;
1221 m_freem(m0);
1222 return error;
1223 }
1224
1225 sc->tx_queued++;
1226
1227 return 0;
1228 }
1229
1230 Static int
1231 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1232 {
1233 struct ieee80211com *ic = &sc->sc_ic;
1234 struct ural_tx_desc *desc;
1235 struct ue_chain *data;
1236 struct ieee80211_frame *wh;
1237 struct ieee80211_key *k;
1238 uint32_t flags = 0;
1239 uint16_t dur;
1240 usbd_status error;
1241 int xferlen, rate;
1242 int ret;
1243
1244 wh = mtod(m0, struct ieee80211_frame *);
1245
1246 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE)
1247 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate];
1248 else
1249 rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1250
1251 rate &= IEEE80211_RATE_VAL;
1252
1253 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1254 k = ieee80211_crypto_encap(ic, ni, m0);
1255 if (k == NULL) {
1256 m_freem(m0);
1257 return ENOBUFS;
1258 }
1259
1260 /* packet header may have moved, reset our local pointer */
1261 wh = mtod(m0, struct ieee80211_frame *);
1262 }
1263
1264 data = &sc->tx_data[0];
1265
1266 data->ue_mbuf = m0;
1267 sc->tx_ni[data->ue_idx] = ni;
1268
1269 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1270 flags |= RAL_TX_ACK;
1271 flags |= RAL_TX_RETRY(7);
1272
1273 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate),
1274 ic->ic_flags) + RAL_SIFS;
1275 *(uint16_t *)wh->i_dur = htole16(dur);
1276 }
1277
1278 #if NBPFILTER > 0
1279 if (sc->sc_drvbpf != NULL) {
1280 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1281
1282 tap->wt_flags = 0;
1283 tap->wt_rate = rate;
1284 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1285 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1286 tap->wt_antenna = sc->tx_ant;
1287
1288 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1289 }
1290 #endif
1291
1292 /* Prepend Tx descriptor */
1293 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_DONTWAIT);
1294 if (m0 != NULL)
1295 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */
1296 if (m0 == NULL) {
1297 return ENOBUFS;
1298 }
1299 desc = mtod(m0, struct ural_tx_desc *);
1300
1301 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1302
1303 /* align end on a 2-bytes boundary */
1304 xferlen = (m0->m_pkthdr.len + 1) & ~1;
1305
1306 /*
1307 * No space left in the last URB to store the extra 2 bytes, force
1308 * sending of another URB.
1309 */
1310 if ((xferlen % 64) == 0)
1311 xferlen += 2;
1312
1313 if (m0->m_pkthdr.len != xferlen) {
1314 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */
1315 if (m0->m_pkthdr.len != xferlen) {
1316 m_freem(m0);
1317 return ENOBUFS;
1318 }
1319 }
1320
1321 ret = usb_ether_map_tx_buffer_mbuf(data, m0);
1322 if (ret) {
1323 m_freem(m0);
1324 return ret;
1325 }
1326
1327 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n",
1328 m0->m_pkthdr.len, rate, xferlen));
1329
1330 usbd_setup_xfer(data->ue_xfer, sc->sc_tx_pipeh, data, NULL /* XXX buf */,
1331 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT,
1332 ural_txeof);
1333
1334 error = usbd_transfer(data->ue_xfer);
1335 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) {
1336 data->ue_mbuf = NULL;
1337 m_freem(m0);
1338 return error;
1339 }
1340
1341 sc->tx_queued++;
1342
1343 return 0;
1344 }
1345
1346 Static void
1347 ural_start(struct ifnet *ifp)
1348 {
1349 struct ural_softc *sc = ifp->if_softc;
1350 struct ieee80211com *ic = &sc->sc_ic;
1351 struct mbuf *m0;
1352 struct ether_header *eh;
1353 struct ieee80211_node *ni;
1354
1355 for (;;) {
1356 IF_POLL(&ic->ic_mgtq, m0);
1357 if (m0 != NULL) {
1358 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1359 ifp->if_flags |= IFF_OACTIVE;
1360 break;
1361 }
1362 IF_DEQUEUE(&ic->ic_mgtq, m0);
1363
1364 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1365 m0->m_pkthdr.rcvif = NULL;
1366 #if NBPFILTER > 0
1367 if (ic->ic_rawbpf != NULL)
1368 bpf_mtap(ic->ic_rawbpf, m0);
1369 #endif
1370 if (ural_tx_mgt(sc, m0, ni) != 0)
1371 break;
1372
1373 } else {
1374 if (ic->ic_state != IEEE80211_S_RUN)
1375 break;
1376 IFQ_DEQUEUE(&ifp->if_snd, m0);
1377 if (m0 == NULL)
1378 break;
1379 if (sc->tx_queued >= RAL_TX_LIST_COUNT) {
1380 IF_PREPEND(&ifp->if_snd, m0);
1381 ifp->if_flags |= IFF_OACTIVE;
1382 break;
1383 }
1384
1385 if (m0->m_len < sizeof (struct ether_header) &&
1386 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1387 continue;
1388
1389 eh = mtod(m0, struct ether_header *);
1390 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1391 if (ni == NULL) {
1392 m_freem(m0);
1393 continue;
1394 }
1395 #if NBPFILTER > 0
1396 if (ifp->if_bpf != NULL)
1397 bpf_mtap(ifp->if_bpf, m0);
1398 #endif
1399 m0 = ieee80211_encap(ic, m0, ni);
1400 if (m0 == NULL) {
1401 ieee80211_free_node(ni);
1402 continue;
1403 }
1404 #if NBPFILTER > 0
1405 if (ic->ic_rawbpf != NULL)
1406 bpf_mtap(ic->ic_rawbpf, m0);
1407 #endif
1408 if (ural_tx_data(sc, m0, ni) != 0) {
1409 ieee80211_free_node(ni);
1410 ifp->if_oerrors++;
1411 break;
1412 }
1413 }
1414
1415 sc->sc_tx_timer = 5;
1416 ifp->if_timer = 1;
1417 }
1418 }
1419
1420 Static void
1421 ural_watchdog(struct ifnet *ifp)
1422 {
1423 struct ural_softc *sc = ifp->if_softc;
1424 struct ieee80211com *ic = &sc->sc_ic;
1425
1426 ifp->if_timer = 0;
1427
1428 if (sc->sc_tx_timer > 0) {
1429 if (--sc->sc_tx_timer == 0) {
1430 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev));
1431 /*ural_init(sc); XXX needs a process context! */
1432 ifp->if_oerrors++;
1433 return;
1434 }
1435 ifp->if_timer = 1;
1436 }
1437
1438 ieee80211_watchdog(ic);
1439 }
1440
1441 /*
1442 * This function allows for fast channel switching in monitor mode (used by
1443 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1444 * generate a new beacon frame.
1445 */
1446 Static int
1447 ural_reset(struct ifnet *ifp)
1448 {
1449 struct ural_softc *sc = ifp->if_softc;
1450 struct ieee80211com *ic = &sc->sc_ic;
1451
1452 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1453 return ENETRESET;
1454
1455 ural_set_chan(sc, ic->ic_curchan);
1456
1457 return 0;
1458 }
1459
1460 Static int
1461 ural_ioctl(struct ifnet *ifp, u_long cmd, usb_ioctlarg_t data)
1462 {
1463 struct ural_softc *sc = ifp->if_softc;
1464 struct ieee80211com *ic = &sc->sc_ic;
1465 int s, error = 0;
1466
1467 s = splnet();
1468
1469 switch (cmd) {
1470 case SIOCSIFFLAGS:
1471 if (ifp->if_flags & IFF_UP) {
1472 if (ifp->if_flags & IFF_RUNNING)
1473 ural_update_promisc(sc);
1474 else
1475 ural_init(ifp);
1476 } else {
1477 if (ifp->if_flags & IFF_RUNNING)
1478 ural_stop(ifp, 1);
1479 }
1480 break;
1481
1482 default:
1483 error = ieee80211_ioctl(ic, cmd, data);
1484 }
1485
1486 if (error == ENETRESET) {
1487 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1488 (IFF_UP | IFF_RUNNING))
1489 ural_init(ifp);
1490 error = 0;
1491 }
1492
1493 splx(s);
1494
1495 return error;
1496 }
1497
1498 Static void
1499 ural_set_testmode(struct ural_softc *sc)
1500 {
1501 usb_device_request_t req;
1502 usbd_status error;
1503
1504 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1505 req.bRequest = RAL_VENDOR_REQUEST;
1506 USETW(req.wValue, 4);
1507 USETW(req.wIndex, 1);
1508 USETW(req.wLength, 0);
1509
1510 error = usbd_do_request(sc->sc_udev, &req, NULL);
1511 if (error != 0) {
1512 printf("%s: could not set test mode: %s\n",
1513 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1514 }
1515 }
1516
1517 Static void
1518 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1519 {
1520 usb_device_request_t req;
1521 usbd_status error;
1522
1523 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1524 req.bRequest = RAL_READ_EEPROM;
1525 USETW(req.wValue, 0);
1526 USETW(req.wIndex, addr);
1527 USETW(req.wLength, len);
1528
1529 error = usbd_do_request(sc->sc_udev, &req, buf);
1530 if (error != 0) {
1531 printf("%s: could not read EEPROM: %s\n",
1532 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1533 }
1534 }
1535
1536 Static uint16_t
1537 ural_read(struct ural_softc *sc, uint16_t reg)
1538 {
1539 usb_device_request_t req;
1540 usbd_status error;
1541 uint16_t val;
1542
1543 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1544 req.bRequest = RAL_READ_MAC;
1545 USETW(req.wValue, 0);
1546 USETW(req.wIndex, reg);
1547 USETW(req.wLength, sizeof (uint16_t));
1548
1549 error = usbd_do_request(sc->sc_udev, &req, &val);
1550 if (error != 0) {
1551 printf("%s: could not read MAC register: %s\n",
1552 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1553 return 0;
1554 }
1555
1556 return le16toh(val);
1557 }
1558
1559 Static void
1560 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1561 {
1562 usb_device_request_t req;
1563 usbd_status error;
1564
1565 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1566 req.bRequest = RAL_READ_MULTI_MAC;
1567 USETW(req.wValue, 0);
1568 USETW(req.wIndex, reg);
1569 USETW(req.wLength, len);
1570
1571 error = usbd_do_request(sc->sc_udev, &req, buf);
1572 if (error != 0) {
1573 printf("%s: could not read MAC register: %s\n",
1574 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1575 }
1576 }
1577
1578 Static void
1579 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1580 {
1581 usb_device_request_t req;
1582 usbd_status error;
1583
1584 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1585 req.bRequest = RAL_WRITE_MAC;
1586 USETW(req.wValue, val);
1587 USETW(req.wIndex, reg);
1588 USETW(req.wLength, 0);
1589
1590 error = usbd_do_request(sc->sc_udev, &req, NULL);
1591 if (error != 0) {
1592 printf("%s: could not write MAC register: %s\n",
1593 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1594 }
1595 }
1596
1597 Static void
1598 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1599 {
1600 usb_device_request_t req;
1601 usbd_status error;
1602
1603 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1604 req.bRequest = RAL_WRITE_MULTI_MAC;
1605 USETW(req.wValue, 0);
1606 USETW(req.wIndex, reg);
1607 USETW(req.wLength, len);
1608
1609 error = usbd_do_request(sc->sc_udev, &req, buf);
1610 if (error != 0) {
1611 printf("%s: could not write MAC register: %s\n",
1612 USBDEVNAME(sc->sc_dev), usbd_errstr(error));
1613 }
1614 }
1615
1616 Static void
1617 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1618 {
1619 uint16_t tmp;
1620 int ntries;
1621
1622 for (ntries = 0; ntries < 5; ntries++) {
1623 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1624 break;
1625 }
1626 if (ntries == 5) {
1627 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev));
1628 return;
1629 }
1630
1631 tmp = reg << 8 | val;
1632 ural_write(sc, RAL_PHY_CSR7, tmp);
1633 }
1634
1635 Static uint8_t
1636 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1637 {
1638 uint16_t val;
1639 int ntries;
1640
1641 val = RAL_BBP_WRITE | reg << 8;
1642 ural_write(sc, RAL_PHY_CSR7, val);
1643
1644 for (ntries = 0; ntries < 5; ntries++) {
1645 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1646 break;
1647 }
1648 if (ntries == 5) {
1649 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev));
1650 return 0;
1651 }
1652
1653 return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1654 }
1655
1656 Static void
1657 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1658 {
1659 uint32_t tmp;
1660 int ntries;
1661
1662 for (ntries = 0; ntries < 5; ntries++) {
1663 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1664 break;
1665 }
1666 if (ntries == 5) {
1667 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev));
1668 return;
1669 }
1670
1671 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1672 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1673 ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1674
1675 /* remember last written value in sc */
1676 sc->rf_regs[reg] = val;
1677
1678 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1679 }
1680
1681 Static void
1682 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1683 {
1684 struct ieee80211com *ic = &sc->sc_ic;
1685 uint8_t power, tmp;
1686 u_int i, chan;
1687
1688 chan = ieee80211_chan2ieee(ic, c);
1689 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1690 return;
1691
1692 if (IEEE80211_IS_CHAN_2GHZ(c))
1693 power = min(sc->txpow[chan - 1], 31);
1694 else
1695 power = 31;
1696
1697 /* adjust txpower using ifconfig settings */
1698 power -= (100 - ic->ic_txpowlimit) / 8;
1699
1700 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1701
1702 switch (sc->rf_rev) {
1703 case RAL_RF_2522:
1704 ural_rf_write(sc, RAL_RF1, 0x00814);
1705 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1706 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1707 break;
1708
1709 case RAL_RF_2523:
1710 ural_rf_write(sc, RAL_RF1, 0x08804);
1711 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1712 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1713 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1714 break;
1715
1716 case RAL_RF_2524:
1717 ural_rf_write(sc, RAL_RF1, 0x0c808);
1718 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1719 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1720 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1721 break;
1722
1723 case RAL_RF_2525:
1724 ural_rf_write(sc, RAL_RF1, 0x08808);
1725 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1726 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1727 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1728
1729 ural_rf_write(sc, RAL_RF1, 0x08808);
1730 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1731 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1732 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1733 break;
1734
1735 case RAL_RF_2525E:
1736 ural_rf_write(sc, RAL_RF1, 0x08808);
1737 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1738 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1739 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1740 break;
1741
1742 case RAL_RF_2526:
1743 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1744 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1745 ural_rf_write(sc, RAL_RF1, 0x08804);
1746
1747 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1748 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1749 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1750 break;
1751
1752 /* dual-band RF */
1753 case RAL_RF_5222:
1754 for (i = 0; ural_rf5222[i].chan != chan; i++);
1755
1756 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1757 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1758 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1759 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1760 break;
1761 }
1762
1763 if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1764 ic->ic_state != IEEE80211_S_SCAN) {
1765 /* set Japan filter bit for channel 14 */
1766 tmp = ural_bbp_read(sc, 70);
1767
1768 tmp &= ~RAL_JAPAN_FILTER;
1769 if (chan == 14)
1770 tmp |= RAL_JAPAN_FILTER;
1771
1772 ural_bbp_write(sc, 70, tmp);
1773
1774 /* clear CRC errors */
1775 ural_read(sc, RAL_STA_CSR0);
1776
1777 DELAY(10000);
1778 ural_disable_rf_tune(sc);
1779 }
1780 }
1781
1782 /*
1783 * Disable RF auto-tuning.
1784 */
1785 Static void
1786 ural_disable_rf_tune(struct ural_softc *sc)
1787 {
1788 uint32_t tmp;
1789
1790 if (sc->rf_rev != RAL_RF_2523) {
1791 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1792 ural_rf_write(sc, RAL_RF1, tmp);
1793 }
1794
1795 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1796 ural_rf_write(sc, RAL_RF3, tmp);
1797
1798 DPRINTFN(2, ("disabling RF autotune\n"));
1799 }
1800
1801 /*
1802 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1803 * synchronization.
1804 */
1805 Static void
1806 ural_enable_tsf_sync(struct ural_softc *sc)
1807 {
1808 struct ieee80211com *ic = &sc->sc_ic;
1809 uint16_t logcwmin, preload, tmp;
1810
1811 /* first, disable TSF synchronization */
1812 ural_write(sc, RAL_TXRX_CSR19, 0);
1813
1814 tmp = (16 * ic->ic_bss->ni_intval) << 4;
1815 ural_write(sc, RAL_TXRX_CSR18, tmp);
1816
1817 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1818 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1819 tmp = logcwmin << 12 | preload;
1820 ural_write(sc, RAL_TXRX_CSR20, tmp);
1821
1822 /* finally, enable TSF synchronization */
1823 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1824 if (ic->ic_opmode == IEEE80211_M_STA)
1825 tmp |= RAL_ENABLE_TSF_SYNC(1);
1826 else
1827 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1828 ural_write(sc, RAL_TXRX_CSR19, tmp);
1829
1830 DPRINTF(("enabling TSF synchronization\n"));
1831 }
1832
1833 Static void
1834 ural_update_slot(struct ifnet *ifp)
1835 {
1836 struct ural_softc *sc = ifp->if_softc;
1837 struct ieee80211com *ic = &sc->sc_ic;
1838 uint16_t slottime, sifs, eifs;
1839
1840 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1841
1842 /*
1843 * These settings may sound a bit inconsistent but this is what the
1844 * reference driver does.
1845 */
1846 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1847 sifs = 16 - RAL_RXTX_TURNAROUND;
1848 eifs = 364;
1849 } else {
1850 sifs = 10 - RAL_RXTX_TURNAROUND;
1851 eifs = 64;
1852 }
1853
1854 ural_write(sc, RAL_MAC_CSR10, slottime);
1855 ural_write(sc, RAL_MAC_CSR11, sifs);
1856 ural_write(sc, RAL_MAC_CSR12, eifs);
1857 }
1858
1859 Static void
1860 ural_set_txpreamble(struct ural_softc *sc)
1861 {
1862 uint16_t tmp;
1863
1864 tmp = ural_read(sc, RAL_TXRX_CSR10);
1865
1866 tmp &= ~RAL_SHORT_PREAMBLE;
1867 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1868 tmp |= RAL_SHORT_PREAMBLE;
1869
1870 ural_write(sc, RAL_TXRX_CSR10, tmp);
1871 }
1872
1873 Static void
1874 ural_set_basicrates(struct ural_softc *sc)
1875 {
1876 struct ieee80211com *ic = &sc->sc_ic;
1877
1878 /* update basic rate set */
1879 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1880 /* 11b basic rates: 1, 2Mbps */
1881 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1882 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
1883 /* 11a basic rates: 6, 12, 24Mbps */
1884 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1885 } else {
1886 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1887 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1888 }
1889 }
1890
1891 Static void
1892 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid)
1893 {
1894 uint16_t tmp;
1895
1896 tmp = bssid[0] | bssid[1] << 8;
1897 ural_write(sc, RAL_MAC_CSR5, tmp);
1898
1899 tmp = bssid[2] | bssid[3] << 8;
1900 ural_write(sc, RAL_MAC_CSR6, tmp);
1901
1902 tmp = bssid[4] | bssid[5] << 8;
1903 ural_write(sc, RAL_MAC_CSR7, tmp);
1904
1905 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
1906 }
1907
1908 Static void
1909 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1910 {
1911 uint16_t tmp;
1912
1913 tmp = addr[0] | addr[1] << 8;
1914 ural_write(sc, RAL_MAC_CSR2, tmp);
1915
1916 tmp = addr[2] | addr[3] << 8;
1917 ural_write(sc, RAL_MAC_CSR3, tmp);
1918
1919 tmp = addr[4] | addr[5] << 8;
1920 ural_write(sc, RAL_MAC_CSR4, tmp);
1921
1922 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
1923 }
1924
1925 Static void
1926 ural_update_promisc(struct ural_softc *sc)
1927 {
1928 struct ifnet *ifp = sc->sc_ic.ic_ifp;
1929 uint32_t tmp;
1930
1931 tmp = ural_read(sc, RAL_TXRX_CSR2);
1932
1933 tmp &= ~RAL_DROP_NOT_TO_ME;
1934 if (!(ifp->if_flags & IFF_PROMISC))
1935 tmp |= RAL_DROP_NOT_TO_ME;
1936
1937 ural_write(sc, RAL_TXRX_CSR2, tmp);
1938
1939 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1940 "entering" : "leaving"));
1941 }
1942
1943 Static const char *
1944 ural_get_rf(int rev)
1945 {
1946 switch (rev) {
1947 case RAL_RF_2522: return "RT2522";
1948 case RAL_RF_2523: return "RT2523";
1949 case RAL_RF_2524: return "RT2524";
1950 case RAL_RF_2525: return "RT2525";
1951 case RAL_RF_2525E: return "RT2525e";
1952 case RAL_RF_2526: return "RT2526";
1953 case RAL_RF_5222: return "RT5222";
1954 default: return "unknown";
1955 }
1956 }
1957
1958 Static void
1959 ural_read_eeprom(struct ural_softc *sc)
1960 {
1961 struct ieee80211com *ic = &sc->sc_ic;
1962 uint16_t val;
1963
1964 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1965 val = le16toh(val);
1966 sc->rf_rev = (val >> 11) & 0x7;
1967 sc->hw_radio = (val >> 10) & 0x1;
1968 sc->led_mode = (val >> 6) & 0x7;
1969 sc->rx_ant = (val >> 4) & 0x3;
1970 sc->tx_ant = (val >> 2) & 0x3;
1971 sc->nb_ant = val & 0x3;
1972
1973 /* read MAC address */
1974 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
1975
1976 /* read default values for BBP registers */
1977 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1978
1979 /* read Tx power for all b/g channels */
1980 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1981 }
1982
1983 Static int
1984 ural_bbp_init(struct ural_softc *sc)
1985 {
1986 #define N(a) (sizeof (a) / sizeof ((a)[0]))
1987 int i, ntries;
1988
1989 /* wait for BBP to be ready */
1990 for (ntries = 0; ntries < 100; ntries++) {
1991 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1992 break;
1993 DELAY(1000);
1994 }
1995 if (ntries == 100) {
1996 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev));
1997 return EIO;
1998 }
1999
2000 /* initialize BBP registers to default values */
2001 for (i = 0; i < N(ural_def_bbp); i++)
2002 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
2003
2004 #if 0
2005 /* initialize BBP registers to values stored in EEPROM */
2006 for (i = 0; i < 16; i++) {
2007 if (sc->bbp_prom[i].reg == 0xff)
2008 continue;
2009 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2010 }
2011 #endif
2012
2013 return 0;
2014 #undef N
2015 }
2016
2017 Static void
2018 ural_set_txantenna(struct ural_softc *sc, int antenna)
2019 {
2020 uint16_t tmp;
2021 uint8_t tx;
2022
2023 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2024 if (antenna == 1)
2025 tx |= RAL_BBP_ANTA;
2026 else if (antenna == 2)
2027 tx |= RAL_BBP_ANTB;
2028 else
2029 tx |= RAL_BBP_DIVERSITY;
2030
2031 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2032 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2033 sc->rf_rev == RAL_RF_5222)
2034 tx |= RAL_BBP_FLIPIQ;
2035
2036 ural_bbp_write(sc, RAL_BBP_TX, tx);
2037
2038 /* update values in PHY_CSR5 and PHY_CSR6 */
2039 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2040 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2041
2042 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2043 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2044 }
2045
2046 Static void
2047 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2048 {
2049 uint8_t rx;
2050
2051 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2052 if (antenna == 1)
2053 rx |= RAL_BBP_ANTA;
2054 else if (antenna == 2)
2055 rx |= RAL_BBP_ANTB;
2056 else
2057 rx |= RAL_BBP_DIVERSITY;
2058
2059 /* need to force no I/Q flip for RF 2525e and 2526 */
2060 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2061 rx &= ~RAL_BBP_FLIPIQ;
2062
2063 ural_bbp_write(sc, RAL_BBP_RX, rx);
2064 }
2065
2066 Static int
2067 ural_init(struct ifnet *ifp)
2068 {
2069 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2070 struct ural_softc *sc = ifp->if_softc;
2071 struct ieee80211com *ic = &sc->sc_ic;
2072 struct ieee80211_key *wk;
2073 struct ue_chain *data;
2074 uint16_t tmp;
2075 usbd_status uerror;
2076 int error;
2077 int i, ntries;
2078
2079 ural_set_testmode(sc);
2080 ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2081
2082 ural_stop(ifp, 0);
2083
2084 /* initialize MAC registers to default values */
2085 for (i = 0; i < N(ural_def_mac); i++)
2086 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2087
2088 /* wait for BBP and RF to wake up (this can take a long time!) */
2089 for (ntries = 0; ntries < 100; ntries++) {
2090 tmp = ural_read(sc, RAL_MAC_CSR17);
2091 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2092 (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2093 break;
2094 DELAY(1000);
2095 }
2096 if (ntries == 100) {
2097 printf("%s: timeout waiting for BBP/RF to wakeup\n",
2098 USBDEVNAME(sc->sc_dev));
2099 error = EIO;
2100 goto fail;
2101 }
2102
2103 /* we're ready! */
2104 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2105
2106 /* set basic rate set (will be updated later) */
2107 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2108
2109 error = ural_bbp_init(sc);
2110 if (error != 0)
2111 goto fail;
2112
2113 /* set default BSS channel */
2114 ural_set_chan(sc, ic->ic_curchan);
2115
2116 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2117 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2118
2119 ural_set_txantenna(sc, sc->tx_ant);
2120 ural_set_rxantenna(sc, sc->rx_ant);
2121
2122 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
2123 ural_set_macaddr(sc, ic->ic_myaddr);
2124
2125 /*
2126 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
2127 */
2128 for (i = 0; i < IEEE80211_WEP_NKID; i++) {
2129 wk = &ic->ic_crypto.cs_nw_keys[i];
2130 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE +
2131 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE);
2132 }
2133
2134 /*
2135 * Allocate xfer for AMRR statistics requests.
2136 */
2137 sc->amrr_xfer = usbd_alloc_default_xfer(sc->sc_udev);
2138 if (sc->amrr_xfer == NULL) {
2139 printf("%s: could not allocate AMRR xfer\n",
2140 USBDEVNAME(sc->sc_dev));
2141 goto fail;
2142 }
2143
2144 /*
2145 * Open Tx and Rx USB bulk pipes.
2146 */
2147 uerror = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2148 &sc->sc_tx_pipeh);
2149 if (uerror != USBD_NORMAL_COMPLETION) {
2150 printf("%s: could not open Tx pipe: %s\n",
2151 USBDEVNAME(sc->sc_dev), usbd_errstr(uerror));
2152 error = EIO;
2153 goto fail;
2154 }
2155
2156 uerror = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2157 &sc->sc_rx_pipeh);
2158 if (uerror != USBD_NORMAL_COMPLETION) {
2159 printf("%s: could not open Rx pipe: %s\n",
2160 USBDEVNAME(sc->sc_dev), usbd_errstr(uerror));
2161 error = EIO;
2162 goto fail;
2163 }
2164
2165 /*
2166 * Allocate Tx and Rx xfer queues.
2167 */
2168 sc->tx_queued = 0;
2169 error = usb_ether_tx_list_init(USBDEV(sc->sc_dev),
2170 sc->tx_data, RAL_TX_LIST_COUNT,
2171 sc->sc_udev, sc->sc_tx_pipeh, NULL);
2172 if (error != 0) {
2173 printf("%s: could not allocate Tx list\n",
2174 USBDEVNAME(sc->sc_dev));
2175 goto fail;
2176 }
2177
2178 error = usb_ether_rx_list_init(USBDEV(sc->sc_dev),
2179 sc->rx_data, RAL_RX_LIST_COUNT,
2180 sc->sc_udev, sc->sc_rx_pipeh);
2181 if (error != 0) {
2182 printf("%s: could not allocate Rx list\n",
2183 USBDEVNAME(sc->sc_dev));
2184 goto fail;
2185 }
2186
2187 /*
2188 * Start up the receive pipe.
2189 */
2190 for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2191 data = &sc->rx_data[i];
2192
2193 (void)usbd_map_buffer_mbuf(data->ue_xfer, data->ue_mbuf);
2194 usbd_setup_xfer(data->ue_xfer, sc->sc_rx_pipeh, data, NULL /* XXX buf */,
2195 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2196 usbd_transfer(data->ue_xfer);
2197 }
2198
2199 /* kick Rx */
2200 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
2201 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2202 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
2203 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2204 tmp |= RAL_DROP_TODS;
2205 if (!(ifp->if_flags & IFF_PROMISC))
2206 tmp |= RAL_DROP_NOT_TO_ME;
2207 }
2208 ural_write(sc, RAL_TXRX_CSR2, tmp);
2209
2210 ifp->if_flags &= ~IFF_OACTIVE;
2211 ifp->if_flags |= IFF_RUNNING;
2212
2213 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2214 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2215 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2216 } else
2217 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2218
2219 return 0;
2220
2221 fail: ural_stop(ifp, 1);
2222 return error;
2223 #undef N
2224 }
2225
2226 Static void
2227 ural_stop(struct ifnet *ifp, int disable)
2228 {
2229 struct ural_softc *sc = ifp->if_softc;
2230 struct ieee80211com *ic = &sc->sc_ic;
2231
2232 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2233
2234 sc->sc_tx_timer = 0;
2235 ifp->if_timer = 0;
2236 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2237
2238 /* disable Rx */
2239 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2240
2241 /* reset ASIC and BBP (but won't reset MAC registers!) */
2242 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2243 ural_write(sc, RAL_MAC_CSR1, 0);
2244
2245 /* Stop transfers. */
2246 if (sc->sc_rx_pipeh != NULL)
2247 usbd_abort_pipe(sc->sc_rx_pipeh);
2248
2249 if (sc->sc_tx_pipeh != NULL)
2250 usbd_abort_pipe(sc->sc_tx_pipeh);
2251
2252 /* Free RX/TX resources. */
2253 ural_free_rx_list(sc);
2254 ural_free_tx_list(sc);
2255
2256 /* Close pipes. */
2257 if (sc->amrr_xfer != NULL) {
2258 usbd_free_xfer(sc->amrr_xfer);
2259 sc->amrr_xfer = NULL;
2260 }
2261
2262 if (sc->sc_rx_pipeh != NULL) {
2263 usbd_close_pipe(sc->sc_rx_pipeh);
2264 sc->sc_rx_pipeh = NULL;
2265 }
2266
2267 if (sc->sc_tx_pipeh != NULL) {
2268 usbd_close_pipe(sc->sc_tx_pipeh);
2269 sc->sc_tx_pipeh = NULL;
2270 }
2271 }
2272
2273 int
2274 ural_activate(device_ptr_t self, enum devact act)
2275 {
2276 struct ural_softc *sc = (struct ural_softc *)self;
2277
2278 switch (act) {
2279 case DVACT_ACTIVATE:
2280 return EOPNOTSUPP;
2281 break;
2282
2283 case DVACT_DEACTIVATE:
2284 if_deactivate(&sc->sc_if);
2285 break;
2286 }
2287
2288 return 0;
2289 }
2290
2291 Static void
2292 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
2293 {
2294 int i;
2295
2296 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2297 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2298
2299 ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
2300
2301 /* set rate to some reasonable initial value */
2302 for (i = ni->ni_rates.rs_nrates - 1;
2303 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
2304 i--);
2305 ni->ni_txrate = i;
2306
2307 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc);
2308 }
2309
2310 Static void
2311 ural_amrr_timeout(void *arg)
2312 {
2313 struct ural_softc *sc = (struct ural_softc *)arg;
2314 usb_device_request_t req;
2315 int s;
2316
2317 s = splusb();
2318
2319 /*
2320 * Asynchronously read statistic registers (cleared by read).
2321 */
2322 req.bmRequestType = UT_READ_VENDOR_DEVICE;
2323 req.bRequest = RAL_READ_MULTI_MAC;
2324 USETW(req.wValue, 0);
2325 USETW(req.wIndex, RAL_STA_CSR0);
2326 USETW(req.wLength, sizeof sc->sta);
2327
2328 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
2329 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0,
2330 ural_amrr_update);
2331 (void)usbd_transfer(sc->amrr_xfer);
2332
2333 splx(s);
2334 }
2335
2336 Static void
2337 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv,
2338 usbd_status status)
2339 {
2340 struct ural_softc *sc = (struct ural_softc *)priv;
2341 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2342
2343 if (status != USBD_NORMAL_COMPLETION) {
2344 printf("%s: could not retrieve Tx statistics - "
2345 "cancelling automatic rate control\n",
2346 USBDEVNAME(sc->sc_dev));
2347 return;
2348 }
2349
2350 /* count TX retry-fail as Tx errors */
2351 ifp->if_oerrors += sc->sta[9];
2352
2353 sc->amn.amn_retrycnt =
2354 sc->sta[7] + /* TX one-retry ok count */
2355 sc->sta[8] + /* TX more-retry ok count */
2356 sc->sta[9]; /* TX retry-fail count */
2357
2358 sc->amn.amn_txcnt =
2359 sc->amn.amn_retrycnt +
2360 sc->sta[6]; /* TX no-retry ok count */
2361
2362 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
2363
2364 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc);
2365 }
2366