if_ural.c revision 1.18.10.6
1 /* $NetBSD: if_ural.c,v 1.18.10.6 2007/06/25 09:25:49 itohy Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.18.10.6 2007/06/25 09:25:49 itohy Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 #include <dev/usb/usb_ethersubr.h> 71 72 #include <dev/usb/if_uralreg.h> 73 #include <dev/usb/if_uralvar.h> 74 75 #ifdef USB_DEBUG 76 #define URAL_DEBUG 77 #endif 78 79 #ifdef URAL_DEBUG 80 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 81 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 82 int ural_debug = 0; 83 #else 84 #define DPRINTF(x) 85 #define DPRINTFN(n, x) 86 #endif 87 88 /* various supported device vendors/products */ 89 static const struct usb_devno ural_devs[] = { 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 91 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 92 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 93 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7051 }, 94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 95 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 96 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 97 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 98 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 99 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 100 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GN54G }, 101 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 102 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 103 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 104 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 105 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 106 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 107 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 108 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 109 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 110 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 111 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 112 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 113 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 114 { USB_VENDOR_SIEMENS2, USB_PRODUCT_SIEMENS2_WL54G }, 115 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 116 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 117 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 118 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 119 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 120 }; 121 122 Static void ural_free_tx_list(struct ural_softc *); 123 Static void ural_free_rx_list(struct ural_softc *); 124 Static int ural_media_change(struct ifnet *); 125 Static void ural_next_scan(void *); 126 Static void ural_task(void *); 127 Static int ural_newstate(struct ieee80211com *, 128 enum ieee80211_state, int); 129 Static int ural_rxrate(struct ural_rx_desc *); 130 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 131 usbd_status); 132 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 133 usbd_status); 134 Static int ural_ack_rate(struct ieee80211com *, int); 135 Static uint16_t ural_txtime(int, int, uint32_t); 136 Static uint8_t ural_plcp_signal(int); 137 Static void ural_setup_tx_desc(struct ural_softc *, 138 struct ural_tx_desc *, uint32_t, int, int); 139 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 140 struct ieee80211_node *); 141 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 142 struct ieee80211_node *); 143 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 144 struct ieee80211_node *); 145 Static void ural_start(struct ifnet *); 146 Static void ural_watchdog(struct ifnet *); 147 Static int ural_reset(struct ifnet *); 148 Static int ural_ioctl(struct ifnet *, u_long, usb_ioctlarg_t); 149 Static void ural_set_testmode(struct ural_softc *); 150 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 151 int); 152 Static uint16_t ural_read(struct ural_softc *, uint16_t); 153 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 154 int); 155 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 156 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 157 int); 158 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 159 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 160 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 161 Static void ural_set_chan(struct ural_softc *, 162 struct ieee80211_channel *); 163 Static void ural_disable_rf_tune(struct ural_softc *); 164 Static void ural_enable_tsf_sync(struct ural_softc *); 165 Static void ural_update_slot(struct ifnet *); 166 Static void ural_set_txpreamble(struct ural_softc *); 167 Static void ural_set_basicrates(struct ural_softc *); 168 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 169 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 170 Static void ural_update_promisc(struct ural_softc *); 171 Static const char *ural_get_rf(int); 172 Static void ural_read_eeprom(struct ural_softc *); 173 Static int ural_bbp_init(struct ural_softc *); 174 Static void ural_set_txantenna(struct ural_softc *, int); 175 Static void ural_set_rxantenna(struct ural_softc *, int); 176 Static int ural_init(struct ifnet *); 177 Static void ural_stop(struct ifnet *, int); 178 Static void ural_amrr_start(struct ural_softc *, 179 struct ieee80211_node *); 180 Static void ural_amrr_timeout(void *); 181 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 182 usbd_status status); 183 184 /* 185 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 186 */ 187 static const struct ieee80211_rateset ural_rateset_11a = 188 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 189 190 static const struct ieee80211_rateset ural_rateset_11b = 191 { 4, { 2, 4, 11, 22 } }; 192 193 static const struct ieee80211_rateset ural_rateset_11g = 194 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 195 196 /* 197 * Default values for MAC registers; values taken from the reference driver. 198 */ 199 static const struct { 200 uint16_t reg; 201 uint16_t val; 202 } ural_def_mac[] = { 203 { RAL_TXRX_CSR5, 0x8c8d }, 204 { RAL_TXRX_CSR6, 0x8b8a }, 205 { RAL_TXRX_CSR7, 0x8687 }, 206 { RAL_TXRX_CSR8, 0x0085 }, 207 { RAL_MAC_CSR13, 0x1111 }, 208 { RAL_MAC_CSR14, 0x1e11 }, 209 { RAL_TXRX_CSR21, 0xe78f }, 210 { RAL_MAC_CSR9, 0xff1d }, 211 { RAL_MAC_CSR11, 0x0002 }, 212 { RAL_MAC_CSR22, 0x0053 }, 213 { RAL_MAC_CSR15, 0x0000 }, 214 { RAL_MAC_CSR8, 0x0780 }, 215 { RAL_TXRX_CSR19, 0x0000 }, 216 { RAL_TXRX_CSR18, 0x005a }, 217 { RAL_PHY_CSR2, 0x0000 }, 218 { RAL_TXRX_CSR0, 0x1ec0 }, 219 { RAL_PHY_CSR4, 0x000f } 220 }; 221 222 /* 223 * Default values for BBP registers; values taken from the reference driver. 224 */ 225 static const struct { 226 uint8_t reg; 227 uint8_t val; 228 } ural_def_bbp[] = { 229 { 3, 0x02 }, 230 { 4, 0x19 }, 231 { 14, 0x1c }, 232 { 15, 0x30 }, 233 { 16, 0xac }, 234 { 17, 0x48 }, 235 { 18, 0x18 }, 236 { 19, 0xff }, 237 { 20, 0x1e }, 238 { 21, 0x08 }, 239 { 22, 0x08 }, 240 { 23, 0x08 }, 241 { 24, 0x80 }, 242 { 25, 0x50 }, 243 { 26, 0x08 }, 244 { 27, 0x23 }, 245 { 30, 0x10 }, 246 { 31, 0x2b }, 247 { 32, 0xb9 }, 248 { 34, 0x12 }, 249 { 35, 0x50 }, 250 { 39, 0xc4 }, 251 { 40, 0x02 }, 252 { 41, 0x60 }, 253 { 53, 0x10 }, 254 { 54, 0x18 }, 255 { 56, 0x08 }, 256 { 57, 0x10 }, 257 { 58, 0x08 }, 258 { 61, 0x60 }, 259 { 62, 0x10 }, 260 { 75, 0xff } 261 }; 262 263 /* 264 * Default values for RF register R2 indexed by channel numbers. 265 */ 266 static const uint32_t ural_rf2522_r2[] = { 267 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 268 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 269 }; 270 271 static const uint32_t ural_rf2523_r2[] = { 272 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 273 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 274 }; 275 276 static const uint32_t ural_rf2524_r2[] = { 277 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 278 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 279 }; 280 281 static const uint32_t ural_rf2525_r2[] = { 282 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 283 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 284 }; 285 286 static const uint32_t ural_rf2525_hi_r2[] = { 287 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 288 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 289 }; 290 291 static const uint32_t ural_rf2525e_r2[] = { 292 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 293 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 294 }; 295 296 static const uint32_t ural_rf2526_hi_r2[] = { 297 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 298 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 299 }; 300 301 static const uint32_t ural_rf2526_r2[] = { 302 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 303 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 304 }; 305 306 /* 307 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 308 * values taken from the reference driver. 309 */ 310 static const struct { 311 uint8_t chan; 312 uint32_t r1; 313 uint32_t r2; 314 uint32_t r4; 315 } ural_rf5222[] = { 316 { 1, 0x08808, 0x0044d, 0x00282 }, 317 { 2, 0x08808, 0x0044e, 0x00282 }, 318 { 3, 0x08808, 0x0044f, 0x00282 }, 319 { 4, 0x08808, 0x00460, 0x00282 }, 320 { 5, 0x08808, 0x00461, 0x00282 }, 321 { 6, 0x08808, 0x00462, 0x00282 }, 322 { 7, 0x08808, 0x00463, 0x00282 }, 323 { 8, 0x08808, 0x00464, 0x00282 }, 324 { 9, 0x08808, 0x00465, 0x00282 }, 325 { 10, 0x08808, 0x00466, 0x00282 }, 326 { 11, 0x08808, 0x00467, 0x00282 }, 327 { 12, 0x08808, 0x00468, 0x00282 }, 328 { 13, 0x08808, 0x00469, 0x00282 }, 329 { 14, 0x08808, 0x0046b, 0x00286 }, 330 331 { 36, 0x08804, 0x06225, 0x00287 }, 332 { 40, 0x08804, 0x06226, 0x00287 }, 333 { 44, 0x08804, 0x06227, 0x00287 }, 334 { 48, 0x08804, 0x06228, 0x00287 }, 335 { 52, 0x08804, 0x06229, 0x00287 }, 336 { 56, 0x08804, 0x0622a, 0x00287 }, 337 { 60, 0x08804, 0x0622b, 0x00287 }, 338 { 64, 0x08804, 0x0622c, 0x00287 }, 339 340 { 100, 0x08804, 0x02200, 0x00283 }, 341 { 104, 0x08804, 0x02201, 0x00283 }, 342 { 108, 0x08804, 0x02202, 0x00283 }, 343 { 112, 0x08804, 0x02203, 0x00283 }, 344 { 116, 0x08804, 0x02204, 0x00283 }, 345 { 120, 0x08804, 0x02205, 0x00283 }, 346 { 124, 0x08804, 0x02206, 0x00283 }, 347 { 128, 0x08804, 0x02207, 0x00283 }, 348 { 132, 0x08804, 0x02208, 0x00283 }, 349 { 136, 0x08804, 0x02209, 0x00283 }, 350 { 140, 0x08804, 0x0220a, 0x00283 }, 351 352 { 149, 0x08808, 0x02429, 0x00281 }, 353 { 153, 0x08808, 0x0242b, 0x00281 }, 354 { 157, 0x08808, 0x0242d, 0x00281 }, 355 { 161, 0x08808, 0x0242f, 0x00281 } 356 }; 357 358 USB_DECLARE_DRIVER(ural); 359 360 USB_MATCH(ural) 361 { 362 USB_MATCH_START(ural, uaa); 363 364 #ifndef USB_USE_IFATTACH 365 if (uaa->iface != NULL) 366 return UMATCH_NONE; 367 #endif /* USB_USE_IFATTACH */ 368 369 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 370 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 371 } 372 373 USB_ATTACH(ural) 374 { 375 USB_ATTACH_START(ural, sc, uaa); 376 struct ieee80211com *ic = &sc->sc_ic; 377 struct ifnet *ifp = &sc->sc_if; 378 usb_interface_descriptor_t *id; 379 usb_endpoint_descriptor_t *ed; 380 usbd_status error; 381 char *devinfop; 382 int i; 383 384 sc->sc_udev = uaa->device; 385 386 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 387 USB_ATTACH_SETUP; 388 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 389 usbd_devinfo_free(devinfop); 390 391 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 392 printf("%s: could not set configuration no\n", 393 USBDEVNAME(sc->sc_dev)); 394 USB_ATTACH_ERROR_RETURN; 395 } 396 397 /* get the first interface handle */ 398 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 399 &sc->sc_iface); 400 if (error != 0) { 401 printf("%s: could not get interface handle\n", 402 USBDEVNAME(sc->sc_dev)); 403 USB_ATTACH_ERROR_RETURN; 404 } 405 406 /* 407 * Find endpoints. 408 */ 409 id = usbd_get_interface_descriptor(sc->sc_iface); 410 411 sc->sc_rx_no = sc->sc_tx_no = -1; 412 for (i = 0; i < id->bNumEndpoints; i++) { 413 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 414 if (ed == NULL) { 415 printf("%s: no endpoint descriptor for %d\n", 416 USBDEVNAME(sc->sc_dev), i); 417 USB_ATTACH_ERROR_RETURN; 418 } 419 420 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 421 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 422 sc->sc_rx_no = ed->bEndpointAddress; 423 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 424 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 425 sc->sc_tx_no = ed->bEndpointAddress; 426 } 427 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 428 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 429 USB_ATTACH_ERROR_RETURN; 430 } 431 432 usb_init_task(&sc->sc_task, ural_task, sc); 433 usb_callout_init(sc->sc_scan_ch); 434 sc->amrr.amrr_min_success_threshold = 1; 435 sc->amrr.amrr_min_success_threshold = 15; 436 usb_callout_init(sc->sc_amrr_ch); 437 438 /* retrieve RT2570 rev. no */ 439 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 440 441 /* retrieve MAC address and various other things from EEPROM */ 442 ural_read_eeprom(sc); 443 444 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 445 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 446 447 ifp->if_softc = sc; 448 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 449 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 450 ifp->if_init = ural_init; 451 ifp->if_ioctl = ural_ioctl; 452 ifp->if_start = ural_start; 453 ifp->if_watchdog = ural_watchdog; 454 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 455 IFQ_SET_READY(&ifp->if_snd); 456 457 ic->ic_ifp = ifp; 458 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 459 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 460 ic->ic_state = IEEE80211_S_INIT; 461 462 /* set device capabilities */ 463 ic->ic_caps = 464 IEEE80211_C_IBSS | /* IBSS mode supported */ 465 IEEE80211_C_MONITOR | /* monitor mode supported */ 466 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 467 IEEE80211_C_TXPMGT | /* tx power management */ 468 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 469 IEEE80211_C_SHSLOT | /* short slot time supported */ 470 IEEE80211_C_WPA; /* 802.11i */ 471 472 if (sc->rf_rev == RAL_RF_5222) { 473 /* set supported .11a rates */ 474 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 475 476 /* set supported .11a channels */ 477 for (i = 36; i <= 64; i += 4) { 478 ic->ic_channels[i].ic_freq = 479 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 480 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 481 } 482 for (i = 100; i <= 140; i += 4) { 483 ic->ic_channels[i].ic_freq = 484 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 485 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 486 } 487 for (i = 149; i <= 161; i += 4) { 488 ic->ic_channels[i].ic_freq = 489 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 490 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 491 } 492 } 493 494 /* set supported .11b and .11g rates */ 495 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 496 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 497 498 /* set supported .11b and .11g channels (1 through 14) */ 499 for (i = 1; i <= 14; i++) { 500 ic->ic_channels[i].ic_freq = 501 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 502 ic->ic_channels[i].ic_flags = 503 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 504 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 505 } 506 507 if_attach(ifp); 508 ieee80211_ifattach(ic); 509 ic->ic_reset = ural_reset; 510 511 /* override state transition machine */ 512 sc->sc_newstate = ic->ic_newstate; 513 ic->ic_newstate = ural_newstate; 514 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 515 516 #if NBPFILTER > 0 517 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 518 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 519 520 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 521 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 522 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 523 524 sc->sc_txtap_len = sizeof sc->sc_txtapu; 525 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 526 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 527 #endif 528 529 ieee80211_announce(ic); 530 531 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 532 USBDEV(sc->sc_dev)); 533 534 USB_ATTACH_SUCCESS_RETURN; 535 } 536 537 USB_DETACH(ural) 538 { 539 USB_DETACH_START(ural, sc); 540 struct ieee80211com *ic = &sc->sc_ic; 541 struct ifnet *ifp = &sc->sc_if; 542 int s; 543 544 s = splusb(); 545 546 ural_stop(ifp, 1); 547 usb_rem_task(sc->sc_udev, &sc->sc_task); 548 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc); 549 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc); 550 551 if (sc->sc_rx_pipeh != NULL) 552 usbd_abort_pipe(sc->sc_rx_pipeh); 553 554 if (sc->sc_tx_pipeh != NULL) 555 usbd_abort_pipe(sc->sc_tx_pipeh); 556 557 ural_free_rx_list(sc); 558 ural_free_tx_list(sc); 559 560 if (sc->amrr_xfer != NULL) { 561 usbd_free_xfer(sc->amrr_xfer); 562 sc->amrr_xfer = NULL; 563 } 564 565 if (sc->sc_rx_pipeh != NULL) 566 usbd_close_pipe(sc->sc_rx_pipeh); 567 568 if (sc->sc_tx_pipeh != NULL) 569 usbd_close_pipe(sc->sc_tx_pipeh); 570 571 #if NBPFILTER > 0 572 bpfdetach(ifp); 573 #endif 574 ieee80211_ifdetach(ic); 575 if_detach(ifp); 576 577 splx(s); 578 579 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 580 USBDEV(sc->sc_dev)); 581 582 return 0; 583 } 584 585 Static void 586 ural_free_tx_list(struct ural_softc *sc) 587 { 588 int i; 589 590 usb_ether_tx_list_free(sc->tx_data, RAL_TX_LIST_COUNT); 591 592 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 593 if (sc->tx_ni[i] != NULL) { 594 ieee80211_free_node(sc->tx_ni[i]); 595 sc->tx_ni[i] = NULL; 596 } 597 } 598 } 599 600 Static void 601 ural_free_rx_list(struct ural_softc *sc) 602 { 603 604 usb_ether_rx_list_free(sc->rx_data, RAL_RX_LIST_COUNT); 605 } 606 607 Static int 608 ural_media_change(struct ifnet *ifp) 609 { 610 int error; 611 612 error = ieee80211_media_change(ifp); 613 if (error != ENETRESET) 614 return error; 615 616 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 617 ural_init(ifp); 618 619 return 0; 620 } 621 622 /* 623 * This function is called periodically (every 200ms) during scanning to 624 * switch from one channel to another. 625 */ 626 Static void 627 ural_next_scan(void *arg) 628 { 629 struct ural_softc *sc = arg; 630 struct ieee80211com *ic = &sc->sc_ic; 631 632 if (ic->ic_state == IEEE80211_S_SCAN) 633 ieee80211_next_scan(ic); 634 } 635 636 Static void 637 ural_task(void *arg) 638 { 639 struct ural_softc *sc = arg; 640 struct ieee80211com *ic = &sc->sc_ic; 641 enum ieee80211_state ostate; 642 struct ieee80211_node *ni; 643 struct mbuf *m; 644 645 ostate = ic->ic_state; 646 647 switch (sc->sc_state) { 648 case IEEE80211_S_INIT: 649 if (ostate == IEEE80211_S_RUN) { 650 /* abort TSF synchronization */ 651 ural_write(sc, RAL_TXRX_CSR19, 0); 652 653 /* force tx led to stop blinking */ 654 ural_write(sc, RAL_MAC_CSR20, 0); 655 } 656 break; 657 658 case IEEE80211_S_SCAN: 659 ural_set_chan(sc, ic->ic_curchan); 660 usb_callout(sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 661 break; 662 663 case IEEE80211_S_AUTH: 664 ural_set_chan(sc, ic->ic_curchan); 665 break; 666 667 case IEEE80211_S_ASSOC: 668 ural_set_chan(sc, ic->ic_curchan); 669 break; 670 671 case IEEE80211_S_RUN: 672 ural_set_chan(sc, ic->ic_curchan); 673 674 ni = ic->ic_bss; 675 676 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 677 ural_update_slot(ic->ic_ifp); 678 ural_set_txpreamble(sc); 679 ural_set_basicrates(sc); 680 ural_set_bssid(sc, ni->ni_bssid); 681 } 682 683 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 684 ic->ic_opmode == IEEE80211_M_IBSS) { 685 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 686 if (m == NULL) { 687 printf("%s: could not allocate beacon\n", 688 USBDEVNAME(sc->sc_dev)); 689 return; 690 } 691 692 if (ural_tx_bcn(sc, m, ni) != 0) { 693 printf("%s: could not send beacon\n", 694 USBDEVNAME(sc->sc_dev)); 695 return; 696 } 697 } 698 699 /* make tx led blink on tx (controlled by ASIC) */ 700 ural_write(sc, RAL_MAC_CSR20, 1); 701 702 if (ic->ic_opmode != IEEE80211_M_MONITOR) 703 ural_enable_tsf_sync(sc); 704 705 /* enable automatic rate adaptation in STA mode */ 706 if (ic->ic_opmode == IEEE80211_M_STA && 707 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 708 ural_amrr_start(sc, ni); 709 710 break; 711 } 712 713 sc->sc_newstate(ic, sc->sc_state, -1); 714 } 715 716 Static int 717 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 718 int arg) 719 { 720 struct ural_softc *sc = ic->ic_ifp->if_softc; 721 722 usb_rem_task(sc->sc_udev, &sc->sc_task); 723 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc); 724 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc); 725 726 /* do it in a process context */ 727 sc->sc_state = nstate; 728 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 729 730 return 0; 731 } 732 733 /* quickly determine if a given rate is CCK or OFDM */ 734 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 735 736 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 737 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 738 739 #define RAL_SIFS 10 /* us */ 740 741 #define RAL_RXTX_TURNAROUND 5 /* us */ 742 743 /* 744 * This function is only used by the Rx radiotap code. 745 */ 746 Static int 747 ural_rxrate(struct ural_rx_desc *desc) 748 { 749 if (le32toh(desc->flags) & RAL_RX_OFDM) { 750 /* reverse function of ural_plcp_signal */ 751 switch (desc->rate) { 752 case 0xb: return 12; 753 case 0xf: return 18; 754 case 0xa: return 24; 755 case 0xe: return 36; 756 case 0x9: return 48; 757 case 0xd: return 72; 758 case 0x8: return 96; 759 case 0xc: return 108; 760 } 761 } else { 762 if (desc->rate == 10) 763 return 2; 764 if (desc->rate == 20) 765 return 4; 766 if (desc->rate == 55) 767 return 11; 768 if (desc->rate == 110) 769 return 22; 770 } 771 return 2; /* should not get there */ 772 } 773 774 Static void 775 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 776 usbd_status status) 777 { 778 struct ue_chain *data = priv; 779 struct ural_softc *sc = (void *)data->ue_dev; 780 struct ifnet *ifp = &sc->sc_if; 781 int s; 782 783 usbd_unmap_buffer(xfer); 784 785 if (status != USBD_NORMAL_COMPLETION) { 786 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 787 return; 788 789 printf("%s: could not transmit buffer: %s\n", 790 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 791 792 if (status == USBD_STALLED) 793 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 794 795 ifp->if_oerrors++; 796 return; 797 } 798 799 s = splnet(); 800 801 m_freem(data->ue_mbuf); 802 data->ue_mbuf = NULL; 803 ieee80211_free_node(sc->tx_ni[data->ue_idx]); 804 sc->tx_ni[data->ue_idx] = NULL; 805 806 sc->tx_queued--; 807 ifp->if_opackets++; 808 809 DPRINTFN(10, ("tx done\n")); 810 811 sc->sc_tx_timer = 0; 812 ifp->if_flags &= ~IFF_OACTIVE; 813 ural_start(ifp); 814 815 splx(s); 816 } 817 818 Static void 819 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 820 { 821 struct ue_chain *data = priv; 822 struct ural_softc *sc = (void *)data->ue_dev; 823 struct ieee80211com *ic = &sc->sc_ic; 824 struct ifnet *ifp = &sc->sc_if; 825 struct ural_rx_desc *desc; 826 struct ieee80211_frame *wh; 827 struct ieee80211_node *ni; 828 struct mbuf *m; 829 int s, len; 830 u_int32_t rxflags; 831 832 usbd_unmap_buffer(xfer); 833 834 if (status != USBD_NORMAL_COMPLETION) { 835 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 836 return; 837 838 if (status == USBD_STALLED) 839 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 840 goto skip; 841 } 842 843 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 844 845 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 846 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 847 len)); 848 ifp->if_ierrors++; 849 goto skip; 850 } 851 852 m = data->ue_mbuf; 853 854 /* rx descriptor is located at the end */ 855 desc = (void *)(mtod(m, char *) + len - RAL_RX_DESC_SIZE); 856 rxflags = UGETDW((u_int8_t *)&desc->flags); 857 858 if ((rxflags & RAL_RX_PHY_ERROR) || 859 (rxflags & RAL_RX_CRC_ERROR)) { 860 /* 861 * This should not happen since we did not request to receive 862 * those frames when we filled RAL_TXRX_CSR2. 863 */ 864 DPRINTFN(5, ("PHY or CRC error\n")); 865 ifp->if_ierrors++; 866 goto skip; 867 } 868 869 /* 870 * Allocate new mbuf cluster for the next transfer. 871 * If that failed, discard current packet and recycle the mbuf. 872 */ 873 if ((data->ue_mbuf = usb_ether_newbuf(NULL)) == NULL) { 874 printf("%s: no memory for rx list -- packet dropped!\n", 875 USBDEVNAME(sc->sc_dev)); 876 ifp->if_ierrors++; 877 data->ue_mbuf = usb_ether_newbuf(m); 878 goto skip; 879 } 880 881 /* finalize mbuf */ 882 m->m_pkthdr.rcvif = ifp; 883 m->m_pkthdr.len = m->m_len = (rxflags >> 16) & 0xfff; 884 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 885 886 s = splnet(); 887 888 #if NBPFILTER > 0 889 if (sc->sc_drvbpf != NULL) { 890 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 891 892 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 893 tap->wr_rate = ural_rxrate(desc); 894 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 895 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 896 tap->wr_antenna = sc->rx_ant; 897 tap->wr_antsignal = desc->rssi; 898 899 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 900 } 901 #endif 902 903 wh = mtod(m, struct ieee80211_frame *); 904 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 905 906 /* send the frame to the 802.11 layer */ 907 ieee80211_input(ic, m, ni, desc->rssi, 0); 908 909 /* node is no longer needed */ 910 ieee80211_free_node(ni); 911 912 splx(s); 913 914 DPRINTFN(15, ("rx done\n")); 915 916 skip: /* setup a new transfer */ 917 (void)usbd_map_buffer_mbuf(xfer, data->ue_mbuf); 918 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, NULL /* XXX buf */, MCLBYTES, 919 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 920 usbd_transfer(xfer); 921 } 922 923 /* 924 * Return the expected ack rate for a frame transmitted at rate `rate'. 925 * XXX: this should depend on the destination node basic rate set. 926 */ 927 Static int 928 ural_ack_rate(struct ieee80211com *ic, int rate) 929 { 930 switch (rate) { 931 /* CCK rates */ 932 case 2: 933 return 2; 934 case 4: 935 case 11: 936 case 22: 937 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 938 939 /* OFDM rates */ 940 case 12: 941 case 18: 942 return 12; 943 case 24: 944 case 36: 945 return 24; 946 case 48: 947 case 72: 948 case 96: 949 case 108: 950 return 48; 951 } 952 953 /* default to 1Mbps */ 954 return 2; 955 } 956 957 /* 958 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 959 * The function automatically determines the operating mode depending on the 960 * given rate. `flags' indicates whether short preamble is in use or not. 961 */ 962 Static uint16_t 963 ural_txtime(int len, int rate, uint32_t flags) 964 { 965 uint16_t txtime; 966 967 if (RAL_RATE_IS_OFDM(rate)) { 968 /* IEEE Std 802.11g-2003, pp. 37 */ 969 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 970 txtime = 16 + 4 + 4 * txtime + 6; 971 } else { 972 /* IEEE Std 802.11b-1999, pp. 28 */ 973 txtime = (16 * len + rate - 1) / rate; 974 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 975 txtime += 72 + 24; 976 else 977 txtime += 144 + 48; 978 } 979 return txtime; 980 } 981 982 Static uint8_t 983 ural_plcp_signal(int rate) 984 { 985 switch (rate) { 986 /* CCK rates (returned values are device-dependent) */ 987 case 2: return 0x0; 988 case 4: return 0x1; 989 case 11: return 0x2; 990 case 22: return 0x3; 991 992 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 993 case 12: return 0xb; 994 case 18: return 0xf; 995 case 24: return 0xa; 996 case 36: return 0xe; 997 case 48: return 0x9; 998 case 72: return 0xd; 999 case 96: return 0x8; 1000 case 108: return 0xc; 1001 1002 /* unsupported rates (should not get there) */ 1003 default: return 0xff; 1004 } 1005 } 1006 1007 Static void 1008 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1009 uint32_t flags, int len, int rate) 1010 { 1011 struct ieee80211com *ic = &sc->sc_ic; 1012 uint16_t plcp_length; 1013 int remainder; 1014 1015 desc->flags = htole32(flags); 1016 desc->flags |= htole32(RAL_TX_NEWSEQ); 1017 desc->flags |= htole32(len << 16); 1018 1019 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1020 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1021 1022 /* setup PLCP fields */ 1023 desc->plcp_signal = ural_plcp_signal(rate); 1024 desc->plcp_service = 4; 1025 1026 len += IEEE80211_CRC_LEN; 1027 if (RAL_RATE_IS_OFDM(rate)) { 1028 desc->flags |= htole32(RAL_TX_OFDM); 1029 1030 plcp_length = len & 0xfff; 1031 desc->plcp_length_hi = plcp_length >> 6; 1032 desc->plcp_length_lo = plcp_length & 0x3f; 1033 } else { 1034 plcp_length = (16 * len + rate - 1) / rate; 1035 if (rate == 22) { 1036 remainder = (16 * len) % 22; 1037 if (remainder != 0 && remainder < 7) 1038 desc->plcp_service |= RAL_PLCP_LENGEXT; 1039 } 1040 desc->plcp_length_hi = plcp_length >> 8; 1041 desc->plcp_length_lo = plcp_length & 0xff; 1042 1043 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1044 desc->plcp_signal |= 0x08; 1045 } 1046 1047 desc->iv = 0; 1048 desc->eiv = 0; 1049 } 1050 1051 #define RAL_TX_TIMEOUT 5000 1052 1053 Static int 1054 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1055 { 1056 struct ural_tx_desc *desc; 1057 usbd_xfer_handle xfer; 1058 uint8_t cmd = 0; 1059 usbd_status error; 1060 int xferlen, rate; 1061 1062 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1063 1064 xfer = usbd_alloc_xfer(sc->sc_udev, sc->sc_tx_pipeh); 1065 if (xfer == NULL) { 1066 m_freem(m0); 1067 return ENOMEM; 1068 } 1069 1070 if (usbd_map_alloc(xfer)) { 1071 usbd_free_xfer(xfer); 1072 m_freem(m0); 1073 return ENOMEM; 1074 } 1075 1076 /* Prepend Tx descriptor */ 1077 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_WAIT); 1078 if (m0 != NULL) 1079 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */ 1080 if (m0 == NULL) 1081 return ENOBUFS; 1082 desc = mtod(m0, struct ural_tx_desc *); 1083 1084 /* xfer length needs to be a multiple of two! */ 1085 xferlen = (m0->m_pkthdr.len + 1) & ~1; 1086 if (m0->m_pkthdr.len != xferlen) { 1087 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */ 1088 if (m0->m_pkthdr.len != xferlen) { 1089 m_freem(m0); 1090 return ENOBUFS; 1091 } 1092 } 1093 1094 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1095 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1096 1097 error = usbd_sync_transfer(xfer); 1098 if (error != 0) { 1099 usbd_free_xfer(xfer); 1100 m_freem(m0); 1101 return error; 1102 } 1103 1104 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1105 m0->m_pkthdr.len, rate); 1106 1107 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1108 m0->m_pkthdr.len, rate, xferlen)); 1109 1110 error = usbd_map_buffer_mbuf(xfer, m0); 1111 if (error != 0) { 1112 usbd_free_xfer(xfer); 1113 m_freem(m0); 1114 return error; 1115 } 1116 1117 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, NULL /* XXX buf */, xferlen, 1118 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1119 1120 error = usbd_sync_transfer(xfer); 1121 usbd_free_xfer(xfer); 1122 1123 m_freem(m0); 1124 return error; 1125 } 1126 1127 Static int 1128 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1129 { 1130 struct ieee80211com *ic = &sc->sc_ic; 1131 struct ural_tx_desc *desc; 1132 struct ue_chain *data; 1133 struct ieee80211_frame *wh; 1134 uint32_t flags = 0; 1135 uint16_t dur; 1136 usbd_status error; 1137 int xferlen, rate; 1138 int ret; 1139 1140 data = &sc->tx_data[0]; 1141 1142 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1143 1144 data->ue_mbuf = m0; 1145 sc->tx_ni[data->ue_idx] = ni; 1146 1147 wh = mtod(m0, struct ieee80211_frame *); 1148 1149 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1150 flags |= RAL_TX_ACK; 1151 1152 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1153 *(uint16_t *)wh->i_dur = htole16(dur); 1154 1155 /* tell hardware to add timestamp for probe responses */ 1156 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1157 IEEE80211_FC0_TYPE_MGT && 1158 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1159 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1160 flags |= RAL_TX_TIMESTAMP; 1161 } 1162 1163 #if NBPFILTER > 0 1164 if (sc->sc_drvbpf != NULL) { 1165 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1166 1167 tap->wt_flags = 0; 1168 tap->wt_rate = rate; 1169 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1170 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1171 tap->wt_antenna = sc->tx_ant; 1172 1173 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1174 } 1175 #endif 1176 1177 /* Prepend Tx descriptor */ 1178 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_DONTWAIT); 1179 if (m0 != NULL) 1180 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */ 1181 if (m0 == NULL) { 1182 return ENOBUFS; 1183 } 1184 desc = mtod(m0, struct ural_tx_desc *); 1185 1186 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1187 1188 /* align end on a 2-bytes boundary */ 1189 xferlen = (m0->m_pkthdr.len + 1) & ~1; 1190 1191 /* 1192 * No space left in the last URB to store the extra 2 bytes, force 1193 * sending of another URB. 1194 */ 1195 if ((xferlen % 64) == 0) 1196 xferlen += 2; 1197 1198 if (m0->m_pkthdr.len != xferlen) { 1199 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */ 1200 if (m0->m_pkthdr.len != xferlen) { 1201 m_freem(m0); 1202 return ENOBUFS; 1203 } 1204 } 1205 1206 ret = usb_ether_map_tx_buffer_mbuf(data, m0); 1207 if (ret) { 1208 m_freem(m0); 1209 return ret; 1210 } 1211 1212 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1213 m0->m_pkthdr.len, rate, xferlen)); 1214 1215 usbd_setup_xfer(data->ue_xfer, sc->sc_tx_pipeh, data, NULL /* XXX buf */, 1216 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1217 ural_txeof); 1218 1219 error = usbd_transfer(data->ue_xfer); 1220 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1221 data->ue_mbuf = NULL; 1222 m_freem(m0); 1223 return error; 1224 } 1225 1226 sc->tx_queued++; 1227 1228 return 0; 1229 } 1230 1231 Static int 1232 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1233 { 1234 struct ieee80211com *ic = &sc->sc_ic; 1235 struct ural_tx_desc *desc; 1236 struct ue_chain *data; 1237 struct ieee80211_frame *wh; 1238 struct ieee80211_key *k; 1239 uint32_t flags = 0; 1240 uint16_t dur; 1241 usbd_status error; 1242 int xferlen, rate; 1243 int ret; 1244 1245 wh = mtod(m0, struct ieee80211_frame *); 1246 1247 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1248 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1249 else 1250 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1251 1252 rate &= IEEE80211_RATE_VAL; 1253 1254 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1255 k = ieee80211_crypto_encap(ic, ni, m0); 1256 if (k == NULL) { 1257 m_freem(m0); 1258 return ENOBUFS; 1259 } 1260 1261 /* packet header may have moved, reset our local pointer */ 1262 wh = mtod(m0, struct ieee80211_frame *); 1263 } 1264 1265 data = &sc->tx_data[0]; 1266 1267 data->ue_mbuf = m0; 1268 sc->tx_ni[data->ue_idx] = ni; 1269 1270 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1271 flags |= RAL_TX_ACK; 1272 flags |= RAL_TX_RETRY(7); 1273 1274 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1275 ic->ic_flags) + RAL_SIFS; 1276 *(uint16_t *)wh->i_dur = htole16(dur); 1277 } 1278 1279 #if NBPFILTER > 0 1280 if (sc->sc_drvbpf != NULL) { 1281 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1282 1283 tap->wt_flags = 0; 1284 tap->wt_rate = rate; 1285 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1286 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1287 tap->wt_antenna = sc->tx_ant; 1288 1289 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1290 } 1291 #endif 1292 1293 /* Prepend Tx descriptor */ 1294 M_PREPEND(m0, RAL_TX_DESC_SIZE, M_DONTWAIT); 1295 if (m0 != NULL) 1296 m0 = m_pullup(m0, RAL_TX_DESC_SIZE); /* just in case */ 1297 if (m0 == NULL) { 1298 return ENOBUFS; 1299 } 1300 desc = mtod(m0, struct ural_tx_desc *); 1301 1302 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1303 1304 /* align end on a 2-bytes boundary */ 1305 xferlen = (m0->m_pkthdr.len + 1) & ~1; 1306 1307 /* 1308 * No space left in the last URB to store the extra 2 bytes, force 1309 * sending of another URB. 1310 */ 1311 if ((xferlen % 64) == 0) 1312 xferlen += 2; 1313 1314 if (m0->m_pkthdr.len != xferlen) { 1315 m_copyback(m0, xferlen - 1, 1, ""); /* expand mbuf chain */ 1316 if (m0->m_pkthdr.len != xferlen) { 1317 m_freem(m0); 1318 return ENOBUFS; 1319 } 1320 } 1321 1322 ret = usb_ether_map_tx_buffer_mbuf(data, m0); 1323 if (ret) { 1324 m_freem(m0); 1325 return ret; 1326 } 1327 1328 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1329 m0->m_pkthdr.len, rate, xferlen)); 1330 1331 usbd_setup_xfer(data->ue_xfer, sc->sc_tx_pipeh, data, NULL /* XXX buf */, 1332 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1333 ural_txeof); 1334 1335 error = usbd_transfer(data->ue_xfer); 1336 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1337 data->ue_mbuf = NULL; 1338 m_freem(m0); 1339 return error; 1340 } 1341 1342 sc->tx_queued++; 1343 1344 return 0; 1345 } 1346 1347 Static void 1348 ural_start(struct ifnet *ifp) 1349 { 1350 struct ural_softc *sc = ifp->if_softc; 1351 struct ieee80211com *ic = &sc->sc_ic; 1352 struct mbuf *m0; 1353 struct ether_header *eh; 1354 struct ieee80211_node *ni; 1355 1356 for (;;) { 1357 IF_POLL(&ic->ic_mgtq, m0); 1358 if (m0 != NULL) { 1359 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1360 ifp->if_flags |= IFF_OACTIVE; 1361 break; 1362 } 1363 IF_DEQUEUE(&ic->ic_mgtq, m0); 1364 1365 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1366 m0->m_pkthdr.rcvif = NULL; 1367 #if NBPFILTER > 0 1368 if (ic->ic_rawbpf != NULL) 1369 bpf_mtap(ic->ic_rawbpf, m0); 1370 #endif 1371 if (ural_tx_mgt(sc, m0, ni) != 0) 1372 break; 1373 1374 } else { 1375 if (ic->ic_state != IEEE80211_S_RUN) 1376 break; 1377 IFQ_DEQUEUE(&ifp->if_snd, m0); 1378 if (m0 == NULL) 1379 break; 1380 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1381 IF_PREPEND(&ifp->if_snd, m0); 1382 ifp->if_flags |= IFF_OACTIVE; 1383 break; 1384 } 1385 1386 if (m0->m_len < sizeof (struct ether_header) && 1387 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1388 continue; 1389 1390 eh = mtod(m0, struct ether_header *); 1391 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1392 if (ni == NULL) { 1393 m_freem(m0); 1394 continue; 1395 } 1396 #if NBPFILTER > 0 1397 if (ifp->if_bpf != NULL) 1398 bpf_mtap(ifp->if_bpf, m0); 1399 #endif 1400 m0 = ieee80211_encap(ic, m0, ni); 1401 if (m0 == NULL) { 1402 ieee80211_free_node(ni); 1403 continue; 1404 } 1405 #if NBPFILTER > 0 1406 if (ic->ic_rawbpf != NULL) 1407 bpf_mtap(ic->ic_rawbpf, m0); 1408 #endif 1409 if (ural_tx_data(sc, m0, ni) != 0) { 1410 ieee80211_free_node(ni); 1411 ifp->if_oerrors++; 1412 break; 1413 } 1414 } 1415 1416 sc->sc_tx_timer = 5; 1417 ifp->if_timer = 1; 1418 } 1419 } 1420 1421 Static void 1422 ural_watchdog(struct ifnet *ifp) 1423 { 1424 struct ural_softc *sc = ifp->if_softc; 1425 struct ieee80211com *ic = &sc->sc_ic; 1426 1427 ifp->if_timer = 0; 1428 1429 if (sc->sc_tx_timer > 0) { 1430 if (--sc->sc_tx_timer == 0) { 1431 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1432 /*ural_init(sc); XXX needs a process context! */ 1433 ifp->if_oerrors++; 1434 return; 1435 } 1436 ifp->if_timer = 1; 1437 } 1438 1439 ieee80211_watchdog(ic); 1440 } 1441 1442 /* 1443 * This function allows for fast channel switching in monitor mode (used by 1444 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1445 * generate a new beacon frame. 1446 */ 1447 Static int 1448 ural_reset(struct ifnet *ifp) 1449 { 1450 struct ural_softc *sc = ifp->if_softc; 1451 struct ieee80211com *ic = &sc->sc_ic; 1452 1453 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1454 return ENETRESET; 1455 1456 ural_set_chan(sc, ic->ic_curchan); 1457 1458 return 0; 1459 } 1460 1461 Static int 1462 ural_ioctl(struct ifnet *ifp, u_long cmd, usb_ioctlarg_t data) 1463 { 1464 struct ural_softc *sc = ifp->if_softc; 1465 struct ieee80211com *ic = &sc->sc_ic; 1466 int s, error = 0; 1467 1468 s = splnet(); 1469 1470 switch (cmd) { 1471 case SIOCSIFFLAGS: 1472 if (ifp->if_flags & IFF_UP) { 1473 if (ifp->if_flags & IFF_RUNNING) 1474 ural_update_promisc(sc); 1475 else 1476 ural_init(ifp); 1477 } else { 1478 if (ifp->if_flags & IFF_RUNNING) 1479 ural_stop(ifp, 1); 1480 } 1481 break; 1482 1483 default: 1484 error = ieee80211_ioctl(ic, cmd, data); 1485 } 1486 1487 if (error == ENETRESET) { 1488 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1489 (IFF_UP | IFF_RUNNING)) 1490 ural_init(ifp); 1491 error = 0; 1492 } 1493 1494 splx(s); 1495 1496 return error; 1497 } 1498 1499 Static void 1500 ural_set_testmode(struct ural_softc *sc) 1501 { 1502 usb_device_request_t req; 1503 usbd_status error; 1504 1505 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1506 req.bRequest = RAL_VENDOR_REQUEST; 1507 USETW(req.wValue, 4); 1508 USETW(req.wIndex, 1); 1509 USETW(req.wLength, 0); 1510 1511 error = usbd_do_request(sc->sc_udev, &req, NULL); 1512 if (error != 0) { 1513 printf("%s: could not set test mode: %s\n", 1514 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1515 } 1516 } 1517 1518 Static void 1519 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1520 { 1521 usb_device_request_t req; 1522 usbd_status error; 1523 1524 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1525 req.bRequest = RAL_READ_EEPROM; 1526 USETW(req.wValue, 0); 1527 USETW(req.wIndex, addr); 1528 USETW(req.wLength, len); 1529 1530 error = usbd_do_request(sc->sc_udev, &req, buf); 1531 if (error != 0) { 1532 printf("%s: could not read EEPROM: %s\n", 1533 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1534 } 1535 } 1536 1537 Static uint16_t 1538 ural_read(struct ural_softc *sc, uint16_t reg) 1539 { 1540 usb_device_request_t req; 1541 usbd_status error; 1542 uint16_t val; 1543 1544 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1545 req.bRequest = RAL_READ_MAC; 1546 USETW(req.wValue, 0); 1547 USETW(req.wIndex, reg); 1548 USETW(req.wLength, sizeof (uint16_t)); 1549 1550 error = usbd_do_request(sc->sc_udev, &req, &val); 1551 if (error != 0) { 1552 printf("%s: could not read MAC register: %s\n", 1553 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1554 return 0; 1555 } 1556 1557 return le16toh(val); 1558 } 1559 1560 Static void 1561 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1562 { 1563 usb_device_request_t req; 1564 usbd_status error; 1565 1566 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1567 req.bRequest = RAL_READ_MULTI_MAC; 1568 USETW(req.wValue, 0); 1569 USETW(req.wIndex, reg); 1570 USETW(req.wLength, len); 1571 1572 error = usbd_do_request(sc->sc_udev, &req, buf); 1573 if (error != 0) { 1574 printf("%s: could not read MAC register: %s\n", 1575 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1576 } 1577 } 1578 1579 Static void 1580 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1581 { 1582 usb_device_request_t req; 1583 usbd_status error; 1584 1585 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1586 req.bRequest = RAL_WRITE_MAC; 1587 USETW(req.wValue, val); 1588 USETW(req.wIndex, reg); 1589 USETW(req.wLength, 0); 1590 1591 error = usbd_do_request(sc->sc_udev, &req, NULL); 1592 if (error != 0) { 1593 printf("%s: could not write MAC register: %s\n", 1594 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1595 } 1596 } 1597 1598 Static void 1599 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1600 { 1601 usb_device_request_t req; 1602 usbd_status error; 1603 1604 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1605 req.bRequest = RAL_WRITE_MULTI_MAC; 1606 USETW(req.wValue, 0); 1607 USETW(req.wIndex, reg); 1608 USETW(req.wLength, len); 1609 1610 error = usbd_do_request(sc->sc_udev, &req, buf); 1611 if (error != 0) { 1612 printf("%s: could not write MAC register: %s\n", 1613 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1614 } 1615 } 1616 1617 Static void 1618 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1619 { 1620 uint16_t tmp; 1621 int ntries; 1622 1623 for (ntries = 0; ntries < 5; ntries++) { 1624 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1625 break; 1626 } 1627 if (ntries == 5) { 1628 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1629 return; 1630 } 1631 1632 tmp = reg << 8 | val; 1633 ural_write(sc, RAL_PHY_CSR7, tmp); 1634 } 1635 1636 Static uint8_t 1637 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1638 { 1639 uint16_t val; 1640 int ntries; 1641 1642 val = RAL_BBP_WRITE | reg << 8; 1643 ural_write(sc, RAL_PHY_CSR7, val); 1644 1645 for (ntries = 0; ntries < 5; ntries++) { 1646 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1647 break; 1648 } 1649 if (ntries == 5) { 1650 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1651 return 0; 1652 } 1653 1654 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1655 } 1656 1657 Static void 1658 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1659 { 1660 uint32_t tmp; 1661 int ntries; 1662 1663 for (ntries = 0; ntries < 5; ntries++) { 1664 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1665 break; 1666 } 1667 if (ntries == 5) { 1668 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1669 return; 1670 } 1671 1672 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1673 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1674 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1675 1676 /* remember last written value in sc */ 1677 sc->rf_regs[reg] = val; 1678 1679 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1680 } 1681 1682 Static void 1683 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1684 { 1685 struct ieee80211com *ic = &sc->sc_ic; 1686 uint8_t power, tmp; 1687 u_int i, chan; 1688 1689 chan = ieee80211_chan2ieee(ic, c); 1690 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1691 return; 1692 1693 if (IEEE80211_IS_CHAN_2GHZ(c)) 1694 power = min(sc->txpow[chan - 1], 31); 1695 else 1696 power = 31; 1697 1698 /* adjust txpower using ifconfig settings */ 1699 power -= (100 - ic->ic_txpowlimit) / 8; 1700 1701 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1702 1703 switch (sc->rf_rev) { 1704 case RAL_RF_2522: 1705 ural_rf_write(sc, RAL_RF1, 0x00814); 1706 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1707 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1708 break; 1709 1710 case RAL_RF_2523: 1711 ural_rf_write(sc, RAL_RF1, 0x08804); 1712 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1713 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1714 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1715 break; 1716 1717 case RAL_RF_2524: 1718 ural_rf_write(sc, RAL_RF1, 0x0c808); 1719 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1720 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1721 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1722 break; 1723 1724 case RAL_RF_2525: 1725 ural_rf_write(sc, RAL_RF1, 0x08808); 1726 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1727 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1728 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1729 1730 ural_rf_write(sc, RAL_RF1, 0x08808); 1731 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1732 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1733 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1734 break; 1735 1736 case RAL_RF_2525E: 1737 ural_rf_write(sc, RAL_RF1, 0x08808); 1738 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1739 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1740 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1741 break; 1742 1743 case RAL_RF_2526: 1744 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1745 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1746 ural_rf_write(sc, RAL_RF1, 0x08804); 1747 1748 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1749 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1750 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1751 break; 1752 1753 /* dual-band RF */ 1754 case RAL_RF_5222: 1755 for (i = 0; ural_rf5222[i].chan != chan; i++); 1756 1757 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1758 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1759 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1760 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1761 break; 1762 } 1763 1764 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1765 ic->ic_state != IEEE80211_S_SCAN) { 1766 /* set Japan filter bit for channel 14 */ 1767 tmp = ural_bbp_read(sc, 70); 1768 1769 tmp &= ~RAL_JAPAN_FILTER; 1770 if (chan == 14) 1771 tmp |= RAL_JAPAN_FILTER; 1772 1773 ural_bbp_write(sc, 70, tmp); 1774 1775 /* clear CRC errors */ 1776 ural_read(sc, RAL_STA_CSR0); 1777 1778 DELAY(10000); 1779 ural_disable_rf_tune(sc); 1780 } 1781 } 1782 1783 /* 1784 * Disable RF auto-tuning. 1785 */ 1786 Static void 1787 ural_disable_rf_tune(struct ural_softc *sc) 1788 { 1789 uint32_t tmp; 1790 1791 if (sc->rf_rev != RAL_RF_2523) { 1792 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1793 ural_rf_write(sc, RAL_RF1, tmp); 1794 } 1795 1796 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1797 ural_rf_write(sc, RAL_RF3, tmp); 1798 1799 DPRINTFN(2, ("disabling RF autotune\n")); 1800 } 1801 1802 /* 1803 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1804 * synchronization. 1805 */ 1806 Static void 1807 ural_enable_tsf_sync(struct ural_softc *sc) 1808 { 1809 struct ieee80211com *ic = &sc->sc_ic; 1810 uint16_t logcwmin, preload, tmp; 1811 1812 /* first, disable TSF synchronization */ 1813 ural_write(sc, RAL_TXRX_CSR19, 0); 1814 1815 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1816 ural_write(sc, RAL_TXRX_CSR18, tmp); 1817 1818 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1819 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1820 tmp = logcwmin << 12 | preload; 1821 ural_write(sc, RAL_TXRX_CSR20, tmp); 1822 1823 /* finally, enable TSF synchronization */ 1824 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1825 if (ic->ic_opmode == IEEE80211_M_STA) 1826 tmp |= RAL_ENABLE_TSF_SYNC(1); 1827 else 1828 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1829 ural_write(sc, RAL_TXRX_CSR19, tmp); 1830 1831 DPRINTF(("enabling TSF synchronization\n")); 1832 } 1833 1834 Static void 1835 ural_update_slot(struct ifnet *ifp) 1836 { 1837 struct ural_softc *sc = ifp->if_softc; 1838 struct ieee80211com *ic = &sc->sc_ic; 1839 uint16_t slottime, sifs, eifs; 1840 1841 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1842 1843 /* 1844 * These settings may sound a bit inconsistent but this is what the 1845 * reference driver does. 1846 */ 1847 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1848 sifs = 16 - RAL_RXTX_TURNAROUND; 1849 eifs = 364; 1850 } else { 1851 sifs = 10 - RAL_RXTX_TURNAROUND; 1852 eifs = 64; 1853 } 1854 1855 ural_write(sc, RAL_MAC_CSR10, slottime); 1856 ural_write(sc, RAL_MAC_CSR11, sifs); 1857 ural_write(sc, RAL_MAC_CSR12, eifs); 1858 } 1859 1860 Static void 1861 ural_set_txpreamble(struct ural_softc *sc) 1862 { 1863 uint16_t tmp; 1864 1865 tmp = ural_read(sc, RAL_TXRX_CSR10); 1866 1867 tmp &= ~RAL_SHORT_PREAMBLE; 1868 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1869 tmp |= RAL_SHORT_PREAMBLE; 1870 1871 ural_write(sc, RAL_TXRX_CSR10, tmp); 1872 } 1873 1874 Static void 1875 ural_set_basicrates(struct ural_softc *sc) 1876 { 1877 struct ieee80211com *ic = &sc->sc_ic; 1878 1879 /* update basic rate set */ 1880 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1881 /* 11b basic rates: 1, 2Mbps */ 1882 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1883 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1884 /* 11a basic rates: 6, 12, 24Mbps */ 1885 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1886 } else { 1887 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1888 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1889 } 1890 } 1891 1892 Static void 1893 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1894 { 1895 uint16_t tmp; 1896 1897 tmp = bssid[0] | bssid[1] << 8; 1898 ural_write(sc, RAL_MAC_CSR5, tmp); 1899 1900 tmp = bssid[2] | bssid[3] << 8; 1901 ural_write(sc, RAL_MAC_CSR6, tmp); 1902 1903 tmp = bssid[4] | bssid[5] << 8; 1904 ural_write(sc, RAL_MAC_CSR7, tmp); 1905 1906 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1907 } 1908 1909 Static void 1910 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1911 { 1912 uint16_t tmp; 1913 1914 tmp = addr[0] | addr[1] << 8; 1915 ural_write(sc, RAL_MAC_CSR2, tmp); 1916 1917 tmp = addr[2] | addr[3] << 8; 1918 ural_write(sc, RAL_MAC_CSR3, tmp); 1919 1920 tmp = addr[4] | addr[5] << 8; 1921 ural_write(sc, RAL_MAC_CSR4, tmp); 1922 1923 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1924 } 1925 1926 Static void 1927 ural_update_promisc(struct ural_softc *sc) 1928 { 1929 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1930 uint32_t tmp; 1931 1932 tmp = ural_read(sc, RAL_TXRX_CSR2); 1933 1934 tmp &= ~RAL_DROP_NOT_TO_ME; 1935 if (!(ifp->if_flags & IFF_PROMISC)) 1936 tmp |= RAL_DROP_NOT_TO_ME; 1937 1938 ural_write(sc, RAL_TXRX_CSR2, tmp); 1939 1940 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1941 "entering" : "leaving")); 1942 } 1943 1944 Static const char * 1945 ural_get_rf(int rev) 1946 { 1947 switch (rev) { 1948 case RAL_RF_2522: return "RT2522"; 1949 case RAL_RF_2523: return "RT2523"; 1950 case RAL_RF_2524: return "RT2524"; 1951 case RAL_RF_2525: return "RT2525"; 1952 case RAL_RF_2525E: return "RT2525e"; 1953 case RAL_RF_2526: return "RT2526"; 1954 case RAL_RF_5222: return "RT5222"; 1955 default: return "unknown"; 1956 } 1957 } 1958 1959 Static void 1960 ural_read_eeprom(struct ural_softc *sc) 1961 { 1962 struct ieee80211com *ic = &sc->sc_ic; 1963 uint16_t val; 1964 1965 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1966 val = le16toh(val); 1967 sc->rf_rev = (val >> 11) & 0x7; 1968 sc->hw_radio = (val >> 10) & 0x1; 1969 sc->led_mode = (val >> 6) & 0x7; 1970 sc->rx_ant = (val >> 4) & 0x3; 1971 sc->tx_ant = (val >> 2) & 0x3; 1972 sc->nb_ant = val & 0x3; 1973 1974 /* read MAC address */ 1975 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1976 1977 /* read default values for BBP registers */ 1978 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1979 1980 /* read Tx power for all b/g channels */ 1981 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1982 } 1983 1984 Static int 1985 ural_bbp_init(struct ural_softc *sc) 1986 { 1987 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1988 int i, ntries; 1989 1990 /* wait for BBP to be ready */ 1991 for (ntries = 0; ntries < 100; ntries++) { 1992 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1993 break; 1994 DELAY(1000); 1995 } 1996 if (ntries == 100) { 1997 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 1998 return EIO; 1999 } 2000 2001 /* initialize BBP registers to default values */ 2002 for (i = 0; i < N(ural_def_bbp); i++) 2003 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2004 2005 #if 0 2006 /* initialize BBP registers to values stored in EEPROM */ 2007 for (i = 0; i < 16; i++) { 2008 if (sc->bbp_prom[i].reg == 0xff) 2009 continue; 2010 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2011 } 2012 #endif 2013 2014 return 0; 2015 #undef N 2016 } 2017 2018 Static void 2019 ural_set_txantenna(struct ural_softc *sc, int antenna) 2020 { 2021 uint16_t tmp; 2022 uint8_t tx; 2023 2024 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2025 if (antenna == 1) 2026 tx |= RAL_BBP_ANTA; 2027 else if (antenna == 2) 2028 tx |= RAL_BBP_ANTB; 2029 else 2030 tx |= RAL_BBP_DIVERSITY; 2031 2032 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2033 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2034 sc->rf_rev == RAL_RF_5222) 2035 tx |= RAL_BBP_FLIPIQ; 2036 2037 ural_bbp_write(sc, RAL_BBP_TX, tx); 2038 2039 /* update values in PHY_CSR5 and PHY_CSR6 */ 2040 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2041 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2042 2043 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2044 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2045 } 2046 2047 Static void 2048 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2049 { 2050 uint8_t rx; 2051 2052 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2053 if (antenna == 1) 2054 rx |= RAL_BBP_ANTA; 2055 else if (antenna == 2) 2056 rx |= RAL_BBP_ANTB; 2057 else 2058 rx |= RAL_BBP_DIVERSITY; 2059 2060 /* need to force no I/Q flip for RF 2525e and 2526 */ 2061 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2062 rx &= ~RAL_BBP_FLIPIQ; 2063 2064 ural_bbp_write(sc, RAL_BBP_RX, rx); 2065 } 2066 2067 Static int 2068 ural_init(struct ifnet *ifp) 2069 { 2070 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2071 struct ural_softc *sc = ifp->if_softc; 2072 struct ieee80211com *ic = &sc->sc_ic; 2073 struct ieee80211_key *wk; 2074 struct ue_chain *data; 2075 uint16_t tmp; 2076 usbd_status uerror; 2077 int error; 2078 int i, ntries; 2079 2080 ural_set_testmode(sc); 2081 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2082 2083 ural_stop(ifp, 0); 2084 2085 /* initialize MAC registers to default values */ 2086 for (i = 0; i < N(ural_def_mac); i++) 2087 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2088 2089 /* wait for BBP and RF to wake up (this can take a long time!) */ 2090 for (ntries = 0; ntries < 100; ntries++) { 2091 tmp = ural_read(sc, RAL_MAC_CSR17); 2092 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2093 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2094 break; 2095 DELAY(1000); 2096 } 2097 if (ntries == 100) { 2098 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2099 USBDEVNAME(sc->sc_dev)); 2100 error = EIO; 2101 goto fail; 2102 } 2103 2104 /* we're ready! */ 2105 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2106 2107 /* set basic rate set (will be updated later) */ 2108 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2109 2110 error = ural_bbp_init(sc); 2111 if (error != 0) 2112 goto fail; 2113 2114 /* set default BSS channel */ 2115 ural_set_chan(sc, ic->ic_curchan); 2116 2117 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2118 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2119 2120 ural_set_txantenna(sc, sc->tx_ant); 2121 ural_set_rxantenna(sc, sc->rx_ant); 2122 2123 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2124 ural_set_macaddr(sc, ic->ic_myaddr); 2125 2126 /* 2127 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2128 */ 2129 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2130 wk = &ic->ic_crypto.cs_nw_keys[i]; 2131 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2132 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2133 } 2134 2135 /* 2136 * Allocate xfer for AMRR statistics requests. 2137 */ 2138 sc->amrr_xfer = usbd_alloc_default_xfer(sc->sc_udev); 2139 if (sc->amrr_xfer == NULL) { 2140 printf("%s: could not allocate AMRR xfer\n", 2141 USBDEVNAME(sc->sc_dev)); 2142 goto fail; 2143 } 2144 2145 /* 2146 * Open Tx and Rx USB bulk pipes. 2147 */ 2148 uerror = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2149 &sc->sc_tx_pipeh); 2150 if (uerror != USBD_NORMAL_COMPLETION) { 2151 printf("%s: could not open Tx pipe: %s\n", 2152 USBDEVNAME(sc->sc_dev), usbd_errstr(uerror)); 2153 error = EIO; 2154 goto fail; 2155 } 2156 2157 uerror = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2158 &sc->sc_rx_pipeh); 2159 if (uerror != USBD_NORMAL_COMPLETION) { 2160 printf("%s: could not open Rx pipe: %s\n", 2161 USBDEVNAME(sc->sc_dev), usbd_errstr(uerror)); 2162 error = EIO; 2163 goto fail; 2164 } 2165 2166 /* 2167 * Allocate Tx and Rx xfer queues. 2168 */ 2169 sc->tx_queued = 0; 2170 error = usb_ether_tx_list_init(USBDEV(sc->sc_dev), 2171 sc->tx_data, RAL_TX_LIST_COUNT, 2172 sc->sc_udev, sc->sc_tx_pipeh, NULL); 2173 if (error != 0) { 2174 printf("%s: could not allocate Tx list\n", 2175 USBDEVNAME(sc->sc_dev)); 2176 goto fail; 2177 } 2178 2179 error = usb_ether_rx_list_init(USBDEV(sc->sc_dev), 2180 sc->rx_data, RAL_RX_LIST_COUNT, 2181 sc->sc_udev, sc->sc_rx_pipeh); 2182 if (error != 0) { 2183 printf("%s: could not allocate Rx list\n", 2184 USBDEVNAME(sc->sc_dev)); 2185 goto fail; 2186 } 2187 2188 /* 2189 * Start up the receive pipe. 2190 */ 2191 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2192 data = &sc->rx_data[i]; 2193 2194 (void)usbd_map_buffer_mbuf(data->ue_xfer, data->ue_mbuf); 2195 usbd_setup_xfer(data->ue_xfer, sc->sc_rx_pipeh, data, NULL /* XXX buf */, 2196 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2197 usbd_transfer(data->ue_xfer); 2198 } 2199 2200 /* kick Rx */ 2201 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2202 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2203 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2204 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2205 tmp |= RAL_DROP_TODS; 2206 if (!(ifp->if_flags & IFF_PROMISC)) 2207 tmp |= RAL_DROP_NOT_TO_ME; 2208 } 2209 ural_write(sc, RAL_TXRX_CSR2, tmp); 2210 2211 ifp->if_flags &= ~IFF_OACTIVE; 2212 ifp->if_flags |= IFF_RUNNING; 2213 2214 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2215 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2216 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2217 } else 2218 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2219 2220 return 0; 2221 2222 fail: ural_stop(ifp, 1); 2223 return error; 2224 #undef N 2225 } 2226 2227 Static void 2228 ural_stop(struct ifnet *ifp, int disable) 2229 { 2230 struct ural_softc *sc = ifp->if_softc; 2231 struct ieee80211com *ic = &sc->sc_ic; 2232 2233 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2234 2235 sc->sc_tx_timer = 0; 2236 ifp->if_timer = 0; 2237 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2238 2239 /* disable Rx */ 2240 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2241 2242 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2243 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2244 ural_write(sc, RAL_MAC_CSR1, 0); 2245 2246 /* Stop transfers. */ 2247 if (sc->sc_rx_pipeh != NULL) 2248 usbd_abort_pipe(sc->sc_rx_pipeh); 2249 2250 if (sc->sc_tx_pipeh != NULL) 2251 usbd_abort_pipe(sc->sc_tx_pipeh); 2252 2253 /* Free RX/TX resources. */ 2254 ural_free_rx_list(sc); 2255 ural_free_tx_list(sc); 2256 2257 /* Close pipes. */ 2258 if (sc->amrr_xfer != NULL) { 2259 usbd_free_xfer(sc->amrr_xfer); 2260 sc->amrr_xfer = NULL; 2261 } 2262 2263 if (sc->sc_rx_pipeh != NULL) { 2264 usbd_close_pipe(sc->sc_rx_pipeh); 2265 sc->sc_rx_pipeh = NULL; 2266 } 2267 2268 if (sc->sc_tx_pipeh != NULL) { 2269 usbd_close_pipe(sc->sc_tx_pipeh); 2270 sc->sc_tx_pipeh = NULL; 2271 } 2272 } 2273 2274 int 2275 ural_activate(device_ptr_t self, enum devact act) 2276 { 2277 struct ural_softc *sc = (struct ural_softc *)self; 2278 2279 switch (act) { 2280 case DVACT_ACTIVATE: 2281 return EOPNOTSUPP; 2282 break; 2283 2284 case DVACT_DEACTIVATE: 2285 if_deactivate(&sc->sc_if); 2286 break; 2287 } 2288 2289 return 0; 2290 } 2291 2292 Static void 2293 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2294 { 2295 int i; 2296 2297 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2298 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2299 2300 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2301 2302 /* set rate to some reasonable initial value */ 2303 for (i = ni->ni_rates.rs_nrates - 1; 2304 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2305 i--); 2306 ni->ni_txrate = i; 2307 2308 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2309 } 2310 2311 Static void 2312 ural_amrr_timeout(void *arg) 2313 { 2314 struct ural_softc *sc = (struct ural_softc *)arg; 2315 usb_device_request_t req; 2316 int s; 2317 2318 s = splusb(); 2319 2320 /* 2321 * Asynchronously read statistic registers (cleared by read). 2322 */ 2323 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2324 req.bRequest = RAL_READ_MULTI_MAC; 2325 USETW(req.wValue, 0); 2326 USETW(req.wIndex, RAL_STA_CSR0); 2327 USETW(req.wLength, sizeof sc->sta); 2328 2329 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2330 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2331 ural_amrr_update); 2332 (void)usbd_transfer(sc->amrr_xfer); 2333 2334 splx(s); 2335 } 2336 2337 Static void 2338 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2339 usbd_status status) 2340 { 2341 struct ural_softc *sc = (struct ural_softc *)priv; 2342 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2343 2344 if (status != USBD_NORMAL_COMPLETION) { 2345 printf("%s: could not retrieve Tx statistics - " 2346 "cancelling automatic rate control\n", 2347 USBDEVNAME(sc->sc_dev)); 2348 return; 2349 } 2350 2351 /* count TX retry-fail as Tx errors */ 2352 ifp->if_oerrors += sc->sta[9]; 2353 2354 sc->amn.amn_retrycnt = 2355 sc->sta[7] + /* TX one-retry ok count */ 2356 sc->sta[8] + /* TX more-retry ok count */ 2357 sc->sta[9]; /* TX retry-fail count */ 2358 2359 sc->amn.amn_txcnt = 2360 sc->amn.amn_retrycnt + 2361 sc->sta[6]; /* TX no-retry ok count */ 2362 2363 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2364 2365 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2366 } 2367
Indexes created Fri Oct 03 02:09:57 GMT 2025