if_ural.c revision 1.18.2.1
1 /* $NetBSD: if_ural.c,v 1.18.2.1 2007/09/29 08:53:17 xtraeme Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.18.2.1 2007/09/29 08:53:17 xtraeme Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 71 #include <dev/usb/if_uralreg.h> 72 #include <dev/usb/if_uralvar.h> 73 74 #ifdef USB_DEBUG 75 #define URAL_DEBUG 76 #endif 77 78 #ifdef URAL_DEBUG 79 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 81 int ural_debug = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n, x) 85 #endif 86 87 /* various supported device vendors/products */ 88 static const struct usb_devno ural_devs[] = { 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 95 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 96 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 97 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 98 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 101 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 102 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 104 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 105 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 106 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 107 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 108 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 109 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 110 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 111 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 112 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 113 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 114 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 115 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 116 }; 117 118 Static int ural_alloc_tx_list(struct ural_softc *); 119 Static void ural_free_tx_list(struct ural_softc *); 120 Static int ural_alloc_rx_list(struct ural_softc *); 121 Static void ural_free_rx_list(struct ural_softc *); 122 Static int ural_media_change(struct ifnet *); 123 Static void ural_next_scan(void *); 124 Static void ural_task(void *); 125 Static int ural_newstate(struct ieee80211com *, 126 enum ieee80211_state, int); 127 Static int ural_rxrate(struct ural_rx_desc *); 128 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 129 usbd_status); 130 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 131 usbd_status); 132 Static int ural_ack_rate(struct ieee80211com *, int); 133 Static uint16_t ural_txtime(int, int, uint32_t); 134 Static uint8_t ural_plcp_signal(int); 135 Static void ural_setup_tx_desc(struct ural_softc *, 136 struct ural_tx_desc *, uint32_t, int, int); 137 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 138 struct ieee80211_node *); 139 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 140 struct ieee80211_node *); 141 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 142 struct ieee80211_node *); 143 Static void ural_start(struct ifnet *); 144 Static void ural_watchdog(struct ifnet *); 145 Static int ural_reset(struct ifnet *); 146 Static int ural_ioctl(struct ifnet *, u_long, caddr_t); 147 Static void ural_set_testmode(struct ural_softc *); 148 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 149 int); 150 Static uint16_t ural_read(struct ural_softc *, uint16_t); 151 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 152 int); 153 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 154 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 155 int); 156 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 157 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 158 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 159 Static void ural_set_chan(struct ural_softc *, 160 struct ieee80211_channel *); 161 Static void ural_disable_rf_tune(struct ural_softc *); 162 Static void ural_enable_tsf_sync(struct ural_softc *); 163 Static void ural_update_slot(struct ifnet *); 164 Static void ural_set_txpreamble(struct ural_softc *); 165 Static void ural_set_basicrates(struct ural_softc *); 166 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 167 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 168 Static void ural_update_promisc(struct ural_softc *); 169 Static const char *ural_get_rf(int); 170 Static void ural_read_eeprom(struct ural_softc *); 171 Static int ural_bbp_init(struct ural_softc *); 172 Static void ural_set_txantenna(struct ural_softc *, int); 173 Static void ural_set_rxantenna(struct ural_softc *, int); 174 Static int ural_init(struct ifnet *); 175 Static void ural_stop(struct ifnet *, int); 176 Static void ural_amrr_start(struct ural_softc *, 177 struct ieee80211_node *); 178 Static void ural_amrr_timeout(void *); 179 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 180 usbd_status status); 181 182 /* 183 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 184 */ 185 static const struct ieee80211_rateset ural_rateset_11a = 186 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 187 188 static const struct ieee80211_rateset ural_rateset_11b = 189 { 4, { 2, 4, 11, 22 } }; 190 191 static const struct ieee80211_rateset ural_rateset_11g = 192 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 193 194 /* 195 * Default values for MAC registers; values taken from the reference driver. 196 */ 197 static const struct { 198 uint16_t reg; 199 uint16_t val; 200 } ural_def_mac[] = { 201 { RAL_TXRX_CSR5, 0x8c8d }, 202 { RAL_TXRX_CSR6, 0x8b8a }, 203 { RAL_TXRX_CSR7, 0x8687 }, 204 { RAL_TXRX_CSR8, 0x0085 }, 205 { RAL_MAC_CSR13, 0x1111 }, 206 { RAL_MAC_CSR14, 0x1e11 }, 207 { RAL_TXRX_CSR21, 0xe78f }, 208 { RAL_MAC_CSR9, 0xff1d }, 209 { RAL_MAC_CSR11, 0x0002 }, 210 { RAL_MAC_CSR22, 0x0053 }, 211 { RAL_MAC_CSR15, 0x0000 }, 212 { RAL_MAC_CSR8, 0x0780 }, 213 { RAL_TXRX_CSR19, 0x0000 }, 214 { RAL_TXRX_CSR18, 0x005a }, 215 { RAL_PHY_CSR2, 0x0000 }, 216 { RAL_TXRX_CSR0, 0x1ec0 }, 217 { RAL_PHY_CSR4, 0x000f } 218 }; 219 220 /* 221 * Default values for BBP registers; values taken from the reference driver. 222 */ 223 static const struct { 224 uint8_t reg; 225 uint8_t val; 226 } ural_def_bbp[] = { 227 { 3, 0x02 }, 228 { 4, 0x19 }, 229 { 14, 0x1c }, 230 { 15, 0x30 }, 231 { 16, 0xac }, 232 { 17, 0x48 }, 233 { 18, 0x18 }, 234 { 19, 0xff }, 235 { 20, 0x1e }, 236 { 21, 0x08 }, 237 { 22, 0x08 }, 238 { 23, 0x08 }, 239 { 24, 0x80 }, 240 { 25, 0x50 }, 241 { 26, 0x08 }, 242 { 27, 0x23 }, 243 { 30, 0x10 }, 244 { 31, 0x2b }, 245 { 32, 0xb9 }, 246 { 34, 0x12 }, 247 { 35, 0x50 }, 248 { 39, 0xc4 }, 249 { 40, 0x02 }, 250 { 41, 0x60 }, 251 { 53, 0x10 }, 252 { 54, 0x18 }, 253 { 56, 0x08 }, 254 { 57, 0x10 }, 255 { 58, 0x08 }, 256 { 61, 0x60 }, 257 { 62, 0x10 }, 258 { 75, 0xff } 259 }; 260 261 /* 262 * Default values for RF register R2 indexed by channel numbers. 263 */ 264 static const uint32_t ural_rf2522_r2[] = { 265 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 266 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 267 }; 268 269 static const uint32_t ural_rf2523_r2[] = { 270 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 271 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 272 }; 273 274 static const uint32_t ural_rf2524_r2[] = { 275 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 276 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 277 }; 278 279 static const uint32_t ural_rf2525_r2[] = { 280 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 281 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 282 }; 283 284 static const uint32_t ural_rf2525_hi_r2[] = { 285 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 286 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 287 }; 288 289 static const uint32_t ural_rf2525e_r2[] = { 290 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 291 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 292 }; 293 294 static const uint32_t ural_rf2526_hi_r2[] = { 295 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 296 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 297 }; 298 299 static const uint32_t ural_rf2526_r2[] = { 300 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 301 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 302 }; 303 304 /* 305 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 306 * values taken from the reference driver. 307 */ 308 static const struct { 309 uint8_t chan; 310 uint32_t r1; 311 uint32_t r2; 312 uint32_t r4; 313 } ural_rf5222[] = { 314 { 1, 0x08808, 0x0044d, 0x00282 }, 315 { 2, 0x08808, 0x0044e, 0x00282 }, 316 { 3, 0x08808, 0x0044f, 0x00282 }, 317 { 4, 0x08808, 0x00460, 0x00282 }, 318 { 5, 0x08808, 0x00461, 0x00282 }, 319 { 6, 0x08808, 0x00462, 0x00282 }, 320 { 7, 0x08808, 0x00463, 0x00282 }, 321 { 8, 0x08808, 0x00464, 0x00282 }, 322 { 9, 0x08808, 0x00465, 0x00282 }, 323 { 10, 0x08808, 0x00466, 0x00282 }, 324 { 11, 0x08808, 0x00467, 0x00282 }, 325 { 12, 0x08808, 0x00468, 0x00282 }, 326 { 13, 0x08808, 0x00469, 0x00282 }, 327 { 14, 0x08808, 0x0046b, 0x00286 }, 328 329 { 36, 0x08804, 0x06225, 0x00287 }, 330 { 40, 0x08804, 0x06226, 0x00287 }, 331 { 44, 0x08804, 0x06227, 0x00287 }, 332 { 48, 0x08804, 0x06228, 0x00287 }, 333 { 52, 0x08804, 0x06229, 0x00287 }, 334 { 56, 0x08804, 0x0622a, 0x00287 }, 335 { 60, 0x08804, 0x0622b, 0x00287 }, 336 { 64, 0x08804, 0x0622c, 0x00287 }, 337 338 { 100, 0x08804, 0x02200, 0x00283 }, 339 { 104, 0x08804, 0x02201, 0x00283 }, 340 { 108, 0x08804, 0x02202, 0x00283 }, 341 { 112, 0x08804, 0x02203, 0x00283 }, 342 { 116, 0x08804, 0x02204, 0x00283 }, 343 { 120, 0x08804, 0x02205, 0x00283 }, 344 { 124, 0x08804, 0x02206, 0x00283 }, 345 { 128, 0x08804, 0x02207, 0x00283 }, 346 { 132, 0x08804, 0x02208, 0x00283 }, 347 { 136, 0x08804, 0x02209, 0x00283 }, 348 { 140, 0x08804, 0x0220a, 0x00283 }, 349 350 { 149, 0x08808, 0x02429, 0x00281 }, 351 { 153, 0x08808, 0x0242b, 0x00281 }, 352 { 157, 0x08808, 0x0242d, 0x00281 }, 353 { 161, 0x08808, 0x0242f, 0x00281 } 354 }; 355 356 USB_DECLARE_DRIVER(ural); 357 358 USB_MATCH(ural) 359 { 360 USB_MATCH_START(ural, uaa); 361 362 if (uaa->iface != NULL) 363 return UMATCH_NONE; 364 365 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 366 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 367 } 368 369 USB_ATTACH(ural) 370 { 371 USB_ATTACH_START(ural, sc, uaa); 372 struct ieee80211com *ic = &sc->sc_ic; 373 struct ifnet *ifp = &sc->sc_if; 374 usb_interface_descriptor_t *id; 375 usb_endpoint_descriptor_t *ed; 376 usbd_status error; 377 char *devinfop; 378 int i; 379 380 sc->sc_udev = uaa->device; 381 382 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 383 USB_ATTACH_SETUP; 384 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 385 usbd_devinfo_free(devinfop); 386 387 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 388 printf("%s: could not set configuration no\n", 389 USBDEVNAME(sc->sc_dev)); 390 USB_ATTACH_ERROR_RETURN; 391 } 392 393 /* get the first interface handle */ 394 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 395 &sc->sc_iface); 396 if (error != 0) { 397 printf("%s: could not get interface handle\n", 398 USBDEVNAME(sc->sc_dev)); 399 USB_ATTACH_ERROR_RETURN; 400 } 401 402 /* 403 * Find endpoints. 404 */ 405 id = usbd_get_interface_descriptor(sc->sc_iface); 406 407 sc->sc_rx_no = sc->sc_tx_no = -1; 408 for (i = 0; i < id->bNumEndpoints; i++) { 409 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 410 if (ed == NULL) { 411 printf("%s: no endpoint descriptor for %d\n", 412 USBDEVNAME(sc->sc_dev), i); 413 USB_ATTACH_ERROR_RETURN; 414 } 415 416 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 417 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 418 sc->sc_rx_no = ed->bEndpointAddress; 419 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 420 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 421 sc->sc_tx_no = ed->bEndpointAddress; 422 } 423 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 424 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 425 USB_ATTACH_ERROR_RETURN; 426 } 427 428 usb_init_task(&sc->sc_task, ural_task, sc); 429 callout_init(&sc->scan_ch); 430 sc->amrr.amrr_min_success_threshold = 1; 431 sc->amrr.amrr_min_success_threshold = 15; 432 callout_init(&sc->amrr_ch); 433 434 /* retrieve RT2570 rev. no */ 435 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 436 437 /* retrieve MAC address and various other things from EEPROM */ 438 ural_read_eeprom(sc); 439 440 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 441 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 442 443 ifp->if_softc = sc; 444 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 445 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 446 ifp->if_init = ural_init; 447 ifp->if_ioctl = ural_ioctl; 448 ifp->if_start = ural_start; 449 ifp->if_watchdog = ural_watchdog; 450 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 451 IFQ_SET_READY(&ifp->if_snd); 452 453 ic->ic_ifp = ifp; 454 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 455 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 456 ic->ic_state = IEEE80211_S_INIT; 457 458 /* set device capabilities */ 459 ic->ic_caps = 460 IEEE80211_C_IBSS | /* IBSS mode supported */ 461 IEEE80211_C_MONITOR | /* monitor mode supported */ 462 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 463 IEEE80211_C_TXPMGT | /* tx power management */ 464 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 465 IEEE80211_C_SHSLOT | /* short slot time supported */ 466 IEEE80211_C_WPA; /* 802.11i */ 467 468 if (sc->rf_rev == RAL_RF_5222) { 469 /* set supported .11a rates */ 470 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 471 472 /* set supported .11a channels */ 473 for (i = 36; i <= 64; i += 4) { 474 ic->ic_channels[i].ic_freq = 475 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 476 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 477 } 478 for (i = 100; i <= 140; i += 4) { 479 ic->ic_channels[i].ic_freq = 480 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 481 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 482 } 483 for (i = 149; i <= 161; i += 4) { 484 ic->ic_channels[i].ic_freq = 485 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 486 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 487 } 488 } 489 490 /* set supported .11b and .11g rates */ 491 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 492 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 493 494 /* set supported .11b and .11g channels (1 through 14) */ 495 for (i = 1; i <= 14; i++) { 496 ic->ic_channels[i].ic_freq = 497 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 498 ic->ic_channels[i].ic_flags = 499 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 500 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 501 } 502 503 if_attach(ifp); 504 ieee80211_ifattach(ic); 505 ic->ic_reset = ural_reset; 506 507 /* override state transition machine */ 508 sc->sc_newstate = ic->ic_newstate; 509 ic->ic_newstate = ural_newstate; 510 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 511 512 #if NBPFILTER > 0 513 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 514 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 515 516 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 517 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 518 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 519 520 sc->sc_txtap_len = sizeof sc->sc_txtapu; 521 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 522 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 523 #endif 524 525 ieee80211_announce(ic); 526 527 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 528 USBDEV(sc->sc_dev)); 529 530 USB_ATTACH_SUCCESS_RETURN; 531 } 532 533 USB_DETACH(ural) 534 { 535 USB_DETACH_START(ural, sc); 536 struct ieee80211com *ic = &sc->sc_ic; 537 struct ifnet *ifp = &sc->sc_if; 538 int s; 539 540 s = splusb(); 541 542 ural_stop(ifp, 1); 543 usb_rem_task(sc->sc_udev, &sc->sc_task); 544 callout_stop(&sc->scan_ch); 545 callout_stop(&sc->amrr_ch); 546 547 if (sc->amrr_xfer != NULL) { 548 usbd_free_xfer(sc->amrr_xfer); 549 sc->amrr_xfer = NULL; 550 } 551 552 if (sc->sc_rx_pipeh != NULL) { 553 usbd_abort_pipe(sc->sc_rx_pipeh); 554 usbd_close_pipe(sc->sc_rx_pipeh); 555 } 556 557 if (sc->sc_tx_pipeh != NULL) { 558 usbd_abort_pipe(sc->sc_tx_pipeh); 559 usbd_close_pipe(sc->sc_tx_pipeh); 560 } 561 562 ural_free_rx_list(sc); 563 ural_free_tx_list(sc); 564 565 #if NBPFILTER > 0 566 bpfdetach(ifp); 567 #endif 568 ieee80211_ifdetach(ic); 569 if_detach(ifp); 570 571 splx(s); 572 573 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 574 USBDEV(sc->sc_dev)); 575 576 return 0; 577 } 578 579 Static int 580 ural_alloc_tx_list(struct ural_softc *sc) 581 { 582 struct ural_tx_data *data; 583 int i, error; 584 585 sc->tx_queued = 0; 586 587 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 588 data = &sc->tx_data[i]; 589 590 data->sc = sc; 591 592 data->xfer = usbd_alloc_xfer(sc->sc_udev); 593 if (data->xfer == NULL) { 594 printf("%s: could not allocate tx xfer\n", 595 USBDEVNAME(sc->sc_dev)); 596 error = ENOMEM; 597 goto fail; 598 } 599 600 data->buf = usbd_alloc_buffer(data->xfer, 601 RAL_TX_DESC_SIZE + MCLBYTES); 602 if (data->buf == NULL) { 603 printf("%s: could not allocate tx buffer\n", 604 USBDEVNAME(sc->sc_dev)); 605 error = ENOMEM; 606 goto fail; 607 } 608 } 609 610 return 0; 611 612 fail: ural_free_tx_list(sc); 613 return error; 614 } 615 616 Static void 617 ural_free_tx_list(struct ural_softc *sc) 618 { 619 struct ural_tx_data *data; 620 int i; 621 622 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 623 data = &sc->tx_data[i]; 624 625 if (data->xfer != NULL) { 626 usbd_free_xfer(data->xfer); 627 data->xfer = NULL; 628 } 629 630 if (data->ni != NULL) { 631 ieee80211_free_node(data->ni); 632 data->ni = NULL; 633 } 634 } 635 } 636 637 Static int 638 ural_alloc_rx_list(struct ural_softc *sc) 639 { 640 struct ural_rx_data *data; 641 int i, error; 642 643 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 644 data = &sc->rx_data[i]; 645 646 data->sc = sc; 647 648 data->xfer = usbd_alloc_xfer(sc->sc_udev); 649 if (data->xfer == NULL) { 650 printf("%s: could not allocate rx xfer\n", 651 USBDEVNAME(sc->sc_dev)); 652 error = ENOMEM; 653 goto fail; 654 } 655 656 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 657 printf("%s: could not allocate rx buffer\n", 658 USBDEVNAME(sc->sc_dev)); 659 error = ENOMEM; 660 goto fail; 661 } 662 663 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 664 if (data->m == NULL) { 665 printf("%s: could not allocate rx mbuf\n", 666 USBDEVNAME(sc->sc_dev)); 667 error = ENOMEM; 668 goto fail; 669 } 670 671 MCLGET(data->m, M_DONTWAIT); 672 if (!(data->m->m_flags & M_EXT)) { 673 printf("%s: could not allocate rx mbuf cluster\n", 674 USBDEVNAME(sc->sc_dev)); 675 error = ENOMEM; 676 goto fail; 677 } 678 679 data->buf = mtod(data->m, uint8_t *); 680 } 681 682 return 0; 683 684 fail: ural_free_tx_list(sc); 685 return error; 686 } 687 688 Static void 689 ural_free_rx_list(struct ural_softc *sc) 690 { 691 struct ural_rx_data *data; 692 int i; 693 694 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 695 data = &sc->rx_data[i]; 696 697 if (data->xfer != NULL) { 698 usbd_free_xfer(data->xfer); 699 data->xfer = NULL; 700 } 701 702 if (data->m != NULL) { 703 m_freem(data->m); 704 data->m = NULL; 705 } 706 } 707 } 708 709 Static int 710 ural_media_change(struct ifnet *ifp) 711 { 712 int error; 713 714 error = ieee80211_media_change(ifp); 715 if (error != ENETRESET) 716 return error; 717 718 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 719 ural_init(ifp); 720 721 return 0; 722 } 723 724 /* 725 * This function is called periodically (every 200ms) during scanning to 726 * switch from one channel to another. 727 */ 728 Static void 729 ural_next_scan(void *arg) 730 { 731 struct ural_softc *sc = arg; 732 struct ieee80211com *ic = &sc->sc_ic; 733 734 if (ic->ic_state == IEEE80211_S_SCAN) 735 ieee80211_next_scan(ic); 736 } 737 738 Static void 739 ural_task(void *arg) 740 { 741 struct ural_softc *sc = arg; 742 struct ieee80211com *ic = &sc->sc_ic; 743 enum ieee80211_state ostate; 744 struct ieee80211_node *ni; 745 struct mbuf *m; 746 747 ostate = ic->ic_state; 748 749 switch (sc->sc_state) { 750 case IEEE80211_S_INIT: 751 if (ostate == IEEE80211_S_RUN) { 752 /* abort TSF synchronization */ 753 ural_write(sc, RAL_TXRX_CSR19, 0); 754 755 /* force tx led to stop blinking */ 756 ural_write(sc, RAL_MAC_CSR20, 0); 757 } 758 break; 759 760 case IEEE80211_S_SCAN: 761 ural_set_chan(sc, ic->ic_curchan); 762 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc); 763 break; 764 765 case IEEE80211_S_AUTH: 766 ural_set_chan(sc, ic->ic_curchan); 767 break; 768 769 case IEEE80211_S_ASSOC: 770 ural_set_chan(sc, ic->ic_curchan); 771 break; 772 773 case IEEE80211_S_RUN: 774 ural_set_chan(sc, ic->ic_curchan); 775 776 ni = ic->ic_bss; 777 778 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 779 ural_update_slot(ic->ic_ifp); 780 ural_set_txpreamble(sc); 781 ural_set_basicrates(sc); 782 ural_set_bssid(sc, ni->ni_bssid); 783 } 784 785 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 786 ic->ic_opmode == IEEE80211_M_IBSS) { 787 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 788 if (m == NULL) { 789 printf("%s: could not allocate beacon\n", 790 USBDEVNAME(sc->sc_dev)); 791 return; 792 } 793 794 if (ural_tx_bcn(sc, m, ni) != 0) { 795 m_freem(m); 796 printf("%s: could not send beacon\n", 797 USBDEVNAME(sc->sc_dev)); 798 return; 799 } 800 801 /* beacon is no longer needed */ 802 m_freem(m); 803 } 804 805 /* make tx led blink on tx (controlled by ASIC) */ 806 ural_write(sc, RAL_MAC_CSR20, 1); 807 808 if (ic->ic_opmode != IEEE80211_M_MONITOR) 809 ural_enable_tsf_sync(sc); 810 811 /* enable automatic rate adaptation in STA mode */ 812 if (ic->ic_opmode == IEEE80211_M_STA && 813 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 814 ural_amrr_start(sc, ni); 815 816 break; 817 } 818 819 sc->sc_newstate(ic, sc->sc_state, -1); 820 } 821 822 Static int 823 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 824 int arg) 825 { 826 struct ural_softc *sc = ic->ic_ifp->if_softc; 827 828 usb_rem_task(sc->sc_udev, &sc->sc_task); 829 callout_stop(&sc->scan_ch); 830 callout_stop(&sc->amrr_ch); 831 832 /* do it in a process context */ 833 sc->sc_state = nstate; 834 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 835 836 return 0; 837 } 838 839 /* quickly determine if a given rate is CCK or OFDM */ 840 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 841 842 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 843 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 844 845 #define RAL_SIFS 10 /* us */ 846 847 #define RAL_RXTX_TURNAROUND 5 /* us */ 848 849 /* 850 * This function is only used by the Rx radiotap code. 851 */ 852 Static int 853 ural_rxrate(struct ural_rx_desc *desc) 854 { 855 if (le32toh(desc->flags) & RAL_RX_OFDM) { 856 /* reverse function of ural_plcp_signal */ 857 switch (desc->rate) { 858 case 0xb: return 12; 859 case 0xf: return 18; 860 case 0xa: return 24; 861 case 0xe: return 36; 862 case 0x9: return 48; 863 case 0xd: return 72; 864 case 0x8: return 96; 865 case 0xc: return 108; 866 } 867 } else { 868 if (desc->rate == 10) 869 return 2; 870 if (desc->rate == 20) 871 return 4; 872 if (desc->rate == 55) 873 return 11; 874 if (desc->rate == 110) 875 return 22; 876 } 877 return 2; /* should not get there */ 878 } 879 880 Static void 881 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 882 usbd_status status) 883 { 884 struct ural_tx_data *data = priv; 885 struct ural_softc *sc = data->sc; 886 struct ifnet *ifp = &sc->sc_if; 887 int s; 888 889 if (status != USBD_NORMAL_COMPLETION) { 890 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 891 return; 892 893 printf("%s: could not transmit buffer: %s\n", 894 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 895 896 if (status == USBD_STALLED) 897 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 898 899 ifp->if_oerrors++; 900 return; 901 } 902 903 s = splnet(); 904 905 m_freem(data->m); 906 data->m = NULL; 907 ieee80211_free_node(data->ni); 908 data->ni = NULL; 909 910 sc->tx_queued--; 911 ifp->if_opackets++; 912 913 DPRINTFN(10, ("tx done\n")); 914 915 sc->sc_tx_timer = 0; 916 ifp->if_flags &= ~IFF_OACTIVE; 917 ural_start(ifp); 918 919 splx(s); 920 } 921 922 Static void 923 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 924 { 925 struct ural_rx_data *data = priv; 926 struct ural_softc *sc = data->sc; 927 struct ieee80211com *ic = &sc->sc_ic; 928 struct ifnet *ifp = &sc->sc_if; 929 struct ural_rx_desc *desc; 930 struct ieee80211_frame *wh; 931 struct ieee80211_node *ni; 932 struct mbuf *mnew, *m; 933 int s, len; 934 935 if (status != USBD_NORMAL_COMPLETION) { 936 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 937 return; 938 939 if (status == USBD_STALLED) 940 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 941 goto skip; 942 } 943 944 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 945 946 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 947 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 948 len)); 949 ifp->if_ierrors++; 950 goto skip; 951 } 952 953 /* rx descriptor is located at the end */ 954 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 955 956 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 957 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 958 /* 959 * This should not happen since we did not request to receive 960 * those frames when we filled RAL_TXRX_CSR2. 961 */ 962 DPRINTFN(5, ("PHY or CRC error\n")); 963 ifp->if_ierrors++; 964 goto skip; 965 } 966 967 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 968 if (mnew == NULL) { 969 ifp->if_ierrors++; 970 goto skip; 971 } 972 973 MCLGET(mnew, M_DONTWAIT); 974 if (!(mnew->m_flags & M_EXT)) { 975 ifp->if_ierrors++; 976 m_freem(mnew); 977 goto skip; 978 } 979 980 m = data->m; 981 data->m = mnew; 982 data->buf = mtod(data->m, uint8_t *); 983 984 /* finalize mbuf */ 985 m->m_pkthdr.rcvif = ifp; 986 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 987 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 988 989 s = splnet(); 990 991 #if NBPFILTER > 0 992 if (sc->sc_drvbpf != NULL) { 993 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 994 995 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 996 tap->wr_rate = ural_rxrate(desc); 997 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 998 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 999 tap->wr_antenna = sc->rx_ant; 1000 tap->wr_antsignal = desc->rssi; 1001 1002 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1003 } 1004 #endif 1005 1006 wh = mtod(m, struct ieee80211_frame *); 1007 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1008 1009 /* send the frame to the 802.11 layer */ 1010 ieee80211_input(ic, m, ni, desc->rssi, 0); 1011 1012 /* node is no longer needed */ 1013 ieee80211_free_node(ni); 1014 1015 splx(s); 1016 1017 DPRINTFN(15, ("rx done\n")); 1018 1019 skip: /* setup a new transfer */ 1020 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1021 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1022 usbd_transfer(xfer); 1023 } 1024 1025 /* 1026 * Return the expected ack rate for a frame transmitted at rate `rate'. 1027 * XXX: this should depend on the destination node basic rate set. 1028 */ 1029 Static int 1030 ural_ack_rate(struct ieee80211com *ic, int rate) 1031 { 1032 switch (rate) { 1033 /* CCK rates */ 1034 case 2: 1035 return 2; 1036 case 4: 1037 case 11: 1038 case 22: 1039 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1040 1041 /* OFDM rates */ 1042 case 12: 1043 case 18: 1044 return 12; 1045 case 24: 1046 case 36: 1047 return 24; 1048 case 48: 1049 case 72: 1050 case 96: 1051 case 108: 1052 return 48; 1053 } 1054 1055 /* default to 1Mbps */ 1056 return 2; 1057 } 1058 1059 /* 1060 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1061 * The function automatically determines the operating mode depending on the 1062 * given rate. `flags' indicates whether short preamble is in use or not. 1063 */ 1064 Static uint16_t 1065 ural_txtime(int len, int rate, uint32_t flags) 1066 { 1067 uint16_t txtime; 1068 1069 if (RAL_RATE_IS_OFDM(rate)) { 1070 /* IEEE Std 802.11g-2003, pp. 37 */ 1071 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1072 txtime = 16 + 4 + 4 * txtime + 6; 1073 } else { 1074 /* IEEE Std 802.11b-1999, pp. 28 */ 1075 txtime = (16 * len + rate - 1) / rate; 1076 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1077 txtime += 72 + 24; 1078 else 1079 txtime += 144 + 48; 1080 } 1081 return txtime; 1082 } 1083 1084 Static uint8_t 1085 ural_plcp_signal(int rate) 1086 { 1087 switch (rate) { 1088 /* CCK rates (returned values are device-dependent) */ 1089 case 2: return 0x0; 1090 case 4: return 0x1; 1091 case 11: return 0x2; 1092 case 22: return 0x3; 1093 1094 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1095 case 12: return 0xb; 1096 case 18: return 0xf; 1097 case 24: return 0xa; 1098 case 36: return 0xe; 1099 case 48: return 0x9; 1100 case 72: return 0xd; 1101 case 96: return 0x8; 1102 case 108: return 0xc; 1103 1104 /* unsupported rates (should not get there) */ 1105 default: return 0xff; 1106 } 1107 } 1108 1109 Static void 1110 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1111 uint32_t flags, int len, int rate) 1112 { 1113 struct ieee80211com *ic = &sc->sc_ic; 1114 uint16_t plcp_length; 1115 int remainder; 1116 1117 desc->flags = htole32(flags); 1118 desc->flags |= htole32(RAL_TX_NEWSEQ); 1119 desc->flags |= htole32(len << 16); 1120 1121 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1122 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1123 1124 /* setup PLCP fields */ 1125 desc->plcp_signal = ural_plcp_signal(rate); 1126 desc->plcp_service = 4; 1127 1128 len += IEEE80211_CRC_LEN; 1129 if (RAL_RATE_IS_OFDM(rate)) { 1130 desc->flags |= htole32(RAL_TX_OFDM); 1131 1132 plcp_length = len & 0xfff; 1133 desc->plcp_length_hi = plcp_length >> 6; 1134 desc->plcp_length_lo = plcp_length & 0x3f; 1135 } else { 1136 plcp_length = (16 * len + rate - 1) / rate; 1137 if (rate == 22) { 1138 remainder = (16 * len) % 22; 1139 if (remainder != 0 && remainder < 7) 1140 desc->plcp_service |= RAL_PLCP_LENGEXT; 1141 } 1142 desc->plcp_length_hi = plcp_length >> 8; 1143 desc->plcp_length_lo = plcp_length & 0xff; 1144 1145 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1146 desc->plcp_signal |= 0x08; 1147 } 1148 1149 desc->iv = 0; 1150 desc->eiv = 0; 1151 } 1152 1153 #define RAL_TX_TIMEOUT 5000 1154 1155 Static int 1156 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1157 { 1158 struct ural_tx_desc *desc; 1159 usbd_xfer_handle xfer; 1160 uint8_t cmd = 0; 1161 usbd_status error; 1162 uint8_t *buf; 1163 int xferlen, rate; 1164 1165 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1166 1167 xfer = usbd_alloc_xfer(sc->sc_udev); 1168 if (xfer == NULL) 1169 return ENOMEM; 1170 1171 /* xfer length needs to be a multiple of two! */ 1172 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1173 1174 buf = usbd_alloc_buffer(xfer, xferlen); 1175 if (buf == NULL) { 1176 usbd_free_xfer(xfer); 1177 return ENOMEM; 1178 } 1179 1180 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1181 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1182 1183 error = usbd_sync_transfer(xfer); 1184 if (error != 0) { 1185 usbd_free_xfer(xfer); 1186 return error; 1187 } 1188 1189 desc = (struct ural_tx_desc *)buf; 1190 1191 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1192 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1193 m0->m_pkthdr.len, rate); 1194 1195 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1196 m0->m_pkthdr.len, rate, xferlen)); 1197 1198 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1199 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1200 1201 error = usbd_sync_transfer(xfer); 1202 usbd_free_xfer(xfer); 1203 1204 return error; 1205 } 1206 1207 Static int 1208 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1209 { 1210 struct ieee80211com *ic = &sc->sc_ic; 1211 struct ural_tx_desc *desc; 1212 struct ural_tx_data *data; 1213 struct ieee80211_frame *wh; 1214 uint32_t flags = 0; 1215 uint16_t dur; 1216 usbd_status error; 1217 int xferlen, rate; 1218 1219 data = &sc->tx_data[0]; 1220 desc = (struct ural_tx_desc *)data->buf; 1221 1222 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1223 1224 data->m = m0; 1225 data->ni = ni; 1226 1227 wh = mtod(m0, struct ieee80211_frame *); 1228 1229 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1230 flags |= RAL_TX_ACK; 1231 1232 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1233 *(uint16_t *)wh->i_dur = htole16(dur); 1234 1235 /* tell hardware to add timestamp for probe responses */ 1236 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1237 IEEE80211_FC0_TYPE_MGT && 1238 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1239 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1240 flags |= RAL_TX_TIMESTAMP; 1241 } 1242 1243 #if NBPFILTER > 0 1244 if (sc->sc_drvbpf != NULL) { 1245 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1246 1247 tap->wt_flags = 0; 1248 tap->wt_rate = rate; 1249 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1250 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1251 tap->wt_antenna = sc->tx_ant; 1252 1253 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1254 } 1255 #endif 1256 1257 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1258 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1259 1260 /* align end on a 2-bytes boundary */ 1261 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1262 1263 /* 1264 * No space left in the last URB to store the extra 2 bytes, force 1265 * sending of another URB. 1266 */ 1267 if ((xferlen % 64) == 0) 1268 xferlen += 2; 1269 1270 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1271 m0->m_pkthdr.len, rate, xferlen)); 1272 1273 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1274 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1275 ural_txeof); 1276 1277 error = usbd_transfer(data->xfer); 1278 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1279 m_freem(m0); 1280 return error; 1281 } 1282 1283 sc->tx_queued++; 1284 1285 return 0; 1286 } 1287 1288 Static int 1289 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1290 { 1291 struct ieee80211com *ic = &sc->sc_ic; 1292 struct ural_tx_desc *desc; 1293 struct ural_tx_data *data; 1294 struct ieee80211_frame *wh; 1295 struct ieee80211_key *k; 1296 uint32_t flags = 0; 1297 uint16_t dur; 1298 usbd_status error; 1299 int xferlen, rate; 1300 1301 wh = mtod(m0, struct ieee80211_frame *); 1302 1303 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1304 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1305 else 1306 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1307 1308 rate &= IEEE80211_RATE_VAL; 1309 1310 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1311 k = ieee80211_crypto_encap(ic, ni, m0); 1312 if (k == NULL) { 1313 m_freem(m0); 1314 return ENOBUFS; 1315 } 1316 1317 /* packet header may have moved, reset our local pointer */ 1318 wh = mtod(m0, struct ieee80211_frame *); 1319 } 1320 1321 data = &sc->tx_data[0]; 1322 desc = (struct ural_tx_desc *)data->buf; 1323 1324 data->m = m0; 1325 data->ni = ni; 1326 1327 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1328 flags |= RAL_TX_ACK; 1329 flags |= RAL_TX_RETRY(7); 1330 1331 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1332 ic->ic_flags) + RAL_SIFS; 1333 *(uint16_t *)wh->i_dur = htole16(dur); 1334 } 1335 1336 #if NBPFILTER > 0 1337 if (sc->sc_drvbpf != NULL) { 1338 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1339 1340 tap->wt_flags = 0; 1341 tap->wt_rate = rate; 1342 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1343 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1344 tap->wt_antenna = sc->tx_ant; 1345 1346 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1347 } 1348 #endif 1349 1350 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1351 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1352 1353 /* align end on a 2-bytes boundary */ 1354 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1355 1356 /* 1357 * No space left in the last URB to store the extra 2 bytes, force 1358 * sending of another URB. 1359 */ 1360 if ((xferlen % 64) == 0) 1361 xferlen += 2; 1362 1363 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1364 m0->m_pkthdr.len, rate, xferlen)); 1365 1366 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1367 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1368 ural_txeof); 1369 1370 error = usbd_transfer(data->xfer); 1371 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1372 return error; 1373 1374 sc->tx_queued++; 1375 1376 return 0; 1377 } 1378 1379 Static void 1380 ural_start(struct ifnet *ifp) 1381 { 1382 struct ural_softc *sc = ifp->if_softc; 1383 struct ieee80211com *ic = &sc->sc_ic; 1384 struct mbuf *m0; 1385 struct ether_header *eh; 1386 struct ieee80211_node *ni; 1387 1388 for (;;) { 1389 IF_POLL(&ic->ic_mgtq, m0); 1390 if (m0 != NULL) { 1391 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1392 ifp->if_flags |= IFF_OACTIVE; 1393 break; 1394 } 1395 IF_DEQUEUE(&ic->ic_mgtq, m0); 1396 1397 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1398 m0->m_pkthdr.rcvif = NULL; 1399 #if NBPFILTER > 0 1400 if (ic->ic_rawbpf != NULL) 1401 bpf_mtap(ic->ic_rawbpf, m0); 1402 #endif 1403 if (ural_tx_mgt(sc, m0, ni) != 0) 1404 break; 1405 1406 } else { 1407 if (ic->ic_state != IEEE80211_S_RUN) 1408 break; 1409 IFQ_DEQUEUE(&ifp->if_snd, m0); 1410 if (m0 == NULL) 1411 break; 1412 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1413 IF_PREPEND(&ifp->if_snd, m0); 1414 ifp->if_flags |= IFF_OACTIVE; 1415 break; 1416 } 1417 1418 if (m0->m_len < sizeof (struct ether_header) && 1419 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1420 continue; 1421 1422 eh = mtod(m0, struct ether_header *); 1423 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1424 if (ni == NULL) { 1425 m_freem(m0); 1426 continue; 1427 } 1428 #if NBPFILTER > 0 1429 if (ifp->if_bpf != NULL) 1430 bpf_mtap(ifp->if_bpf, m0); 1431 #endif 1432 m0 = ieee80211_encap(ic, m0, ni); 1433 if (m0 == NULL) { 1434 ieee80211_free_node(ni); 1435 continue; 1436 } 1437 #if NBPFILTER > 0 1438 if (ic->ic_rawbpf != NULL) 1439 bpf_mtap(ic->ic_rawbpf, m0); 1440 #endif 1441 if (ural_tx_data(sc, m0, ni) != 0) { 1442 ieee80211_free_node(ni); 1443 ifp->if_oerrors++; 1444 break; 1445 } 1446 } 1447 1448 sc->sc_tx_timer = 5; 1449 ifp->if_timer = 1; 1450 } 1451 } 1452 1453 Static void 1454 ural_watchdog(struct ifnet *ifp) 1455 { 1456 struct ural_softc *sc = ifp->if_softc; 1457 struct ieee80211com *ic = &sc->sc_ic; 1458 1459 ifp->if_timer = 0; 1460 1461 if (sc->sc_tx_timer > 0) { 1462 if (--sc->sc_tx_timer == 0) { 1463 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1464 /*ural_init(sc); XXX needs a process context! */ 1465 ifp->if_oerrors++; 1466 return; 1467 } 1468 ifp->if_timer = 1; 1469 } 1470 1471 ieee80211_watchdog(ic); 1472 } 1473 1474 /* 1475 * This function allows for fast channel switching in monitor mode (used by 1476 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1477 * generate a new beacon frame. 1478 */ 1479 Static int 1480 ural_reset(struct ifnet *ifp) 1481 { 1482 struct ural_softc *sc = ifp->if_softc; 1483 struct ieee80211com *ic = &sc->sc_ic; 1484 1485 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1486 return ENETRESET; 1487 1488 ural_set_chan(sc, ic->ic_curchan); 1489 1490 return 0; 1491 } 1492 1493 Static int 1494 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1495 { 1496 struct ural_softc *sc = ifp->if_softc; 1497 struct ieee80211com *ic = &sc->sc_ic; 1498 int s, error = 0; 1499 1500 s = splnet(); 1501 1502 switch (cmd) { 1503 case SIOCSIFFLAGS: 1504 if (ifp->if_flags & IFF_UP) { 1505 if (ifp->if_flags & IFF_RUNNING) 1506 ural_update_promisc(sc); 1507 else 1508 ural_init(ifp); 1509 } else { 1510 if (ifp->if_flags & IFF_RUNNING) 1511 ural_stop(ifp, 1); 1512 } 1513 break; 1514 1515 default: 1516 error = ieee80211_ioctl(ic, cmd, data); 1517 } 1518 1519 if (error == ENETRESET) { 1520 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1521 (IFF_UP | IFF_RUNNING)) 1522 ural_init(ifp); 1523 error = 0; 1524 } 1525 1526 splx(s); 1527 1528 return error; 1529 } 1530 1531 Static void 1532 ural_set_testmode(struct ural_softc *sc) 1533 { 1534 usb_device_request_t req; 1535 usbd_status error; 1536 1537 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1538 req.bRequest = RAL_VENDOR_REQUEST; 1539 USETW(req.wValue, 4); 1540 USETW(req.wIndex, 1); 1541 USETW(req.wLength, 0); 1542 1543 error = usbd_do_request(sc->sc_udev, &req, NULL); 1544 if (error != 0) { 1545 printf("%s: could not set test mode: %s\n", 1546 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1547 } 1548 } 1549 1550 Static void 1551 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1552 { 1553 usb_device_request_t req; 1554 usbd_status error; 1555 1556 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1557 req.bRequest = RAL_READ_EEPROM; 1558 USETW(req.wValue, 0); 1559 USETW(req.wIndex, addr); 1560 USETW(req.wLength, len); 1561 1562 error = usbd_do_request(sc->sc_udev, &req, buf); 1563 if (error != 0) { 1564 printf("%s: could not read EEPROM: %s\n", 1565 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1566 } 1567 } 1568 1569 Static uint16_t 1570 ural_read(struct ural_softc *sc, uint16_t reg) 1571 { 1572 usb_device_request_t req; 1573 usbd_status error; 1574 uint16_t val; 1575 1576 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1577 req.bRequest = RAL_READ_MAC; 1578 USETW(req.wValue, 0); 1579 USETW(req.wIndex, reg); 1580 USETW(req.wLength, sizeof (uint16_t)); 1581 1582 error = usbd_do_request(sc->sc_udev, &req, &val); 1583 if (error != 0) { 1584 printf("%s: could not read MAC register: %s\n", 1585 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1586 return 0; 1587 } 1588 1589 return le16toh(val); 1590 } 1591 1592 Static void 1593 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1594 { 1595 usb_device_request_t req; 1596 usbd_status error; 1597 1598 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1599 req.bRequest = RAL_READ_MULTI_MAC; 1600 USETW(req.wValue, 0); 1601 USETW(req.wIndex, reg); 1602 USETW(req.wLength, len); 1603 1604 error = usbd_do_request(sc->sc_udev, &req, buf); 1605 if (error != 0) { 1606 printf("%s: could not read MAC register: %s\n", 1607 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1608 } 1609 } 1610 1611 Static void 1612 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1613 { 1614 usb_device_request_t req; 1615 usbd_status error; 1616 1617 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1618 req.bRequest = RAL_WRITE_MAC; 1619 USETW(req.wValue, val); 1620 USETW(req.wIndex, reg); 1621 USETW(req.wLength, 0); 1622 1623 error = usbd_do_request(sc->sc_udev, &req, NULL); 1624 if (error != 0) { 1625 printf("%s: could not write MAC register: %s\n", 1626 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1627 } 1628 } 1629 1630 Static void 1631 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1632 { 1633 usb_device_request_t req; 1634 usbd_status error; 1635 1636 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1637 req.bRequest = RAL_WRITE_MULTI_MAC; 1638 USETW(req.wValue, 0); 1639 USETW(req.wIndex, reg); 1640 USETW(req.wLength, len); 1641 1642 error = usbd_do_request(sc->sc_udev, &req, buf); 1643 if (error != 0) { 1644 printf("%s: could not write MAC register: %s\n", 1645 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1646 } 1647 } 1648 1649 Static void 1650 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1651 { 1652 uint16_t tmp; 1653 int ntries; 1654 1655 for (ntries = 0; ntries < 5; ntries++) { 1656 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1657 break; 1658 } 1659 if (ntries == 5) { 1660 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1661 return; 1662 } 1663 1664 tmp = reg << 8 | val; 1665 ural_write(sc, RAL_PHY_CSR7, tmp); 1666 } 1667 1668 Static uint8_t 1669 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1670 { 1671 uint16_t val; 1672 int ntries; 1673 1674 val = RAL_BBP_WRITE | reg << 8; 1675 ural_write(sc, RAL_PHY_CSR7, val); 1676 1677 for (ntries = 0; ntries < 5; ntries++) { 1678 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1679 break; 1680 } 1681 if (ntries == 5) { 1682 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1683 return 0; 1684 } 1685 1686 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1687 } 1688 1689 Static void 1690 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1691 { 1692 uint32_t tmp; 1693 int ntries; 1694 1695 for (ntries = 0; ntries < 5; ntries++) { 1696 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1697 break; 1698 } 1699 if (ntries == 5) { 1700 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1701 return; 1702 } 1703 1704 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1705 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1706 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1707 1708 /* remember last written value in sc */ 1709 sc->rf_regs[reg] = val; 1710 1711 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1712 } 1713 1714 Static void 1715 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1716 { 1717 struct ieee80211com *ic = &sc->sc_ic; 1718 uint8_t power, tmp; 1719 u_int i, chan; 1720 1721 chan = ieee80211_chan2ieee(ic, c); 1722 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1723 return; 1724 1725 if (IEEE80211_IS_CHAN_2GHZ(c)) 1726 power = min(sc->txpow[chan - 1], 31); 1727 else 1728 power = 31; 1729 1730 /* adjust txpower using ifconfig settings */ 1731 power -= (100 - ic->ic_txpowlimit) / 8; 1732 1733 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1734 1735 switch (sc->rf_rev) { 1736 case RAL_RF_2522: 1737 ural_rf_write(sc, RAL_RF1, 0x00814); 1738 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1739 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1740 break; 1741 1742 case RAL_RF_2523: 1743 ural_rf_write(sc, RAL_RF1, 0x08804); 1744 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1745 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1746 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1747 break; 1748 1749 case RAL_RF_2524: 1750 ural_rf_write(sc, RAL_RF1, 0x0c808); 1751 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1752 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1753 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1754 break; 1755 1756 case RAL_RF_2525: 1757 ural_rf_write(sc, RAL_RF1, 0x08808); 1758 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1759 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1760 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1761 1762 ural_rf_write(sc, RAL_RF1, 0x08808); 1763 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1764 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1765 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1766 break; 1767 1768 case RAL_RF_2525E: 1769 ural_rf_write(sc, RAL_RF1, 0x08808); 1770 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1771 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1772 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1773 break; 1774 1775 case RAL_RF_2526: 1776 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1777 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1778 ural_rf_write(sc, RAL_RF1, 0x08804); 1779 1780 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1781 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1782 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1783 break; 1784 1785 /* dual-band RF */ 1786 case RAL_RF_5222: 1787 for (i = 0; ural_rf5222[i].chan != chan; i++); 1788 1789 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1790 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1791 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1792 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1793 break; 1794 } 1795 1796 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1797 ic->ic_state != IEEE80211_S_SCAN) { 1798 /* set Japan filter bit for channel 14 */ 1799 tmp = ural_bbp_read(sc, 70); 1800 1801 tmp &= ~RAL_JAPAN_FILTER; 1802 if (chan == 14) 1803 tmp |= RAL_JAPAN_FILTER; 1804 1805 ural_bbp_write(sc, 70, tmp); 1806 1807 /* clear CRC errors */ 1808 ural_read(sc, RAL_STA_CSR0); 1809 1810 DELAY(10000); 1811 ural_disable_rf_tune(sc); 1812 } 1813 } 1814 1815 /* 1816 * Disable RF auto-tuning. 1817 */ 1818 Static void 1819 ural_disable_rf_tune(struct ural_softc *sc) 1820 { 1821 uint32_t tmp; 1822 1823 if (sc->rf_rev != RAL_RF_2523) { 1824 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1825 ural_rf_write(sc, RAL_RF1, tmp); 1826 } 1827 1828 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1829 ural_rf_write(sc, RAL_RF3, tmp); 1830 1831 DPRINTFN(2, ("disabling RF autotune\n")); 1832 } 1833 1834 /* 1835 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1836 * synchronization. 1837 */ 1838 Static void 1839 ural_enable_tsf_sync(struct ural_softc *sc) 1840 { 1841 struct ieee80211com *ic = &sc->sc_ic; 1842 uint16_t logcwmin, preload, tmp; 1843 1844 /* first, disable TSF synchronization */ 1845 ural_write(sc, RAL_TXRX_CSR19, 0); 1846 1847 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1848 ural_write(sc, RAL_TXRX_CSR18, tmp); 1849 1850 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1851 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1852 tmp = logcwmin << 12 | preload; 1853 ural_write(sc, RAL_TXRX_CSR20, tmp); 1854 1855 /* finally, enable TSF synchronization */ 1856 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1857 if (ic->ic_opmode == IEEE80211_M_STA) 1858 tmp |= RAL_ENABLE_TSF_SYNC(1); 1859 else 1860 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1861 ural_write(sc, RAL_TXRX_CSR19, tmp); 1862 1863 DPRINTF(("enabling TSF synchronization\n")); 1864 } 1865 1866 Static void 1867 ural_update_slot(struct ifnet *ifp) 1868 { 1869 struct ural_softc *sc = ifp->if_softc; 1870 struct ieee80211com *ic = &sc->sc_ic; 1871 uint16_t slottime, sifs, eifs; 1872 1873 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1874 1875 /* 1876 * These settings may sound a bit inconsistent but this is what the 1877 * reference driver does. 1878 */ 1879 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1880 sifs = 16 - RAL_RXTX_TURNAROUND; 1881 eifs = 364; 1882 } else { 1883 sifs = 10 - RAL_RXTX_TURNAROUND; 1884 eifs = 64; 1885 } 1886 1887 ural_write(sc, RAL_MAC_CSR10, slottime); 1888 ural_write(sc, RAL_MAC_CSR11, sifs); 1889 ural_write(sc, RAL_MAC_CSR12, eifs); 1890 } 1891 1892 Static void 1893 ural_set_txpreamble(struct ural_softc *sc) 1894 { 1895 uint16_t tmp; 1896 1897 tmp = ural_read(sc, RAL_TXRX_CSR10); 1898 1899 tmp &= ~RAL_SHORT_PREAMBLE; 1900 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1901 tmp |= RAL_SHORT_PREAMBLE; 1902 1903 ural_write(sc, RAL_TXRX_CSR10, tmp); 1904 } 1905 1906 Static void 1907 ural_set_basicrates(struct ural_softc *sc) 1908 { 1909 struct ieee80211com *ic = &sc->sc_ic; 1910 1911 /* update basic rate set */ 1912 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1913 /* 11b basic rates: 1, 2Mbps */ 1914 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1915 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1916 /* 11a basic rates: 6, 12, 24Mbps */ 1917 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1918 } else { 1919 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1920 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1921 } 1922 } 1923 1924 Static void 1925 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1926 { 1927 uint16_t tmp; 1928 1929 tmp = bssid[0] | bssid[1] << 8; 1930 ural_write(sc, RAL_MAC_CSR5, tmp); 1931 1932 tmp = bssid[2] | bssid[3] << 8; 1933 ural_write(sc, RAL_MAC_CSR6, tmp); 1934 1935 tmp = bssid[4] | bssid[5] << 8; 1936 ural_write(sc, RAL_MAC_CSR7, tmp); 1937 1938 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1939 } 1940 1941 Static void 1942 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1943 { 1944 uint16_t tmp; 1945 1946 tmp = addr[0] | addr[1] << 8; 1947 ural_write(sc, RAL_MAC_CSR2, tmp); 1948 1949 tmp = addr[2] | addr[3] << 8; 1950 ural_write(sc, RAL_MAC_CSR3, tmp); 1951 1952 tmp = addr[4] | addr[5] << 8; 1953 ural_write(sc, RAL_MAC_CSR4, tmp); 1954 1955 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1956 } 1957 1958 Static void 1959 ural_update_promisc(struct ural_softc *sc) 1960 { 1961 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1962 uint32_t tmp; 1963 1964 tmp = ural_read(sc, RAL_TXRX_CSR2); 1965 1966 tmp &= ~RAL_DROP_NOT_TO_ME; 1967 if (!(ifp->if_flags & IFF_PROMISC)) 1968 tmp |= RAL_DROP_NOT_TO_ME; 1969 1970 ural_write(sc, RAL_TXRX_CSR2, tmp); 1971 1972 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1973 "entering" : "leaving")); 1974 } 1975 1976 Static const char * 1977 ural_get_rf(int rev) 1978 { 1979 switch (rev) { 1980 case RAL_RF_2522: return "RT2522"; 1981 case RAL_RF_2523: return "RT2523"; 1982 case RAL_RF_2524: return "RT2524"; 1983 case RAL_RF_2525: return "RT2525"; 1984 case RAL_RF_2525E: return "RT2525e"; 1985 case RAL_RF_2526: return "RT2526"; 1986 case RAL_RF_5222: return "RT5222"; 1987 default: return "unknown"; 1988 } 1989 } 1990 1991 Static void 1992 ural_read_eeprom(struct ural_softc *sc) 1993 { 1994 struct ieee80211com *ic = &sc->sc_ic; 1995 uint16_t val; 1996 1997 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1998 val = le16toh(val); 1999 sc->rf_rev = (val >> 11) & 0x7; 2000 sc->hw_radio = (val >> 10) & 0x1; 2001 sc->led_mode = (val >> 6) & 0x7; 2002 sc->rx_ant = (val >> 4) & 0x3; 2003 sc->tx_ant = (val >> 2) & 0x3; 2004 sc->nb_ant = val & 0x3; 2005 2006 /* read MAC address */ 2007 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2008 2009 /* read default values for BBP registers */ 2010 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2011 2012 /* read Tx power for all b/g channels */ 2013 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2014 } 2015 2016 Static int 2017 ural_bbp_init(struct ural_softc *sc) 2018 { 2019 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2020 int i, ntries; 2021 2022 /* wait for BBP to be ready */ 2023 for (ntries = 0; ntries < 100; ntries++) { 2024 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2025 break; 2026 DELAY(1000); 2027 } 2028 if (ntries == 100) { 2029 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 2030 return EIO; 2031 } 2032 2033 /* initialize BBP registers to default values */ 2034 for (i = 0; i < N(ural_def_bbp); i++) 2035 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2036 2037 #if 0 2038 /* initialize BBP registers to values stored in EEPROM */ 2039 for (i = 0; i < 16; i++) { 2040 if (sc->bbp_prom[i].reg == 0xff) 2041 continue; 2042 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2043 } 2044 #endif 2045 2046 return 0; 2047 #undef N 2048 } 2049 2050 Static void 2051 ural_set_txantenna(struct ural_softc *sc, int antenna) 2052 { 2053 uint16_t tmp; 2054 uint8_t tx; 2055 2056 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2057 if (antenna == 1) 2058 tx |= RAL_BBP_ANTA; 2059 else if (antenna == 2) 2060 tx |= RAL_BBP_ANTB; 2061 else 2062 tx |= RAL_BBP_DIVERSITY; 2063 2064 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2065 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2066 sc->rf_rev == RAL_RF_5222) 2067 tx |= RAL_BBP_FLIPIQ; 2068 2069 ural_bbp_write(sc, RAL_BBP_TX, tx); 2070 2071 /* update values in PHY_CSR5 and PHY_CSR6 */ 2072 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2073 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2074 2075 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2076 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2077 } 2078 2079 Static void 2080 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2081 { 2082 uint8_t rx; 2083 2084 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2085 if (antenna == 1) 2086 rx |= RAL_BBP_ANTA; 2087 else if (antenna == 2) 2088 rx |= RAL_BBP_ANTB; 2089 else 2090 rx |= RAL_BBP_DIVERSITY; 2091 2092 /* need to force no I/Q flip for RF 2525e and 2526 */ 2093 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2094 rx &= ~RAL_BBP_FLIPIQ; 2095 2096 ural_bbp_write(sc, RAL_BBP_RX, rx); 2097 } 2098 2099 Static int 2100 ural_init(struct ifnet *ifp) 2101 { 2102 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2103 struct ural_softc *sc = ifp->if_softc; 2104 struct ieee80211com *ic = &sc->sc_ic; 2105 struct ieee80211_key *wk; 2106 struct ural_rx_data *data; 2107 uint16_t tmp; 2108 usbd_status error; 2109 int i, ntries; 2110 2111 ural_set_testmode(sc); 2112 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2113 2114 ural_stop(ifp, 0); 2115 2116 /* initialize MAC registers to default values */ 2117 for (i = 0; i < N(ural_def_mac); i++) 2118 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2119 2120 /* wait for BBP and RF to wake up (this can take a long time!) */ 2121 for (ntries = 0; ntries < 100; ntries++) { 2122 tmp = ural_read(sc, RAL_MAC_CSR17); 2123 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2124 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2125 break; 2126 DELAY(1000); 2127 } 2128 if (ntries == 100) { 2129 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2130 USBDEVNAME(sc->sc_dev)); 2131 error = EIO; 2132 goto fail; 2133 } 2134 2135 /* we're ready! */ 2136 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2137 2138 /* set basic rate set (will be updated later) */ 2139 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2140 2141 error = ural_bbp_init(sc); 2142 if (error != 0) 2143 goto fail; 2144 2145 /* set default BSS channel */ 2146 ural_set_chan(sc, ic->ic_curchan); 2147 2148 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2149 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2150 2151 ural_set_txantenna(sc, sc->tx_ant); 2152 ural_set_rxantenna(sc, sc->rx_ant); 2153 2154 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2155 ural_set_macaddr(sc, ic->ic_myaddr); 2156 2157 /* 2158 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2159 */ 2160 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2161 wk = &ic->ic_crypto.cs_nw_keys[i]; 2162 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2163 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2164 } 2165 2166 /* 2167 * Allocate xfer for AMRR statistics requests. 2168 */ 2169 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2170 if (sc->amrr_xfer == NULL) { 2171 printf("%s: could not allocate AMRR xfer\n", 2172 USBDEVNAME(sc->sc_dev)); 2173 goto fail; 2174 } 2175 2176 /* 2177 * Open Tx and Rx USB bulk pipes. 2178 */ 2179 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2180 &sc->sc_tx_pipeh); 2181 if (error != 0) { 2182 printf("%s: could not open Tx pipe: %s\n", 2183 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2184 goto fail; 2185 } 2186 2187 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2188 &sc->sc_rx_pipeh); 2189 if (error != 0) { 2190 printf("%s: could not open Rx pipe: %s\n", 2191 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2192 goto fail; 2193 } 2194 2195 /* 2196 * Allocate Tx and Rx xfer queues. 2197 */ 2198 error = ural_alloc_tx_list(sc); 2199 if (error != 0) { 2200 printf("%s: could not allocate Tx list\n", 2201 USBDEVNAME(sc->sc_dev)); 2202 goto fail; 2203 } 2204 2205 error = ural_alloc_rx_list(sc); 2206 if (error != 0) { 2207 printf("%s: could not allocate Rx list\n", 2208 USBDEVNAME(sc->sc_dev)); 2209 goto fail; 2210 } 2211 2212 /* 2213 * Start up the receive pipe. 2214 */ 2215 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2216 data = &sc->rx_data[i]; 2217 2218 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2219 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2220 usbd_transfer(data->xfer); 2221 } 2222 2223 /* kick Rx */ 2224 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2225 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2226 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2227 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2228 tmp |= RAL_DROP_TODS; 2229 if (!(ifp->if_flags & IFF_PROMISC)) 2230 tmp |= RAL_DROP_NOT_TO_ME; 2231 } 2232 ural_write(sc, RAL_TXRX_CSR2, tmp); 2233 2234 ifp->if_flags &= ~IFF_OACTIVE; 2235 ifp->if_flags |= IFF_RUNNING; 2236 2237 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2238 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2239 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2240 } else 2241 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2242 2243 return 0; 2244 2245 fail: ural_stop(ifp, 1); 2246 return error; 2247 #undef N 2248 } 2249 2250 Static void 2251 ural_stop(struct ifnet *ifp, int disable) 2252 { 2253 struct ural_softc *sc = ifp->if_softc; 2254 struct ieee80211com *ic = &sc->sc_ic; 2255 2256 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2257 2258 sc->sc_tx_timer = 0; 2259 ifp->if_timer = 0; 2260 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2261 2262 /* disable Rx */ 2263 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2264 2265 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2266 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2267 ural_write(sc, RAL_MAC_CSR1, 0); 2268 2269 if (sc->amrr_xfer != NULL) { 2270 usbd_free_xfer(sc->amrr_xfer); 2271 sc->amrr_xfer = NULL; 2272 } 2273 2274 if (sc->sc_rx_pipeh != NULL) { 2275 usbd_abort_pipe(sc->sc_rx_pipeh); 2276 usbd_close_pipe(sc->sc_rx_pipeh); 2277 sc->sc_rx_pipeh = NULL; 2278 } 2279 2280 if (sc->sc_tx_pipeh != NULL) { 2281 usbd_abort_pipe(sc->sc_tx_pipeh); 2282 usbd_close_pipe(sc->sc_tx_pipeh); 2283 sc->sc_tx_pipeh = NULL; 2284 } 2285 2286 ural_free_rx_list(sc); 2287 ural_free_tx_list(sc); 2288 } 2289 2290 int 2291 ural_activate(device_ptr_t self, enum devact act) 2292 { 2293 struct ural_softc *sc = (struct ural_softc *)self; 2294 2295 switch (act) { 2296 case DVACT_ACTIVATE: 2297 return EOPNOTSUPP; 2298 break; 2299 2300 case DVACT_DEACTIVATE: 2301 if_deactivate(&sc->sc_if); 2302 break; 2303 } 2304 2305 return 0; 2306 } 2307 2308 Static void 2309 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2310 { 2311 int i; 2312 2313 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2314 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2315 2316 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2317 2318 /* set rate to some reasonable initial value */ 2319 for (i = ni->ni_rates.rs_nrates - 1; 2320 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2321 i--); 2322 ni->ni_txrate = i; 2323 2324 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2325 } 2326 2327 Static void 2328 ural_amrr_timeout(void *arg) 2329 { 2330 struct ural_softc *sc = (struct ural_softc *)arg; 2331 usb_device_request_t req; 2332 int s; 2333 2334 s = splusb(); 2335 2336 /* 2337 * Asynchronously read statistic registers (cleared by read). 2338 */ 2339 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2340 req.bRequest = RAL_READ_MULTI_MAC; 2341 USETW(req.wValue, 0); 2342 USETW(req.wIndex, RAL_STA_CSR0); 2343 USETW(req.wLength, sizeof sc->sta); 2344 2345 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2346 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2347 ural_amrr_update); 2348 (void)usbd_transfer(sc->amrr_xfer); 2349 2350 splx(s); 2351 } 2352 2353 Static void 2354 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2355 usbd_status status) 2356 { 2357 struct ural_softc *sc = (struct ural_softc *)priv; 2358 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2359 2360 if (status != USBD_NORMAL_COMPLETION) { 2361 printf("%s: could not retrieve Tx statistics - " 2362 "cancelling automatic rate control\n", 2363 USBDEVNAME(sc->sc_dev)); 2364 return; 2365 } 2366 2367 /* count TX retry-fail as Tx errors */ 2368 ifp->if_oerrors += sc->sta[9]; 2369 2370 sc->amn.amn_retrycnt = 2371 sc->sta[7] + /* TX one-retry ok count */ 2372 sc->sta[8] + /* TX more-retry ok count */ 2373 sc->sta[9]; /* TX retry-fail count */ 2374 2375 sc->amn.amn_txcnt = 2376 sc->amn.amn_retrycnt + 2377 sc->sta[6]; /* TX no-retry ok count */ 2378 2379 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2380 2381 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2382 } 2383
Indexes created Fri Oct 03 02:09:57 GMT 2025