if_ural.c revision 1.19.2.1
1 /* $NetBSD: if_ural.c,v 1.19.2.1 2007/03/13 16:50:33 ad Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.19.2.1 2007/03/13 16:50:33 ad Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 71 #include <dev/usb/if_uralreg.h> 72 #include <dev/usb/if_uralvar.h> 73 74 #ifdef USB_DEBUG 75 #define URAL_DEBUG 76 #endif 77 78 #ifdef URAL_DEBUG 79 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 81 int ural_debug = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n, x) 85 #endif 86 87 /* various supported device vendors/products */ 88 static const struct usb_devno ural_devs[] = { 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 95 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 96 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 97 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 98 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 101 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 106 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 107 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 108 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 109 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 110 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 111 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 112 }; 113 114 Static int ural_alloc_tx_list(struct ural_softc *); 115 Static void ural_free_tx_list(struct ural_softc *); 116 Static int ural_alloc_rx_list(struct ural_softc *); 117 Static void ural_free_rx_list(struct ural_softc *); 118 Static int ural_media_change(struct ifnet *); 119 Static void ural_next_scan(void *); 120 Static void ural_task(void *); 121 Static int ural_newstate(struct ieee80211com *, 122 enum ieee80211_state, int); 123 Static int ural_rxrate(struct ural_rx_desc *); 124 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 125 usbd_status); 126 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 127 usbd_status); 128 Static int ural_ack_rate(struct ieee80211com *, int); 129 Static uint16_t ural_txtime(int, int, uint32_t); 130 Static uint8_t ural_plcp_signal(int); 131 Static void ural_setup_tx_desc(struct ural_softc *, 132 struct ural_tx_desc *, uint32_t, int, int); 133 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 138 struct ieee80211_node *); 139 Static void ural_start(struct ifnet *); 140 Static void ural_watchdog(struct ifnet *); 141 Static int ural_reset(struct ifnet *); 142 Static int ural_ioctl(struct ifnet *, u_long, void *); 143 Static void ural_set_testmode(struct ural_softc *); 144 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 145 int); 146 Static uint16_t ural_read(struct ural_softc *, uint16_t); 147 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 148 int); 149 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 150 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 151 int); 152 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 153 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 154 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 155 Static void ural_set_chan(struct ural_softc *, 156 struct ieee80211_channel *); 157 Static void ural_disable_rf_tune(struct ural_softc *); 158 Static void ural_enable_tsf_sync(struct ural_softc *); 159 Static void ural_update_slot(struct ifnet *); 160 Static void ural_set_txpreamble(struct ural_softc *); 161 Static void ural_set_basicrates(struct ural_softc *); 162 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 163 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 164 Static void ural_update_promisc(struct ural_softc *); 165 Static const char *ural_get_rf(int); 166 Static void ural_read_eeprom(struct ural_softc *); 167 Static int ural_bbp_init(struct ural_softc *); 168 Static void ural_set_txantenna(struct ural_softc *, int); 169 Static void ural_set_rxantenna(struct ural_softc *, int); 170 Static int ural_init(struct ifnet *); 171 Static void ural_stop(struct ifnet *, int); 172 Static void ural_amrr_start(struct ural_softc *, 173 struct ieee80211_node *); 174 Static void ural_amrr_timeout(void *); 175 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 176 usbd_status status); 177 178 /* 179 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 180 */ 181 static const struct ieee80211_rateset ural_rateset_11a = 182 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 183 184 static const struct ieee80211_rateset ural_rateset_11b = 185 { 4, { 2, 4, 11, 22 } }; 186 187 static const struct ieee80211_rateset ural_rateset_11g = 188 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 189 190 /* 191 * Default values for MAC registers; values taken from the reference driver. 192 */ 193 static const struct { 194 uint16_t reg; 195 uint16_t val; 196 } ural_def_mac[] = { 197 { RAL_TXRX_CSR5, 0x8c8d }, 198 { RAL_TXRX_CSR6, 0x8b8a }, 199 { RAL_TXRX_CSR7, 0x8687 }, 200 { RAL_TXRX_CSR8, 0x0085 }, 201 { RAL_MAC_CSR13, 0x1111 }, 202 { RAL_MAC_CSR14, 0x1e11 }, 203 { RAL_TXRX_CSR21, 0xe78f }, 204 { RAL_MAC_CSR9, 0xff1d }, 205 { RAL_MAC_CSR11, 0x0002 }, 206 { RAL_MAC_CSR22, 0x0053 }, 207 { RAL_MAC_CSR15, 0x0000 }, 208 { RAL_MAC_CSR8, 0x0780 }, 209 { RAL_TXRX_CSR19, 0x0000 }, 210 { RAL_TXRX_CSR18, 0x005a }, 211 { RAL_PHY_CSR2, 0x0000 }, 212 { RAL_TXRX_CSR0, 0x1ec0 }, 213 { RAL_PHY_CSR4, 0x000f } 214 }; 215 216 /* 217 * Default values for BBP registers; values taken from the reference driver. 218 */ 219 static const struct { 220 uint8_t reg; 221 uint8_t val; 222 } ural_def_bbp[] = { 223 { 3, 0x02 }, 224 { 4, 0x19 }, 225 { 14, 0x1c }, 226 { 15, 0x30 }, 227 { 16, 0xac }, 228 { 17, 0x48 }, 229 { 18, 0x18 }, 230 { 19, 0xff }, 231 { 20, 0x1e }, 232 { 21, 0x08 }, 233 { 22, 0x08 }, 234 { 23, 0x08 }, 235 { 24, 0x80 }, 236 { 25, 0x50 }, 237 { 26, 0x08 }, 238 { 27, 0x23 }, 239 { 30, 0x10 }, 240 { 31, 0x2b }, 241 { 32, 0xb9 }, 242 { 34, 0x12 }, 243 { 35, 0x50 }, 244 { 39, 0xc4 }, 245 { 40, 0x02 }, 246 { 41, 0x60 }, 247 { 53, 0x10 }, 248 { 54, 0x18 }, 249 { 56, 0x08 }, 250 { 57, 0x10 }, 251 { 58, 0x08 }, 252 { 61, 0x60 }, 253 { 62, 0x10 }, 254 { 75, 0xff } 255 }; 256 257 /* 258 * Default values for RF register R2 indexed by channel numbers. 259 */ 260 static const uint32_t ural_rf2522_r2[] = { 261 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 262 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 263 }; 264 265 static const uint32_t ural_rf2523_r2[] = { 266 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 267 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 268 }; 269 270 static const uint32_t ural_rf2524_r2[] = { 271 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 272 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 273 }; 274 275 static const uint32_t ural_rf2525_r2[] = { 276 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 277 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 278 }; 279 280 static const uint32_t ural_rf2525_hi_r2[] = { 281 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 282 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 283 }; 284 285 static const uint32_t ural_rf2525e_r2[] = { 286 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 287 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 288 }; 289 290 static const uint32_t ural_rf2526_hi_r2[] = { 291 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 292 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 293 }; 294 295 static const uint32_t ural_rf2526_r2[] = { 296 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 297 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 298 }; 299 300 /* 301 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 302 * values taken from the reference driver. 303 */ 304 static const struct { 305 uint8_t chan; 306 uint32_t r1; 307 uint32_t r2; 308 uint32_t r4; 309 } ural_rf5222[] = { 310 { 1, 0x08808, 0x0044d, 0x00282 }, 311 { 2, 0x08808, 0x0044e, 0x00282 }, 312 { 3, 0x08808, 0x0044f, 0x00282 }, 313 { 4, 0x08808, 0x00460, 0x00282 }, 314 { 5, 0x08808, 0x00461, 0x00282 }, 315 { 6, 0x08808, 0x00462, 0x00282 }, 316 { 7, 0x08808, 0x00463, 0x00282 }, 317 { 8, 0x08808, 0x00464, 0x00282 }, 318 { 9, 0x08808, 0x00465, 0x00282 }, 319 { 10, 0x08808, 0x00466, 0x00282 }, 320 { 11, 0x08808, 0x00467, 0x00282 }, 321 { 12, 0x08808, 0x00468, 0x00282 }, 322 { 13, 0x08808, 0x00469, 0x00282 }, 323 { 14, 0x08808, 0x0046b, 0x00286 }, 324 325 { 36, 0x08804, 0x06225, 0x00287 }, 326 { 40, 0x08804, 0x06226, 0x00287 }, 327 { 44, 0x08804, 0x06227, 0x00287 }, 328 { 48, 0x08804, 0x06228, 0x00287 }, 329 { 52, 0x08804, 0x06229, 0x00287 }, 330 { 56, 0x08804, 0x0622a, 0x00287 }, 331 { 60, 0x08804, 0x0622b, 0x00287 }, 332 { 64, 0x08804, 0x0622c, 0x00287 }, 333 334 { 100, 0x08804, 0x02200, 0x00283 }, 335 { 104, 0x08804, 0x02201, 0x00283 }, 336 { 108, 0x08804, 0x02202, 0x00283 }, 337 { 112, 0x08804, 0x02203, 0x00283 }, 338 { 116, 0x08804, 0x02204, 0x00283 }, 339 { 120, 0x08804, 0x02205, 0x00283 }, 340 { 124, 0x08804, 0x02206, 0x00283 }, 341 { 128, 0x08804, 0x02207, 0x00283 }, 342 { 132, 0x08804, 0x02208, 0x00283 }, 343 { 136, 0x08804, 0x02209, 0x00283 }, 344 { 140, 0x08804, 0x0220a, 0x00283 }, 345 346 { 149, 0x08808, 0x02429, 0x00281 }, 347 { 153, 0x08808, 0x0242b, 0x00281 }, 348 { 157, 0x08808, 0x0242d, 0x00281 }, 349 { 161, 0x08808, 0x0242f, 0x00281 } 350 }; 351 352 USB_DECLARE_DRIVER(ural); 353 354 USB_MATCH(ural) 355 { 356 USB_MATCH_START(ural, uaa); 357 358 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 359 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 360 } 361 362 USB_ATTACH(ural) 363 { 364 USB_ATTACH_START(ural, sc, uaa); 365 struct ieee80211com *ic = &sc->sc_ic; 366 struct ifnet *ifp = &sc->sc_if; 367 usb_interface_descriptor_t *id; 368 usb_endpoint_descriptor_t *ed; 369 usbd_status error; 370 char *devinfop; 371 int i; 372 373 sc->sc_udev = uaa->device; 374 375 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 376 USB_ATTACH_SETUP; 377 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 378 usbd_devinfo_free(devinfop); 379 380 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 381 printf("%s: could not set configuration no\n", 382 USBDEVNAME(sc->sc_dev)); 383 USB_ATTACH_ERROR_RETURN; 384 } 385 386 /* get the first interface handle */ 387 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 388 &sc->sc_iface); 389 if (error != 0) { 390 printf("%s: could not get interface handle\n", 391 USBDEVNAME(sc->sc_dev)); 392 USB_ATTACH_ERROR_RETURN; 393 } 394 395 /* 396 * Find endpoints. 397 */ 398 id = usbd_get_interface_descriptor(sc->sc_iface); 399 400 sc->sc_rx_no = sc->sc_tx_no = -1; 401 for (i = 0; i < id->bNumEndpoints; i++) { 402 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 403 if (ed == NULL) { 404 printf("%s: no endpoint descriptor for %d\n", 405 USBDEVNAME(sc->sc_dev), i); 406 USB_ATTACH_ERROR_RETURN; 407 } 408 409 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 410 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 411 sc->sc_rx_no = ed->bEndpointAddress; 412 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 413 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 414 sc->sc_tx_no = ed->bEndpointAddress; 415 } 416 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 417 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 418 USB_ATTACH_ERROR_RETURN; 419 } 420 421 usb_init_task(&sc->sc_task, ural_task, sc); 422 callout_init(&sc->scan_ch); 423 sc->amrr.amrr_min_success_threshold = 1; 424 sc->amrr.amrr_min_success_threshold = 15; 425 callout_init(&sc->amrr_ch); 426 427 /* retrieve RT2570 rev. no */ 428 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 429 430 /* retrieve MAC address and various other things from EEPROM */ 431 ural_read_eeprom(sc); 432 433 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 434 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 435 436 ifp->if_softc = sc; 437 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 438 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 439 ifp->if_init = ural_init; 440 ifp->if_ioctl = ural_ioctl; 441 ifp->if_start = ural_start; 442 ifp->if_watchdog = ural_watchdog; 443 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 444 IFQ_SET_READY(&ifp->if_snd); 445 446 ic->ic_ifp = ifp; 447 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 448 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 449 ic->ic_state = IEEE80211_S_INIT; 450 451 /* set device capabilities */ 452 ic->ic_caps = 453 IEEE80211_C_IBSS | /* IBSS mode supported */ 454 IEEE80211_C_MONITOR | /* monitor mode supported */ 455 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 456 IEEE80211_C_TXPMGT | /* tx power management */ 457 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 458 IEEE80211_C_SHSLOT | /* short slot time supported */ 459 IEEE80211_C_WPA; /* 802.11i */ 460 461 if (sc->rf_rev == RAL_RF_5222) { 462 /* set supported .11a rates */ 463 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 464 465 /* set supported .11a channels */ 466 for (i = 36; i <= 64; i += 4) { 467 ic->ic_channels[i].ic_freq = 468 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 469 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 470 } 471 for (i = 100; i <= 140; i += 4) { 472 ic->ic_channels[i].ic_freq = 473 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 474 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 475 } 476 for (i = 149; i <= 161; i += 4) { 477 ic->ic_channels[i].ic_freq = 478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 480 } 481 } 482 483 /* set supported .11b and .11g rates */ 484 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 485 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 486 487 /* set supported .11b and .11g channels (1 through 14) */ 488 for (i = 1; i <= 14; i++) { 489 ic->ic_channels[i].ic_freq = 490 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 491 ic->ic_channels[i].ic_flags = 492 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 493 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 494 } 495 496 if_attach(ifp); 497 ieee80211_ifattach(ic); 498 ic->ic_reset = ural_reset; 499 500 /* override state transition machine */ 501 sc->sc_newstate = ic->ic_newstate; 502 ic->ic_newstate = ural_newstate; 503 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 504 505 #if NBPFILTER > 0 506 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 507 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 508 509 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 510 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 511 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 512 513 sc->sc_txtap_len = sizeof sc->sc_txtapu; 514 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 515 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 516 #endif 517 518 ieee80211_announce(ic); 519 520 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 521 USBDEV(sc->sc_dev)); 522 523 USB_ATTACH_SUCCESS_RETURN; 524 } 525 526 USB_DETACH(ural) 527 { 528 USB_DETACH_START(ural, sc); 529 struct ieee80211com *ic = &sc->sc_ic; 530 struct ifnet *ifp = &sc->sc_if; 531 int s; 532 533 s = splusb(); 534 535 ural_stop(ifp, 1); 536 usb_rem_task(sc->sc_udev, &sc->sc_task); 537 callout_stop(&sc->scan_ch); 538 callout_stop(&sc->amrr_ch); 539 540 if (sc->amrr_xfer != NULL) { 541 usbd_free_xfer(sc->amrr_xfer); 542 sc->amrr_xfer = NULL; 543 } 544 545 if (sc->sc_rx_pipeh != NULL) { 546 usbd_abort_pipe(sc->sc_rx_pipeh); 547 usbd_close_pipe(sc->sc_rx_pipeh); 548 } 549 550 if (sc->sc_tx_pipeh != NULL) { 551 usbd_abort_pipe(sc->sc_tx_pipeh); 552 usbd_close_pipe(sc->sc_tx_pipeh); 553 } 554 555 ural_free_rx_list(sc); 556 ural_free_tx_list(sc); 557 558 #if NBPFILTER > 0 559 bpfdetach(ifp); 560 #endif 561 ieee80211_ifdetach(ic); 562 if_detach(ifp); 563 564 splx(s); 565 566 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 567 USBDEV(sc->sc_dev)); 568 569 return 0; 570 } 571 572 Static int 573 ural_alloc_tx_list(struct ural_softc *sc) 574 { 575 struct ural_tx_data *data; 576 int i, error; 577 578 sc->tx_queued = 0; 579 580 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 581 data = &sc->tx_data[i]; 582 583 data->sc = sc; 584 585 data->xfer = usbd_alloc_xfer(sc->sc_udev); 586 if (data->xfer == NULL) { 587 printf("%s: could not allocate tx xfer\n", 588 USBDEVNAME(sc->sc_dev)); 589 error = ENOMEM; 590 goto fail; 591 } 592 593 data->buf = usbd_alloc_buffer(data->xfer, 594 RAL_TX_DESC_SIZE + MCLBYTES); 595 if (data->buf == NULL) { 596 printf("%s: could not allocate tx buffer\n", 597 USBDEVNAME(sc->sc_dev)); 598 error = ENOMEM; 599 goto fail; 600 } 601 } 602 603 return 0; 604 605 fail: ural_free_tx_list(sc); 606 return error; 607 } 608 609 Static void 610 ural_free_tx_list(struct ural_softc *sc) 611 { 612 struct ural_tx_data *data; 613 int i; 614 615 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 616 data = &sc->tx_data[i]; 617 618 if (data->xfer != NULL) { 619 usbd_free_xfer(data->xfer); 620 data->xfer = NULL; 621 } 622 623 if (data->ni != NULL) { 624 ieee80211_free_node(data->ni); 625 data->ni = NULL; 626 } 627 } 628 } 629 630 Static int 631 ural_alloc_rx_list(struct ural_softc *sc) 632 { 633 struct ural_rx_data *data; 634 int i, error; 635 636 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 637 data = &sc->rx_data[i]; 638 639 data->sc = sc; 640 641 data->xfer = usbd_alloc_xfer(sc->sc_udev); 642 if (data->xfer == NULL) { 643 printf("%s: could not allocate rx xfer\n", 644 USBDEVNAME(sc->sc_dev)); 645 error = ENOMEM; 646 goto fail; 647 } 648 649 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 650 printf("%s: could not allocate rx buffer\n", 651 USBDEVNAME(sc->sc_dev)); 652 error = ENOMEM; 653 goto fail; 654 } 655 656 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 657 if (data->m == NULL) { 658 printf("%s: could not allocate rx mbuf\n", 659 USBDEVNAME(sc->sc_dev)); 660 error = ENOMEM; 661 goto fail; 662 } 663 664 MCLGET(data->m, M_DONTWAIT); 665 if (!(data->m->m_flags & M_EXT)) { 666 printf("%s: could not allocate rx mbuf cluster\n", 667 USBDEVNAME(sc->sc_dev)); 668 error = ENOMEM; 669 goto fail; 670 } 671 672 data->buf = mtod(data->m, uint8_t *); 673 } 674 675 return 0; 676 677 fail: ural_free_tx_list(sc); 678 return error; 679 } 680 681 Static void 682 ural_free_rx_list(struct ural_softc *sc) 683 { 684 struct ural_rx_data *data; 685 int i; 686 687 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 688 data = &sc->rx_data[i]; 689 690 if (data->xfer != NULL) { 691 usbd_free_xfer(data->xfer); 692 data->xfer = NULL; 693 } 694 695 if (data->m != NULL) { 696 m_freem(data->m); 697 data->m = NULL; 698 } 699 } 700 } 701 702 Static int 703 ural_media_change(struct ifnet *ifp) 704 { 705 int error; 706 707 error = ieee80211_media_change(ifp); 708 if (error != ENETRESET) 709 return error; 710 711 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 712 ural_init(ifp); 713 714 return 0; 715 } 716 717 /* 718 * This function is called periodically (every 200ms) during scanning to 719 * switch from one channel to another. 720 */ 721 Static void 722 ural_next_scan(void *arg) 723 { 724 struct ural_softc *sc = arg; 725 struct ieee80211com *ic = &sc->sc_ic; 726 727 if (ic->ic_state == IEEE80211_S_SCAN) 728 ieee80211_next_scan(ic); 729 } 730 731 Static void 732 ural_task(void *arg) 733 { 734 struct ural_softc *sc = arg; 735 struct ieee80211com *ic = &sc->sc_ic; 736 enum ieee80211_state ostate; 737 struct ieee80211_node *ni; 738 struct mbuf *m; 739 740 ostate = ic->ic_state; 741 742 switch (sc->sc_state) { 743 case IEEE80211_S_INIT: 744 if (ostate == IEEE80211_S_RUN) { 745 /* abort TSF synchronization */ 746 ural_write(sc, RAL_TXRX_CSR19, 0); 747 748 /* force tx led to stop blinking */ 749 ural_write(sc, RAL_MAC_CSR20, 0); 750 } 751 break; 752 753 case IEEE80211_S_SCAN: 754 ural_set_chan(sc, ic->ic_curchan); 755 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc); 756 break; 757 758 case IEEE80211_S_AUTH: 759 ural_set_chan(sc, ic->ic_curchan); 760 break; 761 762 case IEEE80211_S_ASSOC: 763 ural_set_chan(sc, ic->ic_curchan); 764 break; 765 766 case IEEE80211_S_RUN: 767 ural_set_chan(sc, ic->ic_curchan); 768 769 ni = ic->ic_bss; 770 771 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 772 ural_update_slot(ic->ic_ifp); 773 ural_set_txpreamble(sc); 774 ural_set_basicrates(sc); 775 ural_set_bssid(sc, ni->ni_bssid); 776 } 777 778 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 779 ic->ic_opmode == IEEE80211_M_IBSS) { 780 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 781 if (m == NULL) { 782 printf("%s: could not allocate beacon\n", 783 USBDEVNAME(sc->sc_dev)); 784 return; 785 } 786 787 if (ural_tx_bcn(sc, m, ni) != 0) { 788 m_freem(m); 789 printf("%s: could not send beacon\n", 790 USBDEVNAME(sc->sc_dev)); 791 return; 792 } 793 794 /* beacon is no longer needed */ 795 m_freem(m); 796 } 797 798 /* make tx led blink on tx (controlled by ASIC) */ 799 ural_write(sc, RAL_MAC_CSR20, 1); 800 801 if (ic->ic_opmode != IEEE80211_M_MONITOR) 802 ural_enable_tsf_sync(sc); 803 804 /* enable automatic rate adaptation in STA mode */ 805 if (ic->ic_opmode == IEEE80211_M_STA && 806 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 807 ural_amrr_start(sc, ni); 808 809 break; 810 } 811 812 sc->sc_newstate(ic, sc->sc_state, -1); 813 } 814 815 Static int 816 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 817 int arg) 818 { 819 struct ural_softc *sc = ic->ic_ifp->if_softc; 820 821 usb_rem_task(sc->sc_udev, &sc->sc_task); 822 callout_stop(&sc->scan_ch); 823 callout_stop(&sc->amrr_ch); 824 825 /* do it in a process context */ 826 sc->sc_state = nstate; 827 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 828 829 return 0; 830 } 831 832 /* quickly determine if a given rate is CCK or OFDM */ 833 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 834 835 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 836 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 837 838 #define RAL_SIFS 10 /* us */ 839 840 #define RAL_RXTX_TURNAROUND 5 /* us */ 841 842 /* 843 * This function is only used by the Rx radiotap code. 844 */ 845 Static int 846 ural_rxrate(struct ural_rx_desc *desc) 847 { 848 if (le32toh(desc->flags) & RAL_RX_OFDM) { 849 /* reverse function of ural_plcp_signal */ 850 switch (desc->rate) { 851 case 0xb: return 12; 852 case 0xf: return 18; 853 case 0xa: return 24; 854 case 0xe: return 36; 855 case 0x9: return 48; 856 case 0xd: return 72; 857 case 0x8: return 96; 858 case 0xc: return 108; 859 } 860 } else { 861 if (desc->rate == 10) 862 return 2; 863 if (desc->rate == 20) 864 return 4; 865 if (desc->rate == 55) 866 return 11; 867 if (desc->rate == 110) 868 return 22; 869 } 870 return 2; /* should not get there */ 871 } 872 873 Static void 874 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 875 usbd_status status) 876 { 877 struct ural_tx_data *data = priv; 878 struct ural_softc *sc = data->sc; 879 struct ifnet *ifp = &sc->sc_if; 880 int s; 881 882 if (status != USBD_NORMAL_COMPLETION) { 883 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 884 return; 885 886 printf("%s: could not transmit buffer: %s\n", 887 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 888 889 if (status == USBD_STALLED) 890 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 891 892 ifp->if_oerrors++; 893 return; 894 } 895 896 s = splnet(); 897 898 m_freem(data->m); 899 data->m = NULL; 900 ieee80211_free_node(data->ni); 901 data->ni = NULL; 902 903 sc->tx_queued--; 904 ifp->if_opackets++; 905 906 DPRINTFN(10, ("tx done\n")); 907 908 sc->sc_tx_timer = 0; 909 ifp->if_flags &= ~IFF_OACTIVE; 910 ural_start(ifp); 911 912 splx(s); 913 } 914 915 Static void 916 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 917 { 918 struct ural_rx_data *data = priv; 919 struct ural_softc *sc = data->sc; 920 struct ieee80211com *ic = &sc->sc_ic; 921 struct ifnet *ifp = &sc->sc_if; 922 struct ural_rx_desc *desc; 923 struct ieee80211_frame *wh; 924 struct ieee80211_node *ni; 925 struct mbuf *mnew, *m; 926 int s, len; 927 928 if (status != USBD_NORMAL_COMPLETION) { 929 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 930 return; 931 932 if (status == USBD_STALLED) 933 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 934 goto skip; 935 } 936 937 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 938 939 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 940 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 941 len)); 942 ifp->if_ierrors++; 943 goto skip; 944 } 945 946 /* rx descriptor is located at the end */ 947 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 948 949 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 950 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 951 /* 952 * This should not happen since we did not request to receive 953 * those frames when we filled RAL_TXRX_CSR2. 954 */ 955 DPRINTFN(5, ("PHY or CRC error\n")); 956 ifp->if_ierrors++; 957 goto skip; 958 } 959 960 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 961 if (mnew == NULL) { 962 ifp->if_ierrors++; 963 goto skip; 964 } 965 966 MCLGET(mnew, M_DONTWAIT); 967 if (!(mnew->m_flags & M_EXT)) { 968 ifp->if_ierrors++; 969 m_freem(mnew); 970 goto skip; 971 } 972 973 m = data->m; 974 data->m = mnew; 975 data->buf = mtod(data->m, uint8_t *); 976 977 /* finalize mbuf */ 978 m->m_pkthdr.rcvif = ifp; 979 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 980 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 981 982 s = splnet(); 983 984 #if NBPFILTER > 0 985 if (sc->sc_drvbpf != NULL) { 986 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 987 988 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 989 tap->wr_rate = ural_rxrate(desc); 990 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 991 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 992 tap->wr_antenna = sc->rx_ant; 993 tap->wr_antsignal = desc->rssi; 994 995 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 996 } 997 #endif 998 999 wh = mtod(m, struct ieee80211_frame *); 1000 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1001 1002 /* send the frame to the 802.11 layer */ 1003 ieee80211_input(ic, m, ni, desc->rssi, 0); 1004 1005 /* node is no longer needed */ 1006 ieee80211_free_node(ni); 1007 1008 splx(s); 1009 1010 DPRINTFN(15, ("rx done\n")); 1011 1012 skip: /* setup a new transfer */ 1013 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1014 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1015 usbd_transfer(xfer); 1016 } 1017 1018 /* 1019 * Return the expected ack rate for a frame transmitted at rate `rate'. 1020 * XXX: this should depend on the destination node basic rate set. 1021 */ 1022 Static int 1023 ural_ack_rate(struct ieee80211com *ic, int rate) 1024 { 1025 switch (rate) { 1026 /* CCK rates */ 1027 case 2: 1028 return 2; 1029 case 4: 1030 case 11: 1031 case 22: 1032 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1033 1034 /* OFDM rates */ 1035 case 12: 1036 case 18: 1037 return 12; 1038 case 24: 1039 case 36: 1040 return 24; 1041 case 48: 1042 case 72: 1043 case 96: 1044 case 108: 1045 return 48; 1046 } 1047 1048 /* default to 1Mbps */ 1049 return 2; 1050 } 1051 1052 /* 1053 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1054 * The function automatically determines the operating mode depending on the 1055 * given rate. `flags' indicates whether short preamble is in use or not. 1056 */ 1057 Static uint16_t 1058 ural_txtime(int len, int rate, uint32_t flags) 1059 { 1060 uint16_t txtime; 1061 1062 if (RAL_RATE_IS_OFDM(rate)) { 1063 /* IEEE Std 802.11g-2003, pp. 37 */ 1064 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1065 txtime = 16 + 4 + 4 * txtime + 6; 1066 } else { 1067 /* IEEE Std 802.11b-1999, pp. 28 */ 1068 txtime = (16 * len + rate - 1) / rate; 1069 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1070 txtime += 72 + 24; 1071 else 1072 txtime += 144 + 48; 1073 } 1074 return txtime; 1075 } 1076 1077 Static uint8_t 1078 ural_plcp_signal(int rate) 1079 { 1080 switch (rate) { 1081 /* CCK rates (returned values are device-dependent) */ 1082 case 2: return 0x0; 1083 case 4: return 0x1; 1084 case 11: return 0x2; 1085 case 22: return 0x3; 1086 1087 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1088 case 12: return 0xb; 1089 case 18: return 0xf; 1090 case 24: return 0xa; 1091 case 36: return 0xe; 1092 case 48: return 0x9; 1093 case 72: return 0xd; 1094 case 96: return 0x8; 1095 case 108: return 0xc; 1096 1097 /* unsupported rates (should not get there) */ 1098 default: return 0xff; 1099 } 1100 } 1101 1102 Static void 1103 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1104 uint32_t flags, int len, int rate) 1105 { 1106 struct ieee80211com *ic = &sc->sc_ic; 1107 uint16_t plcp_length; 1108 int remainder; 1109 1110 desc->flags = htole32(flags); 1111 desc->flags |= htole32(RAL_TX_NEWSEQ); 1112 desc->flags |= htole32(len << 16); 1113 1114 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1115 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1116 1117 /* setup PLCP fields */ 1118 desc->plcp_signal = ural_plcp_signal(rate); 1119 desc->plcp_service = 4; 1120 1121 len += IEEE80211_CRC_LEN; 1122 if (RAL_RATE_IS_OFDM(rate)) { 1123 desc->flags |= htole32(RAL_TX_OFDM); 1124 1125 plcp_length = len & 0xfff; 1126 desc->plcp_length_hi = plcp_length >> 6; 1127 desc->plcp_length_lo = plcp_length & 0x3f; 1128 } else { 1129 plcp_length = (16 * len + rate - 1) / rate; 1130 if (rate == 22) { 1131 remainder = (16 * len) % 22; 1132 if (remainder != 0 && remainder < 7) 1133 desc->plcp_service |= RAL_PLCP_LENGEXT; 1134 } 1135 desc->plcp_length_hi = plcp_length >> 8; 1136 desc->plcp_length_lo = plcp_length & 0xff; 1137 1138 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1139 desc->plcp_signal |= 0x08; 1140 } 1141 1142 desc->iv = 0; 1143 desc->eiv = 0; 1144 } 1145 1146 #define RAL_TX_TIMEOUT 5000 1147 1148 Static int 1149 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1150 { 1151 struct ural_tx_desc *desc; 1152 usbd_xfer_handle xfer; 1153 uint8_t cmd = 0; 1154 usbd_status error; 1155 uint8_t *buf; 1156 int xferlen, rate; 1157 1158 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1159 1160 xfer = usbd_alloc_xfer(sc->sc_udev); 1161 if (xfer == NULL) 1162 return ENOMEM; 1163 1164 /* xfer length needs to be a multiple of two! */ 1165 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1166 1167 buf = usbd_alloc_buffer(xfer, xferlen); 1168 if (buf == NULL) { 1169 usbd_free_xfer(xfer); 1170 return ENOMEM; 1171 } 1172 1173 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1174 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1175 1176 error = usbd_sync_transfer(xfer); 1177 if (error != 0) { 1178 usbd_free_xfer(xfer); 1179 return error; 1180 } 1181 1182 desc = (struct ural_tx_desc *)buf; 1183 1184 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1185 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1186 m0->m_pkthdr.len, rate); 1187 1188 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1189 m0->m_pkthdr.len, rate, xferlen)); 1190 1191 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1192 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1193 1194 error = usbd_sync_transfer(xfer); 1195 usbd_free_xfer(xfer); 1196 1197 return error; 1198 } 1199 1200 Static int 1201 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1202 { 1203 struct ieee80211com *ic = &sc->sc_ic; 1204 struct ural_tx_desc *desc; 1205 struct ural_tx_data *data; 1206 struct ieee80211_frame *wh; 1207 uint32_t flags = 0; 1208 uint16_t dur; 1209 usbd_status error; 1210 int xferlen, rate; 1211 1212 data = &sc->tx_data[0]; 1213 desc = (struct ural_tx_desc *)data->buf; 1214 1215 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1216 1217 data->m = m0; 1218 data->ni = ni; 1219 1220 wh = mtod(m0, struct ieee80211_frame *); 1221 1222 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1223 flags |= RAL_TX_ACK; 1224 1225 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1226 *(uint16_t *)wh->i_dur = htole16(dur); 1227 1228 /* tell hardware to add timestamp for probe responses */ 1229 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1230 IEEE80211_FC0_TYPE_MGT && 1231 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1232 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1233 flags |= RAL_TX_TIMESTAMP; 1234 } 1235 1236 #if NBPFILTER > 0 1237 if (sc->sc_drvbpf != NULL) { 1238 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1239 1240 tap->wt_flags = 0; 1241 tap->wt_rate = rate; 1242 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1243 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1244 tap->wt_antenna = sc->tx_ant; 1245 1246 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1247 } 1248 #endif 1249 1250 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1251 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1252 1253 /* align end on a 2-bytes boundary */ 1254 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1255 1256 /* 1257 * No space left in the last URB to store the extra 2 bytes, force 1258 * sending of another URB. 1259 */ 1260 if ((xferlen % 64) == 0) 1261 xferlen += 2; 1262 1263 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1264 m0->m_pkthdr.len, rate, xferlen)); 1265 1266 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1267 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1268 ural_txeof); 1269 1270 error = usbd_transfer(data->xfer); 1271 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1272 m_freem(m0); 1273 return error; 1274 } 1275 1276 sc->tx_queued++; 1277 1278 return 0; 1279 } 1280 1281 Static int 1282 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1283 { 1284 struct ieee80211com *ic = &sc->sc_ic; 1285 struct ural_tx_desc *desc; 1286 struct ural_tx_data *data; 1287 struct ieee80211_frame *wh; 1288 struct ieee80211_key *k; 1289 uint32_t flags = 0; 1290 uint16_t dur; 1291 usbd_status error; 1292 int xferlen, rate; 1293 1294 wh = mtod(m0, struct ieee80211_frame *); 1295 1296 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1297 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1298 else 1299 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1300 1301 rate &= IEEE80211_RATE_VAL; 1302 1303 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1304 k = ieee80211_crypto_encap(ic, ni, m0); 1305 if (k == NULL) { 1306 m_freem(m0); 1307 return ENOBUFS; 1308 } 1309 1310 /* packet header may have moved, reset our local pointer */ 1311 wh = mtod(m0, struct ieee80211_frame *); 1312 } 1313 1314 data = &sc->tx_data[0]; 1315 desc = (struct ural_tx_desc *)data->buf; 1316 1317 data->m = m0; 1318 data->ni = ni; 1319 1320 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1321 flags |= RAL_TX_ACK; 1322 flags |= RAL_TX_RETRY(7); 1323 1324 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1325 ic->ic_flags) + RAL_SIFS; 1326 *(uint16_t *)wh->i_dur = htole16(dur); 1327 } 1328 1329 #if NBPFILTER > 0 1330 if (sc->sc_drvbpf != NULL) { 1331 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1332 1333 tap->wt_flags = 0; 1334 tap->wt_rate = rate; 1335 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1336 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1337 tap->wt_antenna = sc->tx_ant; 1338 1339 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1340 } 1341 #endif 1342 1343 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1344 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1345 1346 /* align end on a 2-bytes boundary */ 1347 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1348 1349 /* 1350 * No space left in the last URB to store the extra 2 bytes, force 1351 * sending of another URB. 1352 */ 1353 if ((xferlen % 64) == 0) 1354 xferlen += 2; 1355 1356 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1357 m0->m_pkthdr.len, rate, xferlen)); 1358 1359 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1360 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1361 ural_txeof); 1362 1363 error = usbd_transfer(data->xfer); 1364 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1365 return error; 1366 1367 sc->tx_queued++; 1368 1369 return 0; 1370 } 1371 1372 Static void 1373 ural_start(struct ifnet *ifp) 1374 { 1375 struct ural_softc *sc = ifp->if_softc; 1376 struct ieee80211com *ic = &sc->sc_ic; 1377 struct mbuf *m0; 1378 struct ether_header *eh; 1379 struct ieee80211_node *ni; 1380 1381 for (;;) { 1382 IF_POLL(&ic->ic_mgtq, m0); 1383 if (m0 != NULL) { 1384 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1385 ifp->if_flags |= IFF_OACTIVE; 1386 break; 1387 } 1388 IF_DEQUEUE(&ic->ic_mgtq, m0); 1389 1390 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1391 m0->m_pkthdr.rcvif = NULL; 1392 #if NBPFILTER > 0 1393 if (ic->ic_rawbpf != NULL) 1394 bpf_mtap(ic->ic_rawbpf, m0); 1395 #endif 1396 if (ural_tx_mgt(sc, m0, ni) != 0) 1397 break; 1398 1399 } else { 1400 if (ic->ic_state != IEEE80211_S_RUN) 1401 break; 1402 IFQ_DEQUEUE(&ifp->if_snd, m0); 1403 if (m0 == NULL) 1404 break; 1405 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1406 IF_PREPEND(&ifp->if_snd, m0); 1407 ifp->if_flags |= IFF_OACTIVE; 1408 break; 1409 } 1410 1411 if (m0->m_len < sizeof (struct ether_header) && 1412 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1413 continue; 1414 1415 eh = mtod(m0, struct ether_header *); 1416 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1417 if (ni == NULL) { 1418 m_freem(m0); 1419 continue; 1420 } 1421 #if NBPFILTER > 0 1422 if (ifp->if_bpf != NULL) 1423 bpf_mtap(ifp->if_bpf, m0); 1424 #endif 1425 m0 = ieee80211_encap(ic, m0, ni); 1426 if (m0 == NULL) { 1427 ieee80211_free_node(ni); 1428 continue; 1429 } 1430 #if NBPFILTER > 0 1431 if (ic->ic_rawbpf != NULL) 1432 bpf_mtap(ic->ic_rawbpf, m0); 1433 #endif 1434 if (ural_tx_data(sc, m0, ni) != 0) { 1435 ieee80211_free_node(ni); 1436 ifp->if_oerrors++; 1437 break; 1438 } 1439 } 1440 1441 sc->sc_tx_timer = 5; 1442 ifp->if_timer = 1; 1443 } 1444 } 1445 1446 Static void 1447 ural_watchdog(struct ifnet *ifp) 1448 { 1449 struct ural_softc *sc = ifp->if_softc; 1450 struct ieee80211com *ic = &sc->sc_ic; 1451 1452 ifp->if_timer = 0; 1453 1454 if (sc->sc_tx_timer > 0) { 1455 if (--sc->sc_tx_timer == 0) { 1456 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1457 /*ural_init(sc); XXX needs a process context! */ 1458 ifp->if_oerrors++; 1459 return; 1460 } 1461 ifp->if_timer = 1; 1462 } 1463 1464 ieee80211_watchdog(ic); 1465 } 1466 1467 /* 1468 * This function allows for fast channel switching in monitor mode (used by 1469 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1470 * generate a new beacon frame. 1471 */ 1472 Static int 1473 ural_reset(struct ifnet *ifp) 1474 { 1475 struct ural_softc *sc = ifp->if_softc; 1476 struct ieee80211com *ic = &sc->sc_ic; 1477 1478 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1479 return ENETRESET; 1480 1481 ural_set_chan(sc, ic->ic_curchan); 1482 1483 return 0; 1484 } 1485 1486 Static int 1487 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1488 { 1489 struct ural_softc *sc = ifp->if_softc; 1490 struct ieee80211com *ic = &sc->sc_ic; 1491 int s, error = 0; 1492 1493 s = splnet(); 1494 1495 switch (cmd) { 1496 case SIOCSIFFLAGS: 1497 if (ifp->if_flags & IFF_UP) { 1498 if (ifp->if_flags & IFF_RUNNING) 1499 ural_update_promisc(sc); 1500 else 1501 ural_init(ifp); 1502 } else { 1503 if (ifp->if_flags & IFF_RUNNING) 1504 ural_stop(ifp, 1); 1505 } 1506 break; 1507 1508 default: 1509 error = ieee80211_ioctl(ic, cmd, data); 1510 } 1511 1512 if (error == ENETRESET) { 1513 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1514 (IFF_UP | IFF_RUNNING)) 1515 ural_init(ifp); 1516 error = 0; 1517 } 1518 1519 splx(s); 1520 1521 return error; 1522 } 1523 1524 Static void 1525 ural_set_testmode(struct ural_softc *sc) 1526 { 1527 usb_device_request_t req; 1528 usbd_status error; 1529 1530 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1531 req.bRequest = RAL_VENDOR_REQUEST; 1532 USETW(req.wValue, 4); 1533 USETW(req.wIndex, 1); 1534 USETW(req.wLength, 0); 1535 1536 error = usbd_do_request(sc->sc_udev, &req, NULL); 1537 if (error != 0) { 1538 printf("%s: could not set test mode: %s\n", 1539 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1540 } 1541 } 1542 1543 Static void 1544 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1545 { 1546 usb_device_request_t req; 1547 usbd_status error; 1548 1549 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1550 req.bRequest = RAL_READ_EEPROM; 1551 USETW(req.wValue, 0); 1552 USETW(req.wIndex, addr); 1553 USETW(req.wLength, len); 1554 1555 error = usbd_do_request(sc->sc_udev, &req, buf); 1556 if (error != 0) { 1557 printf("%s: could not read EEPROM: %s\n", 1558 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1559 } 1560 } 1561 1562 Static uint16_t 1563 ural_read(struct ural_softc *sc, uint16_t reg) 1564 { 1565 usb_device_request_t req; 1566 usbd_status error; 1567 uint16_t val; 1568 1569 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1570 req.bRequest = RAL_READ_MAC; 1571 USETW(req.wValue, 0); 1572 USETW(req.wIndex, reg); 1573 USETW(req.wLength, sizeof (uint16_t)); 1574 1575 error = usbd_do_request(sc->sc_udev, &req, &val); 1576 if (error != 0) { 1577 printf("%s: could not read MAC register: %s\n", 1578 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1579 return 0; 1580 } 1581 1582 return le16toh(val); 1583 } 1584 1585 Static void 1586 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1587 { 1588 usb_device_request_t req; 1589 usbd_status error; 1590 1591 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1592 req.bRequest = RAL_READ_MULTI_MAC; 1593 USETW(req.wValue, 0); 1594 USETW(req.wIndex, reg); 1595 USETW(req.wLength, len); 1596 1597 error = usbd_do_request(sc->sc_udev, &req, buf); 1598 if (error != 0) { 1599 printf("%s: could not read MAC register: %s\n", 1600 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1601 } 1602 } 1603 1604 Static void 1605 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1606 { 1607 usb_device_request_t req; 1608 usbd_status error; 1609 1610 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1611 req.bRequest = RAL_WRITE_MAC; 1612 USETW(req.wValue, val); 1613 USETW(req.wIndex, reg); 1614 USETW(req.wLength, 0); 1615 1616 error = usbd_do_request(sc->sc_udev, &req, NULL); 1617 if (error != 0) { 1618 printf("%s: could not write MAC register: %s\n", 1619 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1620 } 1621 } 1622 1623 Static void 1624 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1625 { 1626 usb_device_request_t req; 1627 usbd_status error; 1628 1629 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1630 req.bRequest = RAL_WRITE_MULTI_MAC; 1631 USETW(req.wValue, 0); 1632 USETW(req.wIndex, reg); 1633 USETW(req.wLength, len); 1634 1635 error = usbd_do_request(sc->sc_udev, &req, buf); 1636 if (error != 0) { 1637 printf("%s: could not write MAC register: %s\n", 1638 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1639 } 1640 } 1641 1642 Static void 1643 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1644 { 1645 uint16_t tmp; 1646 int ntries; 1647 1648 for (ntries = 0; ntries < 5; ntries++) { 1649 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1650 break; 1651 } 1652 if (ntries == 5) { 1653 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1654 return; 1655 } 1656 1657 tmp = reg << 8 | val; 1658 ural_write(sc, RAL_PHY_CSR7, tmp); 1659 } 1660 1661 Static uint8_t 1662 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1663 { 1664 uint16_t val; 1665 int ntries; 1666 1667 val = RAL_BBP_WRITE | reg << 8; 1668 ural_write(sc, RAL_PHY_CSR7, val); 1669 1670 for (ntries = 0; ntries < 5; ntries++) { 1671 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1672 break; 1673 } 1674 if (ntries == 5) { 1675 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1676 return 0; 1677 } 1678 1679 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1680 } 1681 1682 Static void 1683 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1684 { 1685 uint32_t tmp; 1686 int ntries; 1687 1688 for (ntries = 0; ntries < 5; ntries++) { 1689 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1690 break; 1691 } 1692 if (ntries == 5) { 1693 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1694 return; 1695 } 1696 1697 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1698 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1699 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1700 1701 /* remember last written value in sc */ 1702 sc->rf_regs[reg] = val; 1703 1704 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1705 } 1706 1707 Static void 1708 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1709 { 1710 struct ieee80211com *ic = &sc->sc_ic; 1711 uint8_t power, tmp; 1712 u_int i, chan; 1713 1714 chan = ieee80211_chan2ieee(ic, c); 1715 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1716 return; 1717 1718 if (IEEE80211_IS_CHAN_2GHZ(c)) 1719 power = min(sc->txpow[chan - 1], 31); 1720 else 1721 power = 31; 1722 1723 /* adjust txpower using ifconfig settings */ 1724 power -= (100 - ic->ic_txpowlimit) / 8; 1725 1726 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1727 1728 switch (sc->rf_rev) { 1729 case RAL_RF_2522: 1730 ural_rf_write(sc, RAL_RF1, 0x00814); 1731 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1732 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1733 break; 1734 1735 case RAL_RF_2523: 1736 ural_rf_write(sc, RAL_RF1, 0x08804); 1737 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1738 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1739 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1740 break; 1741 1742 case RAL_RF_2524: 1743 ural_rf_write(sc, RAL_RF1, 0x0c808); 1744 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1745 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1746 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1747 break; 1748 1749 case RAL_RF_2525: 1750 ural_rf_write(sc, RAL_RF1, 0x08808); 1751 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1752 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1753 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1754 1755 ural_rf_write(sc, RAL_RF1, 0x08808); 1756 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1757 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1758 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1759 break; 1760 1761 case RAL_RF_2525E: 1762 ural_rf_write(sc, RAL_RF1, 0x08808); 1763 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1764 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1765 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1766 break; 1767 1768 case RAL_RF_2526: 1769 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1770 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1771 ural_rf_write(sc, RAL_RF1, 0x08804); 1772 1773 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1774 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1775 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1776 break; 1777 1778 /* dual-band RF */ 1779 case RAL_RF_5222: 1780 for (i = 0; ural_rf5222[i].chan != chan; i++); 1781 1782 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1783 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1784 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1785 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1786 break; 1787 } 1788 1789 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1790 ic->ic_state != IEEE80211_S_SCAN) { 1791 /* set Japan filter bit for channel 14 */ 1792 tmp = ural_bbp_read(sc, 70); 1793 1794 tmp &= ~RAL_JAPAN_FILTER; 1795 if (chan == 14) 1796 tmp |= RAL_JAPAN_FILTER; 1797 1798 ural_bbp_write(sc, 70, tmp); 1799 1800 /* clear CRC errors */ 1801 ural_read(sc, RAL_STA_CSR0); 1802 1803 DELAY(10000); 1804 ural_disable_rf_tune(sc); 1805 } 1806 } 1807 1808 /* 1809 * Disable RF auto-tuning. 1810 */ 1811 Static void 1812 ural_disable_rf_tune(struct ural_softc *sc) 1813 { 1814 uint32_t tmp; 1815 1816 if (sc->rf_rev != RAL_RF_2523) { 1817 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1818 ural_rf_write(sc, RAL_RF1, tmp); 1819 } 1820 1821 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1822 ural_rf_write(sc, RAL_RF3, tmp); 1823 1824 DPRINTFN(2, ("disabling RF autotune\n")); 1825 } 1826 1827 /* 1828 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1829 * synchronization. 1830 */ 1831 Static void 1832 ural_enable_tsf_sync(struct ural_softc *sc) 1833 { 1834 struct ieee80211com *ic = &sc->sc_ic; 1835 uint16_t logcwmin, preload, tmp; 1836 1837 /* first, disable TSF synchronization */ 1838 ural_write(sc, RAL_TXRX_CSR19, 0); 1839 1840 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1841 ural_write(sc, RAL_TXRX_CSR18, tmp); 1842 1843 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1844 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1845 tmp = logcwmin << 12 | preload; 1846 ural_write(sc, RAL_TXRX_CSR20, tmp); 1847 1848 /* finally, enable TSF synchronization */ 1849 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1850 if (ic->ic_opmode == IEEE80211_M_STA) 1851 tmp |= RAL_ENABLE_TSF_SYNC(1); 1852 else 1853 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1854 ural_write(sc, RAL_TXRX_CSR19, tmp); 1855 1856 DPRINTF(("enabling TSF synchronization\n")); 1857 } 1858 1859 Static void 1860 ural_update_slot(struct ifnet *ifp) 1861 { 1862 struct ural_softc *sc = ifp->if_softc; 1863 struct ieee80211com *ic = &sc->sc_ic; 1864 uint16_t slottime, sifs, eifs; 1865 1866 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1867 1868 /* 1869 * These settings may sound a bit inconsistent but this is what the 1870 * reference driver does. 1871 */ 1872 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1873 sifs = 16 - RAL_RXTX_TURNAROUND; 1874 eifs = 364; 1875 } else { 1876 sifs = 10 - RAL_RXTX_TURNAROUND; 1877 eifs = 64; 1878 } 1879 1880 ural_write(sc, RAL_MAC_CSR10, slottime); 1881 ural_write(sc, RAL_MAC_CSR11, sifs); 1882 ural_write(sc, RAL_MAC_CSR12, eifs); 1883 } 1884 1885 Static void 1886 ural_set_txpreamble(struct ural_softc *sc) 1887 { 1888 uint16_t tmp; 1889 1890 tmp = ural_read(sc, RAL_TXRX_CSR10); 1891 1892 tmp &= ~RAL_SHORT_PREAMBLE; 1893 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1894 tmp |= RAL_SHORT_PREAMBLE; 1895 1896 ural_write(sc, RAL_TXRX_CSR10, tmp); 1897 } 1898 1899 Static void 1900 ural_set_basicrates(struct ural_softc *sc) 1901 { 1902 struct ieee80211com *ic = &sc->sc_ic; 1903 1904 /* update basic rate set */ 1905 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1906 /* 11b basic rates: 1, 2Mbps */ 1907 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1908 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1909 /* 11a basic rates: 6, 12, 24Mbps */ 1910 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1911 } else { 1912 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1913 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1914 } 1915 } 1916 1917 Static void 1918 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1919 { 1920 uint16_t tmp; 1921 1922 tmp = bssid[0] | bssid[1] << 8; 1923 ural_write(sc, RAL_MAC_CSR5, tmp); 1924 1925 tmp = bssid[2] | bssid[3] << 8; 1926 ural_write(sc, RAL_MAC_CSR6, tmp); 1927 1928 tmp = bssid[4] | bssid[5] << 8; 1929 ural_write(sc, RAL_MAC_CSR7, tmp); 1930 1931 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1932 } 1933 1934 Static void 1935 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1936 { 1937 uint16_t tmp; 1938 1939 tmp = addr[0] | addr[1] << 8; 1940 ural_write(sc, RAL_MAC_CSR2, tmp); 1941 1942 tmp = addr[2] | addr[3] << 8; 1943 ural_write(sc, RAL_MAC_CSR3, tmp); 1944 1945 tmp = addr[4] | addr[5] << 8; 1946 ural_write(sc, RAL_MAC_CSR4, tmp); 1947 1948 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1949 } 1950 1951 Static void 1952 ural_update_promisc(struct ural_softc *sc) 1953 { 1954 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1955 uint32_t tmp; 1956 1957 tmp = ural_read(sc, RAL_TXRX_CSR2); 1958 1959 tmp &= ~RAL_DROP_NOT_TO_ME; 1960 if (!(ifp->if_flags & IFF_PROMISC)) 1961 tmp |= RAL_DROP_NOT_TO_ME; 1962 1963 ural_write(sc, RAL_TXRX_CSR2, tmp); 1964 1965 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1966 "entering" : "leaving")); 1967 } 1968 1969 Static const char * 1970 ural_get_rf(int rev) 1971 { 1972 switch (rev) { 1973 case RAL_RF_2522: return "RT2522"; 1974 case RAL_RF_2523: return "RT2523"; 1975 case RAL_RF_2524: return "RT2524"; 1976 case RAL_RF_2525: return "RT2525"; 1977 case RAL_RF_2525E: return "RT2525e"; 1978 case RAL_RF_2526: return "RT2526"; 1979 case RAL_RF_5222: return "RT5222"; 1980 default: return "unknown"; 1981 } 1982 } 1983 1984 Static void 1985 ural_read_eeprom(struct ural_softc *sc) 1986 { 1987 struct ieee80211com *ic = &sc->sc_ic; 1988 uint16_t val; 1989 1990 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1991 val = le16toh(val); 1992 sc->rf_rev = (val >> 11) & 0x7; 1993 sc->hw_radio = (val >> 10) & 0x1; 1994 sc->led_mode = (val >> 6) & 0x7; 1995 sc->rx_ant = (val >> 4) & 0x3; 1996 sc->tx_ant = (val >> 2) & 0x3; 1997 sc->nb_ant = val & 0x3; 1998 1999 /* read MAC address */ 2000 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2001 2002 /* read default values for BBP registers */ 2003 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2004 2005 /* read Tx power for all b/g channels */ 2006 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2007 } 2008 2009 Static int 2010 ural_bbp_init(struct ural_softc *sc) 2011 { 2012 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2013 int i, ntries; 2014 2015 /* wait for BBP to be ready */ 2016 for (ntries = 0; ntries < 100; ntries++) { 2017 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2018 break; 2019 DELAY(1000); 2020 } 2021 if (ntries == 100) { 2022 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 2023 return EIO; 2024 } 2025 2026 /* initialize BBP registers to default values */ 2027 for (i = 0; i < N(ural_def_bbp); i++) 2028 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2029 2030 #if 0 2031 /* initialize BBP registers to values stored in EEPROM */ 2032 for (i = 0; i < 16; i++) { 2033 if (sc->bbp_prom[i].reg == 0xff) 2034 continue; 2035 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2036 } 2037 #endif 2038 2039 return 0; 2040 #undef N 2041 } 2042 2043 Static void 2044 ural_set_txantenna(struct ural_softc *sc, int antenna) 2045 { 2046 uint16_t tmp; 2047 uint8_t tx; 2048 2049 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2050 if (antenna == 1) 2051 tx |= RAL_BBP_ANTA; 2052 else if (antenna == 2) 2053 tx |= RAL_BBP_ANTB; 2054 else 2055 tx |= RAL_BBP_DIVERSITY; 2056 2057 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2058 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2059 sc->rf_rev == RAL_RF_5222) 2060 tx |= RAL_BBP_FLIPIQ; 2061 2062 ural_bbp_write(sc, RAL_BBP_TX, tx); 2063 2064 /* update values in PHY_CSR5 and PHY_CSR6 */ 2065 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2066 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2067 2068 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2069 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2070 } 2071 2072 Static void 2073 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2074 { 2075 uint8_t rx; 2076 2077 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2078 if (antenna == 1) 2079 rx |= RAL_BBP_ANTA; 2080 else if (antenna == 2) 2081 rx |= RAL_BBP_ANTB; 2082 else 2083 rx |= RAL_BBP_DIVERSITY; 2084 2085 /* need to force no I/Q flip for RF 2525e and 2526 */ 2086 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2087 rx &= ~RAL_BBP_FLIPIQ; 2088 2089 ural_bbp_write(sc, RAL_BBP_RX, rx); 2090 } 2091 2092 Static int 2093 ural_init(struct ifnet *ifp) 2094 { 2095 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2096 struct ural_softc *sc = ifp->if_softc; 2097 struct ieee80211com *ic = &sc->sc_ic; 2098 struct ieee80211_key *wk; 2099 struct ural_rx_data *data; 2100 uint16_t tmp; 2101 usbd_status error; 2102 int i, ntries; 2103 2104 ural_set_testmode(sc); 2105 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2106 2107 ural_stop(ifp, 0); 2108 2109 /* initialize MAC registers to default values */ 2110 for (i = 0; i < N(ural_def_mac); i++) 2111 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2112 2113 /* wait for BBP and RF to wake up (this can take a long time!) */ 2114 for (ntries = 0; ntries < 100; ntries++) { 2115 tmp = ural_read(sc, RAL_MAC_CSR17); 2116 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2117 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2118 break; 2119 DELAY(1000); 2120 } 2121 if (ntries == 100) { 2122 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2123 USBDEVNAME(sc->sc_dev)); 2124 error = EIO; 2125 goto fail; 2126 } 2127 2128 /* we're ready! */ 2129 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2130 2131 /* set basic rate set (will be updated later) */ 2132 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2133 2134 error = ural_bbp_init(sc); 2135 if (error != 0) 2136 goto fail; 2137 2138 /* set default BSS channel */ 2139 ural_set_chan(sc, ic->ic_curchan); 2140 2141 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2142 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2143 2144 ural_set_txantenna(sc, sc->tx_ant); 2145 ural_set_rxantenna(sc, sc->rx_ant); 2146 2147 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2148 ural_set_macaddr(sc, ic->ic_myaddr); 2149 2150 /* 2151 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2152 */ 2153 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2154 wk = &ic->ic_crypto.cs_nw_keys[i]; 2155 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2156 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2157 } 2158 2159 /* 2160 * Allocate xfer for AMRR statistics requests. 2161 */ 2162 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2163 if (sc->amrr_xfer == NULL) { 2164 printf("%s: could not allocate AMRR xfer\n", 2165 USBDEVNAME(sc->sc_dev)); 2166 goto fail; 2167 } 2168 2169 /* 2170 * Open Tx and Rx USB bulk pipes. 2171 */ 2172 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2173 &sc->sc_tx_pipeh); 2174 if (error != 0) { 2175 printf("%s: could not open Tx pipe: %s\n", 2176 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2177 goto fail; 2178 } 2179 2180 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2181 &sc->sc_rx_pipeh); 2182 if (error != 0) { 2183 printf("%s: could not open Rx pipe: %s\n", 2184 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2185 goto fail; 2186 } 2187 2188 /* 2189 * Allocate Tx and Rx xfer queues. 2190 */ 2191 error = ural_alloc_tx_list(sc); 2192 if (error != 0) { 2193 printf("%s: could not allocate Tx list\n", 2194 USBDEVNAME(sc->sc_dev)); 2195 goto fail; 2196 } 2197 2198 error = ural_alloc_rx_list(sc); 2199 if (error != 0) { 2200 printf("%s: could not allocate Rx list\n", 2201 USBDEVNAME(sc->sc_dev)); 2202 goto fail; 2203 } 2204 2205 /* 2206 * Start up the receive pipe. 2207 */ 2208 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2209 data = &sc->rx_data[i]; 2210 2211 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2212 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2213 usbd_transfer(data->xfer); 2214 } 2215 2216 /* kick Rx */ 2217 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2218 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2219 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2220 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2221 tmp |= RAL_DROP_TODS; 2222 if (!(ifp->if_flags & IFF_PROMISC)) 2223 tmp |= RAL_DROP_NOT_TO_ME; 2224 } 2225 ural_write(sc, RAL_TXRX_CSR2, tmp); 2226 2227 ifp->if_flags &= ~IFF_OACTIVE; 2228 ifp->if_flags |= IFF_RUNNING; 2229 2230 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2231 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2232 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2233 } else 2234 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2235 2236 return 0; 2237 2238 fail: ural_stop(ifp, 1); 2239 return error; 2240 #undef N 2241 } 2242 2243 Static void 2244 ural_stop(struct ifnet *ifp, int disable) 2245 { 2246 struct ural_softc *sc = ifp->if_softc; 2247 struct ieee80211com *ic = &sc->sc_ic; 2248 2249 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2250 2251 sc->sc_tx_timer = 0; 2252 ifp->if_timer = 0; 2253 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2254 2255 /* disable Rx */ 2256 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2257 2258 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2259 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2260 ural_write(sc, RAL_MAC_CSR1, 0); 2261 2262 if (sc->amrr_xfer != NULL) { 2263 usbd_free_xfer(sc->amrr_xfer); 2264 sc->amrr_xfer = NULL; 2265 } 2266 2267 if (sc->sc_rx_pipeh != NULL) { 2268 usbd_abort_pipe(sc->sc_rx_pipeh); 2269 usbd_close_pipe(sc->sc_rx_pipeh); 2270 sc->sc_rx_pipeh = NULL; 2271 } 2272 2273 if (sc->sc_tx_pipeh != NULL) { 2274 usbd_abort_pipe(sc->sc_tx_pipeh); 2275 usbd_close_pipe(sc->sc_tx_pipeh); 2276 sc->sc_tx_pipeh = NULL; 2277 } 2278 2279 ural_free_rx_list(sc); 2280 ural_free_tx_list(sc); 2281 } 2282 2283 int 2284 ural_activate(device_ptr_t self, enum devact act) 2285 { 2286 struct ural_softc *sc = (struct ural_softc *)self; 2287 2288 switch (act) { 2289 case DVACT_ACTIVATE: 2290 return EOPNOTSUPP; 2291 break; 2292 2293 case DVACT_DEACTIVATE: 2294 if_deactivate(&sc->sc_if); 2295 break; 2296 } 2297 2298 return 0; 2299 } 2300 2301 Static void 2302 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2303 { 2304 int i; 2305 2306 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2307 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2308 2309 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2310 2311 /* set rate to some reasonable initial value */ 2312 for (i = ni->ni_rates.rs_nrates - 1; 2313 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2314 i--); 2315 ni->ni_txrate = i; 2316 2317 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2318 } 2319 2320 Static void 2321 ural_amrr_timeout(void *arg) 2322 { 2323 struct ural_softc *sc = (struct ural_softc *)arg; 2324 usb_device_request_t req; 2325 int s; 2326 2327 s = splusb(); 2328 2329 /* 2330 * Asynchronously read statistic registers (cleared by read). 2331 */ 2332 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2333 req.bRequest = RAL_READ_MULTI_MAC; 2334 USETW(req.wValue, 0); 2335 USETW(req.wIndex, RAL_STA_CSR0); 2336 USETW(req.wLength, sizeof sc->sta); 2337 2338 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2339 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2340 ural_amrr_update); 2341 (void)usbd_transfer(sc->amrr_xfer); 2342 2343 splx(s); 2344 } 2345 2346 Static void 2347 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2348 usbd_status status) 2349 { 2350 struct ural_softc *sc = (struct ural_softc *)priv; 2351 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2352 2353 if (status != USBD_NORMAL_COMPLETION) { 2354 printf("%s: could not retrieve Tx statistics - " 2355 "cancelling automatic rate control\n", 2356 USBDEVNAME(sc->sc_dev)); 2357 return; 2358 } 2359 2360 /* count TX retry-fail as Tx errors */ 2361 ifp->if_oerrors += sc->sta[9]; 2362 2363 sc->amn.amn_retrycnt = 2364 sc->sta[7] + /* TX one-retry ok count */ 2365 sc->sta[8] + /* TX more-retry ok count */ 2366 sc->sta[9]; /* TX retry-fail count */ 2367 2368 sc->amn.amn_txcnt = 2369 sc->amn.amn_retrycnt + 2370 sc->sta[6]; /* TX no-retry ok count */ 2371 2372 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2373 2374 callout_reset(&sc->amrr_ch, hz, ural_amrr_timeout, sc); 2375 } 2376
Indexes created Fri Oct 03 02:09:57 GMT 2025