if_ural.c revision 1.22
1 /* $NetBSD: if_ural.c,v 1.22 2007/06/09 12:13:12 kiyohara Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.22 2007/06/09 12:13:12 kiyohara Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 71 #include <dev/usb/if_uralreg.h> 72 #include <dev/usb/if_uralvar.h> 73 74 #ifdef USB_DEBUG 75 #define URAL_DEBUG 76 #endif 77 78 #ifdef URAL_DEBUG 79 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 81 int ural_debug = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n, x) 85 #endif 86 87 /* various supported device vendors/products */ 88 static const struct usb_devno ural_devs[] = { 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 95 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 96 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 97 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 98 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 101 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 102 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 104 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 105 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 106 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 107 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 108 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 109 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 110 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 111 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 112 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 113 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 114 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 115 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 116 }; 117 118 Static int ural_alloc_tx_list(struct ural_softc *); 119 Static void ural_free_tx_list(struct ural_softc *); 120 Static int ural_alloc_rx_list(struct ural_softc *); 121 Static void ural_free_rx_list(struct ural_softc *); 122 Static int ural_media_change(struct ifnet *); 123 Static void ural_next_scan(void *); 124 Static void ural_task(void *); 125 Static int ural_newstate(struct ieee80211com *, 126 enum ieee80211_state, int); 127 Static int ural_rxrate(struct ural_rx_desc *); 128 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 129 usbd_status); 130 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 131 usbd_status); 132 Static int ural_ack_rate(struct ieee80211com *, int); 133 Static uint16_t ural_txtime(int, int, uint32_t); 134 Static uint8_t ural_plcp_signal(int); 135 Static void ural_setup_tx_desc(struct ural_softc *, 136 struct ural_tx_desc *, uint32_t, int, int); 137 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 138 struct ieee80211_node *); 139 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 140 struct ieee80211_node *); 141 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 142 struct ieee80211_node *); 143 Static void ural_start(struct ifnet *); 144 Static void ural_watchdog(struct ifnet *); 145 Static int ural_reset(struct ifnet *); 146 Static int ural_ioctl(struct ifnet *, u_long, void *); 147 Static void ural_set_testmode(struct ural_softc *); 148 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 149 int); 150 Static uint16_t ural_read(struct ural_softc *, uint16_t); 151 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 152 int); 153 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 154 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 155 int); 156 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 157 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 158 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 159 Static void ural_set_chan(struct ural_softc *, 160 struct ieee80211_channel *); 161 Static void ural_disable_rf_tune(struct ural_softc *); 162 Static void ural_enable_tsf_sync(struct ural_softc *); 163 Static void ural_update_slot(struct ifnet *); 164 Static void ural_set_txpreamble(struct ural_softc *); 165 Static void ural_set_basicrates(struct ural_softc *); 166 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 167 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 168 Static void ural_update_promisc(struct ural_softc *); 169 Static const char *ural_get_rf(int); 170 Static void ural_read_eeprom(struct ural_softc *); 171 Static int ural_bbp_init(struct ural_softc *); 172 Static void ural_set_txantenna(struct ural_softc *, int); 173 Static void ural_set_rxantenna(struct ural_softc *, int); 174 Static int ural_init(struct ifnet *); 175 Static void ural_stop(struct ifnet *, int); 176 Static void ural_amrr_start(struct ural_softc *, 177 struct ieee80211_node *); 178 Static void ural_amrr_timeout(void *); 179 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 180 usbd_status status); 181 182 /* 183 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 184 */ 185 static const struct ieee80211_rateset ural_rateset_11a = 186 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 187 188 static const struct ieee80211_rateset ural_rateset_11b = 189 { 4, { 2, 4, 11, 22 } }; 190 191 static const struct ieee80211_rateset ural_rateset_11g = 192 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 193 194 /* 195 * Default values for MAC registers; values taken from the reference driver. 196 */ 197 static const struct { 198 uint16_t reg; 199 uint16_t val; 200 } ural_def_mac[] = { 201 { RAL_TXRX_CSR5, 0x8c8d }, 202 { RAL_TXRX_CSR6, 0x8b8a }, 203 { RAL_TXRX_CSR7, 0x8687 }, 204 { RAL_TXRX_CSR8, 0x0085 }, 205 { RAL_MAC_CSR13, 0x1111 }, 206 { RAL_MAC_CSR14, 0x1e11 }, 207 { RAL_TXRX_CSR21, 0xe78f }, 208 { RAL_MAC_CSR9, 0xff1d }, 209 { RAL_MAC_CSR11, 0x0002 }, 210 { RAL_MAC_CSR22, 0x0053 }, 211 { RAL_MAC_CSR15, 0x0000 }, 212 { RAL_MAC_CSR8, 0x0780 }, 213 { RAL_TXRX_CSR19, 0x0000 }, 214 { RAL_TXRX_CSR18, 0x005a }, 215 { RAL_PHY_CSR2, 0x0000 }, 216 { RAL_TXRX_CSR0, 0x1ec0 }, 217 { RAL_PHY_CSR4, 0x000f } 218 }; 219 220 /* 221 * Default values for BBP registers; values taken from the reference driver. 222 */ 223 static const struct { 224 uint8_t reg; 225 uint8_t val; 226 } ural_def_bbp[] = { 227 { 3, 0x02 }, 228 { 4, 0x19 }, 229 { 14, 0x1c }, 230 { 15, 0x30 }, 231 { 16, 0xac }, 232 { 17, 0x48 }, 233 { 18, 0x18 }, 234 { 19, 0xff }, 235 { 20, 0x1e }, 236 { 21, 0x08 }, 237 { 22, 0x08 }, 238 { 23, 0x08 }, 239 { 24, 0x80 }, 240 { 25, 0x50 }, 241 { 26, 0x08 }, 242 { 27, 0x23 }, 243 { 30, 0x10 }, 244 { 31, 0x2b }, 245 { 32, 0xb9 }, 246 { 34, 0x12 }, 247 { 35, 0x50 }, 248 { 39, 0xc4 }, 249 { 40, 0x02 }, 250 { 41, 0x60 }, 251 { 53, 0x10 }, 252 { 54, 0x18 }, 253 { 56, 0x08 }, 254 { 57, 0x10 }, 255 { 58, 0x08 }, 256 { 61, 0x60 }, 257 { 62, 0x10 }, 258 { 75, 0xff } 259 }; 260 261 /* 262 * Default values for RF register R2 indexed by channel numbers. 263 */ 264 static const uint32_t ural_rf2522_r2[] = { 265 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 266 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 267 }; 268 269 static const uint32_t ural_rf2523_r2[] = { 270 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 271 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 272 }; 273 274 static const uint32_t ural_rf2524_r2[] = { 275 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 276 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 277 }; 278 279 static const uint32_t ural_rf2525_r2[] = { 280 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 281 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 282 }; 283 284 static const uint32_t ural_rf2525_hi_r2[] = { 285 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 286 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 287 }; 288 289 static const uint32_t ural_rf2525e_r2[] = { 290 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 291 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 292 }; 293 294 static const uint32_t ural_rf2526_hi_r2[] = { 295 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 296 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 297 }; 298 299 static const uint32_t ural_rf2526_r2[] = { 300 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 301 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 302 }; 303 304 /* 305 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 306 * values taken from the reference driver. 307 */ 308 static const struct { 309 uint8_t chan; 310 uint32_t r1; 311 uint32_t r2; 312 uint32_t r4; 313 } ural_rf5222[] = { 314 { 1, 0x08808, 0x0044d, 0x00282 }, 315 { 2, 0x08808, 0x0044e, 0x00282 }, 316 { 3, 0x08808, 0x0044f, 0x00282 }, 317 { 4, 0x08808, 0x00460, 0x00282 }, 318 { 5, 0x08808, 0x00461, 0x00282 }, 319 { 6, 0x08808, 0x00462, 0x00282 }, 320 { 7, 0x08808, 0x00463, 0x00282 }, 321 { 8, 0x08808, 0x00464, 0x00282 }, 322 { 9, 0x08808, 0x00465, 0x00282 }, 323 { 10, 0x08808, 0x00466, 0x00282 }, 324 { 11, 0x08808, 0x00467, 0x00282 }, 325 { 12, 0x08808, 0x00468, 0x00282 }, 326 { 13, 0x08808, 0x00469, 0x00282 }, 327 { 14, 0x08808, 0x0046b, 0x00286 }, 328 329 { 36, 0x08804, 0x06225, 0x00287 }, 330 { 40, 0x08804, 0x06226, 0x00287 }, 331 { 44, 0x08804, 0x06227, 0x00287 }, 332 { 48, 0x08804, 0x06228, 0x00287 }, 333 { 52, 0x08804, 0x06229, 0x00287 }, 334 { 56, 0x08804, 0x0622a, 0x00287 }, 335 { 60, 0x08804, 0x0622b, 0x00287 }, 336 { 64, 0x08804, 0x0622c, 0x00287 }, 337 338 { 100, 0x08804, 0x02200, 0x00283 }, 339 { 104, 0x08804, 0x02201, 0x00283 }, 340 { 108, 0x08804, 0x02202, 0x00283 }, 341 { 112, 0x08804, 0x02203, 0x00283 }, 342 { 116, 0x08804, 0x02204, 0x00283 }, 343 { 120, 0x08804, 0x02205, 0x00283 }, 344 { 124, 0x08804, 0x02206, 0x00283 }, 345 { 128, 0x08804, 0x02207, 0x00283 }, 346 { 132, 0x08804, 0x02208, 0x00283 }, 347 { 136, 0x08804, 0x02209, 0x00283 }, 348 { 140, 0x08804, 0x0220a, 0x00283 }, 349 350 { 149, 0x08808, 0x02429, 0x00281 }, 351 { 153, 0x08808, 0x0242b, 0x00281 }, 352 { 157, 0x08808, 0x0242d, 0x00281 }, 353 { 161, 0x08808, 0x0242f, 0x00281 } 354 }; 355 356 USB_DECLARE_DRIVER(ural); 357 358 USB_MATCH(ural) 359 { 360 USB_MATCH_START(ural, uaa); 361 362 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 363 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 364 } 365 366 USB_ATTACH(ural) 367 { 368 USB_ATTACH_START(ural, sc, uaa); 369 struct ieee80211com *ic = &sc->sc_ic; 370 struct ifnet *ifp = &sc->sc_if; 371 usb_interface_descriptor_t *id; 372 usb_endpoint_descriptor_t *ed; 373 usbd_status error; 374 char *devinfop; 375 int i; 376 377 sc->sc_udev = uaa->device; 378 379 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 380 USB_ATTACH_SETUP; 381 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 382 usbd_devinfo_free(devinfop); 383 384 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 385 printf("%s: could not set configuration no\n", 386 USBDEVNAME(sc->sc_dev)); 387 USB_ATTACH_ERROR_RETURN; 388 } 389 390 /* get the first interface handle */ 391 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 392 &sc->sc_iface); 393 if (error != 0) { 394 printf("%s: could not get interface handle\n", 395 USBDEVNAME(sc->sc_dev)); 396 USB_ATTACH_ERROR_RETURN; 397 } 398 399 /* 400 * Find endpoints. 401 */ 402 id = usbd_get_interface_descriptor(sc->sc_iface); 403 404 sc->sc_rx_no = sc->sc_tx_no = -1; 405 for (i = 0; i < id->bNumEndpoints; i++) { 406 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 407 if (ed == NULL) { 408 printf("%s: no endpoint descriptor for %d\n", 409 USBDEVNAME(sc->sc_dev), i); 410 USB_ATTACH_ERROR_RETURN; 411 } 412 413 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 414 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 415 sc->sc_rx_no = ed->bEndpointAddress; 416 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 417 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 418 sc->sc_tx_no = ed->bEndpointAddress; 419 } 420 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 421 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 422 USB_ATTACH_ERROR_RETURN; 423 } 424 425 usb_init_task(&sc->sc_task, ural_task, sc); 426 usb_callout_init(sc->sc_scan_ch); 427 sc->amrr.amrr_min_success_threshold = 1; 428 sc->amrr.amrr_min_success_threshold = 15; 429 usb_callout_init(sc->sc_amrr_ch); 430 431 /* retrieve RT2570 rev. no */ 432 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 433 434 /* retrieve MAC address and various other things from EEPROM */ 435 ural_read_eeprom(sc); 436 437 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 438 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 439 440 ifp->if_softc = sc; 441 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 442 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 443 ifp->if_init = ural_init; 444 ifp->if_ioctl = ural_ioctl; 445 ifp->if_start = ural_start; 446 ifp->if_watchdog = ural_watchdog; 447 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 448 IFQ_SET_READY(&ifp->if_snd); 449 450 ic->ic_ifp = ifp; 451 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 452 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 453 ic->ic_state = IEEE80211_S_INIT; 454 455 /* set device capabilities */ 456 ic->ic_caps = 457 IEEE80211_C_IBSS | /* IBSS mode supported */ 458 IEEE80211_C_MONITOR | /* monitor mode supported */ 459 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 460 IEEE80211_C_TXPMGT | /* tx power management */ 461 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 462 IEEE80211_C_SHSLOT | /* short slot time supported */ 463 IEEE80211_C_WPA; /* 802.11i */ 464 465 if (sc->rf_rev == RAL_RF_5222) { 466 /* set supported .11a rates */ 467 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 468 469 /* set supported .11a channels */ 470 for (i = 36; i <= 64; i += 4) { 471 ic->ic_channels[i].ic_freq = 472 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 473 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 474 } 475 for (i = 100; i <= 140; i += 4) { 476 ic->ic_channels[i].ic_freq = 477 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 478 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 479 } 480 for (i = 149; i <= 161; i += 4) { 481 ic->ic_channels[i].ic_freq = 482 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 483 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 484 } 485 } 486 487 /* set supported .11b and .11g rates */ 488 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 489 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 490 491 /* set supported .11b and .11g channels (1 through 14) */ 492 for (i = 1; i <= 14; i++) { 493 ic->ic_channels[i].ic_freq = 494 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 495 ic->ic_channels[i].ic_flags = 496 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 497 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 498 } 499 500 if_attach(ifp); 501 ieee80211_ifattach(ic); 502 ic->ic_reset = ural_reset; 503 504 /* override state transition machine */ 505 sc->sc_newstate = ic->ic_newstate; 506 ic->ic_newstate = ural_newstate; 507 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 508 509 #if NBPFILTER > 0 510 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 511 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 512 513 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 514 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 515 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 516 517 sc->sc_txtap_len = sizeof sc->sc_txtapu; 518 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 519 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 520 #endif 521 522 ieee80211_announce(ic); 523 524 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 525 USBDEV(sc->sc_dev)); 526 527 USB_ATTACH_SUCCESS_RETURN; 528 } 529 530 USB_DETACH(ural) 531 { 532 USB_DETACH_START(ural, sc); 533 struct ieee80211com *ic = &sc->sc_ic; 534 struct ifnet *ifp = &sc->sc_if; 535 int s; 536 537 s = splusb(); 538 539 ural_stop(ifp, 1); 540 usb_rem_task(sc->sc_udev, &sc->sc_task); 541 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc); 542 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc); 543 544 if (sc->amrr_xfer != NULL) { 545 usbd_free_xfer(sc->amrr_xfer); 546 sc->amrr_xfer = NULL; 547 } 548 549 if (sc->sc_rx_pipeh != NULL) { 550 usbd_abort_pipe(sc->sc_rx_pipeh); 551 usbd_close_pipe(sc->sc_rx_pipeh); 552 } 553 554 if (sc->sc_tx_pipeh != NULL) { 555 usbd_abort_pipe(sc->sc_tx_pipeh); 556 usbd_close_pipe(sc->sc_tx_pipeh); 557 } 558 559 ural_free_rx_list(sc); 560 ural_free_tx_list(sc); 561 562 #if NBPFILTER > 0 563 bpfdetach(ifp); 564 #endif 565 ieee80211_ifdetach(ic); 566 if_detach(ifp); 567 568 splx(s); 569 570 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 571 USBDEV(sc->sc_dev)); 572 573 return 0; 574 } 575 576 Static int 577 ural_alloc_tx_list(struct ural_softc *sc) 578 { 579 struct ural_tx_data *data; 580 int i, error; 581 582 sc->tx_queued = 0; 583 584 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 585 data = &sc->tx_data[i]; 586 587 data->sc = sc; 588 589 data->xfer = usbd_alloc_xfer(sc->sc_udev); 590 if (data->xfer == NULL) { 591 printf("%s: could not allocate tx xfer\n", 592 USBDEVNAME(sc->sc_dev)); 593 error = ENOMEM; 594 goto fail; 595 } 596 597 data->buf = usbd_alloc_buffer(data->xfer, 598 RAL_TX_DESC_SIZE + MCLBYTES); 599 if (data->buf == NULL) { 600 printf("%s: could not allocate tx buffer\n", 601 USBDEVNAME(sc->sc_dev)); 602 error = ENOMEM; 603 goto fail; 604 } 605 } 606 607 return 0; 608 609 fail: ural_free_tx_list(sc); 610 return error; 611 } 612 613 Static void 614 ural_free_tx_list(struct ural_softc *sc) 615 { 616 struct ural_tx_data *data; 617 int i; 618 619 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 620 data = &sc->tx_data[i]; 621 622 if (data->xfer != NULL) { 623 usbd_free_xfer(data->xfer); 624 data->xfer = NULL; 625 } 626 627 if (data->ni != NULL) { 628 ieee80211_free_node(data->ni); 629 data->ni = NULL; 630 } 631 } 632 } 633 634 Static int 635 ural_alloc_rx_list(struct ural_softc *sc) 636 { 637 struct ural_rx_data *data; 638 int i, error; 639 640 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 641 data = &sc->rx_data[i]; 642 643 data->sc = sc; 644 645 data->xfer = usbd_alloc_xfer(sc->sc_udev); 646 if (data->xfer == NULL) { 647 printf("%s: could not allocate rx xfer\n", 648 USBDEVNAME(sc->sc_dev)); 649 error = ENOMEM; 650 goto fail; 651 } 652 653 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 654 printf("%s: could not allocate rx buffer\n", 655 USBDEVNAME(sc->sc_dev)); 656 error = ENOMEM; 657 goto fail; 658 } 659 660 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 661 if (data->m == NULL) { 662 printf("%s: could not allocate rx mbuf\n", 663 USBDEVNAME(sc->sc_dev)); 664 error = ENOMEM; 665 goto fail; 666 } 667 668 MCLGET(data->m, M_DONTWAIT); 669 if (!(data->m->m_flags & M_EXT)) { 670 printf("%s: could not allocate rx mbuf cluster\n", 671 USBDEVNAME(sc->sc_dev)); 672 error = ENOMEM; 673 goto fail; 674 } 675 676 data->buf = mtod(data->m, uint8_t *); 677 } 678 679 return 0; 680 681 fail: ural_free_tx_list(sc); 682 return error; 683 } 684 685 Static void 686 ural_free_rx_list(struct ural_softc *sc) 687 { 688 struct ural_rx_data *data; 689 int i; 690 691 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 692 data = &sc->rx_data[i]; 693 694 if (data->xfer != NULL) { 695 usbd_free_xfer(data->xfer); 696 data->xfer = NULL; 697 } 698 699 if (data->m != NULL) { 700 m_freem(data->m); 701 data->m = NULL; 702 } 703 } 704 } 705 706 Static int 707 ural_media_change(struct ifnet *ifp) 708 { 709 int error; 710 711 error = ieee80211_media_change(ifp); 712 if (error != ENETRESET) 713 return error; 714 715 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 716 ural_init(ifp); 717 718 return 0; 719 } 720 721 /* 722 * This function is called periodically (every 200ms) during scanning to 723 * switch from one channel to another. 724 */ 725 Static void 726 ural_next_scan(void *arg) 727 { 728 struct ural_softc *sc = arg; 729 struct ieee80211com *ic = &sc->sc_ic; 730 731 if (ic->ic_state == IEEE80211_S_SCAN) 732 ieee80211_next_scan(ic); 733 } 734 735 Static void 736 ural_task(void *arg) 737 { 738 struct ural_softc *sc = arg; 739 struct ieee80211com *ic = &sc->sc_ic; 740 enum ieee80211_state ostate; 741 struct ieee80211_node *ni; 742 struct mbuf *m; 743 744 ostate = ic->ic_state; 745 746 switch (sc->sc_state) { 747 case IEEE80211_S_INIT: 748 if (ostate == IEEE80211_S_RUN) { 749 /* abort TSF synchronization */ 750 ural_write(sc, RAL_TXRX_CSR19, 0); 751 752 /* force tx led to stop blinking */ 753 ural_write(sc, RAL_MAC_CSR20, 0); 754 } 755 break; 756 757 case IEEE80211_S_SCAN: 758 ural_set_chan(sc, ic->ic_curchan); 759 usb_callout(sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 760 break; 761 762 case IEEE80211_S_AUTH: 763 ural_set_chan(sc, ic->ic_curchan); 764 break; 765 766 case IEEE80211_S_ASSOC: 767 ural_set_chan(sc, ic->ic_curchan); 768 break; 769 770 case IEEE80211_S_RUN: 771 ural_set_chan(sc, ic->ic_curchan); 772 773 ni = ic->ic_bss; 774 775 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 776 ural_update_slot(ic->ic_ifp); 777 ural_set_txpreamble(sc); 778 ural_set_basicrates(sc); 779 ural_set_bssid(sc, ni->ni_bssid); 780 } 781 782 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 783 ic->ic_opmode == IEEE80211_M_IBSS) { 784 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 785 if (m == NULL) { 786 printf("%s: could not allocate beacon\n", 787 USBDEVNAME(sc->sc_dev)); 788 return; 789 } 790 791 if (ural_tx_bcn(sc, m, ni) != 0) { 792 m_freem(m); 793 printf("%s: could not send beacon\n", 794 USBDEVNAME(sc->sc_dev)); 795 return; 796 } 797 798 /* beacon is no longer needed */ 799 m_freem(m); 800 } 801 802 /* make tx led blink on tx (controlled by ASIC) */ 803 ural_write(sc, RAL_MAC_CSR20, 1); 804 805 if (ic->ic_opmode != IEEE80211_M_MONITOR) 806 ural_enable_tsf_sync(sc); 807 808 /* enable automatic rate adaptation in STA mode */ 809 if (ic->ic_opmode == IEEE80211_M_STA && 810 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 811 ural_amrr_start(sc, ni); 812 813 break; 814 } 815 816 sc->sc_newstate(ic, sc->sc_state, -1); 817 } 818 819 Static int 820 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 821 int arg) 822 { 823 struct ural_softc *sc = ic->ic_ifp->if_softc; 824 825 usb_rem_task(sc->sc_udev, &sc->sc_task); 826 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc); 827 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc); 828 829 /* do it in a process context */ 830 sc->sc_state = nstate; 831 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 832 833 return 0; 834 } 835 836 /* quickly determine if a given rate is CCK or OFDM */ 837 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 838 839 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 840 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 841 842 #define RAL_SIFS 10 /* us */ 843 844 #define RAL_RXTX_TURNAROUND 5 /* us */ 845 846 /* 847 * This function is only used by the Rx radiotap code. 848 */ 849 Static int 850 ural_rxrate(struct ural_rx_desc *desc) 851 { 852 if (le32toh(desc->flags) & RAL_RX_OFDM) { 853 /* reverse function of ural_plcp_signal */ 854 switch (desc->rate) { 855 case 0xb: return 12; 856 case 0xf: return 18; 857 case 0xa: return 24; 858 case 0xe: return 36; 859 case 0x9: return 48; 860 case 0xd: return 72; 861 case 0x8: return 96; 862 case 0xc: return 108; 863 } 864 } else { 865 if (desc->rate == 10) 866 return 2; 867 if (desc->rate == 20) 868 return 4; 869 if (desc->rate == 55) 870 return 11; 871 if (desc->rate == 110) 872 return 22; 873 } 874 return 2; /* should not get there */ 875 } 876 877 Static void 878 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 879 usbd_status status) 880 { 881 struct ural_tx_data *data = priv; 882 struct ural_softc *sc = data->sc; 883 struct ifnet *ifp = &sc->sc_if; 884 int s; 885 886 if (status != USBD_NORMAL_COMPLETION) { 887 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 888 return; 889 890 printf("%s: could not transmit buffer: %s\n", 891 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 892 893 if (status == USBD_STALLED) 894 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 895 896 ifp->if_oerrors++; 897 return; 898 } 899 900 s = splnet(); 901 902 m_freem(data->m); 903 data->m = NULL; 904 ieee80211_free_node(data->ni); 905 data->ni = NULL; 906 907 sc->tx_queued--; 908 ifp->if_opackets++; 909 910 DPRINTFN(10, ("tx done\n")); 911 912 sc->sc_tx_timer = 0; 913 ifp->if_flags &= ~IFF_OACTIVE; 914 ural_start(ifp); 915 916 splx(s); 917 } 918 919 Static void 920 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 921 { 922 struct ural_rx_data *data = priv; 923 struct ural_softc *sc = data->sc; 924 struct ieee80211com *ic = &sc->sc_ic; 925 struct ifnet *ifp = &sc->sc_if; 926 struct ural_rx_desc *desc; 927 struct ieee80211_frame *wh; 928 struct ieee80211_node *ni; 929 struct mbuf *mnew, *m; 930 int s, len; 931 932 if (status != USBD_NORMAL_COMPLETION) { 933 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 934 return; 935 936 if (status == USBD_STALLED) 937 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 938 goto skip; 939 } 940 941 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 942 943 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 944 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 945 len)); 946 ifp->if_ierrors++; 947 goto skip; 948 } 949 950 /* rx descriptor is located at the end */ 951 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 952 953 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 954 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 955 /* 956 * This should not happen since we did not request to receive 957 * those frames when we filled RAL_TXRX_CSR2. 958 */ 959 DPRINTFN(5, ("PHY or CRC error\n")); 960 ifp->if_ierrors++; 961 goto skip; 962 } 963 964 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 965 if (mnew == NULL) { 966 ifp->if_ierrors++; 967 goto skip; 968 } 969 970 MCLGET(mnew, M_DONTWAIT); 971 if (!(mnew->m_flags & M_EXT)) { 972 ifp->if_ierrors++; 973 m_freem(mnew); 974 goto skip; 975 } 976 977 m = data->m; 978 data->m = mnew; 979 data->buf = mtod(data->m, uint8_t *); 980 981 /* finalize mbuf */ 982 m->m_pkthdr.rcvif = ifp; 983 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 984 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 985 986 s = splnet(); 987 988 #if NBPFILTER > 0 989 if (sc->sc_drvbpf != NULL) { 990 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 991 992 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 993 tap->wr_rate = ural_rxrate(desc); 994 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 995 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 996 tap->wr_antenna = sc->rx_ant; 997 tap->wr_antsignal = desc->rssi; 998 999 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1000 } 1001 #endif 1002 1003 wh = mtod(m, struct ieee80211_frame *); 1004 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1005 1006 /* send the frame to the 802.11 layer */ 1007 ieee80211_input(ic, m, ni, desc->rssi, 0); 1008 1009 /* node is no longer needed */ 1010 ieee80211_free_node(ni); 1011 1012 splx(s); 1013 1014 DPRINTFN(15, ("rx done\n")); 1015 1016 skip: /* setup a new transfer */ 1017 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1018 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1019 usbd_transfer(xfer); 1020 } 1021 1022 /* 1023 * Return the expected ack rate for a frame transmitted at rate `rate'. 1024 * XXX: this should depend on the destination node basic rate set. 1025 */ 1026 Static int 1027 ural_ack_rate(struct ieee80211com *ic, int rate) 1028 { 1029 switch (rate) { 1030 /* CCK rates */ 1031 case 2: 1032 return 2; 1033 case 4: 1034 case 11: 1035 case 22: 1036 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1037 1038 /* OFDM rates */ 1039 case 12: 1040 case 18: 1041 return 12; 1042 case 24: 1043 case 36: 1044 return 24; 1045 case 48: 1046 case 72: 1047 case 96: 1048 case 108: 1049 return 48; 1050 } 1051 1052 /* default to 1Mbps */ 1053 return 2; 1054 } 1055 1056 /* 1057 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1058 * The function automatically determines the operating mode depending on the 1059 * given rate. `flags' indicates whether short preamble is in use or not. 1060 */ 1061 Static uint16_t 1062 ural_txtime(int len, int rate, uint32_t flags) 1063 { 1064 uint16_t txtime; 1065 1066 if (RAL_RATE_IS_OFDM(rate)) { 1067 /* IEEE Std 802.11g-2003, pp. 37 */ 1068 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1069 txtime = 16 + 4 + 4 * txtime + 6; 1070 } else { 1071 /* IEEE Std 802.11b-1999, pp. 28 */ 1072 txtime = (16 * len + rate - 1) / rate; 1073 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1074 txtime += 72 + 24; 1075 else 1076 txtime += 144 + 48; 1077 } 1078 return txtime; 1079 } 1080 1081 Static uint8_t 1082 ural_plcp_signal(int rate) 1083 { 1084 switch (rate) { 1085 /* CCK rates (returned values are device-dependent) */ 1086 case 2: return 0x0; 1087 case 4: return 0x1; 1088 case 11: return 0x2; 1089 case 22: return 0x3; 1090 1091 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1092 case 12: return 0xb; 1093 case 18: return 0xf; 1094 case 24: return 0xa; 1095 case 36: return 0xe; 1096 case 48: return 0x9; 1097 case 72: return 0xd; 1098 case 96: return 0x8; 1099 case 108: return 0xc; 1100 1101 /* unsupported rates (should not get there) */ 1102 default: return 0xff; 1103 } 1104 } 1105 1106 Static void 1107 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1108 uint32_t flags, int len, int rate) 1109 { 1110 struct ieee80211com *ic = &sc->sc_ic; 1111 uint16_t plcp_length; 1112 int remainder; 1113 1114 desc->flags = htole32(flags); 1115 desc->flags |= htole32(RAL_TX_NEWSEQ); 1116 desc->flags |= htole32(len << 16); 1117 1118 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1119 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1120 1121 /* setup PLCP fields */ 1122 desc->plcp_signal = ural_plcp_signal(rate); 1123 desc->plcp_service = 4; 1124 1125 len += IEEE80211_CRC_LEN; 1126 if (RAL_RATE_IS_OFDM(rate)) { 1127 desc->flags |= htole32(RAL_TX_OFDM); 1128 1129 plcp_length = len & 0xfff; 1130 desc->plcp_length_hi = plcp_length >> 6; 1131 desc->plcp_length_lo = plcp_length & 0x3f; 1132 } else { 1133 plcp_length = (16 * len + rate - 1) / rate; 1134 if (rate == 22) { 1135 remainder = (16 * len) % 22; 1136 if (remainder != 0 && remainder < 7) 1137 desc->plcp_service |= RAL_PLCP_LENGEXT; 1138 } 1139 desc->plcp_length_hi = plcp_length >> 8; 1140 desc->plcp_length_lo = plcp_length & 0xff; 1141 1142 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1143 desc->plcp_signal |= 0x08; 1144 } 1145 1146 desc->iv = 0; 1147 desc->eiv = 0; 1148 } 1149 1150 #define RAL_TX_TIMEOUT 5000 1151 1152 Static int 1153 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1154 { 1155 struct ural_tx_desc *desc; 1156 usbd_xfer_handle xfer; 1157 uint8_t cmd = 0; 1158 usbd_status error; 1159 uint8_t *buf; 1160 int xferlen, rate; 1161 1162 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1163 1164 xfer = usbd_alloc_xfer(sc->sc_udev); 1165 if (xfer == NULL) 1166 return ENOMEM; 1167 1168 /* xfer length needs to be a multiple of two! */ 1169 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1170 1171 buf = usbd_alloc_buffer(xfer, xferlen); 1172 if (buf == NULL) { 1173 usbd_free_xfer(xfer); 1174 return ENOMEM; 1175 } 1176 1177 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1178 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1179 1180 error = usbd_sync_transfer(xfer); 1181 if (error != 0) { 1182 usbd_free_xfer(xfer); 1183 return error; 1184 } 1185 1186 desc = (struct ural_tx_desc *)buf; 1187 1188 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1189 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1190 m0->m_pkthdr.len, rate); 1191 1192 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1193 m0->m_pkthdr.len, rate, xferlen)); 1194 1195 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1196 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1197 1198 error = usbd_sync_transfer(xfer); 1199 usbd_free_xfer(xfer); 1200 1201 return error; 1202 } 1203 1204 Static int 1205 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1206 { 1207 struct ieee80211com *ic = &sc->sc_ic; 1208 struct ural_tx_desc *desc; 1209 struct ural_tx_data *data; 1210 struct ieee80211_frame *wh; 1211 uint32_t flags = 0; 1212 uint16_t dur; 1213 usbd_status error; 1214 int xferlen, rate; 1215 1216 data = &sc->tx_data[0]; 1217 desc = (struct ural_tx_desc *)data->buf; 1218 1219 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1220 1221 data->m = m0; 1222 data->ni = ni; 1223 1224 wh = mtod(m0, struct ieee80211_frame *); 1225 1226 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1227 flags |= RAL_TX_ACK; 1228 1229 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1230 *(uint16_t *)wh->i_dur = htole16(dur); 1231 1232 /* tell hardware to add timestamp for probe responses */ 1233 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1234 IEEE80211_FC0_TYPE_MGT && 1235 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1236 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1237 flags |= RAL_TX_TIMESTAMP; 1238 } 1239 1240 #if NBPFILTER > 0 1241 if (sc->sc_drvbpf != NULL) { 1242 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1243 1244 tap->wt_flags = 0; 1245 tap->wt_rate = rate; 1246 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1247 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1248 tap->wt_antenna = sc->tx_ant; 1249 1250 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1251 } 1252 #endif 1253 1254 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1255 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1256 1257 /* align end on a 2-bytes boundary */ 1258 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1259 1260 /* 1261 * No space left in the last URB to store the extra 2 bytes, force 1262 * sending of another URB. 1263 */ 1264 if ((xferlen % 64) == 0) 1265 xferlen += 2; 1266 1267 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1268 m0->m_pkthdr.len, rate, xferlen)); 1269 1270 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1271 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1272 ural_txeof); 1273 1274 error = usbd_transfer(data->xfer); 1275 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1276 m_freem(m0); 1277 return error; 1278 } 1279 1280 sc->tx_queued++; 1281 1282 return 0; 1283 } 1284 1285 Static int 1286 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1287 { 1288 struct ieee80211com *ic = &sc->sc_ic; 1289 struct ural_tx_desc *desc; 1290 struct ural_tx_data *data; 1291 struct ieee80211_frame *wh; 1292 struct ieee80211_key *k; 1293 uint32_t flags = 0; 1294 uint16_t dur; 1295 usbd_status error; 1296 int xferlen, rate; 1297 1298 wh = mtod(m0, struct ieee80211_frame *); 1299 1300 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1301 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1302 else 1303 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1304 1305 rate &= IEEE80211_RATE_VAL; 1306 1307 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1308 k = ieee80211_crypto_encap(ic, ni, m0); 1309 if (k == NULL) { 1310 m_freem(m0); 1311 return ENOBUFS; 1312 } 1313 1314 /* packet header may have moved, reset our local pointer */ 1315 wh = mtod(m0, struct ieee80211_frame *); 1316 } 1317 1318 data = &sc->tx_data[0]; 1319 desc = (struct ural_tx_desc *)data->buf; 1320 1321 data->m = m0; 1322 data->ni = ni; 1323 1324 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1325 flags |= RAL_TX_ACK; 1326 flags |= RAL_TX_RETRY(7); 1327 1328 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1329 ic->ic_flags) + RAL_SIFS; 1330 *(uint16_t *)wh->i_dur = htole16(dur); 1331 } 1332 1333 #if NBPFILTER > 0 1334 if (sc->sc_drvbpf != NULL) { 1335 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1336 1337 tap->wt_flags = 0; 1338 tap->wt_rate = rate; 1339 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1340 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1341 tap->wt_antenna = sc->tx_ant; 1342 1343 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1344 } 1345 #endif 1346 1347 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1348 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1349 1350 /* align end on a 2-bytes boundary */ 1351 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1352 1353 /* 1354 * No space left in the last URB to store the extra 2 bytes, force 1355 * sending of another URB. 1356 */ 1357 if ((xferlen % 64) == 0) 1358 xferlen += 2; 1359 1360 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1361 m0->m_pkthdr.len, rate, xferlen)); 1362 1363 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1364 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1365 ural_txeof); 1366 1367 error = usbd_transfer(data->xfer); 1368 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1369 return error; 1370 1371 sc->tx_queued++; 1372 1373 return 0; 1374 } 1375 1376 Static void 1377 ural_start(struct ifnet *ifp) 1378 { 1379 struct ural_softc *sc = ifp->if_softc; 1380 struct ieee80211com *ic = &sc->sc_ic; 1381 struct mbuf *m0; 1382 struct ether_header *eh; 1383 struct ieee80211_node *ni; 1384 1385 for (;;) { 1386 IF_POLL(&ic->ic_mgtq, m0); 1387 if (m0 != NULL) { 1388 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1389 ifp->if_flags |= IFF_OACTIVE; 1390 break; 1391 } 1392 IF_DEQUEUE(&ic->ic_mgtq, m0); 1393 1394 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1395 m0->m_pkthdr.rcvif = NULL; 1396 #if NBPFILTER > 0 1397 if (ic->ic_rawbpf != NULL) 1398 bpf_mtap(ic->ic_rawbpf, m0); 1399 #endif 1400 if (ural_tx_mgt(sc, m0, ni) != 0) 1401 break; 1402 1403 } else { 1404 if (ic->ic_state != IEEE80211_S_RUN) 1405 break; 1406 IFQ_DEQUEUE(&ifp->if_snd, m0); 1407 if (m0 == NULL) 1408 break; 1409 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1410 IF_PREPEND(&ifp->if_snd, m0); 1411 ifp->if_flags |= IFF_OACTIVE; 1412 break; 1413 } 1414 1415 if (m0->m_len < sizeof (struct ether_header) && 1416 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1417 continue; 1418 1419 eh = mtod(m0, struct ether_header *); 1420 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1421 if (ni == NULL) { 1422 m_freem(m0); 1423 continue; 1424 } 1425 #if NBPFILTER > 0 1426 if (ifp->if_bpf != NULL) 1427 bpf_mtap(ifp->if_bpf, m0); 1428 #endif 1429 m0 = ieee80211_encap(ic, m0, ni); 1430 if (m0 == NULL) { 1431 ieee80211_free_node(ni); 1432 continue; 1433 } 1434 #if NBPFILTER > 0 1435 if (ic->ic_rawbpf != NULL) 1436 bpf_mtap(ic->ic_rawbpf, m0); 1437 #endif 1438 if (ural_tx_data(sc, m0, ni) != 0) { 1439 ieee80211_free_node(ni); 1440 ifp->if_oerrors++; 1441 break; 1442 } 1443 } 1444 1445 sc->sc_tx_timer = 5; 1446 ifp->if_timer = 1; 1447 } 1448 } 1449 1450 Static void 1451 ural_watchdog(struct ifnet *ifp) 1452 { 1453 struct ural_softc *sc = ifp->if_softc; 1454 struct ieee80211com *ic = &sc->sc_ic; 1455 1456 ifp->if_timer = 0; 1457 1458 if (sc->sc_tx_timer > 0) { 1459 if (--sc->sc_tx_timer == 0) { 1460 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1461 /*ural_init(sc); XXX needs a process context! */ 1462 ifp->if_oerrors++; 1463 return; 1464 } 1465 ifp->if_timer = 1; 1466 } 1467 1468 ieee80211_watchdog(ic); 1469 } 1470 1471 /* 1472 * This function allows for fast channel switching in monitor mode (used by 1473 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1474 * generate a new beacon frame. 1475 */ 1476 Static int 1477 ural_reset(struct ifnet *ifp) 1478 { 1479 struct ural_softc *sc = ifp->if_softc; 1480 struct ieee80211com *ic = &sc->sc_ic; 1481 1482 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1483 return ENETRESET; 1484 1485 ural_set_chan(sc, ic->ic_curchan); 1486 1487 return 0; 1488 } 1489 1490 Static int 1491 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1492 { 1493 struct ural_softc *sc = ifp->if_softc; 1494 struct ieee80211com *ic = &sc->sc_ic; 1495 int s, error = 0; 1496 1497 s = splnet(); 1498 1499 switch (cmd) { 1500 case SIOCSIFFLAGS: 1501 if (ifp->if_flags & IFF_UP) { 1502 if (ifp->if_flags & IFF_RUNNING) 1503 ural_update_promisc(sc); 1504 else 1505 ural_init(ifp); 1506 } else { 1507 if (ifp->if_flags & IFF_RUNNING) 1508 ural_stop(ifp, 1); 1509 } 1510 break; 1511 1512 default: 1513 error = ieee80211_ioctl(ic, cmd, data); 1514 } 1515 1516 if (error == ENETRESET) { 1517 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1518 (IFF_UP | IFF_RUNNING)) 1519 ural_init(ifp); 1520 error = 0; 1521 } 1522 1523 splx(s); 1524 1525 return error; 1526 } 1527 1528 Static void 1529 ural_set_testmode(struct ural_softc *sc) 1530 { 1531 usb_device_request_t req; 1532 usbd_status error; 1533 1534 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1535 req.bRequest = RAL_VENDOR_REQUEST; 1536 USETW(req.wValue, 4); 1537 USETW(req.wIndex, 1); 1538 USETW(req.wLength, 0); 1539 1540 error = usbd_do_request(sc->sc_udev, &req, NULL); 1541 if (error != 0) { 1542 printf("%s: could not set test mode: %s\n", 1543 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1544 } 1545 } 1546 1547 Static void 1548 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1549 { 1550 usb_device_request_t req; 1551 usbd_status error; 1552 1553 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1554 req.bRequest = RAL_READ_EEPROM; 1555 USETW(req.wValue, 0); 1556 USETW(req.wIndex, addr); 1557 USETW(req.wLength, len); 1558 1559 error = usbd_do_request(sc->sc_udev, &req, buf); 1560 if (error != 0) { 1561 printf("%s: could not read EEPROM: %s\n", 1562 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1563 } 1564 } 1565 1566 Static uint16_t 1567 ural_read(struct ural_softc *sc, uint16_t reg) 1568 { 1569 usb_device_request_t req; 1570 usbd_status error; 1571 uint16_t val; 1572 1573 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1574 req.bRequest = RAL_READ_MAC; 1575 USETW(req.wValue, 0); 1576 USETW(req.wIndex, reg); 1577 USETW(req.wLength, sizeof (uint16_t)); 1578 1579 error = usbd_do_request(sc->sc_udev, &req, &val); 1580 if (error != 0) { 1581 printf("%s: could not read MAC register: %s\n", 1582 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1583 return 0; 1584 } 1585 1586 return le16toh(val); 1587 } 1588 1589 Static void 1590 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1591 { 1592 usb_device_request_t req; 1593 usbd_status error; 1594 1595 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1596 req.bRequest = RAL_READ_MULTI_MAC; 1597 USETW(req.wValue, 0); 1598 USETW(req.wIndex, reg); 1599 USETW(req.wLength, len); 1600 1601 error = usbd_do_request(sc->sc_udev, &req, buf); 1602 if (error != 0) { 1603 printf("%s: could not read MAC register: %s\n", 1604 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1605 } 1606 } 1607 1608 Static void 1609 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1610 { 1611 usb_device_request_t req; 1612 usbd_status error; 1613 1614 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1615 req.bRequest = RAL_WRITE_MAC; 1616 USETW(req.wValue, val); 1617 USETW(req.wIndex, reg); 1618 USETW(req.wLength, 0); 1619 1620 error = usbd_do_request(sc->sc_udev, &req, NULL); 1621 if (error != 0) { 1622 printf("%s: could not write MAC register: %s\n", 1623 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1624 } 1625 } 1626 1627 Static void 1628 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1629 { 1630 usb_device_request_t req; 1631 usbd_status error; 1632 1633 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1634 req.bRequest = RAL_WRITE_MULTI_MAC; 1635 USETW(req.wValue, 0); 1636 USETW(req.wIndex, reg); 1637 USETW(req.wLength, len); 1638 1639 error = usbd_do_request(sc->sc_udev, &req, buf); 1640 if (error != 0) { 1641 printf("%s: could not write MAC register: %s\n", 1642 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1643 } 1644 } 1645 1646 Static void 1647 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1648 { 1649 uint16_t tmp; 1650 int ntries; 1651 1652 for (ntries = 0; ntries < 5; ntries++) { 1653 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1654 break; 1655 } 1656 if (ntries == 5) { 1657 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1658 return; 1659 } 1660 1661 tmp = reg << 8 | val; 1662 ural_write(sc, RAL_PHY_CSR7, tmp); 1663 } 1664 1665 Static uint8_t 1666 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1667 { 1668 uint16_t val; 1669 int ntries; 1670 1671 val = RAL_BBP_WRITE | reg << 8; 1672 ural_write(sc, RAL_PHY_CSR7, val); 1673 1674 for (ntries = 0; ntries < 5; ntries++) { 1675 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1676 break; 1677 } 1678 if (ntries == 5) { 1679 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1680 return 0; 1681 } 1682 1683 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1684 } 1685 1686 Static void 1687 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1688 { 1689 uint32_t tmp; 1690 int ntries; 1691 1692 for (ntries = 0; ntries < 5; ntries++) { 1693 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1694 break; 1695 } 1696 if (ntries == 5) { 1697 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1698 return; 1699 } 1700 1701 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1702 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1703 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1704 1705 /* remember last written value in sc */ 1706 sc->rf_regs[reg] = val; 1707 1708 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1709 } 1710 1711 Static void 1712 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1713 { 1714 struct ieee80211com *ic = &sc->sc_ic; 1715 uint8_t power, tmp; 1716 u_int i, chan; 1717 1718 chan = ieee80211_chan2ieee(ic, c); 1719 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1720 return; 1721 1722 if (IEEE80211_IS_CHAN_2GHZ(c)) 1723 power = min(sc->txpow[chan - 1], 31); 1724 else 1725 power = 31; 1726 1727 /* adjust txpower using ifconfig settings */ 1728 power -= (100 - ic->ic_txpowlimit) / 8; 1729 1730 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1731 1732 switch (sc->rf_rev) { 1733 case RAL_RF_2522: 1734 ural_rf_write(sc, RAL_RF1, 0x00814); 1735 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1736 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1737 break; 1738 1739 case RAL_RF_2523: 1740 ural_rf_write(sc, RAL_RF1, 0x08804); 1741 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1742 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1743 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1744 break; 1745 1746 case RAL_RF_2524: 1747 ural_rf_write(sc, RAL_RF1, 0x0c808); 1748 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1749 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1750 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1751 break; 1752 1753 case RAL_RF_2525: 1754 ural_rf_write(sc, RAL_RF1, 0x08808); 1755 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1756 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1757 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1758 1759 ural_rf_write(sc, RAL_RF1, 0x08808); 1760 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1761 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1762 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1763 break; 1764 1765 case RAL_RF_2525E: 1766 ural_rf_write(sc, RAL_RF1, 0x08808); 1767 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1768 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1769 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1770 break; 1771 1772 case RAL_RF_2526: 1773 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1774 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1775 ural_rf_write(sc, RAL_RF1, 0x08804); 1776 1777 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1778 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1779 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1780 break; 1781 1782 /* dual-band RF */ 1783 case RAL_RF_5222: 1784 for (i = 0; ural_rf5222[i].chan != chan; i++); 1785 1786 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1787 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1788 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1789 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1790 break; 1791 } 1792 1793 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1794 ic->ic_state != IEEE80211_S_SCAN) { 1795 /* set Japan filter bit for channel 14 */ 1796 tmp = ural_bbp_read(sc, 70); 1797 1798 tmp &= ~RAL_JAPAN_FILTER; 1799 if (chan == 14) 1800 tmp |= RAL_JAPAN_FILTER; 1801 1802 ural_bbp_write(sc, 70, tmp); 1803 1804 /* clear CRC errors */ 1805 ural_read(sc, RAL_STA_CSR0); 1806 1807 DELAY(10000); 1808 ural_disable_rf_tune(sc); 1809 } 1810 } 1811 1812 /* 1813 * Disable RF auto-tuning. 1814 */ 1815 Static void 1816 ural_disable_rf_tune(struct ural_softc *sc) 1817 { 1818 uint32_t tmp; 1819 1820 if (sc->rf_rev != RAL_RF_2523) { 1821 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1822 ural_rf_write(sc, RAL_RF1, tmp); 1823 } 1824 1825 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1826 ural_rf_write(sc, RAL_RF3, tmp); 1827 1828 DPRINTFN(2, ("disabling RF autotune\n")); 1829 } 1830 1831 /* 1832 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1833 * synchronization. 1834 */ 1835 Static void 1836 ural_enable_tsf_sync(struct ural_softc *sc) 1837 { 1838 struct ieee80211com *ic = &sc->sc_ic; 1839 uint16_t logcwmin, preload, tmp; 1840 1841 /* first, disable TSF synchronization */ 1842 ural_write(sc, RAL_TXRX_CSR19, 0); 1843 1844 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1845 ural_write(sc, RAL_TXRX_CSR18, tmp); 1846 1847 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1848 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1849 tmp = logcwmin << 12 | preload; 1850 ural_write(sc, RAL_TXRX_CSR20, tmp); 1851 1852 /* finally, enable TSF synchronization */ 1853 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1854 if (ic->ic_opmode == IEEE80211_M_STA) 1855 tmp |= RAL_ENABLE_TSF_SYNC(1); 1856 else 1857 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1858 ural_write(sc, RAL_TXRX_CSR19, tmp); 1859 1860 DPRINTF(("enabling TSF synchronization\n")); 1861 } 1862 1863 Static void 1864 ural_update_slot(struct ifnet *ifp) 1865 { 1866 struct ural_softc *sc = ifp->if_softc; 1867 struct ieee80211com *ic = &sc->sc_ic; 1868 uint16_t slottime, sifs, eifs; 1869 1870 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1871 1872 /* 1873 * These settings may sound a bit inconsistent but this is what the 1874 * reference driver does. 1875 */ 1876 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1877 sifs = 16 - RAL_RXTX_TURNAROUND; 1878 eifs = 364; 1879 } else { 1880 sifs = 10 - RAL_RXTX_TURNAROUND; 1881 eifs = 64; 1882 } 1883 1884 ural_write(sc, RAL_MAC_CSR10, slottime); 1885 ural_write(sc, RAL_MAC_CSR11, sifs); 1886 ural_write(sc, RAL_MAC_CSR12, eifs); 1887 } 1888 1889 Static void 1890 ural_set_txpreamble(struct ural_softc *sc) 1891 { 1892 uint16_t tmp; 1893 1894 tmp = ural_read(sc, RAL_TXRX_CSR10); 1895 1896 tmp &= ~RAL_SHORT_PREAMBLE; 1897 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1898 tmp |= RAL_SHORT_PREAMBLE; 1899 1900 ural_write(sc, RAL_TXRX_CSR10, tmp); 1901 } 1902 1903 Static void 1904 ural_set_basicrates(struct ural_softc *sc) 1905 { 1906 struct ieee80211com *ic = &sc->sc_ic; 1907 1908 /* update basic rate set */ 1909 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1910 /* 11b basic rates: 1, 2Mbps */ 1911 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1912 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1913 /* 11a basic rates: 6, 12, 24Mbps */ 1914 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1915 } else { 1916 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1917 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1918 } 1919 } 1920 1921 Static void 1922 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1923 { 1924 uint16_t tmp; 1925 1926 tmp = bssid[0] | bssid[1] << 8; 1927 ural_write(sc, RAL_MAC_CSR5, tmp); 1928 1929 tmp = bssid[2] | bssid[3] << 8; 1930 ural_write(sc, RAL_MAC_CSR6, tmp); 1931 1932 tmp = bssid[4] | bssid[5] << 8; 1933 ural_write(sc, RAL_MAC_CSR7, tmp); 1934 1935 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1936 } 1937 1938 Static void 1939 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1940 { 1941 uint16_t tmp; 1942 1943 tmp = addr[0] | addr[1] << 8; 1944 ural_write(sc, RAL_MAC_CSR2, tmp); 1945 1946 tmp = addr[2] | addr[3] << 8; 1947 ural_write(sc, RAL_MAC_CSR3, tmp); 1948 1949 tmp = addr[4] | addr[5] << 8; 1950 ural_write(sc, RAL_MAC_CSR4, tmp); 1951 1952 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1953 } 1954 1955 Static void 1956 ural_update_promisc(struct ural_softc *sc) 1957 { 1958 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1959 uint32_t tmp; 1960 1961 tmp = ural_read(sc, RAL_TXRX_CSR2); 1962 1963 tmp &= ~RAL_DROP_NOT_TO_ME; 1964 if (!(ifp->if_flags & IFF_PROMISC)) 1965 tmp |= RAL_DROP_NOT_TO_ME; 1966 1967 ural_write(sc, RAL_TXRX_CSR2, tmp); 1968 1969 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1970 "entering" : "leaving")); 1971 } 1972 1973 Static const char * 1974 ural_get_rf(int rev) 1975 { 1976 switch (rev) { 1977 case RAL_RF_2522: return "RT2522"; 1978 case RAL_RF_2523: return "RT2523"; 1979 case RAL_RF_2524: return "RT2524"; 1980 case RAL_RF_2525: return "RT2525"; 1981 case RAL_RF_2525E: return "RT2525e"; 1982 case RAL_RF_2526: return "RT2526"; 1983 case RAL_RF_5222: return "RT5222"; 1984 default: return "unknown"; 1985 } 1986 } 1987 1988 Static void 1989 ural_read_eeprom(struct ural_softc *sc) 1990 { 1991 struct ieee80211com *ic = &sc->sc_ic; 1992 uint16_t val; 1993 1994 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1995 val = le16toh(val); 1996 sc->rf_rev = (val >> 11) & 0x7; 1997 sc->hw_radio = (val >> 10) & 0x1; 1998 sc->led_mode = (val >> 6) & 0x7; 1999 sc->rx_ant = (val >> 4) & 0x3; 2000 sc->tx_ant = (val >> 2) & 0x3; 2001 sc->nb_ant = val & 0x3; 2002 2003 /* read MAC address */ 2004 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2005 2006 /* read default values for BBP registers */ 2007 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2008 2009 /* read Tx power for all b/g channels */ 2010 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2011 } 2012 2013 Static int 2014 ural_bbp_init(struct ural_softc *sc) 2015 { 2016 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2017 int i, ntries; 2018 2019 /* wait for BBP to be ready */ 2020 for (ntries = 0; ntries < 100; ntries++) { 2021 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2022 break; 2023 DELAY(1000); 2024 } 2025 if (ntries == 100) { 2026 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 2027 return EIO; 2028 } 2029 2030 /* initialize BBP registers to default values */ 2031 for (i = 0; i < N(ural_def_bbp); i++) 2032 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2033 2034 #if 0 2035 /* initialize BBP registers to values stored in EEPROM */ 2036 for (i = 0; i < 16; i++) { 2037 if (sc->bbp_prom[i].reg == 0xff) 2038 continue; 2039 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2040 } 2041 #endif 2042 2043 return 0; 2044 #undef N 2045 } 2046 2047 Static void 2048 ural_set_txantenna(struct ural_softc *sc, int antenna) 2049 { 2050 uint16_t tmp; 2051 uint8_t tx; 2052 2053 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2054 if (antenna == 1) 2055 tx |= RAL_BBP_ANTA; 2056 else if (antenna == 2) 2057 tx |= RAL_BBP_ANTB; 2058 else 2059 tx |= RAL_BBP_DIVERSITY; 2060 2061 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2062 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2063 sc->rf_rev == RAL_RF_5222) 2064 tx |= RAL_BBP_FLIPIQ; 2065 2066 ural_bbp_write(sc, RAL_BBP_TX, tx); 2067 2068 /* update values in PHY_CSR5 and PHY_CSR6 */ 2069 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2070 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2071 2072 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2073 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2074 } 2075 2076 Static void 2077 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2078 { 2079 uint8_t rx; 2080 2081 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2082 if (antenna == 1) 2083 rx |= RAL_BBP_ANTA; 2084 else if (antenna == 2) 2085 rx |= RAL_BBP_ANTB; 2086 else 2087 rx |= RAL_BBP_DIVERSITY; 2088 2089 /* need to force no I/Q flip for RF 2525e and 2526 */ 2090 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2091 rx &= ~RAL_BBP_FLIPIQ; 2092 2093 ural_bbp_write(sc, RAL_BBP_RX, rx); 2094 } 2095 2096 Static int 2097 ural_init(struct ifnet *ifp) 2098 { 2099 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2100 struct ural_softc *sc = ifp->if_softc; 2101 struct ieee80211com *ic = &sc->sc_ic; 2102 struct ieee80211_key *wk; 2103 struct ural_rx_data *data; 2104 uint16_t tmp; 2105 usbd_status error; 2106 int i, ntries; 2107 2108 ural_set_testmode(sc); 2109 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2110 2111 ural_stop(ifp, 0); 2112 2113 /* initialize MAC registers to default values */ 2114 for (i = 0; i < N(ural_def_mac); i++) 2115 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2116 2117 /* wait for BBP and RF to wake up (this can take a long time!) */ 2118 for (ntries = 0; ntries < 100; ntries++) { 2119 tmp = ural_read(sc, RAL_MAC_CSR17); 2120 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2121 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2122 break; 2123 DELAY(1000); 2124 } 2125 if (ntries == 100) { 2126 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2127 USBDEVNAME(sc->sc_dev)); 2128 error = EIO; 2129 goto fail; 2130 } 2131 2132 /* we're ready! */ 2133 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2134 2135 /* set basic rate set (will be updated later) */ 2136 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2137 2138 error = ural_bbp_init(sc); 2139 if (error != 0) 2140 goto fail; 2141 2142 /* set default BSS channel */ 2143 ural_set_chan(sc, ic->ic_curchan); 2144 2145 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2146 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2147 2148 ural_set_txantenna(sc, sc->tx_ant); 2149 ural_set_rxantenna(sc, sc->rx_ant); 2150 2151 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2152 ural_set_macaddr(sc, ic->ic_myaddr); 2153 2154 /* 2155 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2156 */ 2157 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2158 wk = &ic->ic_crypto.cs_nw_keys[i]; 2159 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2160 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2161 } 2162 2163 /* 2164 * Allocate xfer for AMRR statistics requests. 2165 */ 2166 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2167 if (sc->amrr_xfer == NULL) { 2168 printf("%s: could not allocate AMRR xfer\n", 2169 USBDEVNAME(sc->sc_dev)); 2170 goto fail; 2171 } 2172 2173 /* 2174 * Open Tx and Rx USB bulk pipes. 2175 */ 2176 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2177 &sc->sc_tx_pipeh); 2178 if (error != 0) { 2179 printf("%s: could not open Tx pipe: %s\n", 2180 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2181 goto fail; 2182 } 2183 2184 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2185 &sc->sc_rx_pipeh); 2186 if (error != 0) { 2187 printf("%s: could not open Rx pipe: %s\n", 2188 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2189 goto fail; 2190 } 2191 2192 /* 2193 * Allocate Tx and Rx xfer queues. 2194 */ 2195 error = ural_alloc_tx_list(sc); 2196 if (error != 0) { 2197 printf("%s: could not allocate Tx list\n", 2198 USBDEVNAME(sc->sc_dev)); 2199 goto fail; 2200 } 2201 2202 error = ural_alloc_rx_list(sc); 2203 if (error != 0) { 2204 printf("%s: could not allocate Rx list\n", 2205 USBDEVNAME(sc->sc_dev)); 2206 goto fail; 2207 } 2208 2209 /* 2210 * Start up the receive pipe. 2211 */ 2212 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2213 data = &sc->rx_data[i]; 2214 2215 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2216 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2217 usbd_transfer(data->xfer); 2218 } 2219 2220 /* kick Rx */ 2221 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2222 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2223 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2224 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2225 tmp |= RAL_DROP_TODS; 2226 if (!(ifp->if_flags & IFF_PROMISC)) 2227 tmp |= RAL_DROP_NOT_TO_ME; 2228 } 2229 ural_write(sc, RAL_TXRX_CSR2, tmp); 2230 2231 ifp->if_flags &= ~IFF_OACTIVE; 2232 ifp->if_flags |= IFF_RUNNING; 2233 2234 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2235 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2236 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2237 } else 2238 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2239 2240 return 0; 2241 2242 fail: ural_stop(ifp, 1); 2243 return error; 2244 #undef N 2245 } 2246 2247 Static void 2248 ural_stop(struct ifnet *ifp, int disable) 2249 { 2250 struct ural_softc *sc = ifp->if_softc; 2251 struct ieee80211com *ic = &sc->sc_ic; 2252 2253 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2254 2255 sc->sc_tx_timer = 0; 2256 ifp->if_timer = 0; 2257 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2258 2259 /* disable Rx */ 2260 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2261 2262 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2263 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2264 ural_write(sc, RAL_MAC_CSR1, 0); 2265 2266 if (sc->amrr_xfer != NULL) { 2267 usbd_free_xfer(sc->amrr_xfer); 2268 sc->amrr_xfer = NULL; 2269 } 2270 2271 if (sc->sc_rx_pipeh != NULL) { 2272 usbd_abort_pipe(sc->sc_rx_pipeh); 2273 usbd_close_pipe(sc->sc_rx_pipeh); 2274 sc->sc_rx_pipeh = NULL; 2275 } 2276 2277 if (sc->sc_tx_pipeh != NULL) { 2278 usbd_abort_pipe(sc->sc_tx_pipeh); 2279 usbd_close_pipe(sc->sc_tx_pipeh); 2280 sc->sc_tx_pipeh = NULL; 2281 } 2282 2283 ural_free_rx_list(sc); 2284 ural_free_tx_list(sc); 2285 } 2286 2287 int 2288 ural_activate(device_ptr_t self, enum devact act) 2289 { 2290 struct ural_softc *sc = (struct ural_softc *)self; 2291 2292 switch (act) { 2293 case DVACT_ACTIVATE: 2294 return EOPNOTSUPP; 2295 break; 2296 2297 case DVACT_DEACTIVATE: 2298 if_deactivate(&sc->sc_if); 2299 break; 2300 } 2301 2302 return 0; 2303 } 2304 2305 Static void 2306 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2307 { 2308 int i; 2309 2310 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2311 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2312 2313 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2314 2315 /* set rate to some reasonable initial value */ 2316 for (i = ni->ni_rates.rs_nrates - 1; 2317 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2318 i--); 2319 ni->ni_txrate = i; 2320 2321 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2322 } 2323 2324 Static void 2325 ural_amrr_timeout(void *arg) 2326 { 2327 struct ural_softc *sc = (struct ural_softc *)arg; 2328 usb_device_request_t req; 2329 int s; 2330 2331 s = splusb(); 2332 2333 /* 2334 * Asynchronously read statistic registers (cleared by read). 2335 */ 2336 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2337 req.bRequest = RAL_READ_MULTI_MAC; 2338 USETW(req.wValue, 0); 2339 USETW(req.wIndex, RAL_STA_CSR0); 2340 USETW(req.wLength, sizeof sc->sta); 2341 2342 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2343 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2344 ural_amrr_update); 2345 (void)usbd_transfer(sc->amrr_xfer); 2346 2347 splx(s); 2348 } 2349 2350 Static void 2351 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2352 usbd_status status) 2353 { 2354 struct ural_softc *sc = (struct ural_softc *)priv; 2355 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2356 2357 if (status != USBD_NORMAL_COMPLETION) { 2358 printf("%s: could not retrieve Tx statistics - " 2359 "cancelling automatic rate control\n", 2360 USBDEVNAME(sc->sc_dev)); 2361 return; 2362 } 2363 2364 /* count TX retry-fail as Tx errors */ 2365 ifp->if_oerrors += sc->sta[9]; 2366 2367 sc->amn.amn_retrycnt = 2368 sc->sta[7] + /* TX one-retry ok count */ 2369 sc->sta[8] + /* TX more-retry ok count */ 2370 sc->sta[9]; /* TX retry-fail count */ 2371 2372 sc->amn.amn_txcnt = 2373 sc->amn.amn_retrycnt + 2374 sc->sta[6]; /* TX no-retry ok count */ 2375 2376 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2377 2378 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2379 } 2380
Indexes created Mon Sep 29 18:09:42 GMT 2025