if_ural.c revision 1.29
1 /* $NetBSD: if_ural.c,v 1.29 2008/04/27 09:32:08 nakayama Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.29 2008/04/27 09:32:08 nakayama Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <sys/bus.h> 43 #include <machine/endian.h> 44 #include <sys/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 71 #include <dev/usb/if_uralreg.h> 72 #include <dev/usb/if_uralvar.h> 73 74 #ifdef USB_DEBUG 75 #define URAL_DEBUG 76 #endif 77 78 #ifdef URAL_DEBUG 79 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 81 int ural_debug = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n, x) 85 #endif 86 87 /* various supported device vendors/products */ 88 static const struct usb_devno ural_devs[] = { 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 95 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 96 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 97 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 98 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 101 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 102 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 104 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 105 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 106 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 107 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 108 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 109 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 110 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 111 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 112 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 113 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 114 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 115 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 116 }; 117 118 Static int ural_alloc_tx_list(struct ural_softc *); 119 Static void ural_free_tx_list(struct ural_softc *); 120 Static int ural_alloc_rx_list(struct ural_softc *); 121 Static void ural_free_rx_list(struct ural_softc *); 122 Static int ural_media_change(struct ifnet *); 123 Static void ural_next_scan(void *); 124 Static void ural_task(void *); 125 Static int ural_newstate(struct ieee80211com *, 126 enum ieee80211_state, int); 127 Static int ural_rxrate(struct ural_rx_desc *); 128 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 129 usbd_status); 130 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 131 usbd_status); 132 Static int ural_ack_rate(struct ieee80211com *, int); 133 Static uint16_t ural_txtime(int, int, uint32_t); 134 Static uint8_t ural_plcp_signal(int); 135 Static void ural_setup_tx_desc(struct ural_softc *, 136 struct ural_tx_desc *, uint32_t, int, int); 137 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 138 struct ieee80211_node *); 139 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 140 struct ieee80211_node *); 141 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 142 struct ieee80211_node *); 143 Static void ural_start(struct ifnet *); 144 Static void ural_watchdog(struct ifnet *); 145 Static int ural_reset(struct ifnet *); 146 Static int ural_ioctl(struct ifnet *, u_long, void *); 147 Static void ural_set_testmode(struct ural_softc *); 148 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 149 int); 150 Static uint16_t ural_read(struct ural_softc *, uint16_t); 151 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 152 int); 153 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 154 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 155 int); 156 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 157 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 158 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 159 Static void ural_set_chan(struct ural_softc *, 160 struct ieee80211_channel *); 161 Static void ural_disable_rf_tune(struct ural_softc *); 162 Static void ural_enable_tsf_sync(struct ural_softc *); 163 Static void ural_update_slot(struct ifnet *); 164 Static void ural_set_txpreamble(struct ural_softc *); 165 Static void ural_set_basicrates(struct ural_softc *); 166 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 167 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 168 Static void ural_update_promisc(struct ural_softc *); 169 Static const char *ural_get_rf(int); 170 Static void ural_read_eeprom(struct ural_softc *); 171 Static int ural_bbp_init(struct ural_softc *); 172 Static void ural_set_txantenna(struct ural_softc *, int); 173 Static void ural_set_rxantenna(struct ural_softc *, int); 174 Static int ural_init(struct ifnet *); 175 Static void ural_stop(struct ifnet *, int); 176 Static void ural_amrr_start(struct ural_softc *, 177 struct ieee80211_node *); 178 Static void ural_amrr_timeout(void *); 179 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 180 usbd_status status); 181 182 /* 183 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 184 */ 185 static const struct ieee80211_rateset ural_rateset_11a = 186 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 187 188 static const struct ieee80211_rateset ural_rateset_11b = 189 { 4, { 2, 4, 11, 22 } }; 190 191 static const struct ieee80211_rateset ural_rateset_11g = 192 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 193 194 /* 195 * Default values for MAC registers; values taken from the reference driver. 196 */ 197 static const struct { 198 uint16_t reg; 199 uint16_t val; 200 } ural_def_mac[] = { 201 { RAL_TXRX_CSR5, 0x8c8d }, 202 { RAL_TXRX_CSR6, 0x8b8a }, 203 { RAL_TXRX_CSR7, 0x8687 }, 204 { RAL_TXRX_CSR8, 0x0085 }, 205 { RAL_MAC_CSR13, 0x1111 }, 206 { RAL_MAC_CSR14, 0x1e11 }, 207 { RAL_TXRX_CSR21, 0xe78f }, 208 { RAL_MAC_CSR9, 0xff1d }, 209 { RAL_MAC_CSR11, 0x0002 }, 210 { RAL_MAC_CSR22, 0x0053 }, 211 { RAL_MAC_CSR15, 0x0000 }, 212 { RAL_MAC_CSR8, 0x0780 }, 213 { RAL_TXRX_CSR19, 0x0000 }, 214 { RAL_TXRX_CSR18, 0x005a }, 215 { RAL_PHY_CSR2, 0x0000 }, 216 { RAL_TXRX_CSR0, 0x1ec0 }, 217 { RAL_PHY_CSR4, 0x000f } 218 }; 219 220 /* 221 * Default values for BBP registers; values taken from the reference driver. 222 */ 223 static const struct { 224 uint8_t reg; 225 uint8_t val; 226 } ural_def_bbp[] = { 227 { 3, 0x02 }, 228 { 4, 0x19 }, 229 { 14, 0x1c }, 230 { 15, 0x30 }, 231 { 16, 0xac }, 232 { 17, 0x48 }, 233 { 18, 0x18 }, 234 { 19, 0xff }, 235 { 20, 0x1e }, 236 { 21, 0x08 }, 237 { 22, 0x08 }, 238 { 23, 0x08 }, 239 { 24, 0x80 }, 240 { 25, 0x50 }, 241 { 26, 0x08 }, 242 { 27, 0x23 }, 243 { 30, 0x10 }, 244 { 31, 0x2b }, 245 { 32, 0xb9 }, 246 { 34, 0x12 }, 247 { 35, 0x50 }, 248 { 39, 0xc4 }, 249 { 40, 0x02 }, 250 { 41, 0x60 }, 251 { 53, 0x10 }, 252 { 54, 0x18 }, 253 { 56, 0x08 }, 254 { 57, 0x10 }, 255 { 58, 0x08 }, 256 { 61, 0x60 }, 257 { 62, 0x10 }, 258 { 75, 0xff } 259 }; 260 261 /* 262 * Default values for RF register R2 indexed by channel numbers. 263 */ 264 static const uint32_t ural_rf2522_r2[] = { 265 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 266 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 267 }; 268 269 static const uint32_t ural_rf2523_r2[] = { 270 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 271 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 272 }; 273 274 static const uint32_t ural_rf2524_r2[] = { 275 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 276 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 277 }; 278 279 static const uint32_t ural_rf2525_r2[] = { 280 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 281 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 282 }; 283 284 static const uint32_t ural_rf2525_hi_r2[] = { 285 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 286 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 287 }; 288 289 static const uint32_t ural_rf2525e_r2[] = { 290 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 291 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 292 }; 293 294 static const uint32_t ural_rf2526_hi_r2[] = { 295 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 296 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 297 }; 298 299 static const uint32_t ural_rf2526_r2[] = { 300 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 301 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 302 }; 303 304 /* 305 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 306 * values taken from the reference driver. 307 */ 308 static const struct { 309 uint8_t chan; 310 uint32_t r1; 311 uint32_t r2; 312 uint32_t r4; 313 } ural_rf5222[] = { 314 { 1, 0x08808, 0x0044d, 0x00282 }, 315 { 2, 0x08808, 0x0044e, 0x00282 }, 316 { 3, 0x08808, 0x0044f, 0x00282 }, 317 { 4, 0x08808, 0x00460, 0x00282 }, 318 { 5, 0x08808, 0x00461, 0x00282 }, 319 { 6, 0x08808, 0x00462, 0x00282 }, 320 { 7, 0x08808, 0x00463, 0x00282 }, 321 { 8, 0x08808, 0x00464, 0x00282 }, 322 { 9, 0x08808, 0x00465, 0x00282 }, 323 { 10, 0x08808, 0x00466, 0x00282 }, 324 { 11, 0x08808, 0x00467, 0x00282 }, 325 { 12, 0x08808, 0x00468, 0x00282 }, 326 { 13, 0x08808, 0x00469, 0x00282 }, 327 { 14, 0x08808, 0x0046b, 0x00286 }, 328 329 { 36, 0x08804, 0x06225, 0x00287 }, 330 { 40, 0x08804, 0x06226, 0x00287 }, 331 { 44, 0x08804, 0x06227, 0x00287 }, 332 { 48, 0x08804, 0x06228, 0x00287 }, 333 { 52, 0x08804, 0x06229, 0x00287 }, 334 { 56, 0x08804, 0x0622a, 0x00287 }, 335 { 60, 0x08804, 0x0622b, 0x00287 }, 336 { 64, 0x08804, 0x0622c, 0x00287 }, 337 338 { 100, 0x08804, 0x02200, 0x00283 }, 339 { 104, 0x08804, 0x02201, 0x00283 }, 340 { 108, 0x08804, 0x02202, 0x00283 }, 341 { 112, 0x08804, 0x02203, 0x00283 }, 342 { 116, 0x08804, 0x02204, 0x00283 }, 343 { 120, 0x08804, 0x02205, 0x00283 }, 344 { 124, 0x08804, 0x02206, 0x00283 }, 345 { 128, 0x08804, 0x02207, 0x00283 }, 346 { 132, 0x08804, 0x02208, 0x00283 }, 347 { 136, 0x08804, 0x02209, 0x00283 }, 348 { 140, 0x08804, 0x0220a, 0x00283 }, 349 350 { 149, 0x08808, 0x02429, 0x00281 }, 351 { 153, 0x08808, 0x0242b, 0x00281 }, 352 { 157, 0x08808, 0x0242d, 0x00281 }, 353 { 161, 0x08808, 0x0242f, 0x00281 } 354 }; 355 356 USB_DECLARE_DRIVER(ural); 357 358 USB_MATCH(ural) 359 { 360 USB_MATCH_START(ural, uaa); 361 362 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 363 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 364 } 365 366 USB_ATTACH(ural) 367 { 368 USB_ATTACH_START(ural, sc, uaa); 369 struct ieee80211com *ic = &sc->sc_ic; 370 struct ifnet *ifp = &sc->sc_if; 371 usb_interface_descriptor_t *id; 372 usb_endpoint_descriptor_t *ed; 373 usbd_status error; 374 char *devinfop; 375 int i; 376 377 sc->sc_udev = uaa->device; 378 379 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 380 USB_ATTACH_SETUP; 381 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 382 usbd_devinfo_free(devinfop); 383 384 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 385 printf("%s: could not set configuration no\n", 386 USBDEVNAME(sc->sc_dev)); 387 USB_ATTACH_ERROR_RETURN; 388 } 389 390 /* get the first interface handle */ 391 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 392 &sc->sc_iface); 393 if (error != 0) { 394 printf("%s: could not get interface handle\n", 395 USBDEVNAME(sc->sc_dev)); 396 USB_ATTACH_ERROR_RETURN; 397 } 398 399 /* 400 * Find endpoints. 401 */ 402 id = usbd_get_interface_descriptor(sc->sc_iface); 403 404 sc->sc_rx_no = sc->sc_tx_no = -1; 405 for (i = 0; i < id->bNumEndpoints; i++) { 406 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 407 if (ed == NULL) { 408 printf("%s: no endpoint descriptor for %d\n", 409 USBDEVNAME(sc->sc_dev), i); 410 USB_ATTACH_ERROR_RETURN; 411 } 412 413 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 414 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 415 sc->sc_rx_no = ed->bEndpointAddress; 416 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 417 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 418 sc->sc_tx_no = ed->bEndpointAddress; 419 } 420 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 421 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 422 USB_ATTACH_ERROR_RETURN; 423 } 424 425 usb_init_task(&sc->sc_task, ural_task, sc); 426 usb_callout_init(sc->sc_scan_ch); 427 sc->amrr.amrr_min_success_threshold = 1; 428 sc->amrr.amrr_max_success_threshold = 15; 429 usb_callout_init(sc->sc_amrr_ch); 430 431 /* retrieve RT2570 rev. no */ 432 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 433 434 /* retrieve MAC address and various other things from EEPROM */ 435 ural_read_eeprom(sc); 436 437 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 438 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev)); 439 440 ifp->if_softc = sc; 441 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 442 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 443 ifp->if_init = ural_init; 444 ifp->if_ioctl = ural_ioctl; 445 ifp->if_start = ural_start; 446 ifp->if_watchdog = ural_watchdog; 447 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 448 IFQ_SET_READY(&ifp->if_snd); 449 450 ic->ic_ifp = ifp; 451 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 452 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 453 ic->ic_state = IEEE80211_S_INIT; 454 455 /* set device capabilities */ 456 ic->ic_caps = 457 IEEE80211_C_IBSS | /* IBSS mode supported */ 458 IEEE80211_C_MONITOR | /* monitor mode supported */ 459 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 460 IEEE80211_C_TXPMGT | /* tx power management */ 461 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 462 IEEE80211_C_SHSLOT | /* short slot time supported */ 463 IEEE80211_C_WPA; /* 802.11i */ 464 465 if (sc->rf_rev == RAL_RF_5222) { 466 /* set supported .11a rates */ 467 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 468 469 /* set supported .11a channels */ 470 for (i = 36; i <= 64; i += 4) { 471 ic->ic_channels[i].ic_freq = 472 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 473 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 474 } 475 for (i = 100; i <= 140; i += 4) { 476 ic->ic_channels[i].ic_freq = 477 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 478 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 479 } 480 for (i = 149; i <= 161; i += 4) { 481 ic->ic_channels[i].ic_freq = 482 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 483 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 484 } 485 } 486 487 /* set supported .11b and .11g rates */ 488 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 489 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 490 491 /* set supported .11b and .11g channels (1 through 14) */ 492 for (i = 1; i <= 14; i++) { 493 ic->ic_channels[i].ic_freq = 494 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 495 ic->ic_channels[i].ic_flags = 496 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 497 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 498 } 499 500 if_attach(ifp); 501 ieee80211_ifattach(ic); 502 ic->ic_reset = ural_reset; 503 504 /* override state transition machine */ 505 sc->sc_newstate = ic->ic_newstate; 506 ic->ic_newstate = ural_newstate; 507 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 508 509 #if NBPFILTER > 0 510 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 511 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 512 513 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 514 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 515 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 516 517 sc->sc_txtap_len = sizeof sc->sc_txtapu; 518 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 519 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 520 #endif 521 522 ieee80211_announce(ic); 523 524 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 525 USBDEV(sc->sc_dev)); 526 527 USB_ATTACH_SUCCESS_RETURN; 528 } 529 530 USB_DETACH(ural) 531 { 532 USB_DETACH_START(ural, sc); 533 struct ieee80211com *ic = &sc->sc_ic; 534 struct ifnet *ifp = &sc->sc_if; 535 int s; 536 537 s = splusb(); 538 539 ural_stop(ifp, 1); 540 usb_rem_task(sc->sc_udev, &sc->sc_task); 541 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc); 542 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc); 543 544 if (sc->amrr_xfer != NULL) { 545 usbd_free_xfer(sc->amrr_xfer); 546 sc->amrr_xfer = NULL; 547 } 548 549 if (sc->sc_rx_pipeh != NULL) { 550 usbd_abort_pipe(sc->sc_rx_pipeh); 551 usbd_close_pipe(sc->sc_rx_pipeh); 552 } 553 554 if (sc->sc_tx_pipeh != NULL) { 555 usbd_abort_pipe(sc->sc_tx_pipeh); 556 usbd_close_pipe(sc->sc_tx_pipeh); 557 } 558 559 #if NBPFILTER > 0 560 bpfdetach(ifp); 561 #endif 562 ieee80211_ifdetach(ic); 563 if_detach(ifp); 564 565 splx(s); 566 567 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 568 USBDEV(sc->sc_dev)); 569 570 return 0; 571 } 572 573 Static int 574 ural_alloc_tx_list(struct ural_softc *sc) 575 { 576 struct ural_tx_data *data; 577 int i, error; 578 579 sc->tx_queued = 0; 580 581 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 582 data = &sc->tx_data[i]; 583 584 data->sc = sc; 585 586 data->xfer = usbd_alloc_xfer(sc->sc_udev); 587 if (data->xfer == NULL) { 588 printf("%s: could not allocate tx xfer\n", 589 USBDEVNAME(sc->sc_dev)); 590 error = ENOMEM; 591 goto fail; 592 } 593 594 data->buf = usbd_alloc_buffer(data->xfer, 595 RAL_TX_DESC_SIZE + MCLBYTES); 596 if (data->buf == NULL) { 597 printf("%s: could not allocate tx buffer\n", 598 USBDEVNAME(sc->sc_dev)); 599 error = ENOMEM; 600 goto fail; 601 } 602 } 603 604 return 0; 605 606 fail: ural_free_tx_list(sc); 607 return error; 608 } 609 610 Static void 611 ural_free_tx_list(struct ural_softc *sc) 612 { 613 struct ural_tx_data *data; 614 int i; 615 616 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 617 data = &sc->tx_data[i]; 618 619 if (data->xfer != NULL) { 620 usbd_free_xfer(data->xfer); 621 data->xfer = NULL; 622 } 623 624 if (data->ni != NULL) { 625 ieee80211_free_node(data->ni); 626 data->ni = NULL; 627 } 628 } 629 } 630 631 Static int 632 ural_alloc_rx_list(struct ural_softc *sc) 633 { 634 struct ural_rx_data *data; 635 int i, error; 636 637 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 638 data = &sc->rx_data[i]; 639 640 data->sc = sc; 641 642 data->xfer = usbd_alloc_xfer(sc->sc_udev); 643 if (data->xfer == NULL) { 644 printf("%s: could not allocate rx xfer\n", 645 USBDEVNAME(sc->sc_dev)); 646 error = ENOMEM; 647 goto fail; 648 } 649 650 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 651 printf("%s: could not allocate rx buffer\n", 652 USBDEVNAME(sc->sc_dev)); 653 error = ENOMEM; 654 goto fail; 655 } 656 657 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 658 if (data->m == NULL) { 659 printf("%s: could not allocate rx mbuf\n", 660 USBDEVNAME(sc->sc_dev)); 661 error = ENOMEM; 662 goto fail; 663 } 664 665 MCLGET(data->m, M_DONTWAIT); 666 if (!(data->m->m_flags & M_EXT)) { 667 printf("%s: could not allocate rx mbuf cluster\n", 668 USBDEVNAME(sc->sc_dev)); 669 error = ENOMEM; 670 goto fail; 671 } 672 673 data->buf = mtod(data->m, uint8_t *); 674 } 675 676 return 0; 677 678 fail: ural_free_tx_list(sc); 679 return error; 680 } 681 682 Static void 683 ural_free_rx_list(struct ural_softc *sc) 684 { 685 struct ural_rx_data *data; 686 int i; 687 688 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 689 data = &sc->rx_data[i]; 690 691 if (data->xfer != NULL) { 692 usbd_free_xfer(data->xfer); 693 data->xfer = NULL; 694 } 695 696 if (data->m != NULL) { 697 m_freem(data->m); 698 data->m = NULL; 699 } 700 } 701 } 702 703 Static int 704 ural_media_change(struct ifnet *ifp) 705 { 706 int error; 707 708 error = ieee80211_media_change(ifp); 709 if (error != ENETRESET) 710 return error; 711 712 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 713 ural_init(ifp); 714 715 return 0; 716 } 717 718 /* 719 * This function is called periodically (every 200ms) during scanning to 720 * switch from one channel to another. 721 */ 722 Static void 723 ural_next_scan(void *arg) 724 { 725 struct ural_softc *sc = arg; 726 struct ieee80211com *ic = &sc->sc_ic; 727 728 if (ic->ic_state == IEEE80211_S_SCAN) 729 ieee80211_next_scan(ic); 730 } 731 732 Static void 733 ural_task(void *arg) 734 { 735 struct ural_softc *sc = arg; 736 struct ieee80211com *ic = &sc->sc_ic; 737 enum ieee80211_state ostate; 738 struct ieee80211_node *ni; 739 struct mbuf *m; 740 741 ostate = ic->ic_state; 742 743 switch (sc->sc_state) { 744 case IEEE80211_S_INIT: 745 if (ostate == IEEE80211_S_RUN) { 746 /* abort TSF synchronization */ 747 ural_write(sc, RAL_TXRX_CSR19, 0); 748 749 /* force tx led to stop blinking */ 750 ural_write(sc, RAL_MAC_CSR20, 0); 751 } 752 break; 753 754 case IEEE80211_S_SCAN: 755 ural_set_chan(sc, ic->ic_curchan); 756 usb_callout(sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 757 break; 758 759 case IEEE80211_S_AUTH: 760 ural_set_chan(sc, ic->ic_curchan); 761 break; 762 763 case IEEE80211_S_ASSOC: 764 ural_set_chan(sc, ic->ic_curchan); 765 break; 766 767 case IEEE80211_S_RUN: 768 ural_set_chan(sc, ic->ic_curchan); 769 770 ni = ic->ic_bss; 771 772 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 773 ural_update_slot(ic->ic_ifp); 774 ural_set_txpreamble(sc); 775 ural_set_basicrates(sc); 776 ural_set_bssid(sc, ni->ni_bssid); 777 } 778 779 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 780 ic->ic_opmode == IEEE80211_M_IBSS) { 781 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 782 if (m == NULL) { 783 printf("%s: could not allocate beacon\n", 784 USBDEVNAME(sc->sc_dev)); 785 return; 786 } 787 788 if (ural_tx_bcn(sc, m, ni) != 0) { 789 m_freem(m); 790 printf("%s: could not send beacon\n", 791 USBDEVNAME(sc->sc_dev)); 792 return; 793 } 794 795 /* beacon is no longer needed */ 796 m_freem(m); 797 } 798 799 /* make tx led blink on tx (controlled by ASIC) */ 800 ural_write(sc, RAL_MAC_CSR20, 1); 801 802 if (ic->ic_opmode != IEEE80211_M_MONITOR) 803 ural_enable_tsf_sync(sc); 804 805 /* enable automatic rate adaptation in STA mode */ 806 if (ic->ic_opmode == IEEE80211_M_STA && 807 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 808 ural_amrr_start(sc, ni); 809 810 break; 811 } 812 813 sc->sc_newstate(ic, sc->sc_state, -1); 814 } 815 816 Static int 817 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 818 int arg) 819 { 820 struct ural_softc *sc = ic->ic_ifp->if_softc; 821 822 usb_rem_task(sc->sc_udev, &sc->sc_task); 823 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc); 824 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc); 825 826 /* do it in a process context */ 827 sc->sc_state = nstate; 828 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 829 830 return 0; 831 } 832 833 /* quickly determine if a given rate is CCK or OFDM */ 834 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 835 836 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 837 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 838 839 #define RAL_SIFS 10 /* us */ 840 841 #define RAL_RXTX_TURNAROUND 5 /* us */ 842 843 /* 844 * This function is only used by the Rx radiotap code. 845 */ 846 Static int 847 ural_rxrate(struct ural_rx_desc *desc) 848 { 849 if (le32toh(desc->flags) & RAL_RX_OFDM) { 850 /* reverse function of ural_plcp_signal */ 851 switch (desc->rate) { 852 case 0xb: return 12; 853 case 0xf: return 18; 854 case 0xa: return 24; 855 case 0xe: return 36; 856 case 0x9: return 48; 857 case 0xd: return 72; 858 case 0x8: return 96; 859 case 0xc: return 108; 860 } 861 } else { 862 if (desc->rate == 10) 863 return 2; 864 if (desc->rate == 20) 865 return 4; 866 if (desc->rate == 55) 867 return 11; 868 if (desc->rate == 110) 869 return 22; 870 } 871 return 2; /* should not get there */ 872 } 873 874 Static void 875 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 876 usbd_status status) 877 { 878 struct ural_tx_data *data = priv; 879 struct ural_softc *sc = data->sc; 880 struct ifnet *ifp = &sc->sc_if; 881 int s; 882 883 if (status != USBD_NORMAL_COMPLETION) { 884 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 885 return; 886 887 printf("%s: could not transmit buffer: %s\n", 888 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 889 890 if (status == USBD_STALLED) 891 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 892 893 ifp->if_oerrors++; 894 return; 895 } 896 897 s = splnet(); 898 899 m_freem(data->m); 900 data->m = NULL; 901 ieee80211_free_node(data->ni); 902 data->ni = NULL; 903 904 sc->tx_queued--; 905 ifp->if_opackets++; 906 907 DPRINTFN(10, ("tx done\n")); 908 909 sc->sc_tx_timer = 0; 910 ifp->if_flags &= ~IFF_OACTIVE; 911 ural_start(ifp); 912 913 splx(s); 914 } 915 916 Static void 917 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 918 { 919 struct ural_rx_data *data = priv; 920 struct ural_softc *sc = data->sc; 921 struct ieee80211com *ic = &sc->sc_ic; 922 struct ifnet *ifp = &sc->sc_if; 923 struct ural_rx_desc *desc; 924 struct ieee80211_frame *wh; 925 struct ieee80211_node *ni; 926 struct mbuf *mnew, *m; 927 int s, len; 928 929 if (status != USBD_NORMAL_COMPLETION) { 930 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 931 return; 932 933 if (status == USBD_STALLED) 934 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 935 goto skip; 936 } 937 938 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 939 940 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 941 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 942 len)); 943 ifp->if_ierrors++; 944 goto skip; 945 } 946 947 /* rx descriptor is located at the end */ 948 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 949 950 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 951 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 952 /* 953 * This should not happen since we did not request to receive 954 * those frames when we filled RAL_TXRX_CSR2. 955 */ 956 DPRINTFN(5, ("PHY or CRC error\n")); 957 ifp->if_ierrors++; 958 goto skip; 959 } 960 961 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 962 if (mnew == NULL) { 963 ifp->if_ierrors++; 964 goto skip; 965 } 966 967 MCLGET(mnew, M_DONTWAIT); 968 if (!(mnew->m_flags & M_EXT)) { 969 ifp->if_ierrors++; 970 m_freem(mnew); 971 goto skip; 972 } 973 974 m = data->m; 975 data->m = mnew; 976 data->buf = mtod(data->m, uint8_t *); 977 978 /* finalize mbuf */ 979 m->m_pkthdr.rcvif = ifp; 980 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 981 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 982 983 s = splnet(); 984 985 #if NBPFILTER > 0 986 if (sc->sc_drvbpf != NULL) { 987 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 988 989 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 990 tap->wr_rate = ural_rxrate(desc); 991 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 992 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 993 tap->wr_antenna = sc->rx_ant; 994 tap->wr_antsignal = desc->rssi; 995 996 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 997 } 998 #endif 999 1000 wh = mtod(m, struct ieee80211_frame *); 1001 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1002 1003 /* send the frame to the 802.11 layer */ 1004 ieee80211_input(ic, m, ni, desc->rssi, 0); 1005 1006 /* node is no longer needed */ 1007 ieee80211_free_node(ni); 1008 1009 splx(s); 1010 1011 DPRINTFN(15, ("rx done\n")); 1012 1013 skip: /* setup a new transfer */ 1014 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1015 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1016 usbd_transfer(xfer); 1017 } 1018 1019 /* 1020 * Return the expected ack rate for a frame transmitted at rate `rate'. 1021 * XXX: this should depend on the destination node basic rate set. 1022 */ 1023 Static int 1024 ural_ack_rate(struct ieee80211com *ic, int rate) 1025 { 1026 switch (rate) { 1027 /* CCK rates */ 1028 case 2: 1029 return 2; 1030 case 4: 1031 case 11: 1032 case 22: 1033 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1034 1035 /* OFDM rates */ 1036 case 12: 1037 case 18: 1038 return 12; 1039 case 24: 1040 case 36: 1041 return 24; 1042 case 48: 1043 case 72: 1044 case 96: 1045 case 108: 1046 return 48; 1047 } 1048 1049 /* default to 1Mbps */ 1050 return 2; 1051 } 1052 1053 /* 1054 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1055 * The function automatically determines the operating mode depending on the 1056 * given rate. `flags' indicates whether short preamble is in use or not. 1057 */ 1058 Static uint16_t 1059 ural_txtime(int len, int rate, uint32_t flags) 1060 { 1061 uint16_t txtime; 1062 1063 if (RAL_RATE_IS_OFDM(rate)) { 1064 /* IEEE Std 802.11g-2003, pp. 37 */ 1065 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1066 txtime = 16 + 4 + 4 * txtime + 6; 1067 } else { 1068 /* IEEE Std 802.11b-1999, pp. 28 */ 1069 txtime = (16 * len + rate - 1) / rate; 1070 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1071 txtime += 72 + 24; 1072 else 1073 txtime += 144 + 48; 1074 } 1075 return txtime; 1076 } 1077 1078 Static uint8_t 1079 ural_plcp_signal(int rate) 1080 { 1081 switch (rate) { 1082 /* CCK rates (returned values are device-dependent) */ 1083 case 2: return 0x0; 1084 case 4: return 0x1; 1085 case 11: return 0x2; 1086 case 22: return 0x3; 1087 1088 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1089 case 12: return 0xb; 1090 case 18: return 0xf; 1091 case 24: return 0xa; 1092 case 36: return 0xe; 1093 case 48: return 0x9; 1094 case 72: return 0xd; 1095 case 96: return 0x8; 1096 case 108: return 0xc; 1097 1098 /* unsupported rates (should not get there) */ 1099 default: return 0xff; 1100 } 1101 } 1102 1103 Static void 1104 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1105 uint32_t flags, int len, int rate) 1106 { 1107 struct ieee80211com *ic = &sc->sc_ic; 1108 uint16_t plcp_length; 1109 int remainder; 1110 1111 desc->flags = htole32(flags); 1112 desc->flags |= htole32(RAL_TX_NEWSEQ); 1113 desc->flags |= htole32(len << 16); 1114 1115 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1116 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1117 1118 /* setup PLCP fields */ 1119 desc->plcp_signal = ural_plcp_signal(rate); 1120 desc->plcp_service = 4; 1121 1122 len += IEEE80211_CRC_LEN; 1123 if (RAL_RATE_IS_OFDM(rate)) { 1124 desc->flags |= htole32(RAL_TX_OFDM); 1125 1126 plcp_length = len & 0xfff; 1127 desc->plcp_length_hi = plcp_length >> 6; 1128 desc->plcp_length_lo = plcp_length & 0x3f; 1129 } else { 1130 plcp_length = (16 * len + rate - 1) / rate; 1131 if (rate == 22) { 1132 remainder = (16 * len) % 22; 1133 if (remainder != 0 && remainder < 7) 1134 desc->plcp_service |= RAL_PLCP_LENGEXT; 1135 } 1136 desc->plcp_length_hi = plcp_length >> 8; 1137 desc->plcp_length_lo = plcp_length & 0xff; 1138 1139 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1140 desc->plcp_signal |= 0x08; 1141 } 1142 1143 desc->iv = 0; 1144 desc->eiv = 0; 1145 } 1146 1147 #define RAL_TX_TIMEOUT 5000 1148 1149 Static int 1150 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1151 { 1152 struct ural_tx_desc *desc; 1153 usbd_xfer_handle xfer; 1154 uint8_t cmd = 0; 1155 usbd_status error; 1156 uint8_t *buf; 1157 int xferlen, rate; 1158 1159 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1160 1161 xfer = usbd_alloc_xfer(sc->sc_udev); 1162 if (xfer == NULL) 1163 return ENOMEM; 1164 1165 /* xfer length needs to be a multiple of two! */ 1166 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1167 1168 buf = usbd_alloc_buffer(xfer, xferlen); 1169 if (buf == NULL) { 1170 usbd_free_xfer(xfer); 1171 return ENOMEM; 1172 } 1173 1174 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1175 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1176 1177 error = usbd_sync_transfer(xfer); 1178 if (error != 0) { 1179 usbd_free_xfer(xfer); 1180 return error; 1181 } 1182 1183 desc = (struct ural_tx_desc *)buf; 1184 1185 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1186 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1187 m0->m_pkthdr.len, rate); 1188 1189 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1190 m0->m_pkthdr.len, rate, xferlen)); 1191 1192 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1193 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1194 1195 error = usbd_sync_transfer(xfer); 1196 usbd_free_xfer(xfer); 1197 1198 return error; 1199 } 1200 1201 Static int 1202 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1203 { 1204 struct ieee80211com *ic = &sc->sc_ic; 1205 struct ural_tx_desc *desc; 1206 struct ural_tx_data *data; 1207 struct ieee80211_frame *wh; 1208 struct ieee80211_key *k; 1209 uint32_t flags = 0; 1210 uint16_t dur; 1211 usbd_status error; 1212 int xferlen, rate; 1213 1214 data = &sc->tx_data[0]; 1215 desc = (struct ural_tx_desc *)data->buf; 1216 1217 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1218 1219 wh = mtod(m0, struct ieee80211_frame *); 1220 1221 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1222 k = ieee80211_crypto_encap(ic, ni, m0); 1223 if (k == NULL) { 1224 m_freem(m0); 1225 return ENOBUFS; 1226 } 1227 } 1228 1229 data->m = m0; 1230 data->ni = ni; 1231 1232 wh = mtod(m0, struct ieee80211_frame *); 1233 1234 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1235 flags |= RAL_TX_ACK; 1236 1237 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1238 *(uint16_t *)wh->i_dur = htole16(dur); 1239 1240 /* tell hardware to add timestamp for probe responses */ 1241 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1242 IEEE80211_FC0_TYPE_MGT && 1243 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1244 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1245 flags |= RAL_TX_TIMESTAMP; 1246 } 1247 1248 #if NBPFILTER > 0 1249 if (sc->sc_drvbpf != NULL) { 1250 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1251 1252 tap->wt_flags = 0; 1253 tap->wt_rate = rate; 1254 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1255 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1256 tap->wt_antenna = sc->tx_ant; 1257 1258 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1259 } 1260 #endif 1261 1262 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1263 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1264 1265 /* align end on a 2-bytes boundary */ 1266 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1267 1268 /* 1269 * No space left in the last URB to store the extra 2 bytes, force 1270 * sending of another URB. 1271 */ 1272 if ((xferlen % 64) == 0) 1273 xferlen += 2; 1274 1275 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1276 m0->m_pkthdr.len, rate, xferlen)); 1277 1278 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1279 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1280 ural_txeof); 1281 1282 error = usbd_transfer(data->xfer); 1283 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1284 m_freem(m0); 1285 return error; 1286 } 1287 1288 sc->tx_queued++; 1289 1290 return 0; 1291 } 1292 1293 Static int 1294 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1295 { 1296 struct ieee80211com *ic = &sc->sc_ic; 1297 struct ural_tx_desc *desc; 1298 struct ural_tx_data *data; 1299 struct ieee80211_frame *wh; 1300 struct ieee80211_key *k; 1301 uint32_t flags = 0; 1302 uint16_t dur; 1303 usbd_status error; 1304 int xferlen, rate; 1305 1306 wh = mtod(m0, struct ieee80211_frame *); 1307 1308 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1309 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1310 else 1311 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1312 1313 rate &= IEEE80211_RATE_VAL; 1314 1315 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1316 k = ieee80211_crypto_encap(ic, ni, m0); 1317 if (k == NULL) { 1318 m_freem(m0); 1319 return ENOBUFS; 1320 } 1321 1322 /* packet header may have moved, reset our local pointer */ 1323 wh = mtod(m0, struct ieee80211_frame *); 1324 } 1325 1326 data = &sc->tx_data[0]; 1327 desc = (struct ural_tx_desc *)data->buf; 1328 1329 data->m = m0; 1330 data->ni = ni; 1331 1332 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1333 flags |= RAL_TX_ACK; 1334 flags |= RAL_TX_RETRY(7); 1335 1336 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1337 ic->ic_flags) + RAL_SIFS; 1338 *(uint16_t *)wh->i_dur = htole16(dur); 1339 } 1340 1341 #if NBPFILTER > 0 1342 if (sc->sc_drvbpf != NULL) { 1343 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1344 1345 tap->wt_flags = 0; 1346 tap->wt_rate = rate; 1347 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1348 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1349 tap->wt_antenna = sc->tx_ant; 1350 1351 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1352 } 1353 #endif 1354 1355 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1356 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1357 1358 /* align end on a 2-bytes boundary */ 1359 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1360 1361 /* 1362 * No space left in the last URB to store the extra 2 bytes, force 1363 * sending of another URB. 1364 */ 1365 if ((xferlen % 64) == 0) 1366 xferlen += 2; 1367 1368 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1369 m0->m_pkthdr.len, rate, xferlen)); 1370 1371 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1372 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1373 ural_txeof); 1374 1375 error = usbd_transfer(data->xfer); 1376 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1377 return error; 1378 1379 sc->tx_queued++; 1380 1381 return 0; 1382 } 1383 1384 Static void 1385 ural_start(struct ifnet *ifp) 1386 { 1387 struct ural_softc *sc = ifp->if_softc; 1388 struct ieee80211com *ic = &sc->sc_ic; 1389 struct mbuf *m0; 1390 struct ether_header *eh; 1391 struct ieee80211_node *ni; 1392 1393 for (;;) { 1394 IF_POLL(&ic->ic_mgtq, m0); 1395 if (m0 != NULL) { 1396 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1397 ifp->if_flags |= IFF_OACTIVE; 1398 break; 1399 } 1400 IF_DEQUEUE(&ic->ic_mgtq, m0); 1401 1402 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1403 m0->m_pkthdr.rcvif = NULL; 1404 #if NBPFILTER > 0 1405 if (ic->ic_rawbpf != NULL) 1406 bpf_mtap(ic->ic_rawbpf, m0); 1407 #endif 1408 if (ural_tx_mgt(sc, m0, ni) != 0) 1409 break; 1410 1411 } else { 1412 if (ic->ic_state != IEEE80211_S_RUN) 1413 break; 1414 IFQ_DEQUEUE(&ifp->if_snd, m0); 1415 if (m0 == NULL) 1416 break; 1417 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1418 IF_PREPEND(&ifp->if_snd, m0); 1419 ifp->if_flags |= IFF_OACTIVE; 1420 break; 1421 } 1422 1423 if (m0->m_len < sizeof (struct ether_header) && 1424 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1425 continue; 1426 1427 eh = mtod(m0, struct ether_header *); 1428 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1429 if (ni == NULL) { 1430 m_freem(m0); 1431 continue; 1432 } 1433 #if NBPFILTER > 0 1434 if (ifp->if_bpf != NULL) 1435 bpf_mtap(ifp->if_bpf, m0); 1436 #endif 1437 m0 = ieee80211_encap(ic, m0, ni); 1438 if (m0 == NULL) { 1439 ieee80211_free_node(ni); 1440 continue; 1441 } 1442 #if NBPFILTER > 0 1443 if (ic->ic_rawbpf != NULL) 1444 bpf_mtap(ic->ic_rawbpf, m0); 1445 #endif 1446 if (ural_tx_data(sc, m0, ni) != 0) { 1447 ieee80211_free_node(ni); 1448 ifp->if_oerrors++; 1449 break; 1450 } 1451 } 1452 1453 sc->sc_tx_timer = 5; 1454 ifp->if_timer = 1; 1455 } 1456 } 1457 1458 Static void 1459 ural_watchdog(struct ifnet *ifp) 1460 { 1461 struct ural_softc *sc = ifp->if_softc; 1462 struct ieee80211com *ic = &sc->sc_ic; 1463 1464 ifp->if_timer = 0; 1465 1466 if (sc->sc_tx_timer > 0) { 1467 if (--sc->sc_tx_timer == 0) { 1468 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1469 /*ural_init(sc); XXX needs a process context! */ 1470 ifp->if_oerrors++; 1471 return; 1472 } 1473 ifp->if_timer = 1; 1474 } 1475 1476 ieee80211_watchdog(ic); 1477 } 1478 1479 /* 1480 * This function allows for fast channel switching in monitor mode (used by 1481 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1482 * generate a new beacon frame. 1483 */ 1484 Static int 1485 ural_reset(struct ifnet *ifp) 1486 { 1487 struct ural_softc *sc = ifp->if_softc; 1488 struct ieee80211com *ic = &sc->sc_ic; 1489 1490 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1491 return ENETRESET; 1492 1493 ural_set_chan(sc, ic->ic_curchan); 1494 1495 return 0; 1496 } 1497 1498 Static int 1499 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1500 { 1501 struct ural_softc *sc = ifp->if_softc; 1502 struct ieee80211com *ic = &sc->sc_ic; 1503 int s, error = 0; 1504 1505 s = splnet(); 1506 1507 switch (cmd) { 1508 case SIOCSIFFLAGS: 1509 if (ifp->if_flags & IFF_UP) { 1510 if (ifp->if_flags & IFF_RUNNING) 1511 ural_update_promisc(sc); 1512 else 1513 ural_init(ifp); 1514 } else { 1515 if (ifp->if_flags & IFF_RUNNING) 1516 ural_stop(ifp, 1); 1517 } 1518 break; 1519 1520 default: 1521 error = ieee80211_ioctl(ic, cmd, data); 1522 } 1523 1524 if (error == ENETRESET) { 1525 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1526 (IFF_UP | IFF_RUNNING)) 1527 ural_init(ifp); 1528 error = 0; 1529 } 1530 1531 splx(s); 1532 1533 return error; 1534 } 1535 1536 Static void 1537 ural_set_testmode(struct ural_softc *sc) 1538 { 1539 usb_device_request_t req; 1540 usbd_status error; 1541 1542 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1543 req.bRequest = RAL_VENDOR_REQUEST; 1544 USETW(req.wValue, 4); 1545 USETW(req.wIndex, 1); 1546 USETW(req.wLength, 0); 1547 1548 error = usbd_do_request(sc->sc_udev, &req, NULL); 1549 if (error != 0) { 1550 printf("%s: could not set test mode: %s\n", 1551 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1552 } 1553 } 1554 1555 Static void 1556 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1557 { 1558 usb_device_request_t req; 1559 usbd_status error; 1560 1561 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1562 req.bRequest = RAL_READ_EEPROM; 1563 USETW(req.wValue, 0); 1564 USETW(req.wIndex, addr); 1565 USETW(req.wLength, len); 1566 1567 error = usbd_do_request(sc->sc_udev, &req, buf); 1568 if (error != 0) { 1569 printf("%s: could not read EEPROM: %s\n", 1570 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1571 } 1572 } 1573 1574 Static uint16_t 1575 ural_read(struct ural_softc *sc, uint16_t reg) 1576 { 1577 usb_device_request_t req; 1578 usbd_status error; 1579 uint16_t val; 1580 1581 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1582 req.bRequest = RAL_READ_MAC; 1583 USETW(req.wValue, 0); 1584 USETW(req.wIndex, reg); 1585 USETW(req.wLength, sizeof (uint16_t)); 1586 1587 error = usbd_do_request(sc->sc_udev, &req, &val); 1588 if (error != 0) { 1589 printf("%s: could not read MAC register: %s\n", 1590 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1591 return 0; 1592 } 1593 1594 return le16toh(val); 1595 } 1596 1597 Static void 1598 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1599 { 1600 usb_device_request_t req; 1601 usbd_status error; 1602 1603 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1604 req.bRequest = RAL_READ_MULTI_MAC; 1605 USETW(req.wValue, 0); 1606 USETW(req.wIndex, reg); 1607 USETW(req.wLength, len); 1608 1609 error = usbd_do_request(sc->sc_udev, &req, buf); 1610 if (error != 0) { 1611 printf("%s: could not read MAC register: %s\n", 1612 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1613 } 1614 } 1615 1616 Static void 1617 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1618 { 1619 usb_device_request_t req; 1620 usbd_status error; 1621 1622 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1623 req.bRequest = RAL_WRITE_MAC; 1624 USETW(req.wValue, val); 1625 USETW(req.wIndex, reg); 1626 USETW(req.wLength, 0); 1627 1628 error = usbd_do_request(sc->sc_udev, &req, NULL); 1629 if (error != 0) { 1630 printf("%s: could not write MAC register: %s\n", 1631 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1632 } 1633 } 1634 1635 Static void 1636 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1637 { 1638 usb_device_request_t req; 1639 usbd_status error; 1640 1641 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1642 req.bRequest = RAL_WRITE_MULTI_MAC; 1643 USETW(req.wValue, 0); 1644 USETW(req.wIndex, reg); 1645 USETW(req.wLength, len); 1646 1647 error = usbd_do_request(sc->sc_udev, &req, buf); 1648 if (error != 0) { 1649 printf("%s: could not write MAC register: %s\n", 1650 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1651 } 1652 } 1653 1654 Static void 1655 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1656 { 1657 uint16_t tmp; 1658 int ntries; 1659 1660 for (ntries = 0; ntries < 5; ntries++) { 1661 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1662 break; 1663 } 1664 if (ntries == 5) { 1665 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1666 return; 1667 } 1668 1669 tmp = reg << 8 | val; 1670 ural_write(sc, RAL_PHY_CSR7, tmp); 1671 } 1672 1673 Static uint8_t 1674 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1675 { 1676 uint16_t val; 1677 int ntries; 1678 1679 val = RAL_BBP_WRITE | reg << 8; 1680 ural_write(sc, RAL_PHY_CSR7, val); 1681 1682 for (ntries = 0; ntries < 5; ntries++) { 1683 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1684 break; 1685 } 1686 if (ntries == 5) { 1687 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1688 return 0; 1689 } 1690 1691 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1692 } 1693 1694 Static void 1695 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1696 { 1697 uint32_t tmp; 1698 int ntries; 1699 1700 for (ntries = 0; ntries < 5; ntries++) { 1701 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1702 break; 1703 } 1704 if (ntries == 5) { 1705 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1706 return; 1707 } 1708 1709 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1710 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1711 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1712 1713 /* remember last written value in sc */ 1714 sc->rf_regs[reg] = val; 1715 1716 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1717 } 1718 1719 Static void 1720 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1721 { 1722 struct ieee80211com *ic = &sc->sc_ic; 1723 uint8_t power, tmp; 1724 u_int i, chan; 1725 1726 chan = ieee80211_chan2ieee(ic, c); 1727 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1728 return; 1729 1730 if (IEEE80211_IS_CHAN_2GHZ(c)) 1731 power = min(sc->txpow[chan - 1], 31); 1732 else 1733 power = 31; 1734 1735 /* adjust txpower using ifconfig settings */ 1736 power -= (100 - ic->ic_txpowlimit) / 8; 1737 1738 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1739 1740 switch (sc->rf_rev) { 1741 case RAL_RF_2522: 1742 ural_rf_write(sc, RAL_RF1, 0x00814); 1743 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1744 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1745 break; 1746 1747 case RAL_RF_2523: 1748 ural_rf_write(sc, RAL_RF1, 0x08804); 1749 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1750 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1751 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1752 break; 1753 1754 case RAL_RF_2524: 1755 ural_rf_write(sc, RAL_RF1, 0x0c808); 1756 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1757 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1758 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1759 break; 1760 1761 case RAL_RF_2525: 1762 ural_rf_write(sc, RAL_RF1, 0x08808); 1763 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1764 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1765 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1766 1767 ural_rf_write(sc, RAL_RF1, 0x08808); 1768 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1769 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1770 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1771 break; 1772 1773 case RAL_RF_2525E: 1774 ural_rf_write(sc, RAL_RF1, 0x08808); 1775 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1776 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1777 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1778 break; 1779 1780 case RAL_RF_2526: 1781 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1782 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1783 ural_rf_write(sc, RAL_RF1, 0x08804); 1784 1785 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1786 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1787 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1788 break; 1789 1790 /* dual-band RF */ 1791 case RAL_RF_5222: 1792 for (i = 0; ural_rf5222[i].chan != chan; i++); 1793 1794 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1795 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1796 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1797 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1798 break; 1799 } 1800 1801 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1802 ic->ic_state != IEEE80211_S_SCAN) { 1803 /* set Japan filter bit for channel 14 */ 1804 tmp = ural_bbp_read(sc, 70); 1805 1806 tmp &= ~RAL_JAPAN_FILTER; 1807 if (chan == 14) 1808 tmp |= RAL_JAPAN_FILTER; 1809 1810 ural_bbp_write(sc, 70, tmp); 1811 1812 /* clear CRC errors */ 1813 ural_read(sc, RAL_STA_CSR0); 1814 1815 DELAY(10000); 1816 ural_disable_rf_tune(sc); 1817 } 1818 } 1819 1820 /* 1821 * Disable RF auto-tuning. 1822 */ 1823 Static void 1824 ural_disable_rf_tune(struct ural_softc *sc) 1825 { 1826 uint32_t tmp; 1827 1828 if (sc->rf_rev != RAL_RF_2523) { 1829 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1830 ural_rf_write(sc, RAL_RF1, tmp); 1831 } 1832 1833 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1834 ural_rf_write(sc, RAL_RF3, tmp); 1835 1836 DPRINTFN(2, ("disabling RF autotune\n")); 1837 } 1838 1839 /* 1840 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1841 * synchronization. 1842 */ 1843 Static void 1844 ural_enable_tsf_sync(struct ural_softc *sc) 1845 { 1846 struct ieee80211com *ic = &sc->sc_ic; 1847 uint16_t logcwmin, preload, tmp; 1848 1849 /* first, disable TSF synchronization */ 1850 ural_write(sc, RAL_TXRX_CSR19, 0); 1851 1852 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1853 ural_write(sc, RAL_TXRX_CSR18, tmp); 1854 1855 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1856 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1857 tmp = logcwmin << 12 | preload; 1858 ural_write(sc, RAL_TXRX_CSR20, tmp); 1859 1860 /* finally, enable TSF synchronization */ 1861 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1862 if (ic->ic_opmode == IEEE80211_M_STA) 1863 tmp |= RAL_ENABLE_TSF_SYNC(1); 1864 else 1865 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1866 ural_write(sc, RAL_TXRX_CSR19, tmp); 1867 1868 DPRINTF(("enabling TSF synchronization\n")); 1869 } 1870 1871 Static void 1872 ural_update_slot(struct ifnet *ifp) 1873 { 1874 struct ural_softc *sc = ifp->if_softc; 1875 struct ieee80211com *ic = &sc->sc_ic; 1876 uint16_t slottime, sifs, eifs; 1877 1878 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1879 1880 /* 1881 * These settings may sound a bit inconsistent but this is what the 1882 * reference driver does. 1883 */ 1884 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1885 sifs = 16 - RAL_RXTX_TURNAROUND; 1886 eifs = 364; 1887 } else { 1888 sifs = 10 - RAL_RXTX_TURNAROUND; 1889 eifs = 64; 1890 } 1891 1892 ural_write(sc, RAL_MAC_CSR10, slottime); 1893 ural_write(sc, RAL_MAC_CSR11, sifs); 1894 ural_write(sc, RAL_MAC_CSR12, eifs); 1895 } 1896 1897 Static void 1898 ural_set_txpreamble(struct ural_softc *sc) 1899 { 1900 uint16_t tmp; 1901 1902 tmp = ural_read(sc, RAL_TXRX_CSR10); 1903 1904 tmp &= ~RAL_SHORT_PREAMBLE; 1905 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1906 tmp |= RAL_SHORT_PREAMBLE; 1907 1908 ural_write(sc, RAL_TXRX_CSR10, tmp); 1909 } 1910 1911 Static void 1912 ural_set_basicrates(struct ural_softc *sc) 1913 { 1914 struct ieee80211com *ic = &sc->sc_ic; 1915 1916 /* update basic rate set */ 1917 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1918 /* 11b basic rates: 1, 2Mbps */ 1919 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1920 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1921 /* 11a basic rates: 6, 12, 24Mbps */ 1922 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1923 } else { 1924 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1925 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1926 } 1927 } 1928 1929 Static void 1930 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1931 { 1932 uint16_t tmp; 1933 1934 tmp = bssid[0] | bssid[1] << 8; 1935 ural_write(sc, RAL_MAC_CSR5, tmp); 1936 1937 tmp = bssid[2] | bssid[3] << 8; 1938 ural_write(sc, RAL_MAC_CSR6, tmp); 1939 1940 tmp = bssid[4] | bssid[5] << 8; 1941 ural_write(sc, RAL_MAC_CSR7, tmp); 1942 1943 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1944 } 1945 1946 Static void 1947 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1948 { 1949 uint16_t tmp; 1950 1951 tmp = addr[0] | addr[1] << 8; 1952 ural_write(sc, RAL_MAC_CSR2, tmp); 1953 1954 tmp = addr[2] | addr[3] << 8; 1955 ural_write(sc, RAL_MAC_CSR3, tmp); 1956 1957 tmp = addr[4] | addr[5] << 8; 1958 ural_write(sc, RAL_MAC_CSR4, tmp); 1959 1960 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1961 } 1962 1963 Static void 1964 ural_update_promisc(struct ural_softc *sc) 1965 { 1966 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1967 uint32_t tmp; 1968 1969 tmp = ural_read(sc, RAL_TXRX_CSR2); 1970 1971 tmp &= ~RAL_DROP_NOT_TO_ME; 1972 if (!(ifp->if_flags & IFF_PROMISC)) 1973 tmp |= RAL_DROP_NOT_TO_ME; 1974 1975 ural_write(sc, RAL_TXRX_CSR2, tmp); 1976 1977 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1978 "entering" : "leaving")); 1979 } 1980 1981 Static const char * 1982 ural_get_rf(int rev) 1983 { 1984 switch (rev) { 1985 case RAL_RF_2522: return "RT2522"; 1986 case RAL_RF_2523: return "RT2523"; 1987 case RAL_RF_2524: return "RT2524"; 1988 case RAL_RF_2525: return "RT2525"; 1989 case RAL_RF_2525E: return "RT2525e"; 1990 case RAL_RF_2526: return "RT2526"; 1991 case RAL_RF_5222: return "RT5222"; 1992 default: return "unknown"; 1993 } 1994 } 1995 1996 Static void 1997 ural_read_eeprom(struct ural_softc *sc) 1998 { 1999 struct ieee80211com *ic = &sc->sc_ic; 2000 uint16_t val; 2001 2002 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2003 val = le16toh(val); 2004 sc->rf_rev = (val >> 11) & 0x7; 2005 sc->hw_radio = (val >> 10) & 0x1; 2006 sc->led_mode = (val >> 6) & 0x7; 2007 sc->rx_ant = (val >> 4) & 0x3; 2008 sc->tx_ant = (val >> 2) & 0x3; 2009 sc->nb_ant = val & 0x3; 2010 2011 /* read MAC address */ 2012 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2013 2014 /* read default values for BBP registers */ 2015 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2016 2017 /* read Tx power for all b/g channels */ 2018 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2019 } 2020 2021 Static int 2022 ural_bbp_init(struct ural_softc *sc) 2023 { 2024 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2025 int i, ntries; 2026 2027 /* wait for BBP to be ready */ 2028 for (ntries = 0; ntries < 100; ntries++) { 2029 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2030 break; 2031 DELAY(1000); 2032 } 2033 if (ntries == 100) { 2034 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 2035 return EIO; 2036 } 2037 2038 /* initialize BBP registers to default values */ 2039 for (i = 0; i < N(ural_def_bbp); i++) 2040 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2041 2042 #if 0 2043 /* initialize BBP registers to values stored in EEPROM */ 2044 for (i = 0; i < 16; i++) { 2045 if (sc->bbp_prom[i].reg == 0xff) 2046 continue; 2047 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2048 } 2049 #endif 2050 2051 return 0; 2052 #undef N 2053 } 2054 2055 Static void 2056 ural_set_txantenna(struct ural_softc *sc, int antenna) 2057 { 2058 uint16_t tmp; 2059 uint8_t tx; 2060 2061 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2062 if (antenna == 1) 2063 tx |= RAL_BBP_ANTA; 2064 else if (antenna == 2) 2065 tx |= RAL_BBP_ANTB; 2066 else 2067 tx |= RAL_BBP_DIVERSITY; 2068 2069 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2070 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2071 sc->rf_rev == RAL_RF_5222) 2072 tx |= RAL_BBP_FLIPIQ; 2073 2074 ural_bbp_write(sc, RAL_BBP_TX, tx); 2075 2076 /* update values in PHY_CSR5 and PHY_CSR6 */ 2077 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2078 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2079 2080 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2081 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2082 } 2083 2084 Static void 2085 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2086 { 2087 uint8_t rx; 2088 2089 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2090 if (antenna == 1) 2091 rx |= RAL_BBP_ANTA; 2092 else if (antenna == 2) 2093 rx |= RAL_BBP_ANTB; 2094 else 2095 rx |= RAL_BBP_DIVERSITY; 2096 2097 /* need to force no I/Q flip for RF 2525e and 2526 */ 2098 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2099 rx &= ~RAL_BBP_FLIPIQ; 2100 2101 ural_bbp_write(sc, RAL_BBP_RX, rx); 2102 } 2103 2104 Static int 2105 ural_init(struct ifnet *ifp) 2106 { 2107 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2108 struct ural_softc *sc = ifp->if_softc; 2109 struct ieee80211com *ic = &sc->sc_ic; 2110 struct ieee80211_key *wk; 2111 struct ural_rx_data *data; 2112 uint16_t tmp; 2113 usbd_status error; 2114 int i, ntries; 2115 2116 ural_set_testmode(sc); 2117 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2118 2119 ural_stop(ifp, 0); 2120 2121 /* initialize MAC registers to default values */ 2122 for (i = 0; i < N(ural_def_mac); i++) 2123 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2124 2125 /* wait for BBP and RF to wake up (this can take a long time!) */ 2126 for (ntries = 0; ntries < 100; ntries++) { 2127 tmp = ural_read(sc, RAL_MAC_CSR17); 2128 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2129 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2130 break; 2131 DELAY(1000); 2132 } 2133 if (ntries == 100) { 2134 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2135 USBDEVNAME(sc->sc_dev)); 2136 error = EIO; 2137 goto fail; 2138 } 2139 2140 /* we're ready! */ 2141 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2142 2143 /* set basic rate set (will be updated later) */ 2144 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2145 2146 error = ural_bbp_init(sc); 2147 if (error != 0) 2148 goto fail; 2149 2150 /* set default BSS channel */ 2151 ural_set_chan(sc, ic->ic_curchan); 2152 2153 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2154 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2155 2156 ural_set_txantenna(sc, sc->tx_ant); 2157 ural_set_rxantenna(sc, sc->rx_ant); 2158 2159 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2160 ural_set_macaddr(sc, ic->ic_myaddr); 2161 2162 /* 2163 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2164 */ 2165 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2166 wk = &ic->ic_crypto.cs_nw_keys[i]; 2167 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2168 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2169 } 2170 2171 /* 2172 * Allocate xfer for AMRR statistics requests. 2173 */ 2174 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2175 if (sc->amrr_xfer == NULL) { 2176 printf("%s: could not allocate AMRR xfer\n", 2177 USBDEVNAME(sc->sc_dev)); 2178 goto fail; 2179 } 2180 2181 /* 2182 * Open Tx and Rx USB bulk pipes. 2183 */ 2184 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2185 &sc->sc_tx_pipeh); 2186 if (error != 0) { 2187 printf("%s: could not open Tx pipe: %s\n", 2188 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2189 goto fail; 2190 } 2191 2192 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2193 &sc->sc_rx_pipeh); 2194 if (error != 0) { 2195 printf("%s: could not open Rx pipe: %s\n", 2196 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2197 goto fail; 2198 } 2199 2200 /* 2201 * Allocate Tx and Rx xfer queues. 2202 */ 2203 error = ural_alloc_tx_list(sc); 2204 if (error != 0) { 2205 printf("%s: could not allocate Tx list\n", 2206 USBDEVNAME(sc->sc_dev)); 2207 goto fail; 2208 } 2209 2210 error = ural_alloc_rx_list(sc); 2211 if (error != 0) { 2212 printf("%s: could not allocate Rx list\n", 2213 USBDEVNAME(sc->sc_dev)); 2214 goto fail; 2215 } 2216 2217 /* 2218 * Start up the receive pipe. 2219 */ 2220 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2221 data = &sc->rx_data[i]; 2222 2223 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2224 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2225 usbd_transfer(data->xfer); 2226 } 2227 2228 /* kick Rx */ 2229 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2230 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2231 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2232 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2233 tmp |= RAL_DROP_TODS; 2234 if (!(ifp->if_flags & IFF_PROMISC)) 2235 tmp |= RAL_DROP_NOT_TO_ME; 2236 } 2237 ural_write(sc, RAL_TXRX_CSR2, tmp); 2238 2239 ifp->if_flags &= ~IFF_OACTIVE; 2240 ifp->if_flags |= IFF_RUNNING; 2241 2242 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2243 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2244 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2245 } else 2246 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2247 2248 return 0; 2249 2250 fail: ural_stop(ifp, 1); 2251 return error; 2252 #undef N 2253 } 2254 2255 Static void 2256 ural_stop(struct ifnet *ifp, int disable) 2257 { 2258 struct ural_softc *sc = ifp->if_softc; 2259 struct ieee80211com *ic = &sc->sc_ic; 2260 2261 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2262 2263 sc->sc_tx_timer = 0; 2264 ifp->if_timer = 0; 2265 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2266 2267 /* disable Rx */ 2268 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2269 2270 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2271 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2272 ural_write(sc, RAL_MAC_CSR1, 0); 2273 2274 if (sc->amrr_xfer != NULL) { 2275 usbd_free_xfer(sc->amrr_xfer); 2276 sc->amrr_xfer = NULL; 2277 } 2278 2279 if (sc->sc_rx_pipeh != NULL) { 2280 usbd_abort_pipe(sc->sc_rx_pipeh); 2281 usbd_close_pipe(sc->sc_rx_pipeh); 2282 sc->sc_rx_pipeh = NULL; 2283 } 2284 2285 if (sc->sc_tx_pipeh != NULL) { 2286 usbd_abort_pipe(sc->sc_tx_pipeh); 2287 usbd_close_pipe(sc->sc_tx_pipeh); 2288 sc->sc_tx_pipeh = NULL; 2289 } 2290 2291 ural_free_rx_list(sc); 2292 ural_free_tx_list(sc); 2293 } 2294 2295 int 2296 ural_activate(device_ptr_t self, enum devact act) 2297 { 2298 struct ural_softc *sc = (struct ural_softc *)self; 2299 2300 switch (act) { 2301 case DVACT_ACTIVATE: 2302 return EOPNOTSUPP; 2303 break; 2304 2305 case DVACT_DEACTIVATE: 2306 if_deactivate(&sc->sc_if); 2307 break; 2308 } 2309 2310 return 0; 2311 } 2312 2313 Static void 2314 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2315 { 2316 int i; 2317 2318 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2319 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2320 2321 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2322 2323 /* set rate to some reasonable initial value */ 2324 for (i = ni->ni_rates.rs_nrates - 1; 2325 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2326 i--); 2327 ni->ni_txrate = i; 2328 2329 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2330 } 2331 2332 Static void 2333 ural_amrr_timeout(void *arg) 2334 { 2335 struct ural_softc *sc = (struct ural_softc *)arg; 2336 usb_device_request_t req; 2337 int s; 2338 2339 s = splusb(); 2340 2341 /* 2342 * Asynchronously read statistic registers (cleared by read). 2343 */ 2344 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2345 req.bRequest = RAL_READ_MULTI_MAC; 2346 USETW(req.wValue, 0); 2347 USETW(req.wIndex, RAL_STA_CSR0); 2348 USETW(req.wLength, sizeof sc->sta); 2349 2350 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2351 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2352 ural_amrr_update); 2353 (void)usbd_transfer(sc->amrr_xfer); 2354 2355 splx(s); 2356 } 2357 2358 Static void 2359 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2360 usbd_status status) 2361 { 2362 struct ural_softc *sc = (struct ural_softc *)priv; 2363 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2364 2365 if (status != USBD_NORMAL_COMPLETION) { 2366 printf("%s: could not retrieve Tx statistics - " 2367 "cancelling automatic rate control\n", 2368 USBDEVNAME(sc->sc_dev)); 2369 return; 2370 } 2371 2372 /* count TX retry-fail as Tx errors */ 2373 ifp->if_oerrors += sc->sta[9]; 2374 2375 sc->amn.amn_retrycnt = 2376 sc->sta[7] + /* TX one-retry ok count */ 2377 sc->sta[8] + /* TX more-retry ok count */ 2378 sc->sta[9]; /* TX retry-fail count */ 2379 2380 sc->amn.amn_txcnt = 2381 sc->amn.amn_retrycnt + 2382 sc->sta[6]; /* TX no-retry ok count */ 2383 2384 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2385 2386 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2387 } 2388
Indexes created Mon Sep 29 03:10:08 GMT 2025