if_ural.c revision 1.30
1 /* $NetBSD: if_ural.c,v 1.30 2008/05/24 16:40:58 cube Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.30 2008/05/24 16:40:58 cube Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/sysctl.h> 34 #include <sys/mbuf.h> 35 #include <sys/kernel.h> 36 #include <sys/socket.h> 37 #include <sys/systm.h> 38 #include <sys/malloc.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <sys/bus.h> 43 #include <machine/endian.h> 44 #include <sys/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 71 #include <dev/usb/if_uralreg.h> 72 #include <dev/usb/if_uralvar.h> 73 74 #ifdef USB_DEBUG 75 #define URAL_DEBUG 76 #endif 77 78 #ifdef URAL_DEBUG 79 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 81 int ural_debug = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n, x) 85 #endif 86 87 /* various supported device vendors/products */ 88 static const struct usb_devno ural_devs[] = { 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 95 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 96 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 97 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 98 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 101 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 102 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 104 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 105 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 106 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 107 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 108 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 109 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 110 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 111 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 112 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 113 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 114 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 115 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 116 }; 117 118 Static int ural_alloc_tx_list(struct ural_softc *); 119 Static void ural_free_tx_list(struct ural_softc *); 120 Static int ural_alloc_rx_list(struct ural_softc *); 121 Static void ural_free_rx_list(struct ural_softc *); 122 Static int ural_media_change(struct ifnet *); 123 Static void ural_next_scan(void *); 124 Static void ural_task(void *); 125 Static int ural_newstate(struct ieee80211com *, 126 enum ieee80211_state, int); 127 Static int ural_rxrate(struct ural_rx_desc *); 128 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 129 usbd_status); 130 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 131 usbd_status); 132 Static int ural_ack_rate(struct ieee80211com *, int); 133 Static uint16_t ural_txtime(int, int, uint32_t); 134 Static uint8_t ural_plcp_signal(int); 135 Static void ural_setup_tx_desc(struct ural_softc *, 136 struct ural_tx_desc *, uint32_t, int, int); 137 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 138 struct ieee80211_node *); 139 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 140 struct ieee80211_node *); 141 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 142 struct ieee80211_node *); 143 Static void ural_start(struct ifnet *); 144 Static void ural_watchdog(struct ifnet *); 145 Static int ural_reset(struct ifnet *); 146 Static int ural_ioctl(struct ifnet *, u_long, void *); 147 Static void ural_set_testmode(struct ural_softc *); 148 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 149 int); 150 Static uint16_t ural_read(struct ural_softc *, uint16_t); 151 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 152 int); 153 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 154 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 155 int); 156 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 157 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 158 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 159 Static void ural_set_chan(struct ural_softc *, 160 struct ieee80211_channel *); 161 Static void ural_disable_rf_tune(struct ural_softc *); 162 Static void ural_enable_tsf_sync(struct ural_softc *); 163 Static void ural_update_slot(struct ifnet *); 164 Static void ural_set_txpreamble(struct ural_softc *); 165 Static void ural_set_basicrates(struct ural_softc *); 166 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 167 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 168 Static void ural_update_promisc(struct ural_softc *); 169 Static const char *ural_get_rf(int); 170 Static void ural_read_eeprom(struct ural_softc *); 171 Static int ural_bbp_init(struct ural_softc *); 172 Static void ural_set_txantenna(struct ural_softc *, int); 173 Static void ural_set_rxantenna(struct ural_softc *, int); 174 Static int ural_init(struct ifnet *); 175 Static void ural_stop(struct ifnet *, int); 176 Static void ural_amrr_start(struct ural_softc *, 177 struct ieee80211_node *); 178 Static void ural_amrr_timeout(void *); 179 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 180 usbd_status status); 181 182 /* 183 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 184 */ 185 static const struct ieee80211_rateset ural_rateset_11a = 186 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 187 188 static const struct ieee80211_rateset ural_rateset_11b = 189 { 4, { 2, 4, 11, 22 } }; 190 191 static const struct ieee80211_rateset ural_rateset_11g = 192 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 193 194 /* 195 * Default values for MAC registers; values taken from the reference driver. 196 */ 197 static const struct { 198 uint16_t reg; 199 uint16_t val; 200 } ural_def_mac[] = { 201 { RAL_TXRX_CSR5, 0x8c8d }, 202 { RAL_TXRX_CSR6, 0x8b8a }, 203 { RAL_TXRX_CSR7, 0x8687 }, 204 { RAL_TXRX_CSR8, 0x0085 }, 205 { RAL_MAC_CSR13, 0x1111 }, 206 { RAL_MAC_CSR14, 0x1e11 }, 207 { RAL_TXRX_CSR21, 0xe78f }, 208 { RAL_MAC_CSR9, 0xff1d }, 209 { RAL_MAC_CSR11, 0x0002 }, 210 { RAL_MAC_CSR22, 0x0053 }, 211 { RAL_MAC_CSR15, 0x0000 }, 212 { RAL_MAC_CSR8, 0x0780 }, 213 { RAL_TXRX_CSR19, 0x0000 }, 214 { RAL_TXRX_CSR18, 0x005a }, 215 { RAL_PHY_CSR2, 0x0000 }, 216 { RAL_TXRX_CSR0, 0x1ec0 }, 217 { RAL_PHY_CSR4, 0x000f } 218 }; 219 220 /* 221 * Default values for BBP registers; values taken from the reference driver. 222 */ 223 static const struct { 224 uint8_t reg; 225 uint8_t val; 226 } ural_def_bbp[] = { 227 { 3, 0x02 }, 228 { 4, 0x19 }, 229 { 14, 0x1c }, 230 { 15, 0x30 }, 231 { 16, 0xac }, 232 { 17, 0x48 }, 233 { 18, 0x18 }, 234 { 19, 0xff }, 235 { 20, 0x1e }, 236 { 21, 0x08 }, 237 { 22, 0x08 }, 238 { 23, 0x08 }, 239 { 24, 0x80 }, 240 { 25, 0x50 }, 241 { 26, 0x08 }, 242 { 27, 0x23 }, 243 { 30, 0x10 }, 244 { 31, 0x2b }, 245 { 32, 0xb9 }, 246 { 34, 0x12 }, 247 { 35, 0x50 }, 248 { 39, 0xc4 }, 249 { 40, 0x02 }, 250 { 41, 0x60 }, 251 { 53, 0x10 }, 252 { 54, 0x18 }, 253 { 56, 0x08 }, 254 { 57, 0x10 }, 255 { 58, 0x08 }, 256 { 61, 0x60 }, 257 { 62, 0x10 }, 258 { 75, 0xff } 259 }; 260 261 /* 262 * Default values for RF register R2 indexed by channel numbers. 263 */ 264 static const uint32_t ural_rf2522_r2[] = { 265 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 266 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 267 }; 268 269 static const uint32_t ural_rf2523_r2[] = { 270 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 271 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 272 }; 273 274 static const uint32_t ural_rf2524_r2[] = { 275 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 276 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 277 }; 278 279 static const uint32_t ural_rf2525_r2[] = { 280 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 281 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 282 }; 283 284 static const uint32_t ural_rf2525_hi_r2[] = { 285 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 286 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 287 }; 288 289 static const uint32_t ural_rf2525e_r2[] = { 290 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 291 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 292 }; 293 294 static const uint32_t ural_rf2526_hi_r2[] = { 295 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 296 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 297 }; 298 299 static const uint32_t ural_rf2526_r2[] = { 300 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 301 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 302 }; 303 304 /* 305 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 306 * values taken from the reference driver. 307 */ 308 static const struct { 309 uint8_t chan; 310 uint32_t r1; 311 uint32_t r2; 312 uint32_t r4; 313 } ural_rf5222[] = { 314 { 1, 0x08808, 0x0044d, 0x00282 }, 315 { 2, 0x08808, 0x0044e, 0x00282 }, 316 { 3, 0x08808, 0x0044f, 0x00282 }, 317 { 4, 0x08808, 0x00460, 0x00282 }, 318 { 5, 0x08808, 0x00461, 0x00282 }, 319 { 6, 0x08808, 0x00462, 0x00282 }, 320 { 7, 0x08808, 0x00463, 0x00282 }, 321 { 8, 0x08808, 0x00464, 0x00282 }, 322 { 9, 0x08808, 0x00465, 0x00282 }, 323 { 10, 0x08808, 0x00466, 0x00282 }, 324 { 11, 0x08808, 0x00467, 0x00282 }, 325 { 12, 0x08808, 0x00468, 0x00282 }, 326 { 13, 0x08808, 0x00469, 0x00282 }, 327 { 14, 0x08808, 0x0046b, 0x00286 }, 328 329 { 36, 0x08804, 0x06225, 0x00287 }, 330 { 40, 0x08804, 0x06226, 0x00287 }, 331 { 44, 0x08804, 0x06227, 0x00287 }, 332 { 48, 0x08804, 0x06228, 0x00287 }, 333 { 52, 0x08804, 0x06229, 0x00287 }, 334 { 56, 0x08804, 0x0622a, 0x00287 }, 335 { 60, 0x08804, 0x0622b, 0x00287 }, 336 { 64, 0x08804, 0x0622c, 0x00287 }, 337 338 { 100, 0x08804, 0x02200, 0x00283 }, 339 { 104, 0x08804, 0x02201, 0x00283 }, 340 { 108, 0x08804, 0x02202, 0x00283 }, 341 { 112, 0x08804, 0x02203, 0x00283 }, 342 { 116, 0x08804, 0x02204, 0x00283 }, 343 { 120, 0x08804, 0x02205, 0x00283 }, 344 { 124, 0x08804, 0x02206, 0x00283 }, 345 { 128, 0x08804, 0x02207, 0x00283 }, 346 { 132, 0x08804, 0x02208, 0x00283 }, 347 { 136, 0x08804, 0x02209, 0x00283 }, 348 { 140, 0x08804, 0x0220a, 0x00283 }, 349 350 { 149, 0x08808, 0x02429, 0x00281 }, 351 { 153, 0x08808, 0x0242b, 0x00281 }, 352 { 157, 0x08808, 0x0242d, 0x00281 }, 353 { 161, 0x08808, 0x0242f, 0x00281 } 354 }; 355 356 USB_DECLARE_DRIVER(ural); 357 358 USB_MATCH(ural) 359 { 360 USB_MATCH_START(ural, uaa); 361 362 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 363 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 364 } 365 366 USB_ATTACH(ural) 367 { 368 USB_ATTACH_START(ural, sc, uaa); 369 struct ieee80211com *ic = &sc->sc_ic; 370 struct ifnet *ifp = &sc->sc_if; 371 usb_interface_descriptor_t *id; 372 usb_endpoint_descriptor_t *ed; 373 usbd_status error; 374 char *devinfop; 375 int i; 376 377 sc->sc_dev = self; 378 sc->sc_udev = uaa->device; 379 380 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 381 USB_ATTACH_SETUP; 382 aprint_normal_dev(self, "%s\n", devinfop); 383 usbd_devinfo_free(devinfop); 384 385 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 386 aprint_error_dev(self, "could not set configuration no\n"); 387 USB_ATTACH_ERROR_RETURN; 388 } 389 390 /* get the first interface handle */ 391 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 392 &sc->sc_iface); 393 if (error != 0) { 394 aprint_error_dev(self, "could not get interface handle\n"); 395 USB_ATTACH_ERROR_RETURN; 396 } 397 398 /* 399 * Find endpoints. 400 */ 401 id = usbd_get_interface_descriptor(sc->sc_iface); 402 403 sc->sc_rx_no = sc->sc_tx_no = -1; 404 for (i = 0; i < id->bNumEndpoints; i++) { 405 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 406 if (ed == NULL) { 407 aprint_error_dev(self, 408 "no endpoint descriptor for %d\n", i); 409 USB_ATTACH_ERROR_RETURN; 410 } 411 412 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 413 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 414 sc->sc_rx_no = ed->bEndpointAddress; 415 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 416 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 417 sc->sc_tx_no = ed->bEndpointAddress; 418 } 419 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 420 aprint_error_dev(self, "missing endpoint\n"); 421 USB_ATTACH_ERROR_RETURN; 422 } 423 424 usb_init_task(&sc->sc_task, ural_task, sc); 425 usb_callout_init(sc->sc_scan_ch); 426 sc->amrr.amrr_min_success_threshold = 1; 427 sc->amrr.amrr_max_success_threshold = 15; 428 usb_callout_init(sc->sc_amrr_ch); 429 430 /* retrieve RT2570 rev. no */ 431 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 432 433 /* retrieve MAC address and various other things from EEPROM */ 434 ural_read_eeprom(sc); 435 436 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 437 sc->asic_rev, ural_get_rf(sc->rf_rev)); 438 439 ifp->if_softc = sc; 440 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 441 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 442 ifp->if_init = ural_init; 443 ifp->if_ioctl = ural_ioctl; 444 ifp->if_start = ural_start; 445 ifp->if_watchdog = ural_watchdog; 446 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 447 IFQ_SET_READY(&ifp->if_snd); 448 449 ic->ic_ifp = ifp; 450 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 451 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 452 ic->ic_state = IEEE80211_S_INIT; 453 454 /* set device capabilities */ 455 ic->ic_caps = 456 IEEE80211_C_IBSS | /* IBSS mode supported */ 457 IEEE80211_C_MONITOR | /* monitor mode supported */ 458 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 459 IEEE80211_C_TXPMGT | /* tx power management */ 460 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 461 IEEE80211_C_SHSLOT | /* short slot time supported */ 462 IEEE80211_C_WPA; /* 802.11i */ 463 464 if (sc->rf_rev == RAL_RF_5222) { 465 /* set supported .11a rates */ 466 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 467 468 /* set supported .11a channels */ 469 for (i = 36; i <= 64; i += 4) { 470 ic->ic_channels[i].ic_freq = 471 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 472 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 473 } 474 for (i = 100; i <= 140; i += 4) { 475 ic->ic_channels[i].ic_freq = 476 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 477 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 478 } 479 for (i = 149; i <= 161; i += 4) { 480 ic->ic_channels[i].ic_freq = 481 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 482 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 483 } 484 } 485 486 /* set supported .11b and .11g rates */ 487 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 488 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 489 490 /* set supported .11b and .11g channels (1 through 14) */ 491 for (i = 1; i <= 14; i++) { 492 ic->ic_channels[i].ic_freq = 493 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 494 ic->ic_channels[i].ic_flags = 495 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 496 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 497 } 498 499 if_attach(ifp); 500 ieee80211_ifattach(ic); 501 ic->ic_reset = ural_reset; 502 503 /* override state transition machine */ 504 sc->sc_newstate = ic->ic_newstate; 505 ic->ic_newstate = ural_newstate; 506 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 507 508 #if NBPFILTER > 0 509 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 510 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 511 512 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 513 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 514 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 515 516 sc->sc_txtap_len = sizeof sc->sc_txtapu; 517 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 518 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 519 #endif 520 521 ieee80211_announce(ic); 522 523 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 524 USBDEV(sc->sc_dev)); 525 526 USB_ATTACH_SUCCESS_RETURN; 527 } 528 529 USB_DETACH(ural) 530 { 531 USB_DETACH_START(ural, sc); 532 struct ieee80211com *ic = &sc->sc_ic; 533 struct ifnet *ifp = &sc->sc_if; 534 int s; 535 536 s = splusb(); 537 538 ural_stop(ifp, 1); 539 usb_rem_task(sc->sc_udev, &sc->sc_task); 540 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc); 541 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc); 542 543 if (sc->amrr_xfer != NULL) { 544 usbd_free_xfer(sc->amrr_xfer); 545 sc->amrr_xfer = NULL; 546 } 547 548 if (sc->sc_rx_pipeh != NULL) { 549 usbd_abort_pipe(sc->sc_rx_pipeh); 550 usbd_close_pipe(sc->sc_rx_pipeh); 551 } 552 553 if (sc->sc_tx_pipeh != NULL) { 554 usbd_abort_pipe(sc->sc_tx_pipeh); 555 usbd_close_pipe(sc->sc_tx_pipeh); 556 } 557 558 #if NBPFILTER > 0 559 bpfdetach(ifp); 560 #endif 561 ieee80211_ifdetach(ic); 562 if_detach(ifp); 563 564 splx(s); 565 566 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 567 USBDEV(sc->sc_dev)); 568 569 return 0; 570 } 571 572 Static int 573 ural_alloc_tx_list(struct ural_softc *sc) 574 { 575 struct ural_tx_data *data; 576 int i, error; 577 578 sc->tx_queued = 0; 579 580 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 581 data = &sc->tx_data[i]; 582 583 data->sc = sc; 584 585 data->xfer = usbd_alloc_xfer(sc->sc_udev); 586 if (data->xfer == NULL) { 587 printf("%s: could not allocate tx xfer\n", 588 USBDEVNAME(sc->sc_dev)); 589 error = ENOMEM; 590 goto fail; 591 } 592 593 data->buf = usbd_alloc_buffer(data->xfer, 594 RAL_TX_DESC_SIZE + MCLBYTES); 595 if (data->buf == NULL) { 596 printf("%s: could not allocate tx buffer\n", 597 USBDEVNAME(sc->sc_dev)); 598 error = ENOMEM; 599 goto fail; 600 } 601 } 602 603 return 0; 604 605 fail: ural_free_tx_list(sc); 606 return error; 607 } 608 609 Static void 610 ural_free_tx_list(struct ural_softc *sc) 611 { 612 struct ural_tx_data *data; 613 int i; 614 615 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 616 data = &sc->tx_data[i]; 617 618 if (data->xfer != NULL) { 619 usbd_free_xfer(data->xfer); 620 data->xfer = NULL; 621 } 622 623 if (data->ni != NULL) { 624 ieee80211_free_node(data->ni); 625 data->ni = NULL; 626 } 627 } 628 } 629 630 Static int 631 ural_alloc_rx_list(struct ural_softc *sc) 632 { 633 struct ural_rx_data *data; 634 int i, error; 635 636 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 637 data = &sc->rx_data[i]; 638 639 data->sc = sc; 640 641 data->xfer = usbd_alloc_xfer(sc->sc_udev); 642 if (data->xfer == NULL) { 643 printf("%s: could not allocate rx xfer\n", 644 USBDEVNAME(sc->sc_dev)); 645 error = ENOMEM; 646 goto fail; 647 } 648 649 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 650 printf("%s: could not allocate rx buffer\n", 651 USBDEVNAME(sc->sc_dev)); 652 error = ENOMEM; 653 goto fail; 654 } 655 656 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 657 if (data->m == NULL) { 658 printf("%s: could not allocate rx mbuf\n", 659 USBDEVNAME(sc->sc_dev)); 660 error = ENOMEM; 661 goto fail; 662 } 663 664 MCLGET(data->m, M_DONTWAIT); 665 if (!(data->m->m_flags & M_EXT)) { 666 printf("%s: could not allocate rx mbuf cluster\n", 667 USBDEVNAME(sc->sc_dev)); 668 error = ENOMEM; 669 goto fail; 670 } 671 672 data->buf = mtod(data->m, uint8_t *); 673 } 674 675 return 0; 676 677 fail: ural_free_tx_list(sc); 678 return error; 679 } 680 681 Static void 682 ural_free_rx_list(struct ural_softc *sc) 683 { 684 struct ural_rx_data *data; 685 int i; 686 687 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 688 data = &sc->rx_data[i]; 689 690 if (data->xfer != NULL) { 691 usbd_free_xfer(data->xfer); 692 data->xfer = NULL; 693 } 694 695 if (data->m != NULL) { 696 m_freem(data->m); 697 data->m = NULL; 698 } 699 } 700 } 701 702 Static int 703 ural_media_change(struct ifnet *ifp) 704 { 705 int error; 706 707 error = ieee80211_media_change(ifp); 708 if (error != ENETRESET) 709 return error; 710 711 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 712 ural_init(ifp); 713 714 return 0; 715 } 716 717 /* 718 * This function is called periodically (every 200ms) during scanning to 719 * switch from one channel to another. 720 */ 721 Static void 722 ural_next_scan(void *arg) 723 { 724 struct ural_softc *sc = arg; 725 struct ieee80211com *ic = &sc->sc_ic; 726 727 if (ic->ic_state == IEEE80211_S_SCAN) 728 ieee80211_next_scan(ic); 729 } 730 731 Static void 732 ural_task(void *arg) 733 { 734 struct ural_softc *sc = arg; 735 struct ieee80211com *ic = &sc->sc_ic; 736 enum ieee80211_state ostate; 737 struct ieee80211_node *ni; 738 struct mbuf *m; 739 740 ostate = ic->ic_state; 741 742 switch (sc->sc_state) { 743 case IEEE80211_S_INIT: 744 if (ostate == IEEE80211_S_RUN) { 745 /* abort TSF synchronization */ 746 ural_write(sc, RAL_TXRX_CSR19, 0); 747 748 /* force tx led to stop blinking */ 749 ural_write(sc, RAL_MAC_CSR20, 0); 750 } 751 break; 752 753 case IEEE80211_S_SCAN: 754 ural_set_chan(sc, ic->ic_curchan); 755 usb_callout(sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 756 break; 757 758 case IEEE80211_S_AUTH: 759 ural_set_chan(sc, ic->ic_curchan); 760 break; 761 762 case IEEE80211_S_ASSOC: 763 ural_set_chan(sc, ic->ic_curchan); 764 break; 765 766 case IEEE80211_S_RUN: 767 ural_set_chan(sc, ic->ic_curchan); 768 769 ni = ic->ic_bss; 770 771 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 772 ural_update_slot(ic->ic_ifp); 773 ural_set_txpreamble(sc); 774 ural_set_basicrates(sc); 775 ural_set_bssid(sc, ni->ni_bssid); 776 } 777 778 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 779 ic->ic_opmode == IEEE80211_M_IBSS) { 780 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 781 if (m == NULL) { 782 printf("%s: could not allocate beacon\n", 783 USBDEVNAME(sc->sc_dev)); 784 return; 785 } 786 787 if (ural_tx_bcn(sc, m, ni) != 0) { 788 m_freem(m); 789 printf("%s: could not send beacon\n", 790 USBDEVNAME(sc->sc_dev)); 791 return; 792 } 793 794 /* beacon is no longer needed */ 795 m_freem(m); 796 } 797 798 /* make tx led blink on tx (controlled by ASIC) */ 799 ural_write(sc, RAL_MAC_CSR20, 1); 800 801 if (ic->ic_opmode != IEEE80211_M_MONITOR) 802 ural_enable_tsf_sync(sc); 803 804 /* enable automatic rate adaptation in STA mode */ 805 if (ic->ic_opmode == IEEE80211_M_STA && 806 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 807 ural_amrr_start(sc, ni); 808 809 break; 810 } 811 812 sc->sc_newstate(ic, sc->sc_state, -1); 813 } 814 815 Static int 816 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 817 int arg) 818 { 819 struct ural_softc *sc = ic->ic_ifp->if_softc; 820 821 usb_rem_task(sc->sc_udev, &sc->sc_task); 822 usb_uncallout(sc->sc_scan_ch, ural_next_scan, sc); 823 usb_uncallout(sc->sc_amrr_ch, ural_amrr_timeout, sc); 824 825 /* do it in a process context */ 826 sc->sc_state = nstate; 827 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 828 829 return 0; 830 } 831 832 /* quickly determine if a given rate is CCK or OFDM */ 833 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 834 835 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 836 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 837 838 #define RAL_SIFS 10 /* us */ 839 840 #define RAL_RXTX_TURNAROUND 5 /* us */ 841 842 /* 843 * This function is only used by the Rx radiotap code. 844 */ 845 Static int 846 ural_rxrate(struct ural_rx_desc *desc) 847 { 848 if (le32toh(desc->flags) & RAL_RX_OFDM) { 849 /* reverse function of ural_plcp_signal */ 850 switch (desc->rate) { 851 case 0xb: return 12; 852 case 0xf: return 18; 853 case 0xa: return 24; 854 case 0xe: return 36; 855 case 0x9: return 48; 856 case 0xd: return 72; 857 case 0x8: return 96; 858 case 0xc: return 108; 859 } 860 } else { 861 if (desc->rate == 10) 862 return 2; 863 if (desc->rate == 20) 864 return 4; 865 if (desc->rate == 55) 866 return 11; 867 if (desc->rate == 110) 868 return 22; 869 } 870 return 2; /* should not get there */ 871 } 872 873 Static void 874 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 875 usbd_status status) 876 { 877 struct ural_tx_data *data = priv; 878 struct ural_softc *sc = data->sc; 879 struct ifnet *ifp = &sc->sc_if; 880 int s; 881 882 if (status != USBD_NORMAL_COMPLETION) { 883 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 884 return; 885 886 printf("%s: could not transmit buffer: %s\n", 887 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 888 889 if (status == USBD_STALLED) 890 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 891 892 ifp->if_oerrors++; 893 return; 894 } 895 896 s = splnet(); 897 898 m_freem(data->m); 899 data->m = NULL; 900 ieee80211_free_node(data->ni); 901 data->ni = NULL; 902 903 sc->tx_queued--; 904 ifp->if_opackets++; 905 906 DPRINTFN(10, ("tx done\n")); 907 908 sc->sc_tx_timer = 0; 909 ifp->if_flags &= ~IFF_OACTIVE; 910 ural_start(ifp); 911 912 splx(s); 913 } 914 915 Static void 916 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 917 { 918 struct ural_rx_data *data = priv; 919 struct ural_softc *sc = data->sc; 920 struct ieee80211com *ic = &sc->sc_ic; 921 struct ifnet *ifp = &sc->sc_if; 922 struct ural_rx_desc *desc; 923 struct ieee80211_frame *wh; 924 struct ieee80211_node *ni; 925 struct mbuf *mnew, *m; 926 int s, len; 927 928 if (status != USBD_NORMAL_COMPLETION) { 929 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 930 return; 931 932 if (status == USBD_STALLED) 933 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 934 goto skip; 935 } 936 937 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 938 939 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 940 DPRINTF(("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), 941 len)); 942 ifp->if_ierrors++; 943 goto skip; 944 } 945 946 /* rx descriptor is located at the end */ 947 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 948 949 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 950 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 951 /* 952 * This should not happen since we did not request to receive 953 * those frames when we filled RAL_TXRX_CSR2. 954 */ 955 DPRINTFN(5, ("PHY or CRC error\n")); 956 ifp->if_ierrors++; 957 goto skip; 958 } 959 960 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 961 if (mnew == NULL) { 962 ifp->if_ierrors++; 963 goto skip; 964 } 965 966 MCLGET(mnew, M_DONTWAIT); 967 if (!(mnew->m_flags & M_EXT)) { 968 ifp->if_ierrors++; 969 m_freem(mnew); 970 goto skip; 971 } 972 973 m = data->m; 974 data->m = mnew; 975 data->buf = mtod(data->m, uint8_t *); 976 977 /* finalize mbuf */ 978 m->m_pkthdr.rcvif = ifp; 979 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 980 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 981 982 s = splnet(); 983 984 #if NBPFILTER > 0 985 if (sc->sc_drvbpf != NULL) { 986 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 987 988 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 989 tap->wr_rate = ural_rxrate(desc); 990 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 991 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 992 tap->wr_antenna = sc->rx_ant; 993 tap->wr_antsignal = desc->rssi; 994 995 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 996 } 997 #endif 998 999 wh = mtod(m, struct ieee80211_frame *); 1000 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1001 1002 /* send the frame to the 802.11 layer */ 1003 ieee80211_input(ic, m, ni, desc->rssi, 0); 1004 1005 /* node is no longer needed */ 1006 ieee80211_free_node(ni); 1007 1008 splx(s); 1009 1010 DPRINTFN(15, ("rx done\n")); 1011 1012 skip: /* setup a new transfer */ 1013 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1014 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1015 usbd_transfer(xfer); 1016 } 1017 1018 /* 1019 * Return the expected ack rate for a frame transmitted at rate `rate'. 1020 * XXX: this should depend on the destination node basic rate set. 1021 */ 1022 Static int 1023 ural_ack_rate(struct ieee80211com *ic, int rate) 1024 { 1025 switch (rate) { 1026 /* CCK rates */ 1027 case 2: 1028 return 2; 1029 case 4: 1030 case 11: 1031 case 22: 1032 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1033 1034 /* OFDM rates */ 1035 case 12: 1036 case 18: 1037 return 12; 1038 case 24: 1039 case 36: 1040 return 24; 1041 case 48: 1042 case 72: 1043 case 96: 1044 case 108: 1045 return 48; 1046 } 1047 1048 /* default to 1Mbps */ 1049 return 2; 1050 } 1051 1052 /* 1053 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1054 * The function automatically determines the operating mode depending on the 1055 * given rate. `flags' indicates whether short preamble is in use or not. 1056 */ 1057 Static uint16_t 1058 ural_txtime(int len, int rate, uint32_t flags) 1059 { 1060 uint16_t txtime; 1061 1062 if (RAL_RATE_IS_OFDM(rate)) { 1063 /* IEEE Std 802.11g-2003, pp. 37 */ 1064 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1065 txtime = 16 + 4 + 4 * txtime + 6; 1066 } else { 1067 /* IEEE Std 802.11b-1999, pp. 28 */ 1068 txtime = (16 * len + rate - 1) / rate; 1069 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1070 txtime += 72 + 24; 1071 else 1072 txtime += 144 + 48; 1073 } 1074 return txtime; 1075 } 1076 1077 Static uint8_t 1078 ural_plcp_signal(int rate) 1079 { 1080 switch (rate) { 1081 /* CCK rates (returned values are device-dependent) */ 1082 case 2: return 0x0; 1083 case 4: return 0x1; 1084 case 11: return 0x2; 1085 case 22: return 0x3; 1086 1087 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1088 case 12: return 0xb; 1089 case 18: return 0xf; 1090 case 24: return 0xa; 1091 case 36: return 0xe; 1092 case 48: return 0x9; 1093 case 72: return 0xd; 1094 case 96: return 0x8; 1095 case 108: return 0xc; 1096 1097 /* unsupported rates (should not get there) */ 1098 default: return 0xff; 1099 } 1100 } 1101 1102 Static void 1103 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1104 uint32_t flags, int len, int rate) 1105 { 1106 struct ieee80211com *ic = &sc->sc_ic; 1107 uint16_t plcp_length; 1108 int remainder; 1109 1110 desc->flags = htole32(flags); 1111 desc->flags |= htole32(RAL_TX_NEWSEQ); 1112 desc->flags |= htole32(len << 16); 1113 1114 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1115 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1116 1117 /* setup PLCP fields */ 1118 desc->plcp_signal = ural_plcp_signal(rate); 1119 desc->plcp_service = 4; 1120 1121 len += IEEE80211_CRC_LEN; 1122 if (RAL_RATE_IS_OFDM(rate)) { 1123 desc->flags |= htole32(RAL_TX_OFDM); 1124 1125 plcp_length = len & 0xfff; 1126 desc->plcp_length_hi = plcp_length >> 6; 1127 desc->plcp_length_lo = plcp_length & 0x3f; 1128 } else { 1129 plcp_length = (16 * len + rate - 1) / rate; 1130 if (rate == 22) { 1131 remainder = (16 * len) % 22; 1132 if (remainder != 0 && remainder < 7) 1133 desc->plcp_service |= RAL_PLCP_LENGEXT; 1134 } 1135 desc->plcp_length_hi = plcp_length >> 8; 1136 desc->plcp_length_lo = plcp_length & 0xff; 1137 1138 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1139 desc->plcp_signal |= 0x08; 1140 } 1141 1142 desc->iv = 0; 1143 desc->eiv = 0; 1144 } 1145 1146 #define RAL_TX_TIMEOUT 5000 1147 1148 Static int 1149 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1150 { 1151 struct ural_tx_desc *desc; 1152 usbd_xfer_handle xfer; 1153 uint8_t cmd = 0; 1154 usbd_status error; 1155 uint8_t *buf; 1156 int xferlen, rate; 1157 1158 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1159 1160 xfer = usbd_alloc_xfer(sc->sc_udev); 1161 if (xfer == NULL) 1162 return ENOMEM; 1163 1164 /* xfer length needs to be a multiple of two! */ 1165 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1166 1167 buf = usbd_alloc_buffer(xfer, xferlen); 1168 if (buf == NULL) { 1169 usbd_free_xfer(xfer); 1170 return ENOMEM; 1171 } 1172 1173 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1174 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1175 1176 error = usbd_sync_transfer(xfer); 1177 if (error != 0) { 1178 usbd_free_xfer(xfer); 1179 return error; 1180 } 1181 1182 desc = (struct ural_tx_desc *)buf; 1183 1184 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1185 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1186 m0->m_pkthdr.len, rate); 1187 1188 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1189 m0->m_pkthdr.len, rate, xferlen)); 1190 1191 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1192 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1193 1194 error = usbd_sync_transfer(xfer); 1195 usbd_free_xfer(xfer); 1196 1197 return error; 1198 } 1199 1200 Static int 1201 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1202 { 1203 struct ieee80211com *ic = &sc->sc_ic; 1204 struct ural_tx_desc *desc; 1205 struct ural_tx_data *data; 1206 struct ieee80211_frame *wh; 1207 struct ieee80211_key *k; 1208 uint32_t flags = 0; 1209 uint16_t dur; 1210 usbd_status error; 1211 int xferlen, rate; 1212 1213 data = &sc->tx_data[0]; 1214 desc = (struct ural_tx_desc *)data->buf; 1215 1216 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1217 1218 wh = mtod(m0, struct ieee80211_frame *); 1219 1220 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1221 k = ieee80211_crypto_encap(ic, ni, m0); 1222 if (k == NULL) { 1223 m_freem(m0); 1224 return ENOBUFS; 1225 } 1226 } 1227 1228 data->m = m0; 1229 data->ni = ni; 1230 1231 wh = mtod(m0, struct ieee80211_frame *); 1232 1233 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1234 flags |= RAL_TX_ACK; 1235 1236 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1237 *(uint16_t *)wh->i_dur = htole16(dur); 1238 1239 /* tell hardware to add timestamp for probe responses */ 1240 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1241 IEEE80211_FC0_TYPE_MGT && 1242 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1243 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1244 flags |= RAL_TX_TIMESTAMP; 1245 } 1246 1247 #if NBPFILTER > 0 1248 if (sc->sc_drvbpf != NULL) { 1249 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1250 1251 tap->wt_flags = 0; 1252 tap->wt_rate = rate; 1253 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1254 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1255 tap->wt_antenna = sc->tx_ant; 1256 1257 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1258 } 1259 #endif 1260 1261 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1262 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1263 1264 /* align end on a 2-bytes boundary */ 1265 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1266 1267 /* 1268 * No space left in the last URB to store the extra 2 bytes, force 1269 * sending of another URB. 1270 */ 1271 if ((xferlen % 64) == 0) 1272 xferlen += 2; 1273 1274 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1275 m0->m_pkthdr.len, rate, xferlen)); 1276 1277 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1278 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1279 ural_txeof); 1280 1281 error = usbd_transfer(data->xfer); 1282 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1283 m_freem(m0); 1284 return error; 1285 } 1286 1287 sc->tx_queued++; 1288 1289 return 0; 1290 } 1291 1292 Static int 1293 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1294 { 1295 struct ieee80211com *ic = &sc->sc_ic; 1296 struct ural_tx_desc *desc; 1297 struct ural_tx_data *data; 1298 struct ieee80211_frame *wh; 1299 struct ieee80211_key *k; 1300 uint32_t flags = 0; 1301 uint16_t dur; 1302 usbd_status error; 1303 int xferlen, rate; 1304 1305 wh = mtod(m0, struct ieee80211_frame *); 1306 1307 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1308 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1309 else 1310 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1311 1312 rate &= IEEE80211_RATE_VAL; 1313 1314 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1315 k = ieee80211_crypto_encap(ic, ni, m0); 1316 if (k == NULL) { 1317 m_freem(m0); 1318 return ENOBUFS; 1319 } 1320 1321 /* packet header may have moved, reset our local pointer */ 1322 wh = mtod(m0, struct ieee80211_frame *); 1323 } 1324 1325 data = &sc->tx_data[0]; 1326 desc = (struct ural_tx_desc *)data->buf; 1327 1328 data->m = m0; 1329 data->ni = ni; 1330 1331 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1332 flags |= RAL_TX_ACK; 1333 flags |= RAL_TX_RETRY(7); 1334 1335 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1336 ic->ic_flags) + RAL_SIFS; 1337 *(uint16_t *)wh->i_dur = htole16(dur); 1338 } 1339 1340 #if NBPFILTER > 0 1341 if (sc->sc_drvbpf != NULL) { 1342 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1343 1344 tap->wt_flags = 0; 1345 tap->wt_rate = rate; 1346 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1347 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1348 tap->wt_antenna = sc->tx_ant; 1349 1350 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1351 } 1352 #endif 1353 1354 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1355 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1356 1357 /* align end on a 2-bytes boundary */ 1358 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1359 1360 /* 1361 * No space left in the last URB to store the extra 2 bytes, force 1362 * sending of another URB. 1363 */ 1364 if ((xferlen % 64) == 0) 1365 xferlen += 2; 1366 1367 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1368 m0->m_pkthdr.len, rate, xferlen)); 1369 1370 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1371 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1372 ural_txeof); 1373 1374 error = usbd_transfer(data->xfer); 1375 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1376 return error; 1377 1378 sc->tx_queued++; 1379 1380 return 0; 1381 } 1382 1383 Static void 1384 ural_start(struct ifnet *ifp) 1385 { 1386 struct ural_softc *sc = ifp->if_softc; 1387 struct ieee80211com *ic = &sc->sc_ic; 1388 struct mbuf *m0; 1389 struct ether_header *eh; 1390 struct ieee80211_node *ni; 1391 1392 for (;;) { 1393 IF_POLL(&ic->ic_mgtq, m0); 1394 if (m0 != NULL) { 1395 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1396 ifp->if_flags |= IFF_OACTIVE; 1397 break; 1398 } 1399 IF_DEQUEUE(&ic->ic_mgtq, m0); 1400 1401 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1402 m0->m_pkthdr.rcvif = NULL; 1403 #if NBPFILTER > 0 1404 if (ic->ic_rawbpf != NULL) 1405 bpf_mtap(ic->ic_rawbpf, m0); 1406 #endif 1407 if (ural_tx_mgt(sc, m0, ni) != 0) 1408 break; 1409 1410 } else { 1411 if (ic->ic_state != IEEE80211_S_RUN) 1412 break; 1413 IFQ_DEQUEUE(&ifp->if_snd, m0); 1414 if (m0 == NULL) 1415 break; 1416 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1417 IF_PREPEND(&ifp->if_snd, m0); 1418 ifp->if_flags |= IFF_OACTIVE; 1419 break; 1420 } 1421 1422 if (m0->m_len < sizeof (struct ether_header) && 1423 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1424 continue; 1425 1426 eh = mtod(m0, struct ether_header *); 1427 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1428 if (ni == NULL) { 1429 m_freem(m0); 1430 continue; 1431 } 1432 #if NBPFILTER > 0 1433 if (ifp->if_bpf != NULL) 1434 bpf_mtap(ifp->if_bpf, m0); 1435 #endif 1436 m0 = ieee80211_encap(ic, m0, ni); 1437 if (m0 == NULL) { 1438 ieee80211_free_node(ni); 1439 continue; 1440 } 1441 #if NBPFILTER > 0 1442 if (ic->ic_rawbpf != NULL) 1443 bpf_mtap(ic->ic_rawbpf, m0); 1444 #endif 1445 if (ural_tx_data(sc, m0, ni) != 0) { 1446 ieee80211_free_node(ni); 1447 ifp->if_oerrors++; 1448 break; 1449 } 1450 } 1451 1452 sc->sc_tx_timer = 5; 1453 ifp->if_timer = 1; 1454 } 1455 } 1456 1457 Static void 1458 ural_watchdog(struct ifnet *ifp) 1459 { 1460 struct ural_softc *sc = ifp->if_softc; 1461 struct ieee80211com *ic = &sc->sc_ic; 1462 1463 ifp->if_timer = 0; 1464 1465 if (sc->sc_tx_timer > 0) { 1466 if (--sc->sc_tx_timer == 0) { 1467 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1468 /*ural_init(sc); XXX needs a process context! */ 1469 ifp->if_oerrors++; 1470 return; 1471 } 1472 ifp->if_timer = 1; 1473 } 1474 1475 ieee80211_watchdog(ic); 1476 } 1477 1478 /* 1479 * This function allows for fast channel switching in monitor mode (used by 1480 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1481 * generate a new beacon frame. 1482 */ 1483 Static int 1484 ural_reset(struct ifnet *ifp) 1485 { 1486 struct ural_softc *sc = ifp->if_softc; 1487 struct ieee80211com *ic = &sc->sc_ic; 1488 1489 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1490 return ENETRESET; 1491 1492 ural_set_chan(sc, ic->ic_curchan); 1493 1494 return 0; 1495 } 1496 1497 Static int 1498 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1499 { 1500 struct ural_softc *sc = ifp->if_softc; 1501 struct ieee80211com *ic = &sc->sc_ic; 1502 int s, error = 0; 1503 1504 s = splnet(); 1505 1506 switch (cmd) { 1507 case SIOCSIFFLAGS: 1508 if (ifp->if_flags & IFF_UP) { 1509 if (ifp->if_flags & IFF_RUNNING) 1510 ural_update_promisc(sc); 1511 else 1512 ural_init(ifp); 1513 } else { 1514 if (ifp->if_flags & IFF_RUNNING) 1515 ural_stop(ifp, 1); 1516 } 1517 break; 1518 1519 default: 1520 error = ieee80211_ioctl(ic, cmd, data); 1521 } 1522 1523 if (error == ENETRESET) { 1524 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1525 (IFF_UP | IFF_RUNNING)) 1526 ural_init(ifp); 1527 error = 0; 1528 } 1529 1530 splx(s); 1531 1532 return error; 1533 } 1534 1535 Static void 1536 ural_set_testmode(struct ural_softc *sc) 1537 { 1538 usb_device_request_t req; 1539 usbd_status error; 1540 1541 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1542 req.bRequest = RAL_VENDOR_REQUEST; 1543 USETW(req.wValue, 4); 1544 USETW(req.wIndex, 1); 1545 USETW(req.wLength, 0); 1546 1547 error = usbd_do_request(sc->sc_udev, &req, NULL); 1548 if (error != 0) { 1549 printf("%s: could not set test mode: %s\n", 1550 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1551 } 1552 } 1553 1554 Static void 1555 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1556 { 1557 usb_device_request_t req; 1558 usbd_status error; 1559 1560 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1561 req.bRequest = RAL_READ_EEPROM; 1562 USETW(req.wValue, 0); 1563 USETW(req.wIndex, addr); 1564 USETW(req.wLength, len); 1565 1566 error = usbd_do_request(sc->sc_udev, &req, buf); 1567 if (error != 0) { 1568 printf("%s: could not read EEPROM: %s\n", 1569 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1570 } 1571 } 1572 1573 Static uint16_t 1574 ural_read(struct ural_softc *sc, uint16_t reg) 1575 { 1576 usb_device_request_t req; 1577 usbd_status error; 1578 uint16_t val; 1579 1580 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1581 req.bRequest = RAL_READ_MAC; 1582 USETW(req.wValue, 0); 1583 USETW(req.wIndex, reg); 1584 USETW(req.wLength, sizeof (uint16_t)); 1585 1586 error = usbd_do_request(sc->sc_udev, &req, &val); 1587 if (error != 0) { 1588 printf("%s: could not read MAC register: %s\n", 1589 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1590 return 0; 1591 } 1592 1593 return le16toh(val); 1594 } 1595 1596 Static void 1597 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1598 { 1599 usb_device_request_t req; 1600 usbd_status error; 1601 1602 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1603 req.bRequest = RAL_READ_MULTI_MAC; 1604 USETW(req.wValue, 0); 1605 USETW(req.wIndex, reg); 1606 USETW(req.wLength, len); 1607 1608 error = usbd_do_request(sc->sc_udev, &req, buf); 1609 if (error != 0) { 1610 printf("%s: could not read MAC register: %s\n", 1611 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1612 } 1613 } 1614 1615 Static void 1616 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1617 { 1618 usb_device_request_t req; 1619 usbd_status error; 1620 1621 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1622 req.bRequest = RAL_WRITE_MAC; 1623 USETW(req.wValue, val); 1624 USETW(req.wIndex, reg); 1625 USETW(req.wLength, 0); 1626 1627 error = usbd_do_request(sc->sc_udev, &req, NULL); 1628 if (error != 0) { 1629 printf("%s: could not write MAC register: %s\n", 1630 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1631 } 1632 } 1633 1634 Static void 1635 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1636 { 1637 usb_device_request_t req; 1638 usbd_status error; 1639 1640 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1641 req.bRequest = RAL_WRITE_MULTI_MAC; 1642 USETW(req.wValue, 0); 1643 USETW(req.wIndex, reg); 1644 USETW(req.wLength, len); 1645 1646 error = usbd_do_request(sc->sc_udev, &req, buf); 1647 if (error != 0) { 1648 printf("%s: could not write MAC register: %s\n", 1649 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1650 } 1651 } 1652 1653 Static void 1654 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1655 { 1656 uint16_t tmp; 1657 int ntries; 1658 1659 for (ntries = 0; ntries < 5; ntries++) { 1660 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1661 break; 1662 } 1663 if (ntries == 5) { 1664 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1665 return; 1666 } 1667 1668 tmp = reg << 8 | val; 1669 ural_write(sc, RAL_PHY_CSR7, tmp); 1670 } 1671 1672 Static uint8_t 1673 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1674 { 1675 uint16_t val; 1676 int ntries; 1677 1678 val = RAL_BBP_WRITE | reg << 8; 1679 ural_write(sc, RAL_PHY_CSR7, val); 1680 1681 for (ntries = 0; ntries < 5; ntries++) { 1682 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1683 break; 1684 } 1685 if (ntries == 5) { 1686 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1687 return 0; 1688 } 1689 1690 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1691 } 1692 1693 Static void 1694 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1695 { 1696 uint32_t tmp; 1697 int ntries; 1698 1699 for (ntries = 0; ntries < 5; ntries++) { 1700 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1701 break; 1702 } 1703 if (ntries == 5) { 1704 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1705 return; 1706 } 1707 1708 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1709 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1710 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1711 1712 /* remember last written value in sc */ 1713 sc->rf_regs[reg] = val; 1714 1715 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1716 } 1717 1718 Static void 1719 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1720 { 1721 struct ieee80211com *ic = &sc->sc_ic; 1722 uint8_t power, tmp; 1723 u_int i, chan; 1724 1725 chan = ieee80211_chan2ieee(ic, c); 1726 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1727 return; 1728 1729 if (IEEE80211_IS_CHAN_2GHZ(c)) 1730 power = min(sc->txpow[chan - 1], 31); 1731 else 1732 power = 31; 1733 1734 /* adjust txpower using ifconfig settings */ 1735 power -= (100 - ic->ic_txpowlimit) / 8; 1736 1737 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1738 1739 switch (sc->rf_rev) { 1740 case RAL_RF_2522: 1741 ural_rf_write(sc, RAL_RF1, 0x00814); 1742 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1743 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1744 break; 1745 1746 case RAL_RF_2523: 1747 ural_rf_write(sc, RAL_RF1, 0x08804); 1748 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1749 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1750 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1751 break; 1752 1753 case RAL_RF_2524: 1754 ural_rf_write(sc, RAL_RF1, 0x0c808); 1755 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1756 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1757 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1758 break; 1759 1760 case RAL_RF_2525: 1761 ural_rf_write(sc, RAL_RF1, 0x08808); 1762 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1763 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1764 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1765 1766 ural_rf_write(sc, RAL_RF1, 0x08808); 1767 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1768 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1769 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1770 break; 1771 1772 case RAL_RF_2525E: 1773 ural_rf_write(sc, RAL_RF1, 0x08808); 1774 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1775 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1776 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1777 break; 1778 1779 case RAL_RF_2526: 1780 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1781 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1782 ural_rf_write(sc, RAL_RF1, 0x08804); 1783 1784 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1785 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1786 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1787 break; 1788 1789 /* dual-band RF */ 1790 case RAL_RF_5222: 1791 for (i = 0; ural_rf5222[i].chan != chan; i++); 1792 1793 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1794 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1795 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1796 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1797 break; 1798 } 1799 1800 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1801 ic->ic_state != IEEE80211_S_SCAN) { 1802 /* set Japan filter bit for channel 14 */ 1803 tmp = ural_bbp_read(sc, 70); 1804 1805 tmp &= ~RAL_JAPAN_FILTER; 1806 if (chan == 14) 1807 tmp |= RAL_JAPAN_FILTER; 1808 1809 ural_bbp_write(sc, 70, tmp); 1810 1811 /* clear CRC errors */ 1812 ural_read(sc, RAL_STA_CSR0); 1813 1814 DELAY(10000); 1815 ural_disable_rf_tune(sc); 1816 } 1817 } 1818 1819 /* 1820 * Disable RF auto-tuning. 1821 */ 1822 Static void 1823 ural_disable_rf_tune(struct ural_softc *sc) 1824 { 1825 uint32_t tmp; 1826 1827 if (sc->rf_rev != RAL_RF_2523) { 1828 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1829 ural_rf_write(sc, RAL_RF1, tmp); 1830 } 1831 1832 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1833 ural_rf_write(sc, RAL_RF3, tmp); 1834 1835 DPRINTFN(2, ("disabling RF autotune\n")); 1836 } 1837 1838 /* 1839 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1840 * synchronization. 1841 */ 1842 Static void 1843 ural_enable_tsf_sync(struct ural_softc *sc) 1844 { 1845 struct ieee80211com *ic = &sc->sc_ic; 1846 uint16_t logcwmin, preload, tmp; 1847 1848 /* first, disable TSF synchronization */ 1849 ural_write(sc, RAL_TXRX_CSR19, 0); 1850 1851 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1852 ural_write(sc, RAL_TXRX_CSR18, tmp); 1853 1854 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1855 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1856 tmp = logcwmin << 12 | preload; 1857 ural_write(sc, RAL_TXRX_CSR20, tmp); 1858 1859 /* finally, enable TSF synchronization */ 1860 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1861 if (ic->ic_opmode == IEEE80211_M_STA) 1862 tmp |= RAL_ENABLE_TSF_SYNC(1); 1863 else 1864 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1865 ural_write(sc, RAL_TXRX_CSR19, tmp); 1866 1867 DPRINTF(("enabling TSF synchronization\n")); 1868 } 1869 1870 Static void 1871 ural_update_slot(struct ifnet *ifp) 1872 { 1873 struct ural_softc *sc = ifp->if_softc; 1874 struct ieee80211com *ic = &sc->sc_ic; 1875 uint16_t slottime, sifs, eifs; 1876 1877 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1878 1879 /* 1880 * These settings may sound a bit inconsistent but this is what the 1881 * reference driver does. 1882 */ 1883 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1884 sifs = 16 - RAL_RXTX_TURNAROUND; 1885 eifs = 364; 1886 } else { 1887 sifs = 10 - RAL_RXTX_TURNAROUND; 1888 eifs = 64; 1889 } 1890 1891 ural_write(sc, RAL_MAC_CSR10, slottime); 1892 ural_write(sc, RAL_MAC_CSR11, sifs); 1893 ural_write(sc, RAL_MAC_CSR12, eifs); 1894 } 1895 1896 Static void 1897 ural_set_txpreamble(struct ural_softc *sc) 1898 { 1899 uint16_t tmp; 1900 1901 tmp = ural_read(sc, RAL_TXRX_CSR10); 1902 1903 tmp &= ~RAL_SHORT_PREAMBLE; 1904 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1905 tmp |= RAL_SHORT_PREAMBLE; 1906 1907 ural_write(sc, RAL_TXRX_CSR10, tmp); 1908 } 1909 1910 Static void 1911 ural_set_basicrates(struct ural_softc *sc) 1912 { 1913 struct ieee80211com *ic = &sc->sc_ic; 1914 1915 /* update basic rate set */ 1916 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1917 /* 11b basic rates: 1, 2Mbps */ 1918 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1919 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1920 /* 11a basic rates: 6, 12, 24Mbps */ 1921 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1922 } else { 1923 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1924 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1925 } 1926 } 1927 1928 Static void 1929 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1930 { 1931 uint16_t tmp; 1932 1933 tmp = bssid[0] | bssid[1] << 8; 1934 ural_write(sc, RAL_MAC_CSR5, tmp); 1935 1936 tmp = bssid[2] | bssid[3] << 8; 1937 ural_write(sc, RAL_MAC_CSR6, tmp); 1938 1939 tmp = bssid[4] | bssid[5] << 8; 1940 ural_write(sc, RAL_MAC_CSR7, tmp); 1941 1942 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1943 } 1944 1945 Static void 1946 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1947 { 1948 uint16_t tmp; 1949 1950 tmp = addr[0] | addr[1] << 8; 1951 ural_write(sc, RAL_MAC_CSR2, tmp); 1952 1953 tmp = addr[2] | addr[3] << 8; 1954 ural_write(sc, RAL_MAC_CSR3, tmp); 1955 1956 tmp = addr[4] | addr[5] << 8; 1957 ural_write(sc, RAL_MAC_CSR4, tmp); 1958 1959 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1960 } 1961 1962 Static void 1963 ural_update_promisc(struct ural_softc *sc) 1964 { 1965 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1966 uint32_t tmp; 1967 1968 tmp = ural_read(sc, RAL_TXRX_CSR2); 1969 1970 tmp &= ~RAL_DROP_NOT_TO_ME; 1971 if (!(ifp->if_flags & IFF_PROMISC)) 1972 tmp |= RAL_DROP_NOT_TO_ME; 1973 1974 ural_write(sc, RAL_TXRX_CSR2, tmp); 1975 1976 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1977 "entering" : "leaving")); 1978 } 1979 1980 Static const char * 1981 ural_get_rf(int rev) 1982 { 1983 switch (rev) { 1984 case RAL_RF_2522: return "RT2522"; 1985 case RAL_RF_2523: return "RT2523"; 1986 case RAL_RF_2524: return "RT2524"; 1987 case RAL_RF_2525: return "RT2525"; 1988 case RAL_RF_2525E: return "RT2525e"; 1989 case RAL_RF_2526: return "RT2526"; 1990 case RAL_RF_5222: return "RT5222"; 1991 default: return "unknown"; 1992 } 1993 } 1994 1995 Static void 1996 ural_read_eeprom(struct ural_softc *sc) 1997 { 1998 struct ieee80211com *ic = &sc->sc_ic; 1999 uint16_t val; 2000 2001 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2002 val = le16toh(val); 2003 sc->rf_rev = (val >> 11) & 0x7; 2004 sc->hw_radio = (val >> 10) & 0x1; 2005 sc->led_mode = (val >> 6) & 0x7; 2006 sc->rx_ant = (val >> 4) & 0x3; 2007 sc->tx_ant = (val >> 2) & 0x3; 2008 sc->nb_ant = val & 0x3; 2009 2010 /* read MAC address */ 2011 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2012 2013 /* read default values for BBP registers */ 2014 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2015 2016 /* read Tx power for all b/g channels */ 2017 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2018 } 2019 2020 Static int 2021 ural_bbp_init(struct ural_softc *sc) 2022 { 2023 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2024 int i, ntries; 2025 2026 /* wait for BBP to be ready */ 2027 for (ntries = 0; ntries < 100; ntries++) { 2028 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2029 break; 2030 DELAY(1000); 2031 } 2032 if (ntries == 100) { 2033 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 2034 return EIO; 2035 } 2036 2037 /* initialize BBP registers to default values */ 2038 for (i = 0; i < N(ural_def_bbp); i++) 2039 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2040 2041 #if 0 2042 /* initialize BBP registers to values stored in EEPROM */ 2043 for (i = 0; i < 16; i++) { 2044 if (sc->bbp_prom[i].reg == 0xff) 2045 continue; 2046 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2047 } 2048 #endif 2049 2050 return 0; 2051 #undef N 2052 } 2053 2054 Static void 2055 ural_set_txantenna(struct ural_softc *sc, int antenna) 2056 { 2057 uint16_t tmp; 2058 uint8_t tx; 2059 2060 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2061 if (antenna == 1) 2062 tx |= RAL_BBP_ANTA; 2063 else if (antenna == 2) 2064 tx |= RAL_BBP_ANTB; 2065 else 2066 tx |= RAL_BBP_DIVERSITY; 2067 2068 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2069 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2070 sc->rf_rev == RAL_RF_5222) 2071 tx |= RAL_BBP_FLIPIQ; 2072 2073 ural_bbp_write(sc, RAL_BBP_TX, tx); 2074 2075 /* update values in PHY_CSR5 and PHY_CSR6 */ 2076 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2077 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2078 2079 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2080 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2081 } 2082 2083 Static void 2084 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2085 { 2086 uint8_t rx; 2087 2088 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2089 if (antenna == 1) 2090 rx |= RAL_BBP_ANTA; 2091 else if (antenna == 2) 2092 rx |= RAL_BBP_ANTB; 2093 else 2094 rx |= RAL_BBP_DIVERSITY; 2095 2096 /* need to force no I/Q flip for RF 2525e and 2526 */ 2097 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2098 rx &= ~RAL_BBP_FLIPIQ; 2099 2100 ural_bbp_write(sc, RAL_BBP_RX, rx); 2101 } 2102 2103 Static int 2104 ural_init(struct ifnet *ifp) 2105 { 2106 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2107 struct ural_softc *sc = ifp->if_softc; 2108 struct ieee80211com *ic = &sc->sc_ic; 2109 struct ieee80211_key *wk; 2110 struct ural_rx_data *data; 2111 uint16_t tmp; 2112 usbd_status error; 2113 int i, ntries; 2114 2115 ural_set_testmode(sc); 2116 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2117 2118 ural_stop(ifp, 0); 2119 2120 /* initialize MAC registers to default values */ 2121 for (i = 0; i < N(ural_def_mac); i++) 2122 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2123 2124 /* wait for BBP and RF to wake up (this can take a long time!) */ 2125 for (ntries = 0; ntries < 100; ntries++) { 2126 tmp = ural_read(sc, RAL_MAC_CSR17); 2127 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2128 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2129 break; 2130 DELAY(1000); 2131 } 2132 if (ntries == 100) { 2133 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2134 USBDEVNAME(sc->sc_dev)); 2135 error = EIO; 2136 goto fail; 2137 } 2138 2139 /* we're ready! */ 2140 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2141 2142 /* set basic rate set (will be updated later) */ 2143 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2144 2145 error = ural_bbp_init(sc); 2146 if (error != 0) 2147 goto fail; 2148 2149 /* set default BSS channel */ 2150 ural_set_chan(sc, ic->ic_curchan); 2151 2152 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2153 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2154 2155 ural_set_txantenna(sc, sc->tx_ant); 2156 ural_set_rxantenna(sc, sc->rx_ant); 2157 2158 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2159 ural_set_macaddr(sc, ic->ic_myaddr); 2160 2161 /* 2162 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2163 */ 2164 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2165 wk = &ic->ic_crypto.cs_nw_keys[i]; 2166 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2167 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2168 } 2169 2170 /* 2171 * Allocate xfer for AMRR statistics requests. 2172 */ 2173 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2174 if (sc->amrr_xfer == NULL) { 2175 printf("%s: could not allocate AMRR xfer\n", 2176 USBDEVNAME(sc->sc_dev)); 2177 goto fail; 2178 } 2179 2180 /* 2181 * Open Tx and Rx USB bulk pipes. 2182 */ 2183 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2184 &sc->sc_tx_pipeh); 2185 if (error != 0) { 2186 printf("%s: could not open Tx pipe: %s\n", 2187 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2188 goto fail; 2189 } 2190 2191 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2192 &sc->sc_rx_pipeh); 2193 if (error != 0) { 2194 printf("%s: could not open Rx pipe: %s\n", 2195 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2196 goto fail; 2197 } 2198 2199 /* 2200 * Allocate Tx and Rx xfer queues. 2201 */ 2202 error = ural_alloc_tx_list(sc); 2203 if (error != 0) { 2204 printf("%s: could not allocate Tx list\n", 2205 USBDEVNAME(sc->sc_dev)); 2206 goto fail; 2207 } 2208 2209 error = ural_alloc_rx_list(sc); 2210 if (error != 0) { 2211 printf("%s: could not allocate Rx list\n", 2212 USBDEVNAME(sc->sc_dev)); 2213 goto fail; 2214 } 2215 2216 /* 2217 * Start up the receive pipe. 2218 */ 2219 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2220 data = &sc->rx_data[i]; 2221 2222 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2223 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2224 usbd_transfer(data->xfer); 2225 } 2226 2227 /* kick Rx */ 2228 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2229 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2230 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2231 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2232 tmp |= RAL_DROP_TODS; 2233 if (!(ifp->if_flags & IFF_PROMISC)) 2234 tmp |= RAL_DROP_NOT_TO_ME; 2235 } 2236 ural_write(sc, RAL_TXRX_CSR2, tmp); 2237 2238 ifp->if_flags &= ~IFF_OACTIVE; 2239 ifp->if_flags |= IFF_RUNNING; 2240 2241 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2242 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2243 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2244 } else 2245 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2246 2247 return 0; 2248 2249 fail: ural_stop(ifp, 1); 2250 return error; 2251 #undef N 2252 } 2253 2254 Static void 2255 ural_stop(struct ifnet *ifp, int disable) 2256 { 2257 struct ural_softc *sc = ifp->if_softc; 2258 struct ieee80211com *ic = &sc->sc_ic; 2259 2260 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2261 2262 sc->sc_tx_timer = 0; 2263 ifp->if_timer = 0; 2264 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2265 2266 /* disable Rx */ 2267 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2268 2269 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2270 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2271 ural_write(sc, RAL_MAC_CSR1, 0); 2272 2273 if (sc->amrr_xfer != NULL) { 2274 usbd_free_xfer(sc->amrr_xfer); 2275 sc->amrr_xfer = NULL; 2276 } 2277 2278 if (sc->sc_rx_pipeh != NULL) { 2279 usbd_abort_pipe(sc->sc_rx_pipeh); 2280 usbd_close_pipe(sc->sc_rx_pipeh); 2281 sc->sc_rx_pipeh = NULL; 2282 } 2283 2284 if (sc->sc_tx_pipeh != NULL) { 2285 usbd_abort_pipe(sc->sc_tx_pipeh); 2286 usbd_close_pipe(sc->sc_tx_pipeh); 2287 sc->sc_tx_pipeh = NULL; 2288 } 2289 2290 ural_free_rx_list(sc); 2291 ural_free_tx_list(sc); 2292 } 2293 2294 int 2295 ural_activate(device_ptr_t self, enum devact act) 2296 { 2297 struct ural_softc *sc = device_private(self); 2298 2299 switch (act) { 2300 case DVACT_ACTIVATE: 2301 return EOPNOTSUPP; 2302 break; 2303 2304 case DVACT_DEACTIVATE: 2305 if_deactivate(&sc->sc_if); 2306 break; 2307 } 2308 2309 return 0; 2310 } 2311 2312 Static void 2313 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2314 { 2315 int i; 2316 2317 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2318 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2319 2320 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2321 2322 /* set rate to some reasonable initial value */ 2323 for (i = ni->ni_rates.rs_nrates - 1; 2324 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2325 i--); 2326 ni->ni_txrate = i; 2327 2328 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2329 } 2330 2331 Static void 2332 ural_amrr_timeout(void *arg) 2333 { 2334 struct ural_softc *sc = (struct ural_softc *)arg; 2335 usb_device_request_t req; 2336 int s; 2337 2338 s = splusb(); 2339 2340 /* 2341 * Asynchronously read statistic registers (cleared by read). 2342 */ 2343 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2344 req.bRequest = RAL_READ_MULTI_MAC; 2345 USETW(req.wValue, 0); 2346 USETW(req.wIndex, RAL_STA_CSR0); 2347 USETW(req.wLength, sizeof sc->sta); 2348 2349 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2350 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2351 ural_amrr_update); 2352 (void)usbd_transfer(sc->amrr_xfer); 2353 2354 splx(s); 2355 } 2356 2357 Static void 2358 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2359 usbd_status status) 2360 { 2361 struct ural_softc *sc = (struct ural_softc *)priv; 2362 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2363 2364 if (status != USBD_NORMAL_COMPLETION) { 2365 printf("%s: could not retrieve Tx statistics - " 2366 "cancelling automatic rate control\n", 2367 USBDEVNAME(sc->sc_dev)); 2368 return; 2369 } 2370 2371 /* count TX retry-fail as Tx errors */ 2372 ifp->if_oerrors += sc->sta[9]; 2373 2374 sc->amn.amn_retrycnt = 2375 sc->sta[7] + /* TX one-retry ok count */ 2376 sc->sta[8] + /* TX more-retry ok count */ 2377 sc->sta[9]; /* TX retry-fail count */ 2378 2379 sc->amn.amn_txcnt = 2380 sc->amn.amn_retrycnt + 2381 sc->sta[6]; /* TX no-retry ok count */ 2382 2383 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2384 2385 usb_callout(sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2386 } 2387
Indexes created Mon Sep 29 21:09:56 GMT 2025