if_ural.c revision 1.37.4.1
1 /* $NetBSD: if_ural.c,v 1.37.4.1 2012/10/30 17:22:05 yamt Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.37.4.1 2012/10/30 17:22:05 yamt Exp $"); 28 29 30 #include <sys/param.h> 31 #include <sys/sockio.h> 32 #include <sys/sysctl.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_ether.h> 50 #include <net/if_media.h> 51 #include <net/if_types.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/ip.h> 57 58 #include <net80211/ieee80211_netbsd.h> 59 #include <net80211/ieee80211_var.h> 60 #include <net80211/ieee80211_amrr.h> 61 #include <net80211/ieee80211_radiotap.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdi_util.h> 66 #include <dev/usb/usbdevs.h> 67 68 #include <dev/usb/if_uralreg.h> 69 #include <dev/usb/if_uralvar.h> 70 71 #ifdef USB_DEBUG 72 #define URAL_DEBUG 73 #endif 74 75 #ifdef URAL_DEBUG 76 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 77 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 78 int ural_debug = 0; 79 #else 80 #define DPRINTF(x) 81 #define DPRINTFN(n, x) 82 #endif 83 84 /* various supported device vendors/products */ 85 static const struct usb_devno ural_devs[] = { 86 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 87 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 88 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 90 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 91 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 92 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 93 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 94 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 95 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 98 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 101 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 103 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 106 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 107 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 108 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 109 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 110 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 111 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 112 }; 113 114 Static int ural_alloc_tx_list(struct ural_softc *); 115 Static void ural_free_tx_list(struct ural_softc *); 116 Static int ural_alloc_rx_list(struct ural_softc *); 117 Static void ural_free_rx_list(struct ural_softc *); 118 Static int ural_media_change(struct ifnet *); 119 Static void ural_next_scan(void *); 120 Static void ural_task(void *); 121 Static int ural_newstate(struct ieee80211com *, 122 enum ieee80211_state, int); 123 Static int ural_rxrate(struct ural_rx_desc *); 124 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 125 usbd_status); 126 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 127 usbd_status); 128 Static int ural_ack_rate(struct ieee80211com *, int); 129 Static uint16_t ural_txtime(int, int, uint32_t); 130 Static uint8_t ural_plcp_signal(int); 131 Static void ural_setup_tx_desc(struct ural_softc *, 132 struct ural_tx_desc *, uint32_t, int, int); 133 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 138 struct ieee80211_node *); 139 Static void ural_start(struct ifnet *); 140 Static void ural_watchdog(struct ifnet *); 141 Static int ural_reset(struct ifnet *); 142 Static int ural_ioctl(struct ifnet *, u_long, void *); 143 Static void ural_set_testmode(struct ural_softc *); 144 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 145 int); 146 Static uint16_t ural_read(struct ural_softc *, uint16_t); 147 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 148 int); 149 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 150 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 151 int); 152 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 153 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 154 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 155 Static void ural_set_chan(struct ural_softc *, 156 struct ieee80211_channel *); 157 Static void ural_disable_rf_tune(struct ural_softc *); 158 Static void ural_enable_tsf_sync(struct ural_softc *); 159 Static void ural_update_slot(struct ifnet *); 160 Static void ural_set_txpreamble(struct ural_softc *); 161 Static void ural_set_basicrates(struct ural_softc *); 162 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 163 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 164 Static void ural_update_promisc(struct ural_softc *); 165 Static const char *ural_get_rf(int); 166 Static void ural_read_eeprom(struct ural_softc *); 167 Static int ural_bbp_init(struct ural_softc *); 168 Static void ural_set_txantenna(struct ural_softc *, int); 169 Static void ural_set_rxantenna(struct ural_softc *, int); 170 Static int ural_init(struct ifnet *); 171 Static void ural_stop(struct ifnet *, int); 172 Static void ural_amrr_start(struct ural_softc *, 173 struct ieee80211_node *); 174 Static void ural_amrr_timeout(void *); 175 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 176 usbd_status status); 177 178 /* 179 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 180 */ 181 static const struct ieee80211_rateset ural_rateset_11a = 182 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 183 184 static const struct ieee80211_rateset ural_rateset_11b = 185 { 4, { 2, 4, 11, 22 } }; 186 187 static const struct ieee80211_rateset ural_rateset_11g = 188 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 189 190 /* 191 * Default values for MAC registers; values taken from the reference driver. 192 */ 193 static const struct { 194 uint16_t reg; 195 uint16_t val; 196 } ural_def_mac[] = { 197 { RAL_TXRX_CSR5, 0x8c8d }, 198 { RAL_TXRX_CSR6, 0x8b8a }, 199 { RAL_TXRX_CSR7, 0x8687 }, 200 { RAL_TXRX_CSR8, 0x0085 }, 201 { RAL_MAC_CSR13, 0x1111 }, 202 { RAL_MAC_CSR14, 0x1e11 }, 203 { RAL_TXRX_CSR21, 0xe78f }, 204 { RAL_MAC_CSR9, 0xff1d }, 205 { RAL_MAC_CSR11, 0x0002 }, 206 { RAL_MAC_CSR22, 0x0053 }, 207 { RAL_MAC_CSR15, 0x0000 }, 208 { RAL_MAC_CSR8, 0x0780 }, 209 { RAL_TXRX_CSR19, 0x0000 }, 210 { RAL_TXRX_CSR18, 0x005a }, 211 { RAL_PHY_CSR2, 0x0000 }, 212 { RAL_TXRX_CSR0, 0x1ec0 }, 213 { RAL_PHY_CSR4, 0x000f } 214 }; 215 216 /* 217 * Default values for BBP registers; values taken from the reference driver. 218 */ 219 static const struct { 220 uint8_t reg; 221 uint8_t val; 222 } ural_def_bbp[] = { 223 { 3, 0x02 }, 224 { 4, 0x19 }, 225 { 14, 0x1c }, 226 { 15, 0x30 }, 227 { 16, 0xac }, 228 { 17, 0x48 }, 229 { 18, 0x18 }, 230 { 19, 0xff }, 231 { 20, 0x1e }, 232 { 21, 0x08 }, 233 { 22, 0x08 }, 234 { 23, 0x08 }, 235 { 24, 0x80 }, 236 { 25, 0x50 }, 237 { 26, 0x08 }, 238 { 27, 0x23 }, 239 { 30, 0x10 }, 240 { 31, 0x2b }, 241 { 32, 0xb9 }, 242 { 34, 0x12 }, 243 { 35, 0x50 }, 244 { 39, 0xc4 }, 245 { 40, 0x02 }, 246 { 41, 0x60 }, 247 { 53, 0x10 }, 248 { 54, 0x18 }, 249 { 56, 0x08 }, 250 { 57, 0x10 }, 251 { 58, 0x08 }, 252 { 61, 0x60 }, 253 { 62, 0x10 }, 254 { 75, 0xff } 255 }; 256 257 /* 258 * Default values for RF register R2 indexed by channel numbers. 259 */ 260 static const uint32_t ural_rf2522_r2[] = { 261 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 262 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 263 }; 264 265 static const uint32_t ural_rf2523_r2[] = { 266 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 267 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 268 }; 269 270 static const uint32_t ural_rf2524_r2[] = { 271 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 272 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 273 }; 274 275 static const uint32_t ural_rf2525_r2[] = { 276 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 277 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 278 }; 279 280 static const uint32_t ural_rf2525_hi_r2[] = { 281 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 282 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 283 }; 284 285 static const uint32_t ural_rf2525e_r2[] = { 286 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 287 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 288 }; 289 290 static const uint32_t ural_rf2526_hi_r2[] = { 291 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 292 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 293 }; 294 295 static const uint32_t ural_rf2526_r2[] = { 296 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 297 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 298 }; 299 300 /* 301 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 302 * values taken from the reference driver. 303 */ 304 static const struct { 305 uint8_t chan; 306 uint32_t r1; 307 uint32_t r2; 308 uint32_t r4; 309 } ural_rf5222[] = { 310 { 1, 0x08808, 0x0044d, 0x00282 }, 311 { 2, 0x08808, 0x0044e, 0x00282 }, 312 { 3, 0x08808, 0x0044f, 0x00282 }, 313 { 4, 0x08808, 0x00460, 0x00282 }, 314 { 5, 0x08808, 0x00461, 0x00282 }, 315 { 6, 0x08808, 0x00462, 0x00282 }, 316 { 7, 0x08808, 0x00463, 0x00282 }, 317 { 8, 0x08808, 0x00464, 0x00282 }, 318 { 9, 0x08808, 0x00465, 0x00282 }, 319 { 10, 0x08808, 0x00466, 0x00282 }, 320 { 11, 0x08808, 0x00467, 0x00282 }, 321 { 12, 0x08808, 0x00468, 0x00282 }, 322 { 13, 0x08808, 0x00469, 0x00282 }, 323 { 14, 0x08808, 0x0046b, 0x00286 }, 324 325 { 36, 0x08804, 0x06225, 0x00287 }, 326 { 40, 0x08804, 0x06226, 0x00287 }, 327 { 44, 0x08804, 0x06227, 0x00287 }, 328 { 48, 0x08804, 0x06228, 0x00287 }, 329 { 52, 0x08804, 0x06229, 0x00287 }, 330 { 56, 0x08804, 0x0622a, 0x00287 }, 331 { 60, 0x08804, 0x0622b, 0x00287 }, 332 { 64, 0x08804, 0x0622c, 0x00287 }, 333 334 { 100, 0x08804, 0x02200, 0x00283 }, 335 { 104, 0x08804, 0x02201, 0x00283 }, 336 { 108, 0x08804, 0x02202, 0x00283 }, 337 { 112, 0x08804, 0x02203, 0x00283 }, 338 { 116, 0x08804, 0x02204, 0x00283 }, 339 { 120, 0x08804, 0x02205, 0x00283 }, 340 { 124, 0x08804, 0x02206, 0x00283 }, 341 { 128, 0x08804, 0x02207, 0x00283 }, 342 { 132, 0x08804, 0x02208, 0x00283 }, 343 { 136, 0x08804, 0x02209, 0x00283 }, 344 { 140, 0x08804, 0x0220a, 0x00283 }, 345 346 { 149, 0x08808, 0x02429, 0x00281 }, 347 { 153, 0x08808, 0x0242b, 0x00281 }, 348 { 157, 0x08808, 0x0242d, 0x00281 }, 349 { 161, 0x08808, 0x0242f, 0x00281 } 350 }; 351 352 int ural_match(device_t, cfdata_t, void *); 353 void ural_attach(device_t, device_t, void *); 354 int ural_detach(device_t, int); 355 int ural_activate(device_t, enum devact); 356 extern struct cfdriver ural_cd; 357 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate); 358 359 int 360 ural_match(device_t parent, cfdata_t match, void *aux) 361 { 362 struct usb_attach_arg *uaa = aux; 363 364 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 365 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 366 } 367 368 void 369 ural_attach(device_t parent, device_t self, void *aux) 370 { 371 struct ural_softc *sc = device_private(self); 372 struct usb_attach_arg *uaa = aux; 373 struct ieee80211com *ic = &sc->sc_ic; 374 struct ifnet *ifp = &sc->sc_if; 375 usb_interface_descriptor_t *id; 376 usb_endpoint_descriptor_t *ed; 377 usbd_status error; 378 char *devinfop; 379 int i; 380 381 sc->sc_dev = self; 382 sc->sc_udev = uaa->device; 383 384 aprint_naive("\n"); 385 aprint_normal("\n"); 386 387 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 388 aprint_normal_dev(self, "%s\n", devinfop); 389 usbd_devinfo_free(devinfop); 390 391 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 392 aprint_error_dev(self, "could not set configuration no\n"); 393 return; 394 } 395 396 /* get the first interface handle */ 397 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 398 &sc->sc_iface); 399 if (error != 0) { 400 aprint_error_dev(self, "could not get interface handle\n"); 401 return; 402 } 403 404 /* 405 * Find endpoints. 406 */ 407 id = usbd_get_interface_descriptor(sc->sc_iface); 408 409 sc->sc_rx_no = sc->sc_tx_no = -1; 410 for (i = 0; i < id->bNumEndpoints; i++) { 411 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 412 if (ed == NULL) { 413 aprint_error_dev(self, 414 "no endpoint descriptor for %d\n", i); 415 return; 416 } 417 418 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 419 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 420 sc->sc_rx_no = ed->bEndpointAddress; 421 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 422 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 423 sc->sc_tx_no = ed->bEndpointAddress; 424 } 425 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 426 aprint_error_dev(self, "missing endpoint\n"); 427 return; 428 } 429 430 usb_init_task(&sc->sc_task, ural_task, sc); 431 callout_init(&sc->sc_scan_ch, 0); 432 sc->amrr.amrr_min_success_threshold = 1; 433 sc->amrr.amrr_max_success_threshold = 15; 434 callout_init(&sc->sc_amrr_ch, 0); 435 436 /* retrieve RT2570 rev. no */ 437 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 438 439 /* retrieve MAC address and various other things from EEPROM */ 440 ural_read_eeprom(sc); 441 442 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 443 sc->asic_rev, ural_get_rf(sc->rf_rev)); 444 445 ifp->if_softc = sc; 446 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 447 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 448 ifp->if_init = ural_init; 449 ifp->if_ioctl = ural_ioctl; 450 ifp->if_start = ural_start; 451 ifp->if_watchdog = ural_watchdog; 452 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 453 IFQ_SET_READY(&ifp->if_snd); 454 455 ic->ic_ifp = ifp; 456 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 457 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 458 ic->ic_state = IEEE80211_S_INIT; 459 460 /* set device capabilities */ 461 ic->ic_caps = 462 IEEE80211_C_IBSS | /* IBSS mode supported */ 463 IEEE80211_C_MONITOR | /* monitor mode supported */ 464 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 465 IEEE80211_C_TXPMGT | /* tx power management */ 466 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 467 IEEE80211_C_SHSLOT | /* short slot time supported */ 468 IEEE80211_C_WPA; /* 802.11i */ 469 470 if (sc->rf_rev == RAL_RF_5222) { 471 /* set supported .11a rates */ 472 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 473 474 /* set supported .11a channels */ 475 for (i = 36; i <= 64; i += 4) { 476 ic->ic_channels[i].ic_freq = 477 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 478 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 479 } 480 for (i = 100; i <= 140; i += 4) { 481 ic->ic_channels[i].ic_freq = 482 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 483 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 484 } 485 for (i = 149; i <= 161; i += 4) { 486 ic->ic_channels[i].ic_freq = 487 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 488 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 489 } 490 } 491 492 /* set supported .11b and .11g rates */ 493 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 494 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 495 496 /* set supported .11b and .11g channels (1 through 14) */ 497 for (i = 1; i <= 14; i++) { 498 ic->ic_channels[i].ic_freq = 499 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 500 ic->ic_channels[i].ic_flags = 501 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 502 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 503 } 504 505 if_attach(ifp); 506 ieee80211_ifattach(ic); 507 ic->ic_reset = ural_reset; 508 509 /* override state transition machine */ 510 sc->sc_newstate = ic->ic_newstate; 511 ic->ic_newstate = ural_newstate; 512 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 513 514 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 515 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 516 517 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 518 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 519 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 520 521 sc->sc_txtap_len = sizeof sc->sc_txtapu; 522 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 523 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 524 525 ieee80211_announce(ic); 526 527 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 528 sc->sc_dev); 529 530 return; 531 } 532 533 int 534 ural_detach(device_t self, int flags) 535 { 536 struct ural_softc *sc = device_private(self); 537 struct ieee80211com *ic = &sc->sc_ic; 538 struct ifnet *ifp = &sc->sc_if; 539 int s; 540 541 s = splusb(); 542 543 ural_stop(ifp, 1); 544 usb_rem_task(sc->sc_udev, &sc->sc_task); 545 callout_stop(&sc->sc_scan_ch); 546 callout_stop(&sc->sc_amrr_ch); 547 548 if (sc->amrr_xfer != NULL) { 549 usbd_free_xfer(sc->amrr_xfer); 550 sc->amrr_xfer = NULL; 551 } 552 553 if (sc->sc_rx_pipeh != NULL) { 554 usbd_abort_pipe(sc->sc_rx_pipeh); 555 usbd_close_pipe(sc->sc_rx_pipeh); 556 } 557 558 if (sc->sc_tx_pipeh != NULL) { 559 usbd_abort_pipe(sc->sc_tx_pipeh); 560 usbd_close_pipe(sc->sc_tx_pipeh); 561 } 562 563 bpf_detach(ifp); 564 ieee80211_ifdetach(ic); 565 if_detach(ifp); 566 567 splx(s); 568 569 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 570 sc->sc_dev); 571 572 return 0; 573 } 574 575 Static int 576 ural_alloc_tx_list(struct ural_softc *sc) 577 { 578 struct ural_tx_data *data; 579 int i, error; 580 581 sc->tx_queued = 0; 582 583 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 584 data = &sc->tx_data[i]; 585 586 data->sc = sc; 587 588 data->xfer = usbd_alloc_xfer(sc->sc_udev); 589 if (data->xfer == NULL) { 590 printf("%s: could not allocate tx xfer\n", 591 device_xname(sc->sc_dev)); 592 error = ENOMEM; 593 goto fail; 594 } 595 596 data->buf = usbd_alloc_buffer(data->xfer, 597 RAL_TX_DESC_SIZE + MCLBYTES); 598 if (data->buf == NULL) { 599 printf("%s: could not allocate tx buffer\n", 600 device_xname(sc->sc_dev)); 601 error = ENOMEM; 602 goto fail; 603 } 604 } 605 606 return 0; 607 608 fail: ural_free_tx_list(sc); 609 return error; 610 } 611 612 Static void 613 ural_free_tx_list(struct ural_softc *sc) 614 { 615 struct ural_tx_data *data; 616 int i; 617 618 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 619 data = &sc->tx_data[i]; 620 621 if (data->xfer != NULL) { 622 usbd_free_xfer(data->xfer); 623 data->xfer = NULL; 624 } 625 626 if (data->ni != NULL) { 627 ieee80211_free_node(data->ni); 628 data->ni = NULL; 629 } 630 } 631 } 632 633 Static int 634 ural_alloc_rx_list(struct ural_softc *sc) 635 { 636 struct ural_rx_data *data; 637 int i, error; 638 639 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 640 data = &sc->rx_data[i]; 641 642 data->sc = sc; 643 644 data->xfer = usbd_alloc_xfer(sc->sc_udev); 645 if (data->xfer == NULL) { 646 printf("%s: could not allocate rx xfer\n", 647 device_xname(sc->sc_dev)); 648 error = ENOMEM; 649 goto fail; 650 } 651 652 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 653 printf("%s: could not allocate rx buffer\n", 654 device_xname(sc->sc_dev)); 655 error = ENOMEM; 656 goto fail; 657 } 658 659 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 660 if (data->m == NULL) { 661 printf("%s: could not allocate rx mbuf\n", 662 device_xname(sc->sc_dev)); 663 error = ENOMEM; 664 goto fail; 665 } 666 667 MCLGET(data->m, M_DONTWAIT); 668 if (!(data->m->m_flags & M_EXT)) { 669 printf("%s: could not allocate rx mbuf cluster\n", 670 device_xname(sc->sc_dev)); 671 error = ENOMEM; 672 goto fail; 673 } 674 675 data->buf = mtod(data->m, uint8_t *); 676 } 677 678 return 0; 679 680 fail: ural_free_tx_list(sc); 681 return error; 682 } 683 684 Static void 685 ural_free_rx_list(struct ural_softc *sc) 686 { 687 struct ural_rx_data *data; 688 int i; 689 690 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 691 data = &sc->rx_data[i]; 692 693 if (data->xfer != NULL) { 694 usbd_free_xfer(data->xfer); 695 data->xfer = NULL; 696 } 697 698 if (data->m != NULL) { 699 m_freem(data->m); 700 data->m = NULL; 701 } 702 } 703 } 704 705 Static int 706 ural_media_change(struct ifnet *ifp) 707 { 708 int error; 709 710 error = ieee80211_media_change(ifp); 711 if (error != ENETRESET) 712 return error; 713 714 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 715 ural_init(ifp); 716 717 return 0; 718 } 719 720 /* 721 * This function is called periodically (every 200ms) during scanning to 722 * switch from one channel to another. 723 */ 724 Static void 725 ural_next_scan(void *arg) 726 { 727 struct ural_softc *sc = arg; 728 struct ieee80211com *ic = &sc->sc_ic; 729 730 if (ic->ic_state == IEEE80211_S_SCAN) 731 ieee80211_next_scan(ic); 732 } 733 734 Static void 735 ural_task(void *arg) 736 { 737 struct ural_softc *sc = arg; 738 struct ieee80211com *ic = &sc->sc_ic; 739 enum ieee80211_state ostate; 740 struct ieee80211_node *ni; 741 struct mbuf *m; 742 743 ostate = ic->ic_state; 744 745 switch (sc->sc_state) { 746 case IEEE80211_S_INIT: 747 if (ostate == IEEE80211_S_RUN) { 748 /* abort TSF synchronization */ 749 ural_write(sc, RAL_TXRX_CSR19, 0); 750 751 /* force tx led to stop blinking */ 752 ural_write(sc, RAL_MAC_CSR20, 0); 753 } 754 break; 755 756 case IEEE80211_S_SCAN: 757 ural_set_chan(sc, ic->ic_curchan); 758 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 759 break; 760 761 case IEEE80211_S_AUTH: 762 ural_set_chan(sc, ic->ic_curchan); 763 break; 764 765 case IEEE80211_S_ASSOC: 766 ural_set_chan(sc, ic->ic_curchan); 767 break; 768 769 case IEEE80211_S_RUN: 770 ural_set_chan(sc, ic->ic_curchan); 771 772 ni = ic->ic_bss; 773 774 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 775 ural_update_slot(ic->ic_ifp); 776 ural_set_txpreamble(sc); 777 ural_set_basicrates(sc); 778 ural_set_bssid(sc, ni->ni_bssid); 779 } 780 781 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 782 ic->ic_opmode == IEEE80211_M_IBSS) { 783 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 784 if (m == NULL) { 785 printf("%s: could not allocate beacon\n", 786 device_xname(sc->sc_dev)); 787 return; 788 } 789 790 if (ural_tx_bcn(sc, m, ni) != 0) { 791 m_freem(m); 792 printf("%s: could not send beacon\n", 793 device_xname(sc->sc_dev)); 794 return; 795 } 796 797 /* beacon is no longer needed */ 798 m_freem(m); 799 } 800 801 /* make tx led blink on tx (controlled by ASIC) */ 802 ural_write(sc, RAL_MAC_CSR20, 1); 803 804 if (ic->ic_opmode != IEEE80211_M_MONITOR) 805 ural_enable_tsf_sync(sc); 806 807 /* enable automatic rate adaptation in STA mode */ 808 if (ic->ic_opmode == IEEE80211_M_STA && 809 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 810 ural_amrr_start(sc, ni); 811 812 break; 813 } 814 815 sc->sc_newstate(ic, sc->sc_state, -1); 816 } 817 818 Static int 819 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 820 int arg) 821 { 822 struct ural_softc *sc = ic->ic_ifp->if_softc; 823 824 usb_rem_task(sc->sc_udev, &sc->sc_task); 825 callout_stop(&sc->sc_scan_ch); 826 callout_stop(&sc->sc_amrr_ch); 827 828 /* do it in a process context */ 829 sc->sc_state = nstate; 830 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 831 832 return 0; 833 } 834 835 /* quickly determine if a given rate is CCK or OFDM */ 836 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 837 838 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 839 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 840 841 #define RAL_SIFS 10 /* us */ 842 843 #define RAL_RXTX_TURNAROUND 5 /* us */ 844 845 /* 846 * This function is only used by the Rx radiotap code. 847 */ 848 Static int 849 ural_rxrate(struct ural_rx_desc *desc) 850 { 851 if (le32toh(desc->flags) & RAL_RX_OFDM) { 852 /* reverse function of ural_plcp_signal */ 853 switch (desc->rate) { 854 case 0xb: return 12; 855 case 0xf: return 18; 856 case 0xa: return 24; 857 case 0xe: return 36; 858 case 0x9: return 48; 859 case 0xd: return 72; 860 case 0x8: return 96; 861 case 0xc: return 108; 862 } 863 } else { 864 if (desc->rate == 10) 865 return 2; 866 if (desc->rate == 20) 867 return 4; 868 if (desc->rate == 55) 869 return 11; 870 if (desc->rate == 110) 871 return 22; 872 } 873 return 2; /* should not get there */ 874 } 875 876 Static void 877 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 878 usbd_status status) 879 { 880 struct ural_tx_data *data = priv; 881 struct ural_softc *sc = data->sc; 882 struct ifnet *ifp = &sc->sc_if; 883 int s; 884 885 if (status != USBD_NORMAL_COMPLETION) { 886 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 887 return; 888 889 printf("%s: could not transmit buffer: %s\n", 890 device_xname(sc->sc_dev), usbd_errstr(status)); 891 892 if (status == USBD_STALLED) 893 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 894 895 ifp->if_oerrors++; 896 return; 897 } 898 899 s = splnet(); 900 901 m_freem(data->m); 902 data->m = NULL; 903 ieee80211_free_node(data->ni); 904 data->ni = NULL; 905 906 sc->tx_queued--; 907 ifp->if_opackets++; 908 909 DPRINTFN(10, ("tx done\n")); 910 911 sc->sc_tx_timer = 0; 912 ifp->if_flags &= ~IFF_OACTIVE; 913 ural_start(ifp); 914 915 splx(s); 916 } 917 918 Static void 919 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 920 { 921 struct ural_rx_data *data = priv; 922 struct ural_softc *sc = data->sc; 923 struct ieee80211com *ic = &sc->sc_ic; 924 struct ifnet *ifp = &sc->sc_if; 925 struct ural_rx_desc *desc; 926 struct ieee80211_frame *wh; 927 struct ieee80211_node *ni; 928 struct mbuf *mnew, *m; 929 int s, len; 930 931 if (status != USBD_NORMAL_COMPLETION) { 932 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 933 return; 934 935 if (status == USBD_STALLED) 936 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 937 goto skip; 938 } 939 940 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 941 942 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 943 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 944 len)); 945 ifp->if_ierrors++; 946 goto skip; 947 } 948 949 /* rx descriptor is located at the end */ 950 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 951 952 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 953 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 954 /* 955 * This should not happen since we did not request to receive 956 * those frames when we filled RAL_TXRX_CSR2. 957 */ 958 DPRINTFN(5, ("PHY or CRC error\n")); 959 ifp->if_ierrors++; 960 goto skip; 961 } 962 963 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 964 if (mnew == NULL) { 965 ifp->if_ierrors++; 966 goto skip; 967 } 968 969 MCLGET(mnew, M_DONTWAIT); 970 if (!(mnew->m_flags & M_EXT)) { 971 ifp->if_ierrors++; 972 m_freem(mnew); 973 goto skip; 974 } 975 976 m = data->m; 977 data->m = mnew; 978 data->buf = mtod(data->m, uint8_t *); 979 980 /* finalize mbuf */ 981 m->m_pkthdr.rcvif = ifp; 982 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 983 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 984 985 s = splnet(); 986 987 if (sc->sc_drvbpf != NULL) { 988 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 989 990 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 991 tap->wr_rate = ural_rxrate(desc); 992 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 993 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 994 tap->wr_antenna = sc->rx_ant; 995 tap->wr_antsignal = desc->rssi; 996 997 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 998 } 999 1000 wh = mtod(m, struct ieee80211_frame *); 1001 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1002 1003 /* send the frame to the 802.11 layer */ 1004 ieee80211_input(ic, m, ni, desc->rssi, 0); 1005 1006 /* node is no longer needed */ 1007 ieee80211_free_node(ni); 1008 1009 splx(s); 1010 1011 DPRINTFN(15, ("rx done\n")); 1012 1013 skip: /* setup a new transfer */ 1014 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1015 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1016 usbd_transfer(xfer); 1017 } 1018 1019 /* 1020 * Return the expected ack rate for a frame transmitted at rate `rate'. 1021 * XXX: this should depend on the destination node basic rate set. 1022 */ 1023 Static int 1024 ural_ack_rate(struct ieee80211com *ic, int rate) 1025 { 1026 switch (rate) { 1027 /* CCK rates */ 1028 case 2: 1029 return 2; 1030 case 4: 1031 case 11: 1032 case 22: 1033 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1034 1035 /* OFDM rates */ 1036 case 12: 1037 case 18: 1038 return 12; 1039 case 24: 1040 case 36: 1041 return 24; 1042 case 48: 1043 case 72: 1044 case 96: 1045 case 108: 1046 return 48; 1047 } 1048 1049 /* default to 1Mbps */ 1050 return 2; 1051 } 1052 1053 /* 1054 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1055 * The function automatically determines the operating mode depending on the 1056 * given rate. `flags' indicates whether short preamble is in use or not. 1057 */ 1058 Static uint16_t 1059 ural_txtime(int len, int rate, uint32_t flags) 1060 { 1061 uint16_t txtime; 1062 1063 if (RAL_RATE_IS_OFDM(rate)) { 1064 /* IEEE Std 802.11g-2003, pp. 37 */ 1065 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1066 txtime = 16 + 4 + 4 * txtime + 6; 1067 } else { 1068 /* IEEE Std 802.11b-1999, pp. 28 */ 1069 txtime = (16 * len + rate - 1) / rate; 1070 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1071 txtime += 72 + 24; 1072 else 1073 txtime += 144 + 48; 1074 } 1075 return txtime; 1076 } 1077 1078 Static uint8_t 1079 ural_plcp_signal(int rate) 1080 { 1081 switch (rate) { 1082 /* CCK rates (returned values are device-dependent) */ 1083 case 2: return 0x0; 1084 case 4: return 0x1; 1085 case 11: return 0x2; 1086 case 22: return 0x3; 1087 1088 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1089 case 12: return 0xb; 1090 case 18: return 0xf; 1091 case 24: return 0xa; 1092 case 36: return 0xe; 1093 case 48: return 0x9; 1094 case 72: return 0xd; 1095 case 96: return 0x8; 1096 case 108: return 0xc; 1097 1098 /* unsupported rates (should not get there) */ 1099 default: return 0xff; 1100 } 1101 } 1102 1103 Static void 1104 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1105 uint32_t flags, int len, int rate) 1106 { 1107 struct ieee80211com *ic = &sc->sc_ic; 1108 uint16_t plcp_length; 1109 int remainder; 1110 1111 desc->flags = htole32(flags); 1112 desc->flags |= htole32(RAL_TX_NEWSEQ); 1113 desc->flags |= htole32(len << 16); 1114 1115 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1116 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1117 1118 /* setup PLCP fields */ 1119 desc->plcp_signal = ural_plcp_signal(rate); 1120 desc->plcp_service = 4; 1121 1122 len += IEEE80211_CRC_LEN; 1123 if (RAL_RATE_IS_OFDM(rate)) { 1124 desc->flags |= htole32(RAL_TX_OFDM); 1125 1126 plcp_length = len & 0xfff; 1127 desc->plcp_length_hi = plcp_length >> 6; 1128 desc->plcp_length_lo = plcp_length & 0x3f; 1129 } else { 1130 plcp_length = (16 * len + rate - 1) / rate; 1131 if (rate == 22) { 1132 remainder = (16 * len) % 22; 1133 if (remainder != 0 && remainder < 7) 1134 desc->plcp_service |= RAL_PLCP_LENGEXT; 1135 } 1136 desc->plcp_length_hi = plcp_length >> 8; 1137 desc->plcp_length_lo = plcp_length & 0xff; 1138 1139 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1140 desc->plcp_signal |= 0x08; 1141 } 1142 1143 desc->iv = 0; 1144 desc->eiv = 0; 1145 } 1146 1147 #define RAL_TX_TIMEOUT 5000 1148 1149 Static int 1150 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1151 { 1152 struct ural_tx_desc *desc; 1153 usbd_xfer_handle xfer; 1154 uint8_t cmd = 0; 1155 usbd_status error; 1156 uint8_t *buf; 1157 int xferlen, rate; 1158 1159 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1160 1161 xfer = usbd_alloc_xfer(sc->sc_udev); 1162 if (xfer == NULL) 1163 return ENOMEM; 1164 1165 /* xfer length needs to be a multiple of two! */ 1166 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1167 1168 buf = usbd_alloc_buffer(xfer, xferlen); 1169 if (buf == NULL) { 1170 usbd_free_xfer(xfer); 1171 return ENOMEM; 1172 } 1173 1174 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1175 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1176 1177 error = usbd_sync_transfer(xfer); 1178 if (error != 0) { 1179 usbd_free_xfer(xfer); 1180 return error; 1181 } 1182 1183 desc = (struct ural_tx_desc *)buf; 1184 1185 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1186 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1187 m0->m_pkthdr.len, rate); 1188 1189 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1190 m0->m_pkthdr.len, rate, xferlen)); 1191 1192 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1193 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1194 1195 error = usbd_sync_transfer(xfer); 1196 usbd_free_xfer(xfer); 1197 1198 return error; 1199 } 1200 1201 Static int 1202 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1203 { 1204 struct ieee80211com *ic = &sc->sc_ic; 1205 struct ural_tx_desc *desc; 1206 struct ural_tx_data *data; 1207 struct ieee80211_frame *wh; 1208 struct ieee80211_key *k; 1209 uint32_t flags = 0; 1210 uint16_t dur; 1211 usbd_status error; 1212 int xferlen, rate; 1213 1214 data = &sc->tx_data[0]; 1215 desc = (struct ural_tx_desc *)data->buf; 1216 1217 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1218 1219 wh = mtod(m0, struct ieee80211_frame *); 1220 1221 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1222 k = ieee80211_crypto_encap(ic, ni, m0); 1223 if (k == NULL) { 1224 m_freem(m0); 1225 return ENOBUFS; 1226 } 1227 } 1228 1229 data->m = m0; 1230 data->ni = ni; 1231 1232 wh = mtod(m0, struct ieee80211_frame *); 1233 1234 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1235 flags |= RAL_TX_ACK; 1236 1237 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1238 *(uint16_t *)wh->i_dur = htole16(dur); 1239 1240 /* tell hardware to add timestamp for probe responses */ 1241 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1242 IEEE80211_FC0_TYPE_MGT && 1243 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1244 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1245 flags |= RAL_TX_TIMESTAMP; 1246 } 1247 1248 if (sc->sc_drvbpf != NULL) { 1249 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1250 1251 tap->wt_flags = 0; 1252 tap->wt_rate = rate; 1253 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1254 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1255 tap->wt_antenna = sc->tx_ant; 1256 1257 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1258 } 1259 1260 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1261 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1262 1263 /* align end on a 2-bytes boundary */ 1264 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1265 1266 /* 1267 * No space left in the last URB to store the extra 2 bytes, force 1268 * sending of another URB. 1269 */ 1270 if ((xferlen % 64) == 0) 1271 xferlen += 2; 1272 1273 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1274 m0->m_pkthdr.len, rate, xferlen)); 1275 1276 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1277 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1278 ural_txeof); 1279 1280 error = usbd_transfer(data->xfer); 1281 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1282 m_freem(m0); 1283 return error; 1284 } 1285 1286 sc->tx_queued++; 1287 1288 return 0; 1289 } 1290 1291 Static int 1292 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1293 { 1294 struct ieee80211com *ic = &sc->sc_ic; 1295 struct ural_tx_desc *desc; 1296 struct ural_tx_data *data; 1297 struct ieee80211_frame *wh; 1298 struct ieee80211_key *k; 1299 uint32_t flags = 0; 1300 uint16_t dur; 1301 usbd_status error; 1302 int xferlen, rate; 1303 1304 wh = mtod(m0, struct ieee80211_frame *); 1305 1306 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1307 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1308 else 1309 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1310 1311 rate &= IEEE80211_RATE_VAL; 1312 1313 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1314 k = ieee80211_crypto_encap(ic, ni, m0); 1315 if (k == NULL) { 1316 m_freem(m0); 1317 return ENOBUFS; 1318 } 1319 1320 /* packet header may have moved, reset our local pointer */ 1321 wh = mtod(m0, struct ieee80211_frame *); 1322 } 1323 1324 data = &sc->tx_data[0]; 1325 desc = (struct ural_tx_desc *)data->buf; 1326 1327 data->m = m0; 1328 data->ni = ni; 1329 1330 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1331 flags |= RAL_TX_ACK; 1332 flags |= RAL_TX_RETRY(7); 1333 1334 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1335 ic->ic_flags) + RAL_SIFS; 1336 *(uint16_t *)wh->i_dur = htole16(dur); 1337 } 1338 1339 if (sc->sc_drvbpf != NULL) { 1340 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1341 1342 tap->wt_flags = 0; 1343 tap->wt_rate = rate; 1344 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1345 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1346 tap->wt_antenna = sc->tx_ant; 1347 1348 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1349 } 1350 1351 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1352 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1353 1354 /* align end on a 2-bytes boundary */ 1355 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1356 1357 /* 1358 * No space left in the last URB to store the extra 2 bytes, force 1359 * sending of another URB. 1360 */ 1361 if ((xferlen % 64) == 0) 1362 xferlen += 2; 1363 1364 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1365 m0->m_pkthdr.len, rate, xferlen)); 1366 1367 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1368 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1369 ural_txeof); 1370 1371 error = usbd_transfer(data->xfer); 1372 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1373 return error; 1374 1375 sc->tx_queued++; 1376 1377 return 0; 1378 } 1379 1380 Static void 1381 ural_start(struct ifnet *ifp) 1382 { 1383 struct ural_softc *sc = ifp->if_softc; 1384 struct ieee80211com *ic = &sc->sc_ic; 1385 struct mbuf *m0; 1386 struct ether_header *eh; 1387 struct ieee80211_node *ni; 1388 1389 for (;;) { 1390 IF_POLL(&ic->ic_mgtq, m0); 1391 if (m0 != NULL) { 1392 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1393 ifp->if_flags |= IFF_OACTIVE; 1394 break; 1395 } 1396 IF_DEQUEUE(&ic->ic_mgtq, m0); 1397 1398 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1399 m0->m_pkthdr.rcvif = NULL; 1400 bpf_mtap3(ic->ic_rawbpf, m0); 1401 if (ural_tx_mgt(sc, m0, ni) != 0) 1402 break; 1403 1404 } else { 1405 if (ic->ic_state != IEEE80211_S_RUN) 1406 break; 1407 IFQ_DEQUEUE(&ifp->if_snd, m0); 1408 if (m0 == NULL) 1409 break; 1410 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1411 IF_PREPEND(&ifp->if_snd, m0); 1412 ifp->if_flags |= IFF_OACTIVE; 1413 break; 1414 } 1415 1416 if (m0->m_len < sizeof (struct ether_header) && 1417 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1418 continue; 1419 1420 eh = mtod(m0, struct ether_header *); 1421 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1422 if (ni == NULL) { 1423 m_freem(m0); 1424 continue; 1425 } 1426 bpf_mtap(ifp, m0); 1427 m0 = ieee80211_encap(ic, m0, ni); 1428 if (m0 == NULL) { 1429 ieee80211_free_node(ni); 1430 continue; 1431 } 1432 bpf_mtap3(ic->ic_rawbpf, m0); 1433 if (ural_tx_data(sc, m0, ni) != 0) { 1434 ieee80211_free_node(ni); 1435 ifp->if_oerrors++; 1436 break; 1437 } 1438 } 1439 1440 sc->sc_tx_timer = 5; 1441 ifp->if_timer = 1; 1442 } 1443 } 1444 1445 Static void 1446 ural_watchdog(struct ifnet *ifp) 1447 { 1448 struct ural_softc *sc = ifp->if_softc; 1449 struct ieee80211com *ic = &sc->sc_ic; 1450 1451 ifp->if_timer = 0; 1452 1453 if (sc->sc_tx_timer > 0) { 1454 if (--sc->sc_tx_timer == 0) { 1455 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1456 /*ural_init(sc); XXX needs a process context! */ 1457 ifp->if_oerrors++; 1458 return; 1459 } 1460 ifp->if_timer = 1; 1461 } 1462 1463 ieee80211_watchdog(ic); 1464 } 1465 1466 /* 1467 * This function allows for fast channel switching in monitor mode (used by 1468 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1469 * generate a new beacon frame. 1470 */ 1471 Static int 1472 ural_reset(struct ifnet *ifp) 1473 { 1474 struct ural_softc *sc = ifp->if_softc; 1475 struct ieee80211com *ic = &sc->sc_ic; 1476 1477 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1478 return ENETRESET; 1479 1480 ural_set_chan(sc, ic->ic_curchan); 1481 1482 return 0; 1483 } 1484 1485 Static int 1486 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1487 { 1488 #define IS_RUNNING(ifp) \ 1489 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1490 1491 struct ural_softc *sc = ifp->if_softc; 1492 struct ieee80211com *ic = &sc->sc_ic; 1493 int s, error = 0; 1494 1495 s = splnet(); 1496 1497 switch (cmd) { 1498 case SIOCSIFFLAGS: 1499 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1500 break; 1501 /* XXX re-use ether_ioctl() */ 1502 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1503 case IFF_UP|IFF_RUNNING: 1504 ural_update_promisc(sc); 1505 break; 1506 case IFF_UP: 1507 ural_init(ifp); 1508 break; 1509 case IFF_RUNNING: 1510 ural_stop(ifp, 1); 1511 break; 1512 case 0: 1513 break; 1514 } 1515 break; 1516 1517 case SIOCADDMULTI: 1518 case SIOCDELMULTI: 1519 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1520 error = 0; 1521 } 1522 break; 1523 1524 default: 1525 error = ieee80211_ioctl(ic, cmd, data); 1526 } 1527 1528 if (error == ENETRESET) { 1529 if (IS_RUNNING(ifp) && 1530 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1531 ural_init(ifp); 1532 error = 0; 1533 } 1534 1535 splx(s); 1536 1537 return error; 1538 #undef IS_RUNNING 1539 } 1540 1541 Static void 1542 ural_set_testmode(struct ural_softc *sc) 1543 { 1544 usb_device_request_t req; 1545 usbd_status error; 1546 1547 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1548 req.bRequest = RAL_VENDOR_REQUEST; 1549 USETW(req.wValue, 4); 1550 USETW(req.wIndex, 1); 1551 USETW(req.wLength, 0); 1552 1553 error = usbd_do_request(sc->sc_udev, &req, NULL); 1554 if (error != 0) { 1555 printf("%s: could not set test mode: %s\n", 1556 device_xname(sc->sc_dev), usbd_errstr(error)); 1557 } 1558 } 1559 1560 Static void 1561 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1562 { 1563 usb_device_request_t req; 1564 usbd_status error; 1565 1566 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1567 req.bRequest = RAL_READ_EEPROM; 1568 USETW(req.wValue, 0); 1569 USETW(req.wIndex, addr); 1570 USETW(req.wLength, len); 1571 1572 error = usbd_do_request(sc->sc_udev, &req, buf); 1573 if (error != 0) { 1574 printf("%s: could not read EEPROM: %s\n", 1575 device_xname(sc->sc_dev), usbd_errstr(error)); 1576 } 1577 } 1578 1579 Static uint16_t 1580 ural_read(struct ural_softc *sc, uint16_t reg) 1581 { 1582 usb_device_request_t req; 1583 usbd_status error; 1584 uint16_t val; 1585 1586 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1587 req.bRequest = RAL_READ_MAC; 1588 USETW(req.wValue, 0); 1589 USETW(req.wIndex, reg); 1590 USETW(req.wLength, sizeof (uint16_t)); 1591 1592 error = usbd_do_request(sc->sc_udev, &req, &val); 1593 if (error != 0) { 1594 printf("%s: could not read MAC register: %s\n", 1595 device_xname(sc->sc_dev), usbd_errstr(error)); 1596 return 0; 1597 } 1598 1599 return le16toh(val); 1600 } 1601 1602 Static void 1603 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1604 { 1605 usb_device_request_t req; 1606 usbd_status error; 1607 1608 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1609 req.bRequest = RAL_READ_MULTI_MAC; 1610 USETW(req.wValue, 0); 1611 USETW(req.wIndex, reg); 1612 USETW(req.wLength, len); 1613 1614 error = usbd_do_request(sc->sc_udev, &req, buf); 1615 if (error != 0) { 1616 printf("%s: could not read MAC register: %s\n", 1617 device_xname(sc->sc_dev), usbd_errstr(error)); 1618 } 1619 } 1620 1621 Static void 1622 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1623 { 1624 usb_device_request_t req; 1625 usbd_status error; 1626 1627 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1628 req.bRequest = RAL_WRITE_MAC; 1629 USETW(req.wValue, val); 1630 USETW(req.wIndex, reg); 1631 USETW(req.wLength, 0); 1632 1633 error = usbd_do_request(sc->sc_udev, &req, NULL); 1634 if (error != 0) { 1635 printf("%s: could not write MAC register: %s\n", 1636 device_xname(sc->sc_dev), usbd_errstr(error)); 1637 } 1638 } 1639 1640 Static void 1641 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1642 { 1643 usb_device_request_t req; 1644 usbd_status error; 1645 1646 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1647 req.bRequest = RAL_WRITE_MULTI_MAC; 1648 USETW(req.wValue, 0); 1649 USETW(req.wIndex, reg); 1650 USETW(req.wLength, len); 1651 1652 error = usbd_do_request(sc->sc_udev, &req, buf); 1653 if (error != 0) { 1654 printf("%s: could not write MAC register: %s\n", 1655 device_xname(sc->sc_dev), usbd_errstr(error)); 1656 } 1657 } 1658 1659 Static void 1660 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1661 { 1662 uint16_t tmp; 1663 int ntries; 1664 1665 for (ntries = 0; ntries < 5; ntries++) { 1666 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1667 break; 1668 } 1669 if (ntries == 5) { 1670 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1671 return; 1672 } 1673 1674 tmp = reg << 8 | val; 1675 ural_write(sc, RAL_PHY_CSR7, tmp); 1676 } 1677 1678 Static uint8_t 1679 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1680 { 1681 uint16_t val; 1682 int ntries; 1683 1684 val = RAL_BBP_WRITE | reg << 8; 1685 ural_write(sc, RAL_PHY_CSR7, val); 1686 1687 for (ntries = 0; ntries < 5; ntries++) { 1688 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1689 break; 1690 } 1691 if (ntries == 5) { 1692 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1693 return 0; 1694 } 1695 1696 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1697 } 1698 1699 Static void 1700 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1701 { 1702 uint32_t tmp; 1703 int ntries; 1704 1705 for (ntries = 0; ntries < 5; ntries++) { 1706 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1707 break; 1708 } 1709 if (ntries == 5) { 1710 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1711 return; 1712 } 1713 1714 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1715 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1716 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1717 1718 /* remember last written value in sc */ 1719 sc->rf_regs[reg] = val; 1720 1721 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1722 } 1723 1724 Static void 1725 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1726 { 1727 struct ieee80211com *ic = &sc->sc_ic; 1728 uint8_t power, tmp; 1729 u_int i, chan; 1730 1731 chan = ieee80211_chan2ieee(ic, c); 1732 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1733 return; 1734 1735 if (IEEE80211_IS_CHAN_2GHZ(c)) 1736 power = min(sc->txpow[chan - 1], 31); 1737 else 1738 power = 31; 1739 1740 /* adjust txpower using ifconfig settings */ 1741 power -= (100 - ic->ic_txpowlimit) / 8; 1742 1743 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1744 1745 switch (sc->rf_rev) { 1746 case RAL_RF_2522: 1747 ural_rf_write(sc, RAL_RF1, 0x00814); 1748 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1749 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1750 break; 1751 1752 case RAL_RF_2523: 1753 ural_rf_write(sc, RAL_RF1, 0x08804); 1754 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1755 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1756 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1757 break; 1758 1759 case RAL_RF_2524: 1760 ural_rf_write(sc, RAL_RF1, 0x0c808); 1761 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1762 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1763 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1764 break; 1765 1766 case RAL_RF_2525: 1767 ural_rf_write(sc, RAL_RF1, 0x08808); 1768 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1769 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1770 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1771 1772 ural_rf_write(sc, RAL_RF1, 0x08808); 1773 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1774 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1775 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1776 break; 1777 1778 case RAL_RF_2525E: 1779 ural_rf_write(sc, RAL_RF1, 0x08808); 1780 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1781 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1782 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1783 break; 1784 1785 case RAL_RF_2526: 1786 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1787 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1788 ural_rf_write(sc, RAL_RF1, 0x08804); 1789 1790 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1791 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1792 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1793 break; 1794 1795 /* dual-band RF */ 1796 case RAL_RF_5222: 1797 for (i = 0; ural_rf5222[i].chan != chan; i++); 1798 1799 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1800 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1801 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1802 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1803 break; 1804 } 1805 1806 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1807 ic->ic_state != IEEE80211_S_SCAN) { 1808 /* set Japan filter bit for channel 14 */ 1809 tmp = ural_bbp_read(sc, 70); 1810 1811 tmp &= ~RAL_JAPAN_FILTER; 1812 if (chan == 14) 1813 tmp |= RAL_JAPAN_FILTER; 1814 1815 ural_bbp_write(sc, 70, tmp); 1816 1817 /* clear CRC errors */ 1818 ural_read(sc, RAL_STA_CSR0); 1819 1820 DELAY(10000); 1821 ural_disable_rf_tune(sc); 1822 } 1823 } 1824 1825 /* 1826 * Disable RF auto-tuning. 1827 */ 1828 Static void 1829 ural_disable_rf_tune(struct ural_softc *sc) 1830 { 1831 uint32_t tmp; 1832 1833 if (sc->rf_rev != RAL_RF_2523) { 1834 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1835 ural_rf_write(sc, RAL_RF1, tmp); 1836 } 1837 1838 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1839 ural_rf_write(sc, RAL_RF3, tmp); 1840 1841 DPRINTFN(2, ("disabling RF autotune\n")); 1842 } 1843 1844 /* 1845 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1846 * synchronization. 1847 */ 1848 Static void 1849 ural_enable_tsf_sync(struct ural_softc *sc) 1850 { 1851 struct ieee80211com *ic = &sc->sc_ic; 1852 uint16_t logcwmin, preload, tmp; 1853 1854 /* first, disable TSF synchronization */ 1855 ural_write(sc, RAL_TXRX_CSR19, 0); 1856 1857 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1858 ural_write(sc, RAL_TXRX_CSR18, tmp); 1859 1860 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1861 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1862 tmp = logcwmin << 12 | preload; 1863 ural_write(sc, RAL_TXRX_CSR20, tmp); 1864 1865 /* finally, enable TSF synchronization */ 1866 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1867 if (ic->ic_opmode == IEEE80211_M_STA) 1868 tmp |= RAL_ENABLE_TSF_SYNC(1); 1869 else 1870 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1871 ural_write(sc, RAL_TXRX_CSR19, tmp); 1872 1873 DPRINTF(("enabling TSF synchronization\n")); 1874 } 1875 1876 Static void 1877 ural_update_slot(struct ifnet *ifp) 1878 { 1879 struct ural_softc *sc = ifp->if_softc; 1880 struct ieee80211com *ic = &sc->sc_ic; 1881 uint16_t slottime, sifs, eifs; 1882 1883 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1884 1885 /* 1886 * These settings may sound a bit inconsistent but this is what the 1887 * reference driver does. 1888 */ 1889 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1890 sifs = 16 - RAL_RXTX_TURNAROUND; 1891 eifs = 364; 1892 } else { 1893 sifs = 10 - RAL_RXTX_TURNAROUND; 1894 eifs = 64; 1895 } 1896 1897 ural_write(sc, RAL_MAC_CSR10, slottime); 1898 ural_write(sc, RAL_MAC_CSR11, sifs); 1899 ural_write(sc, RAL_MAC_CSR12, eifs); 1900 } 1901 1902 Static void 1903 ural_set_txpreamble(struct ural_softc *sc) 1904 { 1905 uint16_t tmp; 1906 1907 tmp = ural_read(sc, RAL_TXRX_CSR10); 1908 1909 tmp &= ~RAL_SHORT_PREAMBLE; 1910 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1911 tmp |= RAL_SHORT_PREAMBLE; 1912 1913 ural_write(sc, RAL_TXRX_CSR10, tmp); 1914 } 1915 1916 Static void 1917 ural_set_basicrates(struct ural_softc *sc) 1918 { 1919 struct ieee80211com *ic = &sc->sc_ic; 1920 1921 /* update basic rate set */ 1922 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1923 /* 11b basic rates: 1, 2Mbps */ 1924 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1925 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1926 /* 11a basic rates: 6, 12, 24Mbps */ 1927 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1928 } else { 1929 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1930 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1931 } 1932 } 1933 1934 Static void 1935 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1936 { 1937 uint16_t tmp; 1938 1939 tmp = bssid[0] | bssid[1] << 8; 1940 ural_write(sc, RAL_MAC_CSR5, tmp); 1941 1942 tmp = bssid[2] | bssid[3] << 8; 1943 ural_write(sc, RAL_MAC_CSR6, tmp); 1944 1945 tmp = bssid[4] | bssid[5] << 8; 1946 ural_write(sc, RAL_MAC_CSR7, tmp); 1947 1948 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1949 } 1950 1951 Static void 1952 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1953 { 1954 uint16_t tmp; 1955 1956 tmp = addr[0] | addr[1] << 8; 1957 ural_write(sc, RAL_MAC_CSR2, tmp); 1958 1959 tmp = addr[2] | addr[3] << 8; 1960 ural_write(sc, RAL_MAC_CSR3, tmp); 1961 1962 tmp = addr[4] | addr[5] << 8; 1963 ural_write(sc, RAL_MAC_CSR4, tmp); 1964 1965 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1966 } 1967 1968 Static void 1969 ural_update_promisc(struct ural_softc *sc) 1970 { 1971 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1972 uint32_t tmp; 1973 1974 tmp = ural_read(sc, RAL_TXRX_CSR2); 1975 1976 tmp &= ~RAL_DROP_NOT_TO_ME; 1977 if (!(ifp->if_flags & IFF_PROMISC)) 1978 tmp |= RAL_DROP_NOT_TO_ME; 1979 1980 ural_write(sc, RAL_TXRX_CSR2, tmp); 1981 1982 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1983 "entering" : "leaving")); 1984 } 1985 1986 Static const char * 1987 ural_get_rf(int rev) 1988 { 1989 switch (rev) { 1990 case RAL_RF_2522: return "RT2522"; 1991 case RAL_RF_2523: return "RT2523"; 1992 case RAL_RF_2524: return "RT2524"; 1993 case RAL_RF_2525: return "RT2525"; 1994 case RAL_RF_2525E: return "RT2525e"; 1995 case RAL_RF_2526: return "RT2526"; 1996 case RAL_RF_5222: return "RT5222"; 1997 default: return "unknown"; 1998 } 1999 } 2000 2001 Static void 2002 ural_read_eeprom(struct ural_softc *sc) 2003 { 2004 struct ieee80211com *ic = &sc->sc_ic; 2005 uint16_t val; 2006 2007 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2008 val = le16toh(val); 2009 sc->rf_rev = (val >> 11) & 0x7; 2010 sc->hw_radio = (val >> 10) & 0x1; 2011 sc->led_mode = (val >> 6) & 0x7; 2012 sc->rx_ant = (val >> 4) & 0x3; 2013 sc->tx_ant = (val >> 2) & 0x3; 2014 sc->nb_ant = val & 0x3; 2015 2016 /* read MAC address */ 2017 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2018 2019 /* read default values for BBP registers */ 2020 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2021 2022 /* read Tx power for all b/g channels */ 2023 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2024 } 2025 2026 Static int 2027 ural_bbp_init(struct ural_softc *sc) 2028 { 2029 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2030 int i, ntries; 2031 2032 /* wait for BBP to be ready */ 2033 for (ntries = 0; ntries < 100; ntries++) { 2034 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2035 break; 2036 DELAY(1000); 2037 } 2038 if (ntries == 100) { 2039 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2040 return EIO; 2041 } 2042 2043 /* initialize BBP registers to default values */ 2044 for (i = 0; i < N(ural_def_bbp); i++) 2045 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2046 2047 #if 0 2048 /* initialize BBP registers to values stored in EEPROM */ 2049 for (i = 0; i < 16; i++) { 2050 if (sc->bbp_prom[i].reg == 0xff) 2051 continue; 2052 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2053 } 2054 #endif 2055 2056 return 0; 2057 #undef N 2058 } 2059 2060 Static void 2061 ural_set_txantenna(struct ural_softc *sc, int antenna) 2062 { 2063 uint16_t tmp; 2064 uint8_t tx; 2065 2066 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2067 if (antenna == 1) 2068 tx |= RAL_BBP_ANTA; 2069 else if (antenna == 2) 2070 tx |= RAL_BBP_ANTB; 2071 else 2072 tx |= RAL_BBP_DIVERSITY; 2073 2074 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2075 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2076 sc->rf_rev == RAL_RF_5222) 2077 tx |= RAL_BBP_FLIPIQ; 2078 2079 ural_bbp_write(sc, RAL_BBP_TX, tx); 2080 2081 /* update values in PHY_CSR5 and PHY_CSR6 */ 2082 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2083 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2084 2085 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2086 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2087 } 2088 2089 Static void 2090 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2091 { 2092 uint8_t rx; 2093 2094 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2095 if (antenna == 1) 2096 rx |= RAL_BBP_ANTA; 2097 else if (antenna == 2) 2098 rx |= RAL_BBP_ANTB; 2099 else 2100 rx |= RAL_BBP_DIVERSITY; 2101 2102 /* need to force no I/Q flip for RF 2525e and 2526 */ 2103 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2104 rx &= ~RAL_BBP_FLIPIQ; 2105 2106 ural_bbp_write(sc, RAL_BBP_RX, rx); 2107 } 2108 2109 Static int 2110 ural_init(struct ifnet *ifp) 2111 { 2112 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2113 struct ural_softc *sc = ifp->if_softc; 2114 struct ieee80211com *ic = &sc->sc_ic; 2115 struct ieee80211_key *wk; 2116 struct ural_rx_data *data; 2117 uint16_t tmp; 2118 usbd_status error; 2119 int i, ntries; 2120 2121 ural_set_testmode(sc); 2122 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2123 2124 ural_stop(ifp, 0); 2125 2126 /* initialize MAC registers to default values */ 2127 for (i = 0; i < N(ural_def_mac); i++) 2128 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2129 2130 /* wait for BBP and RF to wake up (this can take a long time!) */ 2131 for (ntries = 0; ntries < 100; ntries++) { 2132 tmp = ural_read(sc, RAL_MAC_CSR17); 2133 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2134 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2135 break; 2136 DELAY(1000); 2137 } 2138 if (ntries == 100) { 2139 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2140 device_xname(sc->sc_dev)); 2141 error = EIO; 2142 goto fail; 2143 } 2144 2145 /* we're ready! */ 2146 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2147 2148 /* set basic rate set (will be updated later) */ 2149 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2150 2151 error = ural_bbp_init(sc); 2152 if (error != 0) 2153 goto fail; 2154 2155 /* set default BSS channel */ 2156 ural_set_chan(sc, ic->ic_curchan); 2157 2158 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2159 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2160 2161 ural_set_txantenna(sc, sc->tx_ant); 2162 ural_set_rxantenna(sc, sc->rx_ant); 2163 2164 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2165 ural_set_macaddr(sc, ic->ic_myaddr); 2166 2167 /* 2168 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2169 */ 2170 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2171 wk = &ic->ic_crypto.cs_nw_keys[i]; 2172 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2173 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2174 } 2175 2176 /* 2177 * Allocate xfer for AMRR statistics requests. 2178 */ 2179 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2180 if (sc->amrr_xfer == NULL) { 2181 printf("%s: could not allocate AMRR xfer\n", 2182 device_xname(sc->sc_dev)); 2183 goto fail; 2184 } 2185 2186 /* 2187 * Open Tx and Rx USB bulk pipes. 2188 */ 2189 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2190 &sc->sc_tx_pipeh); 2191 if (error != 0) { 2192 printf("%s: could not open Tx pipe: %s\n", 2193 device_xname(sc->sc_dev), usbd_errstr(error)); 2194 goto fail; 2195 } 2196 2197 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2198 &sc->sc_rx_pipeh); 2199 if (error != 0) { 2200 printf("%s: could not open Rx pipe: %s\n", 2201 device_xname(sc->sc_dev), usbd_errstr(error)); 2202 goto fail; 2203 } 2204 2205 /* 2206 * Allocate Tx and Rx xfer queues. 2207 */ 2208 error = ural_alloc_tx_list(sc); 2209 if (error != 0) { 2210 printf("%s: could not allocate Tx list\n", 2211 device_xname(sc->sc_dev)); 2212 goto fail; 2213 } 2214 2215 error = ural_alloc_rx_list(sc); 2216 if (error != 0) { 2217 printf("%s: could not allocate Rx list\n", 2218 device_xname(sc->sc_dev)); 2219 goto fail; 2220 } 2221 2222 /* 2223 * Start up the receive pipe. 2224 */ 2225 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2226 data = &sc->rx_data[i]; 2227 2228 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2229 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2230 usbd_transfer(data->xfer); 2231 } 2232 2233 /* kick Rx */ 2234 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2235 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2236 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2237 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2238 tmp |= RAL_DROP_TODS; 2239 if (!(ifp->if_flags & IFF_PROMISC)) 2240 tmp |= RAL_DROP_NOT_TO_ME; 2241 } 2242 ural_write(sc, RAL_TXRX_CSR2, tmp); 2243 2244 ifp->if_flags &= ~IFF_OACTIVE; 2245 ifp->if_flags |= IFF_RUNNING; 2246 2247 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2248 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2249 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2250 } else 2251 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2252 2253 return 0; 2254 2255 fail: ural_stop(ifp, 1); 2256 return error; 2257 #undef N 2258 } 2259 2260 Static void 2261 ural_stop(struct ifnet *ifp, int disable) 2262 { 2263 struct ural_softc *sc = ifp->if_softc; 2264 struct ieee80211com *ic = &sc->sc_ic; 2265 2266 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2267 2268 sc->sc_tx_timer = 0; 2269 ifp->if_timer = 0; 2270 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2271 2272 /* disable Rx */ 2273 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2274 2275 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2276 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2277 ural_write(sc, RAL_MAC_CSR1, 0); 2278 2279 if (sc->amrr_xfer != NULL) { 2280 usbd_free_xfer(sc->amrr_xfer); 2281 sc->amrr_xfer = NULL; 2282 } 2283 2284 if (sc->sc_rx_pipeh != NULL) { 2285 usbd_abort_pipe(sc->sc_rx_pipeh); 2286 usbd_close_pipe(sc->sc_rx_pipeh); 2287 sc->sc_rx_pipeh = NULL; 2288 } 2289 2290 if (sc->sc_tx_pipeh != NULL) { 2291 usbd_abort_pipe(sc->sc_tx_pipeh); 2292 usbd_close_pipe(sc->sc_tx_pipeh); 2293 sc->sc_tx_pipeh = NULL; 2294 } 2295 2296 ural_free_rx_list(sc); 2297 ural_free_tx_list(sc); 2298 } 2299 2300 int 2301 ural_activate(device_t self, enum devact act) 2302 { 2303 struct ural_softc *sc = device_private(self); 2304 2305 switch (act) { 2306 case DVACT_DEACTIVATE: 2307 if_deactivate(&sc->sc_if); 2308 return 0; 2309 default: 2310 return EOPNOTSUPP; 2311 } 2312 } 2313 2314 Static void 2315 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2316 { 2317 int i; 2318 2319 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2320 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2321 2322 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2323 2324 /* set rate to some reasonable initial value */ 2325 for (i = ni->ni_rates.rs_nrates - 1; 2326 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2327 i--); 2328 ni->ni_txrate = i; 2329 2330 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2331 } 2332 2333 Static void 2334 ural_amrr_timeout(void *arg) 2335 { 2336 struct ural_softc *sc = (struct ural_softc *)arg; 2337 usb_device_request_t req; 2338 int s; 2339 2340 s = splusb(); 2341 2342 /* 2343 * Asynchronously read statistic registers (cleared by read). 2344 */ 2345 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2346 req.bRequest = RAL_READ_MULTI_MAC; 2347 USETW(req.wValue, 0); 2348 USETW(req.wIndex, RAL_STA_CSR0); 2349 USETW(req.wLength, sizeof sc->sta); 2350 2351 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2352 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2353 ural_amrr_update); 2354 (void)usbd_transfer(sc->amrr_xfer); 2355 2356 splx(s); 2357 } 2358 2359 Static void 2360 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2361 usbd_status status) 2362 { 2363 struct ural_softc *sc = (struct ural_softc *)priv; 2364 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2365 2366 if (status != USBD_NORMAL_COMPLETION) { 2367 printf("%s: could not retrieve Tx statistics - " 2368 "cancelling automatic rate control\n", 2369 device_xname(sc->sc_dev)); 2370 return; 2371 } 2372 2373 /* count TX retry-fail as Tx errors */ 2374 ifp->if_oerrors += sc->sta[9]; 2375 2376 sc->amn.amn_retrycnt = 2377 sc->sta[7] + /* TX one-retry ok count */ 2378 sc->sta[8] + /* TX more-retry ok count */ 2379 sc->sta[9]; /* TX retry-fail count */ 2380 2381 sc->amn.amn_txcnt = 2382 sc->amn.amn_retrycnt + 2383 sc->sta[6]; /* TX no-retry ok count */ 2384 2385 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2386 2387 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2388 } 2389
Indexes created Fri Oct 03 02:09:57 GMT 2025