if_ural.c revision 1.39
1 /* $NetBSD: if_ural.c,v 1.39 2011/12/23 00:51:44 jakllsch Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.39 2011/12/23 00:51:44 jakllsch Exp $"); 28 29 30 #include <sys/param.h> 31 #include <sys/sockio.h> 32 #include <sys/sysctl.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_ether.h> 50 #include <net/if_media.h> 51 #include <net/if_types.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/ip.h> 57 58 #include <net80211/ieee80211_netbsd.h> 59 #include <net80211/ieee80211_var.h> 60 #include <net80211/ieee80211_amrr.h> 61 #include <net80211/ieee80211_radiotap.h> 62 63 #include <dev/usb/usb.h> 64 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usbdi_util.h> 66 #include <dev/usb/usbdevs.h> 67 68 #include <dev/usb/if_uralreg.h> 69 #include <dev/usb/if_uralvar.h> 70 71 #ifdef USB_DEBUG 72 #define URAL_DEBUG 73 #endif 74 75 #ifdef URAL_DEBUG 76 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 77 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 78 int ural_debug = 0; 79 #else 80 #define DPRINTF(x) 81 #define DPRINTFN(n, x) 82 #endif 83 84 /* various supported device vendors/products */ 85 static const struct usb_devno ural_devs[] = { 86 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 87 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 88 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 90 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 91 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 92 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 93 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 94 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 95 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 98 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 101 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 103 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 106 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 107 { USB_VENDOR_RALINK_2, USB_PRODUCT_RALINK_2_RT2570 }, 108 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 109 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 110 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 111 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 112 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 113 }; 114 115 Static int ural_alloc_tx_list(struct ural_softc *); 116 Static void ural_free_tx_list(struct ural_softc *); 117 Static int ural_alloc_rx_list(struct ural_softc *); 118 Static void ural_free_rx_list(struct ural_softc *); 119 Static int ural_media_change(struct ifnet *); 120 Static void ural_next_scan(void *); 121 Static void ural_task(void *); 122 Static int ural_newstate(struct ieee80211com *, 123 enum ieee80211_state, int); 124 Static int ural_rxrate(struct ural_rx_desc *); 125 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 126 usbd_status); 127 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 128 usbd_status); 129 Static int ural_ack_rate(struct ieee80211com *, int); 130 Static uint16_t ural_txtime(int, int, uint32_t); 131 Static uint8_t ural_plcp_signal(int); 132 Static void ural_setup_tx_desc(struct ural_softc *, 133 struct ural_tx_desc *, uint32_t, int, int); 134 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 135 struct ieee80211_node *); 136 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 137 struct ieee80211_node *); 138 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 139 struct ieee80211_node *); 140 Static void ural_start(struct ifnet *); 141 Static void ural_watchdog(struct ifnet *); 142 Static int ural_reset(struct ifnet *); 143 Static int ural_ioctl(struct ifnet *, u_long, void *); 144 Static void ural_set_testmode(struct ural_softc *); 145 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 146 int); 147 Static uint16_t ural_read(struct ural_softc *, uint16_t); 148 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 149 int); 150 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 151 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 152 int); 153 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 154 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 155 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 156 Static void ural_set_chan(struct ural_softc *, 157 struct ieee80211_channel *); 158 Static void ural_disable_rf_tune(struct ural_softc *); 159 Static void ural_enable_tsf_sync(struct ural_softc *); 160 Static void ural_update_slot(struct ifnet *); 161 Static void ural_set_txpreamble(struct ural_softc *); 162 Static void ural_set_basicrates(struct ural_softc *); 163 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 164 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 165 Static void ural_update_promisc(struct ural_softc *); 166 Static const char *ural_get_rf(int); 167 Static void ural_read_eeprom(struct ural_softc *); 168 Static int ural_bbp_init(struct ural_softc *); 169 Static void ural_set_txantenna(struct ural_softc *, int); 170 Static void ural_set_rxantenna(struct ural_softc *, int); 171 Static int ural_init(struct ifnet *); 172 Static void ural_stop(struct ifnet *, int); 173 Static void ural_amrr_start(struct ural_softc *, 174 struct ieee80211_node *); 175 Static void ural_amrr_timeout(void *); 176 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 177 usbd_status status); 178 179 /* 180 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 181 */ 182 static const struct ieee80211_rateset ural_rateset_11a = 183 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 184 185 static const struct ieee80211_rateset ural_rateset_11b = 186 { 4, { 2, 4, 11, 22 } }; 187 188 static const struct ieee80211_rateset ural_rateset_11g = 189 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 190 191 /* 192 * Default values for MAC registers; values taken from the reference driver. 193 */ 194 static const struct { 195 uint16_t reg; 196 uint16_t val; 197 } ural_def_mac[] = { 198 { RAL_TXRX_CSR5, 0x8c8d }, 199 { RAL_TXRX_CSR6, 0x8b8a }, 200 { RAL_TXRX_CSR7, 0x8687 }, 201 { RAL_TXRX_CSR8, 0x0085 }, 202 { RAL_MAC_CSR13, 0x1111 }, 203 { RAL_MAC_CSR14, 0x1e11 }, 204 { RAL_TXRX_CSR21, 0xe78f }, 205 { RAL_MAC_CSR9, 0xff1d }, 206 { RAL_MAC_CSR11, 0x0002 }, 207 { RAL_MAC_CSR22, 0x0053 }, 208 { RAL_MAC_CSR15, 0x0000 }, 209 { RAL_MAC_CSR8, 0x0780 }, 210 { RAL_TXRX_CSR19, 0x0000 }, 211 { RAL_TXRX_CSR18, 0x005a }, 212 { RAL_PHY_CSR2, 0x0000 }, 213 { RAL_TXRX_CSR0, 0x1ec0 }, 214 { RAL_PHY_CSR4, 0x000f } 215 }; 216 217 /* 218 * Default values for BBP registers; values taken from the reference driver. 219 */ 220 static const struct { 221 uint8_t reg; 222 uint8_t val; 223 } ural_def_bbp[] = { 224 { 3, 0x02 }, 225 { 4, 0x19 }, 226 { 14, 0x1c }, 227 { 15, 0x30 }, 228 { 16, 0xac }, 229 { 17, 0x48 }, 230 { 18, 0x18 }, 231 { 19, 0xff }, 232 { 20, 0x1e }, 233 { 21, 0x08 }, 234 { 22, 0x08 }, 235 { 23, 0x08 }, 236 { 24, 0x80 }, 237 { 25, 0x50 }, 238 { 26, 0x08 }, 239 { 27, 0x23 }, 240 { 30, 0x10 }, 241 { 31, 0x2b }, 242 { 32, 0xb9 }, 243 { 34, 0x12 }, 244 { 35, 0x50 }, 245 { 39, 0xc4 }, 246 { 40, 0x02 }, 247 { 41, 0x60 }, 248 { 53, 0x10 }, 249 { 54, 0x18 }, 250 { 56, 0x08 }, 251 { 57, 0x10 }, 252 { 58, 0x08 }, 253 { 61, 0x60 }, 254 { 62, 0x10 }, 255 { 75, 0xff } 256 }; 257 258 /* 259 * Default values for RF register R2 indexed by channel numbers. 260 */ 261 static const uint32_t ural_rf2522_r2[] = { 262 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 263 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 264 }; 265 266 static const uint32_t ural_rf2523_r2[] = { 267 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 268 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 269 }; 270 271 static const uint32_t ural_rf2524_r2[] = { 272 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 273 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 274 }; 275 276 static const uint32_t ural_rf2525_r2[] = { 277 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 278 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 279 }; 280 281 static const uint32_t ural_rf2525_hi_r2[] = { 282 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 283 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 284 }; 285 286 static const uint32_t ural_rf2525e_r2[] = { 287 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 288 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 289 }; 290 291 static const uint32_t ural_rf2526_hi_r2[] = { 292 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 293 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 294 }; 295 296 static const uint32_t ural_rf2526_r2[] = { 297 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 298 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 299 }; 300 301 /* 302 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 303 * values taken from the reference driver. 304 */ 305 static const struct { 306 uint8_t chan; 307 uint32_t r1; 308 uint32_t r2; 309 uint32_t r4; 310 } ural_rf5222[] = { 311 { 1, 0x08808, 0x0044d, 0x00282 }, 312 { 2, 0x08808, 0x0044e, 0x00282 }, 313 { 3, 0x08808, 0x0044f, 0x00282 }, 314 { 4, 0x08808, 0x00460, 0x00282 }, 315 { 5, 0x08808, 0x00461, 0x00282 }, 316 { 6, 0x08808, 0x00462, 0x00282 }, 317 { 7, 0x08808, 0x00463, 0x00282 }, 318 { 8, 0x08808, 0x00464, 0x00282 }, 319 { 9, 0x08808, 0x00465, 0x00282 }, 320 { 10, 0x08808, 0x00466, 0x00282 }, 321 { 11, 0x08808, 0x00467, 0x00282 }, 322 { 12, 0x08808, 0x00468, 0x00282 }, 323 { 13, 0x08808, 0x00469, 0x00282 }, 324 { 14, 0x08808, 0x0046b, 0x00286 }, 325 326 { 36, 0x08804, 0x06225, 0x00287 }, 327 { 40, 0x08804, 0x06226, 0x00287 }, 328 { 44, 0x08804, 0x06227, 0x00287 }, 329 { 48, 0x08804, 0x06228, 0x00287 }, 330 { 52, 0x08804, 0x06229, 0x00287 }, 331 { 56, 0x08804, 0x0622a, 0x00287 }, 332 { 60, 0x08804, 0x0622b, 0x00287 }, 333 { 64, 0x08804, 0x0622c, 0x00287 }, 334 335 { 100, 0x08804, 0x02200, 0x00283 }, 336 { 104, 0x08804, 0x02201, 0x00283 }, 337 { 108, 0x08804, 0x02202, 0x00283 }, 338 { 112, 0x08804, 0x02203, 0x00283 }, 339 { 116, 0x08804, 0x02204, 0x00283 }, 340 { 120, 0x08804, 0x02205, 0x00283 }, 341 { 124, 0x08804, 0x02206, 0x00283 }, 342 { 128, 0x08804, 0x02207, 0x00283 }, 343 { 132, 0x08804, 0x02208, 0x00283 }, 344 { 136, 0x08804, 0x02209, 0x00283 }, 345 { 140, 0x08804, 0x0220a, 0x00283 }, 346 347 { 149, 0x08808, 0x02429, 0x00281 }, 348 { 153, 0x08808, 0x0242b, 0x00281 }, 349 { 157, 0x08808, 0x0242d, 0x00281 }, 350 { 161, 0x08808, 0x0242f, 0x00281 } 351 }; 352 353 int ural_match(device_t, cfdata_t, void *); 354 void ural_attach(device_t, device_t, void *); 355 int ural_detach(device_t, int); 356 int ural_activate(device_t, enum devact); 357 extern struct cfdriver ural_cd; 358 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate); 359 360 int 361 ural_match(device_t parent, cfdata_t match, void *aux) 362 { 363 struct usb_attach_arg *uaa = aux; 364 365 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 366 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 367 } 368 369 void 370 ural_attach(device_t parent, device_t self, void *aux) 371 { 372 struct ural_softc *sc = device_private(self); 373 struct usb_attach_arg *uaa = aux; 374 struct ieee80211com *ic = &sc->sc_ic; 375 struct ifnet *ifp = &sc->sc_if; 376 usb_interface_descriptor_t *id; 377 usb_endpoint_descriptor_t *ed; 378 usbd_status error; 379 char *devinfop; 380 int i; 381 382 sc->sc_dev = self; 383 sc->sc_udev = uaa->device; 384 385 aprint_naive("\n"); 386 aprint_normal("\n"); 387 388 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 389 aprint_normal_dev(self, "%s\n", devinfop); 390 usbd_devinfo_free(devinfop); 391 392 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 393 aprint_error_dev(self, "could not set configuration no\n"); 394 return; 395 } 396 397 /* get the first interface handle */ 398 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 399 &sc->sc_iface); 400 if (error != 0) { 401 aprint_error_dev(self, "could not get interface handle\n"); 402 return; 403 } 404 405 /* 406 * Find endpoints. 407 */ 408 id = usbd_get_interface_descriptor(sc->sc_iface); 409 410 sc->sc_rx_no = sc->sc_tx_no = -1; 411 for (i = 0; i < id->bNumEndpoints; i++) { 412 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 413 if (ed == NULL) { 414 aprint_error_dev(self, 415 "no endpoint descriptor for %d\n", i); 416 return; 417 } 418 419 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 420 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 421 sc->sc_rx_no = ed->bEndpointAddress; 422 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 423 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 424 sc->sc_tx_no = ed->bEndpointAddress; 425 } 426 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 427 aprint_error_dev(self, "missing endpoint\n"); 428 return; 429 } 430 431 usb_init_task(&sc->sc_task, ural_task, sc); 432 callout_init(&sc->sc_scan_ch, 0); 433 sc->amrr.amrr_min_success_threshold = 1; 434 sc->amrr.amrr_max_success_threshold = 15; 435 callout_init(&sc->sc_amrr_ch, 0); 436 437 /* retrieve RT2570 rev. no */ 438 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 439 440 /* retrieve MAC address and various other things from EEPROM */ 441 ural_read_eeprom(sc); 442 443 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 444 sc->asic_rev, ural_get_rf(sc->rf_rev)); 445 446 ifp->if_softc = sc; 447 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 448 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 449 ifp->if_init = ural_init; 450 ifp->if_ioctl = ural_ioctl; 451 ifp->if_start = ural_start; 452 ifp->if_watchdog = ural_watchdog; 453 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 454 IFQ_SET_READY(&ifp->if_snd); 455 456 ic->ic_ifp = ifp; 457 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 458 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 459 ic->ic_state = IEEE80211_S_INIT; 460 461 /* set device capabilities */ 462 ic->ic_caps = 463 IEEE80211_C_IBSS | /* IBSS mode supported */ 464 IEEE80211_C_MONITOR | /* monitor mode supported */ 465 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 466 IEEE80211_C_TXPMGT | /* tx power management */ 467 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 468 IEEE80211_C_SHSLOT | /* short slot time supported */ 469 IEEE80211_C_WPA; /* 802.11i */ 470 471 if (sc->rf_rev == RAL_RF_5222) { 472 /* set supported .11a rates */ 473 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 474 475 /* set supported .11a channels */ 476 for (i = 36; i <= 64; i += 4) { 477 ic->ic_channels[i].ic_freq = 478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 480 } 481 for (i = 100; i <= 140; i += 4) { 482 ic->ic_channels[i].ic_freq = 483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 485 } 486 for (i = 149; i <= 161; i += 4) { 487 ic->ic_channels[i].ic_freq = 488 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 489 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 490 } 491 } 492 493 /* set supported .11b and .11g rates */ 494 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 495 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 496 497 /* set supported .11b and .11g channels (1 through 14) */ 498 for (i = 1; i <= 14; i++) { 499 ic->ic_channels[i].ic_freq = 500 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 501 ic->ic_channels[i].ic_flags = 502 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 503 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 504 } 505 506 if_attach(ifp); 507 ieee80211_ifattach(ic); 508 ic->ic_reset = ural_reset; 509 510 /* override state transition machine */ 511 sc->sc_newstate = ic->ic_newstate; 512 ic->ic_newstate = ural_newstate; 513 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 514 515 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 516 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 517 518 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 519 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 520 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 521 522 sc->sc_txtap_len = sizeof sc->sc_txtapu; 523 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 524 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 525 526 ieee80211_announce(ic); 527 528 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 529 sc->sc_dev); 530 531 return; 532 } 533 534 int 535 ural_detach(device_t self, int flags) 536 { 537 struct ural_softc *sc = device_private(self); 538 struct ieee80211com *ic = &sc->sc_ic; 539 struct ifnet *ifp = &sc->sc_if; 540 int s; 541 542 s = splusb(); 543 544 ural_stop(ifp, 1); 545 usb_rem_task(sc->sc_udev, &sc->sc_task); 546 callout_stop(&sc->sc_scan_ch); 547 callout_stop(&sc->sc_amrr_ch); 548 549 if (sc->amrr_xfer != NULL) { 550 usbd_free_xfer(sc->amrr_xfer); 551 sc->amrr_xfer = NULL; 552 } 553 554 if (sc->sc_rx_pipeh != NULL) { 555 usbd_abort_pipe(sc->sc_rx_pipeh); 556 usbd_close_pipe(sc->sc_rx_pipeh); 557 } 558 559 if (sc->sc_tx_pipeh != NULL) { 560 usbd_abort_pipe(sc->sc_tx_pipeh); 561 usbd_close_pipe(sc->sc_tx_pipeh); 562 } 563 564 bpf_detach(ifp); 565 ieee80211_ifdetach(ic); 566 if_detach(ifp); 567 568 splx(s); 569 570 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 571 sc->sc_dev); 572 573 return 0; 574 } 575 576 Static int 577 ural_alloc_tx_list(struct ural_softc *sc) 578 { 579 struct ural_tx_data *data; 580 int i, error; 581 582 sc->tx_queued = 0; 583 584 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 585 data = &sc->tx_data[i]; 586 587 data->sc = sc; 588 589 data->xfer = usbd_alloc_xfer(sc->sc_udev); 590 if (data->xfer == NULL) { 591 printf("%s: could not allocate tx xfer\n", 592 device_xname(sc->sc_dev)); 593 error = ENOMEM; 594 goto fail; 595 } 596 597 data->buf = usbd_alloc_buffer(data->xfer, 598 RAL_TX_DESC_SIZE + MCLBYTES); 599 if (data->buf == NULL) { 600 printf("%s: could not allocate tx buffer\n", 601 device_xname(sc->sc_dev)); 602 error = ENOMEM; 603 goto fail; 604 } 605 } 606 607 return 0; 608 609 fail: ural_free_tx_list(sc); 610 return error; 611 } 612 613 Static void 614 ural_free_tx_list(struct ural_softc *sc) 615 { 616 struct ural_tx_data *data; 617 int i; 618 619 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 620 data = &sc->tx_data[i]; 621 622 if (data->xfer != NULL) { 623 usbd_free_xfer(data->xfer); 624 data->xfer = NULL; 625 } 626 627 if (data->ni != NULL) { 628 ieee80211_free_node(data->ni); 629 data->ni = NULL; 630 } 631 } 632 } 633 634 Static int 635 ural_alloc_rx_list(struct ural_softc *sc) 636 { 637 struct ural_rx_data *data; 638 int i, error; 639 640 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 641 data = &sc->rx_data[i]; 642 643 data->sc = sc; 644 645 data->xfer = usbd_alloc_xfer(sc->sc_udev); 646 if (data->xfer == NULL) { 647 printf("%s: could not allocate rx xfer\n", 648 device_xname(sc->sc_dev)); 649 error = ENOMEM; 650 goto fail; 651 } 652 653 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 654 printf("%s: could not allocate rx buffer\n", 655 device_xname(sc->sc_dev)); 656 error = ENOMEM; 657 goto fail; 658 } 659 660 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 661 if (data->m == NULL) { 662 printf("%s: could not allocate rx mbuf\n", 663 device_xname(sc->sc_dev)); 664 error = ENOMEM; 665 goto fail; 666 } 667 668 MCLGET(data->m, M_DONTWAIT); 669 if (!(data->m->m_flags & M_EXT)) { 670 printf("%s: could not allocate rx mbuf cluster\n", 671 device_xname(sc->sc_dev)); 672 error = ENOMEM; 673 goto fail; 674 } 675 676 data->buf = mtod(data->m, uint8_t *); 677 } 678 679 return 0; 680 681 fail: ural_free_tx_list(sc); 682 return error; 683 } 684 685 Static void 686 ural_free_rx_list(struct ural_softc *sc) 687 { 688 struct ural_rx_data *data; 689 int i; 690 691 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 692 data = &sc->rx_data[i]; 693 694 if (data->xfer != NULL) { 695 usbd_free_xfer(data->xfer); 696 data->xfer = NULL; 697 } 698 699 if (data->m != NULL) { 700 m_freem(data->m); 701 data->m = NULL; 702 } 703 } 704 } 705 706 Static int 707 ural_media_change(struct ifnet *ifp) 708 { 709 int error; 710 711 error = ieee80211_media_change(ifp); 712 if (error != ENETRESET) 713 return error; 714 715 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 716 ural_init(ifp); 717 718 return 0; 719 } 720 721 /* 722 * This function is called periodically (every 200ms) during scanning to 723 * switch from one channel to another. 724 */ 725 Static void 726 ural_next_scan(void *arg) 727 { 728 struct ural_softc *sc = arg; 729 struct ieee80211com *ic = &sc->sc_ic; 730 731 if (ic->ic_state == IEEE80211_S_SCAN) 732 ieee80211_next_scan(ic); 733 } 734 735 Static void 736 ural_task(void *arg) 737 { 738 struct ural_softc *sc = arg; 739 struct ieee80211com *ic = &sc->sc_ic; 740 enum ieee80211_state ostate; 741 struct ieee80211_node *ni; 742 struct mbuf *m; 743 744 ostate = ic->ic_state; 745 746 switch (sc->sc_state) { 747 case IEEE80211_S_INIT: 748 if (ostate == IEEE80211_S_RUN) { 749 /* abort TSF synchronization */ 750 ural_write(sc, RAL_TXRX_CSR19, 0); 751 752 /* force tx led to stop blinking */ 753 ural_write(sc, RAL_MAC_CSR20, 0); 754 } 755 break; 756 757 case IEEE80211_S_SCAN: 758 ural_set_chan(sc, ic->ic_curchan); 759 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 760 break; 761 762 case IEEE80211_S_AUTH: 763 ural_set_chan(sc, ic->ic_curchan); 764 break; 765 766 case IEEE80211_S_ASSOC: 767 ural_set_chan(sc, ic->ic_curchan); 768 break; 769 770 case IEEE80211_S_RUN: 771 ural_set_chan(sc, ic->ic_curchan); 772 773 ni = ic->ic_bss; 774 775 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 776 ural_update_slot(ic->ic_ifp); 777 ural_set_txpreamble(sc); 778 ural_set_basicrates(sc); 779 ural_set_bssid(sc, ni->ni_bssid); 780 } 781 782 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 783 ic->ic_opmode == IEEE80211_M_IBSS) { 784 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 785 if (m == NULL) { 786 printf("%s: could not allocate beacon\n", 787 device_xname(sc->sc_dev)); 788 return; 789 } 790 791 if (ural_tx_bcn(sc, m, ni) != 0) { 792 m_freem(m); 793 printf("%s: could not send beacon\n", 794 device_xname(sc->sc_dev)); 795 return; 796 } 797 798 /* beacon is no longer needed */ 799 m_freem(m); 800 } 801 802 /* make tx led blink on tx (controlled by ASIC) */ 803 ural_write(sc, RAL_MAC_CSR20, 1); 804 805 if (ic->ic_opmode != IEEE80211_M_MONITOR) 806 ural_enable_tsf_sync(sc); 807 808 /* enable automatic rate adaptation in STA mode */ 809 if (ic->ic_opmode == IEEE80211_M_STA && 810 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 811 ural_amrr_start(sc, ni); 812 813 break; 814 } 815 816 sc->sc_newstate(ic, sc->sc_state, -1); 817 } 818 819 Static int 820 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 821 int arg) 822 { 823 struct ural_softc *sc = ic->ic_ifp->if_softc; 824 825 usb_rem_task(sc->sc_udev, &sc->sc_task); 826 callout_stop(&sc->sc_scan_ch); 827 callout_stop(&sc->sc_amrr_ch); 828 829 /* do it in a process context */ 830 sc->sc_state = nstate; 831 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 832 833 return 0; 834 } 835 836 /* quickly determine if a given rate is CCK or OFDM */ 837 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 838 839 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 840 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 841 842 #define RAL_SIFS 10 /* us */ 843 844 #define RAL_RXTX_TURNAROUND 5 /* us */ 845 846 /* 847 * This function is only used by the Rx radiotap code. 848 */ 849 Static int 850 ural_rxrate(struct ural_rx_desc *desc) 851 { 852 if (le32toh(desc->flags) & RAL_RX_OFDM) { 853 /* reverse function of ural_plcp_signal */ 854 switch (desc->rate) { 855 case 0xb: return 12; 856 case 0xf: return 18; 857 case 0xa: return 24; 858 case 0xe: return 36; 859 case 0x9: return 48; 860 case 0xd: return 72; 861 case 0x8: return 96; 862 case 0xc: return 108; 863 } 864 } else { 865 if (desc->rate == 10) 866 return 2; 867 if (desc->rate == 20) 868 return 4; 869 if (desc->rate == 55) 870 return 11; 871 if (desc->rate == 110) 872 return 22; 873 } 874 return 2; /* should not get there */ 875 } 876 877 Static void 878 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 879 usbd_status status) 880 { 881 struct ural_tx_data *data = priv; 882 struct ural_softc *sc = data->sc; 883 struct ifnet *ifp = &sc->sc_if; 884 int s; 885 886 if (status != USBD_NORMAL_COMPLETION) { 887 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 888 return; 889 890 printf("%s: could not transmit buffer: %s\n", 891 device_xname(sc->sc_dev), usbd_errstr(status)); 892 893 if (status == USBD_STALLED) 894 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 895 896 ifp->if_oerrors++; 897 return; 898 } 899 900 s = splnet(); 901 902 m_freem(data->m); 903 data->m = NULL; 904 ieee80211_free_node(data->ni); 905 data->ni = NULL; 906 907 sc->tx_queued--; 908 ifp->if_opackets++; 909 910 DPRINTFN(10, ("tx done\n")); 911 912 sc->sc_tx_timer = 0; 913 ifp->if_flags &= ~IFF_OACTIVE; 914 ural_start(ifp); 915 916 splx(s); 917 } 918 919 Static void 920 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 921 { 922 struct ural_rx_data *data = priv; 923 struct ural_softc *sc = data->sc; 924 struct ieee80211com *ic = &sc->sc_ic; 925 struct ifnet *ifp = &sc->sc_if; 926 struct ural_rx_desc *desc; 927 struct ieee80211_frame *wh; 928 struct ieee80211_node *ni; 929 struct mbuf *mnew, *m; 930 int s, len; 931 932 if (status != USBD_NORMAL_COMPLETION) { 933 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 934 return; 935 936 if (status == USBD_STALLED) 937 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 938 goto skip; 939 } 940 941 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 942 943 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 944 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 945 len)); 946 ifp->if_ierrors++; 947 goto skip; 948 } 949 950 /* rx descriptor is located at the end */ 951 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 952 953 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 954 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 955 /* 956 * This should not happen since we did not request to receive 957 * those frames when we filled RAL_TXRX_CSR2. 958 */ 959 DPRINTFN(5, ("PHY or CRC error\n")); 960 ifp->if_ierrors++; 961 goto skip; 962 } 963 964 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 965 if (mnew == NULL) { 966 ifp->if_ierrors++; 967 goto skip; 968 } 969 970 MCLGET(mnew, M_DONTWAIT); 971 if (!(mnew->m_flags & M_EXT)) { 972 ifp->if_ierrors++; 973 m_freem(mnew); 974 goto skip; 975 } 976 977 m = data->m; 978 data->m = mnew; 979 data->buf = mtod(data->m, uint8_t *); 980 981 /* finalize mbuf */ 982 m->m_pkthdr.rcvif = ifp; 983 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 984 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 985 986 s = splnet(); 987 988 if (sc->sc_drvbpf != NULL) { 989 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 990 991 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 992 tap->wr_rate = ural_rxrate(desc); 993 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 994 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 995 tap->wr_antenna = sc->rx_ant; 996 tap->wr_antsignal = desc->rssi; 997 998 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 999 } 1000 1001 wh = mtod(m, struct ieee80211_frame *); 1002 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1003 1004 /* send the frame to the 802.11 layer */ 1005 ieee80211_input(ic, m, ni, desc->rssi, 0); 1006 1007 /* node is no longer needed */ 1008 ieee80211_free_node(ni); 1009 1010 splx(s); 1011 1012 DPRINTFN(15, ("rx done\n")); 1013 1014 skip: /* setup a new transfer */ 1015 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1016 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1017 usbd_transfer(xfer); 1018 } 1019 1020 /* 1021 * Return the expected ack rate for a frame transmitted at rate `rate'. 1022 * XXX: this should depend on the destination node basic rate set. 1023 */ 1024 Static int 1025 ural_ack_rate(struct ieee80211com *ic, int rate) 1026 { 1027 switch (rate) { 1028 /* CCK rates */ 1029 case 2: 1030 return 2; 1031 case 4: 1032 case 11: 1033 case 22: 1034 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1035 1036 /* OFDM rates */ 1037 case 12: 1038 case 18: 1039 return 12; 1040 case 24: 1041 case 36: 1042 return 24; 1043 case 48: 1044 case 72: 1045 case 96: 1046 case 108: 1047 return 48; 1048 } 1049 1050 /* default to 1Mbps */ 1051 return 2; 1052 } 1053 1054 /* 1055 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1056 * The function automatically determines the operating mode depending on the 1057 * given rate. `flags' indicates whether short preamble is in use or not. 1058 */ 1059 Static uint16_t 1060 ural_txtime(int len, int rate, uint32_t flags) 1061 { 1062 uint16_t txtime; 1063 1064 if (RAL_RATE_IS_OFDM(rate)) { 1065 /* IEEE Std 802.11g-2003, pp. 37 */ 1066 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1067 txtime = 16 + 4 + 4 * txtime + 6; 1068 } else { 1069 /* IEEE Std 802.11b-1999, pp. 28 */ 1070 txtime = (16 * len + rate - 1) / rate; 1071 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1072 txtime += 72 + 24; 1073 else 1074 txtime += 144 + 48; 1075 } 1076 return txtime; 1077 } 1078 1079 Static uint8_t 1080 ural_plcp_signal(int rate) 1081 { 1082 switch (rate) { 1083 /* CCK rates (returned values are device-dependent) */ 1084 case 2: return 0x0; 1085 case 4: return 0x1; 1086 case 11: return 0x2; 1087 case 22: return 0x3; 1088 1089 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1090 case 12: return 0xb; 1091 case 18: return 0xf; 1092 case 24: return 0xa; 1093 case 36: return 0xe; 1094 case 48: return 0x9; 1095 case 72: return 0xd; 1096 case 96: return 0x8; 1097 case 108: return 0xc; 1098 1099 /* unsupported rates (should not get there) */ 1100 default: return 0xff; 1101 } 1102 } 1103 1104 Static void 1105 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1106 uint32_t flags, int len, int rate) 1107 { 1108 struct ieee80211com *ic = &sc->sc_ic; 1109 uint16_t plcp_length; 1110 int remainder; 1111 1112 desc->flags = htole32(flags); 1113 desc->flags |= htole32(RAL_TX_NEWSEQ); 1114 desc->flags |= htole32(len << 16); 1115 1116 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1117 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1118 1119 /* setup PLCP fields */ 1120 desc->plcp_signal = ural_plcp_signal(rate); 1121 desc->plcp_service = 4; 1122 1123 len += IEEE80211_CRC_LEN; 1124 if (RAL_RATE_IS_OFDM(rate)) { 1125 desc->flags |= htole32(RAL_TX_OFDM); 1126 1127 plcp_length = len & 0xfff; 1128 desc->plcp_length_hi = plcp_length >> 6; 1129 desc->plcp_length_lo = plcp_length & 0x3f; 1130 } else { 1131 plcp_length = (16 * len + rate - 1) / rate; 1132 if (rate == 22) { 1133 remainder = (16 * len) % 22; 1134 if (remainder != 0 && remainder < 7) 1135 desc->plcp_service |= RAL_PLCP_LENGEXT; 1136 } 1137 desc->plcp_length_hi = plcp_length >> 8; 1138 desc->plcp_length_lo = plcp_length & 0xff; 1139 1140 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1141 desc->plcp_signal |= 0x08; 1142 } 1143 1144 desc->iv = 0; 1145 desc->eiv = 0; 1146 } 1147 1148 #define RAL_TX_TIMEOUT 5000 1149 1150 Static int 1151 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1152 { 1153 struct ural_tx_desc *desc; 1154 usbd_xfer_handle xfer; 1155 uint8_t cmd = 0; 1156 usbd_status error; 1157 uint8_t *buf; 1158 int xferlen, rate; 1159 1160 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1161 1162 xfer = usbd_alloc_xfer(sc->sc_udev); 1163 if (xfer == NULL) 1164 return ENOMEM; 1165 1166 /* xfer length needs to be a multiple of two! */ 1167 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1168 1169 buf = usbd_alloc_buffer(xfer, xferlen); 1170 if (buf == NULL) { 1171 usbd_free_xfer(xfer); 1172 return ENOMEM; 1173 } 1174 1175 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1176 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1177 1178 error = usbd_sync_transfer(xfer); 1179 if (error != 0) { 1180 usbd_free_xfer(xfer); 1181 return error; 1182 } 1183 1184 desc = (struct ural_tx_desc *)buf; 1185 1186 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1187 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1188 m0->m_pkthdr.len, rate); 1189 1190 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1191 m0->m_pkthdr.len, rate, xferlen)); 1192 1193 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1194 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1195 1196 error = usbd_sync_transfer(xfer); 1197 usbd_free_xfer(xfer); 1198 1199 return error; 1200 } 1201 1202 Static int 1203 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1204 { 1205 struct ieee80211com *ic = &sc->sc_ic; 1206 struct ural_tx_desc *desc; 1207 struct ural_tx_data *data; 1208 struct ieee80211_frame *wh; 1209 struct ieee80211_key *k; 1210 uint32_t flags = 0; 1211 uint16_t dur; 1212 usbd_status error; 1213 int xferlen, rate; 1214 1215 data = &sc->tx_data[0]; 1216 desc = (struct ural_tx_desc *)data->buf; 1217 1218 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1219 1220 wh = mtod(m0, struct ieee80211_frame *); 1221 1222 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1223 k = ieee80211_crypto_encap(ic, ni, m0); 1224 if (k == NULL) { 1225 m_freem(m0); 1226 return ENOBUFS; 1227 } 1228 } 1229 1230 data->m = m0; 1231 data->ni = ni; 1232 1233 wh = mtod(m0, struct ieee80211_frame *); 1234 1235 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1236 flags |= RAL_TX_ACK; 1237 1238 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1239 *(uint16_t *)wh->i_dur = htole16(dur); 1240 1241 /* tell hardware to add timestamp for probe responses */ 1242 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1243 IEEE80211_FC0_TYPE_MGT && 1244 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1245 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1246 flags |= RAL_TX_TIMESTAMP; 1247 } 1248 1249 if (sc->sc_drvbpf != NULL) { 1250 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1251 1252 tap->wt_flags = 0; 1253 tap->wt_rate = rate; 1254 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1255 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1256 tap->wt_antenna = sc->tx_ant; 1257 1258 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1259 } 1260 1261 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1262 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1263 1264 /* align end on a 2-bytes boundary */ 1265 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1266 1267 /* 1268 * No space left in the last URB to store the extra 2 bytes, force 1269 * sending of another URB. 1270 */ 1271 if ((xferlen % 64) == 0) 1272 xferlen += 2; 1273 1274 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1275 m0->m_pkthdr.len, rate, xferlen)); 1276 1277 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1278 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1279 ural_txeof); 1280 1281 error = usbd_transfer(data->xfer); 1282 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1283 m_freem(m0); 1284 return error; 1285 } 1286 1287 sc->tx_queued++; 1288 1289 return 0; 1290 } 1291 1292 Static int 1293 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1294 { 1295 struct ieee80211com *ic = &sc->sc_ic; 1296 struct ural_tx_desc *desc; 1297 struct ural_tx_data *data; 1298 struct ieee80211_frame *wh; 1299 struct ieee80211_key *k; 1300 uint32_t flags = 0; 1301 uint16_t dur; 1302 usbd_status error; 1303 int xferlen, rate; 1304 1305 wh = mtod(m0, struct ieee80211_frame *); 1306 1307 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1308 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1309 else 1310 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1311 1312 rate &= IEEE80211_RATE_VAL; 1313 1314 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1315 k = ieee80211_crypto_encap(ic, ni, m0); 1316 if (k == NULL) { 1317 m_freem(m0); 1318 return ENOBUFS; 1319 } 1320 1321 /* packet header may have moved, reset our local pointer */ 1322 wh = mtod(m0, struct ieee80211_frame *); 1323 } 1324 1325 data = &sc->tx_data[0]; 1326 desc = (struct ural_tx_desc *)data->buf; 1327 1328 data->m = m0; 1329 data->ni = ni; 1330 1331 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1332 flags |= RAL_TX_ACK; 1333 flags |= RAL_TX_RETRY(7); 1334 1335 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1336 ic->ic_flags) + RAL_SIFS; 1337 *(uint16_t *)wh->i_dur = htole16(dur); 1338 } 1339 1340 if (sc->sc_drvbpf != NULL) { 1341 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1342 1343 tap->wt_flags = 0; 1344 tap->wt_rate = rate; 1345 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1346 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1347 tap->wt_antenna = sc->tx_ant; 1348 1349 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1350 } 1351 1352 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1353 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1354 1355 /* align end on a 2-bytes boundary */ 1356 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1357 1358 /* 1359 * No space left in the last URB to store the extra 2 bytes, force 1360 * sending of another URB. 1361 */ 1362 if ((xferlen % 64) == 0) 1363 xferlen += 2; 1364 1365 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1366 m0->m_pkthdr.len, rate, xferlen)); 1367 1368 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1369 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1370 ural_txeof); 1371 1372 error = usbd_transfer(data->xfer); 1373 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1374 return error; 1375 1376 sc->tx_queued++; 1377 1378 return 0; 1379 } 1380 1381 Static void 1382 ural_start(struct ifnet *ifp) 1383 { 1384 struct ural_softc *sc = ifp->if_softc; 1385 struct ieee80211com *ic = &sc->sc_ic; 1386 struct mbuf *m0; 1387 struct ether_header *eh; 1388 struct ieee80211_node *ni; 1389 1390 for (;;) { 1391 IF_POLL(&ic->ic_mgtq, m0); 1392 if (m0 != NULL) { 1393 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1394 ifp->if_flags |= IFF_OACTIVE; 1395 break; 1396 } 1397 IF_DEQUEUE(&ic->ic_mgtq, m0); 1398 1399 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1400 m0->m_pkthdr.rcvif = NULL; 1401 bpf_mtap3(ic->ic_rawbpf, m0); 1402 if (ural_tx_mgt(sc, m0, ni) != 0) 1403 break; 1404 1405 } else { 1406 if (ic->ic_state != IEEE80211_S_RUN) 1407 break; 1408 IFQ_DEQUEUE(&ifp->if_snd, m0); 1409 if (m0 == NULL) 1410 break; 1411 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1412 IF_PREPEND(&ifp->if_snd, m0); 1413 ifp->if_flags |= IFF_OACTIVE; 1414 break; 1415 } 1416 1417 if (m0->m_len < sizeof (struct ether_header) && 1418 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1419 continue; 1420 1421 eh = mtod(m0, struct ether_header *); 1422 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1423 if (ni == NULL) { 1424 m_freem(m0); 1425 continue; 1426 } 1427 bpf_mtap(ifp, m0); 1428 m0 = ieee80211_encap(ic, m0, ni); 1429 if (m0 == NULL) { 1430 ieee80211_free_node(ni); 1431 continue; 1432 } 1433 bpf_mtap3(ic->ic_rawbpf, m0); 1434 if (ural_tx_data(sc, m0, ni) != 0) { 1435 ieee80211_free_node(ni); 1436 ifp->if_oerrors++; 1437 break; 1438 } 1439 } 1440 1441 sc->sc_tx_timer = 5; 1442 ifp->if_timer = 1; 1443 } 1444 } 1445 1446 Static void 1447 ural_watchdog(struct ifnet *ifp) 1448 { 1449 struct ural_softc *sc = ifp->if_softc; 1450 struct ieee80211com *ic = &sc->sc_ic; 1451 1452 ifp->if_timer = 0; 1453 1454 if (sc->sc_tx_timer > 0) { 1455 if (--sc->sc_tx_timer == 0) { 1456 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1457 /*ural_init(sc); XXX needs a process context! */ 1458 ifp->if_oerrors++; 1459 return; 1460 } 1461 ifp->if_timer = 1; 1462 } 1463 1464 ieee80211_watchdog(ic); 1465 } 1466 1467 /* 1468 * This function allows for fast channel switching in monitor mode (used by 1469 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1470 * generate a new beacon frame. 1471 */ 1472 Static int 1473 ural_reset(struct ifnet *ifp) 1474 { 1475 struct ural_softc *sc = ifp->if_softc; 1476 struct ieee80211com *ic = &sc->sc_ic; 1477 1478 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1479 return ENETRESET; 1480 1481 ural_set_chan(sc, ic->ic_curchan); 1482 1483 return 0; 1484 } 1485 1486 Static int 1487 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1488 { 1489 #define IS_RUNNING(ifp) \ 1490 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1491 1492 struct ural_softc *sc = ifp->if_softc; 1493 struct ieee80211com *ic = &sc->sc_ic; 1494 int s, error = 0; 1495 1496 s = splnet(); 1497 1498 switch (cmd) { 1499 case SIOCSIFFLAGS: 1500 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1501 break; 1502 /* XXX re-use ether_ioctl() */ 1503 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1504 case IFF_UP|IFF_RUNNING: 1505 ural_update_promisc(sc); 1506 break; 1507 case IFF_UP: 1508 ural_init(ifp); 1509 break; 1510 case IFF_RUNNING: 1511 ural_stop(ifp, 1); 1512 break; 1513 case 0: 1514 break; 1515 } 1516 break; 1517 1518 case SIOCADDMULTI: 1519 case SIOCDELMULTI: 1520 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1521 error = 0; 1522 } 1523 break; 1524 1525 default: 1526 error = ieee80211_ioctl(ic, cmd, data); 1527 } 1528 1529 if (error == ENETRESET) { 1530 if (IS_RUNNING(ifp) && 1531 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1532 ural_init(ifp); 1533 error = 0; 1534 } 1535 1536 splx(s); 1537 1538 return error; 1539 #undef IS_RUNNING 1540 } 1541 1542 Static void 1543 ural_set_testmode(struct ural_softc *sc) 1544 { 1545 usb_device_request_t req; 1546 usbd_status error; 1547 1548 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1549 req.bRequest = RAL_VENDOR_REQUEST; 1550 USETW(req.wValue, 4); 1551 USETW(req.wIndex, 1); 1552 USETW(req.wLength, 0); 1553 1554 error = usbd_do_request(sc->sc_udev, &req, NULL); 1555 if (error != 0) { 1556 printf("%s: could not set test mode: %s\n", 1557 device_xname(sc->sc_dev), usbd_errstr(error)); 1558 } 1559 } 1560 1561 Static void 1562 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1563 { 1564 usb_device_request_t req; 1565 usbd_status error; 1566 1567 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1568 req.bRequest = RAL_READ_EEPROM; 1569 USETW(req.wValue, 0); 1570 USETW(req.wIndex, addr); 1571 USETW(req.wLength, len); 1572 1573 error = usbd_do_request(sc->sc_udev, &req, buf); 1574 if (error != 0) { 1575 printf("%s: could not read EEPROM: %s\n", 1576 device_xname(sc->sc_dev), usbd_errstr(error)); 1577 } 1578 } 1579 1580 Static uint16_t 1581 ural_read(struct ural_softc *sc, uint16_t reg) 1582 { 1583 usb_device_request_t req; 1584 usbd_status error; 1585 uint16_t val; 1586 1587 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1588 req.bRequest = RAL_READ_MAC; 1589 USETW(req.wValue, 0); 1590 USETW(req.wIndex, reg); 1591 USETW(req.wLength, sizeof (uint16_t)); 1592 1593 error = usbd_do_request(sc->sc_udev, &req, &val); 1594 if (error != 0) { 1595 printf("%s: could not read MAC register: %s\n", 1596 device_xname(sc->sc_dev), usbd_errstr(error)); 1597 return 0; 1598 } 1599 1600 return le16toh(val); 1601 } 1602 1603 Static void 1604 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1605 { 1606 usb_device_request_t req; 1607 usbd_status error; 1608 1609 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1610 req.bRequest = RAL_READ_MULTI_MAC; 1611 USETW(req.wValue, 0); 1612 USETW(req.wIndex, reg); 1613 USETW(req.wLength, len); 1614 1615 error = usbd_do_request(sc->sc_udev, &req, buf); 1616 if (error != 0) { 1617 printf("%s: could not read MAC register: %s\n", 1618 device_xname(sc->sc_dev), usbd_errstr(error)); 1619 } 1620 } 1621 1622 Static void 1623 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1624 { 1625 usb_device_request_t req; 1626 usbd_status error; 1627 1628 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1629 req.bRequest = RAL_WRITE_MAC; 1630 USETW(req.wValue, val); 1631 USETW(req.wIndex, reg); 1632 USETW(req.wLength, 0); 1633 1634 error = usbd_do_request(sc->sc_udev, &req, NULL); 1635 if (error != 0) { 1636 printf("%s: could not write MAC register: %s\n", 1637 device_xname(sc->sc_dev), usbd_errstr(error)); 1638 } 1639 } 1640 1641 Static void 1642 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1643 { 1644 usb_device_request_t req; 1645 usbd_status error; 1646 1647 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1648 req.bRequest = RAL_WRITE_MULTI_MAC; 1649 USETW(req.wValue, 0); 1650 USETW(req.wIndex, reg); 1651 USETW(req.wLength, len); 1652 1653 error = usbd_do_request(sc->sc_udev, &req, buf); 1654 if (error != 0) { 1655 printf("%s: could not write MAC register: %s\n", 1656 device_xname(sc->sc_dev), usbd_errstr(error)); 1657 } 1658 } 1659 1660 Static void 1661 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1662 { 1663 uint16_t tmp; 1664 int ntries; 1665 1666 for (ntries = 0; ntries < 5; ntries++) { 1667 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1668 break; 1669 } 1670 if (ntries == 5) { 1671 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1672 return; 1673 } 1674 1675 tmp = reg << 8 | val; 1676 ural_write(sc, RAL_PHY_CSR7, tmp); 1677 } 1678 1679 Static uint8_t 1680 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1681 { 1682 uint16_t val; 1683 int ntries; 1684 1685 val = RAL_BBP_WRITE | reg << 8; 1686 ural_write(sc, RAL_PHY_CSR7, val); 1687 1688 for (ntries = 0; ntries < 5; ntries++) { 1689 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1690 break; 1691 } 1692 if (ntries == 5) { 1693 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1694 return 0; 1695 } 1696 1697 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1698 } 1699 1700 Static void 1701 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1702 { 1703 uint32_t tmp; 1704 int ntries; 1705 1706 for (ntries = 0; ntries < 5; ntries++) { 1707 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1708 break; 1709 } 1710 if (ntries == 5) { 1711 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1712 return; 1713 } 1714 1715 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1716 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1717 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1718 1719 /* remember last written value in sc */ 1720 sc->rf_regs[reg] = val; 1721 1722 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1723 } 1724 1725 Static void 1726 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1727 { 1728 struct ieee80211com *ic = &sc->sc_ic; 1729 uint8_t power, tmp; 1730 u_int i, chan; 1731 1732 chan = ieee80211_chan2ieee(ic, c); 1733 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1734 return; 1735 1736 if (IEEE80211_IS_CHAN_2GHZ(c)) 1737 power = min(sc->txpow[chan - 1], 31); 1738 else 1739 power = 31; 1740 1741 /* adjust txpower using ifconfig settings */ 1742 power -= (100 - ic->ic_txpowlimit) / 8; 1743 1744 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1745 1746 switch (sc->rf_rev) { 1747 case RAL_RF_2522: 1748 ural_rf_write(sc, RAL_RF1, 0x00814); 1749 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1750 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1751 break; 1752 1753 case RAL_RF_2523: 1754 ural_rf_write(sc, RAL_RF1, 0x08804); 1755 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1756 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1757 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1758 break; 1759 1760 case RAL_RF_2524: 1761 ural_rf_write(sc, RAL_RF1, 0x0c808); 1762 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1763 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1764 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1765 break; 1766 1767 case RAL_RF_2525: 1768 ural_rf_write(sc, RAL_RF1, 0x08808); 1769 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1770 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1771 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1772 1773 ural_rf_write(sc, RAL_RF1, 0x08808); 1774 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1775 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1776 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1777 break; 1778 1779 case RAL_RF_2525E: 1780 ural_rf_write(sc, RAL_RF1, 0x08808); 1781 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1782 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1783 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1784 break; 1785 1786 case RAL_RF_2526: 1787 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1788 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1789 ural_rf_write(sc, RAL_RF1, 0x08804); 1790 1791 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1792 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1793 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1794 break; 1795 1796 /* dual-band RF */ 1797 case RAL_RF_5222: 1798 for (i = 0; ural_rf5222[i].chan != chan; i++); 1799 1800 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1801 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1802 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1803 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1804 break; 1805 } 1806 1807 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1808 ic->ic_state != IEEE80211_S_SCAN) { 1809 /* set Japan filter bit for channel 14 */ 1810 tmp = ural_bbp_read(sc, 70); 1811 1812 tmp &= ~RAL_JAPAN_FILTER; 1813 if (chan == 14) 1814 tmp |= RAL_JAPAN_FILTER; 1815 1816 ural_bbp_write(sc, 70, tmp); 1817 1818 /* clear CRC errors */ 1819 ural_read(sc, RAL_STA_CSR0); 1820 1821 DELAY(10000); 1822 ural_disable_rf_tune(sc); 1823 } 1824 } 1825 1826 /* 1827 * Disable RF auto-tuning. 1828 */ 1829 Static void 1830 ural_disable_rf_tune(struct ural_softc *sc) 1831 { 1832 uint32_t tmp; 1833 1834 if (sc->rf_rev != RAL_RF_2523) { 1835 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1836 ural_rf_write(sc, RAL_RF1, tmp); 1837 } 1838 1839 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1840 ural_rf_write(sc, RAL_RF3, tmp); 1841 1842 DPRINTFN(2, ("disabling RF autotune\n")); 1843 } 1844 1845 /* 1846 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1847 * synchronization. 1848 */ 1849 Static void 1850 ural_enable_tsf_sync(struct ural_softc *sc) 1851 { 1852 struct ieee80211com *ic = &sc->sc_ic; 1853 uint16_t logcwmin, preload, tmp; 1854 1855 /* first, disable TSF synchronization */ 1856 ural_write(sc, RAL_TXRX_CSR19, 0); 1857 1858 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1859 ural_write(sc, RAL_TXRX_CSR18, tmp); 1860 1861 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1862 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1863 tmp = logcwmin << 12 | preload; 1864 ural_write(sc, RAL_TXRX_CSR20, tmp); 1865 1866 /* finally, enable TSF synchronization */ 1867 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1868 if (ic->ic_opmode == IEEE80211_M_STA) 1869 tmp |= RAL_ENABLE_TSF_SYNC(1); 1870 else 1871 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1872 ural_write(sc, RAL_TXRX_CSR19, tmp); 1873 1874 DPRINTF(("enabling TSF synchronization\n")); 1875 } 1876 1877 Static void 1878 ural_update_slot(struct ifnet *ifp) 1879 { 1880 struct ural_softc *sc = ifp->if_softc; 1881 struct ieee80211com *ic = &sc->sc_ic; 1882 uint16_t slottime, sifs, eifs; 1883 1884 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1885 1886 /* 1887 * These settings may sound a bit inconsistent but this is what the 1888 * reference driver does. 1889 */ 1890 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1891 sifs = 16 - RAL_RXTX_TURNAROUND; 1892 eifs = 364; 1893 } else { 1894 sifs = 10 - RAL_RXTX_TURNAROUND; 1895 eifs = 64; 1896 } 1897 1898 ural_write(sc, RAL_MAC_CSR10, slottime); 1899 ural_write(sc, RAL_MAC_CSR11, sifs); 1900 ural_write(sc, RAL_MAC_CSR12, eifs); 1901 } 1902 1903 Static void 1904 ural_set_txpreamble(struct ural_softc *sc) 1905 { 1906 uint16_t tmp; 1907 1908 tmp = ural_read(sc, RAL_TXRX_CSR10); 1909 1910 tmp &= ~RAL_SHORT_PREAMBLE; 1911 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1912 tmp |= RAL_SHORT_PREAMBLE; 1913 1914 ural_write(sc, RAL_TXRX_CSR10, tmp); 1915 } 1916 1917 Static void 1918 ural_set_basicrates(struct ural_softc *sc) 1919 { 1920 struct ieee80211com *ic = &sc->sc_ic; 1921 1922 /* update basic rate set */ 1923 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1924 /* 11b basic rates: 1, 2Mbps */ 1925 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1926 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1927 /* 11a basic rates: 6, 12, 24Mbps */ 1928 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1929 } else { 1930 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1931 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1932 } 1933 } 1934 1935 Static void 1936 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1937 { 1938 uint16_t tmp; 1939 1940 tmp = bssid[0] | bssid[1] << 8; 1941 ural_write(sc, RAL_MAC_CSR5, tmp); 1942 1943 tmp = bssid[2] | bssid[3] << 8; 1944 ural_write(sc, RAL_MAC_CSR6, tmp); 1945 1946 tmp = bssid[4] | bssid[5] << 8; 1947 ural_write(sc, RAL_MAC_CSR7, tmp); 1948 1949 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1950 } 1951 1952 Static void 1953 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1954 { 1955 uint16_t tmp; 1956 1957 tmp = addr[0] | addr[1] << 8; 1958 ural_write(sc, RAL_MAC_CSR2, tmp); 1959 1960 tmp = addr[2] | addr[3] << 8; 1961 ural_write(sc, RAL_MAC_CSR3, tmp); 1962 1963 tmp = addr[4] | addr[5] << 8; 1964 ural_write(sc, RAL_MAC_CSR4, tmp); 1965 1966 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1967 } 1968 1969 Static void 1970 ural_update_promisc(struct ural_softc *sc) 1971 { 1972 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1973 uint32_t tmp; 1974 1975 tmp = ural_read(sc, RAL_TXRX_CSR2); 1976 1977 tmp &= ~RAL_DROP_NOT_TO_ME; 1978 if (!(ifp->if_flags & IFF_PROMISC)) 1979 tmp |= RAL_DROP_NOT_TO_ME; 1980 1981 ural_write(sc, RAL_TXRX_CSR2, tmp); 1982 1983 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1984 "entering" : "leaving")); 1985 } 1986 1987 Static const char * 1988 ural_get_rf(int rev) 1989 { 1990 switch (rev) { 1991 case RAL_RF_2522: return "RT2522"; 1992 case RAL_RF_2523: return "RT2523"; 1993 case RAL_RF_2524: return "RT2524"; 1994 case RAL_RF_2525: return "RT2525"; 1995 case RAL_RF_2525E: return "RT2525e"; 1996 case RAL_RF_2526: return "RT2526"; 1997 case RAL_RF_5222: return "RT5222"; 1998 default: return "unknown"; 1999 } 2000 } 2001 2002 Static void 2003 ural_read_eeprom(struct ural_softc *sc) 2004 { 2005 struct ieee80211com *ic = &sc->sc_ic; 2006 uint16_t val; 2007 2008 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2009 val = le16toh(val); 2010 sc->rf_rev = (val >> 11) & 0x7; 2011 sc->hw_radio = (val >> 10) & 0x1; 2012 sc->led_mode = (val >> 6) & 0x7; 2013 sc->rx_ant = (val >> 4) & 0x3; 2014 sc->tx_ant = (val >> 2) & 0x3; 2015 sc->nb_ant = val & 0x3; 2016 2017 /* read MAC address */ 2018 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2019 2020 /* read default values for BBP registers */ 2021 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2022 2023 /* read Tx power for all b/g channels */ 2024 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2025 } 2026 2027 Static int 2028 ural_bbp_init(struct ural_softc *sc) 2029 { 2030 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2031 int i, ntries; 2032 2033 /* wait for BBP to be ready */ 2034 for (ntries = 0; ntries < 100; ntries++) { 2035 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2036 break; 2037 DELAY(1000); 2038 } 2039 if (ntries == 100) { 2040 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2041 return EIO; 2042 } 2043 2044 /* initialize BBP registers to default values */ 2045 for (i = 0; i < N(ural_def_bbp); i++) 2046 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2047 2048 #if 0 2049 /* initialize BBP registers to values stored in EEPROM */ 2050 for (i = 0; i < 16; i++) { 2051 if (sc->bbp_prom[i].reg == 0xff) 2052 continue; 2053 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2054 } 2055 #endif 2056 2057 return 0; 2058 #undef N 2059 } 2060 2061 Static void 2062 ural_set_txantenna(struct ural_softc *sc, int antenna) 2063 { 2064 uint16_t tmp; 2065 uint8_t tx; 2066 2067 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2068 if (antenna == 1) 2069 tx |= RAL_BBP_ANTA; 2070 else if (antenna == 2) 2071 tx |= RAL_BBP_ANTB; 2072 else 2073 tx |= RAL_BBP_DIVERSITY; 2074 2075 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2076 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2077 sc->rf_rev == RAL_RF_5222) 2078 tx |= RAL_BBP_FLIPIQ; 2079 2080 ural_bbp_write(sc, RAL_BBP_TX, tx); 2081 2082 /* update values in PHY_CSR5 and PHY_CSR6 */ 2083 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2084 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2085 2086 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2087 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2088 } 2089 2090 Static void 2091 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2092 { 2093 uint8_t rx; 2094 2095 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2096 if (antenna == 1) 2097 rx |= RAL_BBP_ANTA; 2098 else if (antenna == 2) 2099 rx |= RAL_BBP_ANTB; 2100 else 2101 rx |= RAL_BBP_DIVERSITY; 2102 2103 /* need to force no I/Q flip for RF 2525e and 2526 */ 2104 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2105 rx &= ~RAL_BBP_FLIPIQ; 2106 2107 ural_bbp_write(sc, RAL_BBP_RX, rx); 2108 } 2109 2110 Static int 2111 ural_init(struct ifnet *ifp) 2112 { 2113 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2114 struct ural_softc *sc = ifp->if_softc; 2115 struct ieee80211com *ic = &sc->sc_ic; 2116 struct ieee80211_key *wk; 2117 struct ural_rx_data *data; 2118 uint16_t tmp; 2119 usbd_status error; 2120 int i, ntries; 2121 2122 ural_set_testmode(sc); 2123 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2124 2125 ural_stop(ifp, 0); 2126 2127 /* initialize MAC registers to default values */ 2128 for (i = 0; i < N(ural_def_mac); i++) 2129 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2130 2131 /* wait for BBP and RF to wake up (this can take a long time!) */ 2132 for (ntries = 0; ntries < 100; ntries++) { 2133 tmp = ural_read(sc, RAL_MAC_CSR17); 2134 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2135 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2136 break; 2137 DELAY(1000); 2138 } 2139 if (ntries == 100) { 2140 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2141 device_xname(sc->sc_dev)); 2142 error = EIO; 2143 goto fail; 2144 } 2145 2146 /* we're ready! */ 2147 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2148 2149 /* set basic rate set (will be updated later) */ 2150 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2151 2152 error = ural_bbp_init(sc); 2153 if (error != 0) 2154 goto fail; 2155 2156 /* set default BSS channel */ 2157 ural_set_chan(sc, ic->ic_curchan); 2158 2159 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2160 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2161 2162 ural_set_txantenna(sc, sc->tx_ant); 2163 ural_set_rxantenna(sc, sc->rx_ant); 2164 2165 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2166 ural_set_macaddr(sc, ic->ic_myaddr); 2167 2168 /* 2169 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2170 */ 2171 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2172 wk = &ic->ic_crypto.cs_nw_keys[i]; 2173 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2174 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2175 } 2176 2177 /* 2178 * Allocate xfer for AMRR statistics requests. 2179 */ 2180 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2181 if (sc->amrr_xfer == NULL) { 2182 printf("%s: could not allocate AMRR xfer\n", 2183 device_xname(sc->sc_dev)); 2184 goto fail; 2185 } 2186 2187 /* 2188 * Open Tx and Rx USB bulk pipes. 2189 */ 2190 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2191 &sc->sc_tx_pipeh); 2192 if (error != 0) { 2193 printf("%s: could not open Tx pipe: %s\n", 2194 device_xname(sc->sc_dev), usbd_errstr(error)); 2195 goto fail; 2196 } 2197 2198 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2199 &sc->sc_rx_pipeh); 2200 if (error != 0) { 2201 printf("%s: could not open Rx pipe: %s\n", 2202 device_xname(sc->sc_dev), usbd_errstr(error)); 2203 goto fail; 2204 } 2205 2206 /* 2207 * Allocate Tx and Rx xfer queues. 2208 */ 2209 error = ural_alloc_tx_list(sc); 2210 if (error != 0) { 2211 printf("%s: could not allocate Tx list\n", 2212 device_xname(sc->sc_dev)); 2213 goto fail; 2214 } 2215 2216 error = ural_alloc_rx_list(sc); 2217 if (error != 0) { 2218 printf("%s: could not allocate Rx list\n", 2219 device_xname(sc->sc_dev)); 2220 goto fail; 2221 } 2222 2223 /* 2224 * Start up the receive pipe. 2225 */ 2226 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2227 data = &sc->rx_data[i]; 2228 2229 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2230 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2231 usbd_transfer(data->xfer); 2232 } 2233 2234 /* kick Rx */ 2235 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2236 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2237 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2238 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2239 tmp |= RAL_DROP_TODS; 2240 if (!(ifp->if_flags & IFF_PROMISC)) 2241 tmp |= RAL_DROP_NOT_TO_ME; 2242 } 2243 ural_write(sc, RAL_TXRX_CSR2, tmp); 2244 2245 ifp->if_flags &= ~IFF_OACTIVE; 2246 ifp->if_flags |= IFF_RUNNING; 2247 2248 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2249 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2250 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2251 } else 2252 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2253 2254 return 0; 2255 2256 fail: ural_stop(ifp, 1); 2257 return error; 2258 #undef N 2259 } 2260 2261 Static void 2262 ural_stop(struct ifnet *ifp, int disable) 2263 { 2264 struct ural_softc *sc = ifp->if_softc; 2265 struct ieee80211com *ic = &sc->sc_ic; 2266 2267 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2268 2269 sc->sc_tx_timer = 0; 2270 ifp->if_timer = 0; 2271 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2272 2273 /* disable Rx */ 2274 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2275 2276 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2277 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2278 ural_write(sc, RAL_MAC_CSR1, 0); 2279 2280 if (sc->amrr_xfer != NULL) { 2281 usbd_free_xfer(sc->amrr_xfer); 2282 sc->amrr_xfer = NULL; 2283 } 2284 2285 if (sc->sc_rx_pipeh != NULL) { 2286 usbd_abort_pipe(sc->sc_rx_pipeh); 2287 usbd_close_pipe(sc->sc_rx_pipeh); 2288 sc->sc_rx_pipeh = NULL; 2289 } 2290 2291 if (sc->sc_tx_pipeh != NULL) { 2292 usbd_abort_pipe(sc->sc_tx_pipeh); 2293 usbd_close_pipe(sc->sc_tx_pipeh); 2294 sc->sc_tx_pipeh = NULL; 2295 } 2296 2297 ural_free_rx_list(sc); 2298 ural_free_tx_list(sc); 2299 } 2300 2301 int 2302 ural_activate(device_t self, enum devact act) 2303 { 2304 struct ural_softc *sc = device_private(self); 2305 2306 switch (act) { 2307 case DVACT_DEACTIVATE: 2308 if_deactivate(&sc->sc_if); 2309 return 0; 2310 default: 2311 return EOPNOTSUPP; 2312 } 2313 } 2314 2315 Static void 2316 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2317 { 2318 int i; 2319 2320 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2321 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2322 2323 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2324 2325 /* set rate to some reasonable initial value */ 2326 for (i = ni->ni_rates.rs_nrates - 1; 2327 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2328 i--); 2329 ni->ni_txrate = i; 2330 2331 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2332 } 2333 2334 Static void 2335 ural_amrr_timeout(void *arg) 2336 { 2337 struct ural_softc *sc = (struct ural_softc *)arg; 2338 usb_device_request_t req; 2339 int s; 2340 2341 s = splusb(); 2342 2343 /* 2344 * Asynchronously read statistic registers (cleared by read). 2345 */ 2346 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2347 req.bRequest = RAL_READ_MULTI_MAC; 2348 USETW(req.wValue, 0); 2349 USETW(req.wIndex, RAL_STA_CSR0); 2350 USETW(req.wLength, sizeof sc->sta); 2351 2352 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2353 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2354 ural_amrr_update); 2355 (void)usbd_transfer(sc->amrr_xfer); 2356 2357 splx(s); 2358 } 2359 2360 Static void 2361 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2362 usbd_status status) 2363 { 2364 struct ural_softc *sc = (struct ural_softc *)priv; 2365 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2366 2367 if (status != USBD_NORMAL_COMPLETION) { 2368 printf("%s: could not retrieve Tx statistics - " 2369 "cancelling automatic rate control\n", 2370 device_xname(sc->sc_dev)); 2371 return; 2372 } 2373 2374 /* count TX retry-fail as Tx errors */ 2375 ifp->if_oerrors += sc->sta[9]; 2376 2377 sc->amn.amn_retrycnt = 2378 sc->sta[7] + /* TX one-retry ok count */ 2379 sc->sta[8] + /* TX more-retry ok count */ 2380 sc->sta[9]; /* TX retry-fail count */ 2381 2382 sc->amn.amn_txcnt = 2383 sc->amn.amn_retrycnt + 2384 sc->sta[6]; /* TX no-retry ok count */ 2385 2386 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2387 2388 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2389 } 2390
Indexes created Tue Sep 30 07:10:03 GMT 2025