if_ural.c revision 1.42
1 /* $NetBSD: if_ural.c,v 1.42 2013/01/05 01:30:16 christos Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.42 2013/01/05 01:30:16 christos Exp $"); 28 29 #ifdef _KERNEL_OPT 30 #include "opt_usb.h" 31 #endif 32 33 #include <sys/param.h> 34 #include <sys/sockio.h> 35 #include <sys/sysctl.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/malloc.h> 41 #include <sys/conf.h> 42 #include <sys/device.h> 43 44 #include <sys/bus.h> 45 #include <machine/endian.h> 46 #include <sys/intr.h> 47 48 #include <net/bpf.h> 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_ether.h> 53 #include <net/if_media.h> 54 #include <net/if_types.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_var.h> 63 #include <net80211/ieee80211_amrr.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 71 #include <dev/usb/if_uralreg.h> 72 #include <dev/usb/if_uralvar.h> 73 74 #ifdef USB_DEBUG 75 #define URAL_DEBUG 76 #endif 77 78 #ifdef URAL_DEBUG 79 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 81 int ural_debug = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n, x) 85 #endif 86 87 /* various supported device vendors/products */ 88 static const struct usb_devno ural_devs[] = { 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 95 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 96 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 97 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 98 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 101 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 102 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 104 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 105 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 106 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 107 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 108 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 109 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 110 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 111 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 112 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 113 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 114 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 115 }; 116 117 Static int ural_alloc_tx_list(struct ural_softc *); 118 Static void ural_free_tx_list(struct ural_softc *); 119 Static int ural_alloc_rx_list(struct ural_softc *); 120 Static void ural_free_rx_list(struct ural_softc *); 121 Static int ural_media_change(struct ifnet *); 122 Static void ural_next_scan(void *); 123 Static void ural_task(void *); 124 Static int ural_newstate(struct ieee80211com *, 125 enum ieee80211_state, int); 126 Static int ural_rxrate(struct ural_rx_desc *); 127 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 128 usbd_status); 129 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 130 usbd_status); 131 Static int ural_ack_rate(struct ieee80211com *, int); 132 Static uint16_t ural_txtime(int, int, uint32_t); 133 Static uint8_t ural_plcp_signal(int); 134 Static void ural_setup_tx_desc(struct ural_softc *, 135 struct ural_tx_desc *, uint32_t, int, int); 136 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 137 struct ieee80211_node *); 138 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 139 struct ieee80211_node *); 140 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 141 struct ieee80211_node *); 142 Static void ural_start(struct ifnet *); 143 Static void ural_watchdog(struct ifnet *); 144 Static int ural_reset(struct ifnet *); 145 Static int ural_ioctl(struct ifnet *, u_long, void *); 146 Static void ural_set_testmode(struct ural_softc *); 147 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 148 int); 149 Static uint16_t ural_read(struct ural_softc *, uint16_t); 150 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 151 int); 152 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 153 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 154 int); 155 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 156 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 157 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 158 Static void ural_set_chan(struct ural_softc *, 159 struct ieee80211_channel *); 160 Static void ural_disable_rf_tune(struct ural_softc *); 161 Static void ural_enable_tsf_sync(struct ural_softc *); 162 Static void ural_update_slot(struct ifnet *); 163 Static void ural_set_txpreamble(struct ural_softc *); 164 Static void ural_set_basicrates(struct ural_softc *); 165 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 166 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 167 Static void ural_update_promisc(struct ural_softc *); 168 Static const char *ural_get_rf(int); 169 Static void ural_read_eeprom(struct ural_softc *); 170 Static int ural_bbp_init(struct ural_softc *); 171 Static void ural_set_txantenna(struct ural_softc *, int); 172 Static void ural_set_rxantenna(struct ural_softc *, int); 173 Static int ural_init(struct ifnet *); 174 Static void ural_stop(struct ifnet *, int); 175 Static void ural_amrr_start(struct ural_softc *, 176 struct ieee80211_node *); 177 Static void ural_amrr_timeout(void *); 178 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 179 usbd_status status); 180 181 /* 182 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 183 */ 184 static const struct ieee80211_rateset ural_rateset_11a = 185 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 186 187 static const struct ieee80211_rateset ural_rateset_11b = 188 { 4, { 2, 4, 11, 22 } }; 189 190 static const struct ieee80211_rateset ural_rateset_11g = 191 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 192 193 /* 194 * Default values for MAC registers; values taken from the reference driver. 195 */ 196 static const struct { 197 uint16_t reg; 198 uint16_t val; 199 } ural_def_mac[] = { 200 { RAL_TXRX_CSR5, 0x8c8d }, 201 { RAL_TXRX_CSR6, 0x8b8a }, 202 { RAL_TXRX_CSR7, 0x8687 }, 203 { RAL_TXRX_CSR8, 0x0085 }, 204 { RAL_MAC_CSR13, 0x1111 }, 205 { RAL_MAC_CSR14, 0x1e11 }, 206 { RAL_TXRX_CSR21, 0xe78f }, 207 { RAL_MAC_CSR9, 0xff1d }, 208 { RAL_MAC_CSR11, 0x0002 }, 209 { RAL_MAC_CSR22, 0x0053 }, 210 { RAL_MAC_CSR15, 0x0000 }, 211 { RAL_MAC_CSR8, 0x0780 }, 212 { RAL_TXRX_CSR19, 0x0000 }, 213 { RAL_TXRX_CSR18, 0x005a }, 214 { RAL_PHY_CSR2, 0x0000 }, 215 { RAL_TXRX_CSR0, 0x1ec0 }, 216 { RAL_PHY_CSR4, 0x000f } 217 }; 218 219 /* 220 * Default values for BBP registers; values taken from the reference driver. 221 */ 222 static const struct { 223 uint8_t reg; 224 uint8_t val; 225 } ural_def_bbp[] = { 226 { 3, 0x02 }, 227 { 4, 0x19 }, 228 { 14, 0x1c }, 229 { 15, 0x30 }, 230 { 16, 0xac }, 231 { 17, 0x48 }, 232 { 18, 0x18 }, 233 { 19, 0xff }, 234 { 20, 0x1e }, 235 { 21, 0x08 }, 236 { 22, 0x08 }, 237 { 23, 0x08 }, 238 { 24, 0x80 }, 239 { 25, 0x50 }, 240 { 26, 0x08 }, 241 { 27, 0x23 }, 242 { 30, 0x10 }, 243 { 31, 0x2b }, 244 { 32, 0xb9 }, 245 { 34, 0x12 }, 246 { 35, 0x50 }, 247 { 39, 0xc4 }, 248 { 40, 0x02 }, 249 { 41, 0x60 }, 250 { 53, 0x10 }, 251 { 54, 0x18 }, 252 { 56, 0x08 }, 253 { 57, 0x10 }, 254 { 58, 0x08 }, 255 { 61, 0x60 }, 256 { 62, 0x10 }, 257 { 75, 0xff } 258 }; 259 260 /* 261 * Default values for RF register R2 indexed by channel numbers. 262 */ 263 static const uint32_t ural_rf2522_r2[] = { 264 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 265 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 266 }; 267 268 static const uint32_t ural_rf2523_r2[] = { 269 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 270 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 271 }; 272 273 static const uint32_t ural_rf2524_r2[] = { 274 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 275 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 276 }; 277 278 static const uint32_t ural_rf2525_r2[] = { 279 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 280 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 281 }; 282 283 static const uint32_t ural_rf2525_hi_r2[] = { 284 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 285 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 286 }; 287 288 static const uint32_t ural_rf2525e_r2[] = { 289 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 290 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 291 }; 292 293 static const uint32_t ural_rf2526_hi_r2[] = { 294 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 295 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 296 }; 297 298 static const uint32_t ural_rf2526_r2[] = { 299 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 300 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 301 }; 302 303 /* 304 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 305 * values taken from the reference driver. 306 */ 307 static const struct { 308 uint8_t chan; 309 uint32_t r1; 310 uint32_t r2; 311 uint32_t r4; 312 } ural_rf5222[] = { 313 { 1, 0x08808, 0x0044d, 0x00282 }, 314 { 2, 0x08808, 0x0044e, 0x00282 }, 315 { 3, 0x08808, 0x0044f, 0x00282 }, 316 { 4, 0x08808, 0x00460, 0x00282 }, 317 { 5, 0x08808, 0x00461, 0x00282 }, 318 { 6, 0x08808, 0x00462, 0x00282 }, 319 { 7, 0x08808, 0x00463, 0x00282 }, 320 { 8, 0x08808, 0x00464, 0x00282 }, 321 { 9, 0x08808, 0x00465, 0x00282 }, 322 { 10, 0x08808, 0x00466, 0x00282 }, 323 { 11, 0x08808, 0x00467, 0x00282 }, 324 { 12, 0x08808, 0x00468, 0x00282 }, 325 { 13, 0x08808, 0x00469, 0x00282 }, 326 { 14, 0x08808, 0x0046b, 0x00286 }, 327 328 { 36, 0x08804, 0x06225, 0x00287 }, 329 { 40, 0x08804, 0x06226, 0x00287 }, 330 { 44, 0x08804, 0x06227, 0x00287 }, 331 { 48, 0x08804, 0x06228, 0x00287 }, 332 { 52, 0x08804, 0x06229, 0x00287 }, 333 { 56, 0x08804, 0x0622a, 0x00287 }, 334 { 60, 0x08804, 0x0622b, 0x00287 }, 335 { 64, 0x08804, 0x0622c, 0x00287 }, 336 337 { 100, 0x08804, 0x02200, 0x00283 }, 338 { 104, 0x08804, 0x02201, 0x00283 }, 339 { 108, 0x08804, 0x02202, 0x00283 }, 340 { 112, 0x08804, 0x02203, 0x00283 }, 341 { 116, 0x08804, 0x02204, 0x00283 }, 342 { 120, 0x08804, 0x02205, 0x00283 }, 343 { 124, 0x08804, 0x02206, 0x00283 }, 344 { 128, 0x08804, 0x02207, 0x00283 }, 345 { 132, 0x08804, 0x02208, 0x00283 }, 346 { 136, 0x08804, 0x02209, 0x00283 }, 347 { 140, 0x08804, 0x0220a, 0x00283 }, 348 349 { 149, 0x08808, 0x02429, 0x00281 }, 350 { 153, 0x08808, 0x0242b, 0x00281 }, 351 { 157, 0x08808, 0x0242d, 0x00281 }, 352 { 161, 0x08808, 0x0242f, 0x00281 } 353 }; 354 355 int ural_match(device_t, cfdata_t, void *); 356 void ural_attach(device_t, device_t, void *); 357 int ural_detach(device_t, int); 358 int ural_activate(device_t, enum devact); 359 extern struct cfdriver ural_cd; 360 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate); 361 362 int 363 ural_match(device_t parent, cfdata_t match, void *aux) 364 { 365 struct usb_attach_arg *uaa = aux; 366 367 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 368 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 369 } 370 371 void 372 ural_attach(device_t parent, device_t self, void *aux) 373 { 374 struct ural_softc *sc = device_private(self); 375 struct usb_attach_arg *uaa = aux; 376 struct ieee80211com *ic = &sc->sc_ic; 377 struct ifnet *ifp = &sc->sc_if; 378 usb_interface_descriptor_t *id; 379 usb_endpoint_descriptor_t *ed; 380 usbd_status error; 381 char *devinfop; 382 int i; 383 384 sc->sc_dev = self; 385 sc->sc_udev = uaa->device; 386 387 aprint_naive("\n"); 388 aprint_normal("\n"); 389 390 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 391 aprint_normal_dev(self, "%s\n", devinfop); 392 usbd_devinfo_free(devinfop); 393 394 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 395 if (error != 0) { 396 aprint_error_dev(self, "failed to set configuration" 397 ", err=%s\n", usbd_errstr(error)); 398 return; 399 } 400 401 /* get the first interface handle */ 402 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 403 &sc->sc_iface); 404 if (error != 0) { 405 aprint_error_dev(self, "could not get interface handle\n"); 406 return; 407 } 408 409 /* 410 * Find endpoints. 411 */ 412 id = usbd_get_interface_descriptor(sc->sc_iface); 413 414 sc->sc_rx_no = sc->sc_tx_no = -1; 415 for (i = 0; i < id->bNumEndpoints; i++) { 416 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 417 if (ed == NULL) { 418 aprint_error_dev(self, 419 "no endpoint descriptor for %d\n", i); 420 return; 421 } 422 423 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 424 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 425 sc->sc_rx_no = ed->bEndpointAddress; 426 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 427 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 428 sc->sc_tx_no = ed->bEndpointAddress; 429 } 430 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 431 aprint_error_dev(self, "missing endpoint\n"); 432 return; 433 } 434 435 usb_init_task(&sc->sc_task, ural_task, sc); 436 callout_init(&sc->sc_scan_ch, 0); 437 sc->amrr.amrr_min_success_threshold = 1; 438 sc->amrr.amrr_max_success_threshold = 15; 439 callout_init(&sc->sc_amrr_ch, 0); 440 441 /* retrieve RT2570 rev. no */ 442 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 443 444 /* retrieve MAC address and various other things from EEPROM */ 445 ural_read_eeprom(sc); 446 447 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 448 sc->asic_rev, ural_get_rf(sc->rf_rev)); 449 450 ifp->if_softc = sc; 451 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 452 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 453 ifp->if_init = ural_init; 454 ifp->if_ioctl = ural_ioctl; 455 ifp->if_start = ural_start; 456 ifp->if_watchdog = ural_watchdog; 457 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 458 IFQ_SET_READY(&ifp->if_snd); 459 460 ic->ic_ifp = ifp; 461 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 462 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 463 ic->ic_state = IEEE80211_S_INIT; 464 465 /* set device capabilities */ 466 ic->ic_caps = 467 IEEE80211_C_IBSS | /* IBSS mode supported */ 468 IEEE80211_C_MONITOR | /* monitor mode supported */ 469 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 470 IEEE80211_C_TXPMGT | /* tx power management */ 471 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 472 IEEE80211_C_SHSLOT | /* short slot time supported */ 473 IEEE80211_C_WPA; /* 802.11i */ 474 475 if (sc->rf_rev == RAL_RF_5222) { 476 /* set supported .11a rates */ 477 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 478 479 /* set supported .11a channels */ 480 for (i = 36; i <= 64; i += 4) { 481 ic->ic_channels[i].ic_freq = 482 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 483 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 484 } 485 for (i = 100; i <= 140; i += 4) { 486 ic->ic_channels[i].ic_freq = 487 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 488 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 489 } 490 for (i = 149; i <= 161; i += 4) { 491 ic->ic_channels[i].ic_freq = 492 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 493 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 494 } 495 } 496 497 /* set supported .11b and .11g rates */ 498 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 499 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 500 501 /* set supported .11b and .11g channels (1 through 14) */ 502 for (i = 1; i <= 14; i++) { 503 ic->ic_channels[i].ic_freq = 504 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 505 ic->ic_channels[i].ic_flags = 506 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 507 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 508 } 509 510 if_attach(ifp); 511 ieee80211_ifattach(ic); 512 ic->ic_reset = ural_reset; 513 514 /* override state transition machine */ 515 sc->sc_newstate = ic->ic_newstate; 516 ic->ic_newstate = ural_newstate; 517 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 518 519 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 520 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 521 522 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 523 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 524 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 525 526 sc->sc_txtap_len = sizeof sc->sc_txtapu; 527 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 528 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 529 530 ieee80211_announce(ic); 531 532 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 533 sc->sc_dev); 534 535 return; 536 } 537 538 int 539 ural_detach(device_t self, int flags) 540 { 541 struct ural_softc *sc = device_private(self); 542 struct ieee80211com *ic = &sc->sc_ic; 543 struct ifnet *ifp = &sc->sc_if; 544 int s; 545 546 s = splusb(); 547 548 ural_stop(ifp, 1); 549 usb_rem_task(sc->sc_udev, &sc->sc_task); 550 callout_stop(&sc->sc_scan_ch); 551 callout_stop(&sc->sc_amrr_ch); 552 553 if (sc->amrr_xfer != NULL) { 554 usbd_free_xfer(sc->amrr_xfer); 555 sc->amrr_xfer = NULL; 556 } 557 558 if (sc->sc_rx_pipeh != NULL) { 559 usbd_abort_pipe(sc->sc_rx_pipeh); 560 usbd_close_pipe(sc->sc_rx_pipeh); 561 } 562 563 if (sc->sc_tx_pipeh != NULL) { 564 usbd_abort_pipe(sc->sc_tx_pipeh); 565 usbd_close_pipe(sc->sc_tx_pipeh); 566 } 567 568 bpf_detach(ifp); 569 ieee80211_ifdetach(ic); 570 if_detach(ifp); 571 572 splx(s); 573 574 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 575 sc->sc_dev); 576 577 return 0; 578 } 579 580 Static int 581 ural_alloc_tx_list(struct ural_softc *sc) 582 { 583 struct ural_tx_data *data; 584 int i, error; 585 586 sc->tx_queued = 0; 587 588 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 589 data = &sc->tx_data[i]; 590 591 data->sc = sc; 592 593 data->xfer = usbd_alloc_xfer(sc->sc_udev); 594 if (data->xfer == NULL) { 595 printf("%s: could not allocate tx xfer\n", 596 device_xname(sc->sc_dev)); 597 error = ENOMEM; 598 goto fail; 599 } 600 601 data->buf = usbd_alloc_buffer(data->xfer, 602 RAL_TX_DESC_SIZE + MCLBYTES); 603 if (data->buf == NULL) { 604 printf("%s: could not allocate tx buffer\n", 605 device_xname(sc->sc_dev)); 606 error = ENOMEM; 607 goto fail; 608 } 609 } 610 611 return 0; 612 613 fail: ural_free_tx_list(sc); 614 return error; 615 } 616 617 Static void 618 ural_free_tx_list(struct ural_softc *sc) 619 { 620 struct ural_tx_data *data; 621 int i; 622 623 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 624 data = &sc->tx_data[i]; 625 626 if (data->xfer != NULL) { 627 usbd_free_xfer(data->xfer); 628 data->xfer = NULL; 629 } 630 631 if (data->ni != NULL) { 632 ieee80211_free_node(data->ni); 633 data->ni = NULL; 634 } 635 } 636 } 637 638 Static int 639 ural_alloc_rx_list(struct ural_softc *sc) 640 { 641 struct ural_rx_data *data; 642 int i, error; 643 644 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 645 data = &sc->rx_data[i]; 646 647 data->sc = sc; 648 649 data->xfer = usbd_alloc_xfer(sc->sc_udev); 650 if (data->xfer == NULL) { 651 printf("%s: could not allocate rx xfer\n", 652 device_xname(sc->sc_dev)); 653 error = ENOMEM; 654 goto fail; 655 } 656 657 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 658 printf("%s: could not allocate rx buffer\n", 659 device_xname(sc->sc_dev)); 660 error = ENOMEM; 661 goto fail; 662 } 663 664 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 665 if (data->m == NULL) { 666 printf("%s: could not allocate rx mbuf\n", 667 device_xname(sc->sc_dev)); 668 error = ENOMEM; 669 goto fail; 670 } 671 672 MCLGET(data->m, M_DONTWAIT); 673 if (!(data->m->m_flags & M_EXT)) { 674 printf("%s: could not allocate rx mbuf cluster\n", 675 device_xname(sc->sc_dev)); 676 error = ENOMEM; 677 goto fail; 678 } 679 680 data->buf = mtod(data->m, uint8_t *); 681 } 682 683 return 0; 684 685 fail: ural_free_tx_list(sc); 686 return error; 687 } 688 689 Static void 690 ural_free_rx_list(struct ural_softc *sc) 691 { 692 struct ural_rx_data *data; 693 int i; 694 695 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 696 data = &sc->rx_data[i]; 697 698 if (data->xfer != NULL) { 699 usbd_free_xfer(data->xfer); 700 data->xfer = NULL; 701 } 702 703 if (data->m != NULL) { 704 m_freem(data->m); 705 data->m = NULL; 706 } 707 } 708 } 709 710 Static int 711 ural_media_change(struct ifnet *ifp) 712 { 713 int error; 714 715 error = ieee80211_media_change(ifp); 716 if (error != ENETRESET) 717 return error; 718 719 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 720 ural_init(ifp); 721 722 return 0; 723 } 724 725 /* 726 * This function is called periodically (every 200ms) during scanning to 727 * switch from one channel to another. 728 */ 729 Static void 730 ural_next_scan(void *arg) 731 { 732 struct ural_softc *sc = arg; 733 struct ieee80211com *ic = &sc->sc_ic; 734 735 if (ic->ic_state == IEEE80211_S_SCAN) 736 ieee80211_next_scan(ic); 737 } 738 739 Static void 740 ural_task(void *arg) 741 { 742 struct ural_softc *sc = arg; 743 struct ieee80211com *ic = &sc->sc_ic; 744 enum ieee80211_state ostate; 745 struct ieee80211_node *ni; 746 struct mbuf *m; 747 748 ostate = ic->ic_state; 749 750 switch (sc->sc_state) { 751 case IEEE80211_S_INIT: 752 if (ostate == IEEE80211_S_RUN) { 753 /* abort TSF synchronization */ 754 ural_write(sc, RAL_TXRX_CSR19, 0); 755 756 /* force tx led to stop blinking */ 757 ural_write(sc, RAL_MAC_CSR20, 0); 758 } 759 break; 760 761 case IEEE80211_S_SCAN: 762 ural_set_chan(sc, ic->ic_curchan); 763 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 764 break; 765 766 case IEEE80211_S_AUTH: 767 ural_set_chan(sc, ic->ic_curchan); 768 break; 769 770 case IEEE80211_S_ASSOC: 771 ural_set_chan(sc, ic->ic_curchan); 772 break; 773 774 case IEEE80211_S_RUN: 775 ural_set_chan(sc, ic->ic_curchan); 776 777 ni = ic->ic_bss; 778 779 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 780 ural_update_slot(ic->ic_ifp); 781 ural_set_txpreamble(sc); 782 ural_set_basicrates(sc); 783 ural_set_bssid(sc, ni->ni_bssid); 784 } 785 786 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 787 ic->ic_opmode == IEEE80211_M_IBSS) { 788 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 789 if (m == NULL) { 790 printf("%s: could not allocate beacon\n", 791 device_xname(sc->sc_dev)); 792 return; 793 } 794 795 if (ural_tx_bcn(sc, m, ni) != 0) { 796 m_freem(m); 797 printf("%s: could not send beacon\n", 798 device_xname(sc->sc_dev)); 799 return; 800 } 801 802 /* beacon is no longer needed */ 803 m_freem(m); 804 } 805 806 /* make tx led blink on tx (controlled by ASIC) */ 807 ural_write(sc, RAL_MAC_CSR20, 1); 808 809 if (ic->ic_opmode != IEEE80211_M_MONITOR) 810 ural_enable_tsf_sync(sc); 811 812 /* enable automatic rate adaptation in STA mode */ 813 if (ic->ic_opmode == IEEE80211_M_STA && 814 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 815 ural_amrr_start(sc, ni); 816 817 break; 818 } 819 820 sc->sc_newstate(ic, sc->sc_state, -1); 821 } 822 823 Static int 824 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 825 int arg) 826 { 827 struct ural_softc *sc = ic->ic_ifp->if_softc; 828 829 usb_rem_task(sc->sc_udev, &sc->sc_task); 830 callout_stop(&sc->sc_scan_ch); 831 callout_stop(&sc->sc_amrr_ch); 832 833 /* do it in a process context */ 834 sc->sc_state = nstate; 835 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 836 837 return 0; 838 } 839 840 /* quickly determine if a given rate is CCK or OFDM */ 841 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 842 843 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 844 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 845 846 #define RAL_SIFS 10 /* us */ 847 848 #define RAL_RXTX_TURNAROUND 5 /* us */ 849 850 /* 851 * This function is only used by the Rx radiotap code. 852 */ 853 Static int 854 ural_rxrate(struct ural_rx_desc *desc) 855 { 856 if (le32toh(desc->flags) & RAL_RX_OFDM) { 857 /* reverse function of ural_plcp_signal */ 858 switch (desc->rate) { 859 case 0xb: return 12; 860 case 0xf: return 18; 861 case 0xa: return 24; 862 case 0xe: return 36; 863 case 0x9: return 48; 864 case 0xd: return 72; 865 case 0x8: return 96; 866 case 0xc: return 108; 867 } 868 } else { 869 if (desc->rate == 10) 870 return 2; 871 if (desc->rate == 20) 872 return 4; 873 if (desc->rate == 55) 874 return 11; 875 if (desc->rate == 110) 876 return 22; 877 } 878 return 2; /* should not get there */ 879 } 880 881 Static void 882 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 883 usbd_status status) 884 { 885 struct ural_tx_data *data = priv; 886 struct ural_softc *sc = data->sc; 887 struct ifnet *ifp = &sc->sc_if; 888 int s; 889 890 if (status != USBD_NORMAL_COMPLETION) { 891 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 892 return; 893 894 printf("%s: could not transmit buffer: %s\n", 895 device_xname(sc->sc_dev), usbd_errstr(status)); 896 897 if (status == USBD_STALLED) 898 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 899 900 ifp->if_oerrors++; 901 return; 902 } 903 904 s = splnet(); 905 906 m_freem(data->m); 907 data->m = NULL; 908 ieee80211_free_node(data->ni); 909 data->ni = NULL; 910 911 sc->tx_queued--; 912 ifp->if_opackets++; 913 914 DPRINTFN(10, ("tx done\n")); 915 916 sc->sc_tx_timer = 0; 917 ifp->if_flags &= ~IFF_OACTIVE; 918 ural_start(ifp); 919 920 splx(s); 921 } 922 923 Static void 924 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 925 { 926 struct ural_rx_data *data = priv; 927 struct ural_softc *sc = data->sc; 928 struct ieee80211com *ic = &sc->sc_ic; 929 struct ifnet *ifp = &sc->sc_if; 930 struct ural_rx_desc *desc; 931 struct ieee80211_frame *wh; 932 struct ieee80211_node *ni; 933 struct mbuf *mnew, *m; 934 int s, len; 935 936 if (status != USBD_NORMAL_COMPLETION) { 937 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 938 return; 939 940 if (status == USBD_STALLED) 941 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 942 goto skip; 943 } 944 945 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 946 947 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 948 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 949 len)); 950 ifp->if_ierrors++; 951 goto skip; 952 } 953 954 /* rx descriptor is located at the end */ 955 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 956 957 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 958 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 959 /* 960 * This should not happen since we did not request to receive 961 * those frames when we filled RAL_TXRX_CSR2. 962 */ 963 DPRINTFN(5, ("PHY or CRC error\n")); 964 ifp->if_ierrors++; 965 goto skip; 966 } 967 968 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 969 if (mnew == NULL) { 970 ifp->if_ierrors++; 971 goto skip; 972 } 973 974 MCLGET(mnew, M_DONTWAIT); 975 if (!(mnew->m_flags & M_EXT)) { 976 ifp->if_ierrors++; 977 m_freem(mnew); 978 goto skip; 979 } 980 981 m = data->m; 982 data->m = mnew; 983 data->buf = mtod(data->m, uint8_t *); 984 985 /* finalize mbuf */ 986 m->m_pkthdr.rcvif = ifp; 987 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 988 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 989 990 s = splnet(); 991 992 if (sc->sc_drvbpf != NULL) { 993 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 994 995 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 996 tap->wr_rate = ural_rxrate(desc); 997 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 998 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 999 tap->wr_antenna = sc->rx_ant; 1000 tap->wr_antsignal = desc->rssi; 1001 1002 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1003 } 1004 1005 wh = mtod(m, struct ieee80211_frame *); 1006 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1007 1008 /* send the frame to the 802.11 layer */ 1009 ieee80211_input(ic, m, ni, desc->rssi, 0); 1010 1011 /* node is no longer needed */ 1012 ieee80211_free_node(ni); 1013 1014 splx(s); 1015 1016 DPRINTFN(15, ("rx done\n")); 1017 1018 skip: /* setup a new transfer */ 1019 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1020 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1021 usbd_transfer(xfer); 1022 } 1023 1024 /* 1025 * Return the expected ack rate for a frame transmitted at rate `rate'. 1026 * XXX: this should depend on the destination node basic rate set. 1027 */ 1028 Static int 1029 ural_ack_rate(struct ieee80211com *ic, int rate) 1030 { 1031 switch (rate) { 1032 /* CCK rates */ 1033 case 2: 1034 return 2; 1035 case 4: 1036 case 11: 1037 case 22: 1038 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1039 1040 /* OFDM rates */ 1041 case 12: 1042 case 18: 1043 return 12; 1044 case 24: 1045 case 36: 1046 return 24; 1047 case 48: 1048 case 72: 1049 case 96: 1050 case 108: 1051 return 48; 1052 } 1053 1054 /* default to 1Mbps */ 1055 return 2; 1056 } 1057 1058 /* 1059 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1060 * The function automatically determines the operating mode depending on the 1061 * given rate. `flags' indicates whether short preamble is in use or not. 1062 */ 1063 Static uint16_t 1064 ural_txtime(int len, int rate, uint32_t flags) 1065 { 1066 uint16_t txtime; 1067 1068 if (RAL_RATE_IS_OFDM(rate)) { 1069 /* IEEE Std 802.11g-2003, pp. 37 */ 1070 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1071 txtime = 16 + 4 + 4 * txtime + 6; 1072 } else { 1073 /* IEEE Std 802.11b-1999, pp. 28 */ 1074 txtime = (16 * len + rate - 1) / rate; 1075 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1076 txtime += 72 + 24; 1077 else 1078 txtime += 144 + 48; 1079 } 1080 return txtime; 1081 } 1082 1083 Static uint8_t 1084 ural_plcp_signal(int rate) 1085 { 1086 switch (rate) { 1087 /* CCK rates (returned values are device-dependent) */ 1088 case 2: return 0x0; 1089 case 4: return 0x1; 1090 case 11: return 0x2; 1091 case 22: return 0x3; 1092 1093 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1094 case 12: return 0xb; 1095 case 18: return 0xf; 1096 case 24: return 0xa; 1097 case 36: return 0xe; 1098 case 48: return 0x9; 1099 case 72: return 0xd; 1100 case 96: return 0x8; 1101 case 108: return 0xc; 1102 1103 /* unsupported rates (should not get there) */ 1104 default: return 0xff; 1105 } 1106 } 1107 1108 Static void 1109 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1110 uint32_t flags, int len, int rate) 1111 { 1112 struct ieee80211com *ic = &sc->sc_ic; 1113 uint16_t plcp_length; 1114 int remainder; 1115 1116 desc->flags = htole32(flags); 1117 desc->flags |= htole32(RAL_TX_NEWSEQ); 1118 desc->flags |= htole32(len << 16); 1119 1120 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1121 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1122 1123 /* setup PLCP fields */ 1124 desc->plcp_signal = ural_plcp_signal(rate); 1125 desc->plcp_service = 4; 1126 1127 len += IEEE80211_CRC_LEN; 1128 if (RAL_RATE_IS_OFDM(rate)) { 1129 desc->flags |= htole32(RAL_TX_OFDM); 1130 1131 plcp_length = len & 0xfff; 1132 desc->plcp_length_hi = plcp_length >> 6; 1133 desc->plcp_length_lo = plcp_length & 0x3f; 1134 } else { 1135 plcp_length = (16 * len + rate - 1) / rate; 1136 if (rate == 22) { 1137 remainder = (16 * len) % 22; 1138 if (remainder != 0 && remainder < 7) 1139 desc->plcp_service |= RAL_PLCP_LENGEXT; 1140 } 1141 desc->plcp_length_hi = plcp_length >> 8; 1142 desc->plcp_length_lo = plcp_length & 0xff; 1143 1144 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1145 desc->plcp_signal |= 0x08; 1146 } 1147 1148 desc->iv = 0; 1149 desc->eiv = 0; 1150 } 1151 1152 #define RAL_TX_TIMEOUT 5000 1153 1154 Static int 1155 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1156 { 1157 struct ural_tx_desc *desc; 1158 usbd_xfer_handle xfer; 1159 uint8_t cmd = 0; 1160 usbd_status error; 1161 uint8_t *buf; 1162 int xferlen, rate; 1163 1164 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1165 1166 xfer = usbd_alloc_xfer(sc->sc_udev); 1167 if (xfer == NULL) 1168 return ENOMEM; 1169 1170 /* xfer length needs to be a multiple of two! */ 1171 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1172 1173 buf = usbd_alloc_buffer(xfer, xferlen); 1174 if (buf == NULL) { 1175 usbd_free_xfer(xfer); 1176 return ENOMEM; 1177 } 1178 1179 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1180 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1181 1182 error = usbd_sync_transfer(xfer); 1183 if (error != 0) { 1184 usbd_free_xfer(xfer); 1185 return error; 1186 } 1187 1188 desc = (struct ural_tx_desc *)buf; 1189 1190 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1191 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1192 m0->m_pkthdr.len, rate); 1193 1194 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1195 m0->m_pkthdr.len, rate, xferlen)); 1196 1197 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1198 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1199 1200 error = usbd_sync_transfer(xfer); 1201 usbd_free_xfer(xfer); 1202 1203 return error; 1204 } 1205 1206 Static int 1207 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1208 { 1209 struct ieee80211com *ic = &sc->sc_ic; 1210 struct ural_tx_desc *desc; 1211 struct ural_tx_data *data; 1212 struct ieee80211_frame *wh; 1213 struct ieee80211_key *k; 1214 uint32_t flags = 0; 1215 uint16_t dur; 1216 usbd_status error; 1217 int xferlen, rate; 1218 1219 data = &sc->tx_data[0]; 1220 desc = (struct ural_tx_desc *)data->buf; 1221 1222 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1223 1224 wh = mtod(m0, struct ieee80211_frame *); 1225 1226 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1227 k = ieee80211_crypto_encap(ic, ni, m0); 1228 if (k == NULL) { 1229 m_freem(m0); 1230 return ENOBUFS; 1231 } 1232 } 1233 1234 data->m = m0; 1235 data->ni = ni; 1236 1237 wh = mtod(m0, struct ieee80211_frame *); 1238 1239 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1240 flags |= RAL_TX_ACK; 1241 1242 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1243 *(uint16_t *)wh->i_dur = htole16(dur); 1244 1245 /* tell hardware to add timestamp for probe responses */ 1246 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1247 IEEE80211_FC0_TYPE_MGT && 1248 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1249 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1250 flags |= RAL_TX_TIMESTAMP; 1251 } 1252 1253 if (sc->sc_drvbpf != NULL) { 1254 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1255 1256 tap->wt_flags = 0; 1257 tap->wt_rate = rate; 1258 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1259 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1260 tap->wt_antenna = sc->tx_ant; 1261 1262 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1263 } 1264 1265 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1266 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1267 1268 /* align end on a 2-bytes boundary */ 1269 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1270 1271 /* 1272 * No space left in the last URB to store the extra 2 bytes, force 1273 * sending of another URB. 1274 */ 1275 if ((xferlen % 64) == 0) 1276 xferlen += 2; 1277 1278 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1279 m0->m_pkthdr.len, rate, xferlen)); 1280 1281 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1282 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1283 ural_txeof); 1284 1285 error = usbd_transfer(data->xfer); 1286 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1287 m_freem(m0); 1288 return error; 1289 } 1290 1291 sc->tx_queued++; 1292 1293 return 0; 1294 } 1295 1296 Static int 1297 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1298 { 1299 struct ieee80211com *ic = &sc->sc_ic; 1300 struct ural_tx_desc *desc; 1301 struct ural_tx_data *data; 1302 struct ieee80211_frame *wh; 1303 struct ieee80211_key *k; 1304 uint32_t flags = 0; 1305 uint16_t dur; 1306 usbd_status error; 1307 int xferlen, rate; 1308 1309 wh = mtod(m0, struct ieee80211_frame *); 1310 1311 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1312 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1313 else 1314 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1315 1316 rate &= IEEE80211_RATE_VAL; 1317 1318 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1319 k = ieee80211_crypto_encap(ic, ni, m0); 1320 if (k == NULL) { 1321 m_freem(m0); 1322 return ENOBUFS; 1323 } 1324 1325 /* packet header may have moved, reset our local pointer */ 1326 wh = mtod(m0, struct ieee80211_frame *); 1327 } 1328 1329 data = &sc->tx_data[0]; 1330 desc = (struct ural_tx_desc *)data->buf; 1331 1332 data->m = m0; 1333 data->ni = ni; 1334 1335 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1336 flags |= RAL_TX_ACK; 1337 flags |= RAL_TX_RETRY(7); 1338 1339 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1340 ic->ic_flags) + RAL_SIFS; 1341 *(uint16_t *)wh->i_dur = htole16(dur); 1342 } 1343 1344 if (sc->sc_drvbpf != NULL) { 1345 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1346 1347 tap->wt_flags = 0; 1348 tap->wt_rate = rate; 1349 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1350 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1351 tap->wt_antenna = sc->tx_ant; 1352 1353 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1354 } 1355 1356 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1357 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1358 1359 /* align end on a 2-bytes boundary */ 1360 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1361 1362 /* 1363 * No space left in the last URB to store the extra 2 bytes, force 1364 * sending of another URB. 1365 */ 1366 if ((xferlen % 64) == 0) 1367 xferlen += 2; 1368 1369 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1370 m0->m_pkthdr.len, rate, xferlen)); 1371 1372 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1373 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1374 ural_txeof); 1375 1376 error = usbd_transfer(data->xfer); 1377 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1378 return error; 1379 1380 sc->tx_queued++; 1381 1382 return 0; 1383 } 1384 1385 Static void 1386 ural_start(struct ifnet *ifp) 1387 { 1388 struct ural_softc *sc = ifp->if_softc; 1389 struct ieee80211com *ic = &sc->sc_ic; 1390 struct mbuf *m0; 1391 struct ether_header *eh; 1392 struct ieee80211_node *ni; 1393 1394 for (;;) { 1395 IF_POLL(&ic->ic_mgtq, m0); 1396 if (m0 != NULL) { 1397 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1398 ifp->if_flags |= IFF_OACTIVE; 1399 break; 1400 } 1401 IF_DEQUEUE(&ic->ic_mgtq, m0); 1402 1403 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1404 m0->m_pkthdr.rcvif = NULL; 1405 bpf_mtap3(ic->ic_rawbpf, m0); 1406 if (ural_tx_mgt(sc, m0, ni) != 0) 1407 break; 1408 1409 } else { 1410 if (ic->ic_state != IEEE80211_S_RUN) 1411 break; 1412 IFQ_DEQUEUE(&ifp->if_snd, m0); 1413 if (m0 == NULL) 1414 break; 1415 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1416 IF_PREPEND(&ifp->if_snd, m0); 1417 ifp->if_flags |= IFF_OACTIVE; 1418 break; 1419 } 1420 1421 if (m0->m_len < sizeof (struct ether_header) && 1422 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1423 continue; 1424 1425 eh = mtod(m0, struct ether_header *); 1426 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1427 if (ni == NULL) { 1428 m_freem(m0); 1429 continue; 1430 } 1431 bpf_mtap(ifp, m0); 1432 m0 = ieee80211_encap(ic, m0, ni); 1433 if (m0 == NULL) { 1434 ieee80211_free_node(ni); 1435 continue; 1436 } 1437 bpf_mtap3(ic->ic_rawbpf, m0); 1438 if (ural_tx_data(sc, m0, ni) != 0) { 1439 ieee80211_free_node(ni); 1440 ifp->if_oerrors++; 1441 break; 1442 } 1443 } 1444 1445 sc->sc_tx_timer = 5; 1446 ifp->if_timer = 1; 1447 } 1448 } 1449 1450 Static void 1451 ural_watchdog(struct ifnet *ifp) 1452 { 1453 struct ural_softc *sc = ifp->if_softc; 1454 struct ieee80211com *ic = &sc->sc_ic; 1455 1456 ifp->if_timer = 0; 1457 1458 if (sc->sc_tx_timer > 0) { 1459 if (--sc->sc_tx_timer == 0) { 1460 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1461 /*ural_init(sc); XXX needs a process context! */ 1462 ifp->if_oerrors++; 1463 return; 1464 } 1465 ifp->if_timer = 1; 1466 } 1467 1468 ieee80211_watchdog(ic); 1469 } 1470 1471 /* 1472 * This function allows for fast channel switching in monitor mode (used by 1473 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1474 * generate a new beacon frame. 1475 */ 1476 Static int 1477 ural_reset(struct ifnet *ifp) 1478 { 1479 struct ural_softc *sc = ifp->if_softc; 1480 struct ieee80211com *ic = &sc->sc_ic; 1481 1482 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1483 return ENETRESET; 1484 1485 ural_set_chan(sc, ic->ic_curchan); 1486 1487 return 0; 1488 } 1489 1490 Static int 1491 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1492 { 1493 #define IS_RUNNING(ifp) \ 1494 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1495 1496 struct ural_softc *sc = ifp->if_softc; 1497 struct ieee80211com *ic = &sc->sc_ic; 1498 int s, error = 0; 1499 1500 s = splnet(); 1501 1502 switch (cmd) { 1503 case SIOCSIFFLAGS: 1504 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1505 break; 1506 /* XXX re-use ether_ioctl() */ 1507 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1508 case IFF_UP|IFF_RUNNING: 1509 ural_update_promisc(sc); 1510 break; 1511 case IFF_UP: 1512 ural_init(ifp); 1513 break; 1514 case IFF_RUNNING: 1515 ural_stop(ifp, 1); 1516 break; 1517 case 0: 1518 break; 1519 } 1520 break; 1521 1522 case SIOCADDMULTI: 1523 case SIOCDELMULTI: 1524 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1525 error = 0; 1526 } 1527 break; 1528 1529 default: 1530 error = ieee80211_ioctl(ic, cmd, data); 1531 } 1532 1533 if (error == ENETRESET) { 1534 if (IS_RUNNING(ifp) && 1535 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1536 ural_init(ifp); 1537 error = 0; 1538 } 1539 1540 splx(s); 1541 1542 return error; 1543 #undef IS_RUNNING 1544 } 1545 1546 Static void 1547 ural_set_testmode(struct ural_softc *sc) 1548 { 1549 usb_device_request_t req; 1550 usbd_status error; 1551 1552 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1553 req.bRequest = RAL_VENDOR_REQUEST; 1554 USETW(req.wValue, 4); 1555 USETW(req.wIndex, 1); 1556 USETW(req.wLength, 0); 1557 1558 error = usbd_do_request(sc->sc_udev, &req, NULL); 1559 if (error != 0) { 1560 printf("%s: could not set test mode: %s\n", 1561 device_xname(sc->sc_dev), usbd_errstr(error)); 1562 } 1563 } 1564 1565 Static void 1566 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1567 { 1568 usb_device_request_t req; 1569 usbd_status error; 1570 1571 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1572 req.bRequest = RAL_READ_EEPROM; 1573 USETW(req.wValue, 0); 1574 USETW(req.wIndex, addr); 1575 USETW(req.wLength, len); 1576 1577 error = usbd_do_request(sc->sc_udev, &req, buf); 1578 if (error != 0) { 1579 printf("%s: could not read EEPROM: %s\n", 1580 device_xname(sc->sc_dev), usbd_errstr(error)); 1581 } 1582 } 1583 1584 Static uint16_t 1585 ural_read(struct ural_softc *sc, uint16_t reg) 1586 { 1587 usb_device_request_t req; 1588 usbd_status error; 1589 uint16_t val; 1590 1591 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1592 req.bRequest = RAL_READ_MAC; 1593 USETW(req.wValue, 0); 1594 USETW(req.wIndex, reg); 1595 USETW(req.wLength, sizeof (uint16_t)); 1596 1597 error = usbd_do_request(sc->sc_udev, &req, &val); 1598 if (error != 0) { 1599 printf("%s: could not read MAC register: %s\n", 1600 device_xname(sc->sc_dev), usbd_errstr(error)); 1601 return 0; 1602 } 1603 1604 return le16toh(val); 1605 } 1606 1607 Static void 1608 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1609 { 1610 usb_device_request_t req; 1611 usbd_status error; 1612 1613 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1614 req.bRequest = RAL_READ_MULTI_MAC; 1615 USETW(req.wValue, 0); 1616 USETW(req.wIndex, reg); 1617 USETW(req.wLength, len); 1618 1619 error = usbd_do_request(sc->sc_udev, &req, buf); 1620 if (error != 0) { 1621 printf("%s: could not read MAC register: %s\n", 1622 device_xname(sc->sc_dev), usbd_errstr(error)); 1623 } 1624 } 1625 1626 Static void 1627 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1628 { 1629 usb_device_request_t req; 1630 usbd_status error; 1631 1632 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1633 req.bRequest = RAL_WRITE_MAC; 1634 USETW(req.wValue, val); 1635 USETW(req.wIndex, reg); 1636 USETW(req.wLength, 0); 1637 1638 error = usbd_do_request(sc->sc_udev, &req, NULL); 1639 if (error != 0) { 1640 printf("%s: could not write MAC register: %s\n", 1641 device_xname(sc->sc_dev), usbd_errstr(error)); 1642 } 1643 } 1644 1645 Static void 1646 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1647 { 1648 usb_device_request_t req; 1649 usbd_status error; 1650 1651 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1652 req.bRequest = RAL_WRITE_MULTI_MAC; 1653 USETW(req.wValue, 0); 1654 USETW(req.wIndex, reg); 1655 USETW(req.wLength, len); 1656 1657 error = usbd_do_request(sc->sc_udev, &req, buf); 1658 if (error != 0) { 1659 printf("%s: could not write MAC register: %s\n", 1660 device_xname(sc->sc_dev), usbd_errstr(error)); 1661 } 1662 } 1663 1664 Static void 1665 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1666 { 1667 uint16_t tmp; 1668 int ntries; 1669 1670 for (ntries = 0; ntries < 5; ntries++) { 1671 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1672 break; 1673 } 1674 if (ntries == 5) { 1675 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1676 return; 1677 } 1678 1679 tmp = reg << 8 | val; 1680 ural_write(sc, RAL_PHY_CSR7, tmp); 1681 } 1682 1683 Static uint8_t 1684 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1685 { 1686 uint16_t val; 1687 int ntries; 1688 1689 val = RAL_BBP_WRITE | reg << 8; 1690 ural_write(sc, RAL_PHY_CSR7, val); 1691 1692 for (ntries = 0; ntries < 5; ntries++) { 1693 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1694 break; 1695 } 1696 if (ntries == 5) { 1697 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1698 return 0; 1699 } 1700 1701 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1702 } 1703 1704 Static void 1705 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1706 { 1707 uint32_t tmp; 1708 int ntries; 1709 1710 for (ntries = 0; ntries < 5; ntries++) { 1711 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1712 break; 1713 } 1714 if (ntries == 5) { 1715 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1716 return; 1717 } 1718 1719 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1720 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1721 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1722 1723 /* remember last written value in sc */ 1724 sc->rf_regs[reg] = val; 1725 1726 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1727 } 1728 1729 Static void 1730 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1731 { 1732 struct ieee80211com *ic = &sc->sc_ic; 1733 uint8_t power, tmp; 1734 u_int i, chan; 1735 1736 chan = ieee80211_chan2ieee(ic, c); 1737 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1738 return; 1739 1740 if (IEEE80211_IS_CHAN_2GHZ(c)) 1741 power = min(sc->txpow[chan - 1], 31); 1742 else 1743 power = 31; 1744 1745 /* adjust txpower using ifconfig settings */ 1746 power -= (100 - ic->ic_txpowlimit) / 8; 1747 1748 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1749 1750 switch (sc->rf_rev) { 1751 case RAL_RF_2522: 1752 ural_rf_write(sc, RAL_RF1, 0x00814); 1753 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1754 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1755 break; 1756 1757 case RAL_RF_2523: 1758 ural_rf_write(sc, RAL_RF1, 0x08804); 1759 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1760 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1761 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1762 break; 1763 1764 case RAL_RF_2524: 1765 ural_rf_write(sc, RAL_RF1, 0x0c808); 1766 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1767 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1768 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1769 break; 1770 1771 case RAL_RF_2525: 1772 ural_rf_write(sc, RAL_RF1, 0x08808); 1773 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1774 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1775 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1776 1777 ural_rf_write(sc, RAL_RF1, 0x08808); 1778 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1779 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1780 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1781 break; 1782 1783 case RAL_RF_2525E: 1784 ural_rf_write(sc, RAL_RF1, 0x08808); 1785 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1786 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1787 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1788 break; 1789 1790 case RAL_RF_2526: 1791 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1792 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1793 ural_rf_write(sc, RAL_RF1, 0x08804); 1794 1795 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1796 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1797 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1798 break; 1799 1800 /* dual-band RF */ 1801 case RAL_RF_5222: 1802 for (i = 0; ural_rf5222[i].chan != chan; i++); 1803 1804 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1805 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1806 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1807 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1808 break; 1809 } 1810 1811 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1812 ic->ic_state != IEEE80211_S_SCAN) { 1813 /* set Japan filter bit for channel 14 */ 1814 tmp = ural_bbp_read(sc, 70); 1815 1816 tmp &= ~RAL_JAPAN_FILTER; 1817 if (chan == 14) 1818 tmp |= RAL_JAPAN_FILTER; 1819 1820 ural_bbp_write(sc, 70, tmp); 1821 1822 /* clear CRC errors */ 1823 ural_read(sc, RAL_STA_CSR0); 1824 1825 DELAY(10000); 1826 ural_disable_rf_tune(sc); 1827 } 1828 } 1829 1830 /* 1831 * Disable RF auto-tuning. 1832 */ 1833 Static void 1834 ural_disable_rf_tune(struct ural_softc *sc) 1835 { 1836 uint32_t tmp; 1837 1838 if (sc->rf_rev != RAL_RF_2523) { 1839 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1840 ural_rf_write(sc, RAL_RF1, tmp); 1841 } 1842 1843 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1844 ural_rf_write(sc, RAL_RF3, tmp); 1845 1846 DPRINTFN(2, ("disabling RF autotune\n")); 1847 } 1848 1849 /* 1850 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1851 * synchronization. 1852 */ 1853 Static void 1854 ural_enable_tsf_sync(struct ural_softc *sc) 1855 { 1856 struct ieee80211com *ic = &sc->sc_ic; 1857 uint16_t logcwmin, preload, tmp; 1858 1859 /* first, disable TSF synchronization */ 1860 ural_write(sc, RAL_TXRX_CSR19, 0); 1861 1862 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1863 ural_write(sc, RAL_TXRX_CSR18, tmp); 1864 1865 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1866 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1867 tmp = logcwmin << 12 | preload; 1868 ural_write(sc, RAL_TXRX_CSR20, tmp); 1869 1870 /* finally, enable TSF synchronization */ 1871 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1872 if (ic->ic_opmode == IEEE80211_M_STA) 1873 tmp |= RAL_ENABLE_TSF_SYNC(1); 1874 else 1875 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1876 ural_write(sc, RAL_TXRX_CSR19, tmp); 1877 1878 DPRINTF(("enabling TSF synchronization\n")); 1879 } 1880 1881 Static void 1882 ural_update_slot(struct ifnet *ifp) 1883 { 1884 struct ural_softc *sc = ifp->if_softc; 1885 struct ieee80211com *ic = &sc->sc_ic; 1886 uint16_t slottime, sifs, eifs; 1887 1888 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1889 1890 /* 1891 * These settings may sound a bit inconsistent but this is what the 1892 * reference driver does. 1893 */ 1894 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1895 sifs = 16 - RAL_RXTX_TURNAROUND; 1896 eifs = 364; 1897 } else { 1898 sifs = 10 - RAL_RXTX_TURNAROUND; 1899 eifs = 64; 1900 } 1901 1902 ural_write(sc, RAL_MAC_CSR10, slottime); 1903 ural_write(sc, RAL_MAC_CSR11, sifs); 1904 ural_write(sc, RAL_MAC_CSR12, eifs); 1905 } 1906 1907 Static void 1908 ural_set_txpreamble(struct ural_softc *sc) 1909 { 1910 uint16_t tmp; 1911 1912 tmp = ural_read(sc, RAL_TXRX_CSR10); 1913 1914 tmp &= ~RAL_SHORT_PREAMBLE; 1915 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1916 tmp |= RAL_SHORT_PREAMBLE; 1917 1918 ural_write(sc, RAL_TXRX_CSR10, tmp); 1919 } 1920 1921 Static void 1922 ural_set_basicrates(struct ural_softc *sc) 1923 { 1924 struct ieee80211com *ic = &sc->sc_ic; 1925 1926 /* update basic rate set */ 1927 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1928 /* 11b basic rates: 1, 2Mbps */ 1929 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1930 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1931 /* 11a basic rates: 6, 12, 24Mbps */ 1932 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1933 } else { 1934 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1935 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1936 } 1937 } 1938 1939 Static void 1940 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1941 { 1942 uint16_t tmp; 1943 1944 tmp = bssid[0] | bssid[1] << 8; 1945 ural_write(sc, RAL_MAC_CSR5, tmp); 1946 1947 tmp = bssid[2] | bssid[3] << 8; 1948 ural_write(sc, RAL_MAC_CSR6, tmp); 1949 1950 tmp = bssid[4] | bssid[5] << 8; 1951 ural_write(sc, RAL_MAC_CSR7, tmp); 1952 1953 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1954 } 1955 1956 Static void 1957 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1958 { 1959 uint16_t tmp; 1960 1961 tmp = addr[0] | addr[1] << 8; 1962 ural_write(sc, RAL_MAC_CSR2, tmp); 1963 1964 tmp = addr[2] | addr[3] << 8; 1965 ural_write(sc, RAL_MAC_CSR3, tmp); 1966 1967 tmp = addr[4] | addr[5] << 8; 1968 ural_write(sc, RAL_MAC_CSR4, tmp); 1969 1970 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1971 } 1972 1973 Static void 1974 ural_update_promisc(struct ural_softc *sc) 1975 { 1976 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1977 uint32_t tmp; 1978 1979 tmp = ural_read(sc, RAL_TXRX_CSR2); 1980 1981 tmp &= ~RAL_DROP_NOT_TO_ME; 1982 if (!(ifp->if_flags & IFF_PROMISC)) 1983 tmp |= RAL_DROP_NOT_TO_ME; 1984 1985 ural_write(sc, RAL_TXRX_CSR2, tmp); 1986 1987 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1988 "entering" : "leaving")); 1989 } 1990 1991 Static const char * 1992 ural_get_rf(int rev) 1993 { 1994 switch (rev) { 1995 case RAL_RF_2522: return "RT2522"; 1996 case RAL_RF_2523: return "RT2523"; 1997 case RAL_RF_2524: return "RT2524"; 1998 case RAL_RF_2525: return "RT2525"; 1999 case RAL_RF_2525E: return "RT2525e"; 2000 case RAL_RF_2526: return "RT2526"; 2001 case RAL_RF_5222: return "RT5222"; 2002 default: return "unknown"; 2003 } 2004 } 2005 2006 Static void 2007 ural_read_eeprom(struct ural_softc *sc) 2008 { 2009 struct ieee80211com *ic = &sc->sc_ic; 2010 uint16_t val; 2011 2012 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2013 val = le16toh(val); 2014 sc->rf_rev = (val >> 11) & 0x7; 2015 sc->hw_radio = (val >> 10) & 0x1; 2016 sc->led_mode = (val >> 6) & 0x7; 2017 sc->rx_ant = (val >> 4) & 0x3; 2018 sc->tx_ant = (val >> 2) & 0x3; 2019 sc->nb_ant = val & 0x3; 2020 2021 /* read MAC address */ 2022 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2023 2024 /* read default values for BBP registers */ 2025 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2026 2027 /* read Tx power for all b/g channels */ 2028 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2029 } 2030 2031 Static int 2032 ural_bbp_init(struct ural_softc *sc) 2033 { 2034 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2035 int i, ntries; 2036 2037 /* wait for BBP to be ready */ 2038 for (ntries = 0; ntries < 100; ntries++) { 2039 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2040 break; 2041 DELAY(1000); 2042 } 2043 if (ntries == 100) { 2044 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2045 return EIO; 2046 } 2047 2048 /* initialize BBP registers to default values */ 2049 for (i = 0; i < N(ural_def_bbp); i++) 2050 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2051 2052 #if 0 2053 /* initialize BBP registers to values stored in EEPROM */ 2054 for (i = 0; i < 16; i++) { 2055 if (sc->bbp_prom[i].reg == 0xff) 2056 continue; 2057 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2058 } 2059 #endif 2060 2061 return 0; 2062 #undef N 2063 } 2064 2065 Static void 2066 ural_set_txantenna(struct ural_softc *sc, int antenna) 2067 { 2068 uint16_t tmp; 2069 uint8_t tx; 2070 2071 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2072 if (antenna == 1) 2073 tx |= RAL_BBP_ANTA; 2074 else if (antenna == 2) 2075 tx |= RAL_BBP_ANTB; 2076 else 2077 tx |= RAL_BBP_DIVERSITY; 2078 2079 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2080 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2081 sc->rf_rev == RAL_RF_5222) 2082 tx |= RAL_BBP_FLIPIQ; 2083 2084 ural_bbp_write(sc, RAL_BBP_TX, tx); 2085 2086 /* update values in PHY_CSR5 and PHY_CSR6 */ 2087 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2088 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2089 2090 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2091 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2092 } 2093 2094 Static void 2095 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2096 { 2097 uint8_t rx; 2098 2099 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2100 if (antenna == 1) 2101 rx |= RAL_BBP_ANTA; 2102 else if (antenna == 2) 2103 rx |= RAL_BBP_ANTB; 2104 else 2105 rx |= RAL_BBP_DIVERSITY; 2106 2107 /* need to force no I/Q flip for RF 2525e and 2526 */ 2108 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2109 rx &= ~RAL_BBP_FLIPIQ; 2110 2111 ural_bbp_write(sc, RAL_BBP_RX, rx); 2112 } 2113 2114 Static int 2115 ural_init(struct ifnet *ifp) 2116 { 2117 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2118 struct ural_softc *sc = ifp->if_softc; 2119 struct ieee80211com *ic = &sc->sc_ic; 2120 struct ieee80211_key *wk; 2121 struct ural_rx_data *data; 2122 uint16_t tmp; 2123 usbd_status error; 2124 int i, ntries; 2125 2126 ural_set_testmode(sc); 2127 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2128 2129 ural_stop(ifp, 0); 2130 2131 /* initialize MAC registers to default values */ 2132 for (i = 0; i < N(ural_def_mac); i++) 2133 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2134 2135 /* wait for BBP and RF to wake up (this can take a long time!) */ 2136 for (ntries = 0; ntries < 100; ntries++) { 2137 tmp = ural_read(sc, RAL_MAC_CSR17); 2138 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2139 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2140 break; 2141 DELAY(1000); 2142 } 2143 if (ntries == 100) { 2144 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2145 device_xname(sc->sc_dev)); 2146 error = EIO; 2147 goto fail; 2148 } 2149 2150 /* we're ready! */ 2151 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2152 2153 /* set basic rate set (will be updated later) */ 2154 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2155 2156 error = ural_bbp_init(sc); 2157 if (error != 0) 2158 goto fail; 2159 2160 /* set default BSS channel */ 2161 ural_set_chan(sc, ic->ic_curchan); 2162 2163 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2164 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2165 2166 ural_set_txantenna(sc, sc->tx_ant); 2167 ural_set_rxantenna(sc, sc->rx_ant); 2168 2169 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2170 ural_set_macaddr(sc, ic->ic_myaddr); 2171 2172 /* 2173 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2174 */ 2175 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2176 wk = &ic->ic_crypto.cs_nw_keys[i]; 2177 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2178 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2179 } 2180 2181 /* 2182 * Allocate xfer for AMRR statistics requests. 2183 */ 2184 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2185 if (sc->amrr_xfer == NULL) { 2186 printf("%s: could not allocate AMRR xfer\n", 2187 device_xname(sc->sc_dev)); 2188 goto fail; 2189 } 2190 2191 /* 2192 * Open Tx and Rx USB bulk pipes. 2193 */ 2194 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2195 &sc->sc_tx_pipeh); 2196 if (error != 0) { 2197 printf("%s: could not open Tx pipe: %s\n", 2198 device_xname(sc->sc_dev), usbd_errstr(error)); 2199 goto fail; 2200 } 2201 2202 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2203 &sc->sc_rx_pipeh); 2204 if (error != 0) { 2205 printf("%s: could not open Rx pipe: %s\n", 2206 device_xname(sc->sc_dev), usbd_errstr(error)); 2207 goto fail; 2208 } 2209 2210 /* 2211 * Allocate Tx and Rx xfer queues. 2212 */ 2213 error = ural_alloc_tx_list(sc); 2214 if (error != 0) { 2215 printf("%s: could not allocate Tx list\n", 2216 device_xname(sc->sc_dev)); 2217 goto fail; 2218 } 2219 2220 error = ural_alloc_rx_list(sc); 2221 if (error != 0) { 2222 printf("%s: could not allocate Rx list\n", 2223 device_xname(sc->sc_dev)); 2224 goto fail; 2225 } 2226 2227 /* 2228 * Start up the receive pipe. 2229 */ 2230 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2231 data = &sc->rx_data[i]; 2232 2233 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2234 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2235 usbd_transfer(data->xfer); 2236 } 2237 2238 /* kick Rx */ 2239 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2240 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2241 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2242 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2243 tmp |= RAL_DROP_TODS; 2244 if (!(ifp->if_flags & IFF_PROMISC)) 2245 tmp |= RAL_DROP_NOT_TO_ME; 2246 } 2247 ural_write(sc, RAL_TXRX_CSR2, tmp); 2248 2249 ifp->if_flags &= ~IFF_OACTIVE; 2250 ifp->if_flags |= IFF_RUNNING; 2251 2252 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2253 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2254 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2255 } else 2256 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2257 2258 return 0; 2259 2260 fail: ural_stop(ifp, 1); 2261 return error; 2262 #undef N 2263 } 2264 2265 Static void 2266 ural_stop(struct ifnet *ifp, int disable) 2267 { 2268 struct ural_softc *sc = ifp->if_softc; 2269 struct ieee80211com *ic = &sc->sc_ic; 2270 2271 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2272 2273 sc->sc_tx_timer = 0; 2274 ifp->if_timer = 0; 2275 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2276 2277 /* disable Rx */ 2278 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2279 2280 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2281 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2282 ural_write(sc, RAL_MAC_CSR1, 0); 2283 2284 if (sc->amrr_xfer != NULL) { 2285 usbd_free_xfer(sc->amrr_xfer); 2286 sc->amrr_xfer = NULL; 2287 } 2288 2289 if (sc->sc_rx_pipeh != NULL) { 2290 usbd_abort_pipe(sc->sc_rx_pipeh); 2291 usbd_close_pipe(sc->sc_rx_pipeh); 2292 sc->sc_rx_pipeh = NULL; 2293 } 2294 2295 if (sc->sc_tx_pipeh != NULL) { 2296 usbd_abort_pipe(sc->sc_tx_pipeh); 2297 usbd_close_pipe(sc->sc_tx_pipeh); 2298 sc->sc_tx_pipeh = NULL; 2299 } 2300 2301 ural_free_rx_list(sc); 2302 ural_free_tx_list(sc); 2303 } 2304 2305 int 2306 ural_activate(device_t self, enum devact act) 2307 { 2308 struct ural_softc *sc = device_private(self); 2309 2310 switch (act) { 2311 case DVACT_DEACTIVATE: 2312 if_deactivate(&sc->sc_if); 2313 return 0; 2314 default: 2315 return EOPNOTSUPP; 2316 } 2317 } 2318 2319 Static void 2320 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2321 { 2322 int i; 2323 2324 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2325 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2326 2327 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2328 2329 /* set rate to some reasonable initial value */ 2330 for (i = ni->ni_rates.rs_nrates - 1; 2331 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2332 i--); 2333 ni->ni_txrate = i; 2334 2335 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2336 } 2337 2338 Static void 2339 ural_amrr_timeout(void *arg) 2340 { 2341 struct ural_softc *sc = (struct ural_softc *)arg; 2342 usb_device_request_t req; 2343 int s; 2344 2345 s = splusb(); 2346 2347 /* 2348 * Asynchronously read statistic registers (cleared by read). 2349 */ 2350 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2351 req.bRequest = RAL_READ_MULTI_MAC; 2352 USETW(req.wValue, 0); 2353 USETW(req.wIndex, RAL_STA_CSR0); 2354 USETW(req.wLength, sizeof sc->sta); 2355 2356 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2357 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2358 ural_amrr_update); 2359 (void)usbd_transfer(sc->amrr_xfer); 2360 2361 splx(s); 2362 } 2363 2364 Static void 2365 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2366 usbd_status status) 2367 { 2368 struct ural_softc *sc = (struct ural_softc *)priv; 2369 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2370 2371 if (status != USBD_NORMAL_COMPLETION) { 2372 printf("%s: could not retrieve Tx statistics - " 2373 "cancelling automatic rate control\n", 2374 device_xname(sc->sc_dev)); 2375 return; 2376 } 2377 2378 /* count TX retry-fail as Tx errors */ 2379 ifp->if_oerrors += sc->sta[9]; 2380 2381 sc->amn.amn_retrycnt = 2382 sc->sta[7] + /* TX one-retry ok count */ 2383 sc->sta[8] + /* TX more-retry ok count */ 2384 sc->sta[9]; /* TX retry-fail count */ 2385 2386 sc->amn.amn_txcnt = 2387 sc->amn.amn_retrycnt + 2388 sc->sta[6]; /* TX no-retry ok count */ 2389 2390 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2391 2392 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2393 } 2394
Indexes created Mon Sep 29 21:09:56 GMT 2025