if_ural.c revision 1.44.14.1
1 /* $NetBSD: if_ural.c,v 1.44.14.1 2014/12/02 09:00:33 skrll Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.44.14.1 2014/12/02 09:00:33 skrll Exp $"); 28 29 #include <sys/param.h> 30 #include <sys/sockio.h> 31 #include <sys/sysctl.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <sys/conf.h> 38 #include <sys/device.h> 39 40 #include <sys/bus.h> 41 #include <machine/endian.h> 42 #include <sys/intr.h> 43 44 #include <net/bpf.h> 45 #include <net/if.h> 46 #include <net/if_arp.h> 47 #include <net/if_dl.h> 48 #include <net/if_ether.h> 49 #include <net/if_media.h> 50 #include <net/if_types.h> 51 52 #include <netinet/in.h> 53 #include <netinet/in_systm.h> 54 #include <netinet/in_var.h> 55 #include <netinet/ip.h> 56 57 #include <net80211/ieee80211_netbsd.h> 58 #include <net80211/ieee80211_var.h> 59 #include <net80211/ieee80211_amrr.h> 60 #include <net80211/ieee80211_radiotap.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdi_util.h> 65 #include <dev/usb/usbdevs.h> 66 67 #include <dev/usb/if_uralreg.h> 68 #include <dev/usb/if_uralvar.h> 69 70 #ifdef URAL_DEBUG 71 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 72 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 73 int ural_debug = 0; 74 #else 75 #define DPRINTF(x) 76 #define DPRINTFN(n, x) 77 #endif 78 79 /* various supported device vendors/products */ 80 static const struct usb_devno ural_devs[] = { 81 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 82 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 83 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 84 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 85 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 86 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 87 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 88 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 89 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 90 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 91 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 92 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 93 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 95 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 96 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 97 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 98 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 99 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 100 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 101 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 102 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 103 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 104 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 105 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 106 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 107 }; 108 109 Static int ural_alloc_tx_list(struct ural_softc *); 110 Static void ural_free_tx_list(struct ural_softc *); 111 Static int ural_alloc_rx_list(struct ural_softc *); 112 Static void ural_free_rx_list(struct ural_softc *); 113 Static int ural_media_change(struct ifnet *); 114 Static void ural_next_scan(void *); 115 Static void ural_task(void *); 116 Static int ural_newstate(struct ieee80211com *, 117 enum ieee80211_state, int); 118 Static int ural_rxrate(struct ural_rx_desc *); 119 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 120 usbd_status); 121 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 122 usbd_status); 123 Static int ural_ack_rate(struct ieee80211com *, int); 124 Static uint16_t ural_txtime(int, int, uint32_t); 125 Static uint8_t ural_plcp_signal(int); 126 Static void ural_setup_tx_desc(struct ural_softc *, 127 struct ural_tx_desc *, uint32_t, int, int); 128 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 129 struct ieee80211_node *); 130 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 131 struct ieee80211_node *); 132 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 133 struct ieee80211_node *); 134 Static void ural_start(struct ifnet *); 135 Static void ural_watchdog(struct ifnet *); 136 Static int ural_reset(struct ifnet *); 137 Static int ural_ioctl(struct ifnet *, u_long, void *); 138 Static void ural_set_testmode(struct ural_softc *); 139 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 140 int); 141 Static uint16_t ural_read(struct ural_softc *, uint16_t); 142 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 143 int); 144 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 145 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 146 int); 147 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 148 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 149 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 150 Static void ural_set_chan(struct ural_softc *, 151 struct ieee80211_channel *); 152 Static void ural_disable_rf_tune(struct ural_softc *); 153 Static void ural_enable_tsf_sync(struct ural_softc *); 154 Static void ural_update_slot(struct ifnet *); 155 Static void ural_set_txpreamble(struct ural_softc *); 156 Static void ural_set_basicrates(struct ural_softc *); 157 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 158 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 159 Static void ural_update_promisc(struct ural_softc *); 160 Static const char *ural_get_rf(int); 161 Static void ural_read_eeprom(struct ural_softc *); 162 Static int ural_bbp_init(struct ural_softc *); 163 Static void ural_set_txantenna(struct ural_softc *, int); 164 Static void ural_set_rxantenna(struct ural_softc *, int); 165 Static int ural_init(struct ifnet *); 166 Static void ural_stop(struct ifnet *, int); 167 Static void ural_amrr_start(struct ural_softc *, 168 struct ieee80211_node *); 169 Static void ural_amrr_timeout(void *); 170 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 171 usbd_status status); 172 173 /* 174 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 175 */ 176 static const struct ieee80211_rateset ural_rateset_11a = 177 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 178 179 static const struct ieee80211_rateset ural_rateset_11b = 180 { 4, { 2, 4, 11, 22 } }; 181 182 static const struct ieee80211_rateset ural_rateset_11g = 183 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 184 185 /* 186 * Default values for MAC registers; values taken from the reference driver. 187 */ 188 static const struct { 189 uint16_t reg; 190 uint16_t val; 191 } ural_def_mac[] = { 192 { RAL_TXRX_CSR5, 0x8c8d }, 193 { RAL_TXRX_CSR6, 0x8b8a }, 194 { RAL_TXRX_CSR7, 0x8687 }, 195 { RAL_TXRX_CSR8, 0x0085 }, 196 { RAL_MAC_CSR13, 0x1111 }, 197 { RAL_MAC_CSR14, 0x1e11 }, 198 { RAL_TXRX_CSR21, 0xe78f }, 199 { RAL_MAC_CSR9, 0xff1d }, 200 { RAL_MAC_CSR11, 0x0002 }, 201 { RAL_MAC_CSR22, 0x0053 }, 202 { RAL_MAC_CSR15, 0x0000 }, 203 { RAL_MAC_CSR8, 0x0780 }, 204 { RAL_TXRX_CSR19, 0x0000 }, 205 { RAL_TXRX_CSR18, 0x005a }, 206 { RAL_PHY_CSR2, 0x0000 }, 207 { RAL_TXRX_CSR0, 0x1ec0 }, 208 { RAL_PHY_CSR4, 0x000f } 209 }; 210 211 /* 212 * Default values for BBP registers; values taken from the reference driver. 213 */ 214 static const struct { 215 uint8_t reg; 216 uint8_t val; 217 } ural_def_bbp[] = { 218 { 3, 0x02 }, 219 { 4, 0x19 }, 220 { 14, 0x1c }, 221 { 15, 0x30 }, 222 { 16, 0xac }, 223 { 17, 0x48 }, 224 { 18, 0x18 }, 225 { 19, 0xff }, 226 { 20, 0x1e }, 227 { 21, 0x08 }, 228 { 22, 0x08 }, 229 { 23, 0x08 }, 230 { 24, 0x80 }, 231 { 25, 0x50 }, 232 { 26, 0x08 }, 233 { 27, 0x23 }, 234 { 30, 0x10 }, 235 { 31, 0x2b }, 236 { 32, 0xb9 }, 237 { 34, 0x12 }, 238 { 35, 0x50 }, 239 { 39, 0xc4 }, 240 { 40, 0x02 }, 241 { 41, 0x60 }, 242 { 53, 0x10 }, 243 { 54, 0x18 }, 244 { 56, 0x08 }, 245 { 57, 0x10 }, 246 { 58, 0x08 }, 247 { 61, 0x60 }, 248 { 62, 0x10 }, 249 { 75, 0xff } 250 }; 251 252 /* 253 * Default values for RF register R2 indexed by channel numbers. 254 */ 255 static const uint32_t ural_rf2522_r2[] = { 256 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 257 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 258 }; 259 260 static const uint32_t ural_rf2523_r2[] = { 261 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 262 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 263 }; 264 265 static const uint32_t ural_rf2524_r2[] = { 266 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 267 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 268 }; 269 270 static const uint32_t ural_rf2525_r2[] = { 271 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 272 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 273 }; 274 275 static const uint32_t ural_rf2525_hi_r2[] = { 276 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 277 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 278 }; 279 280 static const uint32_t ural_rf2525e_r2[] = { 281 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 282 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 283 }; 284 285 static const uint32_t ural_rf2526_hi_r2[] = { 286 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 287 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 288 }; 289 290 static const uint32_t ural_rf2526_r2[] = { 291 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 292 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 293 }; 294 295 /* 296 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 297 * values taken from the reference driver. 298 */ 299 static const struct { 300 uint8_t chan; 301 uint32_t r1; 302 uint32_t r2; 303 uint32_t r4; 304 } ural_rf5222[] = { 305 { 1, 0x08808, 0x0044d, 0x00282 }, 306 { 2, 0x08808, 0x0044e, 0x00282 }, 307 { 3, 0x08808, 0x0044f, 0x00282 }, 308 { 4, 0x08808, 0x00460, 0x00282 }, 309 { 5, 0x08808, 0x00461, 0x00282 }, 310 { 6, 0x08808, 0x00462, 0x00282 }, 311 { 7, 0x08808, 0x00463, 0x00282 }, 312 { 8, 0x08808, 0x00464, 0x00282 }, 313 { 9, 0x08808, 0x00465, 0x00282 }, 314 { 10, 0x08808, 0x00466, 0x00282 }, 315 { 11, 0x08808, 0x00467, 0x00282 }, 316 { 12, 0x08808, 0x00468, 0x00282 }, 317 { 13, 0x08808, 0x00469, 0x00282 }, 318 { 14, 0x08808, 0x0046b, 0x00286 }, 319 320 { 36, 0x08804, 0x06225, 0x00287 }, 321 { 40, 0x08804, 0x06226, 0x00287 }, 322 { 44, 0x08804, 0x06227, 0x00287 }, 323 { 48, 0x08804, 0x06228, 0x00287 }, 324 { 52, 0x08804, 0x06229, 0x00287 }, 325 { 56, 0x08804, 0x0622a, 0x00287 }, 326 { 60, 0x08804, 0x0622b, 0x00287 }, 327 { 64, 0x08804, 0x0622c, 0x00287 }, 328 329 { 100, 0x08804, 0x02200, 0x00283 }, 330 { 104, 0x08804, 0x02201, 0x00283 }, 331 { 108, 0x08804, 0x02202, 0x00283 }, 332 { 112, 0x08804, 0x02203, 0x00283 }, 333 { 116, 0x08804, 0x02204, 0x00283 }, 334 { 120, 0x08804, 0x02205, 0x00283 }, 335 { 124, 0x08804, 0x02206, 0x00283 }, 336 { 128, 0x08804, 0x02207, 0x00283 }, 337 { 132, 0x08804, 0x02208, 0x00283 }, 338 { 136, 0x08804, 0x02209, 0x00283 }, 339 { 140, 0x08804, 0x0220a, 0x00283 }, 340 341 { 149, 0x08808, 0x02429, 0x00281 }, 342 { 153, 0x08808, 0x0242b, 0x00281 }, 343 { 157, 0x08808, 0x0242d, 0x00281 }, 344 { 161, 0x08808, 0x0242f, 0x00281 } 345 }; 346 347 int ural_match(device_t, cfdata_t, void *); 348 void ural_attach(device_t, device_t, void *); 349 int ural_detach(device_t, int); 350 int ural_activate(device_t, enum devact); 351 extern struct cfdriver ural_cd; 352 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate); 353 354 int 355 ural_match(device_t parent, cfdata_t match, void *aux) 356 { 357 struct usb_attach_arg *uaa = aux; 358 359 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 360 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 361 } 362 363 void 364 ural_attach(device_t parent, device_t self, void *aux) 365 { 366 struct ural_softc *sc = device_private(self); 367 struct usb_attach_arg *uaa = aux; 368 struct ieee80211com *ic = &sc->sc_ic; 369 struct ifnet *ifp = &sc->sc_if; 370 usb_interface_descriptor_t *id; 371 usb_endpoint_descriptor_t *ed; 372 usbd_status error; 373 char *devinfop; 374 int i; 375 376 sc->sc_dev = self; 377 sc->sc_udev = uaa->device; 378 379 aprint_naive("\n"); 380 aprint_normal("\n"); 381 382 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 383 aprint_normal_dev(self, "%s\n", devinfop); 384 usbd_devinfo_free(devinfop); 385 386 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 387 if (error != 0) { 388 aprint_error_dev(self, "failed to set configuration" 389 ", err=%s\n", usbd_errstr(error)); 390 return; 391 } 392 393 /* get the first interface handle */ 394 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 395 &sc->sc_iface); 396 if (error != 0) { 397 aprint_error_dev(self, "could not get interface handle\n"); 398 return; 399 } 400 401 /* 402 * Find endpoints. 403 */ 404 id = usbd_get_interface_descriptor(sc->sc_iface); 405 406 sc->sc_rx_no = sc->sc_tx_no = -1; 407 for (i = 0; i < id->bNumEndpoints; i++) { 408 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 409 if (ed == NULL) { 410 aprint_error_dev(self, 411 "no endpoint descriptor for %d\n", i); 412 return; 413 } 414 415 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 416 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 417 sc->sc_rx_no = ed->bEndpointAddress; 418 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 419 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 420 sc->sc_tx_no = ed->bEndpointAddress; 421 } 422 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 423 aprint_error_dev(self, "missing endpoint\n"); 424 return; 425 } 426 427 usb_init_task(&sc->sc_task, ural_task, sc, 0); 428 callout_init(&sc->sc_scan_ch, 0); 429 sc->amrr.amrr_min_success_threshold = 1; 430 sc->amrr.amrr_max_success_threshold = 15; 431 callout_init(&sc->sc_amrr_ch, 0); 432 433 /* retrieve RT2570 rev. no */ 434 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 435 436 /* retrieve MAC address and various other things from EEPROM */ 437 ural_read_eeprom(sc); 438 439 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 440 sc->asic_rev, ural_get_rf(sc->rf_rev)); 441 442 ifp->if_softc = sc; 443 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 444 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 445 ifp->if_init = ural_init; 446 ifp->if_ioctl = ural_ioctl; 447 ifp->if_start = ural_start; 448 ifp->if_watchdog = ural_watchdog; 449 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 450 IFQ_SET_READY(&ifp->if_snd); 451 452 ic->ic_ifp = ifp; 453 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 454 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 455 ic->ic_state = IEEE80211_S_INIT; 456 457 /* set device capabilities */ 458 ic->ic_caps = 459 IEEE80211_C_IBSS | /* IBSS mode supported */ 460 IEEE80211_C_MONITOR | /* monitor mode supported */ 461 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 462 IEEE80211_C_TXPMGT | /* tx power management */ 463 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 464 IEEE80211_C_SHSLOT | /* short slot time supported */ 465 IEEE80211_C_WPA; /* 802.11i */ 466 467 if (sc->rf_rev == RAL_RF_5222) { 468 /* set supported .11a rates */ 469 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 470 471 /* set supported .11a channels */ 472 for (i = 36; i <= 64; i += 4) { 473 ic->ic_channels[i].ic_freq = 474 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 475 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 476 } 477 for (i = 100; i <= 140; i += 4) { 478 ic->ic_channels[i].ic_freq = 479 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 480 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 481 } 482 for (i = 149; i <= 161; i += 4) { 483 ic->ic_channels[i].ic_freq = 484 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 485 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 486 } 487 } 488 489 /* set supported .11b and .11g rates */ 490 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 491 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 492 493 /* set supported .11b and .11g channels (1 through 14) */ 494 for (i = 1; i <= 14; i++) { 495 ic->ic_channels[i].ic_freq = 496 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 497 ic->ic_channels[i].ic_flags = 498 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 499 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 500 } 501 502 if_attach(ifp); 503 ieee80211_ifattach(ic); 504 ic->ic_reset = ural_reset; 505 506 /* override state transition machine */ 507 sc->sc_newstate = ic->ic_newstate; 508 ic->ic_newstate = ural_newstate; 509 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 510 511 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 512 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 513 514 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 515 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 516 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 517 518 sc->sc_txtap_len = sizeof sc->sc_txtapu; 519 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 520 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 521 522 ieee80211_announce(ic); 523 524 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 525 sc->sc_dev); 526 527 return; 528 } 529 530 int 531 ural_detach(device_t self, int flags) 532 { 533 struct ural_softc *sc = device_private(self); 534 struct ieee80211com *ic = &sc->sc_ic; 535 struct ifnet *ifp = &sc->sc_if; 536 int s; 537 538 s = splusb(); 539 540 ural_stop(ifp, 1); 541 usb_rem_task(sc->sc_udev, &sc->sc_task); 542 callout_stop(&sc->sc_scan_ch); 543 callout_stop(&sc->sc_amrr_ch); 544 545 if (sc->amrr_xfer != NULL) { 546 usbd_free_xfer(sc->amrr_xfer); 547 sc->amrr_xfer = NULL; 548 } 549 550 if (sc->sc_rx_pipeh != NULL) { 551 usbd_abort_pipe(sc->sc_rx_pipeh); 552 usbd_close_pipe(sc->sc_rx_pipeh); 553 } 554 555 if (sc->sc_tx_pipeh != NULL) { 556 usbd_abort_pipe(sc->sc_tx_pipeh); 557 usbd_close_pipe(sc->sc_tx_pipeh); 558 } 559 560 bpf_detach(ifp); 561 ieee80211_ifdetach(ic); 562 if_detach(ifp); 563 564 splx(s); 565 566 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 567 sc->sc_dev); 568 569 return 0; 570 } 571 572 Static int 573 ural_alloc_tx_list(struct ural_softc *sc) 574 { 575 struct ural_tx_data *data; 576 int i, error; 577 578 sc->tx_queued = 0; 579 580 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 581 data = &sc->tx_data[i]; 582 583 data->sc = sc; 584 585 data->xfer = usbd_alloc_xfer(sc->sc_udev); 586 if (data->xfer == NULL) { 587 printf("%s: could not allocate tx xfer\n", 588 device_xname(sc->sc_dev)); 589 error = ENOMEM; 590 goto fail; 591 } 592 593 data->buf = usbd_alloc_buffer(data->xfer, 594 RAL_TX_DESC_SIZE + MCLBYTES); 595 if (data->buf == NULL) { 596 printf("%s: could not allocate tx buffer\n", 597 device_xname(sc->sc_dev)); 598 error = ENOMEM; 599 goto fail; 600 } 601 } 602 603 return 0; 604 605 fail: ural_free_tx_list(sc); 606 return error; 607 } 608 609 Static void 610 ural_free_tx_list(struct ural_softc *sc) 611 { 612 struct ural_tx_data *data; 613 int i; 614 615 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 616 data = &sc->tx_data[i]; 617 618 if (data->xfer != NULL) { 619 usbd_free_xfer(data->xfer); 620 data->xfer = NULL; 621 } 622 623 if (data->ni != NULL) { 624 ieee80211_free_node(data->ni); 625 data->ni = NULL; 626 } 627 } 628 } 629 630 Static int 631 ural_alloc_rx_list(struct ural_softc *sc) 632 { 633 struct ural_rx_data *data; 634 int i, error; 635 636 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 637 data = &sc->rx_data[i]; 638 639 data->sc = sc; 640 641 data->xfer = usbd_alloc_xfer(sc->sc_udev); 642 if (data->xfer == NULL) { 643 printf("%s: could not allocate rx xfer\n", 644 device_xname(sc->sc_dev)); 645 error = ENOMEM; 646 goto fail; 647 } 648 649 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 650 printf("%s: could not allocate rx buffer\n", 651 device_xname(sc->sc_dev)); 652 error = ENOMEM; 653 goto fail; 654 } 655 656 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 657 if (data->m == NULL) { 658 printf("%s: could not allocate rx mbuf\n", 659 device_xname(sc->sc_dev)); 660 error = ENOMEM; 661 goto fail; 662 } 663 664 MCLGET(data->m, M_DONTWAIT); 665 if (!(data->m->m_flags & M_EXT)) { 666 printf("%s: could not allocate rx mbuf cluster\n", 667 device_xname(sc->sc_dev)); 668 error = ENOMEM; 669 goto fail; 670 } 671 672 data->buf = mtod(data->m, uint8_t *); 673 } 674 675 return 0; 676 677 fail: ural_free_tx_list(sc); 678 return error; 679 } 680 681 Static void 682 ural_free_rx_list(struct ural_softc *sc) 683 { 684 struct ural_rx_data *data; 685 int i; 686 687 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 688 data = &sc->rx_data[i]; 689 690 if (data->xfer != NULL) { 691 usbd_free_xfer(data->xfer); 692 data->xfer = NULL; 693 } 694 695 if (data->m != NULL) { 696 m_freem(data->m); 697 data->m = NULL; 698 } 699 } 700 } 701 702 Static int 703 ural_media_change(struct ifnet *ifp) 704 { 705 int error; 706 707 error = ieee80211_media_change(ifp); 708 if (error != ENETRESET) 709 return error; 710 711 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 712 ural_init(ifp); 713 714 return 0; 715 } 716 717 /* 718 * This function is called periodically (every 200ms) during scanning to 719 * switch from one channel to another. 720 */ 721 Static void 722 ural_next_scan(void *arg) 723 { 724 struct ural_softc *sc = arg; 725 struct ieee80211com *ic = &sc->sc_ic; 726 727 if (ic->ic_state == IEEE80211_S_SCAN) 728 ieee80211_next_scan(ic); 729 } 730 731 Static void 732 ural_task(void *arg) 733 { 734 struct ural_softc *sc = arg; 735 struct ieee80211com *ic = &sc->sc_ic; 736 enum ieee80211_state ostate; 737 struct ieee80211_node *ni; 738 struct mbuf *m; 739 740 ostate = ic->ic_state; 741 742 switch (sc->sc_state) { 743 case IEEE80211_S_INIT: 744 if (ostate == IEEE80211_S_RUN) { 745 /* abort TSF synchronization */ 746 ural_write(sc, RAL_TXRX_CSR19, 0); 747 748 /* force tx led to stop blinking */ 749 ural_write(sc, RAL_MAC_CSR20, 0); 750 } 751 break; 752 753 case IEEE80211_S_SCAN: 754 ural_set_chan(sc, ic->ic_curchan); 755 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 756 break; 757 758 case IEEE80211_S_AUTH: 759 ural_set_chan(sc, ic->ic_curchan); 760 break; 761 762 case IEEE80211_S_ASSOC: 763 ural_set_chan(sc, ic->ic_curchan); 764 break; 765 766 case IEEE80211_S_RUN: 767 ural_set_chan(sc, ic->ic_curchan); 768 769 ni = ic->ic_bss; 770 771 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 772 ural_update_slot(ic->ic_ifp); 773 ural_set_txpreamble(sc); 774 ural_set_basicrates(sc); 775 ural_set_bssid(sc, ni->ni_bssid); 776 } 777 778 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 779 ic->ic_opmode == IEEE80211_M_IBSS) { 780 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 781 if (m == NULL) { 782 printf("%s: could not allocate beacon\n", 783 device_xname(sc->sc_dev)); 784 return; 785 } 786 787 if (ural_tx_bcn(sc, m, ni) != 0) { 788 m_freem(m); 789 printf("%s: could not send beacon\n", 790 device_xname(sc->sc_dev)); 791 return; 792 } 793 794 /* beacon is no longer needed */ 795 m_freem(m); 796 } 797 798 /* make tx led blink on tx (controlled by ASIC) */ 799 ural_write(sc, RAL_MAC_CSR20, 1); 800 801 if (ic->ic_opmode != IEEE80211_M_MONITOR) 802 ural_enable_tsf_sync(sc); 803 804 /* enable automatic rate adaptation in STA mode */ 805 if (ic->ic_opmode == IEEE80211_M_STA && 806 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 807 ural_amrr_start(sc, ni); 808 809 break; 810 } 811 812 sc->sc_newstate(ic, sc->sc_state, -1); 813 } 814 815 Static int 816 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 817 int arg) 818 { 819 struct ural_softc *sc = ic->ic_ifp->if_softc; 820 821 usb_rem_task(sc->sc_udev, &sc->sc_task); 822 callout_stop(&sc->sc_scan_ch); 823 callout_stop(&sc->sc_amrr_ch); 824 825 /* do it in a process context */ 826 sc->sc_state = nstate; 827 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 828 829 return 0; 830 } 831 832 /* quickly determine if a given rate is CCK or OFDM */ 833 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 834 835 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 836 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 837 838 #define RAL_SIFS 10 /* us */ 839 840 #define RAL_RXTX_TURNAROUND 5 /* us */ 841 842 /* 843 * This function is only used by the Rx radiotap code. 844 */ 845 Static int 846 ural_rxrate(struct ural_rx_desc *desc) 847 { 848 if (le32toh(desc->flags) & RAL_RX_OFDM) { 849 /* reverse function of ural_plcp_signal */ 850 switch (desc->rate) { 851 case 0xb: return 12; 852 case 0xf: return 18; 853 case 0xa: return 24; 854 case 0xe: return 36; 855 case 0x9: return 48; 856 case 0xd: return 72; 857 case 0x8: return 96; 858 case 0xc: return 108; 859 } 860 } else { 861 if (desc->rate == 10) 862 return 2; 863 if (desc->rate == 20) 864 return 4; 865 if (desc->rate == 55) 866 return 11; 867 if (desc->rate == 110) 868 return 22; 869 } 870 return 2; /* should not get there */ 871 } 872 873 Static void 874 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 875 usbd_status status) 876 { 877 struct ural_tx_data *data = priv; 878 struct ural_softc *sc = data->sc; 879 struct ifnet *ifp = &sc->sc_if; 880 int s; 881 882 if (status != USBD_NORMAL_COMPLETION) { 883 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 884 return; 885 886 printf("%s: could not transmit buffer: %s\n", 887 device_xname(sc->sc_dev), usbd_errstr(status)); 888 889 if (status == USBD_STALLED) 890 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 891 892 ifp->if_oerrors++; 893 return; 894 } 895 896 s = splnet(); 897 898 m_freem(data->m); 899 data->m = NULL; 900 ieee80211_free_node(data->ni); 901 data->ni = NULL; 902 903 sc->tx_queued--; 904 ifp->if_opackets++; 905 906 DPRINTFN(10, ("tx done\n")); 907 908 sc->sc_tx_timer = 0; 909 ifp->if_flags &= ~IFF_OACTIVE; 910 ural_start(ifp); 911 912 splx(s); 913 } 914 915 Static void 916 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 917 { 918 struct ural_rx_data *data = priv; 919 struct ural_softc *sc = data->sc; 920 struct ieee80211com *ic = &sc->sc_ic; 921 struct ifnet *ifp = &sc->sc_if; 922 struct ural_rx_desc *desc; 923 struct ieee80211_frame *wh; 924 struct ieee80211_node *ni; 925 struct mbuf *mnew, *m; 926 int s, len; 927 928 if (status != USBD_NORMAL_COMPLETION) { 929 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 930 return; 931 932 if (status == USBD_STALLED) 933 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 934 goto skip; 935 } 936 937 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 938 939 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 940 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 941 len)); 942 ifp->if_ierrors++; 943 goto skip; 944 } 945 946 /* rx descriptor is located at the end */ 947 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 948 949 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 950 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 951 /* 952 * This should not happen since we did not request to receive 953 * those frames when we filled RAL_TXRX_CSR2. 954 */ 955 DPRINTFN(5, ("PHY or CRC error\n")); 956 ifp->if_ierrors++; 957 goto skip; 958 } 959 960 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 961 if (mnew == NULL) { 962 ifp->if_ierrors++; 963 goto skip; 964 } 965 966 MCLGET(mnew, M_DONTWAIT); 967 if (!(mnew->m_flags & M_EXT)) { 968 ifp->if_ierrors++; 969 m_freem(mnew); 970 goto skip; 971 } 972 973 m = data->m; 974 data->m = mnew; 975 data->buf = mtod(data->m, uint8_t *); 976 977 /* finalize mbuf */ 978 m->m_pkthdr.rcvif = ifp; 979 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 980 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 981 982 s = splnet(); 983 984 if (sc->sc_drvbpf != NULL) { 985 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 986 987 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 988 tap->wr_rate = ural_rxrate(desc); 989 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 990 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 991 tap->wr_antenna = sc->rx_ant; 992 tap->wr_antsignal = desc->rssi; 993 994 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 995 } 996 997 wh = mtod(m, struct ieee80211_frame *); 998 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 999 1000 /* send the frame to the 802.11 layer */ 1001 ieee80211_input(ic, m, ni, desc->rssi, 0); 1002 1003 /* node is no longer needed */ 1004 ieee80211_free_node(ni); 1005 1006 splx(s); 1007 1008 DPRINTFN(15, ("rx done\n")); 1009 1010 skip: /* setup a new transfer */ 1011 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1012 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1013 usbd_transfer(xfer); 1014 } 1015 1016 /* 1017 * Return the expected ack rate for a frame transmitted at rate `rate'. 1018 * XXX: this should depend on the destination node basic rate set. 1019 */ 1020 Static int 1021 ural_ack_rate(struct ieee80211com *ic, int rate) 1022 { 1023 switch (rate) { 1024 /* CCK rates */ 1025 case 2: 1026 return 2; 1027 case 4: 1028 case 11: 1029 case 22: 1030 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1031 1032 /* OFDM rates */ 1033 case 12: 1034 case 18: 1035 return 12; 1036 case 24: 1037 case 36: 1038 return 24; 1039 case 48: 1040 case 72: 1041 case 96: 1042 case 108: 1043 return 48; 1044 } 1045 1046 /* default to 1Mbps */ 1047 return 2; 1048 } 1049 1050 /* 1051 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1052 * The function automatically determines the operating mode depending on the 1053 * given rate. `flags' indicates whether short preamble is in use or not. 1054 */ 1055 Static uint16_t 1056 ural_txtime(int len, int rate, uint32_t flags) 1057 { 1058 uint16_t txtime; 1059 1060 if (RAL_RATE_IS_OFDM(rate)) { 1061 /* IEEE Std 802.11g-2003, pp. 37 */ 1062 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1063 txtime = 16 + 4 + 4 * txtime + 6; 1064 } else { 1065 /* IEEE Std 802.11b-1999, pp. 28 */ 1066 txtime = (16 * len + rate - 1) / rate; 1067 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1068 txtime += 72 + 24; 1069 else 1070 txtime += 144 + 48; 1071 } 1072 return txtime; 1073 } 1074 1075 Static uint8_t 1076 ural_plcp_signal(int rate) 1077 { 1078 switch (rate) { 1079 /* CCK rates (returned values are device-dependent) */ 1080 case 2: return 0x0; 1081 case 4: return 0x1; 1082 case 11: return 0x2; 1083 case 22: return 0x3; 1084 1085 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1086 case 12: return 0xb; 1087 case 18: return 0xf; 1088 case 24: return 0xa; 1089 case 36: return 0xe; 1090 case 48: return 0x9; 1091 case 72: return 0xd; 1092 case 96: return 0x8; 1093 case 108: return 0xc; 1094 1095 /* unsupported rates (should not get there) */ 1096 default: return 0xff; 1097 } 1098 } 1099 1100 Static void 1101 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1102 uint32_t flags, int len, int rate) 1103 { 1104 struct ieee80211com *ic = &sc->sc_ic; 1105 uint16_t plcp_length; 1106 int remainder; 1107 1108 desc->flags = htole32(flags); 1109 desc->flags |= htole32(RAL_TX_NEWSEQ); 1110 desc->flags |= htole32(len << 16); 1111 1112 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1113 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1114 1115 /* setup PLCP fields */ 1116 desc->plcp_signal = ural_plcp_signal(rate); 1117 desc->plcp_service = 4; 1118 1119 len += IEEE80211_CRC_LEN; 1120 if (RAL_RATE_IS_OFDM(rate)) { 1121 desc->flags |= htole32(RAL_TX_OFDM); 1122 1123 plcp_length = len & 0xfff; 1124 desc->plcp_length_hi = plcp_length >> 6; 1125 desc->plcp_length_lo = plcp_length & 0x3f; 1126 } else { 1127 plcp_length = (16 * len + rate - 1) / rate; 1128 if (rate == 22) { 1129 remainder = (16 * len) % 22; 1130 if (remainder != 0 && remainder < 7) 1131 desc->plcp_service |= RAL_PLCP_LENGEXT; 1132 } 1133 desc->plcp_length_hi = plcp_length >> 8; 1134 desc->plcp_length_lo = plcp_length & 0xff; 1135 1136 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1137 desc->plcp_signal |= 0x08; 1138 } 1139 1140 desc->iv = 0; 1141 desc->eiv = 0; 1142 } 1143 1144 #define RAL_TX_TIMEOUT 5000 1145 1146 Static int 1147 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1148 { 1149 struct ural_tx_desc *desc; 1150 usbd_xfer_handle xfer; 1151 uint8_t cmd = 0; 1152 usbd_status error; 1153 uint8_t *buf; 1154 int xferlen, rate; 1155 1156 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1157 1158 xfer = usbd_alloc_xfer(sc->sc_udev); 1159 if (xfer == NULL) 1160 return ENOMEM; 1161 1162 /* xfer length needs to be a multiple of two! */ 1163 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1164 1165 buf = usbd_alloc_buffer(xfer, xferlen); 1166 if (buf == NULL) { 1167 usbd_free_xfer(xfer); 1168 return ENOMEM; 1169 } 1170 1171 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1172 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1173 1174 error = usbd_sync_transfer(xfer); 1175 if (error != 0) { 1176 usbd_free_xfer(xfer); 1177 return error; 1178 } 1179 1180 desc = (struct ural_tx_desc *)buf; 1181 1182 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1183 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1184 m0->m_pkthdr.len, rate); 1185 1186 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1187 m0->m_pkthdr.len, rate, xferlen)); 1188 1189 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1190 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1191 1192 error = usbd_sync_transfer(xfer); 1193 usbd_free_xfer(xfer); 1194 1195 return error; 1196 } 1197 1198 Static int 1199 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1200 { 1201 struct ieee80211com *ic = &sc->sc_ic; 1202 struct ural_tx_desc *desc; 1203 struct ural_tx_data *data; 1204 struct ieee80211_frame *wh; 1205 struct ieee80211_key *k; 1206 uint32_t flags = 0; 1207 uint16_t dur; 1208 usbd_status error; 1209 int xferlen, rate; 1210 1211 data = &sc->tx_data[0]; 1212 desc = (struct ural_tx_desc *)data->buf; 1213 1214 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1215 1216 wh = mtod(m0, struct ieee80211_frame *); 1217 1218 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1219 k = ieee80211_crypto_encap(ic, ni, m0); 1220 if (k == NULL) { 1221 m_freem(m0); 1222 return ENOBUFS; 1223 } 1224 } 1225 1226 data->m = m0; 1227 data->ni = ni; 1228 1229 wh = mtod(m0, struct ieee80211_frame *); 1230 1231 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1232 flags |= RAL_TX_ACK; 1233 1234 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1235 *(uint16_t *)wh->i_dur = htole16(dur); 1236 1237 /* tell hardware to add timestamp for probe responses */ 1238 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1239 IEEE80211_FC0_TYPE_MGT && 1240 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1241 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1242 flags |= RAL_TX_TIMESTAMP; 1243 } 1244 1245 if (sc->sc_drvbpf != NULL) { 1246 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1247 1248 tap->wt_flags = 0; 1249 tap->wt_rate = rate; 1250 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1251 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1252 tap->wt_antenna = sc->tx_ant; 1253 1254 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1255 } 1256 1257 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1258 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1259 1260 /* align end on a 2-bytes boundary */ 1261 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1262 1263 /* 1264 * No space left in the last URB to store the extra 2 bytes, force 1265 * sending of another URB. 1266 */ 1267 if ((xferlen % 64) == 0) 1268 xferlen += 2; 1269 1270 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1271 m0->m_pkthdr.len, rate, xferlen)); 1272 1273 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1274 xferlen, USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, 1275 ural_txeof); 1276 1277 error = usbd_transfer(data->xfer); 1278 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1279 m_freem(m0); 1280 return error; 1281 } 1282 1283 sc->tx_queued++; 1284 1285 return 0; 1286 } 1287 1288 Static int 1289 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1290 { 1291 struct ieee80211com *ic = &sc->sc_ic; 1292 struct ural_tx_desc *desc; 1293 struct ural_tx_data *data; 1294 struct ieee80211_frame *wh; 1295 struct ieee80211_key *k; 1296 uint32_t flags = 0; 1297 uint16_t dur; 1298 usbd_status error; 1299 int xferlen, rate; 1300 1301 wh = mtod(m0, struct ieee80211_frame *); 1302 1303 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1304 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1305 else 1306 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1307 1308 rate &= IEEE80211_RATE_VAL; 1309 1310 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1311 k = ieee80211_crypto_encap(ic, ni, m0); 1312 if (k == NULL) { 1313 m_freem(m0); 1314 return ENOBUFS; 1315 } 1316 1317 /* packet header may have moved, reset our local pointer */ 1318 wh = mtod(m0, struct ieee80211_frame *); 1319 } 1320 1321 data = &sc->tx_data[0]; 1322 desc = (struct ural_tx_desc *)data->buf; 1323 1324 data->m = m0; 1325 data->ni = ni; 1326 1327 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1328 flags |= RAL_TX_ACK; 1329 flags |= RAL_TX_RETRY(7); 1330 1331 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1332 ic->ic_flags) + RAL_SIFS; 1333 *(uint16_t *)wh->i_dur = htole16(dur); 1334 } 1335 1336 if (sc->sc_drvbpf != NULL) { 1337 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1338 1339 tap->wt_flags = 0; 1340 tap->wt_rate = rate; 1341 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1342 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1343 tap->wt_antenna = sc->tx_ant; 1344 1345 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1346 } 1347 1348 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1349 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1350 1351 /* align end on a 2-bytes boundary */ 1352 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1353 1354 /* 1355 * No space left in the last URB to store the extra 2 bytes, force 1356 * sending of another URB. 1357 */ 1358 if ((xferlen % 64) == 0) 1359 xferlen += 2; 1360 1361 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1362 m0->m_pkthdr.len, rate, xferlen)); 1363 1364 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1365 xferlen, USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, 1366 ural_txeof); 1367 1368 error = usbd_transfer(data->xfer); 1369 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1370 return error; 1371 1372 sc->tx_queued++; 1373 1374 return 0; 1375 } 1376 1377 Static void 1378 ural_start(struct ifnet *ifp) 1379 { 1380 struct ural_softc *sc = ifp->if_softc; 1381 struct ieee80211com *ic = &sc->sc_ic; 1382 struct mbuf *m0; 1383 struct ether_header *eh; 1384 struct ieee80211_node *ni; 1385 1386 for (;;) { 1387 IF_POLL(&ic->ic_mgtq, m0); 1388 if (m0 != NULL) { 1389 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1390 ifp->if_flags |= IFF_OACTIVE; 1391 break; 1392 } 1393 IF_DEQUEUE(&ic->ic_mgtq, m0); 1394 1395 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1396 m0->m_pkthdr.rcvif = NULL; 1397 bpf_mtap3(ic->ic_rawbpf, m0); 1398 if (ural_tx_mgt(sc, m0, ni) != 0) 1399 break; 1400 1401 } else { 1402 if (ic->ic_state != IEEE80211_S_RUN) 1403 break; 1404 IFQ_DEQUEUE(&ifp->if_snd, m0); 1405 if (m0 == NULL) 1406 break; 1407 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1408 IF_PREPEND(&ifp->if_snd, m0); 1409 ifp->if_flags |= IFF_OACTIVE; 1410 break; 1411 } 1412 1413 if (m0->m_len < sizeof (struct ether_header) && 1414 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1415 continue; 1416 1417 eh = mtod(m0, struct ether_header *); 1418 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1419 if (ni == NULL) { 1420 m_freem(m0); 1421 continue; 1422 } 1423 bpf_mtap(ifp, m0); 1424 m0 = ieee80211_encap(ic, m0, ni); 1425 if (m0 == NULL) { 1426 ieee80211_free_node(ni); 1427 continue; 1428 } 1429 bpf_mtap3(ic->ic_rawbpf, m0); 1430 if (ural_tx_data(sc, m0, ni) != 0) { 1431 ieee80211_free_node(ni); 1432 ifp->if_oerrors++; 1433 break; 1434 } 1435 } 1436 1437 sc->sc_tx_timer = 5; 1438 ifp->if_timer = 1; 1439 } 1440 } 1441 1442 Static void 1443 ural_watchdog(struct ifnet *ifp) 1444 { 1445 struct ural_softc *sc = ifp->if_softc; 1446 struct ieee80211com *ic = &sc->sc_ic; 1447 1448 ifp->if_timer = 0; 1449 1450 if (sc->sc_tx_timer > 0) { 1451 if (--sc->sc_tx_timer == 0) { 1452 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1453 /*ural_init(sc); XXX needs a process context! */ 1454 ifp->if_oerrors++; 1455 return; 1456 } 1457 ifp->if_timer = 1; 1458 } 1459 1460 ieee80211_watchdog(ic); 1461 } 1462 1463 /* 1464 * This function allows for fast channel switching in monitor mode (used by 1465 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1466 * generate a new beacon frame. 1467 */ 1468 Static int 1469 ural_reset(struct ifnet *ifp) 1470 { 1471 struct ural_softc *sc = ifp->if_softc; 1472 struct ieee80211com *ic = &sc->sc_ic; 1473 1474 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1475 return ENETRESET; 1476 1477 ural_set_chan(sc, ic->ic_curchan); 1478 1479 return 0; 1480 } 1481 1482 Static int 1483 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1484 { 1485 #define IS_RUNNING(ifp) \ 1486 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1487 1488 struct ural_softc *sc = ifp->if_softc; 1489 struct ieee80211com *ic = &sc->sc_ic; 1490 int s, error = 0; 1491 1492 s = splnet(); 1493 1494 switch (cmd) { 1495 case SIOCSIFFLAGS: 1496 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1497 break; 1498 /* XXX re-use ether_ioctl() */ 1499 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1500 case IFF_UP|IFF_RUNNING: 1501 ural_update_promisc(sc); 1502 break; 1503 case IFF_UP: 1504 ural_init(ifp); 1505 break; 1506 case IFF_RUNNING: 1507 ural_stop(ifp, 1); 1508 break; 1509 case 0: 1510 break; 1511 } 1512 break; 1513 1514 case SIOCADDMULTI: 1515 case SIOCDELMULTI: 1516 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1517 error = 0; 1518 } 1519 break; 1520 1521 default: 1522 error = ieee80211_ioctl(ic, cmd, data); 1523 } 1524 1525 if (error == ENETRESET) { 1526 if (IS_RUNNING(ifp) && 1527 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1528 ural_init(ifp); 1529 error = 0; 1530 } 1531 1532 splx(s); 1533 1534 return error; 1535 #undef IS_RUNNING 1536 } 1537 1538 Static void 1539 ural_set_testmode(struct ural_softc *sc) 1540 { 1541 usb_device_request_t req; 1542 usbd_status error; 1543 1544 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1545 req.bRequest = RAL_VENDOR_REQUEST; 1546 USETW(req.wValue, 4); 1547 USETW(req.wIndex, 1); 1548 USETW(req.wLength, 0); 1549 1550 error = usbd_do_request(sc->sc_udev, &req, NULL); 1551 if (error != 0) { 1552 printf("%s: could not set test mode: %s\n", 1553 device_xname(sc->sc_dev), usbd_errstr(error)); 1554 } 1555 } 1556 1557 Static void 1558 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1559 { 1560 usb_device_request_t req; 1561 usbd_status error; 1562 1563 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1564 req.bRequest = RAL_READ_EEPROM; 1565 USETW(req.wValue, 0); 1566 USETW(req.wIndex, addr); 1567 USETW(req.wLength, len); 1568 1569 error = usbd_do_request(sc->sc_udev, &req, buf); 1570 if (error != 0) { 1571 printf("%s: could not read EEPROM: %s\n", 1572 device_xname(sc->sc_dev), usbd_errstr(error)); 1573 } 1574 } 1575 1576 Static uint16_t 1577 ural_read(struct ural_softc *sc, uint16_t reg) 1578 { 1579 usb_device_request_t req; 1580 usbd_status error; 1581 uint16_t val; 1582 1583 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1584 req.bRequest = RAL_READ_MAC; 1585 USETW(req.wValue, 0); 1586 USETW(req.wIndex, reg); 1587 USETW(req.wLength, sizeof (uint16_t)); 1588 1589 error = usbd_do_request(sc->sc_udev, &req, &val); 1590 if (error != 0) { 1591 printf("%s: could not read MAC register: %s\n", 1592 device_xname(sc->sc_dev), usbd_errstr(error)); 1593 return 0; 1594 } 1595 1596 return le16toh(val); 1597 } 1598 1599 Static void 1600 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1601 { 1602 usb_device_request_t req; 1603 usbd_status error; 1604 1605 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1606 req.bRequest = RAL_READ_MULTI_MAC; 1607 USETW(req.wValue, 0); 1608 USETW(req.wIndex, reg); 1609 USETW(req.wLength, len); 1610 1611 error = usbd_do_request(sc->sc_udev, &req, buf); 1612 if (error != 0) { 1613 printf("%s: could not read MAC register: %s\n", 1614 device_xname(sc->sc_dev), usbd_errstr(error)); 1615 } 1616 } 1617 1618 Static void 1619 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1620 { 1621 usb_device_request_t req; 1622 usbd_status error; 1623 1624 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1625 req.bRequest = RAL_WRITE_MAC; 1626 USETW(req.wValue, val); 1627 USETW(req.wIndex, reg); 1628 USETW(req.wLength, 0); 1629 1630 error = usbd_do_request(sc->sc_udev, &req, NULL); 1631 if (error != 0) { 1632 printf("%s: could not write MAC register: %s\n", 1633 device_xname(sc->sc_dev), usbd_errstr(error)); 1634 } 1635 } 1636 1637 Static void 1638 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1639 { 1640 usb_device_request_t req; 1641 usbd_status error; 1642 1643 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1644 req.bRequest = RAL_WRITE_MULTI_MAC; 1645 USETW(req.wValue, 0); 1646 USETW(req.wIndex, reg); 1647 USETW(req.wLength, len); 1648 1649 error = usbd_do_request(sc->sc_udev, &req, buf); 1650 if (error != 0) { 1651 printf("%s: could not write MAC register: %s\n", 1652 device_xname(sc->sc_dev), usbd_errstr(error)); 1653 } 1654 } 1655 1656 Static void 1657 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1658 { 1659 uint16_t tmp; 1660 int ntries; 1661 1662 for (ntries = 0; ntries < 5; ntries++) { 1663 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1664 break; 1665 } 1666 if (ntries == 5) { 1667 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1668 return; 1669 } 1670 1671 tmp = reg << 8 | val; 1672 ural_write(sc, RAL_PHY_CSR7, tmp); 1673 } 1674 1675 Static uint8_t 1676 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1677 { 1678 uint16_t val; 1679 int ntries; 1680 1681 val = RAL_BBP_WRITE | reg << 8; 1682 ural_write(sc, RAL_PHY_CSR7, val); 1683 1684 for (ntries = 0; ntries < 5; ntries++) { 1685 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1686 break; 1687 } 1688 if (ntries == 5) { 1689 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1690 return 0; 1691 } 1692 1693 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1694 } 1695 1696 Static void 1697 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1698 { 1699 uint32_t tmp; 1700 int ntries; 1701 1702 for (ntries = 0; ntries < 5; ntries++) { 1703 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1704 break; 1705 } 1706 if (ntries == 5) { 1707 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1708 return; 1709 } 1710 1711 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1712 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1713 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1714 1715 /* remember last written value in sc */ 1716 sc->rf_regs[reg] = val; 1717 1718 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1719 } 1720 1721 Static void 1722 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1723 { 1724 struct ieee80211com *ic = &sc->sc_ic; 1725 uint8_t power, tmp; 1726 u_int i, chan; 1727 1728 chan = ieee80211_chan2ieee(ic, c); 1729 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1730 return; 1731 1732 if (IEEE80211_IS_CHAN_2GHZ(c)) 1733 power = min(sc->txpow[chan - 1], 31); 1734 else 1735 power = 31; 1736 1737 /* adjust txpower using ifconfig settings */ 1738 power -= (100 - ic->ic_txpowlimit) / 8; 1739 1740 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1741 1742 switch (sc->rf_rev) { 1743 case RAL_RF_2522: 1744 ural_rf_write(sc, RAL_RF1, 0x00814); 1745 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1746 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1747 break; 1748 1749 case RAL_RF_2523: 1750 ural_rf_write(sc, RAL_RF1, 0x08804); 1751 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1752 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1753 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1754 break; 1755 1756 case RAL_RF_2524: 1757 ural_rf_write(sc, RAL_RF1, 0x0c808); 1758 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1759 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1760 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1761 break; 1762 1763 case RAL_RF_2525: 1764 ural_rf_write(sc, RAL_RF1, 0x08808); 1765 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1766 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1767 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1768 1769 ural_rf_write(sc, RAL_RF1, 0x08808); 1770 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1771 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1772 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1773 break; 1774 1775 case RAL_RF_2525E: 1776 ural_rf_write(sc, RAL_RF1, 0x08808); 1777 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1778 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1779 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1780 break; 1781 1782 case RAL_RF_2526: 1783 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1784 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1785 ural_rf_write(sc, RAL_RF1, 0x08804); 1786 1787 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1788 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1789 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1790 break; 1791 1792 /* dual-band RF */ 1793 case RAL_RF_5222: 1794 for (i = 0; ural_rf5222[i].chan != chan; i++); 1795 1796 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1797 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1798 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1799 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1800 break; 1801 } 1802 1803 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1804 ic->ic_state != IEEE80211_S_SCAN) { 1805 /* set Japan filter bit for channel 14 */ 1806 tmp = ural_bbp_read(sc, 70); 1807 1808 tmp &= ~RAL_JAPAN_FILTER; 1809 if (chan == 14) 1810 tmp |= RAL_JAPAN_FILTER; 1811 1812 ural_bbp_write(sc, 70, tmp); 1813 1814 /* clear CRC errors */ 1815 ural_read(sc, RAL_STA_CSR0); 1816 1817 DELAY(10000); 1818 ural_disable_rf_tune(sc); 1819 } 1820 } 1821 1822 /* 1823 * Disable RF auto-tuning. 1824 */ 1825 Static void 1826 ural_disable_rf_tune(struct ural_softc *sc) 1827 { 1828 uint32_t tmp; 1829 1830 if (sc->rf_rev != RAL_RF_2523) { 1831 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1832 ural_rf_write(sc, RAL_RF1, tmp); 1833 } 1834 1835 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1836 ural_rf_write(sc, RAL_RF3, tmp); 1837 1838 DPRINTFN(2, ("disabling RF autotune\n")); 1839 } 1840 1841 /* 1842 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1843 * synchronization. 1844 */ 1845 Static void 1846 ural_enable_tsf_sync(struct ural_softc *sc) 1847 { 1848 struct ieee80211com *ic = &sc->sc_ic; 1849 uint16_t logcwmin, preload, tmp; 1850 1851 /* first, disable TSF synchronization */ 1852 ural_write(sc, RAL_TXRX_CSR19, 0); 1853 1854 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1855 ural_write(sc, RAL_TXRX_CSR18, tmp); 1856 1857 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1858 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1859 tmp = logcwmin << 12 | preload; 1860 ural_write(sc, RAL_TXRX_CSR20, tmp); 1861 1862 /* finally, enable TSF synchronization */ 1863 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1864 if (ic->ic_opmode == IEEE80211_M_STA) 1865 tmp |= RAL_ENABLE_TSF_SYNC(1); 1866 else 1867 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1868 ural_write(sc, RAL_TXRX_CSR19, tmp); 1869 1870 DPRINTF(("enabling TSF synchronization\n")); 1871 } 1872 1873 Static void 1874 ural_update_slot(struct ifnet *ifp) 1875 { 1876 struct ural_softc *sc = ifp->if_softc; 1877 struct ieee80211com *ic = &sc->sc_ic; 1878 uint16_t slottime, sifs, eifs; 1879 1880 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1881 1882 /* 1883 * These settings may sound a bit inconsistent but this is what the 1884 * reference driver does. 1885 */ 1886 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1887 sifs = 16 - RAL_RXTX_TURNAROUND; 1888 eifs = 364; 1889 } else { 1890 sifs = 10 - RAL_RXTX_TURNAROUND; 1891 eifs = 64; 1892 } 1893 1894 ural_write(sc, RAL_MAC_CSR10, slottime); 1895 ural_write(sc, RAL_MAC_CSR11, sifs); 1896 ural_write(sc, RAL_MAC_CSR12, eifs); 1897 } 1898 1899 Static void 1900 ural_set_txpreamble(struct ural_softc *sc) 1901 { 1902 uint16_t tmp; 1903 1904 tmp = ural_read(sc, RAL_TXRX_CSR10); 1905 1906 tmp &= ~RAL_SHORT_PREAMBLE; 1907 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1908 tmp |= RAL_SHORT_PREAMBLE; 1909 1910 ural_write(sc, RAL_TXRX_CSR10, tmp); 1911 } 1912 1913 Static void 1914 ural_set_basicrates(struct ural_softc *sc) 1915 { 1916 struct ieee80211com *ic = &sc->sc_ic; 1917 1918 /* update basic rate set */ 1919 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1920 /* 11b basic rates: 1, 2Mbps */ 1921 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1922 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1923 /* 11a basic rates: 6, 12, 24Mbps */ 1924 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1925 } else { 1926 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1927 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1928 } 1929 } 1930 1931 Static void 1932 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1933 { 1934 uint16_t tmp; 1935 1936 tmp = bssid[0] | bssid[1] << 8; 1937 ural_write(sc, RAL_MAC_CSR5, tmp); 1938 1939 tmp = bssid[2] | bssid[3] << 8; 1940 ural_write(sc, RAL_MAC_CSR6, tmp); 1941 1942 tmp = bssid[4] | bssid[5] << 8; 1943 ural_write(sc, RAL_MAC_CSR7, tmp); 1944 1945 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1946 } 1947 1948 Static void 1949 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1950 { 1951 uint16_t tmp; 1952 1953 tmp = addr[0] | addr[1] << 8; 1954 ural_write(sc, RAL_MAC_CSR2, tmp); 1955 1956 tmp = addr[2] | addr[3] << 8; 1957 ural_write(sc, RAL_MAC_CSR3, tmp); 1958 1959 tmp = addr[4] | addr[5] << 8; 1960 ural_write(sc, RAL_MAC_CSR4, tmp); 1961 1962 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1963 } 1964 1965 Static void 1966 ural_update_promisc(struct ural_softc *sc) 1967 { 1968 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1969 uint32_t tmp; 1970 1971 tmp = ural_read(sc, RAL_TXRX_CSR2); 1972 1973 tmp &= ~RAL_DROP_NOT_TO_ME; 1974 if (!(ifp->if_flags & IFF_PROMISC)) 1975 tmp |= RAL_DROP_NOT_TO_ME; 1976 1977 ural_write(sc, RAL_TXRX_CSR2, tmp); 1978 1979 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1980 "entering" : "leaving")); 1981 } 1982 1983 Static const char * 1984 ural_get_rf(int rev) 1985 { 1986 switch (rev) { 1987 case RAL_RF_2522: return "RT2522"; 1988 case RAL_RF_2523: return "RT2523"; 1989 case RAL_RF_2524: return "RT2524"; 1990 case RAL_RF_2525: return "RT2525"; 1991 case RAL_RF_2525E: return "RT2525e"; 1992 case RAL_RF_2526: return "RT2526"; 1993 case RAL_RF_5222: return "RT5222"; 1994 default: return "unknown"; 1995 } 1996 } 1997 1998 Static void 1999 ural_read_eeprom(struct ural_softc *sc) 2000 { 2001 struct ieee80211com *ic = &sc->sc_ic; 2002 uint16_t val; 2003 2004 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2005 val = le16toh(val); 2006 sc->rf_rev = (val >> 11) & 0x7; 2007 sc->hw_radio = (val >> 10) & 0x1; 2008 sc->led_mode = (val >> 6) & 0x7; 2009 sc->rx_ant = (val >> 4) & 0x3; 2010 sc->tx_ant = (val >> 2) & 0x3; 2011 sc->nb_ant = val & 0x3; 2012 2013 /* read MAC address */ 2014 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2015 2016 /* read default values for BBP registers */ 2017 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2018 2019 /* read Tx power for all b/g channels */ 2020 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2021 } 2022 2023 Static int 2024 ural_bbp_init(struct ural_softc *sc) 2025 { 2026 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2027 int i, ntries; 2028 2029 /* wait for BBP to be ready */ 2030 for (ntries = 0; ntries < 100; ntries++) { 2031 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2032 break; 2033 DELAY(1000); 2034 } 2035 if (ntries == 100) { 2036 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2037 return EIO; 2038 } 2039 2040 /* initialize BBP registers to default values */ 2041 for (i = 0; i < N(ural_def_bbp); i++) 2042 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2043 2044 #if 0 2045 /* initialize BBP registers to values stored in EEPROM */ 2046 for (i = 0; i < 16; i++) { 2047 if (sc->bbp_prom[i].reg == 0xff) 2048 continue; 2049 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2050 } 2051 #endif 2052 2053 return 0; 2054 #undef N 2055 } 2056 2057 Static void 2058 ural_set_txantenna(struct ural_softc *sc, int antenna) 2059 { 2060 uint16_t tmp; 2061 uint8_t tx; 2062 2063 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2064 if (antenna == 1) 2065 tx |= RAL_BBP_ANTA; 2066 else if (antenna == 2) 2067 tx |= RAL_BBP_ANTB; 2068 else 2069 tx |= RAL_BBP_DIVERSITY; 2070 2071 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2072 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2073 sc->rf_rev == RAL_RF_5222) 2074 tx |= RAL_BBP_FLIPIQ; 2075 2076 ural_bbp_write(sc, RAL_BBP_TX, tx); 2077 2078 /* update values in PHY_CSR5 and PHY_CSR6 */ 2079 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2080 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2081 2082 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2083 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2084 } 2085 2086 Static void 2087 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2088 { 2089 uint8_t rx; 2090 2091 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2092 if (antenna == 1) 2093 rx |= RAL_BBP_ANTA; 2094 else if (antenna == 2) 2095 rx |= RAL_BBP_ANTB; 2096 else 2097 rx |= RAL_BBP_DIVERSITY; 2098 2099 /* need to force no I/Q flip for RF 2525e and 2526 */ 2100 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2101 rx &= ~RAL_BBP_FLIPIQ; 2102 2103 ural_bbp_write(sc, RAL_BBP_RX, rx); 2104 } 2105 2106 Static int 2107 ural_init(struct ifnet *ifp) 2108 { 2109 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2110 struct ural_softc *sc = ifp->if_softc; 2111 struct ieee80211com *ic = &sc->sc_ic; 2112 struct ieee80211_key *wk; 2113 struct ural_rx_data *data; 2114 uint16_t tmp; 2115 usbd_status error; 2116 int i, ntries; 2117 2118 ural_set_testmode(sc); 2119 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2120 2121 ural_stop(ifp, 0); 2122 2123 /* initialize MAC registers to default values */ 2124 for (i = 0; i < N(ural_def_mac); i++) 2125 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2126 2127 /* wait for BBP and RF to wake up (this can take a long time!) */ 2128 for (ntries = 0; ntries < 100; ntries++) { 2129 tmp = ural_read(sc, RAL_MAC_CSR17); 2130 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2131 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2132 break; 2133 DELAY(1000); 2134 } 2135 if (ntries == 100) { 2136 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2137 device_xname(sc->sc_dev)); 2138 error = EIO; 2139 goto fail; 2140 } 2141 2142 /* we're ready! */ 2143 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2144 2145 /* set basic rate set (will be updated later) */ 2146 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2147 2148 error = ural_bbp_init(sc); 2149 if (error != 0) 2150 goto fail; 2151 2152 /* set default BSS channel */ 2153 ural_set_chan(sc, ic->ic_curchan); 2154 2155 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2156 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2157 2158 ural_set_txantenna(sc, sc->tx_ant); 2159 ural_set_rxantenna(sc, sc->rx_ant); 2160 2161 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2162 ural_set_macaddr(sc, ic->ic_myaddr); 2163 2164 /* 2165 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2166 */ 2167 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2168 wk = &ic->ic_crypto.cs_nw_keys[i]; 2169 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2170 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2171 } 2172 2173 /* 2174 * Allocate xfer for AMRR statistics requests. 2175 */ 2176 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2177 if (sc->amrr_xfer == NULL) { 2178 printf("%s: could not allocate AMRR xfer\n", 2179 device_xname(sc->sc_dev)); 2180 goto fail; 2181 } 2182 2183 /* 2184 * Open Tx and Rx USB bulk pipes. 2185 */ 2186 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2187 &sc->sc_tx_pipeh); 2188 if (error != 0) { 2189 printf("%s: could not open Tx pipe: %s\n", 2190 device_xname(sc->sc_dev), usbd_errstr(error)); 2191 goto fail; 2192 } 2193 2194 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2195 &sc->sc_rx_pipeh); 2196 if (error != 0) { 2197 printf("%s: could not open Rx pipe: %s\n", 2198 device_xname(sc->sc_dev), usbd_errstr(error)); 2199 goto fail; 2200 } 2201 2202 /* 2203 * Allocate Tx and Rx xfer queues. 2204 */ 2205 error = ural_alloc_tx_list(sc); 2206 if (error != 0) { 2207 printf("%s: could not allocate Tx list\n", 2208 device_xname(sc->sc_dev)); 2209 goto fail; 2210 } 2211 2212 error = ural_alloc_rx_list(sc); 2213 if (error != 0) { 2214 printf("%s: could not allocate Rx list\n", 2215 device_xname(sc->sc_dev)); 2216 goto fail; 2217 } 2218 2219 /* 2220 * Start up the receive pipe. 2221 */ 2222 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2223 data = &sc->rx_data[i]; 2224 2225 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2226 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2227 usbd_transfer(data->xfer); 2228 } 2229 2230 /* kick Rx */ 2231 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2232 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2233 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2234 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2235 tmp |= RAL_DROP_TODS; 2236 if (!(ifp->if_flags & IFF_PROMISC)) 2237 tmp |= RAL_DROP_NOT_TO_ME; 2238 } 2239 ural_write(sc, RAL_TXRX_CSR2, tmp); 2240 2241 ifp->if_flags &= ~IFF_OACTIVE; 2242 ifp->if_flags |= IFF_RUNNING; 2243 2244 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2245 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2246 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2247 } else 2248 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2249 2250 return 0; 2251 2252 fail: ural_stop(ifp, 1); 2253 return error; 2254 #undef N 2255 } 2256 2257 Static void 2258 ural_stop(struct ifnet *ifp, int disable) 2259 { 2260 struct ural_softc *sc = ifp->if_softc; 2261 struct ieee80211com *ic = &sc->sc_ic; 2262 2263 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2264 2265 sc->sc_tx_timer = 0; 2266 ifp->if_timer = 0; 2267 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2268 2269 /* disable Rx */ 2270 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2271 2272 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2273 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2274 ural_write(sc, RAL_MAC_CSR1, 0); 2275 2276 if (sc->amrr_xfer != NULL) { 2277 usbd_free_xfer(sc->amrr_xfer); 2278 sc->amrr_xfer = NULL; 2279 } 2280 2281 if (sc->sc_rx_pipeh != NULL) { 2282 usbd_abort_pipe(sc->sc_rx_pipeh); 2283 usbd_close_pipe(sc->sc_rx_pipeh); 2284 sc->sc_rx_pipeh = NULL; 2285 } 2286 2287 if (sc->sc_tx_pipeh != NULL) { 2288 usbd_abort_pipe(sc->sc_tx_pipeh); 2289 usbd_close_pipe(sc->sc_tx_pipeh); 2290 sc->sc_tx_pipeh = NULL; 2291 } 2292 2293 ural_free_rx_list(sc); 2294 ural_free_tx_list(sc); 2295 } 2296 2297 int 2298 ural_activate(device_t self, enum devact act) 2299 { 2300 struct ural_softc *sc = device_private(self); 2301 2302 switch (act) { 2303 case DVACT_DEACTIVATE: 2304 if_deactivate(&sc->sc_if); 2305 return 0; 2306 default: 2307 return EOPNOTSUPP; 2308 } 2309 } 2310 2311 Static void 2312 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2313 { 2314 int i; 2315 2316 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2317 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2318 2319 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2320 2321 /* set rate to some reasonable initial value */ 2322 for (i = ni->ni_rates.rs_nrates - 1; 2323 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2324 i--); 2325 ni->ni_txrate = i; 2326 2327 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2328 } 2329 2330 Static void 2331 ural_amrr_timeout(void *arg) 2332 { 2333 struct ural_softc *sc = (struct ural_softc *)arg; 2334 usb_device_request_t req; 2335 int s; 2336 2337 s = splusb(); 2338 2339 /* 2340 * Asynchronously read statistic registers (cleared by read). 2341 */ 2342 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2343 req.bRequest = RAL_READ_MULTI_MAC; 2344 USETW(req.wValue, 0); 2345 USETW(req.wIndex, RAL_STA_CSR0); 2346 USETW(req.wLength, sizeof sc->sta); 2347 2348 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2349 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2350 ural_amrr_update); 2351 (void)usbd_transfer(sc->amrr_xfer); 2352 2353 splx(s); 2354 } 2355 2356 Static void 2357 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2358 usbd_status status) 2359 { 2360 struct ural_softc *sc = (struct ural_softc *)priv; 2361 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2362 2363 if (status != USBD_NORMAL_COMPLETION) { 2364 printf("%s: could not retrieve Tx statistics - " 2365 "cancelling automatic rate control\n", 2366 device_xname(sc->sc_dev)); 2367 return; 2368 } 2369 2370 /* count TX retry-fail as Tx errors */ 2371 ifp->if_oerrors += sc->sta[9]; 2372 2373 sc->amn.amn_retrycnt = 2374 sc->sta[7] + /* TX one-retry ok count */ 2375 sc->sta[8] + /* TX more-retry ok count */ 2376 sc->sta[9]; /* TX retry-fail count */ 2377 2378 sc->amn.amn_txcnt = 2379 sc->amn.amn_retrycnt + 2380 sc->sta[6]; /* TX no-retry ok count */ 2381 2382 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2383 2384 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2385 } 2386
Indexes created Fri Oct 03 02:09:57 GMT 2025